SW298278: 830 HWP changes to support Alpine load-line-per-socket overrides

CQ:SW298278
Change-Id: I5c7a7b9de6fe41c2cfe58f5efc4b88073b681e00
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16353
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Sangeetha T S <sangeet2@in.ibm.com>
Reviewed-by: PRACHI GUPTA <pragupta@us.ibm.com>
Tested-by: PRACHI GUPTA <pragupta@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16355
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

3 files changed, 70 insertions, 42 deletions

diff --git a/src/usr/hwpf/hwp/pstates/pstates/lab_pstates.c b/src/usr/hwpf/hwp/pstates/pstates/lab_pstates.c
index 936922359..f38a3c539 100755
--- a/src/usr/hwpf/hwp/pstates/pstates/lab_pstates.c
+++ b/src/usr/hwpf/hwp/pstates/pstates/lab_pstates.c
@@ -5,7 +5,9 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2013,2014              */
+/* Contributors Listed Below - COPYRIGHT 2013,2015                        */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
 /*                                                                        */
 /* Licensed under the Apache License, Version 2.0 (the "License");        */
 /* you may not use this file except in compliance with the License.       */
@@ -20,7 +22,7 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: lab_pstates.c,v 1.9 2014/02/21 03:02:20 jmcgill Exp $
+// $Id: lab_pstates.c,v 1.10 2015/03/12 18:06:46 stillgs Exp $
 
 /// \file lab_pstates.c
 /// \brief Lab-only (as opposed to product-procedure) support for Pstates.
@@ -257,7 +259,9 @@ gpst_print(FILE *stream, GlobalPstateTable *gpst)
     uint32_t options;
     uint32_t pstate0_frequency_khz, frequency_step_khz;
     uint8_t entries, pstate_stepsize, vrm_stepdelay_range, vrm_stepdelay_value;
-    Pstate pmin, pvsafe, psafe;
+//    Pstate pmin, pvsafe, psafe;
+    Pstate pvsafe, psafe;
+    
 
     // Endian-corrected vector Pstate fields
 
@@ -285,7 +289,7 @@ gpst_print(FILE *stream, GlobalPstateTable *gpst)
     pstate_stepsize = gpst->pstate_stepsize;
     vrm_stepdelay_range = gpst->vrm_stepdelay_range;
     vrm_stepdelay_value = gpst->vrm_stepdelay_value;
-    pmin = gpst->pmin;
+//    pmin = gpst->pmin;
     pvsafe = gpst->pvsafe;
     psafe = gpst->psafe;
 
diff --git a/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.C b/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.C
index 70b57df45..a9ec97d13 100755
--- a/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.C
+++ b/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2014                        */
+/* Contributors Listed Below - COPYRIGHT 2013,2015                        */
 /* [+] Google Inc.                                                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
@@ -23,7 +23,7 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_build_pstate_datablock.C,v 1.42 2014/11/18 18:08:49 anoo Exp $
+// $Id: p8_build_pstate_datablock.C,v 1.44 2015/03/16 17:54:25 stillgs Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_build_pstate_datablock.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2012
@@ -544,34 +544,58 @@ ReturnCode proc_get_attributes(const Target& i_target,
             l_rc = FAPI_ATTR_GET(attr_name, target, attr->attr_assign); \
             if (l_rc) break; \
             FAPI_INF("%-60s = 0x%08x %u", #attr_name, attr->attr_assign, attr->attr_assign);
-
-    DATABLOCK_GET_ATTR(ATTR_FREQ_EXT_BIAS_UP,                                &i_target, attr_freq_ext_bias_up);
-    DATABLOCK_GET_ATTR(ATTR_FREQ_EXT_BIAS_DOWN,                              &i_target, attr_freq_ext_bias_down);
-    DATABLOCK_GET_ATTR(ATTR_VOLTAGE_EXT_VDD_BIAS_UP,                         &i_target, attr_voltage_ext_vdd_bias_up);
-    DATABLOCK_GET_ATTR(ATTR_VOLTAGE_EXT_VCS_BIAS_UP,                         &i_target, attr_voltage_ext_vcs_bias_up);
-    DATABLOCK_GET_ATTR(ATTR_VOLTAGE_EXT_VDD_BIAS_DOWN,                       &i_target, attr_voltage_ext_vdd_bias_down);
-    DATABLOCK_GET_ATTR(ATTR_VOLTAGE_EXT_VCS_BIAS_DOWN,                       &i_target, attr_voltage_ext_vcs_bias_down);
-    DATABLOCK_GET_ATTR(ATTR_VOLTAGE_INT_VDD_BIAS_UP,                         &i_target, attr_voltage_int_vdd_bias_up);
-    DATABLOCK_GET_ATTR(ATTR_VOLTAGE_INT_VCS_BIAS_UP,                         &i_target, attr_voltage_int_vcs_bias_up);
-    DATABLOCK_GET_ATTR(ATTR_VOLTAGE_INT_VDD_BIAS_DOWN,                       &i_target, attr_voltage_int_vdd_bias_down);
-    DATABLOCK_GET_ATTR(ATTR_VOLTAGE_INT_VCS_BIAS_DOWN,                       &i_target, attr_voltage_int_vcs_bias_down);
-    DATABLOCK_GET_ATTR(ATTR_FREQ_PROC_REFCLOCK,                                   NULL, attr_freq_proc_refclock);
-    DATABLOCK_GET_ATTR(ATTR_FREQ_CORE_MAX,                                        NULL, attr_freq_core_max);
-    DATABLOCK_GET_ATTR(ATTR_PM_SAFE_FREQUENCY,                                    NULL, attr_pm_safe_frequency);
-    DATABLOCK_GET_ATTR(ATTR_FREQ_CORE_FLOOR,                                      NULL, attr_freq_core_floor);
-    DATABLOCK_GET_ATTR(ATTR_BOOT_FREQ_MHZ,                                        NULL, attr_boot_freq_mhz);
-    DATABLOCK_GET_ATTR(ATTR_CPM_TURBO_BOOST_PERCENT,                              NULL, attr_cpm_turbo_boost_percent);
-    DATABLOCK_GET_ATTR(ATTR_PROC_R_LOADLINE_VDD,                                  NULL, attr_proc_r_loadline_vdd);
-    DATABLOCK_GET_ATTR(ATTR_PROC_R_LOADLINE_VCS,                                  NULL, attr_proc_r_loadline_vcs);
-    DATABLOCK_GET_ATTR(ATTR_PROC_R_DISTLOSS_VDD,                                  NULL, attr_proc_r_distloss_vdd);
-    DATABLOCK_GET_ATTR(ATTR_PROC_R_DISTLOSS_VCS,                                  NULL, attr_proc_r_distloss_vcs);
-    DATABLOCK_GET_ATTR(ATTR_PROC_VRM_VOFFSET_VDD,                                 NULL, attr_proc_vrm_voffset_vdd);
-    DATABLOCK_GET_ATTR(ATTR_PROC_VRM_VOFFSET_VCS,                                 NULL, attr_proc_vrm_voffset_vcs);
-    DATABLOCK_GET_ATTR(ATTR_PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY, NULL, attr_pm_resonant_clock_full_clock_sector_buffer_frequency);
-    DATABLOCK_GET_ATTR(ATTR_PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY,           NULL, attr_pm_resonant_clock_low_band_lower_frequency);
-    DATABLOCK_GET_ATTR(ATTR_PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY,           NULL, attr_pm_resonant_clock_low_band_upper_frequency);
-    DATABLOCK_GET_ATTR(ATTR_PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY,          NULL, attr_pm_resonant_clock_high_band_lower_frequency);
-    DATABLOCK_GET_ATTR(ATTR_PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY,          NULL, attr_pm_resonant_clock_high_band_upper_frequency);
+            
+    // This macro is in place to to deal with the movement of attribute placement
+    // from SYSTEM to PROC_CHIP per SW298278 hhile allowing for this procedure 
+    // to still operate in system that continue store attributes at the SYSTEM level.
+    // This is done by trying the passed target first; if it doesn't succeed, the 
+    // SYSTEM level is attempted.  Failure of both will cause a break.
+    #define DATABLOCK_GET_ATTR_CHECK_PROC(attr_name, target, attr_assign) \
+            l_rc = FAPI_ATTR_GET(attr_name, target, attr->attr_assign); \
+            if (!l_rc) { \
+                FAPI_INF("%-60s = 0x%08x %u from PROC_CHIP target", #attr_name, attr->attr_assign, attr->attr_assign); \
+            } \
+            else { \
+                FAPI_INF("Accessing %s as the passed target did not succeed.  Trying from the SYSTEM target", #attr_name); \
+                l_rc = FAPI_ATTR_GET(attr_name, NULL, attr->attr_assign); \
+                if (!l_rc) { \
+                    FAPI_INF("%-60s = 0x%08x %u from SYSTEM target", #attr_name, attr->attr_assign, attr->attr_assign); \
+                } \
+                else { \
+                    FAPI_ERR("%-60s access failed after trying both PROC_CHIP and SYSTEM targets", #attr_name ); \
+                    break; \
+                } \
+            }
+
+    DATABLOCK_GET_ATTR(ATTR_FREQ_EXT_BIAS_UP,                                     &i_target, attr_freq_ext_bias_up);
+    DATABLOCK_GET_ATTR(ATTR_FREQ_EXT_BIAS_DOWN,                                   &i_target, attr_freq_ext_bias_down);
+    DATABLOCK_GET_ATTR(ATTR_VOLTAGE_EXT_VDD_BIAS_UP,                              &i_target, attr_voltage_ext_vdd_bias_up);
+    DATABLOCK_GET_ATTR(ATTR_VOLTAGE_EXT_VCS_BIAS_UP,                              &i_target, attr_voltage_ext_vcs_bias_up);
+    DATABLOCK_GET_ATTR(ATTR_VOLTAGE_EXT_VDD_BIAS_DOWN,                            &i_target, attr_voltage_ext_vdd_bias_down);
+    DATABLOCK_GET_ATTR(ATTR_VOLTAGE_EXT_VCS_BIAS_DOWN,                            &i_target, attr_voltage_ext_vcs_bias_down);
+    DATABLOCK_GET_ATTR(ATTR_VOLTAGE_INT_VDD_BIAS_UP,                              &i_target, attr_voltage_int_vdd_bias_up);
+    DATABLOCK_GET_ATTR(ATTR_VOLTAGE_INT_VCS_BIAS_UP,                              &i_target, attr_voltage_int_vcs_bias_up);
+    DATABLOCK_GET_ATTR(ATTR_VOLTAGE_INT_VDD_BIAS_DOWN,                            &i_target, attr_voltage_int_vdd_bias_down);
+    DATABLOCK_GET_ATTR(ATTR_VOLTAGE_INT_VCS_BIAS_DOWN,                            &i_target, attr_voltage_int_vcs_bias_down);
+    DATABLOCK_GET_ATTR(ATTR_FREQ_PROC_REFCLOCK,                                   NULL,      attr_freq_proc_refclock);
+    DATABLOCK_GET_ATTR(ATTR_FREQ_CORE_MAX,                                        NULL,      attr_freq_core_max);
+    DATABLOCK_GET_ATTR(ATTR_PM_SAFE_FREQUENCY,                                    NULL,      attr_pm_safe_frequency);
+    DATABLOCK_GET_ATTR(ATTR_FREQ_CORE_FLOOR,                                      NULL,      attr_freq_core_floor);
+    DATABLOCK_GET_ATTR(ATTR_BOOT_FREQ_MHZ,                                        NULL,      attr_boot_freq_mhz);
+    DATABLOCK_GET_ATTR(ATTR_CPM_TURBO_BOOST_PERCENT,                              NULL,      attr_cpm_turbo_boost_percent);
+       
+    DATABLOCK_GET_ATTR_CHECK_PROC(ATTR_PROC_R_LOADLINE_VDD,                       &i_target, attr_proc_r_loadline_vdd);
+    DATABLOCK_GET_ATTR_CHECK_PROC(ATTR_PROC_R_LOADLINE_VCS,                       &i_target, attr_proc_r_loadline_vcs);
+    DATABLOCK_GET_ATTR_CHECK_PROC(ATTR_PROC_R_DISTLOSS_VDD,                       &i_target, attr_proc_r_distloss_vdd);
+    DATABLOCK_GET_ATTR_CHECK_PROC(ATTR_PROC_R_DISTLOSS_VCS,                       &i_target, attr_proc_r_distloss_vcs);
+    DATABLOCK_GET_ATTR_CHECK_PROC(ATTR_PROC_VRM_VOFFSET_VDD,                      &i_target, attr_proc_vrm_voffset_vdd);
+    DATABLOCK_GET_ATTR_CHECK_PROC(ATTR_PROC_VRM_VOFFSET_VCS,                      &i_target, attr_proc_vrm_voffset_vcs); 
+    
+    DATABLOCK_GET_ATTR(ATTR_PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY, NULL,      attr_pm_resonant_clock_full_clock_sector_buffer_frequency);
+    DATABLOCK_GET_ATTR(ATTR_PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY,           NULL,      attr_pm_resonant_clock_low_band_lower_frequency);
+    DATABLOCK_GET_ATTR(ATTR_PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY,           NULL,      attr_pm_resonant_clock_low_band_upper_frequency);
+    DATABLOCK_GET_ATTR(ATTR_PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY,          NULL,      attr_pm_resonant_clock_high_band_lower_frequency);
+    DATABLOCK_GET_ATTR(ATTR_PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY,          NULL,      attr_pm_resonant_clock_high_band_upper_frequency);
 
     // Read array attribute
     l_rc = FAPI_ATTR_GET(ATTR_CPM_INFLECTION_POINTS, &i_target, attr->attr_cpm_inflection_points); if (l_rc) break;
diff --git a/src/usr/hwpf/hwp/runtime_attributes/pm_plat_attributes.xml b/src/usr/hwpf/hwp/runtime_attributes/pm_plat_attributes.xml
index 7bbc61d19..e463c8e07 100644
--- a/src/usr/hwpf/hwp/runtime_attributes/pm_plat_attributes.xml
+++ b/src/usr/hwpf/hwp/runtime_attributes/pm_plat_attributes.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- OpenPOWER HostBoot Project                                             -->
 <!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2014                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2012,2015                        -->
 <!-- [+] International Business Machines Corp.                              -->
 <!--                                                                        -->
 <!--                                                                        -->
@@ -22,7 +22,7 @@
 <!-- permissions and limitations under the License.                         -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: pm_plat_attributes.xml,v 1.12 2014/07/22 18:34:52 jmcgill Exp $ -->
+<!-- $Id: pm_plat_attributes.xml,v 1.13 2015/03/12 18:02:45 stillgs Exp $ -->
 <!--
     XML file specifying Power Management HWPF attributes.
     These attributes are initialized by the platform.
@@ -307,7 +307,7 @@
   <!-- ********************************************************************* -->
   <attribute>
     <id>ATTR_PROC_R_LOADLINE_VDD</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
     <description>
       Impedance (binary microOhms) of the load line from a processor VDD VRM to the
       Processor Module pins.  This value is applied to each processor instance.
@@ -323,7 +323,7 @@
   <!-- ********************************************************************* -->
   <attribute>
     <id>ATTR_PROC_R_DISTLOSS_VDD</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
     <description>
       Impedance (binary in microOhms) of the VDD distribution loss sense point
       to the circuit. This value is applied to each processor instance.
@@ -338,7 +338,7 @@
   <!-- ********************************************************************* -->
   <attribute>
     <id>ATTR_PROC_VRM_VOFFSET_VDD</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
     <description>
       Offset voltage (binary in microvolts) to apply to the VDD VRM distribution to
       the processor module.  This value is applied to each processor instance.
@@ -353,7 +353,7 @@
     <!-- ********************************************************************* -->
   <attribute>
     <id>ATTR_PROC_R_LOADLINE_VCS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
     <description>
       Impedance (binary microOhms) of the load line from a processor VCS VRM to the
       Processor Module pins.  This value is applied to each processor instance.
@@ -368,7 +368,7 @@
   <!-- ********************************************************************* -->
   <attribute>
     <id>ATTR_PROC_R_DISTLOSS_VCS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
     <description>
       Impedance (binary in microOhms) of the VCS distribution loss sense point
       to the circuit. This value is applied to each processor instance.
@@ -383,7 +383,7 @@
   <!-- ********************************************************************* -->
   <attribute>
     <id>ATTR_PROC_VRM_VOFFSET_VCS</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
     <description>
       Offset voltage (binary in microvolts) to apply to the VCS VRM distribution to
       the processor module.  This value is applied to each processor instance.