diff options
| author | Ben Gass <bgass@us.ibm.com> | 2015-08-18 15:03:28 -0500 |
|---|---|---|
| committer | Stephen Cprek <smcprek@us.ibm.com> | 2016-02-19 17:06:52 -0600 |
| commit | 6491ee7172419c1565364217acd707acf0397f3d (patch) | |
| tree | 1b7e345e9dffe282a210ce46d3bb9b19bcf40ed0 /src | |
| parent | 4ad0f404cdd7e9c1abd6726ac3c4635773afc042 (diff) | |
| download | talos-hostboot-6491ee7172419c1565364217acd707acf0397f3d.tar.gz talos-hostboot-6491ee7172419c1565364217acd707acf0397f3d.zip | |
Generated from n10_e9024_tp023_spider_u223_01
Updates to scom address translation code were also included.
Fixes from previous builds should have been maintained.
Change-Id: If17235ff9617126468247cb9dcba336d8feb4d37
Original-Change-Id: I8063105bfad25c4ba19f8117e73ff99cdc4060a4
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19906
Tested-by: Jenkins Server
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com>
Reviewed-by: Brian Silver <bsilver@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/common/include/p9_quad_scom_addresses.H | 18686 | ||||
| -rw-r--r-- | src/import/chips/p9/common/include/p9_scom_template_consts.H | 15776 |
2 files changed, 34462 insertions, 0 deletions
diff --git a/src/import/chips/p9/common/include/p9_quad_scom_addresses.H b/src/import/chips/p9/common/include/p9_quad_scom_addresses.H new file mode 100644 index 000000000..2616c0152 --- /dev/null +++ b/src/import/chips/p9/common/include/p9_quad_scom_addresses.H @@ -0,0 +1,18686 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: chips/p9/common/include/p9_quad_scom_addresses.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* EKB Project */ +/* */ +/* COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file p9_quad_scom_addresses.H +/// @brief Defines constants for scom addresses +/// +// *HWP HWP Owner: Ben Gass <bgass@us.ibm.com> +// *HWP FW Owner: Thi Tran <thi@us.ibm.com> +// *HWP Team: SOA +// *HWP Level: 1 +// *HWP Consumed by: FSP:HB:HS:OCC:SBE:CME:SGPE:PGPE:FPPE:IPPE + +/*--------------------------------------------------------------- + * + *--------------------------------------------------------------- + * + * Issues: + * PEC Sat_id issue HW329652 + * MC regs with same address. HW323435 (matteo) + * Duplicate IOM registers. HW320456 (designers) + * OSC/perv regs same address. HW323437 + * TOD reg same address. HW323439 + * PHB registers need fixed. HW320416 ( all regs commented out now ) + * IO0 registers need fixed. HW320437 + * + * Closed + * PB.PB_PPE registers need fixed. HW320435 + * EX05 registers need fixed. HW320427 (9020) - L2 ring id's are incorrect + * IOFPPE registers need fixed. HW320424 (9020) - Investigate NULL scope + * PEC addresses are wrong. HW322598 (9020) + * MC registers need fixed. HW320433 + * VA.VA_NORTH registers need fixed. HW320436 + * + * Format: + * + * <UNIT>_<SUBUNIT>_<INSTANCE>_<REGISTER>_<ACCESS/TYPE> + * + * Notes: Subunits are only added to make names unique when + * there are name collisions. + * Only units with more than one instance has instance numbers. + * If there is only one, the instance number is omitted. + * + * Instance numbers are chiplet id's for the PERV unit. The + * chiplet id's are mapped to their name and used instead of + * instance numbers. See bellow. + * + * For registers with a single access type the type and access + * methods are omitted. + * + * For access types where all bits have the same access methods, the + * access method is appended to the name. If the access methods + * are different for some bits, the access type is appended to the + * name _SCOM instead of _RO. The _RW(X) access method is omitted + * and assumed to be default. + * + * Valid units / subunits + * PU : No unit chip level + * MCD0[0..1] : mcd subunit + * PIB2OPB[0..1] : PIB2OPB subunit + * OTPROM[0..1] : otprom subunit + * NPU : common npu subunit + * NPU[0..2] : Npu stacks 0 to 2 + * CTL : Npu CTL subunit + * DAT : Npu DAT subunit + * SM[0..3] : Npu SM subunits + * NTL[0..1] : Npu NTL subunit + * PERV : Pervasive + * FSI2PIB : subunit + * FSISHIFT : subunit + * FSII2C : subunit + * FSB : subunit + * EX : Ex unit (1/2 quad, 2 cores) + * L2 : L2 subunit + * L3 : L3 subunit + * PEC : PCI Pec unit + * STACK0 : subunit + * STACK1 : subunit + * STACK2 : subunit + * C : core + * EQ : quad + * OBUS : obus + * CAPP : capp + * MCBIST : mcbist + * MCA : mca + * NVBUS : (not implemented yet) + * PHB : (not implemented yet) + * MI : (not implemented yet) + * DMI : (not implemented yet) + * MCS : (not implemented yet) + * OCC : (not implemented yet) + * PPE : (not implemented yet) + * SBE : (not implemented yet) + * XBUS : (not implemented yet) + * + * Pervasive instance names follow chiplet id. + * + * Instance/ | Chiplet + * Chiplet | name + * -----------+----------- + * 0x00 | PIB + * 0x01 | TP + * 0x02 | N0 + * 0x03 | N1 + * 0x04 | N2 + * 0x05 | N3 + * 0x06 | XB + * 0x07 | MC01 + * 0x08 | MC23 + * 0x09 | OB0 + * 0x0A | OB1 + * 0x0B | OB2 + * 0x0C | OB3 + * 0x0D | PCI0 + * 0x0E | PCI1 + * 0x0F | PCI2 + * 0x10 | EP00 + * 0x11 | EP01 + * 0x12 | EP02 + * 0x13 | EP03 + * 0x14 | EP04 + * 0x15 | EP05 + * 0x20 | EC00 + * 0x21 | EC01 + * 0x22 | EC02 + * 0x23 | EC03 + * 0x24 | EC04 + * 0x25 | EC05 + * 0x26 | EC06 + * 0x27 | EC07 + * 0x28 | EC08 + * 0x29 | EC09 + * 0x2A | EC10 + * 0x2B | EC11 + * 0x2C | EC12 + * 0x2D | EC13 + * 0x2E | EC14 + * 0x2F | EC15 + * 0x30 | EC16 + * 0x31 | EC17 + * 0x32 | EC18 + * 0x33 | EC19 + * 0x34 | EC20 + * 0x35 | EC21 + * 0x36 | EC22 + * 0x37 | EC23 + * + * + *--------------------------------------------------------------- + * + * NOTES: + * + * there is a SPR ring that goes around the chip with an + * address(0:9)/tid(0:1) (thread id)/mfspr_data(0:63) and return mfspr_data_v/mfspr_data(0:63) + * + * Add PU_<SUBUNITS> (only if there are conflicts on these registers) + * 0x0001XXXX OTPROM + * 0x0002XXXX FSIM0 + * 0x0003XXXX FSIM1 + * 0x0004XXXX TOD + * 0x0005XXXX FSI_MBOX + * 0x0006XXXX OCI_BRIDGE + * 0x0007XXXX SPI_ADC + * 0x0008XXXX PIBMEM + * 0x0009XXXX ADU + * 0x000AXXXX I2CM + * 0x000BXXXX SBE_FIFO + * 0x000DXXXX PSU + * 0x000EXXXX SBE + * + * 0x0000100A for FSI2PIB => PERV_FSI2PIB + * 0x00000Cxx for FSISHIFT => PERV_FSISHIFT + * 0x000018xx for FSI I2C => PERV_FSII2C + * 0x000024xx for FSI SBEFIFO => PERV_FSB + * + * 0x00000400 PEEK_TABLE + * 0x00000800 FSI_SLAVE + * 0x00000C00 FSI_SHIFT + * 0x00001000 FSI2PIB + * 0x00001400 FSI_SCRATCHPAD + * 0x00001800 FSI_I2CM + * 0x00002400 FSI_SBE_FIFO + * + * address fields + * 0xCCRPxxxx + * + * CC=chiplet + * R=always 0? + * P=port + * 0=gpregs + * 1=normal unit scom ring (exclude) + * 3=clock controller + * 4=firs + * 5=cpm + * + * ============================================================================= + * Compiling + * + * Precompile the header to save time on subsquent compiles: + * g++ -I. -c scom_addresses.H + * + * Use these options to help reduce the binary size + * g++ -I. -Os -fdata-sections -ffunction-sections <file>.C -o <output> -Wl,--gc-sections + * + * + *--------------------------------------------------------------- + */ + +#include <p9_const_common.H> + + +#ifndef __P9_QUAD_SCOM_ADDRESSES_H +#define __P9_QUAD_SCOM_ADDRESSES_H + + +#include <p9_scom_template_consts.H> +#include <p9_quad_scom_addresses_fixes.H> + + +REG64( CAPP_APCFG , RULL(0x02010819), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_APCFG , RULL(0x02010819), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_APCFG , RULL(0x04010819), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_APCLCO , RULL(0x02010821), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_APCLCO , RULL(0x02010821), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_APCLCO , RULL(0x04010821), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_APCTL , RULL(0x02010818), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_APCTL , RULL(0x02010818), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_APCTL , RULL(0x04010818), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_APC_ARRY_ADDR , RULL(0x0201082A), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_APC_ARRY_ADDR , RULL(0x0201082A), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_APC_ARRY_ADDR , RULL(0x0401082A), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_APC_ARRY_RDDATA , RULL(0x0201082B), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_APC_ARRY_RDDATA , RULL(0x0201082B), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_APC_ARRY_RDDATA , RULL(0x0401082B), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_APC_ARRY_WRDATA , RULL(0x02010842), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_APC_ARRY_WRDATA , RULL(0x02010842), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_APC_ARRY_WRDATA , RULL(0x04010842), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_APC_PMUSEL , RULL(0x02010816), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_APC_PMUSEL , RULL(0x02010816), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_APC_PMUSEL , RULL(0x04010816), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_ASE_TUPLE0 , RULL(0x02010846), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_ASE_TUPLE0 , RULL(0x02010846), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_ASE_TUPLE0 , RULL(0x04010846), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_ASE_TUPLE1 , RULL(0x02010847), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_ASE_TUPLE1 , RULL(0x02010847), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_ASE_TUPLE1 , RULL(0x04010847), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_ASE_TUPLE2 , RULL(0x02010848), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_ASE_TUPLE2 , RULL(0x02010848), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_ASE_TUPLE2 , RULL(0x04010848), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_ASE_TUPLE3 , RULL(0x02010849), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_ASE_TUPLE3 , RULL(0x02010849), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_ASE_TUPLE3 , RULL(0x04010849), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( C_ASSIST_INTERRUPT_REG , RULL(0x200F0011), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_ASSIST_INTERRUPT_REG , RULL(0x200F0011), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_ASSIST_INTERRUPT_REG , RULL(0x210F0011), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_ASSIST_INTERRUPT_REG , RULL(0x220F0011), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_ASSIST_INTERRUPT_REG , RULL(0x230F0011), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_ASSIST_INTERRUPT_REG , RULL(0x240F0011), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_ASSIST_INTERRUPT_REG , RULL(0x250F0011), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_ASSIST_INTERRUPT_REG , RULL(0x260F0011), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_ASSIST_INTERRUPT_REG , RULL(0x270F0011), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_ASSIST_INTERRUPT_REG , RULL(0x280F0011), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_ASSIST_INTERRUPT_REG , RULL(0x290F0011), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_ASSIST_INTERRUPT_REG , RULL(0x2A0F0011), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_ASSIST_INTERRUPT_REG , RULL(0x2B0F0011), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_ASSIST_INTERRUPT_REG , RULL(0x2C0F0011), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_ASSIST_INTERRUPT_REG , RULL(0x2D0F0011), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_ASSIST_INTERRUPT_REG , RULL(0x2E0F0011), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_ASSIST_INTERRUPT_REG , RULL(0x2F0F0011), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_ASSIST_INTERRUPT_REG , RULL(0x300F0011), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_ASSIST_INTERRUPT_REG , RULL(0x310F0011), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_ASSIST_INTERRUPT_REG , RULL(0x320F0011), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_ASSIST_INTERRUPT_REG , RULL(0x330F0011), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_ASSIST_INTERRUPT_REG , RULL(0x340F0011), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_ASSIST_INTERRUPT_REG , RULL(0x350F0011), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_ASSIST_INTERRUPT_REG , RULL(0x360F0011), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_ASSIST_INTERRUPT_REG , RULL(0x370F0011), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_ASSIST_INTERRUPT_REG , RULL(0x100F0011), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_ASSIST_INTERRUPT_REG , RULL(0x100F0011), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_ASSIST_INTERRUPT_REG , RULL(0x110F0011), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_ASSIST_INTERRUPT_REG , RULL(0x120F0011), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_ASSIST_INTERRUPT_REG , RULL(0x130F0011), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_ASSIST_INTERRUPT_REG , RULL(0x140F0011), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_ASSIST_INTERRUPT_REG , RULL(0x150F0011), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_ASSIST_INTERRUPT_REG , RULL(0x200F0011), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0011, +REG64( EX_0_ASSIST_INTERRUPT_REG , RULL(0x200F0011), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0011, +REG64( EX_1_ASSIST_INTERRUPT_REG , RULL(0x230F0011), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0011, +REG64( EX_2_ASSIST_INTERRUPT_REG , RULL(0x240F0011), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0011, +REG64( EX_3_ASSIST_INTERRUPT_REG , RULL(0x260F0011), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0011, +REG64( EX_4_ASSIST_INTERRUPT_REG , RULL(0x280F0011), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0011, +REG64( EX_5_ASSIST_INTERRUPT_REG , RULL(0x2A0F0011), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0011, +REG64( EX_6_ASSIST_INTERRUPT_REG , RULL(0x2C0F0011), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0011, +REG64( EX_7_ASSIST_INTERRUPT_REG , RULL(0x2E0F0011), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0011, +REG64( EX_8_ASSIST_INTERRUPT_REG , RULL(0x300F0011), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0011, +REG64( EX_9_ASSIST_INTERRUPT_REG , RULL(0x320F0011), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0011, +REG64( EX_10_ASSIST_INTERRUPT_REG , RULL(0x340F0011), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0011, +REG64( EX_11_ASSIST_INTERRUPT_REG , RULL(0x360F0011), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0011, + +REG64( C_ATOMIC_LOCK_REG , RULL(0x200F03FF), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_ATOMIC_LOCK_REG , RULL(0x200F03FF), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_ATOMIC_LOCK_REG , RULL(0x210F03FF), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_ATOMIC_LOCK_REG , RULL(0x220F03FF), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_ATOMIC_LOCK_REG , RULL(0x230F03FF), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_ATOMIC_LOCK_REG , RULL(0x240F03FF), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_ATOMIC_LOCK_REG , RULL(0x250F03FF), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_ATOMIC_LOCK_REG , RULL(0x260F03FF), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_ATOMIC_LOCK_REG , RULL(0x270F03FF), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_ATOMIC_LOCK_REG , RULL(0x280F03FF), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_ATOMIC_LOCK_REG , RULL(0x290F03FF), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_ATOMIC_LOCK_REG , RULL(0x2A0F03FF), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_ATOMIC_LOCK_REG , RULL(0x2B0F03FF), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_ATOMIC_LOCK_REG , RULL(0x2C0F03FF), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_ATOMIC_LOCK_REG , RULL(0x2D0F03FF), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_ATOMIC_LOCK_REG , RULL(0x2E0F03FF), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_ATOMIC_LOCK_REG , RULL(0x2F0F03FF), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_ATOMIC_LOCK_REG , RULL(0x300F03FF), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_ATOMIC_LOCK_REG , RULL(0x310F03FF), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_ATOMIC_LOCK_REG , RULL(0x320F03FF), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_ATOMIC_LOCK_REG , RULL(0x330F03FF), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_ATOMIC_LOCK_REG , RULL(0x340F03FF), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_ATOMIC_LOCK_REG , RULL(0x350F03FF), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_ATOMIC_LOCK_REG , RULL(0x360F03FF), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_ATOMIC_LOCK_REG , RULL(0x370F03FF), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_ATOMIC_LOCK_REG , RULL(0x100F03FF), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_ATOMIC_LOCK_REG , RULL(0x100F03FF), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_ATOMIC_LOCK_REG , RULL(0x110F03FF), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_ATOMIC_LOCK_REG , RULL(0x120F03FF), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_ATOMIC_LOCK_REG , RULL(0x130F03FF), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_ATOMIC_LOCK_REG , RULL(0x140F03FF), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_ATOMIC_LOCK_REG , RULL(0x150F03FF), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_ATOMIC_LOCK_REG , RULL(0x200F03FF), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F03FF, +REG64( EX_0_ATOMIC_LOCK_REG , RULL(0x200F03FF), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F03FF, +REG64( EX_1_ATOMIC_LOCK_REG , RULL(0x230F03FF), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F03FF, +REG64( EX_2_ATOMIC_LOCK_REG , RULL(0x240F03FF), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F03FF, +REG64( EX_3_ATOMIC_LOCK_REG , RULL(0x260F03FF), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F03FF, +REG64( EX_4_ATOMIC_LOCK_REG , RULL(0x280F03FF), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F03FF, +REG64( EX_5_ATOMIC_LOCK_REG , RULL(0x2A0F03FF), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F03FF, +REG64( EX_6_ATOMIC_LOCK_REG , RULL(0x2C0F03FF), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F03FF, +REG64( EX_7_ATOMIC_LOCK_REG , RULL(0x2E0F03FF), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F03FF, +REG64( EX_8_ATOMIC_LOCK_REG , RULL(0x300F03FF), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F03FF, +REG64( EX_9_ATOMIC_LOCK_REG , RULL(0x320F03FF), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F03FF, +REG64( EX_10_ATOMIC_LOCK_REG , RULL(0x340F03FF), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F03FF, +REG64( EX_11_ATOMIC_LOCK_REG , RULL(0x360F03FF), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F03FF, + +REG64( C_ATTN_INTERRUPT_REG , RULL(0x200F001A), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_ATTN_INTERRUPT_REG , RULL(0x200F001A), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_ATTN_INTERRUPT_REG , RULL(0x210F001A), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_ATTN_INTERRUPT_REG , RULL(0x220F001A), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_ATTN_INTERRUPT_REG , RULL(0x230F001A), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_ATTN_INTERRUPT_REG , RULL(0x240F001A), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_ATTN_INTERRUPT_REG , RULL(0x250F001A), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_ATTN_INTERRUPT_REG , RULL(0x260F001A), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_ATTN_INTERRUPT_REG , RULL(0x270F001A), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_ATTN_INTERRUPT_REG , RULL(0x280F001A), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_ATTN_INTERRUPT_REG , RULL(0x290F001A), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_ATTN_INTERRUPT_REG , RULL(0x2A0F001A), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_ATTN_INTERRUPT_REG , RULL(0x2B0F001A), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_ATTN_INTERRUPT_REG , RULL(0x2C0F001A), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_ATTN_INTERRUPT_REG , RULL(0x2D0F001A), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_ATTN_INTERRUPT_REG , RULL(0x2E0F001A), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_ATTN_INTERRUPT_REG , RULL(0x2F0F001A), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_ATTN_INTERRUPT_REG , RULL(0x300F001A), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_ATTN_INTERRUPT_REG , RULL(0x310F001A), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_ATTN_INTERRUPT_REG , RULL(0x320F001A), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_ATTN_INTERRUPT_REG , RULL(0x330F001A), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_ATTN_INTERRUPT_REG , RULL(0x340F001A), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_ATTN_INTERRUPT_REG , RULL(0x350F001A), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_ATTN_INTERRUPT_REG , RULL(0x360F001A), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_ATTN_INTERRUPT_REG , RULL(0x370F001A), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_ATTN_INTERRUPT_REG , RULL(0x100F001A), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_ATTN_INTERRUPT_REG , RULL(0x100F001A), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_ATTN_INTERRUPT_REG , RULL(0x110F001A), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_ATTN_INTERRUPT_REG , RULL(0x120F001A), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_ATTN_INTERRUPT_REG , RULL(0x130F001A), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_ATTN_INTERRUPT_REG , RULL(0x140F001A), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_ATTN_INTERRUPT_REG , RULL(0x150F001A), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_ATTN_INTERRUPT_REG , RULL(0x200F001A), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F001A, +REG64( EX_0_ATTN_INTERRUPT_REG , RULL(0x200F001A), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F001A, +REG64( EX_1_ATTN_INTERRUPT_REG , RULL(0x230F001A), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F001A, +REG64( EX_2_ATTN_INTERRUPT_REG , RULL(0x240F001A), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F001A, +REG64( EX_3_ATTN_INTERRUPT_REG , RULL(0x260F001A), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F001A, +REG64( EX_4_ATTN_INTERRUPT_REG , RULL(0x280F001A), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F001A, +REG64( EX_5_ATTN_INTERRUPT_REG , RULL(0x2A0F001A), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F001A, +REG64( EX_6_ATTN_INTERRUPT_REG , RULL(0x2C0F001A), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F001A, +REG64( EX_7_ATTN_INTERRUPT_REG , RULL(0x2E0F001A), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F001A, +REG64( EX_8_ATTN_INTERRUPT_REG , RULL(0x300F001A), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F001A, +REG64( EX_9_ATTN_INTERRUPT_REG , RULL(0x320F001A), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F001A, +REG64( EX_10_ATTN_INTERRUPT_REG , RULL(0x340F001A), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F001A, +REG64( EX_11_ATTN_INTERRUPT_REG , RULL(0x360F001A), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F001A, + +REG64( C_BIST , RULL(0x2003000B), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_BIST , RULL(0x2003000B), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_BIST , RULL(0x2103000B), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_BIST , RULL(0x2203000B), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_BIST , RULL(0x2303000B), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_BIST , RULL(0x2403000B), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_BIST , RULL(0x2503000B), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_BIST , RULL(0x2603000B), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_BIST , RULL(0x2703000B), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_BIST , RULL(0x2803000B), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_BIST , RULL(0x2903000B), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_BIST , RULL(0x2A03000B), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_BIST , RULL(0x2B03000B), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_BIST , RULL(0x2C03000B), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_BIST , RULL(0x2D03000B), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_BIST , RULL(0x2E03000B), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_BIST , RULL(0x2F03000B), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_BIST , RULL(0x3003000B), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_BIST , RULL(0x3103000B), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_BIST , RULL(0x3203000B), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_BIST , RULL(0x3303000B), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_BIST , RULL(0x3403000B), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_BIST , RULL(0x3503000B), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_BIST , RULL(0x3603000B), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_BIST , RULL(0x3703000B), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_BIST , RULL(0x1003000B), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_BIST , RULL(0x1003000B), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_BIST , RULL(0x1103000B), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_BIST , RULL(0x1203000B), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_BIST , RULL(0x1303000B), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_BIST , RULL(0x1403000B), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_BIST , RULL(0x1503000B), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_BIST , RULL(0x2003000B), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 2103000B, +REG64( EX_0_BIST , RULL(0x2003000B), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 2103000B, +REG64( EX_1_BIST , RULL(0x2203000B), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 2303000B, +REG64( EX_2_BIST , RULL(0x2403000B), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 2503000B, +REG64( EX_3_BIST , RULL(0x2603000B), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 2703000B, +REG64( EX_4_BIST , RULL(0x2803000B), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 2903000B, +REG64( EX_5_BIST , RULL(0x2A03000B), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B03000B, +REG64( EX_6_BIST , RULL(0x2C03000B), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D03000B, +REG64( EX_7_BIST , RULL(0x2E03000B), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F03000B, +REG64( EX_8_BIST , RULL(0x3003000B), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 3103000B, +REG64( EX_9_BIST , RULL(0x3203000B), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 3303000B, +REG64( EX_10_BIST , RULL(0x3403000B), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 3503000B, +REG64( EX_11_BIST , RULL(0x3603000B), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 3703000B, + +REG64( CAPP_CAPP_EPOCH_AND_RECOVERY_TMR_CONTROL , RULL(0x0201082C), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_CAPP_EPOCH_AND_RECOVERY_TMR_CONTROL , RULL(0x0201082C), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_CAPP_EPOCH_AND_RECOVERY_TMR_CONTROL , RULL(0x0401082C), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_CAPP_ERR_STATUS_CONTROL , RULL(0x0201080E), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_CAPP_ERR_STATUS_CONTROL , RULL(0x0201080E), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_CAPP_ERR_STATUS_CONTROL , RULL(0x0401080E), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( C_CC_ATOMIC_LOCK_REG , RULL(0x200303FF), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_CC_ATOMIC_LOCK_REG , RULL(0x200303FF), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_CC_ATOMIC_LOCK_REG , RULL(0x210303FF), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_CC_ATOMIC_LOCK_REG , RULL(0x220303FF), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_CC_ATOMIC_LOCK_REG , RULL(0x230303FF), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_CC_ATOMIC_LOCK_REG , RULL(0x240303FF), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_CC_ATOMIC_LOCK_REG , RULL(0x250303FF), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_CC_ATOMIC_LOCK_REG , RULL(0x260303FF), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_CC_ATOMIC_LOCK_REG , RULL(0x270303FF), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_CC_ATOMIC_LOCK_REG , RULL(0x280303FF), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_CC_ATOMIC_LOCK_REG , RULL(0x290303FF), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_CC_ATOMIC_LOCK_REG , RULL(0x2A0303FF), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_CC_ATOMIC_LOCK_REG , RULL(0x2B0303FF), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_CC_ATOMIC_LOCK_REG , RULL(0x2C0303FF), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_CC_ATOMIC_LOCK_REG , RULL(0x2D0303FF), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_CC_ATOMIC_LOCK_REG , RULL(0x2E0303FF), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_CC_ATOMIC_LOCK_REG , RULL(0x2F0303FF), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_CC_ATOMIC_LOCK_REG , RULL(0x300303FF), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_CC_ATOMIC_LOCK_REG , RULL(0x310303FF), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_CC_ATOMIC_LOCK_REG , RULL(0x320303FF), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_CC_ATOMIC_LOCK_REG , RULL(0x330303FF), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_CC_ATOMIC_LOCK_REG , RULL(0x340303FF), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_CC_ATOMIC_LOCK_REG , RULL(0x350303FF), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_CC_ATOMIC_LOCK_REG , RULL(0x360303FF), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_CC_ATOMIC_LOCK_REG , RULL(0x370303FF), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_CC_ATOMIC_LOCK_REG , RULL(0x100303FF), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_CC_ATOMIC_LOCK_REG , RULL(0x100303FF), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_CC_ATOMIC_LOCK_REG , RULL(0x110303FF), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_CC_ATOMIC_LOCK_REG , RULL(0x120303FF), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_CC_ATOMIC_LOCK_REG , RULL(0x130303FF), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_CC_ATOMIC_LOCK_REG , RULL(0x140303FF), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_CC_ATOMIC_LOCK_REG , RULL(0x150303FF), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_CC_ATOMIC_LOCK_REG , RULL(0x200303FF), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210303FF, +REG64( EX_0_CC_ATOMIC_LOCK_REG , RULL(0x200303FF), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210303FF, +REG64( EX_1_CC_ATOMIC_LOCK_REG , RULL(0x220303FF), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 230303FF, +REG64( EX_2_CC_ATOMIC_LOCK_REG , RULL(0x240303FF), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250303FF, +REG64( EX_3_CC_ATOMIC_LOCK_REG , RULL(0x260303FF), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270303FF, +REG64( EX_4_CC_ATOMIC_LOCK_REG , RULL(0x280303FF), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290303FF, +REG64( EX_5_CC_ATOMIC_LOCK_REG , RULL(0x2A0303FF), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0303FF, +REG64( EX_6_CC_ATOMIC_LOCK_REG , RULL(0x2C0303FF), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0303FF, +REG64( EX_7_CC_ATOMIC_LOCK_REG , RULL(0x2E0303FF), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0303FF, +REG64( EX_8_CC_ATOMIC_LOCK_REG , RULL(0x300303FF), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310303FF, +REG64( EX_9_CC_ATOMIC_LOCK_REG , RULL(0x320303FF), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330303FF, +REG64( EX_10_CC_ATOMIC_LOCK_REG , RULL(0x340303FF), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350303FF, +REG64( EX_11_CC_ATOMIC_LOCK_REG , RULL(0x360303FF), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370303FF, + +REG64( C_CC_PROTECT_MODE_REG , RULL(0x200303FE), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_CC_PROTECT_MODE_REG , RULL(0x200303FE), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_CC_PROTECT_MODE_REG , RULL(0x210303FE), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_CC_PROTECT_MODE_REG , RULL(0x220303FE), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_CC_PROTECT_MODE_REG , RULL(0x230303FE), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_CC_PROTECT_MODE_REG , RULL(0x240303FE), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_CC_PROTECT_MODE_REG , RULL(0x250303FE), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_CC_PROTECT_MODE_REG , RULL(0x260303FE), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_CC_PROTECT_MODE_REG , RULL(0x270303FE), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_CC_PROTECT_MODE_REG , RULL(0x280303FE), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_CC_PROTECT_MODE_REG , RULL(0x290303FE), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_CC_PROTECT_MODE_REG , RULL(0x2A0303FE), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_CC_PROTECT_MODE_REG , RULL(0x2B0303FE), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_CC_PROTECT_MODE_REG , RULL(0x2C0303FE), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_CC_PROTECT_MODE_REG , RULL(0x2D0303FE), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_CC_PROTECT_MODE_REG , RULL(0x2E0303FE), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_CC_PROTECT_MODE_REG , RULL(0x2F0303FE), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_CC_PROTECT_MODE_REG , RULL(0x300303FE), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_CC_PROTECT_MODE_REG , RULL(0x310303FE), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_CC_PROTECT_MODE_REG , RULL(0x320303FE), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_CC_PROTECT_MODE_REG , RULL(0x330303FE), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_CC_PROTECT_MODE_REG , RULL(0x340303FE), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_CC_PROTECT_MODE_REG , RULL(0x350303FE), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_CC_PROTECT_MODE_REG , RULL(0x360303FE), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_CC_PROTECT_MODE_REG , RULL(0x370303FE), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_CC_PROTECT_MODE_REG , RULL(0x100303FE), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_CC_PROTECT_MODE_REG , RULL(0x100303FE), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_CC_PROTECT_MODE_REG , RULL(0x110303FE), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_CC_PROTECT_MODE_REG , RULL(0x120303FE), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_CC_PROTECT_MODE_REG , RULL(0x130303FE), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_CC_PROTECT_MODE_REG , RULL(0x140303FE), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_CC_PROTECT_MODE_REG , RULL(0x150303FE), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_CC_PROTECT_MODE_REG , RULL(0x200303FE), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210303FE, +REG64( EX_0_CC_PROTECT_MODE_REG , RULL(0x200303FE), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210303FE, +REG64( EX_1_CC_PROTECT_MODE_REG , RULL(0x220303FE), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 230303FE, +REG64( EX_2_CC_PROTECT_MODE_REG , RULL(0x240303FE), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250303FE, +REG64( EX_3_CC_PROTECT_MODE_REG , RULL(0x260303FE), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270303FE, +REG64( EX_4_CC_PROTECT_MODE_REG , RULL(0x280303FE), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290303FE, +REG64( EX_5_CC_PROTECT_MODE_REG , RULL(0x2A0303FE), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0303FE, +REG64( EX_6_CC_PROTECT_MODE_REG , RULL(0x2C0303FE), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0303FE, +REG64( EX_7_CC_PROTECT_MODE_REG , RULL(0x2E0303FE), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0303FE, +REG64( EX_8_CC_PROTECT_MODE_REG , RULL(0x300303FE), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310303FE, +REG64( EX_9_CC_PROTECT_MODE_REG , RULL(0x320303FE), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330303FE, +REG64( EX_10_CC_PROTECT_MODE_REG , RULL(0x340303FE), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350303FE, +REG64( EX_11_CC_PROTECT_MODE_REG , RULL(0x360303FE), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370303FE, + +REG64( C_CLK_REGION , RULL(0x20030006), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_CLK_REGION , RULL(0x20030006), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_CLK_REGION , RULL(0x21030006), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_CLK_REGION , RULL(0x22030006), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_CLK_REGION , RULL(0x23030006), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_CLK_REGION , RULL(0x24030006), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_CLK_REGION , RULL(0x25030006), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_CLK_REGION , RULL(0x26030006), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_CLK_REGION , RULL(0x27030006), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_CLK_REGION , RULL(0x28030006), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_CLK_REGION , RULL(0x29030006), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_CLK_REGION , RULL(0x2A030006), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_CLK_REGION , RULL(0x2B030006), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_CLK_REGION , RULL(0x2C030006), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_CLK_REGION , RULL(0x2D030006), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_CLK_REGION , RULL(0x2E030006), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_CLK_REGION , RULL(0x2F030006), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_CLK_REGION , RULL(0x30030006), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_CLK_REGION , RULL(0x31030006), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_CLK_REGION , RULL(0x32030006), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_CLK_REGION , RULL(0x33030006), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_CLK_REGION , RULL(0x34030006), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_CLK_REGION , RULL(0x35030006), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_CLK_REGION , RULL(0x36030006), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_CLK_REGION , RULL(0x37030006), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_CLK_REGION , RULL(0x10030006), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_CLK_REGION , RULL(0x10030006), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_CLK_REGION , RULL(0x11030006), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_CLK_REGION , RULL(0x12030006), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_CLK_REGION , RULL(0x13030006), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_CLK_REGION , RULL(0x14030006), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_CLK_REGION , RULL(0x15030006), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_CLK_REGION , RULL(0x20030006), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21030006, +REG64( EX_0_CLK_REGION , RULL(0x20030006), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21030006, +REG64( EX_1_CLK_REGION , RULL(0x22030006), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23030006, +REG64( EX_2_CLK_REGION , RULL(0x24030006), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25030006, +REG64( EX_3_CLK_REGION , RULL(0x26030006), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27030006, +REG64( EX_4_CLK_REGION , RULL(0x28030006), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29030006, +REG64( EX_5_CLK_REGION , RULL(0x2A030006), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B030006, +REG64( EX_6_CLK_REGION , RULL(0x2C030006), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D030006, +REG64( EX_7_CLK_REGION , RULL(0x2E030006), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F030006, +REG64( EX_8_CLK_REGION , RULL(0x30030006), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31030006, +REG64( EX_9_CLK_REGION , RULL(0x32030006), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33030006, +REG64( EX_10_CLK_REGION , RULL(0x34030006), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35030006, +REG64( EX_11_CLK_REGION , RULL(0x36030006), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37030006, + +REG64( C_CLOCK_STAT_ARY , RULL(0x2003000A), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_CLOCK_STAT_ARY , RULL(0x2003000A), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_CLOCK_STAT_ARY , RULL(0x2103000A), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_CLOCK_STAT_ARY , RULL(0x2203000A), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_CLOCK_STAT_ARY , RULL(0x2303000A), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_CLOCK_STAT_ARY , RULL(0x2403000A), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_CLOCK_STAT_ARY , RULL(0x2503000A), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_CLOCK_STAT_ARY , RULL(0x2603000A), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_CLOCK_STAT_ARY , RULL(0x2703000A), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_CLOCK_STAT_ARY , RULL(0x2803000A), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_CLOCK_STAT_ARY , RULL(0x2903000A), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_CLOCK_STAT_ARY , RULL(0x2A03000A), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_CLOCK_STAT_ARY , RULL(0x2B03000A), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_CLOCK_STAT_ARY , RULL(0x2C03000A), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_CLOCK_STAT_ARY , RULL(0x2D03000A), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_CLOCK_STAT_ARY , RULL(0x2E03000A), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_CLOCK_STAT_ARY , RULL(0x2F03000A), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_CLOCK_STAT_ARY , RULL(0x3003000A), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_CLOCK_STAT_ARY , RULL(0x3103000A), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_CLOCK_STAT_ARY , RULL(0x3203000A), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_CLOCK_STAT_ARY , RULL(0x3303000A), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_CLOCK_STAT_ARY , RULL(0x3403000A), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_CLOCK_STAT_ARY , RULL(0x3503000A), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_CLOCK_STAT_ARY , RULL(0x3603000A), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_CLOCK_STAT_ARY , RULL(0x3703000A), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_CLOCK_STAT_ARY , RULL(0x1003000A), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_CLOCK_STAT_ARY , RULL(0x1003000A), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_CLOCK_STAT_ARY , RULL(0x1103000A), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_CLOCK_STAT_ARY , RULL(0x1203000A), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_CLOCK_STAT_ARY , RULL(0x1303000A), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_CLOCK_STAT_ARY , RULL(0x1403000A), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_CLOCK_STAT_ARY , RULL(0x1503000A), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_CLOCK_STAT_ARY , RULL(0x2003000A), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 2103000A, +REG64( EX_0_CLOCK_STAT_ARY , RULL(0x2003000A), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 2103000A, +REG64( EX_1_CLOCK_STAT_ARY , RULL(0x2203000A), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 2303000A, +REG64( EX_2_CLOCK_STAT_ARY , RULL(0x2403000A), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 2503000A, +REG64( EX_3_CLOCK_STAT_ARY , RULL(0x2603000A), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 2703000A, +REG64( EX_4_CLOCK_STAT_ARY , RULL(0x2803000A), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 2903000A, +REG64( EX_5_CLOCK_STAT_ARY , RULL(0x2A03000A), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B03000A, +REG64( EX_6_CLOCK_STAT_ARY , RULL(0x2C03000A), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D03000A, +REG64( EX_7_CLOCK_STAT_ARY , RULL(0x2E03000A), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F03000A, +REG64( EX_8_CLOCK_STAT_ARY , RULL(0x3003000A), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 3103000A, +REG64( EX_9_CLOCK_STAT_ARY , RULL(0x3203000A), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 3303000A, +REG64( EX_10_CLOCK_STAT_ARY , RULL(0x3403000A), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 3503000A, +REG64( EX_11_CLOCK_STAT_ARY , RULL(0x3603000A), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 3703000A, + +REG64( C_CLOCK_STAT_NSL , RULL(0x20030009), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_CLOCK_STAT_NSL , RULL(0x20030009), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_CLOCK_STAT_NSL , RULL(0x21030009), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_CLOCK_STAT_NSL , RULL(0x22030009), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_CLOCK_STAT_NSL , RULL(0x23030009), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_CLOCK_STAT_NSL , RULL(0x24030009), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_CLOCK_STAT_NSL , RULL(0x25030009), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_CLOCK_STAT_NSL , RULL(0x26030009), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_CLOCK_STAT_NSL , RULL(0x27030009), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_CLOCK_STAT_NSL , RULL(0x28030009), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_CLOCK_STAT_NSL , RULL(0x29030009), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_CLOCK_STAT_NSL , RULL(0x2A030009), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_CLOCK_STAT_NSL , RULL(0x2B030009), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_CLOCK_STAT_NSL , RULL(0x2C030009), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_CLOCK_STAT_NSL , RULL(0x2D030009), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_CLOCK_STAT_NSL , RULL(0x2E030009), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_CLOCK_STAT_NSL , RULL(0x2F030009), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_CLOCK_STAT_NSL , RULL(0x30030009), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_CLOCK_STAT_NSL , RULL(0x31030009), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_CLOCK_STAT_NSL , RULL(0x32030009), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_CLOCK_STAT_NSL , RULL(0x33030009), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_CLOCK_STAT_NSL , RULL(0x34030009), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_CLOCK_STAT_NSL , RULL(0x35030009), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_CLOCK_STAT_NSL , RULL(0x36030009), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_CLOCK_STAT_NSL , RULL(0x37030009), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_CLOCK_STAT_NSL , RULL(0x10030009), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_CLOCK_STAT_NSL , RULL(0x10030009), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_CLOCK_STAT_NSL , RULL(0x11030009), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_CLOCK_STAT_NSL , RULL(0x12030009), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_CLOCK_STAT_NSL , RULL(0x13030009), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_CLOCK_STAT_NSL , RULL(0x14030009), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_CLOCK_STAT_NSL , RULL(0x15030009), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_CLOCK_STAT_NSL , RULL(0x20030009), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21030009, +REG64( EX_0_CLOCK_STAT_NSL , RULL(0x20030009), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21030009, +REG64( EX_1_CLOCK_STAT_NSL , RULL(0x22030009), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23030009, +REG64( EX_2_CLOCK_STAT_NSL , RULL(0x24030009), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25030009, +REG64( EX_3_CLOCK_STAT_NSL , RULL(0x26030009), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27030009, +REG64( EX_4_CLOCK_STAT_NSL , RULL(0x28030009), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29030009, +REG64( EX_5_CLOCK_STAT_NSL , RULL(0x2A030009), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B030009, +REG64( EX_6_CLOCK_STAT_NSL , RULL(0x2C030009), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D030009, +REG64( EX_7_CLOCK_STAT_NSL , RULL(0x2E030009), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F030009, +REG64( EX_8_CLOCK_STAT_NSL , RULL(0x30030009), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31030009, +REG64( EX_9_CLOCK_STAT_NSL , RULL(0x32030009), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33030009, +REG64( EX_10_CLOCK_STAT_NSL , RULL(0x34030009), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35030009, +REG64( EX_11_CLOCK_STAT_NSL , RULL(0x36030009), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37030009, + +REG64( C_CLOCK_STAT_SL , RULL(0x20030008), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_CLOCK_STAT_SL , RULL(0x20030008), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_CLOCK_STAT_SL , RULL(0x21030008), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_CLOCK_STAT_SL , RULL(0x22030008), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_CLOCK_STAT_SL , RULL(0x23030008), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_CLOCK_STAT_SL , RULL(0x24030008), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_CLOCK_STAT_SL , RULL(0x25030008), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_CLOCK_STAT_SL , RULL(0x26030008), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_CLOCK_STAT_SL , RULL(0x27030008), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_CLOCK_STAT_SL , RULL(0x28030008), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_CLOCK_STAT_SL , RULL(0x29030008), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_CLOCK_STAT_SL , RULL(0x2A030008), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_CLOCK_STAT_SL , RULL(0x2B030008), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_CLOCK_STAT_SL , RULL(0x2C030008), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_CLOCK_STAT_SL , RULL(0x2D030008), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_CLOCK_STAT_SL , RULL(0x2E030008), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_CLOCK_STAT_SL , RULL(0x2F030008), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_CLOCK_STAT_SL , RULL(0x30030008), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_CLOCK_STAT_SL , RULL(0x31030008), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_CLOCK_STAT_SL , RULL(0x32030008), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_CLOCK_STAT_SL , RULL(0x33030008), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_CLOCK_STAT_SL , RULL(0x34030008), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_CLOCK_STAT_SL , RULL(0x35030008), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_CLOCK_STAT_SL , RULL(0x36030008), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_CLOCK_STAT_SL , RULL(0x37030008), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_CLOCK_STAT_SL , RULL(0x10030008), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_CLOCK_STAT_SL , RULL(0x10030008), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_CLOCK_STAT_SL , RULL(0x11030008), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_CLOCK_STAT_SL , RULL(0x12030008), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_CLOCK_STAT_SL , RULL(0x13030008), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_CLOCK_STAT_SL , RULL(0x14030008), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_CLOCK_STAT_SL , RULL(0x15030008), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_CLOCK_STAT_SL , RULL(0x20030008), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21030008, +REG64( EX_0_CLOCK_STAT_SL , RULL(0x20030008), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21030008, +REG64( EX_1_CLOCK_STAT_SL , RULL(0x22030008), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23030008, +REG64( EX_2_CLOCK_STAT_SL , RULL(0x24030008), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25030008, +REG64( EX_3_CLOCK_STAT_SL , RULL(0x26030008), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27030008, +REG64( EX_4_CLOCK_STAT_SL , RULL(0x28030008), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29030008, +REG64( EX_5_CLOCK_STAT_SL , RULL(0x2A030008), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B030008, +REG64( EX_6_CLOCK_STAT_SL , RULL(0x2C030008), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D030008, +REG64( EX_7_CLOCK_STAT_SL , RULL(0x2E030008), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F030008, +REG64( EX_8_CLOCK_STAT_SL , RULL(0x30030008), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31030008, +REG64( EX_9_CLOCK_STAT_SL , RULL(0x32030008), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33030008, +REG64( EX_10_CLOCK_STAT_SL , RULL(0x34030008), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35030008, +REG64( EX_11_CLOCK_STAT_SL , RULL(0x36030008), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37030008, + +REG64( EQ_CME_LCL_EIMR , RULL(0x10012826), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 10012426, +REG64( EQ_0_CME_LCL_EIMR , RULL(0x10012826), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 10012426, +REG64( EQ_1_CME_LCL_EIMR , RULL(0x11012826), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 11012426, +REG64( EQ_2_CME_LCL_EIMR , RULL(0x12012826), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 12012426, +REG64( EQ_3_CME_LCL_EIMR , RULL(0x13012826), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 13012426, +REG64( EQ_4_CME_LCL_EIMR , RULL(0x14012826), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 14012426, +REG64( EQ_5_CME_LCL_EIMR , RULL(0x15012826), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 15012426, +REG64( EX_CME_LCL_EIMR , RULL(0x10012426), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_CME_LCL_EIMR , RULL(0x10012426), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_CME_LCL_EIMR , RULL(0x10012826), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_CME_LCL_EIMR , RULL(0x11012426), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_CME_LCL_EIMR , RULL(0x11012826), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_CME_LCL_EIMR , RULL(0x12012426), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_CME_LCL_EIMR , RULL(0x12012826), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_CME_LCL_EIMR , RULL(0x13012426), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_CME_LCL_EIMR , RULL(0x13012826), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_CME_LCL_EIMR , RULL(0x14012426), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_CME_LCL_EIMR , RULL(0x14012826), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_CME_LCL_EIMR , RULL(0x15012426), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_CME_LCL_EIMR , RULL(0x15012826), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_CME_LCL_EINR , RULL(0x1001282A), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 1001242A, +REG64( EQ_0_CME_LCL_EINR , RULL(0x1001282A), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 1001242A, +REG64( EQ_1_CME_LCL_EINR , RULL(0x1101282A), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 1101242A, +REG64( EQ_2_CME_LCL_EINR , RULL(0x1201282A), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 1201242A, +REG64( EQ_3_CME_LCL_EINR , RULL(0x1301282A), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 1301242A, +REG64( EQ_4_CME_LCL_EINR , RULL(0x1401282A), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 1401242A, +REG64( EQ_5_CME_LCL_EINR , RULL(0x1501282A), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 1501242A, +REG64( EX_CME_LCL_EINR , RULL(0x1001242A), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_CME_LCL_EINR , RULL(0x1001242A), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_CME_LCL_EINR , RULL(0x1001282A), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_CME_LCL_EINR , RULL(0x1101242A), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_CME_LCL_EINR , RULL(0x1101282A), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_CME_LCL_EINR , RULL(0x1201242A), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_CME_LCL_EINR , RULL(0x1201282A), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_CME_LCL_EINR , RULL(0x1301242A), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_CME_LCL_EINR , RULL(0x1301282A), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_CME_LCL_EINR , RULL(0x1401242A), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_CME_LCL_EINR , RULL(0x1401282A), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_CME_LCL_EINR , RULL(0x1501242A), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_CME_LCL_EINR , RULL(0x1501282A), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_CME_LCL_EIPR , RULL(0x10012827), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 10012427, +REG64( EQ_0_CME_LCL_EIPR , RULL(0x10012827), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 10012427, +REG64( EQ_1_CME_LCL_EIPR , RULL(0x11012827), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 11012427, +REG64( EQ_2_CME_LCL_EIPR , RULL(0x12012827), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 12012427, +REG64( EQ_3_CME_LCL_EIPR , RULL(0x13012827), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 13012427, +REG64( EQ_4_CME_LCL_EIPR , RULL(0x14012827), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 14012427, +REG64( EQ_5_CME_LCL_EIPR , RULL(0x15012827), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 15012427, +REG64( EX_CME_LCL_EIPR , RULL(0x10012427), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_CME_LCL_EIPR , RULL(0x10012427), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_CME_LCL_EIPR , RULL(0x10012827), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_CME_LCL_EIPR , RULL(0x11012427), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_CME_LCL_EIPR , RULL(0x11012827), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_CME_LCL_EIPR , RULL(0x12012427), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_CME_LCL_EIPR , RULL(0x12012827), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_CME_LCL_EIPR , RULL(0x13012427), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_CME_LCL_EIPR , RULL(0x13012827), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_CME_LCL_EIPR , RULL(0x14012427), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_CME_LCL_EIPR , RULL(0x14012827), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_CME_LCL_EIPR , RULL(0x15012427), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_CME_LCL_EIPR , RULL(0x15012827), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_CME_LCL_EISTR , RULL(0x10012829), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 10012429, +REG64( EQ_0_CME_LCL_EISTR , RULL(0x10012829), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 10012429, +REG64( EQ_1_CME_LCL_EISTR , RULL(0x11012829), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 11012429, +REG64( EQ_2_CME_LCL_EISTR , RULL(0x12012829), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 12012429, +REG64( EQ_3_CME_LCL_EISTR , RULL(0x13012829), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 13012429, +REG64( EQ_4_CME_LCL_EISTR , RULL(0x14012829), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 14012429, +REG64( EQ_5_CME_LCL_EISTR , RULL(0x15012829), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 15012429, +REG64( EX_CME_LCL_EISTR , RULL(0x10012429), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_CME_LCL_EISTR , RULL(0x10012429), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_CME_LCL_EISTR , RULL(0x10012829), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_CME_LCL_EISTR , RULL(0x11012429), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_CME_LCL_EISTR , RULL(0x11012829), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_CME_LCL_EISTR , RULL(0x12012429), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_CME_LCL_EISTR , RULL(0x12012829), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_CME_LCL_EISTR , RULL(0x13012429), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_CME_LCL_EISTR , RULL(0x13012829), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_CME_LCL_EISTR , RULL(0x14012429), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_CME_LCL_EISTR , RULL(0x14012829), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_CME_LCL_EISTR , RULL(0x15012429), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_CME_LCL_EISTR , RULL(0x15012829), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_CME_LCL_EITR , RULL(0x10012828), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 10012428, +REG64( EQ_0_CME_LCL_EITR , RULL(0x10012828), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 10012428, +REG64( EQ_1_CME_LCL_EITR , RULL(0x11012828), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 11012428, +REG64( EQ_2_CME_LCL_EITR , RULL(0x12012828), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 12012428, +REG64( EQ_3_CME_LCL_EITR , RULL(0x13012828), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 13012428, +REG64( EQ_4_CME_LCL_EITR , RULL(0x14012828), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 14012428, +REG64( EQ_5_CME_LCL_EITR , RULL(0x15012828), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 15012428, +REG64( EX_CME_LCL_EITR , RULL(0x10012428), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_CME_LCL_EITR , RULL(0x10012428), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_CME_LCL_EITR , RULL(0x10012828), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_CME_LCL_EITR , RULL(0x11012428), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_CME_LCL_EITR , RULL(0x11012828), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_CME_LCL_EITR , RULL(0x12012428), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_CME_LCL_EITR , RULL(0x12012828), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_CME_LCL_EITR , RULL(0x13012428), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_CME_LCL_EITR , RULL(0x13012828), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_CME_LCL_EITR , RULL(0x14012428), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_CME_LCL_EITR , RULL(0x14012828), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_CME_LCL_EITR , RULL(0x15012428), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_CME_LCL_EITR , RULL(0x15012828), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_CME_LCL_ICRR , RULL(0x1001282C), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 1001242C, +REG64( EQ_0_CME_LCL_ICRR , RULL(0x1001282C), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 1001242C, +REG64( EQ_1_CME_LCL_ICRR , RULL(0x1101282C), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 1101242C, +REG64( EQ_2_CME_LCL_ICRR , RULL(0x1201282C), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 1201242C, +REG64( EQ_3_CME_LCL_ICRR , RULL(0x1301282C), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 1301242C, +REG64( EQ_4_CME_LCL_ICRR , RULL(0x1401282C), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 1401242C, +REG64( EQ_5_CME_LCL_ICRR , RULL(0x1501282C), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 1501242C, +REG64( EX_CME_LCL_ICRR , RULL(0x1001242C), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_CME_LCL_ICRR , RULL(0x1001242C), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_CME_LCL_ICRR , RULL(0x1001282C), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_CME_LCL_ICRR , RULL(0x1101242C), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_CME_LCL_ICRR , RULL(0x1101282C), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_CME_LCL_ICRR , RULL(0x1201242C), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_CME_LCL_ICRR , RULL(0x1201282C), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_CME_LCL_ICRR , RULL(0x1301242C), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_CME_LCL_ICRR , RULL(0x1301282C), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_CME_LCL_ICRR , RULL(0x1401242C), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_CME_LCL_ICRR , RULL(0x1401282C), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_CME_LCL_ICRR , RULL(0x1501242C), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_CME_LCL_ICRR , RULL(0x1501282C), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_CME_LCL_SISR , RULL(0x1001282B), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 1001242B, +REG64( EQ_0_CME_LCL_SISR , RULL(0x1001282B), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 1001242B, +REG64( EQ_1_CME_LCL_SISR , RULL(0x1101282B), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 1101242B, +REG64( EQ_2_CME_LCL_SISR , RULL(0x1201282B), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 1201242B, +REG64( EQ_3_CME_LCL_SISR , RULL(0x1301282B), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 1301242B, +REG64( EQ_4_CME_LCL_SISR , RULL(0x1401282B), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 1401242B, +REG64( EQ_5_CME_LCL_SISR , RULL(0x1501282B), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 1501242B, +REG64( EX_CME_LCL_SISR , RULL(0x1001242B), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_CME_LCL_SISR , RULL(0x1001242B), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_CME_LCL_SISR , RULL(0x1001282B), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_CME_LCL_SISR , RULL(0x1101242B), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_CME_LCL_SISR , RULL(0x1101282B), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_CME_LCL_SISR , RULL(0x1201242B), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_CME_LCL_SISR , RULL(0x1201282B), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_CME_LCL_SISR , RULL(0x1301242B), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_CME_LCL_SISR , RULL(0x1301282B), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_CME_LCL_SISR , RULL(0x1401242B), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_CME_LCL_SISR , RULL(0x1401282B), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_CME_LCL_SISR , RULL(0x1501242B), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_CME_LCL_SISR , RULL(0x1501282B), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_CME_SCOM_AFSR , RULL(0x10012813), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10012413, +REG64( EQ_0_CME_SCOM_AFSR , RULL(0x10012813), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10012413, +REG64( EQ_1_CME_SCOM_AFSR , RULL(0x11012813), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11012413, +REG64( EQ_2_CME_SCOM_AFSR , RULL(0x12012813), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12012413, +REG64( EQ_3_CME_SCOM_AFSR , RULL(0x13012813), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13012413, +REG64( EQ_4_CME_SCOM_AFSR , RULL(0x14012813), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14012413, +REG64( EQ_5_CME_SCOM_AFSR , RULL(0x15012813), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15012413, +REG64( EX_CME_SCOM_AFSR , RULL(0x10012413), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_CME_SCOM_AFSR , RULL(0x10012413), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_CME_SCOM_AFSR , RULL(0x10012813), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_CME_SCOM_AFSR , RULL(0x11012413), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_CME_SCOM_AFSR , RULL(0x11012813), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_CME_SCOM_AFSR , RULL(0x12012413), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_CME_SCOM_AFSR , RULL(0x12012813), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_CME_SCOM_AFSR , RULL(0x13012413), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_CME_SCOM_AFSR , RULL(0x13012813), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_CME_SCOM_AFSR , RULL(0x14012413), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_CME_SCOM_AFSR , RULL(0x14012813), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_CME_SCOM_AFSR , RULL(0x15012413), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_CME_SCOM_AFSR , RULL(0x15012813), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( EQ_CME_SCOM_AFTR , RULL(0x10012814), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 10012414, +REG64( EQ_0_CME_SCOM_AFTR , RULL(0x10012814), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 10012414, +REG64( EQ_1_CME_SCOM_AFTR , RULL(0x11012814), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 11012414, +REG64( EQ_2_CME_SCOM_AFTR , RULL(0x12012814), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 12012414, +REG64( EQ_3_CME_SCOM_AFTR , RULL(0x13012814), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 13012414, +REG64( EQ_4_CME_SCOM_AFTR , RULL(0x14012814), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 14012414, +REG64( EQ_5_CME_SCOM_AFTR , RULL(0x15012814), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 15012414, +REG64( EX_CME_SCOM_AFTR , RULL(0x10012414), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_CME_SCOM_AFTR , RULL(0x10012414), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_CME_SCOM_AFTR , RULL(0x10012814), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_CME_SCOM_AFTR , RULL(0x11012414), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_CME_SCOM_AFTR , RULL(0x11012814), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_CME_SCOM_AFTR , RULL(0x12012414), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_CME_SCOM_AFTR , RULL(0x12012814), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_CME_SCOM_AFTR , RULL(0x13012414), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_CME_SCOM_AFTR , RULL(0x13012814), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_CME_SCOM_AFTR , RULL(0x14012414), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_CME_SCOM_AFTR , RULL(0x14012814), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_CME_SCOM_AFTR , RULL(0x15012414), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_CME_SCOM_AFTR , RULL(0x15012814), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_CME_SCOM_BCEBAR0 , RULL(0x10012810), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012410, +REG64( EQ_0_CME_SCOM_BCEBAR0 , RULL(0x10012810), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012410, +REG64( EQ_1_CME_SCOM_BCEBAR0 , RULL(0x11012810), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012410, +REG64( EQ_2_CME_SCOM_BCEBAR0 , RULL(0x12012810), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012410, +REG64( EQ_3_CME_SCOM_BCEBAR0 , RULL(0x13012810), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012410, +REG64( EQ_4_CME_SCOM_BCEBAR0 , RULL(0x14012810), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012410, +REG64( EQ_5_CME_SCOM_BCEBAR0 , RULL(0x15012810), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012410, +REG64( EX_CME_SCOM_BCEBAR0 , RULL(0x10012410), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_BCEBAR0 , RULL(0x10012410), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_BCEBAR0 , RULL(0x10012810), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_BCEBAR0 , RULL(0x11012410), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_BCEBAR0 , RULL(0x11012810), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_BCEBAR0 , RULL(0x12012410), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_BCEBAR0 , RULL(0x12012810), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_BCEBAR0 , RULL(0x13012410), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_BCEBAR0 , RULL(0x13012810), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_BCEBAR0 , RULL(0x14012410), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_BCEBAR0 , RULL(0x14012810), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_BCEBAR0 , RULL(0x15012410), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_BCEBAR0 , RULL(0x15012810), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CME_SCOM_BCEBAR1 , RULL(0x10012811), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012411, +REG64( EQ_0_CME_SCOM_BCEBAR1 , RULL(0x10012811), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012411, +REG64( EQ_1_CME_SCOM_BCEBAR1 , RULL(0x11012811), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012411, +REG64( EQ_2_CME_SCOM_BCEBAR1 , RULL(0x12012811), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012411, +REG64( EQ_3_CME_SCOM_BCEBAR1 , RULL(0x13012811), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012411, +REG64( EQ_4_CME_SCOM_BCEBAR1 , RULL(0x14012811), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012411, +REG64( EQ_5_CME_SCOM_BCEBAR1 , RULL(0x15012811), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012411, +REG64( EX_CME_SCOM_BCEBAR1 , RULL(0x10012411), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_BCEBAR1 , RULL(0x10012411), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_BCEBAR1 , RULL(0x10012811), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_BCEBAR1 , RULL(0x11012411), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_BCEBAR1 , RULL(0x11012811), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_BCEBAR1 , RULL(0x12012411), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_BCEBAR1 , RULL(0x12012811), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_BCEBAR1 , RULL(0x13012411), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_BCEBAR1 , RULL(0x13012811), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_BCEBAR1 , RULL(0x14012411), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_BCEBAR1 , RULL(0x14012811), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_BCEBAR1 , RULL(0x15012411), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_BCEBAR1 , RULL(0x15012811), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CME_SCOM_BCECSR , RULL(0x1001280F), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 1001240F, +REG64( EQ_0_CME_SCOM_BCECSR , RULL(0x1001280F), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 1001240F, +REG64( EQ_1_CME_SCOM_BCECSR , RULL(0x1101280F), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 1101240F, +REG64( EQ_2_CME_SCOM_BCECSR , RULL(0x1201280F), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 1201240F, +REG64( EQ_3_CME_SCOM_BCECSR , RULL(0x1301280F), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 1301240F, +REG64( EQ_4_CME_SCOM_BCECSR , RULL(0x1401280F), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 1401240F, +REG64( EQ_5_CME_SCOM_BCECSR , RULL(0x1501280F), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 1501240F, +REG64( EX_CME_SCOM_BCECSR , RULL(0x1001240F), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_CME_SCOM_BCECSR , RULL(0x1001240F), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_CME_SCOM_BCECSR , RULL(0x1001280F), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_CME_SCOM_BCECSR , RULL(0x1101240F), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_CME_SCOM_BCECSR , RULL(0x1101280F), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_CME_SCOM_BCECSR , RULL(0x1201240F), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_CME_SCOM_BCECSR , RULL(0x1201280F), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_CME_SCOM_BCECSR , RULL(0x1301240F), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_CME_SCOM_BCECSR , RULL(0x1301280F), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_CME_SCOM_BCECSR , RULL(0x1401240F), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_CME_SCOM_BCECSR , RULL(0x1401280F), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_CME_SCOM_BCECSR , RULL(0x1501240F), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_CME_SCOM_BCECSR , RULL(0x1501280F), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( EQ_CME_SCOM_EIIR , RULL(0x10012819), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10012419, +REG64( EQ_0_CME_SCOM_EIIR , RULL(0x10012819), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10012419, +REG64( EQ_1_CME_SCOM_EIIR , RULL(0x11012819), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11012419, +REG64( EQ_2_CME_SCOM_EIIR , RULL(0x12012819), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12012419, +REG64( EQ_3_CME_SCOM_EIIR , RULL(0x13012819), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13012419, +REG64( EQ_4_CME_SCOM_EIIR , RULL(0x14012819), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14012419, +REG64( EQ_5_CME_SCOM_EIIR , RULL(0x15012819), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15012419, +REG64( EX_CME_SCOM_EIIR , RULL(0x10012419), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_CME_SCOM_EIIR , RULL(0x10012419), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_CME_SCOM_EIIR , RULL(0x10012819), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_CME_SCOM_EIIR , RULL(0x11012419), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_CME_SCOM_EIIR , RULL(0x11012819), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_CME_SCOM_EIIR , RULL(0x12012419), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_CME_SCOM_EIIR , RULL(0x12012819), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_CME_SCOM_EIIR , RULL(0x13012419), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_CME_SCOM_EIIR , RULL(0x13012819), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_CME_SCOM_EIIR , RULL(0x14012419), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_CME_SCOM_EIIR , RULL(0x14012819), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_CME_SCOM_EIIR , RULL(0x15012419), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_CME_SCOM_EIIR , RULL(0x15012819), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( EQ_CME_SCOM_FLAGS , RULL(0x10012820), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012420, +REG64( EQ_CME_SCOM_FLAGS_CLEAR , RULL(0x10012821), SH_UNT_EQ , + SH_ACS_SCOM1_CLEAR ); //DUPS: 10012421, +REG64( EQ_CME_SCOM_FLAGS_OR , RULL(0x10012822), SH_UNT_EQ , + SH_ACS_SCOM2_OR ); //DUPS: 10012422, +REG64( EQ_0_CME_SCOM_FLAGS , RULL(0x10012820), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012420, +REG64( EQ_0_CME_SCOM_FLAGS_CLEAR , RULL(0x10012821), SH_UNT_EQ_0 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 10012421, +REG64( EQ_0_CME_SCOM_FLAGS_OR , RULL(0x10012822), SH_UNT_EQ_0 , + SH_ACS_SCOM2_OR ); //DUPS: 10012422, +REG64( EQ_1_CME_SCOM_FLAGS , RULL(0x11012820), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012420, +REG64( EQ_1_CME_SCOM_FLAGS_CLEAR , RULL(0x11012821), SH_UNT_EQ_1 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 11012421, +REG64( EQ_1_CME_SCOM_FLAGS_OR , RULL(0x11012822), SH_UNT_EQ_1 , + SH_ACS_SCOM2_OR ); //DUPS: 11012422, +REG64( EQ_2_CME_SCOM_FLAGS , RULL(0x12012820), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012420, +REG64( EQ_2_CME_SCOM_FLAGS_CLEAR , RULL(0x12012821), SH_UNT_EQ_2 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 12012421, +REG64( EQ_2_CME_SCOM_FLAGS_OR , RULL(0x12012822), SH_UNT_EQ_2 , + SH_ACS_SCOM2_OR ); //DUPS: 12012422, +REG64( EQ_3_CME_SCOM_FLAGS , RULL(0x13012820), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012420, +REG64( EQ_3_CME_SCOM_FLAGS_CLEAR , RULL(0x13012821), SH_UNT_EQ_3 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 13012421, +REG64( EQ_3_CME_SCOM_FLAGS_OR , RULL(0x13012822), SH_UNT_EQ_3 , + SH_ACS_SCOM2_OR ); //DUPS: 13012422, +REG64( EQ_4_CME_SCOM_FLAGS , RULL(0x14012820), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012420, +REG64( EQ_4_CME_SCOM_FLAGS_CLEAR , RULL(0x14012821), SH_UNT_EQ_4 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 14012421, +REG64( EQ_4_CME_SCOM_FLAGS_OR , RULL(0x14012822), SH_UNT_EQ_4 , + SH_ACS_SCOM2_OR ); //DUPS: 14012422, +REG64( EQ_5_CME_SCOM_FLAGS , RULL(0x15012820), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012420, +REG64( EQ_5_CME_SCOM_FLAGS_CLEAR , RULL(0x15012821), SH_UNT_EQ_5 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 15012421, +REG64( EQ_5_CME_SCOM_FLAGS_OR , RULL(0x15012822), SH_UNT_EQ_5 , + SH_ACS_SCOM2_OR ); //DUPS: 15012422, +REG64( EX_CME_SCOM_FLAGS , RULL(0x10012420), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_CME_SCOM_FLAGS_CLEAR , RULL(0x10012421), SH_UNT_EX , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_CME_SCOM_FLAGS_OR , RULL(0x10012422), SH_UNT_EX , SH_ACS_SCOM2_OR ); +REG64( EX_0_CME_SCOM_FLAGS , RULL(0x10012420), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_FLAGS_CLEAR , RULL(0x10012421), SH_UNT_EX_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_0_CME_SCOM_FLAGS_OR , RULL(0x10012422), SH_UNT_EX_0 , SH_ACS_SCOM2_OR ); +REG64( EX_1_CME_SCOM_FLAGS , RULL(0x10012820), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_FLAGS_CLEAR , RULL(0x10012821), SH_UNT_EX_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_1_CME_SCOM_FLAGS_OR , RULL(0x10012822), SH_UNT_EX_1 , SH_ACS_SCOM2_OR ); +REG64( EX_2_CME_SCOM_FLAGS , RULL(0x11012420), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_FLAGS_CLEAR , RULL(0x11012421), SH_UNT_EX_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_2_CME_SCOM_FLAGS_OR , RULL(0x11012422), SH_UNT_EX_2 , SH_ACS_SCOM2_OR ); +REG64( EX_3_CME_SCOM_FLAGS , RULL(0x11012820), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_FLAGS_CLEAR , RULL(0x11012821), SH_UNT_EX_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_3_CME_SCOM_FLAGS_OR , RULL(0x11012822), SH_UNT_EX_3 , SH_ACS_SCOM2_OR ); +REG64( EX_4_CME_SCOM_FLAGS , RULL(0x12012420), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_FLAGS_CLEAR , RULL(0x12012421), SH_UNT_EX_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_4_CME_SCOM_FLAGS_OR , RULL(0x12012422), SH_UNT_EX_4 , SH_ACS_SCOM2_OR ); +REG64( EX_5_CME_SCOM_FLAGS , RULL(0x12012820), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_FLAGS_CLEAR , RULL(0x12012821), SH_UNT_EX_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_5_CME_SCOM_FLAGS_OR , RULL(0x12012822), SH_UNT_EX_5 , SH_ACS_SCOM2_OR ); +REG64( EX_6_CME_SCOM_FLAGS , RULL(0x13012420), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_FLAGS_CLEAR , RULL(0x13012421), SH_UNT_EX_6 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_6_CME_SCOM_FLAGS_OR , RULL(0x13012422), SH_UNT_EX_6 , SH_ACS_SCOM2_OR ); +REG64( EX_7_CME_SCOM_FLAGS , RULL(0x13012820), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_FLAGS_CLEAR , RULL(0x13012821), SH_UNT_EX_7 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_7_CME_SCOM_FLAGS_OR , RULL(0x13012822), SH_UNT_EX_7 , SH_ACS_SCOM2_OR ); +REG64( EX_8_CME_SCOM_FLAGS , RULL(0x14012420), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_FLAGS_CLEAR , RULL(0x14012421), SH_UNT_EX_8 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_8_CME_SCOM_FLAGS_OR , RULL(0x14012422), SH_UNT_EX_8 , SH_ACS_SCOM2_OR ); +REG64( EX_9_CME_SCOM_FLAGS , RULL(0x14012820), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_FLAGS_CLEAR , RULL(0x14012821), SH_UNT_EX_9 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_9_CME_SCOM_FLAGS_OR , RULL(0x14012822), SH_UNT_EX_9 , SH_ACS_SCOM2_OR ); +REG64( EX_10_CME_SCOM_FLAGS , RULL(0x15012420), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_FLAGS_CLEAR , RULL(0x15012421), SH_UNT_EX_10 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_10_CME_SCOM_FLAGS_OR , RULL(0x15012422), SH_UNT_EX_10 , SH_ACS_SCOM2_OR ); +REG64( EX_11_CME_SCOM_FLAGS , RULL(0x15012820), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_FLAGS_CLEAR , RULL(0x15012821), SH_UNT_EX_11 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_11_CME_SCOM_FLAGS_OR , RULL(0x15012822), SH_UNT_EX_11 , SH_ACS_SCOM2_OR ); + +REG64( EQ_CME_SCOM_FWMR , RULL(0x1001281A), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 1001241A, +REG64( EQ_CME_SCOM_FWMR_CLEAR , RULL(0x1001281B), SH_UNT_EQ , + SH_ACS_SCOM1_CLEAR ); //DUPS: 1001241B, +REG64( EQ_CME_SCOM_FWMR_OR , RULL(0x1001281C), SH_UNT_EQ , + SH_ACS_SCOM2_OR ); //DUPS: 1001241C, +REG64( EQ_0_CME_SCOM_FWMR , RULL(0x1001281A), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 1001241A, +REG64( EQ_0_CME_SCOM_FWMR_CLEAR , RULL(0x1001281B), SH_UNT_EQ_0 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 1001241B, +REG64( EQ_0_CME_SCOM_FWMR_OR , RULL(0x1001281C), SH_UNT_EQ_0 , + SH_ACS_SCOM2_OR ); //DUPS: 1001241C, +REG64( EQ_1_CME_SCOM_FWMR , RULL(0x1101281A), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 1101241A, +REG64( EQ_1_CME_SCOM_FWMR_CLEAR , RULL(0x1101281B), SH_UNT_EQ_1 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 1101241B, +REG64( EQ_1_CME_SCOM_FWMR_OR , RULL(0x1101281C), SH_UNT_EQ_1 , + SH_ACS_SCOM2_OR ); //DUPS: 1101241C, +REG64( EQ_2_CME_SCOM_FWMR , RULL(0x1201281A), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 1201241A, +REG64( EQ_2_CME_SCOM_FWMR_CLEAR , RULL(0x1201281B), SH_UNT_EQ_2 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 1201241B, +REG64( EQ_2_CME_SCOM_FWMR_OR , RULL(0x1201281C), SH_UNT_EQ_2 , + SH_ACS_SCOM2_OR ); //DUPS: 1201241C, +REG64( EQ_3_CME_SCOM_FWMR , RULL(0x1301281A), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 1301241A, +REG64( EQ_3_CME_SCOM_FWMR_CLEAR , RULL(0x1301281B), SH_UNT_EQ_3 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 1301241B, +REG64( EQ_3_CME_SCOM_FWMR_OR , RULL(0x1301281C), SH_UNT_EQ_3 , + SH_ACS_SCOM2_OR ); //DUPS: 1301241C, +REG64( EQ_4_CME_SCOM_FWMR , RULL(0x1401281A), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 1401241A, +REG64( EQ_4_CME_SCOM_FWMR_CLEAR , RULL(0x1401281B), SH_UNT_EQ_4 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 1401241B, +REG64( EQ_4_CME_SCOM_FWMR_OR , RULL(0x1401281C), SH_UNT_EQ_4 , + SH_ACS_SCOM2_OR ); //DUPS: 1401241C, +REG64( EQ_5_CME_SCOM_FWMR , RULL(0x1501281A), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 1501241A, +REG64( EQ_5_CME_SCOM_FWMR_CLEAR , RULL(0x1501281B), SH_UNT_EQ_5 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 1501241B, +REG64( EQ_5_CME_SCOM_FWMR_OR , RULL(0x1501281C), SH_UNT_EQ_5 , + SH_ACS_SCOM2_OR ); //DUPS: 1501241C, +REG64( EX_CME_SCOM_FWMR , RULL(0x1001241A), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_CME_SCOM_FWMR_CLEAR , RULL(0x1001241B), SH_UNT_EX , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_CME_SCOM_FWMR_OR , RULL(0x1001241C), SH_UNT_EX , SH_ACS_SCOM2_OR ); +REG64( EX_0_CME_SCOM_FWMR , RULL(0x1001241A), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_FWMR_CLEAR , RULL(0x1001241B), SH_UNT_EX_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_0_CME_SCOM_FWMR_OR , RULL(0x1001241C), SH_UNT_EX_0 , SH_ACS_SCOM2_OR ); +REG64( EX_1_CME_SCOM_FWMR , RULL(0x1001281A), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_FWMR_CLEAR , RULL(0x1001281B), SH_UNT_EX_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_1_CME_SCOM_FWMR_OR , RULL(0x1001281C), SH_UNT_EX_1 , SH_ACS_SCOM2_OR ); +REG64( EX_2_CME_SCOM_FWMR , RULL(0x1101241A), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_FWMR_CLEAR , RULL(0x1101241B), SH_UNT_EX_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_2_CME_SCOM_FWMR_OR , RULL(0x1101241C), SH_UNT_EX_2 , SH_ACS_SCOM2_OR ); +REG64( EX_3_CME_SCOM_FWMR , RULL(0x1101281A), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_FWMR_CLEAR , RULL(0x1101281B), SH_UNT_EX_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_3_CME_SCOM_FWMR_OR , RULL(0x1101281C), SH_UNT_EX_3 , SH_ACS_SCOM2_OR ); +REG64( EX_4_CME_SCOM_FWMR , RULL(0x1201241A), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_FWMR_CLEAR , RULL(0x1201241B), SH_UNT_EX_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_4_CME_SCOM_FWMR_OR , RULL(0x1201241C), SH_UNT_EX_4 , SH_ACS_SCOM2_OR ); +REG64( EX_5_CME_SCOM_FWMR , RULL(0x1201281A), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_FWMR_CLEAR , RULL(0x1201281B), SH_UNT_EX_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_5_CME_SCOM_FWMR_OR , RULL(0x1201281C), SH_UNT_EX_5 , SH_ACS_SCOM2_OR ); +REG64( EX_6_CME_SCOM_FWMR , RULL(0x1301241A), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_FWMR_CLEAR , RULL(0x1301241B), SH_UNT_EX_6 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_6_CME_SCOM_FWMR_OR , RULL(0x1301241C), SH_UNT_EX_6 , SH_ACS_SCOM2_OR ); +REG64( EX_7_CME_SCOM_FWMR , RULL(0x1301281A), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_FWMR_CLEAR , RULL(0x1301281B), SH_UNT_EX_7 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_7_CME_SCOM_FWMR_OR , RULL(0x1301281C), SH_UNT_EX_7 , SH_ACS_SCOM2_OR ); +REG64( EX_8_CME_SCOM_FWMR , RULL(0x1401241A), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_FWMR_CLEAR , RULL(0x1401241B), SH_UNT_EX_8 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_8_CME_SCOM_FWMR_OR , RULL(0x1401241C), SH_UNT_EX_8 , SH_ACS_SCOM2_OR ); +REG64( EX_9_CME_SCOM_FWMR , RULL(0x1401281A), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_FWMR_CLEAR , RULL(0x1401281B), SH_UNT_EX_9 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_9_CME_SCOM_FWMR_OR , RULL(0x1401281C), SH_UNT_EX_9 , SH_ACS_SCOM2_OR ); +REG64( EX_10_CME_SCOM_FWMR , RULL(0x1501241A), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_FWMR_CLEAR , RULL(0x1501241B), SH_UNT_EX_10 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_10_CME_SCOM_FWMR_OR , RULL(0x1501241C), SH_UNT_EX_10 , SH_ACS_SCOM2_OR ); +REG64( EX_11_CME_SCOM_FWMR , RULL(0x1501281A), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_FWMR_CLEAR , RULL(0x1501281B), SH_UNT_EX_11 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_11_CME_SCOM_FWMR_OR , RULL(0x1501281C), SH_UNT_EX_11 , SH_ACS_SCOM2_OR ); + +REG64( EQ_CME_SCOM_LFIR , RULL(0x10012800), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012400, +REG64( EQ_CME_SCOM_LFIR_AND , RULL(0x10012801), SH_UNT_EQ , + SH_ACS_SCOM1_AND ); //DUPS: 10012401, +REG64( EQ_CME_SCOM_LFIR_OR , RULL(0x10012802), SH_UNT_EQ , + SH_ACS_SCOM2_OR ); //DUPS: 10012402, +REG64( EQ_0_CME_SCOM_LFIR , RULL(0x10012800), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012400, +REG64( EQ_0_CME_SCOM_LFIR_AND , RULL(0x10012801), SH_UNT_EQ_0 , + SH_ACS_SCOM1_AND ); //DUPS: 10012401, +REG64( EQ_0_CME_SCOM_LFIR_OR , RULL(0x10012802), SH_UNT_EQ_0 , + SH_ACS_SCOM2_OR ); //DUPS: 10012402, +REG64( EQ_1_CME_SCOM_LFIR , RULL(0x11012800), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012400, +REG64( EQ_1_CME_SCOM_LFIR_AND , RULL(0x11012801), SH_UNT_EQ_1 , + SH_ACS_SCOM1_AND ); //DUPS: 11012401, +REG64( EQ_1_CME_SCOM_LFIR_OR , RULL(0x11012802), SH_UNT_EQ_1 , + SH_ACS_SCOM2_OR ); //DUPS: 11012402, +REG64( EQ_2_CME_SCOM_LFIR , RULL(0x12012800), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012400, +REG64( EQ_2_CME_SCOM_LFIR_AND , RULL(0x12012801), SH_UNT_EQ_2 , + SH_ACS_SCOM1_AND ); //DUPS: 12012401, +REG64( EQ_2_CME_SCOM_LFIR_OR , RULL(0x12012802), SH_UNT_EQ_2 , + SH_ACS_SCOM2_OR ); //DUPS: 12012402, +REG64( EQ_3_CME_SCOM_LFIR , RULL(0x13012800), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012400, +REG64( EQ_3_CME_SCOM_LFIR_AND , RULL(0x13012801), SH_UNT_EQ_3 , + SH_ACS_SCOM1_AND ); //DUPS: 13012401, +REG64( EQ_3_CME_SCOM_LFIR_OR , RULL(0x13012802), SH_UNT_EQ_3 , + SH_ACS_SCOM2_OR ); //DUPS: 13012402, +REG64( EQ_4_CME_SCOM_LFIR , RULL(0x14012800), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012400, +REG64( EQ_4_CME_SCOM_LFIR_AND , RULL(0x14012801), SH_UNT_EQ_4 , + SH_ACS_SCOM1_AND ); //DUPS: 14012401, +REG64( EQ_4_CME_SCOM_LFIR_OR , RULL(0x14012802), SH_UNT_EQ_4 , + SH_ACS_SCOM2_OR ); //DUPS: 14012402, +REG64( EQ_5_CME_SCOM_LFIR , RULL(0x15012800), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012400, +REG64( EQ_5_CME_SCOM_LFIR_AND , RULL(0x15012801), SH_UNT_EQ_5 , + SH_ACS_SCOM1_AND ); //DUPS: 15012401, +REG64( EQ_5_CME_SCOM_LFIR_OR , RULL(0x15012802), SH_UNT_EQ_5 , + SH_ACS_SCOM2_OR ); //DUPS: 15012402, +REG64( EX_CME_SCOM_LFIR , RULL(0x10012400), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_CME_SCOM_LFIR_AND , RULL(0x10012401), SH_UNT_EX , SH_ACS_SCOM1_AND ); +REG64( EX_CME_SCOM_LFIR_OR , RULL(0x10012402), SH_UNT_EX , SH_ACS_SCOM2_OR ); +REG64( EX_0_CME_SCOM_LFIR , RULL(0x10012400), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_LFIR_AND , RULL(0x10012401), SH_UNT_EX_0 , SH_ACS_SCOM1_AND ); +REG64( EX_0_CME_SCOM_LFIR_OR , RULL(0x10012402), SH_UNT_EX_0 , SH_ACS_SCOM2_OR ); +REG64( EX_1_CME_SCOM_LFIR , RULL(0x10012800), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_LFIR_AND , RULL(0x10012801), SH_UNT_EX_1 , SH_ACS_SCOM1_AND ); +REG64( EX_1_CME_SCOM_LFIR_OR , RULL(0x10012802), SH_UNT_EX_1 , SH_ACS_SCOM2_OR ); +REG64( EX_2_CME_SCOM_LFIR , RULL(0x11012400), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_LFIR_AND , RULL(0x11012401), SH_UNT_EX_2 , SH_ACS_SCOM1_AND ); +REG64( EX_2_CME_SCOM_LFIR_OR , RULL(0x11012402), SH_UNT_EX_2 , SH_ACS_SCOM2_OR ); +REG64( EX_3_CME_SCOM_LFIR , RULL(0x11012800), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_LFIR_AND , RULL(0x11012801), SH_UNT_EX_3 , SH_ACS_SCOM1_AND ); +REG64( EX_3_CME_SCOM_LFIR_OR , RULL(0x11012802), SH_UNT_EX_3 , SH_ACS_SCOM2_OR ); +REG64( EX_4_CME_SCOM_LFIR , RULL(0x12012400), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_LFIR_AND , RULL(0x12012401), SH_UNT_EX_4 , SH_ACS_SCOM1_AND ); +REG64( EX_4_CME_SCOM_LFIR_OR , RULL(0x12012402), SH_UNT_EX_4 , SH_ACS_SCOM2_OR ); +REG64( EX_5_CME_SCOM_LFIR , RULL(0x12012800), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_LFIR_AND , RULL(0x12012801), SH_UNT_EX_5 , SH_ACS_SCOM1_AND ); +REG64( EX_5_CME_SCOM_LFIR_OR , RULL(0x12012802), SH_UNT_EX_5 , SH_ACS_SCOM2_OR ); +REG64( EX_6_CME_SCOM_LFIR , RULL(0x13012400), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_LFIR_AND , RULL(0x13012401), SH_UNT_EX_6 , SH_ACS_SCOM1_AND ); +REG64( EX_6_CME_SCOM_LFIR_OR , RULL(0x13012402), SH_UNT_EX_6 , SH_ACS_SCOM2_OR ); +REG64( EX_7_CME_SCOM_LFIR , RULL(0x13012800), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_LFIR_AND , RULL(0x13012801), SH_UNT_EX_7 , SH_ACS_SCOM1_AND ); +REG64( EX_7_CME_SCOM_LFIR_OR , RULL(0x13012802), SH_UNT_EX_7 , SH_ACS_SCOM2_OR ); +REG64( EX_8_CME_SCOM_LFIR , RULL(0x14012400), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_LFIR_AND , RULL(0x14012401), SH_UNT_EX_8 , SH_ACS_SCOM1_AND ); +REG64( EX_8_CME_SCOM_LFIR_OR , RULL(0x14012402), SH_UNT_EX_8 , SH_ACS_SCOM2_OR ); +REG64( EX_9_CME_SCOM_LFIR , RULL(0x14012800), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_LFIR_AND , RULL(0x14012801), SH_UNT_EX_9 , SH_ACS_SCOM1_AND ); +REG64( EX_9_CME_SCOM_LFIR_OR , RULL(0x14012802), SH_UNT_EX_9 , SH_ACS_SCOM2_OR ); +REG64( EX_10_CME_SCOM_LFIR , RULL(0x15012400), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_LFIR_AND , RULL(0x15012401), SH_UNT_EX_10 , SH_ACS_SCOM1_AND ); +REG64( EX_10_CME_SCOM_LFIR_OR , RULL(0x15012402), SH_UNT_EX_10 , SH_ACS_SCOM2_OR ); +REG64( EX_11_CME_SCOM_LFIR , RULL(0x15012800), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_LFIR_AND , RULL(0x15012801), SH_UNT_EX_11 , SH_ACS_SCOM1_AND ); +REG64( EX_11_CME_SCOM_LFIR_OR , RULL(0x15012802), SH_UNT_EX_11 , SH_ACS_SCOM2_OR ); + +REG64( EQ_CME_SCOM_LFIRACT0 , RULL(0x10012806), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012406, +REG64( EQ_0_CME_SCOM_LFIRACT0 , RULL(0x10012806), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012406, +REG64( EQ_1_CME_SCOM_LFIRACT0 , RULL(0x11012806), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012406, +REG64( EQ_2_CME_SCOM_LFIRACT0 , RULL(0x12012806), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012406, +REG64( EQ_3_CME_SCOM_LFIRACT0 , RULL(0x13012806), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012406, +REG64( EQ_4_CME_SCOM_LFIRACT0 , RULL(0x14012806), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012406, +REG64( EQ_5_CME_SCOM_LFIRACT0 , RULL(0x15012806), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012406, +REG64( EX_CME_SCOM_LFIRACT0 , RULL(0x10012406), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_LFIRACT0 , RULL(0x10012406), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_LFIRACT0 , RULL(0x10012806), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_LFIRACT0 , RULL(0x11012406), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_LFIRACT0 , RULL(0x11012806), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_LFIRACT0 , RULL(0x12012406), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_LFIRACT0 , RULL(0x12012806), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_LFIRACT0 , RULL(0x13012406), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_LFIRACT0 , RULL(0x13012806), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_LFIRACT0 , RULL(0x14012406), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_LFIRACT0 , RULL(0x14012806), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_LFIRACT0 , RULL(0x15012406), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_LFIRACT0 , RULL(0x15012806), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CME_SCOM_LFIRACT1 , RULL(0x10012807), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012407, +REG64( EQ_0_CME_SCOM_LFIRACT1 , RULL(0x10012807), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012407, +REG64( EQ_1_CME_SCOM_LFIRACT1 , RULL(0x11012807), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012407, +REG64( EQ_2_CME_SCOM_LFIRACT1 , RULL(0x12012807), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012407, +REG64( EQ_3_CME_SCOM_LFIRACT1 , RULL(0x13012807), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012407, +REG64( EQ_4_CME_SCOM_LFIRACT1 , RULL(0x14012807), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012407, +REG64( EQ_5_CME_SCOM_LFIRACT1 , RULL(0x15012807), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012407, +REG64( EX_CME_SCOM_LFIRACT1 , RULL(0x10012407), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_LFIRACT1 , RULL(0x10012407), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_LFIRACT1 , RULL(0x10012807), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_LFIRACT1 , RULL(0x11012407), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_LFIRACT1 , RULL(0x11012807), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_LFIRACT1 , RULL(0x12012407), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_LFIRACT1 , RULL(0x12012807), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_LFIRACT1 , RULL(0x13012407), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_LFIRACT1 , RULL(0x13012807), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_LFIRACT1 , RULL(0x14012407), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_LFIRACT1 , RULL(0x14012807), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_LFIRACT1 , RULL(0x15012407), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_LFIRACT1 , RULL(0x15012807), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CME_SCOM_LFIRMASK , RULL(0x10012803), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012403, +REG64( EQ_CME_SCOM_LFIRMASK_AND , RULL(0x10012804), SH_UNT_EQ , + SH_ACS_SCOM1_AND ); //DUPS: 10012404, +REG64( EQ_CME_SCOM_LFIRMASK_OR , RULL(0x10012805), SH_UNT_EQ , + SH_ACS_SCOM2_OR ); //DUPS: 10012405, +REG64( EQ_0_CME_SCOM_LFIRMASK , RULL(0x10012803), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012403, +REG64( EQ_0_CME_SCOM_LFIRMASK_AND , RULL(0x10012804), SH_UNT_EQ_0 , + SH_ACS_SCOM1_AND ); //DUPS: 10012404, +REG64( EQ_0_CME_SCOM_LFIRMASK_OR , RULL(0x10012805), SH_UNT_EQ_0 , + SH_ACS_SCOM2_OR ); //DUPS: 10012405, +REG64( EQ_1_CME_SCOM_LFIRMASK , RULL(0x11012803), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012403, +REG64( EQ_1_CME_SCOM_LFIRMASK_AND , RULL(0x11012804), SH_UNT_EQ_1 , + SH_ACS_SCOM1_AND ); //DUPS: 11012404, +REG64( EQ_1_CME_SCOM_LFIRMASK_OR , RULL(0x11012805), SH_UNT_EQ_1 , + SH_ACS_SCOM2_OR ); //DUPS: 11012405, +REG64( EQ_2_CME_SCOM_LFIRMASK , RULL(0x12012803), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012403, +REG64( EQ_2_CME_SCOM_LFIRMASK_AND , RULL(0x12012804), SH_UNT_EQ_2 , + SH_ACS_SCOM1_AND ); //DUPS: 12012404, +REG64( EQ_2_CME_SCOM_LFIRMASK_OR , RULL(0x12012805), SH_UNT_EQ_2 , + SH_ACS_SCOM2_OR ); //DUPS: 12012405, +REG64( EQ_3_CME_SCOM_LFIRMASK , RULL(0x13012803), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012403, +REG64( EQ_3_CME_SCOM_LFIRMASK_AND , RULL(0x13012804), SH_UNT_EQ_3 , + SH_ACS_SCOM1_AND ); //DUPS: 13012404, +REG64( EQ_3_CME_SCOM_LFIRMASK_OR , RULL(0x13012805), SH_UNT_EQ_3 , + SH_ACS_SCOM2_OR ); //DUPS: 13012405, +REG64( EQ_4_CME_SCOM_LFIRMASK , RULL(0x14012803), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012403, +REG64( EQ_4_CME_SCOM_LFIRMASK_AND , RULL(0x14012804), SH_UNT_EQ_4 , + SH_ACS_SCOM1_AND ); //DUPS: 14012404, +REG64( EQ_4_CME_SCOM_LFIRMASK_OR , RULL(0x14012805), SH_UNT_EQ_4 , + SH_ACS_SCOM2_OR ); //DUPS: 14012405, +REG64( EQ_5_CME_SCOM_LFIRMASK , RULL(0x15012803), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012403, +REG64( EQ_5_CME_SCOM_LFIRMASK_AND , RULL(0x15012804), SH_UNT_EQ_5 , + SH_ACS_SCOM1_AND ); //DUPS: 15012404, +REG64( EQ_5_CME_SCOM_LFIRMASK_OR , RULL(0x15012805), SH_UNT_EQ_5 , + SH_ACS_SCOM2_OR ); //DUPS: 15012405, +REG64( EX_CME_SCOM_LFIRMASK , RULL(0x10012403), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_CME_SCOM_LFIRMASK_AND , RULL(0x10012404), SH_UNT_EX , SH_ACS_SCOM1_AND ); +REG64( EX_CME_SCOM_LFIRMASK_OR , RULL(0x10012405), SH_UNT_EX , SH_ACS_SCOM2_OR ); +REG64( EX_0_CME_SCOM_LFIRMASK , RULL(0x10012403), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_LFIRMASK_AND , RULL(0x10012404), SH_UNT_EX_0 , SH_ACS_SCOM1_AND ); +REG64( EX_0_CME_SCOM_LFIRMASK_OR , RULL(0x10012405), SH_UNT_EX_0 , SH_ACS_SCOM2_OR ); +REG64( EX_1_CME_SCOM_LFIRMASK , RULL(0x10012803), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_LFIRMASK_AND , RULL(0x10012804), SH_UNT_EX_1 , SH_ACS_SCOM1_AND ); +REG64( EX_1_CME_SCOM_LFIRMASK_OR , RULL(0x10012805), SH_UNT_EX_1 , SH_ACS_SCOM2_OR ); +REG64( EX_2_CME_SCOM_LFIRMASK , RULL(0x11012403), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_LFIRMASK_AND , RULL(0x11012404), SH_UNT_EX_2 , SH_ACS_SCOM1_AND ); +REG64( EX_2_CME_SCOM_LFIRMASK_OR , RULL(0x11012405), SH_UNT_EX_2 , SH_ACS_SCOM2_OR ); +REG64( EX_3_CME_SCOM_LFIRMASK , RULL(0x11012803), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_LFIRMASK_AND , RULL(0x11012804), SH_UNT_EX_3 , SH_ACS_SCOM1_AND ); +REG64( EX_3_CME_SCOM_LFIRMASK_OR , RULL(0x11012805), SH_UNT_EX_3 , SH_ACS_SCOM2_OR ); +REG64( EX_4_CME_SCOM_LFIRMASK , RULL(0x12012403), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_LFIRMASK_AND , RULL(0x12012404), SH_UNT_EX_4 , SH_ACS_SCOM1_AND ); +REG64( EX_4_CME_SCOM_LFIRMASK_OR , RULL(0x12012405), SH_UNT_EX_4 , SH_ACS_SCOM2_OR ); +REG64( EX_5_CME_SCOM_LFIRMASK , RULL(0x12012803), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_LFIRMASK_AND , RULL(0x12012804), SH_UNT_EX_5 , SH_ACS_SCOM1_AND ); +REG64( EX_5_CME_SCOM_LFIRMASK_OR , RULL(0x12012805), SH_UNT_EX_5 , SH_ACS_SCOM2_OR ); +REG64( EX_6_CME_SCOM_LFIRMASK , RULL(0x13012403), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_LFIRMASK_AND , RULL(0x13012404), SH_UNT_EX_6 , SH_ACS_SCOM1_AND ); +REG64( EX_6_CME_SCOM_LFIRMASK_OR , RULL(0x13012405), SH_UNT_EX_6 , SH_ACS_SCOM2_OR ); +REG64( EX_7_CME_SCOM_LFIRMASK , RULL(0x13012803), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_LFIRMASK_AND , RULL(0x13012804), SH_UNT_EX_7 , SH_ACS_SCOM1_AND ); +REG64( EX_7_CME_SCOM_LFIRMASK_OR , RULL(0x13012805), SH_UNT_EX_7 , SH_ACS_SCOM2_OR ); +REG64( EX_8_CME_SCOM_LFIRMASK , RULL(0x14012403), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_LFIRMASK_AND , RULL(0x14012404), SH_UNT_EX_8 , SH_ACS_SCOM1_AND ); +REG64( EX_8_CME_SCOM_LFIRMASK_OR , RULL(0x14012405), SH_UNT_EX_8 , SH_ACS_SCOM2_OR ); +REG64( EX_9_CME_SCOM_LFIRMASK , RULL(0x14012803), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_LFIRMASK_AND , RULL(0x14012804), SH_UNT_EX_9 , SH_ACS_SCOM1_AND ); +REG64( EX_9_CME_SCOM_LFIRMASK_OR , RULL(0x14012805), SH_UNT_EX_9 , SH_ACS_SCOM2_OR ); +REG64( EX_10_CME_SCOM_LFIRMASK , RULL(0x15012403), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_LFIRMASK_AND , RULL(0x15012404), SH_UNT_EX_10 , SH_ACS_SCOM1_AND ); +REG64( EX_10_CME_SCOM_LFIRMASK_OR , RULL(0x15012405), SH_UNT_EX_10 , SH_ACS_SCOM2_OR ); +REG64( EX_11_CME_SCOM_LFIRMASK , RULL(0x15012803), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_LFIRMASK_AND , RULL(0x15012804), SH_UNT_EX_11 , SH_ACS_SCOM1_AND ); +REG64( EX_11_CME_SCOM_LFIRMASK_OR , RULL(0x15012805), SH_UNT_EX_11 , SH_ACS_SCOM2_OR ); + +REG64( EQ_CME_SCOM_PMCRS0 , RULL(0x10012842), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012442, +REG64( EQ_0_CME_SCOM_PMCRS0 , RULL(0x10012842), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012442, +REG64( EQ_1_CME_SCOM_PMCRS0 , RULL(0x11012842), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012442, +REG64( EQ_2_CME_SCOM_PMCRS0 , RULL(0x12012842), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012442, +REG64( EQ_3_CME_SCOM_PMCRS0 , RULL(0x13012842), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012442, +REG64( EQ_4_CME_SCOM_PMCRS0 , RULL(0x14012842), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012442, +REG64( EQ_5_CME_SCOM_PMCRS0 , RULL(0x15012842), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012442, +REG64( EX_CME_SCOM_PMCRS0 , RULL(0x10012442), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_PMCRS0 , RULL(0x10012442), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_PMCRS0 , RULL(0x10012842), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_PMCRS0 , RULL(0x11012442), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_PMCRS0 , RULL(0x11012842), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_PMCRS0 , RULL(0x12012442), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_PMCRS0 , RULL(0x12012842), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_PMCRS0 , RULL(0x13012442), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_PMCRS0 , RULL(0x13012842), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_PMCRS0 , RULL(0x14012442), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_PMCRS0 , RULL(0x14012842), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_PMCRS0 , RULL(0x15012442), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_PMCRS0 , RULL(0x15012842), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CME_SCOM_PMCRS1 , RULL(0x10012843), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012443, +REG64( EQ_0_CME_SCOM_PMCRS1 , RULL(0x10012843), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012443, +REG64( EQ_1_CME_SCOM_PMCRS1 , RULL(0x11012843), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012443, +REG64( EQ_2_CME_SCOM_PMCRS1 , RULL(0x12012843), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012443, +REG64( EQ_3_CME_SCOM_PMCRS1 , RULL(0x13012843), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012443, +REG64( EQ_4_CME_SCOM_PMCRS1 , RULL(0x14012843), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012443, +REG64( EQ_5_CME_SCOM_PMCRS1 , RULL(0x15012843), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012443, +REG64( EX_CME_SCOM_PMCRS1 , RULL(0x10012443), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_PMCRS1 , RULL(0x10012443), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_PMCRS1 , RULL(0x10012843), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_PMCRS1 , RULL(0x11012443), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_PMCRS1 , RULL(0x11012843), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_PMCRS1 , RULL(0x12012443), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_PMCRS1 , RULL(0x12012843), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_PMCRS1 , RULL(0x13012443), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_PMCRS1 , RULL(0x13012843), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_PMCRS1 , RULL(0x14012443), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_PMCRS1 , RULL(0x14012843), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_PMCRS1 , RULL(0x15012443), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_PMCRS1 , RULL(0x15012843), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CME_SCOM_PMSRS0 , RULL(0x10012840), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012440, +REG64( EQ_0_CME_SCOM_PMSRS0 , RULL(0x10012840), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012440, +REG64( EQ_1_CME_SCOM_PMSRS0 , RULL(0x11012840), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012440, +REG64( EQ_2_CME_SCOM_PMSRS0 , RULL(0x12012840), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012440, +REG64( EQ_3_CME_SCOM_PMSRS0 , RULL(0x13012840), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012440, +REG64( EQ_4_CME_SCOM_PMSRS0 , RULL(0x14012840), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012440, +REG64( EQ_5_CME_SCOM_PMSRS0 , RULL(0x15012840), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012440, +REG64( EX_CME_SCOM_PMSRS0 , RULL(0x10012440), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_PMSRS0 , RULL(0x10012440), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_PMSRS0 , RULL(0x10012840), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_PMSRS0 , RULL(0x11012440), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_PMSRS0 , RULL(0x11012840), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_PMSRS0 , RULL(0x12012440), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_PMSRS0 , RULL(0x12012840), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_PMSRS0 , RULL(0x13012440), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_PMSRS0 , RULL(0x13012840), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_PMSRS0 , RULL(0x14012440), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_PMSRS0 , RULL(0x14012840), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_PMSRS0 , RULL(0x15012440), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_PMSRS0 , RULL(0x15012840), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CME_SCOM_PMSRS1 , RULL(0x10012841), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012441, +REG64( EQ_0_CME_SCOM_PMSRS1 , RULL(0x10012841), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012441, +REG64( EQ_1_CME_SCOM_PMSRS1 , RULL(0x11012841), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012441, +REG64( EQ_2_CME_SCOM_PMSRS1 , RULL(0x12012841), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012441, +REG64( EQ_3_CME_SCOM_PMSRS1 , RULL(0x13012841), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012441, +REG64( EQ_4_CME_SCOM_PMSRS1 , RULL(0x14012841), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012441, +REG64( EQ_5_CME_SCOM_PMSRS1 , RULL(0x15012841), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012441, +REG64( EX_CME_SCOM_PMSRS1 , RULL(0x10012441), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_PMSRS1 , RULL(0x10012441), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_PMSRS1 , RULL(0x10012841), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_PMSRS1 , RULL(0x11012441), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_PMSRS1 , RULL(0x11012841), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_PMSRS1 , RULL(0x12012441), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_PMSRS1 , RULL(0x12012841), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_PMSRS1 , RULL(0x13012441), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_PMSRS1 , RULL(0x13012841), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_PMSRS1 , RULL(0x14012441), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_PMSRS1 , RULL(0x14012841), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_PMSRS1 , RULL(0x15012441), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_PMSRS1 , RULL(0x15012841), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CME_SCOM_PSCRS00 , RULL(0x10012844), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012444, +REG64( EQ_0_CME_SCOM_PSCRS00 , RULL(0x10012844), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012444, +REG64( EQ_1_CME_SCOM_PSCRS00 , RULL(0x11012844), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012444, +REG64( EQ_2_CME_SCOM_PSCRS00 , RULL(0x12012844), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012444, +REG64( EQ_3_CME_SCOM_PSCRS00 , RULL(0x13012844), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012444, +REG64( EQ_4_CME_SCOM_PSCRS00 , RULL(0x14012844), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012444, +REG64( EQ_5_CME_SCOM_PSCRS00 , RULL(0x15012844), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012444, +REG64( EX_CME_SCOM_PSCRS00 , RULL(0x10012444), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_PSCRS00 , RULL(0x10012444), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_PSCRS00 , RULL(0x10012844), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_PSCRS00 , RULL(0x11012444), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_PSCRS00 , RULL(0x11012844), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_PSCRS00 , RULL(0x12012444), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_PSCRS00 , RULL(0x12012844), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_PSCRS00 , RULL(0x13012444), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_PSCRS00 , RULL(0x13012844), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_PSCRS00 , RULL(0x14012444), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_PSCRS00 , RULL(0x14012844), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_PSCRS00 , RULL(0x15012444), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_PSCRS00 , RULL(0x15012844), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CME_SCOM_PSCRS01 , RULL(0x10012845), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012445, +REG64( EQ_0_CME_SCOM_PSCRS01 , RULL(0x10012845), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012445, +REG64( EQ_1_CME_SCOM_PSCRS01 , RULL(0x11012845), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012445, +REG64( EQ_2_CME_SCOM_PSCRS01 , RULL(0x12012845), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012445, +REG64( EQ_3_CME_SCOM_PSCRS01 , RULL(0x13012845), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012445, +REG64( EQ_4_CME_SCOM_PSCRS01 , RULL(0x14012845), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012445, +REG64( EQ_5_CME_SCOM_PSCRS01 , RULL(0x15012845), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012445, +REG64( EX_CME_SCOM_PSCRS01 , RULL(0x10012445), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_PSCRS01 , RULL(0x10012445), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_PSCRS01 , RULL(0x10012845), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_PSCRS01 , RULL(0x11012445), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_PSCRS01 , RULL(0x11012845), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_PSCRS01 , RULL(0x12012445), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_PSCRS01 , RULL(0x12012845), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_PSCRS01 , RULL(0x13012445), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_PSCRS01 , RULL(0x13012845), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_PSCRS01 , RULL(0x14012445), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_PSCRS01 , RULL(0x14012845), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_PSCRS01 , RULL(0x15012445), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_PSCRS01 , RULL(0x15012845), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CME_SCOM_PSCRS02 , RULL(0x10012846), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012446, +REG64( EQ_0_CME_SCOM_PSCRS02 , RULL(0x10012846), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012446, +REG64( EQ_1_CME_SCOM_PSCRS02 , RULL(0x11012846), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012446, +REG64( EQ_2_CME_SCOM_PSCRS02 , RULL(0x12012846), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012446, +REG64( EQ_3_CME_SCOM_PSCRS02 , RULL(0x13012846), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012446, +REG64( EQ_4_CME_SCOM_PSCRS02 , RULL(0x14012846), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012446, +REG64( EQ_5_CME_SCOM_PSCRS02 , RULL(0x15012846), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012446, +REG64( EX_CME_SCOM_PSCRS02 , RULL(0x10012446), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_PSCRS02 , RULL(0x10012446), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_PSCRS02 , RULL(0x10012846), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_PSCRS02 , RULL(0x11012446), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_PSCRS02 , RULL(0x11012846), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_PSCRS02 , RULL(0x12012446), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_PSCRS02 , RULL(0x12012846), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_PSCRS02 , RULL(0x13012446), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_PSCRS02 , RULL(0x13012846), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_PSCRS02 , RULL(0x14012446), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_PSCRS02 , RULL(0x14012846), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_PSCRS02 , RULL(0x15012446), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_PSCRS02 , RULL(0x15012846), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CME_SCOM_PSCRS03 , RULL(0x10012847), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012447, +REG64( EQ_0_CME_SCOM_PSCRS03 , RULL(0x10012847), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012447, +REG64( EQ_1_CME_SCOM_PSCRS03 , RULL(0x11012847), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012447, +REG64( EQ_2_CME_SCOM_PSCRS03 , RULL(0x12012847), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012447, +REG64( EQ_3_CME_SCOM_PSCRS03 , RULL(0x13012847), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012447, +REG64( EQ_4_CME_SCOM_PSCRS03 , RULL(0x14012847), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012447, +REG64( EQ_5_CME_SCOM_PSCRS03 , RULL(0x15012847), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012447, +REG64( EX_CME_SCOM_PSCRS03 , RULL(0x10012447), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_PSCRS03 , RULL(0x10012447), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_PSCRS03 , RULL(0x10012847), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_PSCRS03 , RULL(0x11012447), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_PSCRS03 , RULL(0x11012847), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_PSCRS03 , RULL(0x12012447), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_PSCRS03 , RULL(0x12012847), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_PSCRS03 , RULL(0x13012447), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_PSCRS03 , RULL(0x13012847), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_PSCRS03 , RULL(0x14012447), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_PSCRS03 , RULL(0x14012847), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_PSCRS03 , RULL(0x15012447), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_PSCRS03 , RULL(0x15012847), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CME_SCOM_PSCRS10 , RULL(0x10012848), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012448, +REG64( EQ_0_CME_SCOM_PSCRS10 , RULL(0x10012848), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012448, +REG64( EQ_1_CME_SCOM_PSCRS10 , RULL(0x11012848), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012448, +REG64( EQ_2_CME_SCOM_PSCRS10 , RULL(0x12012848), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012448, +REG64( EQ_3_CME_SCOM_PSCRS10 , RULL(0x13012848), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012448, +REG64( EQ_4_CME_SCOM_PSCRS10 , RULL(0x14012848), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012448, +REG64( EQ_5_CME_SCOM_PSCRS10 , RULL(0x15012848), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012448, +REG64( EX_CME_SCOM_PSCRS10 , RULL(0x10012448), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_PSCRS10 , RULL(0x10012448), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_PSCRS10 , RULL(0x10012848), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_PSCRS10 , RULL(0x11012448), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_PSCRS10 , RULL(0x11012848), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_PSCRS10 , RULL(0x12012448), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_PSCRS10 , RULL(0x12012848), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_PSCRS10 , RULL(0x13012448), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_PSCRS10 , RULL(0x13012848), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_PSCRS10 , RULL(0x14012448), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_PSCRS10 , RULL(0x14012848), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_PSCRS10 , RULL(0x15012448), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_PSCRS10 , RULL(0x15012848), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CME_SCOM_PSCRS11 , RULL(0x10012849), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012449, +REG64( EQ_0_CME_SCOM_PSCRS11 , RULL(0x10012849), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012449, +REG64( EQ_1_CME_SCOM_PSCRS11 , RULL(0x11012849), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012449, +REG64( EQ_2_CME_SCOM_PSCRS11 , RULL(0x12012849), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012449, +REG64( EQ_3_CME_SCOM_PSCRS11 , RULL(0x13012849), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012449, +REG64( EQ_4_CME_SCOM_PSCRS11 , RULL(0x14012849), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012449, +REG64( EQ_5_CME_SCOM_PSCRS11 , RULL(0x15012849), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012449, +REG64( EX_CME_SCOM_PSCRS11 , RULL(0x10012449), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_PSCRS11 , RULL(0x10012449), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_PSCRS11 , RULL(0x10012849), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_PSCRS11 , RULL(0x11012449), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_PSCRS11 , RULL(0x11012849), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_PSCRS11 , RULL(0x12012449), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_PSCRS11 , RULL(0x12012849), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_PSCRS11 , RULL(0x13012449), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_PSCRS11 , RULL(0x13012849), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_PSCRS11 , RULL(0x14012449), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_PSCRS11 , RULL(0x14012849), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_PSCRS11 , RULL(0x15012449), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_PSCRS11 , RULL(0x15012849), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CME_SCOM_PSCRS12 , RULL(0x1001284A), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 1001244A, +REG64( EQ_0_CME_SCOM_PSCRS12 , RULL(0x1001284A), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 1001244A, +REG64( EQ_1_CME_SCOM_PSCRS12 , RULL(0x1101284A), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 1101244A, +REG64( EQ_2_CME_SCOM_PSCRS12 , RULL(0x1201284A), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 1201244A, +REG64( EQ_3_CME_SCOM_PSCRS12 , RULL(0x1301284A), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 1301244A, +REG64( EQ_4_CME_SCOM_PSCRS12 , RULL(0x1401284A), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 1401244A, +REG64( EQ_5_CME_SCOM_PSCRS12 , RULL(0x1501284A), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 1501244A, +REG64( EX_CME_SCOM_PSCRS12 , RULL(0x1001244A), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_PSCRS12 , RULL(0x1001244A), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_PSCRS12 , RULL(0x1001284A), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_PSCRS12 , RULL(0x1101244A), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_PSCRS12 , RULL(0x1101284A), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_PSCRS12 , RULL(0x1201244A), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_PSCRS12 , RULL(0x1201284A), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_PSCRS12 , RULL(0x1301244A), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_PSCRS12 , RULL(0x1301284A), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_PSCRS12 , RULL(0x1401244A), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_PSCRS12 , RULL(0x1401284A), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_PSCRS12 , RULL(0x1501244A), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_PSCRS12 , RULL(0x1501284A), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CME_SCOM_PSCRS13 , RULL(0x1001284B), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 1001244B, +REG64( EQ_0_CME_SCOM_PSCRS13 , RULL(0x1001284B), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 1001244B, +REG64( EQ_1_CME_SCOM_PSCRS13 , RULL(0x1101284B), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 1101244B, +REG64( EQ_2_CME_SCOM_PSCRS13 , RULL(0x1201284B), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 1201244B, +REG64( EQ_3_CME_SCOM_PSCRS13 , RULL(0x1301284B), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 1301244B, +REG64( EQ_4_CME_SCOM_PSCRS13 , RULL(0x1401284B), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 1401244B, +REG64( EQ_5_CME_SCOM_PSCRS13 , RULL(0x1501284B), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 1501244B, +REG64( EX_CME_SCOM_PSCRS13 , RULL(0x1001244B), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_PSCRS13 , RULL(0x1001244B), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_PSCRS13 , RULL(0x1001284B), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_PSCRS13 , RULL(0x1101244B), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_PSCRS13 , RULL(0x1101284B), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_PSCRS13 , RULL(0x1201244B), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_PSCRS13 , RULL(0x1201284B), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_PSCRS13 , RULL(0x1301244B), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_PSCRS13 , RULL(0x1301284B), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_PSCRS13 , RULL(0x1401244B), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_PSCRS13 , RULL(0x1401284B), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_PSCRS13 , RULL(0x1501244B), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_PSCRS13 , RULL(0x1501284B), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CME_SCOM_QFMR , RULL(0x10012812), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 10012412, +REG64( EQ_0_CME_SCOM_QFMR , RULL(0x10012812), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 10012412, +REG64( EQ_1_CME_SCOM_QFMR , RULL(0x11012812), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 11012412, +REG64( EQ_2_CME_SCOM_QFMR , RULL(0x12012812), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 12012412, +REG64( EQ_3_CME_SCOM_QFMR , RULL(0x13012812), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 13012412, +REG64( EQ_4_CME_SCOM_QFMR , RULL(0x14012812), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 14012412, +REG64( EQ_5_CME_SCOM_QFMR , RULL(0x15012812), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 15012412, +REG64( EX_CME_SCOM_QFMR , RULL(0x10012412), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_CME_SCOM_QFMR , RULL(0x10012412), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_CME_SCOM_QFMR , RULL(0x10012812), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_CME_SCOM_QFMR , RULL(0x11012412), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_CME_SCOM_QFMR , RULL(0x11012812), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_CME_SCOM_QFMR , RULL(0x12012412), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_CME_SCOM_QFMR , RULL(0x12012812), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_CME_SCOM_QFMR , RULL(0x13012412), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_CME_SCOM_QFMR , RULL(0x13012812), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_CME_SCOM_QFMR , RULL(0x14012412), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_CME_SCOM_QFMR , RULL(0x14012812), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_CME_SCOM_QFMR , RULL(0x15012412), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_CME_SCOM_QFMR , RULL(0x15012812), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_CME_SCOM_SICR_SCOM , RULL(0x1001281D), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 1001241D, +REG64( EQ_CME_SCOM_SICR_SCOM1 , RULL(0x1001281E), SH_UNT_EQ , + SH_ACS_SCOM1 ); //DUPS: 1001241E, +REG64( EQ_CME_SCOM_SICR_SCOM2 , RULL(0x1001281F), SH_UNT_EQ , + SH_ACS_SCOM2 ); //DUPS: 1001241F, +REG64( EQ_0_CME_SCOM_SICR_SCOM , RULL(0x1001281D), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 1001241D, +REG64( EQ_0_CME_SCOM_SICR_SCOM1 , RULL(0x1001281E), SH_UNT_EQ_0 , + SH_ACS_SCOM1 ); //DUPS: 1001241E, +REG64( EQ_0_CME_SCOM_SICR_SCOM2 , RULL(0x1001281F), SH_UNT_EQ_0 , + SH_ACS_SCOM2 ); //DUPS: 1001241F, +REG64( EQ_1_CME_SCOM_SICR_SCOM , RULL(0x1101281D), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 1101241D, +REG64( EQ_1_CME_SCOM_SICR_SCOM1 , RULL(0x1101281E), SH_UNT_EQ_1 , + SH_ACS_SCOM1 ); //DUPS: 1101241E, +REG64( EQ_1_CME_SCOM_SICR_SCOM2 , RULL(0x1101281F), SH_UNT_EQ_1 , + SH_ACS_SCOM2 ); //DUPS: 1101241F, +REG64( EQ_2_CME_SCOM_SICR_SCOM , RULL(0x1201281D), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 1201241D, +REG64( EQ_2_CME_SCOM_SICR_SCOM1 , RULL(0x1201281E), SH_UNT_EQ_2 , + SH_ACS_SCOM1 ); //DUPS: 1201241E, +REG64( EQ_2_CME_SCOM_SICR_SCOM2 , RULL(0x1201281F), SH_UNT_EQ_2 , + SH_ACS_SCOM2 ); //DUPS: 1201241F, +REG64( EQ_3_CME_SCOM_SICR_SCOM , RULL(0x1301281D), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 1301241D, +REG64( EQ_3_CME_SCOM_SICR_SCOM1 , RULL(0x1301281E), SH_UNT_EQ_3 , + SH_ACS_SCOM1 ); //DUPS: 1301241E, +REG64( EQ_3_CME_SCOM_SICR_SCOM2 , RULL(0x1301281F), SH_UNT_EQ_3 , + SH_ACS_SCOM2 ); //DUPS: 1301241F, +REG64( EQ_4_CME_SCOM_SICR_SCOM , RULL(0x1401281D), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 1401241D, +REG64( EQ_4_CME_SCOM_SICR_SCOM1 , RULL(0x1401281E), SH_UNT_EQ_4 , + SH_ACS_SCOM1 ); //DUPS: 1401241E, +REG64( EQ_4_CME_SCOM_SICR_SCOM2 , RULL(0x1401281F), SH_UNT_EQ_4 , + SH_ACS_SCOM2 ); //DUPS: 1401241F, +REG64( EQ_5_CME_SCOM_SICR_SCOM , RULL(0x1501281D), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 1501241D, +REG64( EQ_5_CME_SCOM_SICR_SCOM1 , RULL(0x1501281E), SH_UNT_EQ_5 , + SH_ACS_SCOM1 ); //DUPS: 1501241E, +REG64( EQ_5_CME_SCOM_SICR_SCOM2 , RULL(0x1501281F), SH_UNT_EQ_5 , + SH_ACS_SCOM2 ); //DUPS: 1501241F, +REG64( EX_CME_SCOM_SICR_SCOM , RULL(0x1001241D), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_CME_SCOM_SICR_SCOM1 , RULL(0x1001241E), SH_UNT_EX , SH_ACS_SCOM1 ); +REG64( EX_CME_SCOM_SICR_SCOM2 , RULL(0x1001241F), SH_UNT_EX , SH_ACS_SCOM2 ); +REG64( EX_0_CME_SCOM_SICR_SCOM , RULL(0x1001241D), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_0_CME_SCOM_SICR_SCOM1 , RULL(0x1001241E), SH_UNT_EX_0 , SH_ACS_SCOM1 ); +REG64( EX_0_CME_SCOM_SICR_SCOM2 , RULL(0x1001241F), SH_UNT_EX_0 , SH_ACS_SCOM2 ); +REG64( EX_1_CME_SCOM_SICR_SCOM , RULL(0x1001281D), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_1_CME_SCOM_SICR_SCOM1 , RULL(0x1001281E), SH_UNT_EX_1 , SH_ACS_SCOM1 ); +REG64( EX_1_CME_SCOM_SICR_SCOM2 , RULL(0x1001281F), SH_UNT_EX_1 , SH_ACS_SCOM2 ); +REG64( EX_2_CME_SCOM_SICR_SCOM , RULL(0x1101241D), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_2_CME_SCOM_SICR_SCOM1 , RULL(0x1101241E), SH_UNT_EX_2 , SH_ACS_SCOM1 ); +REG64( EX_2_CME_SCOM_SICR_SCOM2 , RULL(0x1101241F), SH_UNT_EX_2 , SH_ACS_SCOM2 ); +REG64( EX_3_CME_SCOM_SICR_SCOM , RULL(0x1101281D), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_3_CME_SCOM_SICR_SCOM1 , RULL(0x1101281E), SH_UNT_EX_3 , SH_ACS_SCOM1 ); +REG64( EX_3_CME_SCOM_SICR_SCOM2 , RULL(0x1101281F), SH_UNT_EX_3 , SH_ACS_SCOM2 ); +REG64( EX_4_CME_SCOM_SICR_SCOM , RULL(0x1201241D), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_4_CME_SCOM_SICR_SCOM1 , RULL(0x1201241E), SH_UNT_EX_4 , SH_ACS_SCOM1 ); +REG64( EX_4_CME_SCOM_SICR_SCOM2 , RULL(0x1201241F), SH_UNT_EX_4 , SH_ACS_SCOM2 ); +REG64( EX_5_CME_SCOM_SICR_SCOM , RULL(0x1201281D), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_5_CME_SCOM_SICR_SCOM1 , RULL(0x1201281E), SH_UNT_EX_5 , SH_ACS_SCOM1 ); +REG64( EX_5_CME_SCOM_SICR_SCOM2 , RULL(0x1201281F), SH_UNT_EX_5 , SH_ACS_SCOM2 ); +REG64( EX_6_CME_SCOM_SICR_SCOM , RULL(0x1301241D), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_6_CME_SCOM_SICR_SCOM1 , RULL(0x1301241E), SH_UNT_EX_6 , SH_ACS_SCOM1 ); +REG64( EX_6_CME_SCOM_SICR_SCOM2 , RULL(0x1301241F), SH_UNT_EX_6 , SH_ACS_SCOM2 ); +REG64( EX_7_CME_SCOM_SICR_SCOM , RULL(0x1301281D), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_7_CME_SCOM_SICR_SCOM1 , RULL(0x1301281E), SH_UNT_EX_7 , SH_ACS_SCOM1 ); +REG64( EX_7_CME_SCOM_SICR_SCOM2 , RULL(0x1301281F), SH_UNT_EX_7 , SH_ACS_SCOM2 ); +REG64( EX_8_CME_SCOM_SICR_SCOM , RULL(0x1401241D), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_8_CME_SCOM_SICR_SCOM1 , RULL(0x1401241E), SH_UNT_EX_8 , SH_ACS_SCOM1 ); +REG64( EX_8_CME_SCOM_SICR_SCOM2 , RULL(0x1401241F), SH_UNT_EX_8 , SH_ACS_SCOM2 ); +REG64( EX_9_CME_SCOM_SICR_SCOM , RULL(0x1401281D), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_9_CME_SCOM_SICR_SCOM1 , RULL(0x1401281E), SH_UNT_EX_9 , SH_ACS_SCOM1 ); +REG64( EX_9_CME_SCOM_SICR_SCOM2 , RULL(0x1401281F), SH_UNT_EX_9 , SH_ACS_SCOM2 ); +REG64( EX_10_CME_SCOM_SICR_SCOM , RULL(0x1501241D), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_10_CME_SCOM_SICR_SCOM1 , RULL(0x1501241E), SH_UNT_EX_10 , SH_ACS_SCOM1 ); +REG64( EX_10_CME_SCOM_SICR_SCOM2 , RULL(0x1501241F), SH_UNT_EX_10 , SH_ACS_SCOM2 ); +REG64( EX_11_CME_SCOM_SICR_SCOM , RULL(0x1501281D), SH_UNT_EX_11 , SH_ACS_SCOM ); +REG64( EX_11_CME_SCOM_SICR_SCOM1 , RULL(0x1501281E), SH_UNT_EX_11 , SH_ACS_SCOM1 ); +REG64( EX_11_CME_SCOM_SICR_SCOM2 , RULL(0x1501281F), SH_UNT_EX_11 , SH_ACS_SCOM2 ); + +REG64( EQ_CME_SCOM_SRTCH0 , RULL(0x10012823), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012423, +REG64( EQ_0_CME_SCOM_SRTCH0 , RULL(0x10012823), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012423, +REG64( EQ_1_CME_SCOM_SRTCH0 , RULL(0x11012823), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012423, +REG64( EQ_2_CME_SCOM_SRTCH0 , RULL(0x12012823), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012423, +REG64( EQ_3_CME_SCOM_SRTCH0 , RULL(0x13012823), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012423, +REG64( EQ_4_CME_SCOM_SRTCH0 , RULL(0x14012823), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012423, +REG64( EQ_5_CME_SCOM_SRTCH0 , RULL(0x15012823), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012423, +REG64( EX_CME_SCOM_SRTCH0 , RULL(0x10012423), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_SRTCH0 , RULL(0x10012423), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_SRTCH0 , RULL(0x10012823), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_SRTCH0 , RULL(0x11012423), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_SRTCH0 , RULL(0x11012823), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_SRTCH0 , RULL(0x12012423), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_SRTCH0 , RULL(0x12012823), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_SRTCH0 , RULL(0x13012423), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_SRTCH0 , RULL(0x13012823), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_SRTCH0 , RULL(0x14012423), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_SRTCH0 , RULL(0x14012823), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_SRTCH0 , RULL(0x15012423), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_SRTCH0 , RULL(0x15012823), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CME_SCOM_SRTCH1 , RULL(0x10012824), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012424, +REG64( EQ_0_CME_SCOM_SRTCH1 , RULL(0x10012824), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012424, +REG64( EQ_1_CME_SCOM_SRTCH1 , RULL(0x11012824), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012424, +REG64( EQ_2_CME_SCOM_SRTCH1 , RULL(0x12012824), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012424, +REG64( EQ_3_CME_SCOM_SRTCH1 , RULL(0x13012824), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012424, +REG64( EQ_4_CME_SCOM_SRTCH1 , RULL(0x14012824), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012424, +REG64( EQ_5_CME_SCOM_SRTCH1 , RULL(0x15012824), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012424, +REG64( EX_CME_SCOM_SRTCH1 , RULL(0x10012424), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CME_SCOM_SRTCH1 , RULL(0x10012424), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CME_SCOM_SRTCH1 , RULL(0x10012824), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CME_SCOM_SRTCH1 , RULL(0x11012424), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CME_SCOM_SRTCH1 , RULL(0x11012824), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CME_SCOM_SRTCH1 , RULL(0x12012424), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CME_SCOM_SRTCH1 , RULL(0x12012824), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CME_SCOM_SRTCH1 , RULL(0x13012424), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CME_SCOM_SRTCH1 , RULL(0x13012824), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CME_SCOM_SRTCH1 , RULL(0x14012424), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CME_SCOM_SRTCH1 , RULL(0x14012824), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CME_SCOM_SRTCH1 , RULL(0x15012424), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CME_SCOM_SRTCH1 , RULL(0x15012824), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CME_SCOM_VDSR , RULL(0x10012817), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 10012417, +REG64( EQ_0_CME_SCOM_VDSR , RULL(0x10012817), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 10012417, +REG64( EQ_1_CME_SCOM_VDSR , RULL(0x11012817), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 11012417, +REG64( EQ_2_CME_SCOM_VDSR , RULL(0x12012817), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 12012417, +REG64( EQ_3_CME_SCOM_VDSR , RULL(0x13012817), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 13012417, +REG64( EQ_4_CME_SCOM_VDSR , RULL(0x14012817), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 14012417, +REG64( EQ_5_CME_SCOM_VDSR , RULL(0x15012817), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 15012417, +REG64( EX_CME_SCOM_VDSR , RULL(0x10012417), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_CME_SCOM_VDSR , RULL(0x10012417), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_CME_SCOM_VDSR , RULL(0x10012817), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_CME_SCOM_VDSR , RULL(0x11012417), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_CME_SCOM_VDSR , RULL(0x11012817), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_CME_SCOM_VDSR , RULL(0x12012417), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_CME_SCOM_VDSR , RULL(0x12012817), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_CME_SCOM_VDSR , RULL(0x13012417), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_CME_SCOM_VDSR , RULL(0x13012817), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_CME_SCOM_VDSR , RULL(0x14012417), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_CME_SCOM_VDSR , RULL(0x14012817), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_CME_SCOM_VDSR , RULL(0x15012417), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_CME_SCOM_VDSR , RULL(0x15012817), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_CME_SCOM_VTSR0 , RULL(0x10012815), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 10012415, +REG64( EQ_0_CME_SCOM_VTSR0 , RULL(0x10012815), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 10012415, +REG64( EQ_1_CME_SCOM_VTSR0 , RULL(0x11012815), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 11012415, +REG64( EQ_2_CME_SCOM_VTSR0 , RULL(0x12012815), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 12012415, +REG64( EQ_3_CME_SCOM_VTSR0 , RULL(0x13012815), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 13012415, +REG64( EQ_4_CME_SCOM_VTSR0 , RULL(0x14012815), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 14012415, +REG64( EQ_5_CME_SCOM_VTSR0 , RULL(0x15012815), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 15012415, +REG64( EX_CME_SCOM_VTSR0 , RULL(0x10012415), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_CME_SCOM_VTSR0 , RULL(0x10012415), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_CME_SCOM_VTSR0 , RULL(0x10012815), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_CME_SCOM_VTSR0 , RULL(0x11012415), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_CME_SCOM_VTSR0 , RULL(0x11012815), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_CME_SCOM_VTSR0 , RULL(0x12012415), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_CME_SCOM_VTSR0 , RULL(0x12012815), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_CME_SCOM_VTSR0 , RULL(0x13012415), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_CME_SCOM_VTSR0 , RULL(0x13012815), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_CME_SCOM_VTSR0 , RULL(0x14012415), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_CME_SCOM_VTSR0 , RULL(0x14012815), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_CME_SCOM_VTSR0 , RULL(0x15012415), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_CME_SCOM_VTSR0 , RULL(0x15012815), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_CME_SCOM_VTSR1 , RULL(0x10012816), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 10012416, +REG64( EQ_0_CME_SCOM_VTSR1 , RULL(0x10012816), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 10012416, +REG64( EQ_1_CME_SCOM_VTSR1 , RULL(0x11012816), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 11012416, +REG64( EQ_2_CME_SCOM_VTSR1 , RULL(0x12012816), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 12012416, +REG64( EQ_3_CME_SCOM_VTSR1 , RULL(0x13012816), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 13012416, +REG64( EQ_4_CME_SCOM_VTSR1 , RULL(0x14012816), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 14012416, +REG64( EQ_5_CME_SCOM_VTSR1 , RULL(0x15012816), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 15012416, +REG64( EX_CME_SCOM_VTSR1 , RULL(0x10012416), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_CME_SCOM_VTSR1 , RULL(0x10012416), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_CME_SCOM_VTSR1 , RULL(0x10012816), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_CME_SCOM_VTSR1 , RULL(0x11012416), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_CME_SCOM_VTSR1 , RULL(0x11012816), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_CME_SCOM_VTSR1 , RULL(0x12012416), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_CME_SCOM_VTSR1 , RULL(0x12012816), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_CME_SCOM_VTSR1 , RULL(0x13012416), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_CME_SCOM_VTSR1 , RULL(0x13012816), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_CME_SCOM_VTSR1 , RULL(0x14012416), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_CME_SCOM_VTSR1 , RULL(0x14012816), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_CME_SCOM_VTSR1 , RULL(0x15012416), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_CME_SCOM_VTSR1 , RULL(0x15012816), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_CME_SCOM_XIPCBMD0 , RULL(0x1001283C), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 1001243C, +REG64( EQ_0_CME_SCOM_XIPCBMD0 , RULL(0x1001283C), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 1001243C, +REG64( EQ_1_CME_SCOM_XIPCBMD0 , RULL(0x1101283C), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 1101243C, +REG64( EQ_2_CME_SCOM_XIPCBMD0 , RULL(0x1201283C), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 1201243C, +REG64( EQ_3_CME_SCOM_XIPCBMD0 , RULL(0x1301283C), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 1301243C, +REG64( EQ_4_CME_SCOM_XIPCBMD0 , RULL(0x1401283C), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 1401243C, +REG64( EQ_5_CME_SCOM_XIPCBMD0 , RULL(0x1501283C), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 1501243C, +REG64( EX_CME_SCOM_XIPCBMD0 , RULL(0x1001243C), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_CME_SCOM_XIPCBMD0 , RULL(0x1001243C), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_CME_SCOM_XIPCBMD0 , RULL(0x1001283C), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_CME_SCOM_XIPCBMD0 , RULL(0x1101243C), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_CME_SCOM_XIPCBMD0 , RULL(0x1101283C), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_CME_SCOM_XIPCBMD0 , RULL(0x1201243C), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_CME_SCOM_XIPCBMD0 , RULL(0x1201283C), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_CME_SCOM_XIPCBMD0 , RULL(0x1301243C), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_CME_SCOM_XIPCBMD0 , RULL(0x1301283C), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_CME_SCOM_XIPCBMD0 , RULL(0x1401243C), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_CME_SCOM_XIPCBMD0 , RULL(0x1401283C), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_CME_SCOM_XIPCBMD0 , RULL(0x1501243C), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_CME_SCOM_XIPCBMD0 , RULL(0x1501283C), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_CME_SCOM_XIPCBMD1 , RULL(0x1001283D), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 1001243D, +REG64( EQ_0_CME_SCOM_XIPCBMD1 , RULL(0x1001283D), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 1001243D, +REG64( EQ_1_CME_SCOM_XIPCBMD1 , RULL(0x1101283D), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 1101243D, +REG64( EQ_2_CME_SCOM_XIPCBMD1 , RULL(0x1201283D), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 1201243D, +REG64( EQ_3_CME_SCOM_XIPCBMD1 , RULL(0x1301283D), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 1301243D, +REG64( EQ_4_CME_SCOM_XIPCBMD1 , RULL(0x1401283D), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 1401243D, +REG64( EQ_5_CME_SCOM_XIPCBMD1 , RULL(0x1501283D), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 1501243D, +REG64( EX_CME_SCOM_XIPCBMD1 , RULL(0x1001243D), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_CME_SCOM_XIPCBMD1 , RULL(0x1001243D), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_CME_SCOM_XIPCBMD1 , RULL(0x1001283D), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_CME_SCOM_XIPCBMD1 , RULL(0x1101243D), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_CME_SCOM_XIPCBMD1 , RULL(0x1101283D), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_CME_SCOM_XIPCBMD1 , RULL(0x1201243D), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_CME_SCOM_XIPCBMD1 , RULL(0x1201283D), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_CME_SCOM_XIPCBMD1 , RULL(0x1301243D), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_CME_SCOM_XIPCBMD1 , RULL(0x1301283D), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_CME_SCOM_XIPCBMD1 , RULL(0x1401243D), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_CME_SCOM_XIPCBMD1 , RULL(0x1401283D), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_CME_SCOM_XIPCBMD1 , RULL(0x1501243D), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_CME_SCOM_XIPCBMD1 , RULL(0x1501283D), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_CME_SCOM_XIPCBMI0 , RULL(0x1001283E), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 1001243E, +REG64( EQ_0_CME_SCOM_XIPCBMI0 , RULL(0x1001283E), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 1001243E, +REG64( EQ_1_CME_SCOM_XIPCBMI0 , RULL(0x1101283E), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 1101243E, +REG64( EQ_2_CME_SCOM_XIPCBMI0 , RULL(0x1201283E), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 1201243E, +REG64( EQ_3_CME_SCOM_XIPCBMI0 , RULL(0x1301283E), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 1301243E, +REG64( EQ_4_CME_SCOM_XIPCBMI0 , RULL(0x1401283E), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 1401243E, +REG64( EQ_5_CME_SCOM_XIPCBMI0 , RULL(0x1501283E), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 1501243E, +REG64( EX_CME_SCOM_XIPCBMI0 , RULL(0x1001243E), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_CME_SCOM_XIPCBMI0 , RULL(0x1001243E), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_CME_SCOM_XIPCBMI0 , RULL(0x1001283E), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_CME_SCOM_XIPCBMI0 , RULL(0x1101243E), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_CME_SCOM_XIPCBMI0 , RULL(0x1101283E), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_CME_SCOM_XIPCBMI0 , RULL(0x1201243E), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_CME_SCOM_XIPCBMI0 , RULL(0x1201283E), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_CME_SCOM_XIPCBMI0 , RULL(0x1301243E), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_CME_SCOM_XIPCBMI0 , RULL(0x1301283E), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_CME_SCOM_XIPCBMI0 , RULL(0x1401243E), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_CME_SCOM_XIPCBMI0 , RULL(0x1401283E), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_CME_SCOM_XIPCBMI0 , RULL(0x1501243E), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_CME_SCOM_XIPCBMI0 , RULL(0x1501283E), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_CME_SCOM_XIPCBMI1 , RULL(0x1001283F), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 1001243F, +REG64( EQ_0_CME_SCOM_XIPCBMI1 , RULL(0x1001283F), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 1001243F, +REG64( EQ_1_CME_SCOM_XIPCBMI1 , RULL(0x1101283F), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 1101243F, +REG64( EQ_2_CME_SCOM_XIPCBMI1 , RULL(0x1201283F), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 1201243F, +REG64( EQ_3_CME_SCOM_XIPCBMI1 , RULL(0x1301283F), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 1301243F, +REG64( EQ_4_CME_SCOM_XIPCBMI1 , RULL(0x1401283F), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 1401243F, +REG64( EQ_5_CME_SCOM_XIPCBMI1 , RULL(0x1501283F), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 1501243F, +REG64( EX_CME_SCOM_XIPCBMI1 , RULL(0x1001243F), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_CME_SCOM_XIPCBMI1 , RULL(0x1001243F), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_CME_SCOM_XIPCBMI1 , RULL(0x1001283F), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_CME_SCOM_XIPCBMI1 , RULL(0x1101243F), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_CME_SCOM_XIPCBMI1 , RULL(0x1101283F), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_CME_SCOM_XIPCBMI1 , RULL(0x1201243F), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_CME_SCOM_XIPCBMI1 , RULL(0x1201283F), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_CME_SCOM_XIPCBMI1 , RULL(0x1301243F), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_CME_SCOM_XIPCBMI1 , RULL(0x1301283F), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_CME_SCOM_XIPCBMI1 , RULL(0x1401243F), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_CME_SCOM_XIPCBMI1 , RULL(0x1401283F), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_CME_SCOM_XIPCBMI1 , RULL(0x1501243F), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_CME_SCOM_XIPCBMI1 , RULL(0x1501283F), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_CME_SCOM_XIPCBQ0 , RULL(0x1001283A), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 1001243A, +REG64( EQ_0_CME_SCOM_XIPCBQ0 , RULL(0x1001283A), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 1001243A, +REG64( EQ_1_CME_SCOM_XIPCBQ0 , RULL(0x1101283A), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 1101243A, +REG64( EQ_2_CME_SCOM_XIPCBQ0 , RULL(0x1201283A), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 1201243A, +REG64( EQ_3_CME_SCOM_XIPCBQ0 , RULL(0x1301283A), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 1301243A, +REG64( EQ_4_CME_SCOM_XIPCBQ0 , RULL(0x1401283A), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 1401243A, +REG64( EQ_5_CME_SCOM_XIPCBQ0 , RULL(0x1501283A), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 1501243A, +REG64( EX_CME_SCOM_XIPCBQ0 , RULL(0x1001243A), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_CME_SCOM_XIPCBQ0 , RULL(0x1001243A), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_CME_SCOM_XIPCBQ0 , RULL(0x1001283A), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_CME_SCOM_XIPCBQ0 , RULL(0x1101243A), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_CME_SCOM_XIPCBQ0 , RULL(0x1101283A), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_CME_SCOM_XIPCBQ0 , RULL(0x1201243A), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_CME_SCOM_XIPCBQ0 , RULL(0x1201283A), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_CME_SCOM_XIPCBQ0 , RULL(0x1301243A), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_CME_SCOM_XIPCBQ0 , RULL(0x1301283A), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_CME_SCOM_XIPCBQ0 , RULL(0x1401243A), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_CME_SCOM_XIPCBQ0 , RULL(0x1401283A), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_CME_SCOM_XIPCBQ0 , RULL(0x1501243A), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_CME_SCOM_XIPCBQ0 , RULL(0x1501283A), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_CME_SCOM_XIPCBQ1 , RULL(0x1001283B), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 1001243B, +REG64( EQ_0_CME_SCOM_XIPCBQ1 , RULL(0x1001283B), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 1001243B, +REG64( EQ_1_CME_SCOM_XIPCBQ1 , RULL(0x1101283B), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 1101243B, +REG64( EQ_2_CME_SCOM_XIPCBQ1 , RULL(0x1201283B), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 1201243B, +REG64( EQ_3_CME_SCOM_XIPCBQ1 , RULL(0x1301283B), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 1301243B, +REG64( EQ_4_CME_SCOM_XIPCBQ1 , RULL(0x1401283B), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 1401243B, +REG64( EQ_5_CME_SCOM_XIPCBQ1 , RULL(0x1501283B), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 1501243B, +REG64( EX_CME_SCOM_XIPCBQ1 , RULL(0x1001243B), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_CME_SCOM_XIPCBQ1 , RULL(0x1001243B), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_CME_SCOM_XIPCBQ1 , RULL(0x1001283B), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_CME_SCOM_XIPCBQ1 , RULL(0x1101243B), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_CME_SCOM_XIPCBQ1 , RULL(0x1101283B), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_CME_SCOM_XIPCBQ1 , RULL(0x1201243B), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_CME_SCOM_XIPCBQ1 , RULL(0x1201283B), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_CME_SCOM_XIPCBQ1 , RULL(0x1301243B), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_CME_SCOM_XIPCBQ1 , RULL(0x1301283B), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_CME_SCOM_XIPCBQ1 , RULL(0x1401243B), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_CME_SCOM_XIPCBQ1 , RULL(0x1401283B), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_CME_SCOM_XIPCBQ1 , RULL(0x1501243B), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_CME_SCOM_XIPCBQ1 , RULL(0x1501283B), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( C_CONTROL_REG , RULL(0x20050012), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_CONTROL_REG , RULL(0x20050012), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_CONTROL_REG , RULL(0x21050012), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_CONTROL_REG , RULL(0x22050012), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_CONTROL_REG , RULL(0x23050012), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_CONTROL_REG , RULL(0x24050012), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_CONTROL_REG , RULL(0x25050012), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_CONTROL_REG , RULL(0x26050012), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_CONTROL_REG , RULL(0x27050012), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_CONTROL_REG , RULL(0x28050012), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_CONTROL_REG , RULL(0x29050012), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_CONTROL_REG , RULL(0x2A050012), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_CONTROL_REG , RULL(0x2B050012), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_CONTROL_REG , RULL(0x2C050012), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_CONTROL_REG , RULL(0x2D050012), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_CONTROL_REG , RULL(0x2E050012), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_CONTROL_REG , RULL(0x2F050012), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_CONTROL_REG , RULL(0x30050012), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_CONTROL_REG , RULL(0x31050012), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_CONTROL_REG , RULL(0x32050012), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_CONTROL_REG , RULL(0x33050012), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_CONTROL_REG , RULL(0x34050012), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_CONTROL_REG , RULL(0x35050012), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_CONTROL_REG , RULL(0x36050012), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_CONTROL_REG , RULL(0x37050012), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_CONTROL_REG , RULL(0x10050012), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_CONTROL_REG , RULL(0x10050012), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_CONTROL_REG , RULL(0x11050012), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_CONTROL_REG , RULL(0x12050012), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_CONTROL_REG , RULL(0x13050012), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_CONTROL_REG , RULL(0x14050012), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_CONTROL_REG , RULL(0x15050012), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_CONTROL_REG , RULL(0x20050012), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21050012, +REG64( EX_0_CONTROL_REG , RULL(0x20050012), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21050012, +REG64( EX_1_CONTROL_REG , RULL(0x22050012), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23050012, +REG64( EX_2_CONTROL_REG , RULL(0x24050012), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25050012, +REG64( EX_3_CONTROL_REG , RULL(0x26050012), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27050012, +REG64( EX_4_CONTROL_REG , RULL(0x28050012), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29050012, +REG64( EX_5_CONTROL_REG , RULL(0x2A050012), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B050012, +REG64( EX_6_CONTROL_REG , RULL(0x2C050012), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D050012, +REG64( EX_7_CONTROL_REG , RULL(0x2E050012), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F050012, +REG64( EX_8_CONTROL_REG , RULL(0x30050012), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31050012, +REG64( EX_9_CONTROL_REG , RULL(0x32050012), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33050012, +REG64( EX_10_CONTROL_REG , RULL(0x34050012), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35050012, +REG64( EX_11_CONTROL_REG , RULL(0x36050012), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37050012, + +REG64( C_CORE_ACTION0 , RULL(0x20010A46), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_CORE_ACTION0 , RULL(0x20010A46), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_CORE_ACTION0 , RULL(0x21010A46), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_CORE_ACTION0 , RULL(0x22010A46), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_CORE_ACTION0 , RULL(0x23010A46), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_CORE_ACTION0 , RULL(0x24010A46), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_CORE_ACTION0 , RULL(0x25010A46), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_CORE_ACTION0 , RULL(0x26010A46), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_CORE_ACTION0 , RULL(0x27010A46), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_CORE_ACTION0 , RULL(0x28010A46), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_CORE_ACTION0 , RULL(0x29010A46), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_CORE_ACTION0 , RULL(0x2A010A46), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_CORE_ACTION0 , RULL(0x2B010A46), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_CORE_ACTION0 , RULL(0x2C010A46), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_CORE_ACTION0 , RULL(0x2D010A46), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_CORE_ACTION0 , RULL(0x2E010A46), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_CORE_ACTION0 , RULL(0x2F010A46), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_CORE_ACTION0 , RULL(0x30010A46), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_CORE_ACTION0 , RULL(0x31010A46), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_CORE_ACTION0 , RULL(0x32010A46), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_CORE_ACTION0 , RULL(0x33010A46), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_CORE_ACTION0 , RULL(0x34010A46), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_CORE_ACTION0 , RULL(0x35010A46), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_CORE_ACTION0 , RULL(0x36010A46), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_CORE_ACTION0 , RULL(0x37010A46), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_CORE_ACTION0 , RULL(0x20010A46), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RW ); //DUPS: 21010A46, +REG64( EX_10_L2_CORE_ACTION0 , RULL(0x34010A46), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RW ); //DUPS: 35010A46, +REG64( EX_11_L2_CORE_ACTION0 , RULL(0x36010A46), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RW ); //DUPS: 37010A46, +REG64( EX_1_L2_CORE_ACTION0 , RULL(0x22010A46), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RW ); //DUPS: 23010A46, +REG64( EX_2_L2_CORE_ACTION0 , RULL(0x24010A46), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RW ); //DUPS: 25010A46, +REG64( EX_3_L2_CORE_ACTION0 , RULL(0x26010A46), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RW ); //DUPS: 27010A46, +REG64( EX_4_L2_CORE_ACTION0 , RULL(0x28010A46), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RW ); //DUPS: 29010A46, +REG64( EX_5_L2_CORE_ACTION0 , RULL(0x2A010A46), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2B010A46, +REG64( EX_6_L2_CORE_ACTION0 , RULL(0x2C010A46), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2D010A46, +REG64( EX_7_L2_CORE_ACTION0 , RULL(0x2E010A46), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2F010A46, +REG64( EX_8_L2_CORE_ACTION0 , RULL(0x30010A46), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RW ); //DUPS: 31010A46, +REG64( EX_9_L2_CORE_ACTION0 , RULL(0x32010A46), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RW ); //DUPS: 33010A46, +REG64( EX_L2_CORE_ACTION0 , RULL(0x20010A46), SH_UNT_EX_L2 , + SH_ACS_SCOM_RW ); //DUPS: 21010A46, + +REG64( C_CORE_ACTION1 , RULL(0x20010A47), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_CORE_ACTION1 , RULL(0x20010A47), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_CORE_ACTION1 , RULL(0x21010A47), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_CORE_ACTION1 , RULL(0x22010A47), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_CORE_ACTION1 , RULL(0x23010A47), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_CORE_ACTION1 , RULL(0x24010A47), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_CORE_ACTION1 , RULL(0x25010A47), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_CORE_ACTION1 , RULL(0x26010A47), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_CORE_ACTION1 , RULL(0x27010A47), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_CORE_ACTION1 , RULL(0x28010A47), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_CORE_ACTION1 , RULL(0x29010A47), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_CORE_ACTION1 , RULL(0x2A010A47), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_CORE_ACTION1 , RULL(0x2B010A47), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_CORE_ACTION1 , RULL(0x2C010A47), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_CORE_ACTION1 , RULL(0x2D010A47), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_CORE_ACTION1 , RULL(0x2E010A47), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_CORE_ACTION1 , RULL(0x2F010A47), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_CORE_ACTION1 , RULL(0x30010A47), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_CORE_ACTION1 , RULL(0x31010A47), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_CORE_ACTION1 , RULL(0x32010A47), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_CORE_ACTION1 , RULL(0x33010A47), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_CORE_ACTION1 , RULL(0x34010A47), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_CORE_ACTION1 , RULL(0x35010A47), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_CORE_ACTION1 , RULL(0x36010A47), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_CORE_ACTION1 , RULL(0x37010A47), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_CORE_ACTION1 , RULL(0x20010A47), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RW ); //DUPS: 21010A47, +REG64( EX_10_L2_CORE_ACTION1 , RULL(0x34010A47), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RW ); //DUPS: 35010A47, +REG64( EX_11_L2_CORE_ACTION1 , RULL(0x36010A47), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RW ); //DUPS: 37010A47, +REG64( EX_1_L2_CORE_ACTION1 , RULL(0x22010A47), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RW ); //DUPS: 23010A47, +REG64( EX_2_L2_CORE_ACTION1 , RULL(0x24010A47), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RW ); //DUPS: 25010A47, +REG64( EX_3_L2_CORE_ACTION1 , RULL(0x26010A47), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RW ); //DUPS: 27010A47, +REG64( EX_4_L2_CORE_ACTION1 , RULL(0x28010A47), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RW ); //DUPS: 29010A47, +REG64( EX_5_L2_CORE_ACTION1 , RULL(0x2A010A47), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2B010A47, +REG64( EX_6_L2_CORE_ACTION1 , RULL(0x2C010A47), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2D010A47, +REG64( EX_7_L2_CORE_ACTION1 , RULL(0x2E010A47), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2F010A47, +REG64( EX_8_L2_CORE_ACTION1 , RULL(0x30010A47), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RW ); //DUPS: 31010A47, +REG64( EX_9_L2_CORE_ACTION1 , RULL(0x32010A47), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RW ); //DUPS: 33010A47, +REG64( EX_L2_CORE_ACTION1 , RULL(0x20010A47), SH_UNT_EX_L2 , + SH_ACS_SCOM_RW ); //DUPS: 21010A47, + +REG64( C_CORE_FIR , RULL(0x20010A40), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_CORE_FIR_AND , RULL(0x20010A41), SH_UNT_C , SH_ACS_SCOM1_AND ); +REG64( C_CORE_FIR_OR , RULL(0x20010A42), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_CORE_FIR , RULL(0x20010A40), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_CORE_FIR_AND , RULL(0x20010A41), SH_UNT_C_0 , SH_ACS_SCOM1_AND ); +REG64( C_0_CORE_FIR_OR , RULL(0x20010A42), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_CORE_FIR , RULL(0x21010A40), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_CORE_FIR_AND , RULL(0x21010A41), SH_UNT_C_1 , SH_ACS_SCOM1_AND ); +REG64( C_1_CORE_FIR_OR , RULL(0x21010A42), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_CORE_FIR , RULL(0x22010A40), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_CORE_FIR_AND , RULL(0x22010A41), SH_UNT_C_2 , SH_ACS_SCOM1_AND ); +REG64( C_2_CORE_FIR_OR , RULL(0x22010A42), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_CORE_FIR , RULL(0x23010A40), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_CORE_FIR_AND , RULL(0x23010A41), SH_UNT_C_3 , SH_ACS_SCOM1_AND ); +REG64( C_3_CORE_FIR_OR , RULL(0x23010A42), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_CORE_FIR , RULL(0x24010A40), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_CORE_FIR_AND , RULL(0x24010A41), SH_UNT_C_4 , SH_ACS_SCOM1_AND ); +REG64( C_4_CORE_FIR_OR , RULL(0x24010A42), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_CORE_FIR , RULL(0x25010A40), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_CORE_FIR_AND , RULL(0x25010A41), SH_UNT_C_5 , SH_ACS_SCOM1_AND ); +REG64( C_5_CORE_FIR_OR , RULL(0x25010A42), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_CORE_FIR , RULL(0x26010A40), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_CORE_FIR_AND , RULL(0x26010A41), SH_UNT_C_6 , SH_ACS_SCOM1_AND ); +REG64( C_6_CORE_FIR_OR , RULL(0x26010A42), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_CORE_FIR , RULL(0x27010A40), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_CORE_FIR_AND , RULL(0x27010A41), SH_UNT_C_7 , SH_ACS_SCOM1_AND ); +REG64( C_7_CORE_FIR_OR , RULL(0x27010A42), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_CORE_FIR , RULL(0x28010A40), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_CORE_FIR_AND , RULL(0x28010A41), SH_UNT_C_8 , SH_ACS_SCOM1_AND ); +REG64( C_8_CORE_FIR_OR , RULL(0x28010A42), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_CORE_FIR , RULL(0x29010A40), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_CORE_FIR_AND , RULL(0x29010A41), SH_UNT_C_9 , SH_ACS_SCOM1_AND ); +REG64( C_9_CORE_FIR_OR , RULL(0x29010A42), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_CORE_FIR , RULL(0x2A010A40), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_CORE_FIR_AND , RULL(0x2A010A41), SH_UNT_C_10 , SH_ACS_SCOM1_AND ); +REG64( C_10_CORE_FIR_OR , RULL(0x2A010A42), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_CORE_FIR , RULL(0x2B010A40), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_CORE_FIR_AND , RULL(0x2B010A41), SH_UNT_C_11 , SH_ACS_SCOM1_AND ); +REG64( C_11_CORE_FIR_OR , RULL(0x2B010A42), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_CORE_FIR , RULL(0x2C010A40), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_CORE_FIR_AND , RULL(0x2C010A41), SH_UNT_C_12 , SH_ACS_SCOM1_AND ); +REG64( C_12_CORE_FIR_OR , RULL(0x2C010A42), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_CORE_FIR , RULL(0x2D010A40), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_CORE_FIR_AND , RULL(0x2D010A41), SH_UNT_C_13 , SH_ACS_SCOM1_AND ); +REG64( C_13_CORE_FIR_OR , RULL(0x2D010A42), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_CORE_FIR , RULL(0x2E010A40), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_CORE_FIR_AND , RULL(0x2E010A41), SH_UNT_C_14 , SH_ACS_SCOM1_AND ); +REG64( C_14_CORE_FIR_OR , RULL(0x2E010A42), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_CORE_FIR , RULL(0x2F010A40), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_CORE_FIR_AND , RULL(0x2F010A41), SH_UNT_C_15 , SH_ACS_SCOM1_AND ); +REG64( C_15_CORE_FIR_OR , RULL(0x2F010A42), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_CORE_FIR , RULL(0x30010A40), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_CORE_FIR_AND , RULL(0x30010A41), SH_UNT_C_16 , SH_ACS_SCOM1_AND ); +REG64( C_16_CORE_FIR_OR , RULL(0x30010A42), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_CORE_FIR , RULL(0x31010A40), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_CORE_FIR_AND , RULL(0x31010A41), SH_UNT_C_17 , SH_ACS_SCOM1_AND ); +REG64( C_17_CORE_FIR_OR , RULL(0x31010A42), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_CORE_FIR , RULL(0x32010A40), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_CORE_FIR_AND , RULL(0x32010A41), SH_UNT_C_18 , SH_ACS_SCOM1_AND ); +REG64( C_18_CORE_FIR_OR , RULL(0x32010A42), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_CORE_FIR , RULL(0x33010A40), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_CORE_FIR_AND , RULL(0x33010A41), SH_UNT_C_19 , SH_ACS_SCOM1_AND ); +REG64( C_19_CORE_FIR_OR , RULL(0x33010A42), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_CORE_FIR , RULL(0x34010A40), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_CORE_FIR_AND , RULL(0x34010A41), SH_UNT_C_20 , SH_ACS_SCOM1_AND ); +REG64( C_20_CORE_FIR_OR , RULL(0x34010A42), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_CORE_FIR , RULL(0x35010A40), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_CORE_FIR_AND , RULL(0x35010A41), SH_UNT_C_21 , SH_ACS_SCOM1_AND ); +REG64( C_21_CORE_FIR_OR , RULL(0x35010A42), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_CORE_FIR , RULL(0x36010A40), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_CORE_FIR_AND , RULL(0x36010A41), SH_UNT_C_22 , SH_ACS_SCOM1_AND ); +REG64( C_22_CORE_FIR_OR , RULL(0x36010A42), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_CORE_FIR , RULL(0x37010A40), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_CORE_FIR_AND , RULL(0x37010A41), SH_UNT_C_23 , SH_ACS_SCOM1_AND ); +REG64( C_23_CORE_FIR_OR , RULL(0x37010A42), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EX_0_L2_CORE_FIR , RULL(0x20010A40), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RW ); //DUPS: 21010A40, +REG64( EX_0_L2_CORE_FIR_AND , RULL(0x20010A41), SH_UNT_EX_0_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 21010A41, +REG64( EX_0_L2_CORE_FIR_OR , RULL(0x20010A42), SH_UNT_EX_0_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 21010A42, +REG64( EX_10_L2_CORE_FIR , RULL(0x34010A40), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RW ); //DUPS: 35010A40, +REG64( EX_10_L2_CORE_FIR_AND , RULL(0x34010A41), SH_UNT_EX_10_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 35010A41, +REG64( EX_10_L2_CORE_FIR_OR , RULL(0x34010A42), SH_UNT_EX_10_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 35010A42, +REG64( EX_11_L2_CORE_FIR , RULL(0x36010A40), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RW ); //DUPS: 37010A40, +REG64( EX_11_L2_CORE_FIR_AND , RULL(0x36010A41), SH_UNT_EX_11_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 37010A41, +REG64( EX_11_L2_CORE_FIR_OR , RULL(0x36010A42), SH_UNT_EX_11_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 37010A42, +REG64( EX_1_L2_CORE_FIR , RULL(0x22010A40), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RW ); //DUPS: 23010A40, +REG64( EX_1_L2_CORE_FIR_AND , RULL(0x22010A41), SH_UNT_EX_1_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 23010A41, +REG64( EX_1_L2_CORE_FIR_OR , RULL(0x22010A42), SH_UNT_EX_1_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 23010A42, +REG64( EX_2_L2_CORE_FIR , RULL(0x24010A40), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RW ); //DUPS: 25010A40, +REG64( EX_2_L2_CORE_FIR_AND , RULL(0x24010A41), SH_UNT_EX_2_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 25010A41, +REG64( EX_2_L2_CORE_FIR_OR , RULL(0x24010A42), SH_UNT_EX_2_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 25010A42, +REG64( EX_3_L2_CORE_FIR , RULL(0x26010A40), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RW ); //DUPS: 27010A40, +REG64( EX_3_L2_CORE_FIR_AND , RULL(0x26010A41), SH_UNT_EX_3_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 27010A41, +REG64( EX_3_L2_CORE_FIR_OR , RULL(0x26010A42), SH_UNT_EX_3_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 27010A42, +REG64( EX_4_L2_CORE_FIR , RULL(0x28010A40), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RW ); //DUPS: 29010A40, +REG64( EX_4_L2_CORE_FIR_AND , RULL(0x28010A41), SH_UNT_EX_4_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 29010A41, +REG64( EX_4_L2_CORE_FIR_OR , RULL(0x28010A42), SH_UNT_EX_4_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 29010A42, +REG64( EX_5_L2_CORE_FIR , RULL(0x2A010A40), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2B010A40, +REG64( EX_5_L2_CORE_FIR_AND , RULL(0x2A010A41), SH_UNT_EX_5_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 2B010A41, +REG64( EX_5_L2_CORE_FIR_OR , RULL(0x2A010A42), SH_UNT_EX_5_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 2B010A42, +REG64( EX_6_L2_CORE_FIR , RULL(0x2C010A40), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2D010A40, +REG64( EX_6_L2_CORE_FIR_AND , RULL(0x2C010A41), SH_UNT_EX_6_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 2D010A41, +REG64( EX_6_L2_CORE_FIR_OR , RULL(0x2C010A42), SH_UNT_EX_6_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 2D010A42, +REG64( EX_7_L2_CORE_FIR , RULL(0x2E010A40), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2F010A40, +REG64( EX_7_L2_CORE_FIR_AND , RULL(0x2E010A41), SH_UNT_EX_7_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 2F010A41, +REG64( EX_7_L2_CORE_FIR_OR , RULL(0x2E010A42), SH_UNT_EX_7_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 2F010A42, +REG64( EX_8_L2_CORE_FIR , RULL(0x30010A40), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RW ); //DUPS: 31010A40, +REG64( EX_8_L2_CORE_FIR_AND , RULL(0x30010A41), SH_UNT_EX_8_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 31010A41, +REG64( EX_8_L2_CORE_FIR_OR , RULL(0x30010A42), SH_UNT_EX_8_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 31010A42, +REG64( EX_9_L2_CORE_FIR , RULL(0x32010A40), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RW ); //DUPS: 33010A40, +REG64( EX_9_L2_CORE_FIR_AND , RULL(0x32010A41), SH_UNT_EX_9_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 33010A41, +REG64( EX_9_L2_CORE_FIR_OR , RULL(0x32010A42), SH_UNT_EX_9_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 33010A42, +REG64( EX_L2_CORE_FIR , RULL(0x20010A40), SH_UNT_EX_L2 , + SH_ACS_SCOM_RW ); //DUPS: 21010A40, +REG64( EX_L2_CORE_FIR_AND , RULL(0x20010A41), SH_UNT_EX_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 21010A41, +REG64( EX_L2_CORE_FIR_OR , RULL(0x20010A42), SH_UNT_EX_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 21010A42, + +REG64( C_CORE_FIRMASK , RULL(0x20010A43), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_CORE_FIRMASK_AND , RULL(0x20010A44), SH_UNT_C , SH_ACS_SCOM1_AND ); +REG64( C_CORE_FIRMASK_OR , RULL(0x20010A45), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_CORE_FIRMASK , RULL(0x20010A43), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_CORE_FIRMASK_AND , RULL(0x20010A44), SH_UNT_C_0 , SH_ACS_SCOM1_AND ); +REG64( C_0_CORE_FIRMASK_OR , RULL(0x20010A45), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_CORE_FIRMASK , RULL(0x21010A43), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_CORE_FIRMASK_AND , RULL(0x21010A44), SH_UNT_C_1 , SH_ACS_SCOM1_AND ); +REG64( C_1_CORE_FIRMASK_OR , RULL(0x21010A45), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_CORE_FIRMASK , RULL(0x22010A43), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_CORE_FIRMASK_AND , RULL(0x22010A44), SH_UNT_C_2 , SH_ACS_SCOM1_AND ); +REG64( C_2_CORE_FIRMASK_OR , RULL(0x22010A45), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_CORE_FIRMASK , RULL(0x23010A43), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_CORE_FIRMASK_AND , RULL(0x23010A44), SH_UNT_C_3 , SH_ACS_SCOM1_AND ); +REG64( C_3_CORE_FIRMASK_OR , RULL(0x23010A45), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_CORE_FIRMASK , RULL(0x24010A43), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_CORE_FIRMASK_AND , RULL(0x24010A44), SH_UNT_C_4 , SH_ACS_SCOM1_AND ); +REG64( C_4_CORE_FIRMASK_OR , RULL(0x24010A45), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_CORE_FIRMASK , RULL(0x25010A43), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_CORE_FIRMASK_AND , RULL(0x25010A44), SH_UNT_C_5 , SH_ACS_SCOM1_AND ); +REG64( C_5_CORE_FIRMASK_OR , RULL(0x25010A45), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_CORE_FIRMASK , RULL(0x26010A43), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_CORE_FIRMASK_AND , RULL(0x26010A44), SH_UNT_C_6 , SH_ACS_SCOM1_AND ); +REG64( C_6_CORE_FIRMASK_OR , RULL(0x26010A45), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_CORE_FIRMASK , RULL(0x27010A43), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_CORE_FIRMASK_AND , RULL(0x27010A44), SH_UNT_C_7 , SH_ACS_SCOM1_AND ); +REG64( C_7_CORE_FIRMASK_OR , RULL(0x27010A45), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_CORE_FIRMASK , RULL(0x28010A43), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_CORE_FIRMASK_AND , RULL(0x28010A44), SH_UNT_C_8 , SH_ACS_SCOM1_AND ); +REG64( C_8_CORE_FIRMASK_OR , RULL(0x28010A45), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_CORE_FIRMASK , RULL(0x29010A43), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_CORE_FIRMASK_AND , RULL(0x29010A44), SH_UNT_C_9 , SH_ACS_SCOM1_AND ); +REG64( C_9_CORE_FIRMASK_OR , RULL(0x29010A45), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_CORE_FIRMASK , RULL(0x2A010A43), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_CORE_FIRMASK_AND , RULL(0x2A010A44), SH_UNT_C_10 , SH_ACS_SCOM1_AND ); +REG64( C_10_CORE_FIRMASK_OR , RULL(0x2A010A45), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_CORE_FIRMASK , RULL(0x2B010A43), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_CORE_FIRMASK_AND , RULL(0x2B010A44), SH_UNT_C_11 , SH_ACS_SCOM1_AND ); +REG64( C_11_CORE_FIRMASK_OR , RULL(0x2B010A45), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_CORE_FIRMASK , RULL(0x2C010A43), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_CORE_FIRMASK_AND , RULL(0x2C010A44), SH_UNT_C_12 , SH_ACS_SCOM1_AND ); +REG64( C_12_CORE_FIRMASK_OR , RULL(0x2C010A45), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_CORE_FIRMASK , RULL(0x2D010A43), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_CORE_FIRMASK_AND , RULL(0x2D010A44), SH_UNT_C_13 , SH_ACS_SCOM1_AND ); +REG64( C_13_CORE_FIRMASK_OR , RULL(0x2D010A45), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_CORE_FIRMASK , RULL(0x2E010A43), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_CORE_FIRMASK_AND , RULL(0x2E010A44), SH_UNT_C_14 , SH_ACS_SCOM1_AND ); +REG64( C_14_CORE_FIRMASK_OR , RULL(0x2E010A45), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_CORE_FIRMASK , RULL(0x2F010A43), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_CORE_FIRMASK_AND , RULL(0x2F010A44), SH_UNT_C_15 , SH_ACS_SCOM1_AND ); +REG64( C_15_CORE_FIRMASK_OR , RULL(0x2F010A45), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_CORE_FIRMASK , RULL(0x30010A43), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_CORE_FIRMASK_AND , RULL(0x30010A44), SH_UNT_C_16 , SH_ACS_SCOM1_AND ); +REG64( C_16_CORE_FIRMASK_OR , RULL(0x30010A45), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_CORE_FIRMASK , RULL(0x31010A43), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_CORE_FIRMASK_AND , RULL(0x31010A44), SH_UNT_C_17 , SH_ACS_SCOM1_AND ); +REG64( C_17_CORE_FIRMASK_OR , RULL(0x31010A45), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_CORE_FIRMASK , RULL(0x32010A43), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_CORE_FIRMASK_AND , RULL(0x32010A44), SH_UNT_C_18 , SH_ACS_SCOM1_AND ); +REG64( C_18_CORE_FIRMASK_OR , RULL(0x32010A45), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_CORE_FIRMASK , RULL(0x33010A43), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_CORE_FIRMASK_AND , RULL(0x33010A44), SH_UNT_C_19 , SH_ACS_SCOM1_AND ); +REG64( C_19_CORE_FIRMASK_OR , RULL(0x33010A45), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_CORE_FIRMASK , RULL(0x34010A43), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_CORE_FIRMASK_AND , RULL(0x34010A44), SH_UNT_C_20 , SH_ACS_SCOM1_AND ); +REG64( C_20_CORE_FIRMASK_OR , RULL(0x34010A45), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_CORE_FIRMASK , RULL(0x35010A43), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_CORE_FIRMASK_AND , RULL(0x35010A44), SH_UNT_C_21 , SH_ACS_SCOM1_AND ); +REG64( C_21_CORE_FIRMASK_OR , RULL(0x35010A45), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_CORE_FIRMASK , RULL(0x36010A43), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_CORE_FIRMASK_AND , RULL(0x36010A44), SH_UNT_C_22 , SH_ACS_SCOM1_AND ); +REG64( C_22_CORE_FIRMASK_OR , RULL(0x36010A45), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_CORE_FIRMASK , RULL(0x37010A43), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_CORE_FIRMASK_AND , RULL(0x37010A44), SH_UNT_C_23 , SH_ACS_SCOM1_AND ); +REG64( C_23_CORE_FIRMASK_OR , RULL(0x37010A45), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EX_0_L2_CORE_FIRMASK , RULL(0x20010A43), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RW ); //DUPS: 21010A43, +REG64( EX_0_L2_CORE_FIRMASK_AND , RULL(0x20010A44), SH_UNT_EX_0_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 21010A44, +REG64( EX_0_L2_CORE_FIRMASK_OR , RULL(0x20010A45), SH_UNT_EX_0_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 21010A45, +REG64( EX_10_L2_CORE_FIRMASK , RULL(0x34010A43), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RW ); //DUPS: 35010A43, +REG64( EX_10_L2_CORE_FIRMASK_AND , RULL(0x34010A44), SH_UNT_EX_10_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 35010A44, +REG64( EX_10_L2_CORE_FIRMASK_OR , RULL(0x34010A45), SH_UNT_EX_10_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 35010A45, +REG64( EX_11_L2_CORE_FIRMASK , RULL(0x36010A43), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RW ); //DUPS: 37010A43, +REG64( EX_11_L2_CORE_FIRMASK_AND , RULL(0x36010A44), SH_UNT_EX_11_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 37010A44, +REG64( EX_11_L2_CORE_FIRMASK_OR , RULL(0x36010A45), SH_UNT_EX_11_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 37010A45, +REG64( EX_1_L2_CORE_FIRMASK , RULL(0x22010A43), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RW ); //DUPS: 23010A43, +REG64( EX_1_L2_CORE_FIRMASK_AND , RULL(0x22010A44), SH_UNT_EX_1_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 23010A44, +REG64( EX_1_L2_CORE_FIRMASK_OR , RULL(0x22010A45), SH_UNT_EX_1_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 23010A45, +REG64( EX_2_L2_CORE_FIRMASK , RULL(0x24010A43), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RW ); //DUPS: 25010A43, +REG64( EX_2_L2_CORE_FIRMASK_AND , RULL(0x24010A44), SH_UNT_EX_2_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 25010A44, +REG64( EX_2_L2_CORE_FIRMASK_OR , RULL(0x24010A45), SH_UNT_EX_2_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 25010A45, +REG64( EX_3_L2_CORE_FIRMASK , RULL(0x26010A43), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RW ); //DUPS: 27010A43, +REG64( EX_3_L2_CORE_FIRMASK_AND , RULL(0x26010A44), SH_UNT_EX_3_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 27010A44, +REG64( EX_3_L2_CORE_FIRMASK_OR , RULL(0x26010A45), SH_UNT_EX_3_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 27010A45, +REG64( EX_4_L2_CORE_FIRMASK , RULL(0x28010A43), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RW ); //DUPS: 29010A43, +REG64( EX_4_L2_CORE_FIRMASK_AND , RULL(0x28010A44), SH_UNT_EX_4_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 29010A44, +REG64( EX_4_L2_CORE_FIRMASK_OR , RULL(0x28010A45), SH_UNT_EX_4_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 29010A45, +REG64( EX_5_L2_CORE_FIRMASK , RULL(0x2A010A43), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2B010A43, +REG64( EX_5_L2_CORE_FIRMASK_AND , RULL(0x2A010A44), SH_UNT_EX_5_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 2B010A44, +REG64( EX_5_L2_CORE_FIRMASK_OR , RULL(0x2A010A45), SH_UNT_EX_5_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 2B010A45, +REG64( EX_6_L2_CORE_FIRMASK , RULL(0x2C010A43), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2D010A43, +REG64( EX_6_L2_CORE_FIRMASK_AND , RULL(0x2C010A44), SH_UNT_EX_6_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 2D010A44, +REG64( EX_6_L2_CORE_FIRMASK_OR , RULL(0x2C010A45), SH_UNT_EX_6_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 2D010A45, +REG64( EX_7_L2_CORE_FIRMASK , RULL(0x2E010A43), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2F010A43, +REG64( EX_7_L2_CORE_FIRMASK_AND , RULL(0x2E010A44), SH_UNT_EX_7_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 2F010A44, +REG64( EX_7_L2_CORE_FIRMASK_OR , RULL(0x2E010A45), SH_UNT_EX_7_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 2F010A45, +REG64( EX_8_L2_CORE_FIRMASK , RULL(0x30010A43), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RW ); //DUPS: 31010A43, +REG64( EX_8_L2_CORE_FIRMASK_AND , RULL(0x30010A44), SH_UNT_EX_8_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 31010A44, +REG64( EX_8_L2_CORE_FIRMASK_OR , RULL(0x30010A45), SH_UNT_EX_8_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 31010A45, +REG64( EX_9_L2_CORE_FIRMASK , RULL(0x32010A43), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RW ); //DUPS: 33010A43, +REG64( EX_9_L2_CORE_FIRMASK_AND , RULL(0x32010A44), SH_UNT_EX_9_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 33010A44, +REG64( EX_9_L2_CORE_FIRMASK_OR , RULL(0x32010A45), SH_UNT_EX_9_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 33010A45, +REG64( EX_L2_CORE_FIRMASK , RULL(0x20010A43), SH_UNT_EX_L2 , + SH_ACS_SCOM_RW ); //DUPS: 21010A43, +REG64( EX_L2_CORE_FIRMASK_AND , RULL(0x20010A44), SH_UNT_EX_L2 , + SH_ACS_SCOM1_AND ); //DUPS: 21010A44, +REG64( EX_L2_CORE_FIRMASK_OR , RULL(0x20010A45), SH_UNT_EX_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 21010A45, + +REG64( C_CORE_FUSES , RULL(0x20010AA7), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_CORE_FUSES , RULL(0x20010AA7), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_CORE_FUSES , RULL(0x21010AA7), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_CORE_FUSES , RULL(0x22010AA7), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_CORE_FUSES , RULL(0x23010AA7), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_CORE_FUSES , RULL(0x24010AA7), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_CORE_FUSES , RULL(0x25010AA7), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_CORE_FUSES , RULL(0x26010AA7), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_CORE_FUSES , RULL(0x27010AA7), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_CORE_FUSES , RULL(0x28010AA7), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_CORE_FUSES , RULL(0x29010AA7), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_CORE_FUSES , RULL(0x2A010AA7), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_CORE_FUSES , RULL(0x2B010AA7), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_CORE_FUSES , RULL(0x2C010AA7), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_CORE_FUSES , RULL(0x2D010AA7), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_CORE_FUSES , RULL(0x2E010AA7), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_CORE_FUSES , RULL(0x2F010AA7), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_CORE_FUSES , RULL(0x30010AA7), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_CORE_FUSES , RULL(0x31010AA7), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_CORE_FUSES , RULL(0x32010AA7), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_CORE_FUSES , RULL(0x33010AA7), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_CORE_FUSES , RULL(0x34010AA7), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_CORE_FUSES , RULL(0x35010AA7), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_CORE_FUSES , RULL(0x36010AA7), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_CORE_FUSES , RULL(0x37010AA7), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_0_L2_CORE_FUSES , RULL(0x20010AA7), SH_UNT_EX_0_L2 , + SH_ACS_SCOM ); //DUPS: 21010AA7, +REG64( EX_10_L2_CORE_FUSES , RULL(0x34010AA7), SH_UNT_EX_10_L2 , + SH_ACS_SCOM ); //DUPS: 35010AA7, +REG64( EX_11_L2_CORE_FUSES , RULL(0x36010AA7), SH_UNT_EX_11_L2 , + SH_ACS_SCOM ); //DUPS: 37010AA7, +REG64( EX_1_L2_CORE_FUSES , RULL(0x22010AA7), SH_UNT_EX_1_L2 , + SH_ACS_SCOM ); //DUPS: 23010AA7, +REG64( EX_2_L2_CORE_FUSES , RULL(0x24010AA7), SH_UNT_EX_2_L2 , + SH_ACS_SCOM ); //DUPS: 25010AA7, +REG64( EX_3_L2_CORE_FUSES , RULL(0x26010AA7), SH_UNT_EX_3_L2 , + SH_ACS_SCOM ); //DUPS: 27010AA7, +REG64( EX_4_L2_CORE_FUSES , RULL(0x28010AA7), SH_UNT_EX_4_L2 , + SH_ACS_SCOM ); //DUPS: 29010AA7, +REG64( EX_5_L2_CORE_FUSES , RULL(0x2A010AA7), SH_UNT_EX_5_L2 , + SH_ACS_SCOM ); //DUPS: 2B010AA7, +REG64( EX_6_L2_CORE_FUSES , RULL(0x2C010AA7), SH_UNT_EX_6_L2 , + SH_ACS_SCOM ); //DUPS: 2D010AA7, +REG64( EX_7_L2_CORE_FUSES , RULL(0x2E010AA7), SH_UNT_EX_7_L2 , + SH_ACS_SCOM ); //DUPS: 2F010AA7, +REG64( EX_8_L2_CORE_FUSES , RULL(0x30010AA7), SH_UNT_EX_8_L2 , + SH_ACS_SCOM ); //DUPS: 31010AA7, +REG64( EX_9_L2_CORE_FUSES , RULL(0x32010AA7), SH_UNT_EX_9_L2 , + SH_ACS_SCOM ); //DUPS: 33010AA7, +REG64( EX_L2_CORE_FUSES , RULL(0x20010AA7), SH_UNT_EX_L2 , + SH_ACS_SCOM ); //DUPS: 21010AA7, + +REG64( C_CORE_WOF , RULL(0x20010A48), SH_UNT_C , + SH_ACS_SCOM_WCLRREG ); +REG64( C_0_CORE_WOF , RULL(0x20010A48), SH_UNT_C_0 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_1_CORE_WOF , RULL(0x21010A48), SH_UNT_C_1 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_2_CORE_WOF , RULL(0x22010A48), SH_UNT_C_2 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_3_CORE_WOF , RULL(0x23010A48), SH_UNT_C_3 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_4_CORE_WOF , RULL(0x24010A48), SH_UNT_C_4 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_5_CORE_WOF , RULL(0x25010A48), SH_UNT_C_5 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_6_CORE_WOF , RULL(0x26010A48), SH_UNT_C_6 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_7_CORE_WOF , RULL(0x27010A48), SH_UNT_C_7 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_8_CORE_WOF , RULL(0x28010A48), SH_UNT_C_8 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_9_CORE_WOF , RULL(0x29010A48), SH_UNT_C_9 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_10_CORE_WOF , RULL(0x2A010A48), SH_UNT_C_10 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_11_CORE_WOF , RULL(0x2B010A48), SH_UNT_C_11 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_12_CORE_WOF , RULL(0x2C010A48), SH_UNT_C_12 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_13_CORE_WOF , RULL(0x2D010A48), SH_UNT_C_13 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_14_CORE_WOF , RULL(0x2E010A48), SH_UNT_C_14 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_15_CORE_WOF , RULL(0x2F010A48), SH_UNT_C_15 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_16_CORE_WOF , RULL(0x30010A48), SH_UNT_C_16 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_17_CORE_WOF , RULL(0x31010A48), SH_UNT_C_17 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_18_CORE_WOF , RULL(0x32010A48), SH_UNT_C_18 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_19_CORE_WOF , RULL(0x33010A48), SH_UNT_C_19 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_20_CORE_WOF , RULL(0x34010A48), SH_UNT_C_20 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_21_CORE_WOF , RULL(0x35010A48), SH_UNT_C_21 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_22_CORE_WOF , RULL(0x36010A48), SH_UNT_C_22 , + SH_ACS_SCOM_WCLRREG ); +REG64( C_23_CORE_WOF , RULL(0x37010A48), SH_UNT_C_23 , + SH_ACS_SCOM_WCLRREG ); +REG64( EX_CORE_WOF , RULL(0x20010A48), SH_UNT_EX , + SH_ACS_SCOM_WCLRREG ); //DUPS: 21010A48, +REG64( EX_0_CORE_WOF , RULL(0x20010A48), SH_UNT_EX_0 , + SH_ACS_SCOM_WCLRREG ); //DUPS: 21010A48, +REG64( EX_1_CORE_WOF , RULL(0x22010A48), SH_UNT_EX_1 , + SH_ACS_SCOM_WCLRREG ); //DUPS: 23010A48, +REG64( EX_2_CORE_WOF , RULL(0x24010A48), SH_UNT_EX_2 , + SH_ACS_SCOM_WCLRREG ); //DUPS: 25010A48, +REG64( EX_3_CORE_WOF , RULL(0x26010A48), SH_UNT_EX_3 , + SH_ACS_SCOM_WCLRREG ); //DUPS: 27010A48, +REG64( EX_4_CORE_WOF , RULL(0x28010A48), SH_UNT_EX_4 , + SH_ACS_SCOM_WCLRREG ); //DUPS: 29010A48, +REG64( EX_5_CORE_WOF , RULL(0x2A010A48), SH_UNT_EX_5 , + SH_ACS_SCOM_WCLRREG ); //DUPS: 2B010A48, +REG64( EX_6_CORE_WOF , RULL(0x2C010A48), SH_UNT_EX_6 , + SH_ACS_SCOM_WCLRREG ); //DUPS: 2D010A48, +REG64( EX_7_CORE_WOF , RULL(0x2E010A48), SH_UNT_EX_7 , + SH_ACS_SCOM_WCLRREG ); //DUPS: 2F010A48, +REG64( EX_8_CORE_WOF , RULL(0x30010A48), SH_UNT_EX_8 , + SH_ACS_SCOM_WCLRREG ); //DUPS: 31010A48, +REG64( EX_9_CORE_WOF , RULL(0x32010A48), SH_UNT_EX_9 , + SH_ACS_SCOM_WCLRREG ); //DUPS: 33010A48, +REG64( EX_10_CORE_WOF , RULL(0x34010A48), SH_UNT_EX_10 , + SH_ACS_SCOM_WCLRREG ); //DUPS: 35010A48, +REG64( EX_11_CORE_WOF , RULL(0x36010A48), SH_UNT_EX_11 , + SH_ACS_SCOM_WCLRREG ); //DUPS: 37010A48, + +REG64( C_CPLT_CONF0 , RULL(0x20000008), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_CPLT_CONF0_OR , RULL(0x20000018), SH_UNT_C , SH_ACS_SCOM1_OR ); +REG64( C_CPLT_CONF0_CLEAR , RULL(0x20000028), SH_UNT_C , + SH_ACS_SCOM2_CLEAR ); +REG64( C_0_CPLT_CONF0 , RULL(0x20000008), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_CPLT_CONF0_OR , RULL(0x20000018), SH_UNT_C_0 , SH_ACS_SCOM1_OR ); +REG64( C_0_CPLT_CONF0_CLEAR , RULL(0x20000028), SH_UNT_C_0 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_1_CPLT_CONF0 , RULL(0x21000008), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_CPLT_CONF0_OR , RULL(0x21000018), SH_UNT_C_1 , SH_ACS_SCOM1_OR ); +REG64( C_1_CPLT_CONF0_CLEAR , RULL(0x21000028), SH_UNT_C_1 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_2_CPLT_CONF0 , RULL(0x22000008), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_CPLT_CONF0_OR , RULL(0x22000018), SH_UNT_C_2 , SH_ACS_SCOM1_OR ); +REG64( C_2_CPLT_CONF0_CLEAR , RULL(0x22000028), SH_UNT_C_2 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_3_CPLT_CONF0 , RULL(0x23000008), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_CPLT_CONF0_OR , RULL(0x23000018), SH_UNT_C_3 , SH_ACS_SCOM1_OR ); +REG64( C_3_CPLT_CONF0_CLEAR , RULL(0x23000028), SH_UNT_C_3 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_4_CPLT_CONF0 , RULL(0x24000008), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_CPLT_CONF0_OR , RULL(0x24000018), SH_UNT_C_4 , SH_ACS_SCOM1_OR ); +REG64( C_4_CPLT_CONF0_CLEAR , RULL(0x24000028), SH_UNT_C_4 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_5_CPLT_CONF0 , RULL(0x25000008), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_CPLT_CONF0_OR , RULL(0x25000018), SH_UNT_C_5 , SH_ACS_SCOM1_OR ); +REG64( C_5_CPLT_CONF0_CLEAR , RULL(0x25000028), SH_UNT_C_5 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_6_CPLT_CONF0 , RULL(0x26000008), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_CPLT_CONF0_OR , RULL(0x26000018), SH_UNT_C_6 , SH_ACS_SCOM1_OR ); +REG64( C_6_CPLT_CONF0_CLEAR , RULL(0x26000028), SH_UNT_C_6 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_7_CPLT_CONF0 , RULL(0x27000008), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_CPLT_CONF0_OR , RULL(0x27000018), SH_UNT_C_7 , SH_ACS_SCOM1_OR ); +REG64( C_7_CPLT_CONF0_CLEAR , RULL(0x27000028), SH_UNT_C_7 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_8_CPLT_CONF0 , RULL(0x28000008), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_CPLT_CONF0_OR , RULL(0x28000018), SH_UNT_C_8 , SH_ACS_SCOM1_OR ); +REG64( C_8_CPLT_CONF0_CLEAR , RULL(0x28000028), SH_UNT_C_8 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_9_CPLT_CONF0 , RULL(0x29000008), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_CPLT_CONF0_OR , RULL(0x29000018), SH_UNT_C_9 , SH_ACS_SCOM1_OR ); +REG64( C_9_CPLT_CONF0_CLEAR , RULL(0x29000028), SH_UNT_C_9 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_10_CPLT_CONF0 , RULL(0x2A000008), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_CPLT_CONF0_OR , RULL(0x2A000018), SH_UNT_C_10 , SH_ACS_SCOM1_OR ); +REG64( C_10_CPLT_CONF0_CLEAR , RULL(0x2A000028), SH_UNT_C_10 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_11_CPLT_CONF0 , RULL(0x2B000008), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_CPLT_CONF0_OR , RULL(0x2B000018), SH_UNT_C_11 , SH_ACS_SCOM1_OR ); +REG64( C_11_CPLT_CONF0_CLEAR , RULL(0x2B000028), SH_UNT_C_11 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_12_CPLT_CONF0 , RULL(0x2C000008), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_CPLT_CONF0_OR , RULL(0x2C000018), SH_UNT_C_12 , SH_ACS_SCOM1_OR ); +REG64( C_12_CPLT_CONF0_CLEAR , RULL(0x2C000028), SH_UNT_C_12 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_13_CPLT_CONF0 , RULL(0x2D000008), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_CPLT_CONF0_OR , RULL(0x2D000018), SH_UNT_C_13 , SH_ACS_SCOM1_OR ); +REG64( C_13_CPLT_CONF0_CLEAR , RULL(0x2D000028), SH_UNT_C_13 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_14_CPLT_CONF0 , RULL(0x2E000008), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_CPLT_CONF0_OR , RULL(0x2E000018), SH_UNT_C_14 , SH_ACS_SCOM1_OR ); +REG64( C_14_CPLT_CONF0_CLEAR , RULL(0x2E000028), SH_UNT_C_14 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_15_CPLT_CONF0 , RULL(0x2F000008), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_CPLT_CONF0_OR , RULL(0x2F000018), SH_UNT_C_15 , SH_ACS_SCOM1_OR ); +REG64( C_15_CPLT_CONF0_CLEAR , RULL(0x2F000028), SH_UNT_C_15 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_16_CPLT_CONF0 , RULL(0x30000008), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_CPLT_CONF0_OR , RULL(0x30000018), SH_UNT_C_16 , SH_ACS_SCOM1_OR ); +REG64( C_16_CPLT_CONF0_CLEAR , RULL(0x30000028), SH_UNT_C_16 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_17_CPLT_CONF0 , RULL(0x31000008), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_CPLT_CONF0_OR , RULL(0x31000018), SH_UNT_C_17 , SH_ACS_SCOM1_OR ); +REG64( C_17_CPLT_CONF0_CLEAR , RULL(0x31000028), SH_UNT_C_17 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_18_CPLT_CONF0 , RULL(0x32000008), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_CPLT_CONF0_OR , RULL(0x32000018), SH_UNT_C_18 , SH_ACS_SCOM1_OR ); +REG64( C_18_CPLT_CONF0_CLEAR , RULL(0x32000028), SH_UNT_C_18 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_19_CPLT_CONF0 , RULL(0x33000008), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_CPLT_CONF0_OR , RULL(0x33000018), SH_UNT_C_19 , SH_ACS_SCOM1_OR ); +REG64( C_19_CPLT_CONF0_CLEAR , RULL(0x33000028), SH_UNT_C_19 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_20_CPLT_CONF0 , RULL(0x34000008), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_CPLT_CONF0_OR , RULL(0x34000018), SH_UNT_C_20 , SH_ACS_SCOM1_OR ); +REG64( C_20_CPLT_CONF0_CLEAR , RULL(0x34000028), SH_UNT_C_20 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_21_CPLT_CONF0 , RULL(0x35000008), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_CPLT_CONF0_OR , RULL(0x35000018), SH_UNT_C_21 , SH_ACS_SCOM1_OR ); +REG64( C_21_CPLT_CONF0_CLEAR , RULL(0x35000028), SH_UNT_C_21 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_22_CPLT_CONF0 , RULL(0x36000008), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_CPLT_CONF0_OR , RULL(0x36000018), SH_UNT_C_22 , SH_ACS_SCOM1_OR ); +REG64( C_22_CPLT_CONF0_CLEAR , RULL(0x36000028), SH_UNT_C_22 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_23_CPLT_CONF0 , RULL(0x37000008), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_CPLT_CONF0_OR , RULL(0x37000018), SH_UNT_C_23 , SH_ACS_SCOM1_OR ); +REG64( C_23_CPLT_CONF0_CLEAR , RULL(0x37000028), SH_UNT_C_23 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_CPLT_CONF0 , RULL(0x10000008), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_CPLT_CONF0_OR , RULL(0x10000018), SH_UNT_EQ , SH_ACS_SCOM1_OR ); +REG64( EQ_CPLT_CONF0_CLEAR , RULL(0x10000028), SH_UNT_EQ , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_0_CPLT_CONF0 , RULL(0x10000008), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_0_CPLT_CONF0_OR , RULL(0x10000018), SH_UNT_EQ_0 , SH_ACS_SCOM1_OR ); +REG64( EQ_0_CPLT_CONF0_CLEAR , RULL(0x10000028), SH_UNT_EQ_0 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_1_CPLT_CONF0 , RULL(0x11000008), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_1_CPLT_CONF0_OR , RULL(0x11000018), SH_UNT_EQ_1 , SH_ACS_SCOM1_OR ); +REG64( EQ_1_CPLT_CONF0_CLEAR , RULL(0x11000028), SH_UNT_EQ_1 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_2_CPLT_CONF0 , RULL(0x12000008), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_2_CPLT_CONF0_OR , RULL(0x12000018), SH_UNT_EQ_2 , SH_ACS_SCOM1_OR ); +REG64( EQ_2_CPLT_CONF0_CLEAR , RULL(0x12000028), SH_UNT_EQ_2 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_3_CPLT_CONF0 , RULL(0x13000008), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_3_CPLT_CONF0_OR , RULL(0x13000018), SH_UNT_EQ_3 , SH_ACS_SCOM1_OR ); +REG64( EQ_3_CPLT_CONF0_CLEAR , RULL(0x13000028), SH_UNT_EQ_3 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_4_CPLT_CONF0 , RULL(0x14000008), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_4_CPLT_CONF0_OR , RULL(0x14000018), SH_UNT_EQ_4 , SH_ACS_SCOM1_OR ); +REG64( EQ_4_CPLT_CONF0_CLEAR , RULL(0x14000028), SH_UNT_EQ_4 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_5_CPLT_CONF0 , RULL(0x15000008), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EQ_5_CPLT_CONF0_OR , RULL(0x15000018), SH_UNT_EQ_5 , SH_ACS_SCOM1_OR ); +REG64( EQ_5_CPLT_CONF0_CLEAR , RULL(0x15000028), SH_UNT_EQ_5 , + SH_ACS_SCOM2_CLEAR ); +REG64( EX_CPLT_CONF0 , RULL(0x20000008), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 21000008, +REG64( EX_CPLT_CONF0_OR , RULL(0x20000018), SH_UNT_EX , + SH_ACS_SCOM1_OR ); //DUPS: 21000018, +REG64( EX_CPLT_CONF0_CLEAR , RULL(0x20000028), SH_UNT_EX , + SH_ACS_SCOM2_CLEAR ); //DUPS: 21000028, +REG64( EX_0_CPLT_CONF0 , RULL(0x20000008), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 21000008, +REG64( EX_0_CPLT_CONF0_OR , RULL(0x20000018), SH_UNT_EX_0 , + SH_ACS_SCOM1_OR ); //DUPS: 21000018, +REG64( EX_0_CPLT_CONF0_CLEAR , RULL(0x20000028), SH_UNT_EX_0 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 21000028, +REG64( EX_1_CPLT_CONF0 , RULL(0x22000008), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 23000008, +REG64( EX_1_CPLT_CONF0_OR , RULL(0x22000018), SH_UNT_EX_1 , + SH_ACS_SCOM1_OR ); //DUPS: 23000018, +REG64( EX_1_CPLT_CONF0_CLEAR , RULL(0x22000028), SH_UNT_EX_1 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 23000028, +REG64( EX_2_CPLT_CONF0 , RULL(0x24000008), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 25000008, +REG64( EX_2_CPLT_CONF0_OR , RULL(0x24000018), SH_UNT_EX_2 , + SH_ACS_SCOM1_OR ); //DUPS: 25000018, +REG64( EX_2_CPLT_CONF0_CLEAR , RULL(0x24000028), SH_UNT_EX_2 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 25000028, +REG64( EX_3_CPLT_CONF0 , RULL(0x26000008), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 27000008, +REG64( EX_3_CPLT_CONF0_OR , RULL(0x26000018), SH_UNT_EX_3 , + SH_ACS_SCOM1_OR ); //DUPS: 27000018, +REG64( EX_3_CPLT_CONF0_CLEAR , RULL(0x26000028), SH_UNT_EX_3 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 27000028, +REG64( EX_4_CPLT_CONF0 , RULL(0x28000008), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 29000008, +REG64( EX_4_CPLT_CONF0_OR , RULL(0x28000018), SH_UNT_EX_4 , + SH_ACS_SCOM1_OR ); //DUPS: 29000018, +REG64( EX_4_CPLT_CONF0_CLEAR , RULL(0x28000028), SH_UNT_EX_4 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 29000028, +REG64( EX_5_CPLT_CONF0 , RULL(0x2A000008), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B000008, +REG64( EX_5_CPLT_CONF0_OR , RULL(0x2A000018), SH_UNT_EX_5 , + SH_ACS_SCOM1_OR ); //DUPS: 2B000018, +REG64( EX_5_CPLT_CONF0_CLEAR , RULL(0x2A000028), SH_UNT_EX_5 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 2B000028, +REG64( EX_6_CPLT_CONF0 , RULL(0x2C000008), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D000008, +REG64( EX_6_CPLT_CONF0_OR , RULL(0x2C000018), SH_UNT_EX_6 , + SH_ACS_SCOM1_OR ); //DUPS: 2D000018, +REG64( EX_6_CPLT_CONF0_CLEAR , RULL(0x2C000028), SH_UNT_EX_6 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 2D000028, +REG64( EX_7_CPLT_CONF0 , RULL(0x2E000008), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F000008, +REG64( EX_7_CPLT_CONF0_OR , RULL(0x2E000018), SH_UNT_EX_7 , + SH_ACS_SCOM1_OR ); //DUPS: 2F000018, +REG64( EX_7_CPLT_CONF0_CLEAR , RULL(0x2E000028), SH_UNT_EX_7 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 2F000028, +REG64( EX_8_CPLT_CONF0 , RULL(0x30000008), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 31000008, +REG64( EX_8_CPLT_CONF0_OR , RULL(0x30000018), SH_UNT_EX_8 , + SH_ACS_SCOM1_OR ); //DUPS: 31000018, +REG64( EX_8_CPLT_CONF0_CLEAR , RULL(0x30000028), SH_UNT_EX_8 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 31000028, +REG64( EX_9_CPLT_CONF0 , RULL(0x32000008), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 33000008, +REG64( EX_9_CPLT_CONF0_OR , RULL(0x32000018), SH_UNT_EX_9 , + SH_ACS_SCOM1_OR ); //DUPS: 33000018, +REG64( EX_9_CPLT_CONF0_CLEAR , RULL(0x32000028), SH_UNT_EX_9 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 33000028, +REG64( EX_10_CPLT_CONF0 , RULL(0x34000008), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 35000008, +REG64( EX_10_CPLT_CONF0_OR , RULL(0x34000018), SH_UNT_EX_10 , + SH_ACS_SCOM1_OR ); //DUPS: 35000018, +REG64( EX_10_CPLT_CONF0_CLEAR , RULL(0x34000028), SH_UNT_EX_10 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 35000028, +REG64( EX_11_CPLT_CONF0 , RULL(0x36000008), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 37000008, +REG64( EX_11_CPLT_CONF0_OR , RULL(0x36000018), SH_UNT_EX_11 , + SH_ACS_SCOM1_OR ); //DUPS: 37000018, +REG64( EX_11_CPLT_CONF0_CLEAR , RULL(0x36000028), SH_UNT_EX_11 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 37000028, + +REG64( C_CPLT_CONF1 , RULL(0x20000009), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_CPLT_CONF1_OR , RULL(0x20000019), SH_UNT_C , SH_ACS_SCOM1_OR ); +REG64( C_CPLT_CONF1_CLEAR , RULL(0x20000029), SH_UNT_C , + SH_ACS_SCOM2_CLEAR ); +REG64( C_0_CPLT_CONF1 , RULL(0x20000009), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_CPLT_CONF1_OR , RULL(0x20000019), SH_UNT_C_0 , SH_ACS_SCOM1_OR ); +REG64( C_0_CPLT_CONF1_CLEAR , RULL(0x20000029), SH_UNT_C_0 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_1_CPLT_CONF1 , RULL(0x21000009), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_CPLT_CONF1_OR , RULL(0x21000019), SH_UNT_C_1 , SH_ACS_SCOM1_OR ); +REG64( C_1_CPLT_CONF1_CLEAR , RULL(0x21000029), SH_UNT_C_1 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_2_CPLT_CONF1 , RULL(0x22000009), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_CPLT_CONF1_OR , RULL(0x22000019), SH_UNT_C_2 , SH_ACS_SCOM1_OR ); +REG64( C_2_CPLT_CONF1_CLEAR , RULL(0x22000029), SH_UNT_C_2 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_3_CPLT_CONF1 , RULL(0x23000009), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_CPLT_CONF1_OR , RULL(0x23000019), SH_UNT_C_3 , SH_ACS_SCOM1_OR ); +REG64( C_3_CPLT_CONF1_CLEAR , RULL(0x23000029), SH_UNT_C_3 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_4_CPLT_CONF1 , RULL(0x24000009), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_CPLT_CONF1_OR , RULL(0x24000019), SH_UNT_C_4 , SH_ACS_SCOM1_OR ); +REG64( C_4_CPLT_CONF1_CLEAR , RULL(0x24000029), SH_UNT_C_4 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_5_CPLT_CONF1 , RULL(0x25000009), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_CPLT_CONF1_OR , RULL(0x25000019), SH_UNT_C_5 , SH_ACS_SCOM1_OR ); +REG64( C_5_CPLT_CONF1_CLEAR , RULL(0x25000029), SH_UNT_C_5 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_6_CPLT_CONF1 , RULL(0x26000009), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_CPLT_CONF1_OR , RULL(0x26000019), SH_UNT_C_6 , SH_ACS_SCOM1_OR ); +REG64( C_6_CPLT_CONF1_CLEAR , RULL(0x26000029), SH_UNT_C_6 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_7_CPLT_CONF1 , RULL(0x27000009), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_CPLT_CONF1_OR , RULL(0x27000019), SH_UNT_C_7 , SH_ACS_SCOM1_OR ); +REG64( C_7_CPLT_CONF1_CLEAR , RULL(0x27000029), SH_UNT_C_7 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_8_CPLT_CONF1 , RULL(0x28000009), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_CPLT_CONF1_OR , RULL(0x28000019), SH_UNT_C_8 , SH_ACS_SCOM1_OR ); +REG64( C_8_CPLT_CONF1_CLEAR , RULL(0x28000029), SH_UNT_C_8 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_9_CPLT_CONF1 , RULL(0x29000009), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_CPLT_CONF1_OR , RULL(0x29000019), SH_UNT_C_9 , SH_ACS_SCOM1_OR ); +REG64( C_9_CPLT_CONF1_CLEAR , RULL(0x29000029), SH_UNT_C_9 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_10_CPLT_CONF1 , RULL(0x2A000009), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_CPLT_CONF1_OR , RULL(0x2A000019), SH_UNT_C_10 , SH_ACS_SCOM1_OR ); +REG64( C_10_CPLT_CONF1_CLEAR , RULL(0x2A000029), SH_UNT_C_10 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_11_CPLT_CONF1 , RULL(0x2B000009), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_CPLT_CONF1_OR , RULL(0x2B000019), SH_UNT_C_11 , SH_ACS_SCOM1_OR ); +REG64( C_11_CPLT_CONF1_CLEAR , RULL(0x2B000029), SH_UNT_C_11 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_12_CPLT_CONF1 , RULL(0x2C000009), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_CPLT_CONF1_OR , RULL(0x2C000019), SH_UNT_C_12 , SH_ACS_SCOM1_OR ); +REG64( C_12_CPLT_CONF1_CLEAR , RULL(0x2C000029), SH_UNT_C_12 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_13_CPLT_CONF1 , RULL(0x2D000009), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_CPLT_CONF1_OR , RULL(0x2D000019), SH_UNT_C_13 , SH_ACS_SCOM1_OR ); +REG64( C_13_CPLT_CONF1_CLEAR , RULL(0x2D000029), SH_UNT_C_13 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_14_CPLT_CONF1 , RULL(0x2E000009), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_CPLT_CONF1_OR , RULL(0x2E000019), SH_UNT_C_14 , SH_ACS_SCOM1_OR ); +REG64( C_14_CPLT_CONF1_CLEAR , RULL(0x2E000029), SH_UNT_C_14 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_15_CPLT_CONF1 , RULL(0x2F000009), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_CPLT_CONF1_OR , RULL(0x2F000019), SH_UNT_C_15 , SH_ACS_SCOM1_OR ); +REG64( C_15_CPLT_CONF1_CLEAR , RULL(0x2F000029), SH_UNT_C_15 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_16_CPLT_CONF1 , RULL(0x30000009), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_CPLT_CONF1_OR , RULL(0x30000019), SH_UNT_C_16 , SH_ACS_SCOM1_OR ); +REG64( C_16_CPLT_CONF1_CLEAR , RULL(0x30000029), SH_UNT_C_16 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_17_CPLT_CONF1 , RULL(0x31000009), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_CPLT_CONF1_OR , RULL(0x31000019), SH_UNT_C_17 , SH_ACS_SCOM1_OR ); +REG64( C_17_CPLT_CONF1_CLEAR , RULL(0x31000029), SH_UNT_C_17 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_18_CPLT_CONF1 , RULL(0x32000009), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_CPLT_CONF1_OR , RULL(0x32000019), SH_UNT_C_18 , SH_ACS_SCOM1_OR ); +REG64( C_18_CPLT_CONF1_CLEAR , RULL(0x32000029), SH_UNT_C_18 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_19_CPLT_CONF1 , RULL(0x33000009), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_CPLT_CONF1_OR , RULL(0x33000019), SH_UNT_C_19 , SH_ACS_SCOM1_OR ); +REG64( C_19_CPLT_CONF1_CLEAR , RULL(0x33000029), SH_UNT_C_19 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_20_CPLT_CONF1 , RULL(0x34000009), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_CPLT_CONF1_OR , RULL(0x34000019), SH_UNT_C_20 , SH_ACS_SCOM1_OR ); +REG64( C_20_CPLT_CONF1_CLEAR , RULL(0x34000029), SH_UNT_C_20 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_21_CPLT_CONF1 , RULL(0x35000009), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_CPLT_CONF1_OR , RULL(0x35000019), SH_UNT_C_21 , SH_ACS_SCOM1_OR ); +REG64( C_21_CPLT_CONF1_CLEAR , RULL(0x35000029), SH_UNT_C_21 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_22_CPLT_CONF1 , RULL(0x36000009), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_CPLT_CONF1_OR , RULL(0x36000019), SH_UNT_C_22 , SH_ACS_SCOM1_OR ); +REG64( C_22_CPLT_CONF1_CLEAR , RULL(0x36000029), SH_UNT_C_22 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_23_CPLT_CONF1 , RULL(0x37000009), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_CPLT_CONF1_OR , RULL(0x37000019), SH_UNT_C_23 , SH_ACS_SCOM1_OR ); +REG64( C_23_CPLT_CONF1_CLEAR , RULL(0x37000029), SH_UNT_C_23 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_CPLT_CONF1 , RULL(0x10000009), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_CPLT_CONF1_OR , RULL(0x10000019), SH_UNT_EQ , SH_ACS_SCOM1_OR ); +REG64( EQ_CPLT_CONF1_CLEAR , RULL(0x10000029), SH_UNT_EQ , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_0_CPLT_CONF1 , RULL(0x10000009), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_0_CPLT_CONF1_OR , RULL(0x10000019), SH_UNT_EQ_0 , SH_ACS_SCOM1_OR ); +REG64( EQ_0_CPLT_CONF1_CLEAR , RULL(0x10000029), SH_UNT_EQ_0 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_1_CPLT_CONF1 , RULL(0x11000009), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_1_CPLT_CONF1_OR , RULL(0x11000019), SH_UNT_EQ_1 , SH_ACS_SCOM1_OR ); +REG64( EQ_1_CPLT_CONF1_CLEAR , RULL(0x11000029), SH_UNT_EQ_1 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_2_CPLT_CONF1 , RULL(0x12000009), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_2_CPLT_CONF1_OR , RULL(0x12000019), SH_UNT_EQ_2 , SH_ACS_SCOM1_OR ); +REG64( EQ_2_CPLT_CONF1_CLEAR , RULL(0x12000029), SH_UNT_EQ_2 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_3_CPLT_CONF1 , RULL(0x13000009), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_3_CPLT_CONF1_OR , RULL(0x13000019), SH_UNT_EQ_3 , SH_ACS_SCOM1_OR ); +REG64( EQ_3_CPLT_CONF1_CLEAR , RULL(0x13000029), SH_UNT_EQ_3 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_4_CPLT_CONF1 , RULL(0x14000009), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_4_CPLT_CONF1_OR , RULL(0x14000019), SH_UNT_EQ_4 , SH_ACS_SCOM1_OR ); +REG64( EQ_4_CPLT_CONF1_CLEAR , RULL(0x14000029), SH_UNT_EQ_4 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_5_CPLT_CONF1 , RULL(0x15000009), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EQ_5_CPLT_CONF1_OR , RULL(0x15000019), SH_UNT_EQ_5 , SH_ACS_SCOM1_OR ); +REG64( EQ_5_CPLT_CONF1_CLEAR , RULL(0x15000029), SH_UNT_EQ_5 , + SH_ACS_SCOM2_CLEAR ); +REG64( EX_CPLT_CONF1 , RULL(0x20000009), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 21000009, +REG64( EX_CPLT_CONF1_OR , RULL(0x20000019), SH_UNT_EX , + SH_ACS_SCOM1_OR ); //DUPS: 21000019, +REG64( EX_CPLT_CONF1_CLEAR , RULL(0x20000029), SH_UNT_EX , + SH_ACS_SCOM2_CLEAR ); //DUPS: 21000029, +REG64( EX_0_CPLT_CONF1 , RULL(0x20000009), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 21000009, +REG64( EX_0_CPLT_CONF1_OR , RULL(0x20000019), SH_UNT_EX_0 , + SH_ACS_SCOM1_OR ); //DUPS: 21000019, +REG64( EX_0_CPLT_CONF1_CLEAR , RULL(0x20000029), SH_UNT_EX_0 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 21000029, +REG64( EX_1_CPLT_CONF1 , RULL(0x22000009), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 23000009, +REG64( EX_1_CPLT_CONF1_OR , RULL(0x22000019), SH_UNT_EX_1 , + SH_ACS_SCOM1_OR ); //DUPS: 23000019, +REG64( EX_1_CPLT_CONF1_CLEAR , RULL(0x22000029), SH_UNT_EX_1 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 23000029, +REG64( EX_2_CPLT_CONF1 , RULL(0x24000009), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 25000009, +REG64( EX_2_CPLT_CONF1_OR , RULL(0x24000019), SH_UNT_EX_2 , + SH_ACS_SCOM1_OR ); //DUPS: 25000019, +REG64( EX_2_CPLT_CONF1_CLEAR , RULL(0x24000029), SH_UNT_EX_2 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 25000029, +REG64( EX_3_CPLT_CONF1 , RULL(0x26000009), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 27000009, +REG64( EX_3_CPLT_CONF1_OR , RULL(0x26000019), SH_UNT_EX_3 , + SH_ACS_SCOM1_OR ); //DUPS: 27000019, +REG64( EX_3_CPLT_CONF1_CLEAR , RULL(0x26000029), SH_UNT_EX_3 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 27000029, +REG64( EX_4_CPLT_CONF1 , RULL(0x28000009), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 29000009, +REG64( EX_4_CPLT_CONF1_OR , RULL(0x28000019), SH_UNT_EX_4 , + SH_ACS_SCOM1_OR ); //DUPS: 29000019, +REG64( EX_4_CPLT_CONF1_CLEAR , RULL(0x28000029), SH_UNT_EX_4 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 29000029, +REG64( EX_5_CPLT_CONF1 , RULL(0x2A000009), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B000009, +REG64( EX_5_CPLT_CONF1_OR , RULL(0x2A000019), SH_UNT_EX_5 , + SH_ACS_SCOM1_OR ); //DUPS: 2B000019, +REG64( EX_5_CPLT_CONF1_CLEAR , RULL(0x2A000029), SH_UNT_EX_5 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 2B000029, +REG64( EX_6_CPLT_CONF1 , RULL(0x2C000009), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D000009, +REG64( EX_6_CPLT_CONF1_OR , RULL(0x2C000019), SH_UNT_EX_6 , + SH_ACS_SCOM1_OR ); //DUPS: 2D000019, +REG64( EX_6_CPLT_CONF1_CLEAR , RULL(0x2C000029), SH_UNT_EX_6 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 2D000029, +REG64( EX_7_CPLT_CONF1 , RULL(0x2E000009), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F000009, +REG64( EX_7_CPLT_CONF1_OR , RULL(0x2E000019), SH_UNT_EX_7 , + SH_ACS_SCOM1_OR ); //DUPS: 2F000019, +REG64( EX_7_CPLT_CONF1_CLEAR , RULL(0x2E000029), SH_UNT_EX_7 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 2F000029, +REG64( EX_8_CPLT_CONF1 , RULL(0x30000009), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 31000009, +REG64( EX_8_CPLT_CONF1_OR , RULL(0x30000019), SH_UNT_EX_8 , + SH_ACS_SCOM1_OR ); //DUPS: 31000019, +REG64( EX_8_CPLT_CONF1_CLEAR , RULL(0x30000029), SH_UNT_EX_8 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 31000029, +REG64( EX_9_CPLT_CONF1 , RULL(0x32000009), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 33000009, +REG64( EX_9_CPLT_CONF1_OR , RULL(0x32000019), SH_UNT_EX_9 , + SH_ACS_SCOM1_OR ); //DUPS: 33000019, +REG64( EX_9_CPLT_CONF1_CLEAR , RULL(0x32000029), SH_UNT_EX_9 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 33000029, +REG64( EX_10_CPLT_CONF1 , RULL(0x34000009), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 35000009, +REG64( EX_10_CPLT_CONF1_OR , RULL(0x34000019), SH_UNT_EX_10 , + SH_ACS_SCOM1_OR ); //DUPS: 35000019, +REG64( EX_10_CPLT_CONF1_CLEAR , RULL(0x34000029), SH_UNT_EX_10 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 35000029, +REG64( EX_11_CPLT_CONF1 , RULL(0x36000009), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 37000009, +REG64( EX_11_CPLT_CONF1_OR , RULL(0x36000019), SH_UNT_EX_11 , + SH_ACS_SCOM1_OR ); //DUPS: 37000019, +REG64( EX_11_CPLT_CONF1_CLEAR , RULL(0x36000029), SH_UNT_EX_11 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 37000029, + +REG64( C_CPLT_CTRL0 , RULL(0x20000000), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_CPLT_CTRL0_OR , RULL(0x20000010), SH_UNT_C , SH_ACS_SCOM1_OR ); +REG64( C_CPLT_CTRL0_CLEAR , RULL(0x20000020), SH_UNT_C , + SH_ACS_SCOM2_CLEAR ); +REG64( C_0_CPLT_CTRL0 , RULL(0x20000000), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_CPLT_CTRL0_OR , RULL(0x20000010), SH_UNT_C_0 , SH_ACS_SCOM1_OR ); +REG64( C_0_CPLT_CTRL0_CLEAR , RULL(0x20000020), SH_UNT_C_0 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_1_CPLT_CTRL0 , RULL(0x21000000), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_CPLT_CTRL0_OR , RULL(0x21000010), SH_UNT_C_1 , SH_ACS_SCOM1_OR ); +REG64( C_1_CPLT_CTRL0_CLEAR , RULL(0x21000020), SH_UNT_C_1 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_2_CPLT_CTRL0 , RULL(0x22000000), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_CPLT_CTRL0_OR , RULL(0x22000010), SH_UNT_C_2 , SH_ACS_SCOM1_OR ); +REG64( C_2_CPLT_CTRL0_CLEAR , RULL(0x22000020), SH_UNT_C_2 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_3_CPLT_CTRL0 , RULL(0x23000000), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_CPLT_CTRL0_OR , RULL(0x23000010), SH_UNT_C_3 , SH_ACS_SCOM1_OR ); +REG64( C_3_CPLT_CTRL0_CLEAR , RULL(0x23000020), SH_UNT_C_3 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_4_CPLT_CTRL0 , RULL(0x24000000), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_CPLT_CTRL0_OR , RULL(0x24000010), SH_UNT_C_4 , SH_ACS_SCOM1_OR ); +REG64( C_4_CPLT_CTRL0_CLEAR , RULL(0x24000020), SH_UNT_C_4 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_5_CPLT_CTRL0 , RULL(0x25000000), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_CPLT_CTRL0_OR , RULL(0x25000010), SH_UNT_C_5 , SH_ACS_SCOM1_OR ); +REG64( C_5_CPLT_CTRL0_CLEAR , RULL(0x25000020), SH_UNT_C_5 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_6_CPLT_CTRL0 , RULL(0x26000000), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_CPLT_CTRL0_OR , RULL(0x26000010), SH_UNT_C_6 , SH_ACS_SCOM1_OR ); +REG64( C_6_CPLT_CTRL0_CLEAR , RULL(0x26000020), SH_UNT_C_6 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_7_CPLT_CTRL0 , RULL(0x27000000), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_CPLT_CTRL0_OR , RULL(0x27000010), SH_UNT_C_7 , SH_ACS_SCOM1_OR ); +REG64( C_7_CPLT_CTRL0_CLEAR , RULL(0x27000020), SH_UNT_C_7 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_8_CPLT_CTRL0 , RULL(0x28000000), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_CPLT_CTRL0_OR , RULL(0x28000010), SH_UNT_C_8 , SH_ACS_SCOM1_OR ); +REG64( C_8_CPLT_CTRL0_CLEAR , RULL(0x28000020), SH_UNT_C_8 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_9_CPLT_CTRL0 , RULL(0x29000000), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_CPLT_CTRL0_OR , RULL(0x29000010), SH_UNT_C_9 , SH_ACS_SCOM1_OR ); +REG64( C_9_CPLT_CTRL0_CLEAR , RULL(0x29000020), SH_UNT_C_9 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_10_CPLT_CTRL0 , RULL(0x2A000000), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_CPLT_CTRL0_OR , RULL(0x2A000010), SH_UNT_C_10 , SH_ACS_SCOM1_OR ); +REG64( C_10_CPLT_CTRL0_CLEAR , RULL(0x2A000020), SH_UNT_C_10 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_11_CPLT_CTRL0 , RULL(0x2B000000), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_CPLT_CTRL0_OR , RULL(0x2B000010), SH_UNT_C_11 , SH_ACS_SCOM1_OR ); +REG64( C_11_CPLT_CTRL0_CLEAR , RULL(0x2B000020), SH_UNT_C_11 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_12_CPLT_CTRL0 , RULL(0x2C000000), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_CPLT_CTRL0_OR , RULL(0x2C000010), SH_UNT_C_12 , SH_ACS_SCOM1_OR ); +REG64( C_12_CPLT_CTRL0_CLEAR , RULL(0x2C000020), SH_UNT_C_12 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_13_CPLT_CTRL0 , RULL(0x2D000000), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_CPLT_CTRL0_OR , RULL(0x2D000010), SH_UNT_C_13 , SH_ACS_SCOM1_OR ); +REG64( C_13_CPLT_CTRL0_CLEAR , RULL(0x2D000020), SH_UNT_C_13 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_14_CPLT_CTRL0 , RULL(0x2E000000), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_CPLT_CTRL0_OR , RULL(0x2E000010), SH_UNT_C_14 , SH_ACS_SCOM1_OR ); +REG64( C_14_CPLT_CTRL0_CLEAR , RULL(0x2E000020), SH_UNT_C_14 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_15_CPLT_CTRL0 , RULL(0x2F000000), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_CPLT_CTRL0_OR , RULL(0x2F000010), SH_UNT_C_15 , SH_ACS_SCOM1_OR ); +REG64( C_15_CPLT_CTRL0_CLEAR , RULL(0x2F000020), SH_UNT_C_15 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_16_CPLT_CTRL0 , RULL(0x30000000), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_CPLT_CTRL0_OR , RULL(0x30000010), SH_UNT_C_16 , SH_ACS_SCOM1_OR ); +REG64( C_16_CPLT_CTRL0_CLEAR , RULL(0x30000020), SH_UNT_C_16 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_17_CPLT_CTRL0 , RULL(0x31000000), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_CPLT_CTRL0_OR , RULL(0x31000010), SH_UNT_C_17 , SH_ACS_SCOM1_OR ); +REG64( C_17_CPLT_CTRL0_CLEAR , RULL(0x31000020), SH_UNT_C_17 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_18_CPLT_CTRL0 , RULL(0x32000000), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_CPLT_CTRL0_OR , RULL(0x32000010), SH_UNT_C_18 , SH_ACS_SCOM1_OR ); +REG64( C_18_CPLT_CTRL0_CLEAR , RULL(0x32000020), SH_UNT_C_18 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_19_CPLT_CTRL0 , RULL(0x33000000), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_CPLT_CTRL0_OR , RULL(0x33000010), SH_UNT_C_19 , SH_ACS_SCOM1_OR ); +REG64( C_19_CPLT_CTRL0_CLEAR , RULL(0x33000020), SH_UNT_C_19 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_20_CPLT_CTRL0 , RULL(0x34000000), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_CPLT_CTRL0_OR , RULL(0x34000010), SH_UNT_C_20 , SH_ACS_SCOM1_OR ); +REG64( C_20_CPLT_CTRL0_CLEAR , RULL(0x34000020), SH_UNT_C_20 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_21_CPLT_CTRL0 , RULL(0x35000000), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_CPLT_CTRL0_OR , RULL(0x35000010), SH_UNT_C_21 , SH_ACS_SCOM1_OR ); +REG64( C_21_CPLT_CTRL0_CLEAR , RULL(0x35000020), SH_UNT_C_21 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_22_CPLT_CTRL0 , RULL(0x36000000), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_CPLT_CTRL0_OR , RULL(0x36000010), SH_UNT_C_22 , SH_ACS_SCOM1_OR ); +REG64( C_22_CPLT_CTRL0_CLEAR , RULL(0x36000020), SH_UNT_C_22 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_23_CPLT_CTRL0 , RULL(0x37000000), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_CPLT_CTRL0_OR , RULL(0x37000010), SH_UNT_C_23 , SH_ACS_SCOM1_OR ); +REG64( C_23_CPLT_CTRL0_CLEAR , RULL(0x37000020), SH_UNT_C_23 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_CPLT_CTRL0 , RULL(0x10000000), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_CPLT_CTRL0_OR , RULL(0x10000010), SH_UNT_EQ , SH_ACS_SCOM1_OR ); +REG64( EQ_CPLT_CTRL0_CLEAR , RULL(0x10000020), SH_UNT_EQ , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_0_CPLT_CTRL0 , RULL(0x10000000), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_0_CPLT_CTRL0_OR , RULL(0x10000010), SH_UNT_EQ_0 , SH_ACS_SCOM1_OR ); +REG64( EQ_0_CPLT_CTRL0_CLEAR , RULL(0x10000020), SH_UNT_EQ_0 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_1_CPLT_CTRL0 , RULL(0x11000000), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_1_CPLT_CTRL0_OR , RULL(0x11000010), SH_UNT_EQ_1 , SH_ACS_SCOM1_OR ); +REG64( EQ_1_CPLT_CTRL0_CLEAR , RULL(0x11000020), SH_UNT_EQ_1 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_2_CPLT_CTRL0 , RULL(0x12000000), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_2_CPLT_CTRL0_OR , RULL(0x12000010), SH_UNT_EQ_2 , SH_ACS_SCOM1_OR ); +REG64( EQ_2_CPLT_CTRL0_CLEAR , RULL(0x12000020), SH_UNT_EQ_2 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_3_CPLT_CTRL0 , RULL(0x13000000), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_3_CPLT_CTRL0_OR , RULL(0x13000010), SH_UNT_EQ_3 , SH_ACS_SCOM1_OR ); +REG64( EQ_3_CPLT_CTRL0_CLEAR , RULL(0x13000020), SH_UNT_EQ_3 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_4_CPLT_CTRL0 , RULL(0x14000000), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_4_CPLT_CTRL0_OR , RULL(0x14000010), SH_UNT_EQ_4 , SH_ACS_SCOM1_OR ); +REG64( EQ_4_CPLT_CTRL0_CLEAR , RULL(0x14000020), SH_UNT_EQ_4 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_5_CPLT_CTRL0 , RULL(0x15000000), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EQ_5_CPLT_CTRL0_OR , RULL(0x15000010), SH_UNT_EQ_5 , SH_ACS_SCOM1_OR ); +REG64( EQ_5_CPLT_CTRL0_CLEAR , RULL(0x15000020), SH_UNT_EQ_5 , + SH_ACS_SCOM2_CLEAR ); +REG64( EX_CPLT_CTRL0 , RULL(0x20000000), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 21000000, +REG64( EX_CPLT_CTRL0_OR , RULL(0x20000010), SH_UNT_EX , + SH_ACS_SCOM1_OR ); //DUPS: 21000010, +REG64( EX_CPLT_CTRL0_CLEAR , RULL(0x20000020), SH_UNT_EX , + SH_ACS_SCOM2_CLEAR ); //DUPS: 21000020, +REG64( EX_0_CPLT_CTRL0 , RULL(0x20000000), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 21000000, +REG64( EX_0_CPLT_CTRL0_OR , RULL(0x20000010), SH_UNT_EX_0 , + SH_ACS_SCOM1_OR ); //DUPS: 21000010, +REG64( EX_0_CPLT_CTRL0_CLEAR , RULL(0x20000020), SH_UNT_EX_0 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 21000020, +REG64( EX_1_CPLT_CTRL0 , RULL(0x22000000), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 23000000, +REG64( EX_1_CPLT_CTRL0_OR , RULL(0x22000010), SH_UNT_EX_1 , + SH_ACS_SCOM1_OR ); //DUPS: 23000010, +REG64( EX_1_CPLT_CTRL0_CLEAR , RULL(0x22000020), SH_UNT_EX_1 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 23000020, +REG64( EX_2_CPLT_CTRL0 , RULL(0x24000000), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 25000000, +REG64( EX_2_CPLT_CTRL0_OR , RULL(0x24000010), SH_UNT_EX_2 , + SH_ACS_SCOM1_OR ); //DUPS: 25000010, +REG64( EX_2_CPLT_CTRL0_CLEAR , RULL(0x24000020), SH_UNT_EX_2 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 25000020, +REG64( EX_3_CPLT_CTRL0 , RULL(0x26000000), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 27000000, +REG64( EX_3_CPLT_CTRL0_OR , RULL(0x26000010), SH_UNT_EX_3 , + SH_ACS_SCOM1_OR ); //DUPS: 27000010, +REG64( EX_3_CPLT_CTRL0_CLEAR , RULL(0x26000020), SH_UNT_EX_3 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 27000020, +REG64( EX_4_CPLT_CTRL0 , RULL(0x28000000), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 29000000, +REG64( EX_4_CPLT_CTRL0_OR , RULL(0x28000010), SH_UNT_EX_4 , + SH_ACS_SCOM1_OR ); //DUPS: 29000010, +REG64( EX_4_CPLT_CTRL0_CLEAR , RULL(0x28000020), SH_UNT_EX_4 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 29000020, +REG64( EX_5_CPLT_CTRL0 , RULL(0x2A000000), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B000000, +REG64( EX_5_CPLT_CTRL0_OR , RULL(0x2A000010), SH_UNT_EX_5 , + SH_ACS_SCOM1_OR ); //DUPS: 2B000010, +REG64( EX_5_CPLT_CTRL0_CLEAR , RULL(0x2A000020), SH_UNT_EX_5 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 2B000020, +REG64( EX_6_CPLT_CTRL0 , RULL(0x2C000000), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D000000, +REG64( EX_6_CPLT_CTRL0_OR , RULL(0x2C000010), SH_UNT_EX_6 , + SH_ACS_SCOM1_OR ); //DUPS: 2D000010, +REG64( EX_6_CPLT_CTRL0_CLEAR , RULL(0x2C000020), SH_UNT_EX_6 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 2D000020, +REG64( EX_7_CPLT_CTRL0 , RULL(0x2E000000), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F000000, +REG64( EX_7_CPLT_CTRL0_OR , RULL(0x2E000010), SH_UNT_EX_7 , + SH_ACS_SCOM1_OR ); //DUPS: 2F000010, +REG64( EX_7_CPLT_CTRL0_CLEAR , RULL(0x2E000020), SH_UNT_EX_7 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 2F000020, +REG64( EX_8_CPLT_CTRL0 , RULL(0x30000000), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 31000000, +REG64( EX_8_CPLT_CTRL0_OR , RULL(0x30000010), SH_UNT_EX_8 , + SH_ACS_SCOM1_OR ); //DUPS: 31000010, +REG64( EX_8_CPLT_CTRL0_CLEAR , RULL(0x30000020), SH_UNT_EX_8 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 31000020, +REG64( EX_9_CPLT_CTRL0 , RULL(0x32000000), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 33000000, +REG64( EX_9_CPLT_CTRL0_OR , RULL(0x32000010), SH_UNT_EX_9 , + SH_ACS_SCOM1_OR ); //DUPS: 33000010, +REG64( EX_9_CPLT_CTRL0_CLEAR , RULL(0x32000020), SH_UNT_EX_9 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 33000020, +REG64( EX_10_CPLT_CTRL0 , RULL(0x34000000), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 35000000, +REG64( EX_10_CPLT_CTRL0_OR , RULL(0x34000010), SH_UNT_EX_10 , + SH_ACS_SCOM1_OR ); //DUPS: 35000010, +REG64( EX_10_CPLT_CTRL0_CLEAR , RULL(0x34000020), SH_UNT_EX_10 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 35000020, +REG64( EX_11_CPLT_CTRL0 , RULL(0x36000000), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 37000000, +REG64( EX_11_CPLT_CTRL0_OR , RULL(0x36000010), SH_UNT_EX_11 , + SH_ACS_SCOM1_OR ); //DUPS: 37000010, +REG64( EX_11_CPLT_CTRL0_CLEAR , RULL(0x36000020), SH_UNT_EX_11 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 37000020, + +REG64( C_CPLT_CTRL1 , RULL(0x20000001), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_CPLT_CTRL1_OR , RULL(0x20000011), SH_UNT_C , SH_ACS_SCOM1_OR ); +REG64( C_CPLT_CTRL1_CLEAR , RULL(0x20000021), SH_UNT_C , + SH_ACS_SCOM2_CLEAR ); +REG64( C_0_CPLT_CTRL1 , RULL(0x20000001), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_CPLT_CTRL1_OR , RULL(0x20000011), SH_UNT_C_0 , SH_ACS_SCOM1_OR ); +REG64( C_0_CPLT_CTRL1_CLEAR , RULL(0x20000021), SH_UNT_C_0 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_1_CPLT_CTRL1 , RULL(0x21000001), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_CPLT_CTRL1_OR , RULL(0x21000011), SH_UNT_C_1 , SH_ACS_SCOM1_OR ); +REG64( C_1_CPLT_CTRL1_CLEAR , RULL(0x21000021), SH_UNT_C_1 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_2_CPLT_CTRL1 , RULL(0x22000001), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_CPLT_CTRL1_OR , RULL(0x22000011), SH_UNT_C_2 , SH_ACS_SCOM1_OR ); +REG64( C_2_CPLT_CTRL1_CLEAR , RULL(0x22000021), SH_UNT_C_2 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_3_CPLT_CTRL1 , RULL(0x23000001), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_CPLT_CTRL1_OR , RULL(0x23000011), SH_UNT_C_3 , SH_ACS_SCOM1_OR ); +REG64( C_3_CPLT_CTRL1_CLEAR , RULL(0x23000021), SH_UNT_C_3 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_4_CPLT_CTRL1 , RULL(0x24000001), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_CPLT_CTRL1_OR , RULL(0x24000011), SH_UNT_C_4 , SH_ACS_SCOM1_OR ); +REG64( C_4_CPLT_CTRL1_CLEAR , RULL(0x24000021), SH_UNT_C_4 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_5_CPLT_CTRL1 , RULL(0x25000001), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_CPLT_CTRL1_OR , RULL(0x25000011), SH_UNT_C_5 , SH_ACS_SCOM1_OR ); +REG64( C_5_CPLT_CTRL1_CLEAR , RULL(0x25000021), SH_UNT_C_5 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_6_CPLT_CTRL1 , RULL(0x26000001), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_CPLT_CTRL1_OR , RULL(0x26000011), SH_UNT_C_6 , SH_ACS_SCOM1_OR ); +REG64( C_6_CPLT_CTRL1_CLEAR , RULL(0x26000021), SH_UNT_C_6 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_7_CPLT_CTRL1 , RULL(0x27000001), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_CPLT_CTRL1_OR , RULL(0x27000011), SH_UNT_C_7 , SH_ACS_SCOM1_OR ); +REG64( C_7_CPLT_CTRL1_CLEAR , RULL(0x27000021), SH_UNT_C_7 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_8_CPLT_CTRL1 , RULL(0x28000001), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_CPLT_CTRL1_OR , RULL(0x28000011), SH_UNT_C_8 , SH_ACS_SCOM1_OR ); +REG64( C_8_CPLT_CTRL1_CLEAR , RULL(0x28000021), SH_UNT_C_8 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_9_CPLT_CTRL1 , RULL(0x29000001), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_CPLT_CTRL1_OR , RULL(0x29000011), SH_UNT_C_9 , SH_ACS_SCOM1_OR ); +REG64( C_9_CPLT_CTRL1_CLEAR , RULL(0x29000021), SH_UNT_C_9 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_10_CPLT_CTRL1 , RULL(0x2A000001), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_CPLT_CTRL1_OR , RULL(0x2A000011), SH_UNT_C_10 , SH_ACS_SCOM1_OR ); +REG64( C_10_CPLT_CTRL1_CLEAR , RULL(0x2A000021), SH_UNT_C_10 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_11_CPLT_CTRL1 , RULL(0x2B000001), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_CPLT_CTRL1_OR , RULL(0x2B000011), SH_UNT_C_11 , SH_ACS_SCOM1_OR ); +REG64( C_11_CPLT_CTRL1_CLEAR , RULL(0x2B000021), SH_UNT_C_11 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_12_CPLT_CTRL1 , RULL(0x2C000001), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_CPLT_CTRL1_OR , RULL(0x2C000011), SH_UNT_C_12 , SH_ACS_SCOM1_OR ); +REG64( C_12_CPLT_CTRL1_CLEAR , RULL(0x2C000021), SH_UNT_C_12 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_13_CPLT_CTRL1 , RULL(0x2D000001), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_CPLT_CTRL1_OR , RULL(0x2D000011), SH_UNT_C_13 , SH_ACS_SCOM1_OR ); +REG64( C_13_CPLT_CTRL1_CLEAR , RULL(0x2D000021), SH_UNT_C_13 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_14_CPLT_CTRL1 , RULL(0x2E000001), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_CPLT_CTRL1_OR , RULL(0x2E000011), SH_UNT_C_14 , SH_ACS_SCOM1_OR ); +REG64( C_14_CPLT_CTRL1_CLEAR , RULL(0x2E000021), SH_UNT_C_14 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_15_CPLT_CTRL1 , RULL(0x2F000001), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_CPLT_CTRL1_OR , RULL(0x2F000011), SH_UNT_C_15 , SH_ACS_SCOM1_OR ); +REG64( C_15_CPLT_CTRL1_CLEAR , RULL(0x2F000021), SH_UNT_C_15 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_16_CPLT_CTRL1 , RULL(0x30000001), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_CPLT_CTRL1_OR , RULL(0x30000011), SH_UNT_C_16 , SH_ACS_SCOM1_OR ); +REG64( C_16_CPLT_CTRL1_CLEAR , RULL(0x30000021), SH_UNT_C_16 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_17_CPLT_CTRL1 , RULL(0x31000001), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_CPLT_CTRL1_OR , RULL(0x31000011), SH_UNT_C_17 , SH_ACS_SCOM1_OR ); +REG64( C_17_CPLT_CTRL1_CLEAR , RULL(0x31000021), SH_UNT_C_17 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_18_CPLT_CTRL1 , RULL(0x32000001), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_CPLT_CTRL1_OR , RULL(0x32000011), SH_UNT_C_18 , SH_ACS_SCOM1_OR ); +REG64( C_18_CPLT_CTRL1_CLEAR , RULL(0x32000021), SH_UNT_C_18 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_19_CPLT_CTRL1 , RULL(0x33000001), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_CPLT_CTRL1_OR , RULL(0x33000011), SH_UNT_C_19 , SH_ACS_SCOM1_OR ); +REG64( C_19_CPLT_CTRL1_CLEAR , RULL(0x33000021), SH_UNT_C_19 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_20_CPLT_CTRL1 , RULL(0x34000001), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_CPLT_CTRL1_OR , RULL(0x34000011), SH_UNT_C_20 , SH_ACS_SCOM1_OR ); +REG64( C_20_CPLT_CTRL1_CLEAR , RULL(0x34000021), SH_UNT_C_20 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_21_CPLT_CTRL1 , RULL(0x35000001), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_CPLT_CTRL1_OR , RULL(0x35000011), SH_UNT_C_21 , SH_ACS_SCOM1_OR ); +REG64( C_21_CPLT_CTRL1_CLEAR , RULL(0x35000021), SH_UNT_C_21 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_22_CPLT_CTRL1 , RULL(0x36000001), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_CPLT_CTRL1_OR , RULL(0x36000011), SH_UNT_C_22 , SH_ACS_SCOM1_OR ); +REG64( C_22_CPLT_CTRL1_CLEAR , RULL(0x36000021), SH_UNT_C_22 , + SH_ACS_SCOM2_CLEAR ); +REG64( C_23_CPLT_CTRL1 , RULL(0x37000001), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_CPLT_CTRL1_OR , RULL(0x37000011), SH_UNT_C_23 , SH_ACS_SCOM1_OR ); +REG64( C_23_CPLT_CTRL1_CLEAR , RULL(0x37000021), SH_UNT_C_23 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_CPLT_CTRL1 , RULL(0x10000001), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_CPLT_CTRL1_OR , RULL(0x10000011), SH_UNT_EQ , SH_ACS_SCOM1_OR ); +REG64( EQ_CPLT_CTRL1_CLEAR , RULL(0x10000021), SH_UNT_EQ , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_0_CPLT_CTRL1 , RULL(0x10000001), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_0_CPLT_CTRL1_OR , RULL(0x10000011), SH_UNT_EQ_0 , SH_ACS_SCOM1_OR ); +REG64( EQ_0_CPLT_CTRL1_CLEAR , RULL(0x10000021), SH_UNT_EQ_0 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_1_CPLT_CTRL1 , RULL(0x11000001), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_1_CPLT_CTRL1_OR , RULL(0x11000011), SH_UNT_EQ_1 , SH_ACS_SCOM1_OR ); +REG64( EQ_1_CPLT_CTRL1_CLEAR , RULL(0x11000021), SH_UNT_EQ_1 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_2_CPLT_CTRL1 , RULL(0x12000001), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_2_CPLT_CTRL1_OR , RULL(0x12000011), SH_UNT_EQ_2 , SH_ACS_SCOM1_OR ); +REG64( EQ_2_CPLT_CTRL1_CLEAR , RULL(0x12000021), SH_UNT_EQ_2 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_3_CPLT_CTRL1 , RULL(0x13000001), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_3_CPLT_CTRL1_OR , RULL(0x13000011), SH_UNT_EQ_3 , SH_ACS_SCOM1_OR ); +REG64( EQ_3_CPLT_CTRL1_CLEAR , RULL(0x13000021), SH_UNT_EQ_3 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_4_CPLT_CTRL1 , RULL(0x14000001), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_4_CPLT_CTRL1_OR , RULL(0x14000011), SH_UNT_EQ_4 , SH_ACS_SCOM1_OR ); +REG64( EQ_4_CPLT_CTRL1_CLEAR , RULL(0x14000021), SH_UNT_EQ_4 , + SH_ACS_SCOM2_CLEAR ); +REG64( EQ_5_CPLT_CTRL1 , RULL(0x15000001), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EQ_5_CPLT_CTRL1_OR , RULL(0x15000011), SH_UNT_EQ_5 , SH_ACS_SCOM1_OR ); +REG64( EQ_5_CPLT_CTRL1_CLEAR , RULL(0x15000021), SH_UNT_EQ_5 , + SH_ACS_SCOM2_CLEAR ); +REG64( EX_CPLT_CTRL1 , RULL(0x20000001), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 21000001, +REG64( EX_CPLT_CTRL1_OR , RULL(0x20000011), SH_UNT_EX , + SH_ACS_SCOM1_OR ); //DUPS: 21000011, +REG64( EX_CPLT_CTRL1_CLEAR , RULL(0x20000021), SH_UNT_EX , + SH_ACS_SCOM2_CLEAR ); //DUPS: 21000021, +REG64( EX_0_CPLT_CTRL1 , RULL(0x20000001), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 21000001, +REG64( EX_0_CPLT_CTRL1_OR , RULL(0x20000011), SH_UNT_EX_0 , + SH_ACS_SCOM1_OR ); //DUPS: 21000011, +REG64( EX_0_CPLT_CTRL1_CLEAR , RULL(0x20000021), SH_UNT_EX_0 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 21000021, +REG64( EX_1_CPLT_CTRL1 , RULL(0x22000001), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 23000001, +REG64( EX_1_CPLT_CTRL1_OR , RULL(0x22000011), SH_UNT_EX_1 , + SH_ACS_SCOM1_OR ); //DUPS: 23000011, +REG64( EX_1_CPLT_CTRL1_CLEAR , RULL(0x22000021), SH_UNT_EX_1 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 23000021, +REG64( EX_2_CPLT_CTRL1 , RULL(0x24000001), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 25000001, +REG64( EX_2_CPLT_CTRL1_OR , RULL(0x24000011), SH_UNT_EX_2 , + SH_ACS_SCOM1_OR ); //DUPS: 25000011, +REG64( EX_2_CPLT_CTRL1_CLEAR , RULL(0x24000021), SH_UNT_EX_2 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 25000021, +REG64( EX_3_CPLT_CTRL1 , RULL(0x26000001), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 27000001, +REG64( EX_3_CPLT_CTRL1_OR , RULL(0x26000011), SH_UNT_EX_3 , + SH_ACS_SCOM1_OR ); //DUPS: 27000011, +REG64( EX_3_CPLT_CTRL1_CLEAR , RULL(0x26000021), SH_UNT_EX_3 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 27000021, +REG64( EX_4_CPLT_CTRL1 , RULL(0x28000001), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 29000001, +REG64( EX_4_CPLT_CTRL1_OR , RULL(0x28000011), SH_UNT_EX_4 , + SH_ACS_SCOM1_OR ); //DUPS: 29000011, +REG64( EX_4_CPLT_CTRL1_CLEAR , RULL(0x28000021), SH_UNT_EX_4 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 29000021, +REG64( EX_5_CPLT_CTRL1 , RULL(0x2A000001), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B000001, +REG64( EX_5_CPLT_CTRL1_OR , RULL(0x2A000011), SH_UNT_EX_5 , + SH_ACS_SCOM1_OR ); //DUPS: 2B000011, +REG64( EX_5_CPLT_CTRL1_CLEAR , RULL(0x2A000021), SH_UNT_EX_5 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 2B000021, +REG64( EX_6_CPLT_CTRL1 , RULL(0x2C000001), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D000001, +REG64( EX_6_CPLT_CTRL1_OR , RULL(0x2C000011), SH_UNT_EX_6 , + SH_ACS_SCOM1_OR ); //DUPS: 2D000011, +REG64( EX_6_CPLT_CTRL1_CLEAR , RULL(0x2C000021), SH_UNT_EX_6 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 2D000021, +REG64( EX_7_CPLT_CTRL1 , RULL(0x2E000001), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F000001, +REG64( EX_7_CPLT_CTRL1_OR , RULL(0x2E000011), SH_UNT_EX_7 , + SH_ACS_SCOM1_OR ); //DUPS: 2F000011, +REG64( EX_7_CPLT_CTRL1_CLEAR , RULL(0x2E000021), SH_UNT_EX_7 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 2F000021, +REG64( EX_8_CPLT_CTRL1 , RULL(0x30000001), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 31000001, +REG64( EX_8_CPLT_CTRL1_OR , RULL(0x30000011), SH_UNT_EX_8 , + SH_ACS_SCOM1_OR ); //DUPS: 31000011, +REG64( EX_8_CPLT_CTRL1_CLEAR , RULL(0x30000021), SH_UNT_EX_8 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 31000021, +REG64( EX_9_CPLT_CTRL1 , RULL(0x32000001), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 33000001, +REG64( EX_9_CPLT_CTRL1_OR , RULL(0x32000011), SH_UNT_EX_9 , + SH_ACS_SCOM1_OR ); //DUPS: 33000011, +REG64( EX_9_CPLT_CTRL1_CLEAR , RULL(0x32000021), SH_UNT_EX_9 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 33000021, +REG64( EX_10_CPLT_CTRL1 , RULL(0x34000001), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 35000001, +REG64( EX_10_CPLT_CTRL1_OR , RULL(0x34000011), SH_UNT_EX_10 , + SH_ACS_SCOM1_OR ); //DUPS: 35000011, +REG64( EX_10_CPLT_CTRL1_CLEAR , RULL(0x34000021), SH_UNT_EX_10 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 35000021, +REG64( EX_11_CPLT_CTRL1 , RULL(0x36000001), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 37000001, +REG64( EX_11_CPLT_CTRL1_OR , RULL(0x36000011), SH_UNT_EX_11 , + SH_ACS_SCOM1_OR ); //DUPS: 37000011, +REG64( EX_11_CPLT_CTRL1_CLEAR , RULL(0x36000021), SH_UNT_EX_11 , + SH_ACS_SCOM2_CLEAR ); //DUPS: 37000021, + +REG64( C_CPLT_MASK0 , RULL(0x20000101), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_CPLT_MASK0 , RULL(0x20000101), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_CPLT_MASK0 , RULL(0x21000101), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_CPLT_MASK0 , RULL(0x22000101), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_CPLT_MASK0 , RULL(0x23000101), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_CPLT_MASK0 , RULL(0x24000101), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_CPLT_MASK0 , RULL(0x25000101), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_CPLT_MASK0 , RULL(0x26000101), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_CPLT_MASK0 , RULL(0x27000101), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_CPLT_MASK0 , RULL(0x28000101), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_CPLT_MASK0 , RULL(0x29000101), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_CPLT_MASK0 , RULL(0x2A000101), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_CPLT_MASK0 , RULL(0x2B000101), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_CPLT_MASK0 , RULL(0x2C000101), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_CPLT_MASK0 , RULL(0x2D000101), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_CPLT_MASK0 , RULL(0x2E000101), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_CPLT_MASK0 , RULL(0x2F000101), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_CPLT_MASK0 , RULL(0x30000101), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_CPLT_MASK0 , RULL(0x31000101), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_CPLT_MASK0 , RULL(0x32000101), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_CPLT_MASK0 , RULL(0x33000101), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_CPLT_MASK0 , RULL(0x34000101), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_CPLT_MASK0 , RULL(0x35000101), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_CPLT_MASK0 , RULL(0x36000101), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_CPLT_MASK0 , RULL(0x37000101), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_CPLT_MASK0 , RULL(0x10000101), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_CPLT_MASK0 , RULL(0x10000101), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_CPLT_MASK0 , RULL(0x11000101), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_CPLT_MASK0 , RULL(0x12000101), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_CPLT_MASK0 , RULL(0x13000101), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_CPLT_MASK0 , RULL(0x14000101), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_CPLT_MASK0 , RULL(0x15000101), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_CPLT_MASK0 , RULL(0x20000101), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21000101, +REG64( EX_0_CPLT_MASK0 , RULL(0x20000101), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21000101, +REG64( EX_1_CPLT_MASK0 , RULL(0x22000101), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23000101, +REG64( EX_2_CPLT_MASK0 , RULL(0x24000101), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25000101, +REG64( EX_3_CPLT_MASK0 , RULL(0x26000101), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27000101, +REG64( EX_4_CPLT_MASK0 , RULL(0x28000101), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29000101, +REG64( EX_5_CPLT_MASK0 , RULL(0x2A000101), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B000101, +REG64( EX_6_CPLT_MASK0 , RULL(0x2C000101), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D000101, +REG64( EX_7_CPLT_MASK0 , RULL(0x2E000101), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F000101, +REG64( EX_8_CPLT_MASK0 , RULL(0x30000101), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31000101, +REG64( EX_9_CPLT_MASK0 , RULL(0x32000101), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33000101, +REG64( EX_10_CPLT_MASK0 , RULL(0x34000101), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35000101, +REG64( EX_11_CPLT_MASK0 , RULL(0x36000101), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37000101, + +REG64( C_CPLT_STAT0 , RULL(0x20000100), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_CPLT_STAT0 , RULL(0x20000100), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_CPLT_STAT0 , RULL(0x21000100), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_CPLT_STAT0 , RULL(0x22000100), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_CPLT_STAT0 , RULL(0x23000100), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_CPLT_STAT0 , RULL(0x24000100), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_CPLT_STAT0 , RULL(0x25000100), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_CPLT_STAT0 , RULL(0x26000100), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_CPLT_STAT0 , RULL(0x27000100), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_CPLT_STAT0 , RULL(0x28000100), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_CPLT_STAT0 , RULL(0x29000100), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_CPLT_STAT0 , RULL(0x2A000100), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_CPLT_STAT0 , RULL(0x2B000100), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_CPLT_STAT0 , RULL(0x2C000100), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_CPLT_STAT0 , RULL(0x2D000100), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_CPLT_STAT0 , RULL(0x2E000100), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_CPLT_STAT0 , RULL(0x2F000100), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_CPLT_STAT0 , RULL(0x30000100), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_CPLT_STAT0 , RULL(0x31000100), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_CPLT_STAT0 , RULL(0x32000100), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_CPLT_STAT0 , RULL(0x33000100), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_CPLT_STAT0 , RULL(0x34000100), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_CPLT_STAT0 , RULL(0x35000100), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_CPLT_STAT0 , RULL(0x36000100), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_CPLT_STAT0 , RULL(0x37000100), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_CPLT_STAT0 , RULL(0x10000100), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_CPLT_STAT0 , RULL(0x10000100), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_CPLT_STAT0 , RULL(0x11000100), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_CPLT_STAT0 , RULL(0x12000100), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_CPLT_STAT0 , RULL(0x13000100), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_CPLT_STAT0 , RULL(0x14000100), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_CPLT_STAT0 , RULL(0x15000100), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_CPLT_STAT0 , RULL(0x20000100), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21000100, +REG64( EX_0_CPLT_STAT0 , RULL(0x20000100), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21000100, +REG64( EX_1_CPLT_STAT0 , RULL(0x22000100), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23000100, +REG64( EX_2_CPLT_STAT0 , RULL(0x24000100), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25000100, +REG64( EX_3_CPLT_STAT0 , RULL(0x26000100), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27000100, +REG64( EX_4_CPLT_STAT0 , RULL(0x28000100), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29000100, +REG64( EX_5_CPLT_STAT0 , RULL(0x2A000100), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B000100, +REG64( EX_6_CPLT_STAT0 , RULL(0x2C000100), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D000100, +REG64( EX_7_CPLT_STAT0 , RULL(0x2E000100), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F000100, +REG64( EX_8_CPLT_STAT0 , RULL(0x30000100), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31000100, +REG64( EX_9_CPLT_STAT0 , RULL(0x32000100), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33000100, +REG64( EX_10_CPLT_STAT0 , RULL(0x34000100), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35000100, +REG64( EX_11_CPLT_STAT0 , RULL(0x36000100), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37000100, + +REG64( C_CPPM_CACCR , RULL(0x200F0168), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_CPPM_CACCR_CLEAR , RULL(0x200F0169), SH_UNT_C , + SH_ACS_SCOM1_CLEAR ); +REG64( C_CPPM_CACCR_OR , RULL(0x200F016A), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_CPPM_CACCR , RULL(0x200F0168), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_CPPM_CACCR_CLEAR , RULL(0x200F0169), SH_UNT_C_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_0_CPPM_CACCR_OR , RULL(0x200F016A), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_CPPM_CACCR , RULL(0x210F0168), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_CPPM_CACCR_CLEAR , RULL(0x210F0169), SH_UNT_C_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_1_CPPM_CACCR_OR , RULL(0x210F016A), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_CPPM_CACCR , RULL(0x220F0168), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_CPPM_CACCR_CLEAR , RULL(0x220F0169), SH_UNT_C_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_2_CPPM_CACCR_OR , RULL(0x220F016A), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_CPPM_CACCR , RULL(0x230F0168), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_CPPM_CACCR_CLEAR , RULL(0x230F0169), SH_UNT_C_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_3_CPPM_CACCR_OR , RULL(0x230F016A), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_CPPM_CACCR , RULL(0x240F0168), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_CPPM_CACCR_CLEAR , RULL(0x240F0169), SH_UNT_C_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_4_CPPM_CACCR_OR , RULL(0x240F016A), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_CPPM_CACCR , RULL(0x250F0168), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_CPPM_CACCR_CLEAR , RULL(0x250F0169), SH_UNT_C_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_5_CPPM_CACCR_OR , RULL(0x250F016A), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_CPPM_CACCR , RULL(0x260F0168), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_CPPM_CACCR_CLEAR , RULL(0x260F0169), SH_UNT_C_6 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_6_CPPM_CACCR_OR , RULL(0x260F016A), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_CPPM_CACCR , RULL(0x270F0168), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_CPPM_CACCR_CLEAR , RULL(0x270F0169), SH_UNT_C_7 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_7_CPPM_CACCR_OR , RULL(0x270F016A), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_CPPM_CACCR , RULL(0x280F0168), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_CPPM_CACCR_CLEAR , RULL(0x280F0169), SH_UNT_C_8 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_8_CPPM_CACCR_OR , RULL(0x280F016A), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_CPPM_CACCR , RULL(0x290F0168), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_CPPM_CACCR_CLEAR , RULL(0x290F0169), SH_UNT_C_9 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_9_CPPM_CACCR_OR , RULL(0x290F016A), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_CPPM_CACCR , RULL(0x2A0F0168), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_CPPM_CACCR_CLEAR , RULL(0x2A0F0169), SH_UNT_C_10 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_10_CPPM_CACCR_OR , RULL(0x2A0F016A), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_CPPM_CACCR , RULL(0x2B0F0168), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_CPPM_CACCR_CLEAR , RULL(0x2B0F0169), SH_UNT_C_11 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_11_CPPM_CACCR_OR , RULL(0x2B0F016A), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_CPPM_CACCR , RULL(0x2C0F0168), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_CPPM_CACCR_CLEAR , RULL(0x2C0F0169), SH_UNT_C_12 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_12_CPPM_CACCR_OR , RULL(0x2C0F016A), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_CPPM_CACCR , RULL(0x2D0F0168), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_CPPM_CACCR_CLEAR , RULL(0x2D0F0169), SH_UNT_C_13 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_13_CPPM_CACCR_OR , RULL(0x2D0F016A), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_CPPM_CACCR , RULL(0x2E0F0168), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_CPPM_CACCR_CLEAR , RULL(0x2E0F0169), SH_UNT_C_14 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_14_CPPM_CACCR_OR , RULL(0x2E0F016A), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_CPPM_CACCR , RULL(0x2F0F0168), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_CPPM_CACCR_CLEAR , RULL(0x2F0F0169), SH_UNT_C_15 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_15_CPPM_CACCR_OR , RULL(0x2F0F016A), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_CPPM_CACCR , RULL(0x300F0168), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_CPPM_CACCR_CLEAR , RULL(0x300F0169), SH_UNT_C_16 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_16_CPPM_CACCR_OR , RULL(0x300F016A), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_CPPM_CACCR , RULL(0x310F0168), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_CPPM_CACCR_CLEAR , RULL(0x310F0169), SH_UNT_C_17 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_17_CPPM_CACCR_OR , RULL(0x310F016A), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_CPPM_CACCR , RULL(0x320F0168), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_CPPM_CACCR_CLEAR , RULL(0x320F0169), SH_UNT_C_18 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_18_CPPM_CACCR_OR , RULL(0x320F016A), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_CPPM_CACCR , RULL(0x330F0168), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_CPPM_CACCR_CLEAR , RULL(0x330F0169), SH_UNT_C_19 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_19_CPPM_CACCR_OR , RULL(0x330F016A), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_CPPM_CACCR , RULL(0x340F0168), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_CPPM_CACCR_CLEAR , RULL(0x340F0169), SH_UNT_C_20 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_20_CPPM_CACCR_OR , RULL(0x340F016A), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_CPPM_CACCR , RULL(0x350F0168), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_CPPM_CACCR_CLEAR , RULL(0x350F0169), SH_UNT_C_21 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_21_CPPM_CACCR_OR , RULL(0x350F016A), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_CPPM_CACCR , RULL(0x360F0168), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_CPPM_CACCR_CLEAR , RULL(0x360F0169), SH_UNT_C_22 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_22_CPPM_CACCR_OR , RULL(0x360F016A), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_CPPM_CACCR , RULL(0x370F0168), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_CPPM_CACCR_CLEAR , RULL(0x370F0169), SH_UNT_C_23 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_23_CPPM_CACCR_OR , RULL(0x370F016A), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EX_CPPM_CACCR , RULL(0x200F0168), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F0168, +REG64( EX_CPPM_CACCR_CLEAR , RULL(0x200F0169), SH_UNT_EX , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F0169, +REG64( EX_CPPM_CACCR_OR , RULL(0x200F016A), SH_UNT_EX , + SH_ACS_SCOM2_OR ); //DUPS: 210F016A, +REG64( EX_0_CPPM_CACCR , RULL(0x200F0168), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F0168, +REG64( EX_0_CPPM_CACCR_CLEAR , RULL(0x200F0169), SH_UNT_EX_0 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F0169, +REG64( EX_0_CPPM_CACCR_OR , RULL(0x200F016A), SH_UNT_EX_0 , + SH_ACS_SCOM2_OR ); //DUPS: 210F016A, +REG64( EX_1_CPPM_CACCR , RULL(0x230F0168), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F0168, +REG64( EX_1_CPPM_CACCR_CLEAR , RULL(0x230F0169), SH_UNT_EX_1 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 220F0169, +REG64( EX_1_CPPM_CACCR_OR , RULL(0x230F016A), SH_UNT_EX_1 , + SH_ACS_SCOM2_OR ); //DUPS: 220F016A, +REG64( EX_2_CPPM_CACCR , RULL(0x240F0168), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F0168, +REG64( EX_2_CPPM_CACCR_CLEAR , RULL(0x240F0169), SH_UNT_EX_2 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 250F0169, +REG64( EX_2_CPPM_CACCR_OR , RULL(0x240F016A), SH_UNT_EX_2 , + SH_ACS_SCOM2_OR ); //DUPS: 250F016A, +REG64( EX_3_CPPM_CACCR , RULL(0x260F0168), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F0168, +REG64( EX_3_CPPM_CACCR_CLEAR , RULL(0x260F0169), SH_UNT_EX_3 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 270F0169, +REG64( EX_3_CPPM_CACCR_OR , RULL(0x260F016A), SH_UNT_EX_3 , + SH_ACS_SCOM2_OR ); //DUPS: 270F016A, +REG64( EX_4_CPPM_CACCR , RULL(0x280F0168), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F0168, +REG64( EX_4_CPPM_CACCR_CLEAR , RULL(0x280F0169), SH_UNT_EX_4 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 290F0169, +REG64( EX_4_CPPM_CACCR_OR , RULL(0x280F016A), SH_UNT_EX_4 , + SH_ACS_SCOM2_OR ); //DUPS: 290F016A, +REG64( EX_5_CPPM_CACCR , RULL(0x2A0F0168), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F0168, +REG64( EX_5_CPPM_CACCR_CLEAR , RULL(0x2A0F0169), SH_UNT_EX_5 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2B0F0169, +REG64( EX_5_CPPM_CACCR_OR , RULL(0x2A0F016A), SH_UNT_EX_5 , + SH_ACS_SCOM2_OR ); //DUPS: 2B0F016A, +REG64( EX_6_CPPM_CACCR , RULL(0x2C0F0168), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F0168, +REG64( EX_6_CPPM_CACCR_CLEAR , RULL(0x2C0F0169), SH_UNT_EX_6 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2D0F0169, +REG64( EX_6_CPPM_CACCR_OR , RULL(0x2C0F016A), SH_UNT_EX_6 , + SH_ACS_SCOM2_OR ); //DUPS: 2D0F016A, +REG64( EX_7_CPPM_CACCR , RULL(0x2E0F0168), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F0168, +REG64( EX_7_CPPM_CACCR_CLEAR , RULL(0x2E0F0169), SH_UNT_EX_7 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2F0F0169, +REG64( EX_7_CPPM_CACCR_OR , RULL(0x2E0F016A), SH_UNT_EX_7 , + SH_ACS_SCOM2_OR ); //DUPS: 2F0F016A, +REG64( EX_8_CPPM_CACCR , RULL(0x300F0168), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F0168, +REG64( EX_8_CPPM_CACCR_CLEAR , RULL(0x300F0169), SH_UNT_EX_8 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 310F0169, +REG64( EX_8_CPPM_CACCR_OR , RULL(0x300F016A), SH_UNT_EX_8 , + SH_ACS_SCOM2_OR ); //DUPS: 310F016A, +REG64( EX_9_CPPM_CACCR , RULL(0x320F0168), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F0168, +REG64( EX_9_CPPM_CACCR_CLEAR , RULL(0x320F0169), SH_UNT_EX_9 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 330F0169, +REG64( EX_9_CPPM_CACCR_OR , RULL(0x320F016A), SH_UNT_EX_9 , + SH_ACS_SCOM2_OR ); //DUPS: 330F016A, +REG64( EX_10_CPPM_CACCR , RULL(0x340F0168), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F0168, +REG64( EX_10_CPPM_CACCR_CLEAR , RULL(0x340F0169), SH_UNT_EX_10 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 350F0169, +REG64( EX_10_CPPM_CACCR_OR , RULL(0x340F016A), SH_UNT_EX_10 , + SH_ACS_SCOM2_OR ); //DUPS: 350F016A, +REG64( EX_11_CPPM_CACCR , RULL(0x360F0168), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F0168, +REG64( EX_11_CPPM_CACCR_CLEAR , RULL(0x360F0169), SH_UNT_EX_11 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 370F0169, +REG64( EX_11_CPPM_CACCR_OR , RULL(0x360F016A), SH_UNT_EX_11 , + SH_ACS_SCOM2_OR ); //DUPS: 370F016A, + +REG64( C_CPPM_CACSR , RULL(0x200F016B), SH_UNT_C , SH_ACS_SCOM_RO ); +REG64( C_0_CPPM_CACSR , RULL(0x200F016B), SH_UNT_C_0 , SH_ACS_SCOM_RO ); +REG64( C_1_CPPM_CACSR , RULL(0x210F016B), SH_UNT_C_1 , SH_ACS_SCOM_RO ); +REG64( C_2_CPPM_CACSR , RULL(0x220F016B), SH_UNT_C_2 , SH_ACS_SCOM_RO ); +REG64( C_3_CPPM_CACSR , RULL(0x230F016B), SH_UNT_C_3 , SH_ACS_SCOM_RO ); +REG64( C_4_CPPM_CACSR , RULL(0x240F016B), SH_UNT_C_4 , SH_ACS_SCOM_RO ); +REG64( C_5_CPPM_CACSR , RULL(0x250F016B), SH_UNT_C_5 , SH_ACS_SCOM_RO ); +REG64( C_6_CPPM_CACSR , RULL(0x260F016B), SH_UNT_C_6 , SH_ACS_SCOM_RO ); +REG64( C_7_CPPM_CACSR , RULL(0x270F016B), SH_UNT_C_7 , SH_ACS_SCOM_RO ); +REG64( C_8_CPPM_CACSR , RULL(0x280F016B), SH_UNT_C_8 , SH_ACS_SCOM_RO ); +REG64( C_9_CPPM_CACSR , RULL(0x290F016B), SH_UNT_C_9 , SH_ACS_SCOM_RO ); +REG64( C_10_CPPM_CACSR , RULL(0x2A0F016B), SH_UNT_C_10 , SH_ACS_SCOM_RO ); +REG64( C_11_CPPM_CACSR , RULL(0x2B0F016B), SH_UNT_C_11 , SH_ACS_SCOM_RO ); +REG64( C_12_CPPM_CACSR , RULL(0x2C0F016B), SH_UNT_C_12 , SH_ACS_SCOM_RO ); +REG64( C_13_CPPM_CACSR , RULL(0x2D0F016B), SH_UNT_C_13 , SH_ACS_SCOM_RO ); +REG64( C_14_CPPM_CACSR , RULL(0x2E0F016B), SH_UNT_C_14 , SH_ACS_SCOM_RO ); +REG64( C_15_CPPM_CACSR , RULL(0x2F0F016B), SH_UNT_C_15 , SH_ACS_SCOM_RO ); +REG64( C_16_CPPM_CACSR , RULL(0x300F016B), SH_UNT_C_16 , SH_ACS_SCOM_RO ); +REG64( C_17_CPPM_CACSR , RULL(0x310F016B), SH_UNT_C_17 , SH_ACS_SCOM_RO ); +REG64( C_18_CPPM_CACSR , RULL(0x320F016B), SH_UNT_C_18 , SH_ACS_SCOM_RO ); +REG64( C_19_CPPM_CACSR , RULL(0x330F016B), SH_UNT_C_19 , SH_ACS_SCOM_RO ); +REG64( C_20_CPPM_CACSR , RULL(0x340F016B), SH_UNT_C_20 , SH_ACS_SCOM_RO ); +REG64( C_21_CPPM_CACSR , RULL(0x350F016B), SH_UNT_C_21 , SH_ACS_SCOM_RO ); +REG64( C_22_CPPM_CACSR , RULL(0x360F016B), SH_UNT_C_22 , SH_ACS_SCOM_RO ); +REG64( C_23_CPPM_CACSR , RULL(0x370F016B), SH_UNT_C_23 , SH_ACS_SCOM_RO ); +REG64( EX_CPPM_CACSR , RULL(0x200F016B), SH_UNT_EX , + SH_ACS_SCOM_RO ); //DUPS: 210F016B, +REG64( EX_0_CPPM_CACSR , RULL(0x200F016B), SH_UNT_EX_0 , + SH_ACS_SCOM_RO ); //DUPS: 210F016B, +REG64( EX_1_CPPM_CACSR , RULL(0x230F016B), SH_UNT_EX_1 , + SH_ACS_SCOM_RO ); //DUPS: 220F016B, +REG64( EX_2_CPPM_CACSR , RULL(0x240F016B), SH_UNT_EX_2 , + SH_ACS_SCOM_RO ); //DUPS: 250F016B, +REG64( EX_3_CPPM_CACSR , RULL(0x260F016B), SH_UNT_EX_3 , + SH_ACS_SCOM_RO ); //DUPS: 270F016B, +REG64( EX_4_CPPM_CACSR , RULL(0x280F016B), SH_UNT_EX_4 , + SH_ACS_SCOM_RO ); //DUPS: 290F016B, +REG64( EX_5_CPPM_CACSR , RULL(0x2A0F016B), SH_UNT_EX_5 , + SH_ACS_SCOM_RO ); //DUPS: 2B0F016B, +REG64( EX_6_CPPM_CACSR , RULL(0x2C0F016B), SH_UNT_EX_6 , + SH_ACS_SCOM_RO ); //DUPS: 2D0F016B, +REG64( EX_7_CPPM_CACSR , RULL(0x2E0F016B), SH_UNT_EX_7 , + SH_ACS_SCOM_RO ); //DUPS: 2F0F016B, +REG64( EX_8_CPPM_CACSR , RULL(0x300F016B), SH_UNT_EX_8 , + SH_ACS_SCOM_RO ); //DUPS: 310F016B, +REG64( EX_9_CPPM_CACSR , RULL(0x320F016B), SH_UNT_EX_9 , + SH_ACS_SCOM_RO ); //DUPS: 330F016B, +REG64( EX_10_CPPM_CACSR , RULL(0x340F016B), SH_UNT_EX_10 , + SH_ACS_SCOM_RO ); //DUPS: 350F016B, +REG64( EX_11_CPPM_CACSR , RULL(0x360F016B), SH_UNT_EX_11 , + SH_ACS_SCOM_RO ); //DUPS: 370F016B, + +REG64( C_CPPM_CISR , RULL(0x200F01AE), SH_UNT_C , SH_ACS_SCOM_RO ); +REG64( C_0_CPPM_CISR , RULL(0x200F01AE), SH_UNT_C_0 , SH_ACS_SCOM_RO ); +REG64( C_1_CPPM_CISR , RULL(0x210F01AE), SH_UNT_C_1 , SH_ACS_SCOM_RO ); +REG64( C_2_CPPM_CISR , RULL(0x220F01AE), SH_UNT_C_2 , SH_ACS_SCOM_RO ); +REG64( C_3_CPPM_CISR , RULL(0x230F01AE), SH_UNT_C_3 , SH_ACS_SCOM_RO ); +REG64( C_4_CPPM_CISR , RULL(0x240F01AE), SH_UNT_C_4 , SH_ACS_SCOM_RO ); +REG64( C_5_CPPM_CISR , RULL(0x250F01AE), SH_UNT_C_5 , SH_ACS_SCOM_RO ); +REG64( C_6_CPPM_CISR , RULL(0x260F01AE), SH_UNT_C_6 , SH_ACS_SCOM_RO ); +REG64( C_7_CPPM_CISR , RULL(0x270F01AE), SH_UNT_C_7 , SH_ACS_SCOM_RO ); +REG64( C_8_CPPM_CISR , RULL(0x280F01AE), SH_UNT_C_8 , SH_ACS_SCOM_RO ); +REG64( C_9_CPPM_CISR , RULL(0x290F01AE), SH_UNT_C_9 , SH_ACS_SCOM_RO ); +REG64( C_10_CPPM_CISR , RULL(0x2A0F01AE), SH_UNT_C_10 , SH_ACS_SCOM_RO ); +REG64( C_11_CPPM_CISR , RULL(0x2B0F01AE), SH_UNT_C_11 , SH_ACS_SCOM_RO ); +REG64( C_12_CPPM_CISR , RULL(0x2C0F01AE), SH_UNT_C_12 , SH_ACS_SCOM_RO ); +REG64( C_13_CPPM_CISR , RULL(0x2D0F01AE), SH_UNT_C_13 , SH_ACS_SCOM_RO ); +REG64( C_14_CPPM_CISR , RULL(0x2E0F01AE), SH_UNT_C_14 , SH_ACS_SCOM_RO ); +REG64( C_15_CPPM_CISR , RULL(0x2F0F01AE), SH_UNT_C_15 , SH_ACS_SCOM_RO ); +REG64( C_16_CPPM_CISR , RULL(0x300F01AE), SH_UNT_C_16 , SH_ACS_SCOM_RO ); +REG64( C_17_CPPM_CISR , RULL(0x310F01AE), SH_UNT_C_17 , SH_ACS_SCOM_RO ); +REG64( C_18_CPPM_CISR , RULL(0x320F01AE), SH_UNT_C_18 , SH_ACS_SCOM_RO ); +REG64( C_19_CPPM_CISR , RULL(0x330F01AE), SH_UNT_C_19 , SH_ACS_SCOM_RO ); +REG64( C_20_CPPM_CISR , RULL(0x340F01AE), SH_UNT_C_20 , SH_ACS_SCOM_RO ); +REG64( C_21_CPPM_CISR , RULL(0x350F01AE), SH_UNT_C_21 , SH_ACS_SCOM_RO ); +REG64( C_22_CPPM_CISR , RULL(0x360F01AE), SH_UNT_C_22 , SH_ACS_SCOM_RO ); +REG64( C_23_CPPM_CISR , RULL(0x370F01AE), SH_UNT_C_23 , SH_ACS_SCOM_RO ); +REG64( EX_CPPM_CISR , RULL(0x200F01AE), SH_UNT_EX , + SH_ACS_SCOM_RO ); //DUPS: 210F01AE, +REG64( EX_0_CPPM_CISR , RULL(0x200F01AE), SH_UNT_EX_0 , + SH_ACS_SCOM_RO ); //DUPS: 210F01AE, +REG64( EX_1_CPPM_CISR , RULL(0x230F01AE), SH_UNT_EX_1 , + SH_ACS_SCOM_RO ); //DUPS: 220F01AE, +REG64( EX_2_CPPM_CISR , RULL(0x240F01AE), SH_UNT_EX_2 , + SH_ACS_SCOM_RO ); //DUPS: 250F01AE, +REG64( EX_3_CPPM_CISR , RULL(0x260F01AE), SH_UNT_EX_3 , + SH_ACS_SCOM_RO ); //DUPS: 270F01AE, +REG64( EX_4_CPPM_CISR , RULL(0x280F01AE), SH_UNT_EX_4 , + SH_ACS_SCOM_RO ); //DUPS: 290F01AE, +REG64( EX_5_CPPM_CISR , RULL(0x2A0F01AE), SH_UNT_EX_5 , + SH_ACS_SCOM_RO ); //DUPS: 2B0F01AE, +REG64( EX_6_CPPM_CISR , RULL(0x2C0F01AE), SH_UNT_EX_6 , + SH_ACS_SCOM_RO ); //DUPS: 2D0F01AE, +REG64( EX_7_CPPM_CISR , RULL(0x2E0F01AE), SH_UNT_EX_7 , + SH_ACS_SCOM_RO ); //DUPS: 2F0F01AE, +REG64( EX_8_CPPM_CISR , RULL(0x300F01AE), SH_UNT_EX_8 , + SH_ACS_SCOM_RO ); //DUPS: 310F01AE, +REG64( EX_9_CPPM_CISR , RULL(0x320F01AE), SH_UNT_EX_9 , + SH_ACS_SCOM_RO ); //DUPS: 330F01AE, +REG64( EX_10_CPPM_CISR , RULL(0x340F01AE), SH_UNT_EX_10 , + SH_ACS_SCOM_RO ); //DUPS: 350F01AE, +REG64( EX_11_CPPM_CISR , RULL(0x360F01AE), SH_UNT_EX_11 , + SH_ACS_SCOM_RO ); //DUPS: 370F01AE, + +REG64( C_CPPM_CIVRMLCR , RULL(0x200F01B7), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_CPPM_CIVRMLCR , RULL(0x200F01B7), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_CPPM_CIVRMLCR , RULL(0x210F01B7), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_CPPM_CIVRMLCR , RULL(0x220F01B7), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_CPPM_CIVRMLCR , RULL(0x230F01B7), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_CPPM_CIVRMLCR , RULL(0x240F01B7), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_CPPM_CIVRMLCR , RULL(0x250F01B7), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_CPPM_CIVRMLCR , RULL(0x260F01B7), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_CPPM_CIVRMLCR , RULL(0x270F01B7), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_CPPM_CIVRMLCR , RULL(0x280F01B7), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_CPPM_CIVRMLCR , RULL(0x290F01B7), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_CPPM_CIVRMLCR , RULL(0x2A0F01B7), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_CPPM_CIVRMLCR , RULL(0x2B0F01B7), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_CPPM_CIVRMLCR , RULL(0x2C0F01B7), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_CPPM_CIVRMLCR , RULL(0x2D0F01B7), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_CPPM_CIVRMLCR , RULL(0x2E0F01B7), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_CPPM_CIVRMLCR , RULL(0x2F0F01B7), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_CPPM_CIVRMLCR , RULL(0x300F01B7), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_CPPM_CIVRMLCR , RULL(0x310F01B7), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_CPPM_CIVRMLCR , RULL(0x320F01B7), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_CPPM_CIVRMLCR , RULL(0x330F01B7), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_CPPM_CIVRMLCR , RULL(0x340F01B7), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_CPPM_CIVRMLCR , RULL(0x350F01B7), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_CPPM_CIVRMLCR , RULL(0x360F01B7), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_CPPM_CIVRMLCR , RULL(0x370F01B7), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_CPPM_CIVRMLCR , RULL(0x200F01B7), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F01B7, +REG64( EX_0_CPPM_CIVRMLCR , RULL(0x200F01B7), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F01B7, +REG64( EX_1_CPPM_CIVRMLCR , RULL(0x230F01B7), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F01B7, +REG64( EX_2_CPPM_CIVRMLCR , RULL(0x240F01B7), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F01B7, +REG64( EX_3_CPPM_CIVRMLCR , RULL(0x260F01B7), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F01B7, +REG64( EX_4_CPPM_CIVRMLCR , RULL(0x280F01B7), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F01B7, +REG64( EX_5_CPPM_CIVRMLCR , RULL(0x2A0F01B7), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F01B7, +REG64( EX_6_CPPM_CIVRMLCR , RULL(0x2C0F01B7), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F01B7, +REG64( EX_7_CPPM_CIVRMLCR , RULL(0x2E0F01B7), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F01B7, +REG64( EX_8_CPPM_CIVRMLCR , RULL(0x300F01B7), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F01B7, +REG64( EX_9_CPPM_CIVRMLCR , RULL(0x320F01B7), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F01B7, +REG64( EX_10_CPPM_CIVRMLCR , RULL(0x340F01B7), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F01B7, +REG64( EX_11_CPPM_CIVRMLCR , RULL(0x360F01B7), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F01B7, + +REG64( C_CPPM_CMEDATA , RULL(0x200F01A8), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_CPPM_CMEDATA_CLEAR , RULL(0x200F01A9), SH_UNT_C , + SH_ACS_SCOM1_CLEAR ); +REG64( C_CPPM_CMEDATA_OR , RULL(0x200F01AA), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_CPPM_CMEDATA , RULL(0x200F01A8), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_CPPM_CMEDATA_CLEAR , RULL(0x200F01A9), SH_UNT_C_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_0_CPPM_CMEDATA_OR , RULL(0x200F01AA), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_CPPM_CMEDATA , RULL(0x210F01A8), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_CPPM_CMEDATA_CLEAR , RULL(0x210F01A9), SH_UNT_C_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_1_CPPM_CMEDATA_OR , RULL(0x210F01AA), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_CPPM_CMEDATA , RULL(0x220F01A8), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_CPPM_CMEDATA_CLEAR , RULL(0x220F01A9), SH_UNT_C_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_2_CPPM_CMEDATA_OR , RULL(0x220F01AA), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_CPPM_CMEDATA , RULL(0x230F01A8), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_CPPM_CMEDATA_CLEAR , RULL(0x230F01A9), SH_UNT_C_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_3_CPPM_CMEDATA_OR , RULL(0x230F01AA), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_CPPM_CMEDATA , RULL(0x240F01A8), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_CPPM_CMEDATA_CLEAR , RULL(0x240F01A9), SH_UNT_C_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_4_CPPM_CMEDATA_OR , RULL(0x240F01AA), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_CPPM_CMEDATA , RULL(0x250F01A8), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_CPPM_CMEDATA_CLEAR , RULL(0x250F01A9), SH_UNT_C_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_5_CPPM_CMEDATA_OR , RULL(0x250F01AA), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_CPPM_CMEDATA , RULL(0x260F01A8), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_CPPM_CMEDATA_CLEAR , RULL(0x260F01A9), SH_UNT_C_6 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_6_CPPM_CMEDATA_OR , RULL(0x260F01AA), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_CPPM_CMEDATA , RULL(0x270F01A8), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_CPPM_CMEDATA_CLEAR , RULL(0x270F01A9), SH_UNT_C_7 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_7_CPPM_CMEDATA_OR , RULL(0x270F01AA), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_CPPM_CMEDATA , RULL(0x280F01A8), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_CPPM_CMEDATA_CLEAR , RULL(0x280F01A9), SH_UNT_C_8 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_8_CPPM_CMEDATA_OR , RULL(0x280F01AA), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_CPPM_CMEDATA , RULL(0x290F01A8), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_CPPM_CMEDATA_CLEAR , RULL(0x290F01A9), SH_UNT_C_9 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_9_CPPM_CMEDATA_OR , RULL(0x290F01AA), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_CPPM_CMEDATA , RULL(0x2A0F01A8), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_CPPM_CMEDATA_CLEAR , RULL(0x2A0F01A9), SH_UNT_C_10 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_10_CPPM_CMEDATA_OR , RULL(0x2A0F01AA), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_CPPM_CMEDATA , RULL(0x2B0F01A8), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_CPPM_CMEDATA_CLEAR , RULL(0x2B0F01A9), SH_UNT_C_11 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_11_CPPM_CMEDATA_OR , RULL(0x2B0F01AA), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_CPPM_CMEDATA , RULL(0x2C0F01A8), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_CPPM_CMEDATA_CLEAR , RULL(0x2C0F01A9), SH_UNT_C_12 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_12_CPPM_CMEDATA_OR , RULL(0x2C0F01AA), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_CPPM_CMEDATA , RULL(0x2D0F01A8), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_CPPM_CMEDATA_CLEAR , RULL(0x2D0F01A9), SH_UNT_C_13 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_13_CPPM_CMEDATA_OR , RULL(0x2D0F01AA), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_CPPM_CMEDATA , RULL(0x2E0F01A8), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_CPPM_CMEDATA_CLEAR , RULL(0x2E0F01A9), SH_UNT_C_14 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_14_CPPM_CMEDATA_OR , RULL(0x2E0F01AA), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_CPPM_CMEDATA , RULL(0x2F0F01A8), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_CPPM_CMEDATA_CLEAR , RULL(0x2F0F01A9), SH_UNT_C_15 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_15_CPPM_CMEDATA_OR , RULL(0x2F0F01AA), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_CPPM_CMEDATA , RULL(0x300F01A8), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_CPPM_CMEDATA_CLEAR , RULL(0x300F01A9), SH_UNT_C_16 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_16_CPPM_CMEDATA_OR , RULL(0x300F01AA), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_CPPM_CMEDATA , RULL(0x310F01A8), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_CPPM_CMEDATA_CLEAR , RULL(0x310F01A9), SH_UNT_C_17 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_17_CPPM_CMEDATA_OR , RULL(0x310F01AA), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_CPPM_CMEDATA , RULL(0x320F01A8), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_CPPM_CMEDATA_CLEAR , RULL(0x320F01A9), SH_UNT_C_18 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_18_CPPM_CMEDATA_OR , RULL(0x320F01AA), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_CPPM_CMEDATA , RULL(0x330F01A8), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_CPPM_CMEDATA_CLEAR , RULL(0x330F01A9), SH_UNT_C_19 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_19_CPPM_CMEDATA_OR , RULL(0x330F01AA), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_CPPM_CMEDATA , RULL(0x340F01A8), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_CPPM_CMEDATA_CLEAR , RULL(0x340F01A9), SH_UNT_C_20 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_20_CPPM_CMEDATA_OR , RULL(0x340F01AA), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_CPPM_CMEDATA , RULL(0x350F01A8), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_CPPM_CMEDATA_CLEAR , RULL(0x350F01A9), SH_UNT_C_21 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_21_CPPM_CMEDATA_OR , RULL(0x350F01AA), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_CPPM_CMEDATA , RULL(0x360F01A8), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_CPPM_CMEDATA_CLEAR , RULL(0x360F01A9), SH_UNT_C_22 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_22_CPPM_CMEDATA_OR , RULL(0x360F01AA), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_CPPM_CMEDATA , RULL(0x370F01A8), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_CPPM_CMEDATA_CLEAR , RULL(0x370F01A9), SH_UNT_C_23 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_23_CPPM_CMEDATA_OR , RULL(0x370F01AA), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EX_CPPM_CMEDATA , RULL(0x200F01A8), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F01A8, +REG64( EX_CPPM_CMEDATA_CLEAR , RULL(0x200F01A9), SH_UNT_EX , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F01A9, +REG64( EX_CPPM_CMEDATA_OR , RULL(0x200F01AA), SH_UNT_EX , + SH_ACS_SCOM2_OR ); //DUPS: 210F01AA, +REG64( EX_0_CPPM_CMEDATA , RULL(0x200F01A8), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F01A8, +REG64( EX_0_CPPM_CMEDATA_CLEAR , RULL(0x200F01A9), SH_UNT_EX_0 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F01A9, +REG64( EX_0_CPPM_CMEDATA_OR , RULL(0x200F01AA), SH_UNT_EX_0 , + SH_ACS_SCOM2_OR ); //DUPS: 210F01AA, +REG64( EX_1_CPPM_CMEDATA , RULL(0x230F01A8), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F01A8, +REG64( EX_1_CPPM_CMEDATA_CLEAR , RULL(0x230F01A9), SH_UNT_EX_1 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 220F01A9, +REG64( EX_1_CPPM_CMEDATA_OR , RULL(0x230F01AA), SH_UNT_EX_1 , + SH_ACS_SCOM2_OR ); //DUPS: 220F01AA, +REG64( EX_2_CPPM_CMEDATA , RULL(0x240F01A8), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F01A8, +REG64( EX_2_CPPM_CMEDATA_CLEAR , RULL(0x240F01A9), SH_UNT_EX_2 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 250F01A9, +REG64( EX_2_CPPM_CMEDATA_OR , RULL(0x240F01AA), SH_UNT_EX_2 , + SH_ACS_SCOM2_OR ); //DUPS: 250F01AA, +REG64( EX_3_CPPM_CMEDATA , RULL(0x260F01A8), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F01A8, +REG64( EX_3_CPPM_CMEDATA_CLEAR , RULL(0x260F01A9), SH_UNT_EX_3 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 270F01A9, +REG64( EX_3_CPPM_CMEDATA_OR , RULL(0x260F01AA), SH_UNT_EX_3 , + SH_ACS_SCOM2_OR ); //DUPS: 270F01AA, +REG64( EX_4_CPPM_CMEDATA , RULL(0x280F01A8), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F01A8, +REG64( EX_4_CPPM_CMEDATA_CLEAR , RULL(0x280F01A9), SH_UNT_EX_4 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 290F01A9, +REG64( EX_4_CPPM_CMEDATA_OR , RULL(0x280F01AA), SH_UNT_EX_4 , + SH_ACS_SCOM2_OR ); //DUPS: 290F01AA, +REG64( EX_5_CPPM_CMEDATA , RULL(0x2A0F01A8), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F01A8, +REG64( EX_5_CPPM_CMEDATA_CLEAR , RULL(0x2A0F01A9), SH_UNT_EX_5 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2B0F01A9, +REG64( EX_5_CPPM_CMEDATA_OR , RULL(0x2A0F01AA), SH_UNT_EX_5 , + SH_ACS_SCOM2_OR ); //DUPS: 2B0F01AA, +REG64( EX_6_CPPM_CMEDATA , RULL(0x2C0F01A8), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F01A8, +REG64( EX_6_CPPM_CMEDATA_CLEAR , RULL(0x2C0F01A9), SH_UNT_EX_6 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2D0F01A9, +REG64( EX_6_CPPM_CMEDATA_OR , RULL(0x2C0F01AA), SH_UNT_EX_6 , + SH_ACS_SCOM2_OR ); //DUPS: 2D0F01AA, +REG64( EX_7_CPPM_CMEDATA , RULL(0x2E0F01A8), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F01A8, +REG64( EX_7_CPPM_CMEDATA_CLEAR , RULL(0x2E0F01A9), SH_UNT_EX_7 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2F0F01A9, +REG64( EX_7_CPPM_CMEDATA_OR , RULL(0x2E0F01AA), SH_UNT_EX_7 , + SH_ACS_SCOM2_OR ); //DUPS: 2F0F01AA, +REG64( EX_8_CPPM_CMEDATA , RULL(0x300F01A8), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F01A8, +REG64( EX_8_CPPM_CMEDATA_CLEAR , RULL(0x300F01A9), SH_UNT_EX_8 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 310F01A9, +REG64( EX_8_CPPM_CMEDATA_OR , RULL(0x300F01AA), SH_UNT_EX_8 , + SH_ACS_SCOM2_OR ); //DUPS: 310F01AA, +REG64( EX_9_CPPM_CMEDATA , RULL(0x320F01A8), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F01A8, +REG64( EX_9_CPPM_CMEDATA_CLEAR , RULL(0x320F01A9), SH_UNT_EX_9 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 330F01A9, +REG64( EX_9_CPPM_CMEDATA_OR , RULL(0x320F01AA), SH_UNT_EX_9 , + SH_ACS_SCOM2_OR ); //DUPS: 330F01AA, +REG64( EX_10_CPPM_CMEDATA , RULL(0x340F01A8), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F01A8, +REG64( EX_10_CPPM_CMEDATA_CLEAR , RULL(0x340F01A9), SH_UNT_EX_10 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 350F01A9, +REG64( EX_10_CPPM_CMEDATA_OR , RULL(0x340F01AA), SH_UNT_EX_10 , + SH_ACS_SCOM2_OR ); //DUPS: 350F01AA, +REG64( EX_11_CPPM_CMEDATA , RULL(0x360F01A8), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F01A8, +REG64( EX_11_CPPM_CMEDATA_CLEAR , RULL(0x360F01A9), SH_UNT_EX_11 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 370F01A9, +REG64( EX_11_CPPM_CMEDATA_OR , RULL(0x360F01AA), SH_UNT_EX_11 , + SH_ACS_SCOM2_OR ); //DUPS: 370F01AA, + +REG64( C_CPPM_CMEDB0 , RULL(0x200F0190), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_CPPM_CMEDB0_CLEAR , RULL(0x200F0191), SH_UNT_C , + SH_ACS_SCOM1_CLEAR ); +REG64( C_CPPM_CMEDB0_OR , RULL(0x200F0192), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_CPPM_CMEDB0 , RULL(0x200F0190), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_CPPM_CMEDB0_CLEAR , RULL(0x200F0191), SH_UNT_C_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_0_CPPM_CMEDB0_OR , RULL(0x200F0192), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_CPPM_CMEDB0 , RULL(0x210F0190), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_CPPM_CMEDB0_CLEAR , RULL(0x210F0191), SH_UNT_C_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_1_CPPM_CMEDB0_OR , RULL(0x210F0192), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_CPPM_CMEDB0 , RULL(0x220F0190), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_CPPM_CMEDB0_CLEAR , RULL(0x220F0191), SH_UNT_C_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_2_CPPM_CMEDB0_OR , RULL(0x220F0192), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_CPPM_CMEDB0 , RULL(0x230F0190), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_CPPM_CMEDB0_CLEAR , RULL(0x230F0191), SH_UNT_C_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_3_CPPM_CMEDB0_OR , RULL(0x230F0192), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_CPPM_CMEDB0 , RULL(0x240F0190), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_CPPM_CMEDB0_CLEAR , RULL(0x240F0191), SH_UNT_C_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_4_CPPM_CMEDB0_OR , RULL(0x240F0192), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_CPPM_CMEDB0 , RULL(0x250F0190), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_CPPM_CMEDB0_CLEAR , RULL(0x250F0191), SH_UNT_C_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_5_CPPM_CMEDB0_OR , RULL(0x250F0192), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_CPPM_CMEDB0 , RULL(0x260F0190), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_CPPM_CMEDB0_CLEAR , RULL(0x260F0191), SH_UNT_C_6 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_6_CPPM_CMEDB0_OR , RULL(0x260F0192), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_CPPM_CMEDB0 , RULL(0x270F0190), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_CPPM_CMEDB0_CLEAR , RULL(0x270F0191), SH_UNT_C_7 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_7_CPPM_CMEDB0_OR , RULL(0x270F0192), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_CPPM_CMEDB0 , RULL(0x280F0190), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_CPPM_CMEDB0_CLEAR , RULL(0x280F0191), SH_UNT_C_8 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_8_CPPM_CMEDB0_OR , RULL(0x280F0192), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_CPPM_CMEDB0 , RULL(0x290F0190), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_CPPM_CMEDB0_CLEAR , RULL(0x290F0191), SH_UNT_C_9 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_9_CPPM_CMEDB0_OR , RULL(0x290F0192), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_CPPM_CMEDB0 , RULL(0x2A0F0190), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_CPPM_CMEDB0_CLEAR , RULL(0x2A0F0191), SH_UNT_C_10 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_10_CPPM_CMEDB0_OR , RULL(0x2A0F0192), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_CPPM_CMEDB0 , RULL(0x2B0F0190), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_CPPM_CMEDB0_CLEAR , RULL(0x2B0F0191), SH_UNT_C_11 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_11_CPPM_CMEDB0_OR , RULL(0x2B0F0192), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_CPPM_CMEDB0 , RULL(0x2C0F0190), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_CPPM_CMEDB0_CLEAR , RULL(0x2C0F0191), SH_UNT_C_12 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_12_CPPM_CMEDB0_OR , RULL(0x2C0F0192), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_CPPM_CMEDB0 , RULL(0x2D0F0190), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_CPPM_CMEDB0_CLEAR , RULL(0x2D0F0191), SH_UNT_C_13 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_13_CPPM_CMEDB0_OR , RULL(0x2D0F0192), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_CPPM_CMEDB0 , RULL(0x2E0F0190), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_CPPM_CMEDB0_CLEAR , RULL(0x2E0F0191), SH_UNT_C_14 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_14_CPPM_CMEDB0_OR , RULL(0x2E0F0192), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_CPPM_CMEDB0 , RULL(0x2F0F0190), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_CPPM_CMEDB0_CLEAR , RULL(0x2F0F0191), SH_UNT_C_15 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_15_CPPM_CMEDB0_OR , RULL(0x2F0F0192), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_CPPM_CMEDB0 , RULL(0x300F0190), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_CPPM_CMEDB0_CLEAR , RULL(0x300F0191), SH_UNT_C_16 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_16_CPPM_CMEDB0_OR , RULL(0x300F0192), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_CPPM_CMEDB0 , RULL(0x310F0190), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_CPPM_CMEDB0_CLEAR , RULL(0x310F0191), SH_UNT_C_17 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_17_CPPM_CMEDB0_OR , RULL(0x310F0192), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_CPPM_CMEDB0 , RULL(0x320F0190), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_CPPM_CMEDB0_CLEAR , RULL(0x320F0191), SH_UNT_C_18 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_18_CPPM_CMEDB0_OR , RULL(0x320F0192), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_CPPM_CMEDB0 , RULL(0x330F0190), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_CPPM_CMEDB0_CLEAR , RULL(0x330F0191), SH_UNT_C_19 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_19_CPPM_CMEDB0_OR , RULL(0x330F0192), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_CPPM_CMEDB0 , RULL(0x340F0190), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_CPPM_CMEDB0_CLEAR , RULL(0x340F0191), SH_UNT_C_20 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_20_CPPM_CMEDB0_OR , RULL(0x340F0192), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_CPPM_CMEDB0 , RULL(0x350F0190), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_CPPM_CMEDB0_CLEAR , RULL(0x350F0191), SH_UNT_C_21 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_21_CPPM_CMEDB0_OR , RULL(0x350F0192), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_CPPM_CMEDB0 , RULL(0x360F0190), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_CPPM_CMEDB0_CLEAR , RULL(0x360F0191), SH_UNT_C_22 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_22_CPPM_CMEDB0_OR , RULL(0x360F0192), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_CPPM_CMEDB0 , RULL(0x370F0190), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_CPPM_CMEDB0_CLEAR , RULL(0x370F0191), SH_UNT_C_23 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_23_CPPM_CMEDB0_OR , RULL(0x370F0192), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EX_CPPM_CMEDB0 , RULL(0x200F0190), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F0190, +REG64( EX_CPPM_CMEDB0_CLEAR , RULL(0x200F0191), SH_UNT_EX , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F0191, +REG64( EX_CPPM_CMEDB0_OR , RULL(0x200F0192), SH_UNT_EX , + SH_ACS_SCOM2_OR ); //DUPS: 210F0192, +REG64( EX_0_CPPM_CMEDB0 , RULL(0x200F0190), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F0190, +REG64( EX_0_CPPM_CMEDB0_CLEAR , RULL(0x200F0191), SH_UNT_EX_0 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F0191, +REG64( EX_0_CPPM_CMEDB0_OR , RULL(0x200F0192), SH_UNT_EX_0 , + SH_ACS_SCOM2_OR ); //DUPS: 210F0192, +REG64( EX_1_CPPM_CMEDB0 , RULL(0x230F0190), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F0190, +REG64( EX_1_CPPM_CMEDB0_CLEAR , RULL(0x230F0191), SH_UNT_EX_1 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 220F0191, +REG64( EX_1_CPPM_CMEDB0_OR , RULL(0x230F0192), SH_UNT_EX_1 , + SH_ACS_SCOM2_OR ); //DUPS: 220F0192, +REG64( EX_2_CPPM_CMEDB0 , RULL(0x240F0190), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F0190, +REG64( EX_2_CPPM_CMEDB0_CLEAR , RULL(0x240F0191), SH_UNT_EX_2 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 250F0191, +REG64( EX_2_CPPM_CMEDB0_OR , RULL(0x240F0192), SH_UNT_EX_2 , + SH_ACS_SCOM2_OR ); //DUPS: 250F0192, +REG64( EX_3_CPPM_CMEDB0 , RULL(0x260F0190), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F0190, +REG64( EX_3_CPPM_CMEDB0_CLEAR , RULL(0x260F0191), SH_UNT_EX_3 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 270F0191, +REG64( EX_3_CPPM_CMEDB0_OR , RULL(0x260F0192), SH_UNT_EX_3 , + SH_ACS_SCOM2_OR ); //DUPS: 270F0192, +REG64( EX_4_CPPM_CMEDB0 , RULL(0x280F0190), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F0190, +REG64( EX_4_CPPM_CMEDB0_CLEAR , RULL(0x280F0191), SH_UNT_EX_4 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 290F0191, +REG64( EX_4_CPPM_CMEDB0_OR , RULL(0x280F0192), SH_UNT_EX_4 , + SH_ACS_SCOM2_OR ); //DUPS: 290F0192, +REG64( EX_5_CPPM_CMEDB0 , RULL(0x2A0F0190), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F0190, +REG64( EX_5_CPPM_CMEDB0_CLEAR , RULL(0x2A0F0191), SH_UNT_EX_5 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2B0F0191, +REG64( EX_5_CPPM_CMEDB0_OR , RULL(0x2A0F0192), SH_UNT_EX_5 , + SH_ACS_SCOM2_OR ); //DUPS: 2B0F0192, +REG64( EX_6_CPPM_CMEDB0 , RULL(0x2C0F0190), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F0190, +REG64( EX_6_CPPM_CMEDB0_CLEAR , RULL(0x2C0F0191), SH_UNT_EX_6 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2D0F0191, +REG64( EX_6_CPPM_CMEDB0_OR , RULL(0x2C0F0192), SH_UNT_EX_6 , + SH_ACS_SCOM2_OR ); //DUPS: 2D0F0192, +REG64( EX_7_CPPM_CMEDB0 , RULL(0x2E0F0190), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F0190, +REG64( EX_7_CPPM_CMEDB0_CLEAR , RULL(0x2E0F0191), SH_UNT_EX_7 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2F0F0191, +REG64( EX_7_CPPM_CMEDB0_OR , RULL(0x2E0F0192), SH_UNT_EX_7 , + SH_ACS_SCOM2_OR ); //DUPS: 2F0F0192, +REG64( EX_8_CPPM_CMEDB0 , RULL(0x300F0190), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F0190, +REG64( EX_8_CPPM_CMEDB0_CLEAR , RULL(0x300F0191), SH_UNT_EX_8 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 310F0191, +REG64( EX_8_CPPM_CMEDB0_OR , RULL(0x300F0192), SH_UNT_EX_8 , + SH_ACS_SCOM2_OR ); //DUPS: 310F0192, +REG64( EX_9_CPPM_CMEDB0 , RULL(0x320F0190), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F0190, +REG64( EX_9_CPPM_CMEDB0_CLEAR , RULL(0x320F0191), SH_UNT_EX_9 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 330F0191, +REG64( EX_9_CPPM_CMEDB0_OR , RULL(0x320F0192), SH_UNT_EX_9 , + SH_ACS_SCOM2_OR ); //DUPS: 330F0192, +REG64( EX_10_CPPM_CMEDB0 , RULL(0x340F0190), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F0190, +REG64( EX_10_CPPM_CMEDB0_CLEAR , RULL(0x340F0191), SH_UNT_EX_10 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 350F0191, +REG64( EX_10_CPPM_CMEDB0_OR , RULL(0x340F0192), SH_UNT_EX_10 , + SH_ACS_SCOM2_OR ); //DUPS: 350F0192, +REG64( EX_11_CPPM_CMEDB0 , RULL(0x360F0190), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F0190, +REG64( EX_11_CPPM_CMEDB0_CLEAR , RULL(0x360F0191), SH_UNT_EX_11 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 370F0191, +REG64( EX_11_CPPM_CMEDB0_OR , RULL(0x360F0192), SH_UNT_EX_11 , + SH_ACS_SCOM2_OR ); //DUPS: 370F0192, + +REG64( C_CPPM_CMEDB1 , RULL(0x200F0194), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_CPPM_CMEDB1_CLEAR , RULL(0x200F0195), SH_UNT_C , + SH_ACS_SCOM1_CLEAR ); +REG64( C_CPPM_CMEDB1_OR , RULL(0x200F0196), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_CPPM_CMEDB1 , RULL(0x200F0194), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_CPPM_CMEDB1_CLEAR , RULL(0x200F0195), SH_UNT_C_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_0_CPPM_CMEDB1_OR , RULL(0x200F0196), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_CPPM_CMEDB1 , RULL(0x210F0194), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_CPPM_CMEDB1_CLEAR , RULL(0x210F0195), SH_UNT_C_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_1_CPPM_CMEDB1_OR , RULL(0x210F0196), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_CPPM_CMEDB1 , RULL(0x220F0194), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_CPPM_CMEDB1_CLEAR , RULL(0x220F0195), SH_UNT_C_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_2_CPPM_CMEDB1_OR , RULL(0x220F0196), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_CPPM_CMEDB1 , RULL(0x230F0194), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_CPPM_CMEDB1_CLEAR , RULL(0x230F0195), SH_UNT_C_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_3_CPPM_CMEDB1_OR , RULL(0x230F0196), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_CPPM_CMEDB1 , RULL(0x240F0194), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_CPPM_CMEDB1_CLEAR , RULL(0x240F0195), SH_UNT_C_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_4_CPPM_CMEDB1_OR , RULL(0x240F0196), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_CPPM_CMEDB1 , RULL(0x250F0194), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_CPPM_CMEDB1_CLEAR , RULL(0x250F0195), SH_UNT_C_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_5_CPPM_CMEDB1_OR , RULL(0x250F0196), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_CPPM_CMEDB1 , RULL(0x260F0194), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_CPPM_CMEDB1_CLEAR , RULL(0x260F0195), SH_UNT_C_6 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_6_CPPM_CMEDB1_OR , RULL(0x260F0196), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_CPPM_CMEDB1 , RULL(0x270F0194), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_CPPM_CMEDB1_CLEAR , RULL(0x270F0195), SH_UNT_C_7 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_7_CPPM_CMEDB1_OR , RULL(0x270F0196), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_CPPM_CMEDB1 , RULL(0x280F0194), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_CPPM_CMEDB1_CLEAR , RULL(0x280F0195), SH_UNT_C_8 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_8_CPPM_CMEDB1_OR , RULL(0x280F0196), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_CPPM_CMEDB1 , RULL(0x290F0194), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_CPPM_CMEDB1_CLEAR , RULL(0x290F0195), SH_UNT_C_9 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_9_CPPM_CMEDB1_OR , RULL(0x290F0196), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_CPPM_CMEDB1 , RULL(0x2A0F0194), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_CPPM_CMEDB1_CLEAR , RULL(0x2A0F0195), SH_UNT_C_10 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_10_CPPM_CMEDB1_OR , RULL(0x2A0F0196), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_CPPM_CMEDB1 , RULL(0x2B0F0194), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_CPPM_CMEDB1_CLEAR , RULL(0x2B0F0195), SH_UNT_C_11 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_11_CPPM_CMEDB1_OR , RULL(0x2B0F0196), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_CPPM_CMEDB1 , RULL(0x2C0F0194), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_CPPM_CMEDB1_CLEAR , RULL(0x2C0F0195), SH_UNT_C_12 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_12_CPPM_CMEDB1_OR , RULL(0x2C0F0196), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_CPPM_CMEDB1 , RULL(0x2D0F0194), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_CPPM_CMEDB1_CLEAR , RULL(0x2D0F0195), SH_UNT_C_13 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_13_CPPM_CMEDB1_OR , RULL(0x2D0F0196), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_CPPM_CMEDB1 , RULL(0x2E0F0194), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_CPPM_CMEDB1_CLEAR , RULL(0x2E0F0195), SH_UNT_C_14 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_14_CPPM_CMEDB1_OR , RULL(0x2E0F0196), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_CPPM_CMEDB1 , RULL(0x2F0F0194), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_CPPM_CMEDB1_CLEAR , RULL(0x2F0F0195), SH_UNT_C_15 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_15_CPPM_CMEDB1_OR , RULL(0x2F0F0196), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_CPPM_CMEDB1 , RULL(0x300F0194), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_CPPM_CMEDB1_CLEAR , RULL(0x300F0195), SH_UNT_C_16 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_16_CPPM_CMEDB1_OR , RULL(0x300F0196), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_CPPM_CMEDB1 , RULL(0x310F0194), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_CPPM_CMEDB1_CLEAR , RULL(0x310F0195), SH_UNT_C_17 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_17_CPPM_CMEDB1_OR , RULL(0x310F0196), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_CPPM_CMEDB1 , RULL(0x320F0194), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_CPPM_CMEDB1_CLEAR , RULL(0x320F0195), SH_UNT_C_18 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_18_CPPM_CMEDB1_OR , RULL(0x320F0196), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_CPPM_CMEDB1 , RULL(0x330F0194), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_CPPM_CMEDB1_CLEAR , RULL(0x330F0195), SH_UNT_C_19 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_19_CPPM_CMEDB1_OR , RULL(0x330F0196), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_CPPM_CMEDB1 , RULL(0x340F0194), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_CPPM_CMEDB1_CLEAR , RULL(0x340F0195), SH_UNT_C_20 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_20_CPPM_CMEDB1_OR , RULL(0x340F0196), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_CPPM_CMEDB1 , RULL(0x350F0194), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_CPPM_CMEDB1_CLEAR , RULL(0x350F0195), SH_UNT_C_21 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_21_CPPM_CMEDB1_OR , RULL(0x350F0196), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_CPPM_CMEDB1 , RULL(0x360F0194), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_CPPM_CMEDB1_CLEAR , RULL(0x360F0195), SH_UNT_C_22 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_22_CPPM_CMEDB1_OR , RULL(0x360F0196), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_CPPM_CMEDB1 , RULL(0x370F0194), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_CPPM_CMEDB1_CLEAR , RULL(0x370F0195), SH_UNT_C_23 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_23_CPPM_CMEDB1_OR , RULL(0x370F0196), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EX_CPPM_CMEDB1 , RULL(0x200F0194), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F0194, +REG64( EX_CPPM_CMEDB1_CLEAR , RULL(0x200F0195), SH_UNT_EX , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F0195, +REG64( EX_CPPM_CMEDB1_OR , RULL(0x200F0196), SH_UNT_EX , + SH_ACS_SCOM2_OR ); //DUPS: 210F0196, +REG64( EX_0_CPPM_CMEDB1 , RULL(0x200F0194), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F0194, +REG64( EX_0_CPPM_CMEDB1_CLEAR , RULL(0x200F0195), SH_UNT_EX_0 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F0195, +REG64( EX_0_CPPM_CMEDB1_OR , RULL(0x200F0196), SH_UNT_EX_0 , + SH_ACS_SCOM2_OR ); //DUPS: 210F0196, +REG64( EX_1_CPPM_CMEDB1 , RULL(0x230F0194), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F0194, +REG64( EX_1_CPPM_CMEDB1_CLEAR , RULL(0x230F0195), SH_UNT_EX_1 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 220F0195, +REG64( EX_1_CPPM_CMEDB1_OR , RULL(0x230F0196), SH_UNT_EX_1 , + SH_ACS_SCOM2_OR ); //DUPS: 220F0196, +REG64( EX_2_CPPM_CMEDB1 , RULL(0x240F0194), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F0194, +REG64( EX_2_CPPM_CMEDB1_CLEAR , RULL(0x240F0195), SH_UNT_EX_2 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 250F0195, +REG64( EX_2_CPPM_CMEDB1_OR , RULL(0x240F0196), SH_UNT_EX_2 , + SH_ACS_SCOM2_OR ); //DUPS: 250F0196, +REG64( EX_3_CPPM_CMEDB1 , RULL(0x260F0194), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F0194, +REG64( EX_3_CPPM_CMEDB1_CLEAR , RULL(0x260F0195), SH_UNT_EX_3 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 270F0195, +REG64( EX_3_CPPM_CMEDB1_OR , RULL(0x260F0196), SH_UNT_EX_3 , + SH_ACS_SCOM2_OR ); //DUPS: 270F0196, +REG64( EX_4_CPPM_CMEDB1 , RULL(0x280F0194), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F0194, +REG64( EX_4_CPPM_CMEDB1_CLEAR , RULL(0x280F0195), SH_UNT_EX_4 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 290F0195, +REG64( EX_4_CPPM_CMEDB1_OR , RULL(0x280F0196), SH_UNT_EX_4 , + SH_ACS_SCOM2_OR ); //DUPS: 290F0196, +REG64( EX_5_CPPM_CMEDB1 , RULL(0x2A0F0194), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F0194, +REG64( EX_5_CPPM_CMEDB1_CLEAR , RULL(0x2A0F0195), SH_UNT_EX_5 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2B0F0195, +REG64( EX_5_CPPM_CMEDB1_OR , RULL(0x2A0F0196), SH_UNT_EX_5 , + SH_ACS_SCOM2_OR ); //DUPS: 2B0F0196, +REG64( EX_6_CPPM_CMEDB1 , RULL(0x2C0F0194), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F0194, +REG64( EX_6_CPPM_CMEDB1_CLEAR , RULL(0x2C0F0195), SH_UNT_EX_6 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2D0F0195, +REG64( EX_6_CPPM_CMEDB1_OR , RULL(0x2C0F0196), SH_UNT_EX_6 , + SH_ACS_SCOM2_OR ); //DUPS: 2D0F0196, +REG64( EX_7_CPPM_CMEDB1 , RULL(0x2E0F0194), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F0194, +REG64( EX_7_CPPM_CMEDB1_CLEAR , RULL(0x2E0F0195), SH_UNT_EX_7 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2F0F0195, +REG64( EX_7_CPPM_CMEDB1_OR , RULL(0x2E0F0196), SH_UNT_EX_7 , + SH_ACS_SCOM2_OR ); //DUPS: 2F0F0196, +REG64( EX_8_CPPM_CMEDB1 , RULL(0x300F0194), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F0194, +REG64( EX_8_CPPM_CMEDB1_CLEAR , RULL(0x300F0195), SH_UNT_EX_8 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 310F0195, +REG64( EX_8_CPPM_CMEDB1_OR , RULL(0x300F0196), SH_UNT_EX_8 , + SH_ACS_SCOM2_OR ); //DUPS: 310F0196, +REG64( EX_9_CPPM_CMEDB1 , RULL(0x320F0194), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F0194, +REG64( EX_9_CPPM_CMEDB1_CLEAR , RULL(0x320F0195), SH_UNT_EX_9 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 330F0195, +REG64( EX_9_CPPM_CMEDB1_OR , RULL(0x320F0196), SH_UNT_EX_9 , + SH_ACS_SCOM2_OR ); //DUPS: 330F0196, +REG64( EX_10_CPPM_CMEDB1 , RULL(0x340F0194), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F0194, +REG64( EX_10_CPPM_CMEDB1_CLEAR , RULL(0x340F0195), SH_UNT_EX_10 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 350F0195, +REG64( EX_10_CPPM_CMEDB1_OR , RULL(0x340F0196), SH_UNT_EX_10 , + SH_ACS_SCOM2_OR ); //DUPS: 350F0196, +REG64( EX_11_CPPM_CMEDB1 , RULL(0x360F0194), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F0194, +REG64( EX_11_CPPM_CMEDB1_CLEAR , RULL(0x360F0195), SH_UNT_EX_11 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 370F0195, +REG64( EX_11_CPPM_CMEDB1_OR , RULL(0x360F0196), SH_UNT_EX_11 , + SH_ACS_SCOM2_OR ); //DUPS: 370F0196, + +REG64( C_CPPM_CMEDB2 , RULL(0x200F0198), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_CPPM_CMEDB2_CLEAR , RULL(0x200F0199), SH_UNT_C , + SH_ACS_SCOM1_CLEAR ); +REG64( C_CPPM_CMEDB2_OR , RULL(0x200F019A), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_CPPM_CMEDB2 , RULL(0x200F0198), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_CPPM_CMEDB2_CLEAR , RULL(0x200F0199), SH_UNT_C_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_0_CPPM_CMEDB2_OR , RULL(0x200F019A), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_CPPM_CMEDB2 , RULL(0x210F0198), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_CPPM_CMEDB2_CLEAR , RULL(0x210F0199), SH_UNT_C_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_1_CPPM_CMEDB2_OR , RULL(0x210F019A), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_CPPM_CMEDB2 , RULL(0x220F0198), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_CPPM_CMEDB2_CLEAR , RULL(0x220F0199), SH_UNT_C_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_2_CPPM_CMEDB2_OR , RULL(0x220F019A), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_CPPM_CMEDB2 , RULL(0x230F0198), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_CPPM_CMEDB2_CLEAR , RULL(0x230F0199), SH_UNT_C_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_3_CPPM_CMEDB2_OR , RULL(0x230F019A), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_CPPM_CMEDB2 , RULL(0x240F0198), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_CPPM_CMEDB2_CLEAR , RULL(0x240F0199), SH_UNT_C_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_4_CPPM_CMEDB2_OR , RULL(0x240F019A), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_CPPM_CMEDB2 , RULL(0x250F0198), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_CPPM_CMEDB2_CLEAR , RULL(0x250F0199), SH_UNT_C_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_5_CPPM_CMEDB2_OR , RULL(0x250F019A), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_CPPM_CMEDB2 , RULL(0x260F0198), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_CPPM_CMEDB2_CLEAR , RULL(0x260F0199), SH_UNT_C_6 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_6_CPPM_CMEDB2_OR , RULL(0x260F019A), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_CPPM_CMEDB2 , RULL(0x270F0198), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_CPPM_CMEDB2_CLEAR , RULL(0x270F0199), SH_UNT_C_7 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_7_CPPM_CMEDB2_OR , RULL(0x270F019A), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_CPPM_CMEDB2 , RULL(0x280F0198), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_CPPM_CMEDB2_CLEAR , RULL(0x280F0199), SH_UNT_C_8 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_8_CPPM_CMEDB2_OR , RULL(0x280F019A), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_CPPM_CMEDB2 , RULL(0x290F0198), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_CPPM_CMEDB2_CLEAR , RULL(0x290F0199), SH_UNT_C_9 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_9_CPPM_CMEDB2_OR , RULL(0x290F019A), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_CPPM_CMEDB2 , RULL(0x2A0F0198), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_CPPM_CMEDB2_CLEAR , RULL(0x2A0F0199), SH_UNT_C_10 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_10_CPPM_CMEDB2_OR , RULL(0x2A0F019A), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_CPPM_CMEDB2 , RULL(0x2B0F0198), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_CPPM_CMEDB2_CLEAR , RULL(0x2B0F0199), SH_UNT_C_11 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_11_CPPM_CMEDB2_OR , RULL(0x2B0F019A), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_CPPM_CMEDB2 , RULL(0x2C0F0198), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_CPPM_CMEDB2_CLEAR , RULL(0x2C0F0199), SH_UNT_C_12 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_12_CPPM_CMEDB2_OR , RULL(0x2C0F019A), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_CPPM_CMEDB2 , RULL(0x2D0F0198), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_CPPM_CMEDB2_CLEAR , RULL(0x2D0F0199), SH_UNT_C_13 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_13_CPPM_CMEDB2_OR , RULL(0x2D0F019A), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_CPPM_CMEDB2 , RULL(0x2E0F0198), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_CPPM_CMEDB2_CLEAR , RULL(0x2E0F0199), SH_UNT_C_14 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_14_CPPM_CMEDB2_OR , RULL(0x2E0F019A), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_CPPM_CMEDB2 , RULL(0x2F0F0198), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_CPPM_CMEDB2_CLEAR , RULL(0x2F0F0199), SH_UNT_C_15 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_15_CPPM_CMEDB2_OR , RULL(0x2F0F019A), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_CPPM_CMEDB2 , RULL(0x300F0198), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_CPPM_CMEDB2_CLEAR , RULL(0x300F0199), SH_UNT_C_16 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_16_CPPM_CMEDB2_OR , RULL(0x300F019A), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_CPPM_CMEDB2 , RULL(0x310F0198), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_CPPM_CMEDB2_CLEAR , RULL(0x310F0199), SH_UNT_C_17 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_17_CPPM_CMEDB2_OR , RULL(0x310F019A), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_CPPM_CMEDB2 , RULL(0x320F0198), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_CPPM_CMEDB2_CLEAR , RULL(0x320F0199), SH_UNT_C_18 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_18_CPPM_CMEDB2_OR , RULL(0x320F019A), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_CPPM_CMEDB2 , RULL(0x330F0198), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_CPPM_CMEDB2_CLEAR , RULL(0x330F0199), SH_UNT_C_19 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_19_CPPM_CMEDB2_OR , RULL(0x330F019A), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_CPPM_CMEDB2 , RULL(0x340F0198), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_CPPM_CMEDB2_CLEAR , RULL(0x340F0199), SH_UNT_C_20 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_20_CPPM_CMEDB2_OR , RULL(0x340F019A), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_CPPM_CMEDB2 , RULL(0x350F0198), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_CPPM_CMEDB2_CLEAR , RULL(0x350F0199), SH_UNT_C_21 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_21_CPPM_CMEDB2_OR , RULL(0x350F019A), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_CPPM_CMEDB2 , RULL(0x360F0198), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_CPPM_CMEDB2_CLEAR , RULL(0x360F0199), SH_UNT_C_22 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_22_CPPM_CMEDB2_OR , RULL(0x360F019A), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_CPPM_CMEDB2 , RULL(0x370F0198), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_CPPM_CMEDB2_CLEAR , RULL(0x370F0199), SH_UNT_C_23 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_23_CPPM_CMEDB2_OR , RULL(0x370F019A), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EX_CPPM_CMEDB2 , RULL(0x200F0198), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F0198, +REG64( EX_CPPM_CMEDB2_CLEAR , RULL(0x200F0199), SH_UNT_EX , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F0199, +REG64( EX_CPPM_CMEDB2_OR , RULL(0x200F019A), SH_UNT_EX , + SH_ACS_SCOM2_OR ); //DUPS: 210F019A, +REG64( EX_0_CPPM_CMEDB2 , RULL(0x200F0198), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F0198, +REG64( EX_0_CPPM_CMEDB2_CLEAR , RULL(0x200F0199), SH_UNT_EX_0 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F0199, +REG64( EX_0_CPPM_CMEDB2_OR , RULL(0x200F019A), SH_UNT_EX_0 , + SH_ACS_SCOM2_OR ); //DUPS: 210F019A, +REG64( EX_1_CPPM_CMEDB2 , RULL(0x230F0198), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F0198, +REG64( EX_1_CPPM_CMEDB2_CLEAR , RULL(0x230F0199), SH_UNT_EX_1 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 220F0199, +REG64( EX_1_CPPM_CMEDB2_OR , RULL(0x230F019A), SH_UNT_EX_1 , + SH_ACS_SCOM2_OR ); //DUPS: 220F019A, +REG64( EX_2_CPPM_CMEDB2 , RULL(0x240F0198), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F0198, +REG64( EX_2_CPPM_CMEDB2_CLEAR , RULL(0x240F0199), SH_UNT_EX_2 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 250F0199, +REG64( EX_2_CPPM_CMEDB2_OR , RULL(0x240F019A), SH_UNT_EX_2 , + SH_ACS_SCOM2_OR ); //DUPS: 250F019A, +REG64( EX_3_CPPM_CMEDB2 , RULL(0x260F0198), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F0198, +REG64( EX_3_CPPM_CMEDB2_CLEAR , RULL(0x260F0199), SH_UNT_EX_3 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 270F0199, +REG64( EX_3_CPPM_CMEDB2_OR , RULL(0x260F019A), SH_UNT_EX_3 , + SH_ACS_SCOM2_OR ); //DUPS: 270F019A, +REG64( EX_4_CPPM_CMEDB2 , RULL(0x280F0198), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F0198, +REG64( EX_4_CPPM_CMEDB2_CLEAR , RULL(0x280F0199), SH_UNT_EX_4 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 290F0199, +REG64( EX_4_CPPM_CMEDB2_OR , RULL(0x280F019A), SH_UNT_EX_4 , + SH_ACS_SCOM2_OR ); //DUPS: 290F019A, +REG64( EX_5_CPPM_CMEDB2 , RULL(0x2A0F0198), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F0198, +REG64( EX_5_CPPM_CMEDB2_CLEAR , RULL(0x2A0F0199), SH_UNT_EX_5 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2B0F0199, +REG64( EX_5_CPPM_CMEDB2_OR , RULL(0x2A0F019A), SH_UNT_EX_5 , + SH_ACS_SCOM2_OR ); //DUPS: 2B0F019A, +REG64( EX_6_CPPM_CMEDB2 , RULL(0x2C0F0198), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F0198, +REG64( EX_6_CPPM_CMEDB2_CLEAR , RULL(0x2C0F0199), SH_UNT_EX_6 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2D0F0199, +REG64( EX_6_CPPM_CMEDB2_OR , RULL(0x2C0F019A), SH_UNT_EX_6 , + SH_ACS_SCOM2_OR ); //DUPS: 2D0F019A, +REG64( EX_7_CPPM_CMEDB2 , RULL(0x2E0F0198), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F0198, +REG64( EX_7_CPPM_CMEDB2_CLEAR , RULL(0x2E0F0199), SH_UNT_EX_7 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2F0F0199, +REG64( EX_7_CPPM_CMEDB2_OR , RULL(0x2E0F019A), SH_UNT_EX_7 , + SH_ACS_SCOM2_OR ); //DUPS: 2F0F019A, +REG64( EX_8_CPPM_CMEDB2 , RULL(0x300F0198), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F0198, +REG64( EX_8_CPPM_CMEDB2_CLEAR , RULL(0x300F0199), SH_UNT_EX_8 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 310F0199, +REG64( EX_8_CPPM_CMEDB2_OR , RULL(0x300F019A), SH_UNT_EX_8 , + SH_ACS_SCOM2_OR ); //DUPS: 310F019A, +REG64( EX_9_CPPM_CMEDB2 , RULL(0x320F0198), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F0198, +REG64( EX_9_CPPM_CMEDB2_CLEAR , RULL(0x320F0199), SH_UNT_EX_9 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 330F0199, +REG64( EX_9_CPPM_CMEDB2_OR , RULL(0x320F019A), SH_UNT_EX_9 , + SH_ACS_SCOM2_OR ); //DUPS: 330F019A, +REG64( EX_10_CPPM_CMEDB2 , RULL(0x340F0198), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F0198, +REG64( EX_10_CPPM_CMEDB2_CLEAR , RULL(0x340F0199), SH_UNT_EX_10 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 350F0199, +REG64( EX_10_CPPM_CMEDB2_OR , RULL(0x340F019A), SH_UNT_EX_10 , + SH_ACS_SCOM2_OR ); //DUPS: 350F019A, +REG64( EX_11_CPPM_CMEDB2 , RULL(0x360F0198), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F0198, +REG64( EX_11_CPPM_CMEDB2_CLEAR , RULL(0x360F0199), SH_UNT_EX_11 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 370F0199, +REG64( EX_11_CPPM_CMEDB2_OR , RULL(0x360F019A), SH_UNT_EX_11 , + SH_ACS_SCOM2_OR ); //DUPS: 370F019A, + +REG64( C_CPPM_CMEDB3 , RULL(0x200F019C), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_CPPM_CMEDB3_CLEAR , RULL(0x200F019D), SH_UNT_C , + SH_ACS_SCOM1_CLEAR ); +REG64( C_CPPM_CMEDB3_OR , RULL(0x200F019E), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_CPPM_CMEDB3 , RULL(0x200F019C), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_CPPM_CMEDB3_CLEAR , RULL(0x200F019D), SH_UNT_C_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_0_CPPM_CMEDB3_OR , RULL(0x200F019E), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_CPPM_CMEDB3 , RULL(0x210F019C), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_CPPM_CMEDB3_CLEAR , RULL(0x210F019D), SH_UNT_C_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_1_CPPM_CMEDB3_OR , RULL(0x210F019E), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_CPPM_CMEDB3 , RULL(0x220F019C), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_CPPM_CMEDB3_CLEAR , RULL(0x220F019D), SH_UNT_C_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_2_CPPM_CMEDB3_OR , RULL(0x220F019E), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_CPPM_CMEDB3 , RULL(0x230F019C), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_CPPM_CMEDB3_CLEAR , RULL(0x230F019D), SH_UNT_C_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_3_CPPM_CMEDB3_OR , RULL(0x230F019E), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_CPPM_CMEDB3 , RULL(0x240F019C), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_CPPM_CMEDB3_CLEAR , RULL(0x240F019D), SH_UNT_C_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_4_CPPM_CMEDB3_OR , RULL(0x240F019E), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_CPPM_CMEDB3 , RULL(0x250F019C), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_CPPM_CMEDB3_CLEAR , RULL(0x250F019D), SH_UNT_C_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_5_CPPM_CMEDB3_OR , RULL(0x250F019E), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_CPPM_CMEDB3 , RULL(0x260F019C), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_CPPM_CMEDB3_CLEAR , RULL(0x260F019D), SH_UNT_C_6 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_6_CPPM_CMEDB3_OR , RULL(0x260F019E), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_CPPM_CMEDB3 , RULL(0x270F019C), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_CPPM_CMEDB3_CLEAR , RULL(0x270F019D), SH_UNT_C_7 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_7_CPPM_CMEDB3_OR , RULL(0x270F019E), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_CPPM_CMEDB3 , RULL(0x280F019C), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_CPPM_CMEDB3_CLEAR , RULL(0x280F019D), SH_UNT_C_8 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_8_CPPM_CMEDB3_OR , RULL(0x280F019E), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_CPPM_CMEDB3 , RULL(0x290F019C), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_CPPM_CMEDB3_CLEAR , RULL(0x290F019D), SH_UNT_C_9 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_9_CPPM_CMEDB3_OR , RULL(0x290F019E), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_CPPM_CMEDB3 , RULL(0x2A0F019C), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_CPPM_CMEDB3_CLEAR , RULL(0x2A0F019D), SH_UNT_C_10 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_10_CPPM_CMEDB3_OR , RULL(0x2A0F019E), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_CPPM_CMEDB3 , RULL(0x2B0F019C), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_CPPM_CMEDB3_CLEAR , RULL(0x2B0F019D), SH_UNT_C_11 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_11_CPPM_CMEDB3_OR , RULL(0x2B0F019E), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_CPPM_CMEDB3 , RULL(0x2C0F019C), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_CPPM_CMEDB3_CLEAR , RULL(0x2C0F019D), SH_UNT_C_12 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_12_CPPM_CMEDB3_OR , RULL(0x2C0F019E), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_CPPM_CMEDB3 , RULL(0x2D0F019C), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_CPPM_CMEDB3_CLEAR , RULL(0x2D0F019D), SH_UNT_C_13 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_13_CPPM_CMEDB3_OR , RULL(0x2D0F019E), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_CPPM_CMEDB3 , RULL(0x2E0F019C), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_CPPM_CMEDB3_CLEAR , RULL(0x2E0F019D), SH_UNT_C_14 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_14_CPPM_CMEDB3_OR , RULL(0x2E0F019E), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_CPPM_CMEDB3 , RULL(0x2F0F019C), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_CPPM_CMEDB3_CLEAR , RULL(0x2F0F019D), SH_UNT_C_15 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_15_CPPM_CMEDB3_OR , RULL(0x2F0F019E), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_CPPM_CMEDB3 , RULL(0x300F019C), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_CPPM_CMEDB3_CLEAR , RULL(0x300F019D), SH_UNT_C_16 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_16_CPPM_CMEDB3_OR , RULL(0x300F019E), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_CPPM_CMEDB3 , RULL(0x310F019C), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_CPPM_CMEDB3_CLEAR , RULL(0x310F019D), SH_UNT_C_17 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_17_CPPM_CMEDB3_OR , RULL(0x310F019E), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_CPPM_CMEDB3 , RULL(0x320F019C), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_CPPM_CMEDB3_CLEAR , RULL(0x320F019D), SH_UNT_C_18 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_18_CPPM_CMEDB3_OR , RULL(0x320F019E), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_CPPM_CMEDB3 , RULL(0x330F019C), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_CPPM_CMEDB3_CLEAR , RULL(0x330F019D), SH_UNT_C_19 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_19_CPPM_CMEDB3_OR , RULL(0x330F019E), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_CPPM_CMEDB3 , RULL(0x340F019C), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_CPPM_CMEDB3_CLEAR , RULL(0x340F019D), SH_UNT_C_20 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_20_CPPM_CMEDB3_OR , RULL(0x340F019E), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_CPPM_CMEDB3 , RULL(0x350F019C), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_CPPM_CMEDB3_CLEAR , RULL(0x350F019D), SH_UNT_C_21 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_21_CPPM_CMEDB3_OR , RULL(0x350F019E), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_CPPM_CMEDB3 , RULL(0x360F019C), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_CPPM_CMEDB3_CLEAR , RULL(0x360F019D), SH_UNT_C_22 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_22_CPPM_CMEDB3_OR , RULL(0x360F019E), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_CPPM_CMEDB3 , RULL(0x370F019C), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_CPPM_CMEDB3_CLEAR , RULL(0x370F019D), SH_UNT_C_23 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_23_CPPM_CMEDB3_OR , RULL(0x370F019E), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EX_CPPM_CMEDB3 , RULL(0x200F019C), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F019C, +REG64( EX_CPPM_CMEDB3_CLEAR , RULL(0x200F019D), SH_UNT_EX , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F019D, +REG64( EX_CPPM_CMEDB3_OR , RULL(0x200F019E), SH_UNT_EX , + SH_ACS_SCOM2_OR ); //DUPS: 210F019E, +REG64( EX_0_CPPM_CMEDB3 , RULL(0x200F019C), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F019C, +REG64( EX_0_CPPM_CMEDB3_CLEAR , RULL(0x200F019D), SH_UNT_EX_0 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F019D, +REG64( EX_0_CPPM_CMEDB3_OR , RULL(0x200F019E), SH_UNT_EX_0 , + SH_ACS_SCOM2_OR ); //DUPS: 210F019E, +REG64( EX_1_CPPM_CMEDB3 , RULL(0x230F019C), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F019C, +REG64( EX_1_CPPM_CMEDB3_CLEAR , RULL(0x230F019D), SH_UNT_EX_1 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 220F019D, +REG64( EX_1_CPPM_CMEDB3_OR , RULL(0x230F019E), SH_UNT_EX_1 , + SH_ACS_SCOM2_OR ); //DUPS: 220F019E, +REG64( EX_2_CPPM_CMEDB3 , RULL(0x240F019C), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F019C, +REG64( EX_2_CPPM_CMEDB3_CLEAR , RULL(0x240F019D), SH_UNT_EX_2 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 250F019D, +REG64( EX_2_CPPM_CMEDB3_OR , RULL(0x240F019E), SH_UNT_EX_2 , + SH_ACS_SCOM2_OR ); //DUPS: 250F019E, +REG64( EX_3_CPPM_CMEDB3 , RULL(0x260F019C), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F019C, +REG64( EX_3_CPPM_CMEDB3_CLEAR , RULL(0x260F019D), SH_UNT_EX_3 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 270F019D, +REG64( EX_3_CPPM_CMEDB3_OR , RULL(0x260F019E), SH_UNT_EX_3 , + SH_ACS_SCOM2_OR ); //DUPS: 270F019E, +REG64( EX_4_CPPM_CMEDB3 , RULL(0x280F019C), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F019C, +REG64( EX_4_CPPM_CMEDB3_CLEAR , RULL(0x280F019D), SH_UNT_EX_4 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 290F019D, +REG64( EX_4_CPPM_CMEDB3_OR , RULL(0x280F019E), SH_UNT_EX_4 , + SH_ACS_SCOM2_OR ); //DUPS: 290F019E, +REG64( EX_5_CPPM_CMEDB3 , RULL(0x2A0F019C), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F019C, +REG64( EX_5_CPPM_CMEDB3_CLEAR , RULL(0x2A0F019D), SH_UNT_EX_5 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2B0F019D, +REG64( EX_5_CPPM_CMEDB3_OR , RULL(0x2A0F019E), SH_UNT_EX_5 , + SH_ACS_SCOM2_OR ); //DUPS: 2B0F019E, +REG64( EX_6_CPPM_CMEDB3 , RULL(0x2C0F019C), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F019C, +REG64( EX_6_CPPM_CMEDB3_CLEAR , RULL(0x2C0F019D), SH_UNT_EX_6 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2D0F019D, +REG64( EX_6_CPPM_CMEDB3_OR , RULL(0x2C0F019E), SH_UNT_EX_6 , + SH_ACS_SCOM2_OR ); //DUPS: 2D0F019E, +REG64( EX_7_CPPM_CMEDB3 , RULL(0x2E0F019C), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F019C, +REG64( EX_7_CPPM_CMEDB3_CLEAR , RULL(0x2E0F019D), SH_UNT_EX_7 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2F0F019D, +REG64( EX_7_CPPM_CMEDB3_OR , RULL(0x2E0F019E), SH_UNT_EX_7 , + SH_ACS_SCOM2_OR ); //DUPS: 2F0F019E, +REG64( EX_8_CPPM_CMEDB3 , RULL(0x300F019C), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F019C, +REG64( EX_8_CPPM_CMEDB3_CLEAR , RULL(0x300F019D), SH_UNT_EX_8 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 310F019D, +REG64( EX_8_CPPM_CMEDB3_OR , RULL(0x300F019E), SH_UNT_EX_8 , + SH_ACS_SCOM2_OR ); //DUPS: 310F019E, +REG64( EX_9_CPPM_CMEDB3 , RULL(0x320F019C), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F019C, +REG64( EX_9_CPPM_CMEDB3_CLEAR , RULL(0x320F019D), SH_UNT_EX_9 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 330F019D, +REG64( EX_9_CPPM_CMEDB3_OR , RULL(0x320F019E), SH_UNT_EX_9 , + SH_ACS_SCOM2_OR ); //DUPS: 330F019E, +REG64( EX_10_CPPM_CMEDB3 , RULL(0x340F019C), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F019C, +REG64( EX_10_CPPM_CMEDB3_CLEAR , RULL(0x340F019D), SH_UNT_EX_10 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 350F019D, +REG64( EX_10_CPPM_CMEDB3_OR , RULL(0x340F019E), SH_UNT_EX_10 , + SH_ACS_SCOM2_OR ); //DUPS: 350F019E, +REG64( EX_11_CPPM_CMEDB3 , RULL(0x360F019C), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F019C, +REG64( EX_11_CPPM_CMEDB3_CLEAR , RULL(0x360F019D), SH_UNT_EX_11 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 370F019D, +REG64( EX_11_CPPM_CMEDB3_OR , RULL(0x360F019E), SH_UNT_EX_11 , + SH_ACS_SCOM2_OR ); //DUPS: 370F019E, + +REG64( C_CPPM_CMEMSG , RULL(0x200F01AB), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_CPPM_CMEMSG , RULL(0x200F01AB), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_CPPM_CMEMSG , RULL(0x210F01AB), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_CPPM_CMEMSG , RULL(0x220F01AB), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_CPPM_CMEMSG , RULL(0x230F01AB), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_CPPM_CMEMSG , RULL(0x240F01AB), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_CPPM_CMEMSG , RULL(0x250F01AB), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_CPPM_CMEMSG , RULL(0x260F01AB), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_CPPM_CMEMSG , RULL(0x270F01AB), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_CPPM_CMEMSG , RULL(0x280F01AB), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_CPPM_CMEMSG , RULL(0x290F01AB), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_CPPM_CMEMSG , RULL(0x2A0F01AB), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_CPPM_CMEMSG , RULL(0x2B0F01AB), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_CPPM_CMEMSG , RULL(0x2C0F01AB), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_CPPM_CMEMSG , RULL(0x2D0F01AB), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_CPPM_CMEMSG , RULL(0x2E0F01AB), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_CPPM_CMEMSG , RULL(0x2F0F01AB), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_CPPM_CMEMSG , RULL(0x300F01AB), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_CPPM_CMEMSG , RULL(0x310F01AB), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_CPPM_CMEMSG , RULL(0x320F01AB), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_CPPM_CMEMSG , RULL(0x330F01AB), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_CPPM_CMEMSG , RULL(0x340F01AB), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_CPPM_CMEMSG , RULL(0x350F01AB), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_CPPM_CMEMSG , RULL(0x360F01AB), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_CPPM_CMEMSG , RULL(0x370F01AB), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_CPPM_CMEMSG , RULL(0x200F01AB), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F01AB, +REG64( EX_0_CPPM_CMEMSG , RULL(0x200F01AB), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F01AB, +REG64( EX_1_CPPM_CMEMSG , RULL(0x230F01AB), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F01AB, +REG64( EX_2_CPPM_CMEMSG , RULL(0x240F01AB), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F01AB, +REG64( EX_3_CPPM_CMEMSG , RULL(0x260F01AB), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F01AB, +REG64( EX_4_CPPM_CMEMSG , RULL(0x280F01AB), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F01AB, +REG64( EX_5_CPPM_CMEMSG , RULL(0x2A0F01AB), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F01AB, +REG64( EX_6_CPPM_CMEMSG , RULL(0x2C0F01AB), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F01AB, +REG64( EX_7_CPPM_CMEMSG , RULL(0x2E0F01AB), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F01AB, +REG64( EX_8_CPPM_CMEMSG , RULL(0x300F01AB), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F01AB, +REG64( EX_9_CPPM_CMEMSG , RULL(0x320F01AB), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F01AB, +REG64( EX_10_CPPM_CMEMSG , RULL(0x340F01AB), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F01AB, +REG64( EX_11_CPPM_CMEMSG , RULL(0x360F01AB), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F01AB, + +REG64( C_CPPM_CPMMR , RULL(0x200F0106), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_CPPM_CPMMR_CLEAR , RULL(0x200F0107), SH_UNT_C , + SH_ACS_SCOM1_CLEAR ); +REG64( C_CPPM_CPMMR_OR , RULL(0x200F0108), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_CPPM_CPMMR , RULL(0x200F0106), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_CPPM_CPMMR_CLEAR , RULL(0x200F0107), SH_UNT_C_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_0_CPPM_CPMMR_OR , RULL(0x200F0108), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_CPPM_CPMMR , RULL(0x210F0106), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_CPPM_CPMMR_CLEAR , RULL(0x210F0107), SH_UNT_C_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_1_CPPM_CPMMR_OR , RULL(0x210F0108), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_CPPM_CPMMR , RULL(0x220F0106), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_CPPM_CPMMR_CLEAR , RULL(0x220F0107), SH_UNT_C_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_2_CPPM_CPMMR_OR , RULL(0x220F0108), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_CPPM_CPMMR , RULL(0x230F0106), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_CPPM_CPMMR_CLEAR , RULL(0x230F0107), SH_UNT_C_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_3_CPPM_CPMMR_OR , RULL(0x230F0108), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_CPPM_CPMMR , RULL(0x240F0106), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_CPPM_CPMMR_CLEAR , RULL(0x240F0107), SH_UNT_C_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_4_CPPM_CPMMR_OR , RULL(0x240F0108), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_CPPM_CPMMR , RULL(0x250F0106), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_CPPM_CPMMR_CLEAR , RULL(0x250F0107), SH_UNT_C_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_5_CPPM_CPMMR_OR , RULL(0x250F0108), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_CPPM_CPMMR , RULL(0x260F0106), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_CPPM_CPMMR_CLEAR , RULL(0x260F0107), SH_UNT_C_6 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_6_CPPM_CPMMR_OR , RULL(0x260F0108), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_CPPM_CPMMR , RULL(0x270F0106), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_CPPM_CPMMR_CLEAR , RULL(0x270F0107), SH_UNT_C_7 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_7_CPPM_CPMMR_OR , RULL(0x270F0108), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_CPPM_CPMMR , RULL(0x280F0106), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_CPPM_CPMMR_CLEAR , RULL(0x280F0107), SH_UNT_C_8 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_8_CPPM_CPMMR_OR , RULL(0x280F0108), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_CPPM_CPMMR , RULL(0x290F0106), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_CPPM_CPMMR_CLEAR , RULL(0x290F0107), SH_UNT_C_9 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_9_CPPM_CPMMR_OR , RULL(0x290F0108), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_CPPM_CPMMR , RULL(0x2A0F0106), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_CPPM_CPMMR_CLEAR , RULL(0x2A0F0107), SH_UNT_C_10 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_10_CPPM_CPMMR_OR , RULL(0x2A0F0108), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_CPPM_CPMMR , RULL(0x2B0F0106), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_CPPM_CPMMR_CLEAR , RULL(0x2B0F0107), SH_UNT_C_11 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_11_CPPM_CPMMR_OR , RULL(0x2B0F0108), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_CPPM_CPMMR , RULL(0x2C0F0106), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_CPPM_CPMMR_CLEAR , RULL(0x2C0F0107), SH_UNT_C_12 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_12_CPPM_CPMMR_OR , RULL(0x2C0F0108), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_CPPM_CPMMR , RULL(0x2D0F0106), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_CPPM_CPMMR_CLEAR , RULL(0x2D0F0107), SH_UNT_C_13 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_13_CPPM_CPMMR_OR , RULL(0x2D0F0108), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_CPPM_CPMMR , RULL(0x2E0F0106), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_CPPM_CPMMR_CLEAR , RULL(0x2E0F0107), SH_UNT_C_14 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_14_CPPM_CPMMR_OR , RULL(0x2E0F0108), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_CPPM_CPMMR , RULL(0x2F0F0106), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_CPPM_CPMMR_CLEAR , RULL(0x2F0F0107), SH_UNT_C_15 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_15_CPPM_CPMMR_OR , RULL(0x2F0F0108), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_CPPM_CPMMR , RULL(0x300F0106), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_CPPM_CPMMR_CLEAR , RULL(0x300F0107), SH_UNT_C_16 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_16_CPPM_CPMMR_OR , RULL(0x300F0108), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_CPPM_CPMMR , RULL(0x310F0106), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_CPPM_CPMMR_CLEAR , RULL(0x310F0107), SH_UNT_C_17 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_17_CPPM_CPMMR_OR , RULL(0x310F0108), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_CPPM_CPMMR , RULL(0x320F0106), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_CPPM_CPMMR_CLEAR , RULL(0x320F0107), SH_UNT_C_18 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_18_CPPM_CPMMR_OR , RULL(0x320F0108), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_CPPM_CPMMR , RULL(0x330F0106), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_CPPM_CPMMR_CLEAR , RULL(0x330F0107), SH_UNT_C_19 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_19_CPPM_CPMMR_OR , RULL(0x330F0108), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_CPPM_CPMMR , RULL(0x340F0106), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_CPPM_CPMMR_CLEAR , RULL(0x340F0107), SH_UNT_C_20 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_20_CPPM_CPMMR_OR , RULL(0x340F0108), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_CPPM_CPMMR , RULL(0x350F0106), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_CPPM_CPMMR_CLEAR , RULL(0x350F0107), SH_UNT_C_21 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_21_CPPM_CPMMR_OR , RULL(0x350F0108), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_CPPM_CPMMR , RULL(0x360F0106), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_CPPM_CPMMR_CLEAR , RULL(0x360F0107), SH_UNT_C_22 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_22_CPPM_CPMMR_OR , RULL(0x360F0108), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_CPPM_CPMMR , RULL(0x370F0106), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_CPPM_CPMMR_CLEAR , RULL(0x370F0107), SH_UNT_C_23 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_23_CPPM_CPMMR_OR , RULL(0x370F0108), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EX_CPPM_CPMMR , RULL(0x200F0106), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F0106, +REG64( EX_CPPM_CPMMR_CLEAR , RULL(0x200F0107), SH_UNT_EX , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F0107, +REG64( EX_CPPM_CPMMR_OR , RULL(0x200F0108), SH_UNT_EX , + SH_ACS_SCOM2_OR ); //DUPS: 210F0108, +REG64( EX_0_CPPM_CPMMR , RULL(0x200F0106), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F0106, +REG64( EX_0_CPPM_CPMMR_CLEAR , RULL(0x200F0107), SH_UNT_EX_0 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F0107, +REG64( EX_0_CPPM_CPMMR_OR , RULL(0x200F0108), SH_UNT_EX_0 , + SH_ACS_SCOM2_OR ); //DUPS: 210F0108, +REG64( EX_1_CPPM_CPMMR , RULL(0x230F0106), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F0106, +REG64( EX_1_CPPM_CPMMR_CLEAR , RULL(0x230F0107), SH_UNT_EX_1 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 220F0107, +REG64( EX_1_CPPM_CPMMR_OR , RULL(0x230F0108), SH_UNT_EX_1 , + SH_ACS_SCOM2_OR ); //DUPS: 220F0108, +REG64( EX_2_CPPM_CPMMR , RULL(0x240F0106), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F0106, +REG64( EX_2_CPPM_CPMMR_CLEAR , RULL(0x240F0107), SH_UNT_EX_2 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 250F0107, +REG64( EX_2_CPPM_CPMMR_OR , RULL(0x240F0108), SH_UNT_EX_2 , + SH_ACS_SCOM2_OR ); //DUPS: 250F0108, +REG64( EX_3_CPPM_CPMMR , RULL(0x260F0106), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F0106, +REG64( EX_3_CPPM_CPMMR_CLEAR , RULL(0x260F0107), SH_UNT_EX_3 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 270F0107, +REG64( EX_3_CPPM_CPMMR_OR , RULL(0x260F0108), SH_UNT_EX_3 , + SH_ACS_SCOM2_OR ); //DUPS: 270F0108, +REG64( EX_4_CPPM_CPMMR , RULL(0x280F0106), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F0106, +REG64( EX_4_CPPM_CPMMR_CLEAR , RULL(0x280F0107), SH_UNT_EX_4 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 290F0107, +REG64( EX_4_CPPM_CPMMR_OR , RULL(0x280F0108), SH_UNT_EX_4 , + SH_ACS_SCOM2_OR ); //DUPS: 290F0108, +REG64( EX_5_CPPM_CPMMR , RULL(0x2A0F0106), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F0106, +REG64( EX_5_CPPM_CPMMR_CLEAR , RULL(0x2A0F0107), SH_UNT_EX_5 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2B0F0107, +REG64( EX_5_CPPM_CPMMR_OR , RULL(0x2A0F0108), SH_UNT_EX_5 , + SH_ACS_SCOM2_OR ); //DUPS: 2B0F0108, +REG64( EX_6_CPPM_CPMMR , RULL(0x2C0F0106), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F0106, +REG64( EX_6_CPPM_CPMMR_CLEAR , RULL(0x2C0F0107), SH_UNT_EX_6 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2D0F0107, +REG64( EX_6_CPPM_CPMMR_OR , RULL(0x2C0F0108), SH_UNT_EX_6 , + SH_ACS_SCOM2_OR ); //DUPS: 2D0F0108, +REG64( EX_7_CPPM_CPMMR , RULL(0x2E0F0106), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F0106, +REG64( EX_7_CPPM_CPMMR_CLEAR , RULL(0x2E0F0107), SH_UNT_EX_7 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2F0F0107, +REG64( EX_7_CPPM_CPMMR_OR , RULL(0x2E0F0108), SH_UNT_EX_7 , + SH_ACS_SCOM2_OR ); //DUPS: 2F0F0108, +REG64( EX_8_CPPM_CPMMR , RULL(0x300F0106), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F0106, +REG64( EX_8_CPPM_CPMMR_CLEAR , RULL(0x300F0107), SH_UNT_EX_8 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 310F0107, +REG64( EX_8_CPPM_CPMMR_OR , RULL(0x300F0108), SH_UNT_EX_8 , + SH_ACS_SCOM2_OR ); //DUPS: 310F0108, +REG64( EX_9_CPPM_CPMMR , RULL(0x320F0106), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F0106, +REG64( EX_9_CPPM_CPMMR_CLEAR , RULL(0x320F0107), SH_UNT_EX_9 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 330F0107, +REG64( EX_9_CPPM_CPMMR_OR , RULL(0x320F0108), SH_UNT_EX_9 , + SH_ACS_SCOM2_OR ); //DUPS: 330F0108, +REG64( EX_10_CPPM_CPMMR , RULL(0x340F0106), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F0106, +REG64( EX_10_CPPM_CPMMR_CLEAR , RULL(0x340F0107), SH_UNT_EX_10 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 350F0107, +REG64( EX_10_CPPM_CPMMR_OR , RULL(0x340F0108), SH_UNT_EX_10 , + SH_ACS_SCOM2_OR ); //DUPS: 350F0108, +REG64( EX_11_CPPM_CPMMR , RULL(0x360F0106), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F0106, +REG64( EX_11_CPPM_CPMMR_CLEAR , RULL(0x360F0107), SH_UNT_EX_11 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 370F0107, +REG64( EX_11_CPPM_CPMMR_OR , RULL(0x360F0108), SH_UNT_EX_11 , + SH_ACS_SCOM2_OR ); //DUPS: 370F0108, + +REG64( C_CPPM_CSAR , RULL(0x200F0138), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_CPPM_CSAR_CLEAR , RULL(0x200F0139), SH_UNT_C , + SH_ACS_SCOM1_CLEAR ); +REG64( C_CPPM_CSAR_OR , RULL(0x200F013A), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_CPPM_CSAR , RULL(0x200F0138), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_CPPM_CSAR_CLEAR , RULL(0x200F0139), SH_UNT_C_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_0_CPPM_CSAR_OR , RULL(0x200F013A), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_CPPM_CSAR , RULL(0x210F0138), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_CPPM_CSAR_CLEAR , RULL(0x210F0139), SH_UNT_C_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_1_CPPM_CSAR_OR , RULL(0x210F013A), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_CPPM_CSAR , RULL(0x220F0138), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_CPPM_CSAR_CLEAR , RULL(0x220F0139), SH_UNT_C_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_2_CPPM_CSAR_OR , RULL(0x220F013A), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_CPPM_CSAR , RULL(0x230F0138), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_CPPM_CSAR_CLEAR , RULL(0x230F0139), SH_UNT_C_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_3_CPPM_CSAR_OR , RULL(0x230F013A), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_CPPM_CSAR , RULL(0x240F0138), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_CPPM_CSAR_CLEAR , RULL(0x240F0139), SH_UNT_C_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_4_CPPM_CSAR_OR , RULL(0x240F013A), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_CPPM_CSAR , RULL(0x250F0138), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_CPPM_CSAR_CLEAR , RULL(0x250F0139), SH_UNT_C_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_5_CPPM_CSAR_OR , RULL(0x250F013A), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_CPPM_CSAR , RULL(0x260F0138), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_CPPM_CSAR_CLEAR , RULL(0x260F0139), SH_UNT_C_6 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_6_CPPM_CSAR_OR , RULL(0x260F013A), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_CPPM_CSAR , RULL(0x270F0138), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_CPPM_CSAR_CLEAR , RULL(0x270F0139), SH_UNT_C_7 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_7_CPPM_CSAR_OR , RULL(0x270F013A), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_CPPM_CSAR , RULL(0x280F0138), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_CPPM_CSAR_CLEAR , RULL(0x280F0139), SH_UNT_C_8 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_8_CPPM_CSAR_OR , RULL(0x280F013A), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_CPPM_CSAR , RULL(0x290F0138), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_CPPM_CSAR_CLEAR , RULL(0x290F0139), SH_UNT_C_9 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_9_CPPM_CSAR_OR , RULL(0x290F013A), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_CPPM_CSAR , RULL(0x2A0F0138), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_CPPM_CSAR_CLEAR , RULL(0x2A0F0139), SH_UNT_C_10 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_10_CPPM_CSAR_OR , RULL(0x2A0F013A), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_CPPM_CSAR , RULL(0x2B0F0138), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_CPPM_CSAR_CLEAR , RULL(0x2B0F0139), SH_UNT_C_11 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_11_CPPM_CSAR_OR , RULL(0x2B0F013A), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_CPPM_CSAR , RULL(0x2C0F0138), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_CPPM_CSAR_CLEAR , RULL(0x2C0F0139), SH_UNT_C_12 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_12_CPPM_CSAR_OR , RULL(0x2C0F013A), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_CPPM_CSAR , RULL(0x2D0F0138), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_CPPM_CSAR_CLEAR , RULL(0x2D0F0139), SH_UNT_C_13 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_13_CPPM_CSAR_OR , RULL(0x2D0F013A), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_CPPM_CSAR , RULL(0x2E0F0138), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_CPPM_CSAR_CLEAR , RULL(0x2E0F0139), SH_UNT_C_14 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_14_CPPM_CSAR_OR , RULL(0x2E0F013A), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_CPPM_CSAR , RULL(0x2F0F0138), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_CPPM_CSAR_CLEAR , RULL(0x2F0F0139), SH_UNT_C_15 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_15_CPPM_CSAR_OR , RULL(0x2F0F013A), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_CPPM_CSAR , RULL(0x300F0138), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_CPPM_CSAR_CLEAR , RULL(0x300F0139), SH_UNT_C_16 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_16_CPPM_CSAR_OR , RULL(0x300F013A), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_CPPM_CSAR , RULL(0x310F0138), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_CPPM_CSAR_CLEAR , RULL(0x310F0139), SH_UNT_C_17 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_17_CPPM_CSAR_OR , RULL(0x310F013A), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_CPPM_CSAR , RULL(0x320F0138), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_CPPM_CSAR_CLEAR , RULL(0x320F0139), SH_UNT_C_18 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_18_CPPM_CSAR_OR , RULL(0x320F013A), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_CPPM_CSAR , RULL(0x330F0138), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_CPPM_CSAR_CLEAR , RULL(0x330F0139), SH_UNT_C_19 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_19_CPPM_CSAR_OR , RULL(0x330F013A), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_CPPM_CSAR , RULL(0x340F0138), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_CPPM_CSAR_CLEAR , RULL(0x340F0139), SH_UNT_C_20 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_20_CPPM_CSAR_OR , RULL(0x340F013A), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_CPPM_CSAR , RULL(0x350F0138), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_CPPM_CSAR_CLEAR , RULL(0x350F0139), SH_UNT_C_21 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_21_CPPM_CSAR_OR , RULL(0x350F013A), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_CPPM_CSAR , RULL(0x360F0138), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_CPPM_CSAR_CLEAR , RULL(0x360F0139), SH_UNT_C_22 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_22_CPPM_CSAR_OR , RULL(0x360F013A), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_CPPM_CSAR , RULL(0x370F0138), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_CPPM_CSAR_CLEAR , RULL(0x370F0139), SH_UNT_C_23 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_23_CPPM_CSAR_OR , RULL(0x370F013A), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EX_CPPM_CSAR , RULL(0x200F0138), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F0138, +REG64( EX_CPPM_CSAR_CLEAR , RULL(0x200F0139), SH_UNT_EX , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F0139, +REG64( EX_CPPM_CSAR_OR , RULL(0x200F013A), SH_UNT_EX , + SH_ACS_SCOM2_OR ); //DUPS: 210F013A, +REG64( EX_0_CPPM_CSAR , RULL(0x200F0138), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F0138, +REG64( EX_0_CPPM_CSAR_CLEAR , RULL(0x200F0139), SH_UNT_EX_0 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F0139, +REG64( EX_0_CPPM_CSAR_OR , RULL(0x200F013A), SH_UNT_EX_0 , + SH_ACS_SCOM2_OR ); //DUPS: 210F013A, +REG64( EX_1_CPPM_CSAR , RULL(0x230F0138), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F0138, +REG64( EX_1_CPPM_CSAR_CLEAR , RULL(0x230F0139), SH_UNT_EX_1 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 220F0139, +REG64( EX_1_CPPM_CSAR_OR , RULL(0x230F013A), SH_UNT_EX_1 , + SH_ACS_SCOM2_OR ); //DUPS: 220F013A, +REG64( EX_2_CPPM_CSAR , RULL(0x240F0138), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F0138, +REG64( EX_2_CPPM_CSAR_CLEAR , RULL(0x240F0139), SH_UNT_EX_2 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 250F0139, +REG64( EX_2_CPPM_CSAR_OR , RULL(0x240F013A), SH_UNT_EX_2 , + SH_ACS_SCOM2_OR ); //DUPS: 250F013A, +REG64( EX_3_CPPM_CSAR , RULL(0x260F0138), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F0138, +REG64( EX_3_CPPM_CSAR_CLEAR , RULL(0x260F0139), SH_UNT_EX_3 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 270F0139, +REG64( EX_3_CPPM_CSAR_OR , RULL(0x260F013A), SH_UNT_EX_3 , + SH_ACS_SCOM2_OR ); //DUPS: 270F013A, +REG64( EX_4_CPPM_CSAR , RULL(0x280F0138), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F0138, +REG64( EX_4_CPPM_CSAR_CLEAR , RULL(0x280F0139), SH_UNT_EX_4 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 290F0139, +REG64( EX_4_CPPM_CSAR_OR , RULL(0x280F013A), SH_UNT_EX_4 , + SH_ACS_SCOM2_OR ); //DUPS: 290F013A, +REG64( EX_5_CPPM_CSAR , RULL(0x2A0F0138), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F0138, +REG64( EX_5_CPPM_CSAR_CLEAR , RULL(0x2A0F0139), SH_UNT_EX_5 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2B0F0139, +REG64( EX_5_CPPM_CSAR_OR , RULL(0x2A0F013A), SH_UNT_EX_5 , + SH_ACS_SCOM2_OR ); //DUPS: 2B0F013A, +REG64( EX_6_CPPM_CSAR , RULL(0x2C0F0138), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F0138, +REG64( EX_6_CPPM_CSAR_CLEAR , RULL(0x2C0F0139), SH_UNT_EX_6 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2D0F0139, +REG64( EX_6_CPPM_CSAR_OR , RULL(0x2C0F013A), SH_UNT_EX_6 , + SH_ACS_SCOM2_OR ); //DUPS: 2D0F013A, +REG64( EX_7_CPPM_CSAR , RULL(0x2E0F0138), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F0138, +REG64( EX_7_CPPM_CSAR_CLEAR , RULL(0x2E0F0139), SH_UNT_EX_7 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2F0F0139, +REG64( EX_7_CPPM_CSAR_OR , RULL(0x2E0F013A), SH_UNT_EX_7 , + SH_ACS_SCOM2_OR ); //DUPS: 2F0F013A, +REG64( EX_8_CPPM_CSAR , RULL(0x300F0138), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F0138, +REG64( EX_8_CPPM_CSAR_CLEAR , RULL(0x300F0139), SH_UNT_EX_8 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 310F0139, +REG64( EX_8_CPPM_CSAR_OR , RULL(0x300F013A), SH_UNT_EX_8 , + SH_ACS_SCOM2_OR ); //DUPS: 310F013A, +REG64( EX_9_CPPM_CSAR , RULL(0x320F0138), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F0138, +REG64( EX_9_CPPM_CSAR_CLEAR , RULL(0x320F0139), SH_UNT_EX_9 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 330F0139, +REG64( EX_9_CPPM_CSAR_OR , RULL(0x320F013A), SH_UNT_EX_9 , + SH_ACS_SCOM2_OR ); //DUPS: 330F013A, +REG64( EX_10_CPPM_CSAR , RULL(0x340F0138), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F0138, +REG64( EX_10_CPPM_CSAR_CLEAR , RULL(0x340F0139), SH_UNT_EX_10 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 350F0139, +REG64( EX_10_CPPM_CSAR_OR , RULL(0x340F013A), SH_UNT_EX_10 , + SH_ACS_SCOM2_OR ); //DUPS: 350F013A, +REG64( EX_11_CPPM_CSAR , RULL(0x360F0138), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F0138, +REG64( EX_11_CPPM_CSAR_CLEAR , RULL(0x360F0139), SH_UNT_EX_11 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 370F0139, +REG64( EX_11_CPPM_CSAR_OR , RULL(0x360F013A), SH_UNT_EX_11 , + SH_ACS_SCOM2_OR ); //DUPS: 370F013A, + +REG64( C_CPPM_ERR , RULL(0x200F0121), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_CPPM_ERR , RULL(0x200F0121), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_CPPM_ERR , RULL(0x210F0121), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_CPPM_ERR , RULL(0x220F0121), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_CPPM_ERR , RULL(0x230F0121), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_CPPM_ERR , RULL(0x240F0121), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_CPPM_ERR , RULL(0x250F0121), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_CPPM_ERR , RULL(0x260F0121), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_CPPM_ERR , RULL(0x270F0121), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_CPPM_ERR , RULL(0x280F0121), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_CPPM_ERR , RULL(0x290F0121), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_CPPM_ERR , RULL(0x2A0F0121), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_CPPM_ERR , RULL(0x2B0F0121), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_CPPM_ERR , RULL(0x2C0F0121), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_CPPM_ERR , RULL(0x2D0F0121), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_CPPM_ERR , RULL(0x2E0F0121), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_CPPM_ERR , RULL(0x2F0F0121), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_CPPM_ERR , RULL(0x300F0121), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_CPPM_ERR , RULL(0x310F0121), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_CPPM_ERR , RULL(0x320F0121), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_CPPM_ERR , RULL(0x330F0121), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_CPPM_ERR , RULL(0x340F0121), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_CPPM_ERR , RULL(0x350F0121), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_CPPM_ERR , RULL(0x360F0121), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_CPPM_ERR , RULL(0x370F0121), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_CPPM_ERR , RULL(0x200F0121), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0121, +REG64( EX_0_CPPM_ERR , RULL(0x200F0121), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0121, +REG64( EX_1_CPPM_ERR , RULL(0x230F0121), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0121, +REG64( EX_2_CPPM_ERR , RULL(0x240F0121), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0121, +REG64( EX_3_CPPM_ERR , RULL(0x260F0121), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0121, +REG64( EX_4_CPPM_ERR , RULL(0x280F0121), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0121, +REG64( EX_5_CPPM_ERR , RULL(0x2A0F0121), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0121, +REG64( EX_6_CPPM_ERR , RULL(0x2C0F0121), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0121, +REG64( EX_7_CPPM_ERR , RULL(0x2E0F0121), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0121, +REG64( EX_8_CPPM_ERR , RULL(0x300F0121), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0121, +REG64( EX_9_CPPM_ERR , RULL(0x320F0121), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0121, +REG64( EX_10_CPPM_ERR , RULL(0x340F0121), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0121, +REG64( EX_11_CPPM_ERR , RULL(0x360F0121), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0121, + +REG64( C_CPPM_ERRMSK , RULL(0x200F0122), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_CPPM_ERRMSK , RULL(0x200F0122), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_CPPM_ERRMSK , RULL(0x210F0122), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_CPPM_ERRMSK , RULL(0x220F0122), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_CPPM_ERRMSK , RULL(0x230F0122), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_CPPM_ERRMSK , RULL(0x240F0122), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_CPPM_ERRMSK , RULL(0x250F0122), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_CPPM_ERRMSK , RULL(0x260F0122), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_CPPM_ERRMSK , RULL(0x270F0122), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_CPPM_ERRMSK , RULL(0x280F0122), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_CPPM_ERRMSK , RULL(0x290F0122), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_CPPM_ERRMSK , RULL(0x2A0F0122), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_CPPM_ERRMSK , RULL(0x2B0F0122), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_CPPM_ERRMSK , RULL(0x2C0F0122), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_CPPM_ERRMSK , RULL(0x2D0F0122), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_CPPM_ERRMSK , RULL(0x2E0F0122), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_CPPM_ERRMSK , RULL(0x2F0F0122), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_CPPM_ERRMSK , RULL(0x300F0122), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_CPPM_ERRMSK , RULL(0x310F0122), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_CPPM_ERRMSK , RULL(0x320F0122), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_CPPM_ERRMSK , RULL(0x330F0122), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_CPPM_ERRMSK , RULL(0x340F0122), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_CPPM_ERRMSK , RULL(0x350F0122), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_CPPM_ERRMSK , RULL(0x360F0122), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_CPPM_ERRMSK , RULL(0x370F0122), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_CPPM_ERRMSK , RULL(0x200F0122), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F0122, +REG64( EX_0_CPPM_ERRMSK , RULL(0x200F0122), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F0122, +REG64( EX_1_CPPM_ERRMSK , RULL(0x230F0122), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F0122, +REG64( EX_2_CPPM_ERRMSK , RULL(0x240F0122), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F0122, +REG64( EX_3_CPPM_ERRMSK , RULL(0x260F0122), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F0122, +REG64( EX_4_CPPM_ERRMSK , RULL(0x280F0122), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F0122, +REG64( EX_5_CPPM_ERRMSK , RULL(0x2A0F0122), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F0122, +REG64( EX_6_CPPM_ERRMSK , RULL(0x2C0F0122), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F0122, +REG64( EX_7_CPPM_ERRMSK , RULL(0x2E0F0122), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F0122, +REG64( EX_8_CPPM_ERRMSK , RULL(0x300F0122), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F0122, +REG64( EX_9_CPPM_ERRMSK , RULL(0x320F0122), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F0122, +REG64( EX_10_CPPM_ERRMSK , RULL(0x340F0122), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F0122, +REG64( EX_11_CPPM_ERRMSK , RULL(0x360F0122), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F0122, + +REG64( C_CPPM_IPPMCMD , RULL(0x200F01C0), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_CPPM_IPPMCMD , RULL(0x200F01C0), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_CPPM_IPPMCMD , RULL(0x210F01C0), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_CPPM_IPPMCMD , RULL(0x220F01C0), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_CPPM_IPPMCMD , RULL(0x230F01C0), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_CPPM_IPPMCMD , RULL(0x240F01C0), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_CPPM_IPPMCMD , RULL(0x250F01C0), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_CPPM_IPPMCMD , RULL(0x260F01C0), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_CPPM_IPPMCMD , RULL(0x270F01C0), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_CPPM_IPPMCMD , RULL(0x280F01C0), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_CPPM_IPPMCMD , RULL(0x290F01C0), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_CPPM_IPPMCMD , RULL(0x2A0F01C0), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_CPPM_IPPMCMD , RULL(0x2B0F01C0), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_CPPM_IPPMCMD , RULL(0x2C0F01C0), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_CPPM_IPPMCMD , RULL(0x2D0F01C0), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_CPPM_IPPMCMD , RULL(0x2E0F01C0), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_CPPM_IPPMCMD , RULL(0x2F0F01C0), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_CPPM_IPPMCMD , RULL(0x300F01C0), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_CPPM_IPPMCMD , RULL(0x310F01C0), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_CPPM_IPPMCMD , RULL(0x320F01C0), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_CPPM_IPPMCMD , RULL(0x330F01C0), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_CPPM_IPPMCMD , RULL(0x340F01C0), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_CPPM_IPPMCMD , RULL(0x350F01C0), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_CPPM_IPPMCMD , RULL(0x360F01C0), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_CPPM_IPPMCMD , RULL(0x370F01C0), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_CPPM_IPPMCMD , RULL(0x200F01C0), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F01C0, +REG64( EX_0_CPPM_IPPMCMD , RULL(0x200F01C0), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F01C0, +REG64( EX_1_CPPM_IPPMCMD , RULL(0x230F01C0), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F01C0, +REG64( EX_2_CPPM_IPPMCMD , RULL(0x240F01C0), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F01C0, +REG64( EX_3_CPPM_IPPMCMD , RULL(0x260F01C0), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F01C0, +REG64( EX_4_CPPM_IPPMCMD , RULL(0x280F01C0), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F01C0, +REG64( EX_5_CPPM_IPPMCMD , RULL(0x2A0F01C0), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F01C0, +REG64( EX_6_CPPM_IPPMCMD , RULL(0x2C0F01C0), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F01C0, +REG64( EX_7_CPPM_IPPMCMD , RULL(0x2E0F01C0), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F01C0, +REG64( EX_8_CPPM_IPPMCMD , RULL(0x300F01C0), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F01C0, +REG64( EX_9_CPPM_IPPMCMD , RULL(0x320F01C0), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F01C0, +REG64( EX_10_CPPM_IPPMCMD , RULL(0x340F01C0), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F01C0, +REG64( EX_11_CPPM_IPPMCMD , RULL(0x360F01C0), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F01C0, + +REG64( C_CPPM_IPPMRDATA , RULL(0x200F01C3), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_CPPM_IPPMRDATA , RULL(0x200F01C3), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_CPPM_IPPMRDATA , RULL(0x210F01C3), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_CPPM_IPPMRDATA , RULL(0x220F01C3), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_CPPM_IPPMRDATA , RULL(0x230F01C3), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_CPPM_IPPMRDATA , RULL(0x240F01C3), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_CPPM_IPPMRDATA , RULL(0x250F01C3), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_CPPM_IPPMRDATA , RULL(0x260F01C3), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_CPPM_IPPMRDATA , RULL(0x270F01C3), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_CPPM_IPPMRDATA , RULL(0x280F01C3), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_CPPM_IPPMRDATA , RULL(0x290F01C3), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_CPPM_IPPMRDATA , RULL(0x2A0F01C3), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_CPPM_IPPMRDATA , RULL(0x2B0F01C3), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_CPPM_IPPMRDATA , RULL(0x2C0F01C3), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_CPPM_IPPMRDATA , RULL(0x2D0F01C3), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_CPPM_IPPMRDATA , RULL(0x2E0F01C3), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_CPPM_IPPMRDATA , RULL(0x2F0F01C3), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_CPPM_IPPMRDATA , RULL(0x300F01C3), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_CPPM_IPPMRDATA , RULL(0x310F01C3), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_CPPM_IPPMRDATA , RULL(0x320F01C3), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_CPPM_IPPMRDATA , RULL(0x330F01C3), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_CPPM_IPPMRDATA , RULL(0x340F01C3), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_CPPM_IPPMRDATA , RULL(0x350F01C3), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_CPPM_IPPMRDATA , RULL(0x360F01C3), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_CPPM_IPPMRDATA , RULL(0x370F01C3), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_CPPM_IPPMRDATA , RULL(0x200F01C3), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F01C3, +REG64( EX_0_CPPM_IPPMRDATA , RULL(0x200F01C3), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F01C3, +REG64( EX_1_CPPM_IPPMRDATA , RULL(0x230F01C3), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F01C3, +REG64( EX_2_CPPM_IPPMRDATA , RULL(0x240F01C3), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F01C3, +REG64( EX_3_CPPM_IPPMRDATA , RULL(0x260F01C3), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F01C3, +REG64( EX_4_CPPM_IPPMRDATA , RULL(0x280F01C3), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F01C3, +REG64( EX_5_CPPM_IPPMRDATA , RULL(0x2A0F01C3), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F01C3, +REG64( EX_6_CPPM_IPPMRDATA , RULL(0x2C0F01C3), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F01C3, +REG64( EX_7_CPPM_IPPMRDATA , RULL(0x2E0F01C3), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F01C3, +REG64( EX_8_CPPM_IPPMRDATA , RULL(0x300F01C3), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F01C3, +REG64( EX_9_CPPM_IPPMRDATA , RULL(0x320F01C3), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F01C3, +REG64( EX_10_CPPM_IPPMRDATA , RULL(0x340F01C3), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F01C3, +REG64( EX_11_CPPM_IPPMRDATA , RULL(0x360F01C3), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F01C3, + +REG64( C_CPPM_IPPMSTAT , RULL(0x200F01C1), SH_UNT_C , SH_ACS_SCOM_RO ); +REG64( C_0_CPPM_IPPMSTAT , RULL(0x200F01C1), SH_UNT_C_0 , SH_ACS_SCOM_RO ); +REG64( C_1_CPPM_IPPMSTAT , RULL(0x210F01C1), SH_UNT_C_1 , SH_ACS_SCOM_RO ); +REG64( C_2_CPPM_IPPMSTAT , RULL(0x220F01C1), SH_UNT_C_2 , SH_ACS_SCOM_RO ); +REG64( C_3_CPPM_IPPMSTAT , RULL(0x230F01C1), SH_UNT_C_3 , SH_ACS_SCOM_RO ); +REG64( C_4_CPPM_IPPMSTAT , RULL(0x240F01C1), SH_UNT_C_4 , SH_ACS_SCOM_RO ); +REG64( C_5_CPPM_IPPMSTAT , RULL(0x250F01C1), SH_UNT_C_5 , SH_ACS_SCOM_RO ); +REG64( C_6_CPPM_IPPMSTAT , RULL(0x260F01C1), SH_UNT_C_6 , SH_ACS_SCOM_RO ); +REG64( C_7_CPPM_IPPMSTAT , RULL(0x270F01C1), SH_UNT_C_7 , SH_ACS_SCOM_RO ); +REG64( C_8_CPPM_IPPMSTAT , RULL(0x280F01C1), SH_UNT_C_8 , SH_ACS_SCOM_RO ); +REG64( C_9_CPPM_IPPMSTAT , RULL(0x290F01C1), SH_UNT_C_9 , SH_ACS_SCOM_RO ); +REG64( C_10_CPPM_IPPMSTAT , RULL(0x2A0F01C1), SH_UNT_C_10 , SH_ACS_SCOM_RO ); +REG64( C_11_CPPM_IPPMSTAT , RULL(0x2B0F01C1), SH_UNT_C_11 , SH_ACS_SCOM_RO ); +REG64( C_12_CPPM_IPPMSTAT , RULL(0x2C0F01C1), SH_UNT_C_12 , SH_ACS_SCOM_RO ); +REG64( C_13_CPPM_IPPMSTAT , RULL(0x2D0F01C1), SH_UNT_C_13 , SH_ACS_SCOM_RO ); +REG64( C_14_CPPM_IPPMSTAT , RULL(0x2E0F01C1), SH_UNT_C_14 , SH_ACS_SCOM_RO ); +REG64( C_15_CPPM_IPPMSTAT , RULL(0x2F0F01C1), SH_UNT_C_15 , SH_ACS_SCOM_RO ); +REG64( C_16_CPPM_IPPMSTAT , RULL(0x300F01C1), SH_UNT_C_16 , SH_ACS_SCOM_RO ); +REG64( C_17_CPPM_IPPMSTAT , RULL(0x310F01C1), SH_UNT_C_17 , SH_ACS_SCOM_RO ); +REG64( C_18_CPPM_IPPMSTAT , RULL(0x320F01C1), SH_UNT_C_18 , SH_ACS_SCOM_RO ); +REG64( C_19_CPPM_IPPMSTAT , RULL(0x330F01C1), SH_UNT_C_19 , SH_ACS_SCOM_RO ); +REG64( C_20_CPPM_IPPMSTAT , RULL(0x340F01C1), SH_UNT_C_20 , SH_ACS_SCOM_RO ); +REG64( C_21_CPPM_IPPMSTAT , RULL(0x350F01C1), SH_UNT_C_21 , SH_ACS_SCOM_RO ); +REG64( C_22_CPPM_IPPMSTAT , RULL(0x360F01C1), SH_UNT_C_22 , SH_ACS_SCOM_RO ); +REG64( C_23_CPPM_IPPMSTAT , RULL(0x370F01C1), SH_UNT_C_23 , SH_ACS_SCOM_RO ); +REG64( EX_CPPM_IPPMSTAT , RULL(0x200F01C1), SH_UNT_EX , + SH_ACS_SCOM_RO ); //DUPS: 210F01C1, +REG64( EX_0_CPPM_IPPMSTAT , RULL(0x200F01C1), SH_UNT_EX_0 , + SH_ACS_SCOM_RO ); //DUPS: 210F01C1, +REG64( EX_1_CPPM_IPPMSTAT , RULL(0x230F01C1), SH_UNT_EX_1 , + SH_ACS_SCOM_RO ); //DUPS: 220F01C1, +REG64( EX_2_CPPM_IPPMSTAT , RULL(0x240F01C1), SH_UNT_EX_2 , + SH_ACS_SCOM_RO ); //DUPS: 250F01C1, +REG64( EX_3_CPPM_IPPMSTAT , RULL(0x260F01C1), SH_UNT_EX_3 , + SH_ACS_SCOM_RO ); //DUPS: 270F01C1, +REG64( EX_4_CPPM_IPPMSTAT , RULL(0x280F01C1), SH_UNT_EX_4 , + SH_ACS_SCOM_RO ); //DUPS: 290F01C1, +REG64( EX_5_CPPM_IPPMSTAT , RULL(0x2A0F01C1), SH_UNT_EX_5 , + SH_ACS_SCOM_RO ); //DUPS: 2B0F01C1, +REG64( EX_6_CPPM_IPPMSTAT , RULL(0x2C0F01C1), SH_UNT_EX_6 , + SH_ACS_SCOM_RO ); //DUPS: 2D0F01C1, +REG64( EX_7_CPPM_IPPMSTAT , RULL(0x2E0F01C1), SH_UNT_EX_7 , + SH_ACS_SCOM_RO ); //DUPS: 2F0F01C1, +REG64( EX_8_CPPM_IPPMSTAT , RULL(0x300F01C1), SH_UNT_EX_8 , + SH_ACS_SCOM_RO ); //DUPS: 310F01C1, +REG64( EX_9_CPPM_IPPMSTAT , RULL(0x320F01C1), SH_UNT_EX_9 , + SH_ACS_SCOM_RO ); //DUPS: 330F01C1, +REG64( EX_10_CPPM_IPPMSTAT , RULL(0x340F01C1), SH_UNT_EX_10 , + SH_ACS_SCOM_RO ); //DUPS: 350F01C1, +REG64( EX_11_CPPM_IPPMSTAT , RULL(0x360F01C1), SH_UNT_EX_11 , + SH_ACS_SCOM_RO ); //DUPS: 370F01C1, + +REG64( C_CPPM_IPPMWDATA , RULL(0x200F01C2), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_CPPM_IPPMWDATA , RULL(0x200F01C2), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_CPPM_IPPMWDATA , RULL(0x210F01C2), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_CPPM_IPPMWDATA , RULL(0x220F01C2), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_CPPM_IPPMWDATA , RULL(0x230F01C2), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_CPPM_IPPMWDATA , RULL(0x240F01C2), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_CPPM_IPPMWDATA , RULL(0x250F01C2), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_CPPM_IPPMWDATA , RULL(0x260F01C2), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_CPPM_IPPMWDATA , RULL(0x270F01C2), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_CPPM_IPPMWDATA , RULL(0x280F01C2), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_CPPM_IPPMWDATA , RULL(0x290F01C2), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_CPPM_IPPMWDATA , RULL(0x2A0F01C2), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_CPPM_IPPMWDATA , RULL(0x2B0F01C2), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_CPPM_IPPMWDATA , RULL(0x2C0F01C2), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_CPPM_IPPMWDATA , RULL(0x2D0F01C2), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_CPPM_IPPMWDATA , RULL(0x2E0F01C2), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_CPPM_IPPMWDATA , RULL(0x2F0F01C2), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_CPPM_IPPMWDATA , RULL(0x300F01C2), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_CPPM_IPPMWDATA , RULL(0x310F01C2), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_CPPM_IPPMWDATA , RULL(0x320F01C2), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_CPPM_IPPMWDATA , RULL(0x330F01C2), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_CPPM_IPPMWDATA , RULL(0x340F01C2), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_CPPM_IPPMWDATA , RULL(0x350F01C2), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_CPPM_IPPMWDATA , RULL(0x360F01C2), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_CPPM_IPPMWDATA , RULL(0x370F01C2), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_CPPM_IPPMWDATA , RULL(0x200F01C2), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F01C2, +REG64( EX_0_CPPM_IPPMWDATA , RULL(0x200F01C2), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F01C2, +REG64( EX_1_CPPM_IPPMWDATA , RULL(0x230F01C2), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F01C2, +REG64( EX_2_CPPM_IPPMWDATA , RULL(0x240F01C2), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F01C2, +REG64( EX_3_CPPM_IPPMWDATA , RULL(0x260F01C2), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F01C2, +REG64( EX_4_CPPM_IPPMWDATA , RULL(0x280F01C2), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F01C2, +REG64( EX_5_CPPM_IPPMWDATA , RULL(0x2A0F01C2), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F01C2, +REG64( EX_6_CPPM_IPPMWDATA , RULL(0x2C0F01C2), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F01C2, +REG64( EX_7_CPPM_IPPMWDATA , RULL(0x2E0F01C2), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F01C2, +REG64( EX_8_CPPM_IPPMWDATA , RULL(0x300F01C2), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F01C2, +REG64( EX_9_CPPM_IPPMWDATA , RULL(0x320F01C2), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F01C2, +REG64( EX_10_CPPM_IPPMWDATA , RULL(0x340F01C2), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F01C2, +REG64( EX_11_CPPM_IPPMWDATA , RULL(0x360F01C2), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F01C2, + +REG64( C_CPPM_NC0INDIR_SCOM , RULL(0x200F0130), SH_UNT_C , SH_ACS_SCOM_RO ); +REG64( C_CPPM_NC0INDIR_SCOM1 , RULL(0x200F0131), SH_UNT_C , SH_ACS_SCOM1_NC ); +REG64( C_CPPM_NC0INDIR_SCOM2 , RULL(0x200F0132), SH_UNT_C , SH_ACS_SCOM2_NC ); +REG64( C_0_CPPM_NC0INDIR_SCOM , RULL(0x200F0130), SH_UNT_C_0 , SH_ACS_SCOM_RO ); +REG64( C_0_CPPM_NC0INDIR_SCOM1 , RULL(0x200F0131), SH_UNT_C_0 , SH_ACS_SCOM1_NC ); +REG64( C_0_CPPM_NC0INDIR_SCOM2 , RULL(0x200F0132), SH_UNT_C_0 , SH_ACS_SCOM2_NC ); +REG64( C_1_CPPM_NC0INDIR_SCOM , RULL(0x210F0130), SH_UNT_C_1 , SH_ACS_SCOM_RO ); +REG64( C_1_CPPM_NC0INDIR_SCOM1 , RULL(0x210F0131), SH_UNT_C_1 , SH_ACS_SCOM1_NC ); +REG64( C_1_CPPM_NC0INDIR_SCOM2 , RULL(0x210F0132), SH_UNT_C_1 , SH_ACS_SCOM2_NC ); +REG64( C_2_CPPM_NC0INDIR_SCOM , RULL(0x220F0130), SH_UNT_C_2 , SH_ACS_SCOM_RO ); +REG64( C_2_CPPM_NC0INDIR_SCOM1 , RULL(0x220F0131), SH_UNT_C_2 , SH_ACS_SCOM1_NC ); +REG64( C_2_CPPM_NC0INDIR_SCOM2 , RULL(0x220F0132), SH_UNT_C_2 , SH_ACS_SCOM2_NC ); +REG64( C_3_CPPM_NC0INDIR_SCOM , RULL(0x230F0130), SH_UNT_C_3 , SH_ACS_SCOM_RO ); +REG64( C_3_CPPM_NC0INDIR_SCOM1 , RULL(0x230F0131), SH_UNT_C_3 , SH_ACS_SCOM1_NC ); +REG64( C_3_CPPM_NC0INDIR_SCOM2 , RULL(0x230F0132), SH_UNT_C_3 , SH_ACS_SCOM2_NC ); +REG64( C_4_CPPM_NC0INDIR_SCOM , RULL(0x240F0130), SH_UNT_C_4 , SH_ACS_SCOM_RO ); +REG64( C_4_CPPM_NC0INDIR_SCOM1 , RULL(0x240F0131), SH_UNT_C_4 , SH_ACS_SCOM1_NC ); +REG64( C_4_CPPM_NC0INDIR_SCOM2 , RULL(0x240F0132), SH_UNT_C_4 , SH_ACS_SCOM2_NC ); +REG64( C_5_CPPM_NC0INDIR_SCOM , RULL(0x250F0130), SH_UNT_C_5 , SH_ACS_SCOM_RO ); +REG64( C_5_CPPM_NC0INDIR_SCOM1 , RULL(0x250F0131), SH_UNT_C_5 , SH_ACS_SCOM1_NC ); +REG64( C_5_CPPM_NC0INDIR_SCOM2 , RULL(0x250F0132), SH_UNT_C_5 , SH_ACS_SCOM2_NC ); +REG64( C_6_CPPM_NC0INDIR_SCOM , RULL(0x260F0130), SH_UNT_C_6 , SH_ACS_SCOM_RO ); +REG64( C_6_CPPM_NC0INDIR_SCOM1 , RULL(0x260F0131), SH_UNT_C_6 , SH_ACS_SCOM1_NC ); +REG64( C_6_CPPM_NC0INDIR_SCOM2 , RULL(0x260F0132), SH_UNT_C_6 , SH_ACS_SCOM2_NC ); +REG64( C_7_CPPM_NC0INDIR_SCOM , RULL(0x270F0130), SH_UNT_C_7 , SH_ACS_SCOM_RO ); +REG64( C_7_CPPM_NC0INDIR_SCOM1 , RULL(0x270F0131), SH_UNT_C_7 , SH_ACS_SCOM1_NC ); +REG64( C_7_CPPM_NC0INDIR_SCOM2 , RULL(0x270F0132), SH_UNT_C_7 , SH_ACS_SCOM2_NC ); +REG64( C_8_CPPM_NC0INDIR_SCOM , RULL(0x280F0130), SH_UNT_C_8 , SH_ACS_SCOM_RO ); +REG64( C_8_CPPM_NC0INDIR_SCOM1 , RULL(0x280F0131), SH_UNT_C_8 , SH_ACS_SCOM1_NC ); +REG64( C_8_CPPM_NC0INDIR_SCOM2 , RULL(0x280F0132), SH_UNT_C_8 , SH_ACS_SCOM2_NC ); +REG64( C_9_CPPM_NC0INDIR_SCOM , RULL(0x290F0130), SH_UNT_C_9 , SH_ACS_SCOM_RO ); +REG64( C_9_CPPM_NC0INDIR_SCOM1 , RULL(0x290F0131), SH_UNT_C_9 , SH_ACS_SCOM1_NC ); +REG64( C_9_CPPM_NC0INDIR_SCOM2 , RULL(0x290F0132), SH_UNT_C_9 , SH_ACS_SCOM2_NC ); +REG64( C_10_CPPM_NC0INDIR_SCOM , RULL(0x2A0F0130), SH_UNT_C_10 , SH_ACS_SCOM_RO ); +REG64( C_10_CPPM_NC0INDIR_SCOM1 , RULL(0x2A0F0131), SH_UNT_C_10 , SH_ACS_SCOM1_NC ); +REG64( C_10_CPPM_NC0INDIR_SCOM2 , RULL(0x2A0F0132), SH_UNT_C_10 , SH_ACS_SCOM2_NC ); +REG64( C_11_CPPM_NC0INDIR_SCOM , RULL(0x2B0F0130), SH_UNT_C_11 , SH_ACS_SCOM_RO ); +REG64( C_11_CPPM_NC0INDIR_SCOM1 , RULL(0x2B0F0131), SH_UNT_C_11 , SH_ACS_SCOM1_NC ); +REG64( C_11_CPPM_NC0INDIR_SCOM2 , RULL(0x2B0F0132), SH_UNT_C_11 , SH_ACS_SCOM2_NC ); +REG64( C_12_CPPM_NC0INDIR_SCOM , RULL(0x2C0F0130), SH_UNT_C_12 , SH_ACS_SCOM_RO ); +REG64( C_12_CPPM_NC0INDIR_SCOM1 , RULL(0x2C0F0131), SH_UNT_C_12 , SH_ACS_SCOM1_NC ); +REG64( C_12_CPPM_NC0INDIR_SCOM2 , RULL(0x2C0F0132), SH_UNT_C_12 , SH_ACS_SCOM2_NC ); +REG64( C_13_CPPM_NC0INDIR_SCOM , RULL(0x2D0F0130), SH_UNT_C_13 , SH_ACS_SCOM_RO ); +REG64( C_13_CPPM_NC0INDIR_SCOM1 , RULL(0x2D0F0131), SH_UNT_C_13 , SH_ACS_SCOM1_NC ); +REG64( C_13_CPPM_NC0INDIR_SCOM2 , RULL(0x2D0F0132), SH_UNT_C_13 , SH_ACS_SCOM2_NC ); +REG64( C_14_CPPM_NC0INDIR_SCOM , RULL(0x2E0F0130), SH_UNT_C_14 , SH_ACS_SCOM_RO ); +REG64( C_14_CPPM_NC0INDIR_SCOM1 , RULL(0x2E0F0131), SH_UNT_C_14 , SH_ACS_SCOM1_NC ); +REG64( C_14_CPPM_NC0INDIR_SCOM2 , RULL(0x2E0F0132), SH_UNT_C_14 , SH_ACS_SCOM2_NC ); +REG64( C_15_CPPM_NC0INDIR_SCOM , RULL(0x2F0F0130), SH_UNT_C_15 , SH_ACS_SCOM_RO ); +REG64( C_15_CPPM_NC0INDIR_SCOM1 , RULL(0x2F0F0131), SH_UNT_C_15 , SH_ACS_SCOM1_NC ); +REG64( C_15_CPPM_NC0INDIR_SCOM2 , RULL(0x2F0F0132), SH_UNT_C_15 , SH_ACS_SCOM2_NC ); +REG64( C_16_CPPM_NC0INDIR_SCOM , RULL(0x300F0130), SH_UNT_C_16 , SH_ACS_SCOM_RO ); +REG64( C_16_CPPM_NC0INDIR_SCOM1 , RULL(0x300F0131), SH_UNT_C_16 , SH_ACS_SCOM1_NC ); +REG64( C_16_CPPM_NC0INDIR_SCOM2 , RULL(0x300F0132), SH_UNT_C_16 , SH_ACS_SCOM2_NC ); +REG64( C_17_CPPM_NC0INDIR_SCOM , RULL(0x310F0130), SH_UNT_C_17 , SH_ACS_SCOM_RO ); +REG64( C_17_CPPM_NC0INDIR_SCOM1 , RULL(0x310F0131), SH_UNT_C_17 , SH_ACS_SCOM1_NC ); +REG64( C_17_CPPM_NC0INDIR_SCOM2 , RULL(0x310F0132), SH_UNT_C_17 , SH_ACS_SCOM2_NC ); +REG64( C_18_CPPM_NC0INDIR_SCOM , RULL(0x320F0130), SH_UNT_C_18 , SH_ACS_SCOM_RO ); +REG64( C_18_CPPM_NC0INDIR_SCOM1 , RULL(0x320F0131), SH_UNT_C_18 , SH_ACS_SCOM1_NC ); +REG64( C_18_CPPM_NC0INDIR_SCOM2 , RULL(0x320F0132), SH_UNT_C_18 , SH_ACS_SCOM2_NC ); +REG64( C_19_CPPM_NC0INDIR_SCOM , RULL(0x330F0130), SH_UNT_C_19 , SH_ACS_SCOM_RO ); +REG64( C_19_CPPM_NC0INDIR_SCOM1 , RULL(0x330F0131), SH_UNT_C_19 , SH_ACS_SCOM1_NC ); +REG64( C_19_CPPM_NC0INDIR_SCOM2 , RULL(0x330F0132), SH_UNT_C_19 , SH_ACS_SCOM2_NC ); +REG64( C_20_CPPM_NC0INDIR_SCOM , RULL(0x340F0130), SH_UNT_C_20 , SH_ACS_SCOM_RO ); +REG64( C_20_CPPM_NC0INDIR_SCOM1 , RULL(0x340F0131), SH_UNT_C_20 , SH_ACS_SCOM1_NC ); +REG64( C_20_CPPM_NC0INDIR_SCOM2 , RULL(0x340F0132), SH_UNT_C_20 , SH_ACS_SCOM2_NC ); +REG64( C_21_CPPM_NC0INDIR_SCOM , RULL(0x350F0130), SH_UNT_C_21 , SH_ACS_SCOM_RO ); +REG64( C_21_CPPM_NC0INDIR_SCOM1 , RULL(0x350F0131), SH_UNT_C_21 , SH_ACS_SCOM1_NC ); +REG64( C_21_CPPM_NC0INDIR_SCOM2 , RULL(0x350F0132), SH_UNT_C_21 , SH_ACS_SCOM2_NC ); +REG64( C_22_CPPM_NC0INDIR_SCOM , RULL(0x360F0130), SH_UNT_C_22 , SH_ACS_SCOM_RO ); +REG64( C_22_CPPM_NC0INDIR_SCOM1 , RULL(0x360F0131), SH_UNT_C_22 , SH_ACS_SCOM1_NC ); +REG64( C_22_CPPM_NC0INDIR_SCOM2 , RULL(0x360F0132), SH_UNT_C_22 , SH_ACS_SCOM2_NC ); +REG64( C_23_CPPM_NC0INDIR_SCOM , RULL(0x370F0130), SH_UNT_C_23 , SH_ACS_SCOM_RO ); +REG64( C_23_CPPM_NC0INDIR_SCOM1 , RULL(0x370F0131), SH_UNT_C_23 , SH_ACS_SCOM1_NC ); +REG64( C_23_CPPM_NC0INDIR_SCOM2 , RULL(0x370F0132), SH_UNT_C_23 , SH_ACS_SCOM2_NC ); +REG64( EX_CPPM_NC0INDIR_SCOM , RULL(0x200F0130), SH_UNT_EX , + SH_ACS_SCOM_RO ); //DUPS: 210F0130, +REG64( EX_CPPM_NC0INDIR_SCOM1 , RULL(0x200F0131), SH_UNT_EX , + SH_ACS_SCOM1_NC ); //DUPS: 210F0131, +REG64( EX_CPPM_NC0INDIR_SCOM2 , RULL(0x200F0132), SH_UNT_EX , + SH_ACS_SCOM2_NC ); //DUPS: 210F0132, +REG64( EX_0_CPPM_NC0INDIR_SCOM , RULL(0x200F0130), SH_UNT_EX_0 , + SH_ACS_SCOM_RO ); //DUPS: 210F0130, +REG64( EX_0_CPPM_NC0INDIR_SCOM1 , RULL(0x200F0131), SH_UNT_EX_0 , + SH_ACS_SCOM1_NC ); //DUPS: 210F0131, +REG64( EX_0_CPPM_NC0INDIR_SCOM2 , RULL(0x200F0132), SH_UNT_EX_0 , + SH_ACS_SCOM2_NC ); //DUPS: 210F0132, +REG64( EX_1_CPPM_NC0INDIR_SCOM , RULL(0x230F0130), SH_UNT_EX_1 , + SH_ACS_SCOM_RO ); //DUPS: 220F0130, +REG64( EX_1_CPPM_NC0INDIR_SCOM1 , RULL(0x230F0131), SH_UNT_EX_1 , + SH_ACS_SCOM1_NC ); //DUPS: 220F0131, +REG64( EX_1_CPPM_NC0INDIR_SCOM2 , RULL(0x230F0132), SH_UNT_EX_1 , + SH_ACS_SCOM2_NC ); //DUPS: 220F0132, +REG64( EX_2_CPPM_NC0INDIR_SCOM , RULL(0x240F0130), SH_UNT_EX_2 , + SH_ACS_SCOM_RO ); //DUPS: 250F0130, +REG64( EX_2_CPPM_NC0INDIR_SCOM1 , RULL(0x240F0131), SH_UNT_EX_2 , + SH_ACS_SCOM1_NC ); //DUPS: 250F0131, +REG64( EX_2_CPPM_NC0INDIR_SCOM2 , RULL(0x240F0132), SH_UNT_EX_2 , + SH_ACS_SCOM2_NC ); //DUPS: 250F0132, +REG64( EX_3_CPPM_NC0INDIR_SCOM , RULL(0x260F0130), SH_UNT_EX_3 , + SH_ACS_SCOM_RO ); //DUPS: 270F0130, +REG64( EX_3_CPPM_NC0INDIR_SCOM1 , RULL(0x260F0131), SH_UNT_EX_3 , + SH_ACS_SCOM1_NC ); //DUPS: 270F0131, +REG64( EX_3_CPPM_NC0INDIR_SCOM2 , RULL(0x260F0132), SH_UNT_EX_3 , + SH_ACS_SCOM2_NC ); //DUPS: 270F0132, +REG64( EX_4_CPPM_NC0INDIR_SCOM , RULL(0x280F0130), SH_UNT_EX_4 , + SH_ACS_SCOM_RO ); //DUPS: 290F0130, +REG64( EX_4_CPPM_NC0INDIR_SCOM1 , RULL(0x280F0131), SH_UNT_EX_4 , + SH_ACS_SCOM1_NC ); //DUPS: 290F0131, +REG64( EX_4_CPPM_NC0INDIR_SCOM2 , RULL(0x280F0132), SH_UNT_EX_4 , + SH_ACS_SCOM2_NC ); //DUPS: 290F0132, +REG64( EX_5_CPPM_NC0INDIR_SCOM , RULL(0x2A0F0130), SH_UNT_EX_5 , + SH_ACS_SCOM_RO ); //DUPS: 2B0F0130, +REG64( EX_5_CPPM_NC0INDIR_SCOM1 , RULL(0x2A0F0131), SH_UNT_EX_5 , + SH_ACS_SCOM1_NC ); //DUPS: 2B0F0131, +REG64( EX_5_CPPM_NC0INDIR_SCOM2 , RULL(0x2A0F0132), SH_UNT_EX_5 , + SH_ACS_SCOM2_NC ); //DUPS: 2B0F0132, +REG64( EX_6_CPPM_NC0INDIR_SCOM , RULL(0x2C0F0130), SH_UNT_EX_6 , + SH_ACS_SCOM_RO ); //DUPS: 2D0F0130, +REG64( EX_6_CPPM_NC0INDIR_SCOM1 , RULL(0x2C0F0131), SH_UNT_EX_6 , + SH_ACS_SCOM1_NC ); //DUPS: 2D0F0131, +REG64( EX_6_CPPM_NC0INDIR_SCOM2 , RULL(0x2C0F0132), SH_UNT_EX_6 , + SH_ACS_SCOM2_NC ); //DUPS: 2D0F0132, +REG64( EX_7_CPPM_NC0INDIR_SCOM , RULL(0x2E0F0130), SH_UNT_EX_7 , + SH_ACS_SCOM_RO ); //DUPS: 2F0F0130, +REG64( EX_7_CPPM_NC0INDIR_SCOM1 , RULL(0x2E0F0131), SH_UNT_EX_7 , + SH_ACS_SCOM1_NC ); //DUPS: 2F0F0131, +REG64( EX_7_CPPM_NC0INDIR_SCOM2 , RULL(0x2E0F0132), SH_UNT_EX_7 , + SH_ACS_SCOM2_NC ); //DUPS: 2F0F0132, +REG64( EX_8_CPPM_NC0INDIR_SCOM , RULL(0x300F0130), SH_UNT_EX_8 , + SH_ACS_SCOM_RO ); //DUPS: 310F0130, +REG64( EX_8_CPPM_NC0INDIR_SCOM1 , RULL(0x300F0131), SH_UNT_EX_8 , + SH_ACS_SCOM1_NC ); //DUPS: 310F0131, +REG64( EX_8_CPPM_NC0INDIR_SCOM2 , RULL(0x300F0132), SH_UNT_EX_8 , + SH_ACS_SCOM2_NC ); //DUPS: 310F0132, +REG64( EX_9_CPPM_NC0INDIR_SCOM , RULL(0x320F0130), SH_UNT_EX_9 , + SH_ACS_SCOM_RO ); //DUPS: 330F0130, +REG64( EX_9_CPPM_NC0INDIR_SCOM1 , RULL(0x320F0131), SH_UNT_EX_9 , + SH_ACS_SCOM1_NC ); //DUPS: 330F0131, +REG64( EX_9_CPPM_NC0INDIR_SCOM2 , RULL(0x320F0132), SH_UNT_EX_9 , + SH_ACS_SCOM2_NC ); //DUPS: 330F0132, +REG64( EX_10_CPPM_NC0INDIR_SCOM , RULL(0x340F0130), SH_UNT_EX_10 , + SH_ACS_SCOM_RO ); //DUPS: 350F0130, +REG64( EX_10_CPPM_NC0INDIR_SCOM1 , RULL(0x340F0131), SH_UNT_EX_10 , + SH_ACS_SCOM1_NC ); //DUPS: 350F0131, +REG64( EX_10_CPPM_NC0INDIR_SCOM2 , RULL(0x340F0132), SH_UNT_EX_10 , + SH_ACS_SCOM2_NC ); //DUPS: 350F0132, +REG64( EX_11_CPPM_NC0INDIR_SCOM , RULL(0x360F0130), SH_UNT_EX_11 , + SH_ACS_SCOM_RO ); //DUPS: 370F0130, +REG64( EX_11_CPPM_NC0INDIR_SCOM1 , RULL(0x360F0131), SH_UNT_EX_11 , + SH_ACS_SCOM1_NC ); //DUPS: 370F0131, +REG64( EX_11_CPPM_NC0INDIR_SCOM2 , RULL(0x360F0132), SH_UNT_EX_11 , + SH_ACS_SCOM2_NC ); //DUPS: 370F0132, + +REG64( C_CPPM_NC1INDIR_SCOM , RULL(0x200F0133), SH_UNT_C , SH_ACS_SCOM_RO ); +REG64( C_CPPM_NC1INDIR_SCOM1 , RULL(0x200F0134), SH_UNT_C , SH_ACS_SCOM1_NC ); +REG64( C_CPPM_NC1INDIR_SCOM2 , RULL(0x200F0135), SH_UNT_C , SH_ACS_SCOM2_NC ); +REG64( C_0_CPPM_NC1INDIR_SCOM , RULL(0x200F0133), SH_UNT_C_0 , SH_ACS_SCOM_RO ); +REG64( C_0_CPPM_NC1INDIR_SCOM1 , RULL(0x200F0134), SH_UNT_C_0 , SH_ACS_SCOM1_NC ); +REG64( C_0_CPPM_NC1INDIR_SCOM2 , RULL(0x200F0135), SH_UNT_C_0 , SH_ACS_SCOM2_NC ); +REG64( C_1_CPPM_NC1INDIR_SCOM , RULL(0x210F0133), SH_UNT_C_1 , SH_ACS_SCOM_RO ); +REG64( C_1_CPPM_NC1INDIR_SCOM1 , RULL(0x210F0134), SH_UNT_C_1 , SH_ACS_SCOM1_NC ); +REG64( C_1_CPPM_NC1INDIR_SCOM2 , RULL(0x210F0135), SH_UNT_C_1 , SH_ACS_SCOM2_NC ); +REG64( C_2_CPPM_NC1INDIR_SCOM , RULL(0x220F0133), SH_UNT_C_2 , SH_ACS_SCOM_RO ); +REG64( C_2_CPPM_NC1INDIR_SCOM1 , RULL(0x220F0134), SH_UNT_C_2 , SH_ACS_SCOM1_NC ); +REG64( C_2_CPPM_NC1INDIR_SCOM2 , RULL(0x220F0135), SH_UNT_C_2 , SH_ACS_SCOM2_NC ); +REG64( C_3_CPPM_NC1INDIR_SCOM , RULL(0x230F0133), SH_UNT_C_3 , SH_ACS_SCOM_RO ); +REG64( C_3_CPPM_NC1INDIR_SCOM1 , RULL(0x230F0134), SH_UNT_C_3 , SH_ACS_SCOM1_NC ); +REG64( C_3_CPPM_NC1INDIR_SCOM2 , RULL(0x230F0135), SH_UNT_C_3 , SH_ACS_SCOM2_NC ); +REG64( C_4_CPPM_NC1INDIR_SCOM , RULL(0x240F0133), SH_UNT_C_4 , SH_ACS_SCOM_RO ); +REG64( C_4_CPPM_NC1INDIR_SCOM1 , RULL(0x240F0134), SH_UNT_C_4 , SH_ACS_SCOM1_NC ); +REG64( C_4_CPPM_NC1INDIR_SCOM2 , RULL(0x240F0135), SH_UNT_C_4 , SH_ACS_SCOM2_NC ); +REG64( C_5_CPPM_NC1INDIR_SCOM , RULL(0x250F0133), SH_UNT_C_5 , SH_ACS_SCOM_RO ); +REG64( C_5_CPPM_NC1INDIR_SCOM1 , RULL(0x250F0134), SH_UNT_C_5 , SH_ACS_SCOM1_NC ); +REG64( C_5_CPPM_NC1INDIR_SCOM2 , RULL(0x250F0135), SH_UNT_C_5 , SH_ACS_SCOM2_NC ); +REG64( C_6_CPPM_NC1INDIR_SCOM , RULL(0x260F0133), SH_UNT_C_6 , SH_ACS_SCOM_RO ); +REG64( C_6_CPPM_NC1INDIR_SCOM1 , RULL(0x260F0134), SH_UNT_C_6 , SH_ACS_SCOM1_NC ); +REG64( C_6_CPPM_NC1INDIR_SCOM2 , RULL(0x260F0135), SH_UNT_C_6 , SH_ACS_SCOM2_NC ); +REG64( C_7_CPPM_NC1INDIR_SCOM , RULL(0x270F0133), SH_UNT_C_7 , SH_ACS_SCOM_RO ); +REG64( C_7_CPPM_NC1INDIR_SCOM1 , RULL(0x270F0134), SH_UNT_C_7 , SH_ACS_SCOM1_NC ); +REG64( C_7_CPPM_NC1INDIR_SCOM2 , RULL(0x270F0135), SH_UNT_C_7 , SH_ACS_SCOM2_NC ); +REG64( C_8_CPPM_NC1INDIR_SCOM , RULL(0x280F0133), SH_UNT_C_8 , SH_ACS_SCOM_RO ); +REG64( C_8_CPPM_NC1INDIR_SCOM1 , RULL(0x280F0134), SH_UNT_C_8 , SH_ACS_SCOM1_NC ); +REG64( C_8_CPPM_NC1INDIR_SCOM2 , RULL(0x280F0135), SH_UNT_C_8 , SH_ACS_SCOM2_NC ); +REG64( C_9_CPPM_NC1INDIR_SCOM , RULL(0x290F0133), SH_UNT_C_9 , SH_ACS_SCOM_RO ); +REG64( C_9_CPPM_NC1INDIR_SCOM1 , RULL(0x290F0134), SH_UNT_C_9 , SH_ACS_SCOM1_NC ); +REG64( C_9_CPPM_NC1INDIR_SCOM2 , RULL(0x290F0135), SH_UNT_C_9 , SH_ACS_SCOM2_NC ); +REG64( C_10_CPPM_NC1INDIR_SCOM , RULL(0x2A0F0133), SH_UNT_C_10 , SH_ACS_SCOM_RO ); +REG64( C_10_CPPM_NC1INDIR_SCOM1 , RULL(0x2A0F0134), SH_UNT_C_10 , SH_ACS_SCOM1_NC ); +REG64( C_10_CPPM_NC1INDIR_SCOM2 , RULL(0x2A0F0135), SH_UNT_C_10 , SH_ACS_SCOM2_NC ); +REG64( C_11_CPPM_NC1INDIR_SCOM , RULL(0x2B0F0133), SH_UNT_C_11 , SH_ACS_SCOM_RO ); +REG64( C_11_CPPM_NC1INDIR_SCOM1 , RULL(0x2B0F0134), SH_UNT_C_11 , SH_ACS_SCOM1_NC ); +REG64( C_11_CPPM_NC1INDIR_SCOM2 , RULL(0x2B0F0135), SH_UNT_C_11 , SH_ACS_SCOM2_NC ); +REG64( C_12_CPPM_NC1INDIR_SCOM , RULL(0x2C0F0133), SH_UNT_C_12 , SH_ACS_SCOM_RO ); +REG64( C_12_CPPM_NC1INDIR_SCOM1 , RULL(0x2C0F0134), SH_UNT_C_12 , SH_ACS_SCOM1_NC ); +REG64( C_12_CPPM_NC1INDIR_SCOM2 , RULL(0x2C0F0135), SH_UNT_C_12 , SH_ACS_SCOM2_NC ); +REG64( C_13_CPPM_NC1INDIR_SCOM , RULL(0x2D0F0133), SH_UNT_C_13 , SH_ACS_SCOM_RO ); +REG64( C_13_CPPM_NC1INDIR_SCOM1 , RULL(0x2D0F0134), SH_UNT_C_13 , SH_ACS_SCOM1_NC ); +REG64( C_13_CPPM_NC1INDIR_SCOM2 , RULL(0x2D0F0135), SH_UNT_C_13 , SH_ACS_SCOM2_NC ); +REG64( C_14_CPPM_NC1INDIR_SCOM , RULL(0x2E0F0133), SH_UNT_C_14 , SH_ACS_SCOM_RO ); +REG64( C_14_CPPM_NC1INDIR_SCOM1 , RULL(0x2E0F0134), SH_UNT_C_14 , SH_ACS_SCOM1_NC ); +REG64( C_14_CPPM_NC1INDIR_SCOM2 , RULL(0x2E0F0135), SH_UNT_C_14 , SH_ACS_SCOM2_NC ); +REG64( C_15_CPPM_NC1INDIR_SCOM , RULL(0x2F0F0133), SH_UNT_C_15 , SH_ACS_SCOM_RO ); +REG64( C_15_CPPM_NC1INDIR_SCOM1 , RULL(0x2F0F0134), SH_UNT_C_15 , SH_ACS_SCOM1_NC ); +REG64( C_15_CPPM_NC1INDIR_SCOM2 , RULL(0x2F0F0135), SH_UNT_C_15 , SH_ACS_SCOM2_NC ); +REG64( C_16_CPPM_NC1INDIR_SCOM , RULL(0x300F0133), SH_UNT_C_16 , SH_ACS_SCOM_RO ); +REG64( C_16_CPPM_NC1INDIR_SCOM1 , RULL(0x300F0134), SH_UNT_C_16 , SH_ACS_SCOM1_NC ); +REG64( C_16_CPPM_NC1INDIR_SCOM2 , RULL(0x300F0135), SH_UNT_C_16 , SH_ACS_SCOM2_NC ); +REG64( C_17_CPPM_NC1INDIR_SCOM , RULL(0x310F0133), SH_UNT_C_17 , SH_ACS_SCOM_RO ); +REG64( C_17_CPPM_NC1INDIR_SCOM1 , RULL(0x310F0134), SH_UNT_C_17 , SH_ACS_SCOM1_NC ); +REG64( C_17_CPPM_NC1INDIR_SCOM2 , RULL(0x310F0135), SH_UNT_C_17 , SH_ACS_SCOM2_NC ); +REG64( C_18_CPPM_NC1INDIR_SCOM , RULL(0x320F0133), SH_UNT_C_18 , SH_ACS_SCOM_RO ); +REG64( C_18_CPPM_NC1INDIR_SCOM1 , RULL(0x320F0134), SH_UNT_C_18 , SH_ACS_SCOM1_NC ); +REG64( C_18_CPPM_NC1INDIR_SCOM2 , RULL(0x320F0135), SH_UNT_C_18 , SH_ACS_SCOM2_NC ); +REG64( C_19_CPPM_NC1INDIR_SCOM , RULL(0x330F0133), SH_UNT_C_19 , SH_ACS_SCOM_RO ); +REG64( C_19_CPPM_NC1INDIR_SCOM1 , RULL(0x330F0134), SH_UNT_C_19 , SH_ACS_SCOM1_NC ); +REG64( C_19_CPPM_NC1INDIR_SCOM2 , RULL(0x330F0135), SH_UNT_C_19 , SH_ACS_SCOM2_NC ); +REG64( C_20_CPPM_NC1INDIR_SCOM , RULL(0x340F0133), SH_UNT_C_20 , SH_ACS_SCOM_RO ); +REG64( C_20_CPPM_NC1INDIR_SCOM1 , RULL(0x340F0134), SH_UNT_C_20 , SH_ACS_SCOM1_NC ); +REG64( C_20_CPPM_NC1INDIR_SCOM2 , RULL(0x340F0135), SH_UNT_C_20 , SH_ACS_SCOM2_NC ); +REG64( C_21_CPPM_NC1INDIR_SCOM , RULL(0x350F0133), SH_UNT_C_21 , SH_ACS_SCOM_RO ); +REG64( C_21_CPPM_NC1INDIR_SCOM1 , RULL(0x350F0134), SH_UNT_C_21 , SH_ACS_SCOM1_NC ); +REG64( C_21_CPPM_NC1INDIR_SCOM2 , RULL(0x350F0135), SH_UNT_C_21 , SH_ACS_SCOM2_NC ); +REG64( C_22_CPPM_NC1INDIR_SCOM , RULL(0x360F0133), SH_UNT_C_22 , SH_ACS_SCOM_RO ); +REG64( C_22_CPPM_NC1INDIR_SCOM1 , RULL(0x360F0134), SH_UNT_C_22 , SH_ACS_SCOM1_NC ); +REG64( C_22_CPPM_NC1INDIR_SCOM2 , RULL(0x360F0135), SH_UNT_C_22 , SH_ACS_SCOM2_NC ); +REG64( C_23_CPPM_NC1INDIR_SCOM , RULL(0x370F0133), SH_UNT_C_23 , SH_ACS_SCOM_RO ); +REG64( C_23_CPPM_NC1INDIR_SCOM1 , RULL(0x370F0134), SH_UNT_C_23 , SH_ACS_SCOM1_NC ); +REG64( C_23_CPPM_NC1INDIR_SCOM2 , RULL(0x370F0135), SH_UNT_C_23 , SH_ACS_SCOM2_NC ); +REG64( EX_CPPM_NC1INDIR_SCOM , RULL(0x200F0133), SH_UNT_EX , + SH_ACS_SCOM_RO ); //DUPS: 210F0133, +REG64( EX_CPPM_NC1INDIR_SCOM1 , RULL(0x200F0134), SH_UNT_EX , + SH_ACS_SCOM1_NC ); //DUPS: 210F0134, +REG64( EX_CPPM_NC1INDIR_SCOM2 , RULL(0x200F0135), SH_UNT_EX , + SH_ACS_SCOM2_NC ); //DUPS: 210F0135, +REG64( EX_0_CPPM_NC1INDIR_SCOM , RULL(0x200F0133), SH_UNT_EX_0 , + SH_ACS_SCOM_RO ); //DUPS: 210F0133, +REG64( EX_0_CPPM_NC1INDIR_SCOM1 , RULL(0x200F0134), SH_UNT_EX_0 , + SH_ACS_SCOM1_NC ); //DUPS: 210F0134, +REG64( EX_0_CPPM_NC1INDIR_SCOM2 , RULL(0x200F0135), SH_UNT_EX_0 , + SH_ACS_SCOM2_NC ); //DUPS: 210F0135, +REG64( EX_1_CPPM_NC1INDIR_SCOM , RULL(0x230F0133), SH_UNT_EX_1 , + SH_ACS_SCOM_RO ); //DUPS: 220F0133, +REG64( EX_1_CPPM_NC1INDIR_SCOM1 , RULL(0x230F0134), SH_UNT_EX_1 , + SH_ACS_SCOM1_NC ); //DUPS: 220F0134, +REG64( EX_1_CPPM_NC1INDIR_SCOM2 , RULL(0x230F0135), SH_UNT_EX_1 , + SH_ACS_SCOM2_NC ); //DUPS: 220F0135, +REG64( EX_2_CPPM_NC1INDIR_SCOM , RULL(0x240F0133), SH_UNT_EX_2 , + SH_ACS_SCOM_RO ); //DUPS: 250F0133, +REG64( EX_2_CPPM_NC1INDIR_SCOM1 , RULL(0x240F0134), SH_UNT_EX_2 , + SH_ACS_SCOM1_NC ); //DUPS: 250F0134, +REG64( EX_2_CPPM_NC1INDIR_SCOM2 , RULL(0x240F0135), SH_UNT_EX_2 , + SH_ACS_SCOM2_NC ); //DUPS: 250F0135, +REG64( EX_3_CPPM_NC1INDIR_SCOM , RULL(0x260F0133), SH_UNT_EX_3 , + SH_ACS_SCOM_RO ); //DUPS: 270F0133, +REG64( EX_3_CPPM_NC1INDIR_SCOM1 , RULL(0x260F0134), SH_UNT_EX_3 , + SH_ACS_SCOM1_NC ); //DUPS: 270F0134, +REG64( EX_3_CPPM_NC1INDIR_SCOM2 , RULL(0x260F0135), SH_UNT_EX_3 , + SH_ACS_SCOM2_NC ); //DUPS: 270F0135, +REG64( EX_4_CPPM_NC1INDIR_SCOM , RULL(0x280F0133), SH_UNT_EX_4 , + SH_ACS_SCOM_RO ); //DUPS: 290F0133, +REG64( EX_4_CPPM_NC1INDIR_SCOM1 , RULL(0x280F0134), SH_UNT_EX_4 , + SH_ACS_SCOM1_NC ); //DUPS: 290F0134, +REG64( EX_4_CPPM_NC1INDIR_SCOM2 , RULL(0x280F0135), SH_UNT_EX_4 , + SH_ACS_SCOM2_NC ); //DUPS: 290F0135, +REG64( EX_5_CPPM_NC1INDIR_SCOM , RULL(0x2A0F0133), SH_UNT_EX_5 , + SH_ACS_SCOM_RO ); //DUPS: 2B0F0133, +REG64( EX_5_CPPM_NC1INDIR_SCOM1 , RULL(0x2A0F0134), SH_UNT_EX_5 , + SH_ACS_SCOM1_NC ); //DUPS: 2B0F0134, +REG64( EX_5_CPPM_NC1INDIR_SCOM2 , RULL(0x2A0F0135), SH_UNT_EX_5 , + SH_ACS_SCOM2_NC ); //DUPS: 2B0F0135, +REG64( EX_6_CPPM_NC1INDIR_SCOM , RULL(0x2C0F0133), SH_UNT_EX_6 , + SH_ACS_SCOM_RO ); //DUPS: 2D0F0133, +REG64( EX_6_CPPM_NC1INDIR_SCOM1 , RULL(0x2C0F0134), SH_UNT_EX_6 , + SH_ACS_SCOM1_NC ); //DUPS: 2D0F0134, +REG64( EX_6_CPPM_NC1INDIR_SCOM2 , RULL(0x2C0F0135), SH_UNT_EX_6 , + SH_ACS_SCOM2_NC ); //DUPS: 2D0F0135, +REG64( EX_7_CPPM_NC1INDIR_SCOM , RULL(0x2E0F0133), SH_UNT_EX_7 , + SH_ACS_SCOM_RO ); //DUPS: 2F0F0133, +REG64( EX_7_CPPM_NC1INDIR_SCOM1 , RULL(0x2E0F0134), SH_UNT_EX_7 , + SH_ACS_SCOM1_NC ); //DUPS: 2F0F0134, +REG64( EX_7_CPPM_NC1INDIR_SCOM2 , RULL(0x2E0F0135), SH_UNT_EX_7 , + SH_ACS_SCOM2_NC ); //DUPS: 2F0F0135, +REG64( EX_8_CPPM_NC1INDIR_SCOM , RULL(0x300F0133), SH_UNT_EX_8 , + SH_ACS_SCOM_RO ); //DUPS: 310F0133, +REG64( EX_8_CPPM_NC1INDIR_SCOM1 , RULL(0x300F0134), SH_UNT_EX_8 , + SH_ACS_SCOM1_NC ); //DUPS: 310F0134, +REG64( EX_8_CPPM_NC1INDIR_SCOM2 , RULL(0x300F0135), SH_UNT_EX_8 , + SH_ACS_SCOM2_NC ); //DUPS: 310F0135, +REG64( EX_9_CPPM_NC1INDIR_SCOM , RULL(0x320F0133), SH_UNT_EX_9 , + SH_ACS_SCOM_RO ); //DUPS: 330F0133, +REG64( EX_9_CPPM_NC1INDIR_SCOM1 , RULL(0x320F0134), SH_UNT_EX_9 , + SH_ACS_SCOM1_NC ); //DUPS: 330F0134, +REG64( EX_9_CPPM_NC1INDIR_SCOM2 , RULL(0x320F0135), SH_UNT_EX_9 , + SH_ACS_SCOM2_NC ); //DUPS: 330F0135, +REG64( EX_10_CPPM_NC1INDIR_SCOM , RULL(0x340F0133), SH_UNT_EX_10 , + SH_ACS_SCOM_RO ); //DUPS: 350F0133, +REG64( EX_10_CPPM_NC1INDIR_SCOM1 , RULL(0x340F0134), SH_UNT_EX_10 , + SH_ACS_SCOM1_NC ); //DUPS: 350F0134, +REG64( EX_10_CPPM_NC1INDIR_SCOM2 , RULL(0x340F0135), SH_UNT_EX_10 , + SH_ACS_SCOM2_NC ); //DUPS: 350F0135, +REG64( EX_11_CPPM_NC1INDIR_SCOM , RULL(0x360F0133), SH_UNT_EX_11 , + SH_ACS_SCOM_RO ); //DUPS: 370F0133, +REG64( EX_11_CPPM_NC1INDIR_SCOM1 , RULL(0x360F0134), SH_UNT_EX_11 , + SH_ACS_SCOM1_NC ); //DUPS: 370F0134, +REG64( EX_11_CPPM_NC1INDIR_SCOM2 , RULL(0x360F0135), SH_UNT_EX_11 , + SH_ACS_SCOM2_NC ); //DUPS: 370F0135, + +REG64( C_CPPM_PECES , RULL(0x200F01AF), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_CPPM_PECES , RULL(0x200F01AF), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_CPPM_PECES , RULL(0x210F01AF), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_CPPM_PECES , RULL(0x220F01AF), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_CPPM_PECES , RULL(0x230F01AF), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_CPPM_PECES , RULL(0x240F01AF), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_CPPM_PECES , RULL(0x250F01AF), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_CPPM_PECES , RULL(0x260F01AF), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_CPPM_PECES , RULL(0x270F01AF), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_CPPM_PECES , RULL(0x280F01AF), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_CPPM_PECES , RULL(0x290F01AF), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_CPPM_PECES , RULL(0x2A0F01AF), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_CPPM_PECES , RULL(0x2B0F01AF), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_CPPM_PECES , RULL(0x2C0F01AF), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_CPPM_PECES , RULL(0x2D0F01AF), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_CPPM_PECES , RULL(0x2E0F01AF), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_CPPM_PECES , RULL(0x2F0F01AF), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_CPPM_PECES , RULL(0x300F01AF), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_CPPM_PECES , RULL(0x310F01AF), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_CPPM_PECES , RULL(0x320F01AF), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_CPPM_PECES , RULL(0x330F01AF), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_CPPM_PECES , RULL(0x340F01AF), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_CPPM_PECES , RULL(0x350F01AF), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_CPPM_PECES , RULL(0x360F01AF), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_CPPM_PECES , RULL(0x370F01AF), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_CPPM_PECES , RULL(0x200F01AF), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F01AF, +REG64( EX_0_CPPM_PECES , RULL(0x200F01AF), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F01AF, +REG64( EX_1_CPPM_PECES , RULL(0x230F01AF), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F01AF, +REG64( EX_2_CPPM_PECES , RULL(0x240F01AF), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F01AF, +REG64( EX_3_CPPM_PECES , RULL(0x260F01AF), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F01AF, +REG64( EX_4_CPPM_PECES , RULL(0x280F01AF), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F01AF, +REG64( EX_5_CPPM_PECES , RULL(0x2A0F01AF), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F01AF, +REG64( EX_6_CPPM_PECES , RULL(0x2C0F01AF), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F01AF, +REG64( EX_7_CPPM_PECES , RULL(0x2E0F01AF), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F01AF, +REG64( EX_8_CPPM_PECES , RULL(0x300F01AF), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F01AF, +REG64( EX_9_CPPM_PECES , RULL(0x320F01AF), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F01AF, +REG64( EX_10_CPPM_PECES , RULL(0x340F01AF), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F01AF, +REG64( EX_11_CPPM_PECES , RULL(0x360F01AF), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F01AF, + +REG64( C_CPPM_PERRSUM , RULL(0x200F0120), SH_UNT_C , + SH_ACS_SCOM_WCLRPART ); +REG64( C_0_CPPM_PERRSUM , RULL(0x200F0120), SH_UNT_C_0 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_1_CPPM_PERRSUM , RULL(0x210F0120), SH_UNT_C_1 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_2_CPPM_PERRSUM , RULL(0x220F0120), SH_UNT_C_2 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_3_CPPM_PERRSUM , RULL(0x230F0120), SH_UNT_C_3 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_4_CPPM_PERRSUM , RULL(0x240F0120), SH_UNT_C_4 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_5_CPPM_PERRSUM , RULL(0x250F0120), SH_UNT_C_5 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_6_CPPM_PERRSUM , RULL(0x260F0120), SH_UNT_C_6 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_7_CPPM_PERRSUM , RULL(0x270F0120), SH_UNT_C_7 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_8_CPPM_PERRSUM , RULL(0x280F0120), SH_UNT_C_8 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_9_CPPM_PERRSUM , RULL(0x290F0120), SH_UNT_C_9 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_10_CPPM_PERRSUM , RULL(0x2A0F0120), SH_UNT_C_10 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_11_CPPM_PERRSUM , RULL(0x2B0F0120), SH_UNT_C_11 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_12_CPPM_PERRSUM , RULL(0x2C0F0120), SH_UNT_C_12 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_13_CPPM_PERRSUM , RULL(0x2D0F0120), SH_UNT_C_13 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_14_CPPM_PERRSUM , RULL(0x2E0F0120), SH_UNT_C_14 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_15_CPPM_PERRSUM , RULL(0x2F0F0120), SH_UNT_C_15 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_16_CPPM_PERRSUM , RULL(0x300F0120), SH_UNT_C_16 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_17_CPPM_PERRSUM , RULL(0x310F0120), SH_UNT_C_17 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_18_CPPM_PERRSUM , RULL(0x320F0120), SH_UNT_C_18 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_19_CPPM_PERRSUM , RULL(0x330F0120), SH_UNT_C_19 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_20_CPPM_PERRSUM , RULL(0x340F0120), SH_UNT_C_20 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_21_CPPM_PERRSUM , RULL(0x350F0120), SH_UNT_C_21 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_22_CPPM_PERRSUM , RULL(0x360F0120), SH_UNT_C_22 , + SH_ACS_SCOM_WCLRPART ); +REG64( C_23_CPPM_PERRSUM , RULL(0x370F0120), SH_UNT_C_23 , + SH_ACS_SCOM_WCLRPART ); +REG64( EX_CPPM_PERRSUM , RULL(0x200F0120), SH_UNT_EX , + SH_ACS_SCOM_WCLRPART ); //DUPS: 210F0120, +REG64( EX_0_CPPM_PERRSUM , RULL(0x200F0120), SH_UNT_EX_0 , + SH_ACS_SCOM_WCLRPART ); //DUPS: 210F0120, +REG64( EX_1_CPPM_PERRSUM , RULL(0x230F0120), SH_UNT_EX_1 , + SH_ACS_SCOM_WCLRPART ); //DUPS: 220F0120, +REG64( EX_2_CPPM_PERRSUM , RULL(0x240F0120), SH_UNT_EX_2 , + SH_ACS_SCOM_WCLRPART ); //DUPS: 250F0120, +REG64( EX_3_CPPM_PERRSUM , RULL(0x260F0120), SH_UNT_EX_3 , + SH_ACS_SCOM_WCLRPART ); //DUPS: 270F0120, +REG64( EX_4_CPPM_PERRSUM , RULL(0x280F0120), SH_UNT_EX_4 , + SH_ACS_SCOM_WCLRPART ); //DUPS: 290F0120, +REG64( EX_5_CPPM_PERRSUM , RULL(0x2A0F0120), SH_UNT_EX_5 , + SH_ACS_SCOM_WCLRPART ); //DUPS: 2B0F0120, +REG64( EX_6_CPPM_PERRSUM , RULL(0x2C0F0120), SH_UNT_EX_6 , + SH_ACS_SCOM_WCLRPART ); //DUPS: 2D0F0120, +REG64( EX_7_CPPM_PERRSUM , RULL(0x2E0F0120), SH_UNT_EX_7 , + SH_ACS_SCOM_WCLRPART ); //DUPS: 2F0F0120, +REG64( EX_8_CPPM_PERRSUM , RULL(0x300F0120), SH_UNT_EX_8 , + SH_ACS_SCOM_WCLRPART ); //DUPS: 310F0120, +REG64( EX_9_CPPM_PERRSUM , RULL(0x320F0120), SH_UNT_EX_9 , + SH_ACS_SCOM_WCLRPART ); //DUPS: 330F0120, +REG64( EX_10_CPPM_PERRSUM , RULL(0x340F0120), SH_UNT_EX_10 , + SH_ACS_SCOM_WCLRPART ); //DUPS: 350F0120, +REG64( EX_11_CPPM_PERRSUM , RULL(0x360F0120), SH_UNT_EX_11 , + SH_ACS_SCOM_WCLRPART ); //DUPS: 370F0120, + +REG64( EQ_CSAR , RULL(0x1001280D), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 1001240D, +REG64( EQ_0_CSAR , RULL(0x1001280D), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 1001240D, +REG64( EQ_1_CSAR , RULL(0x1101280D), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 1101240D, +REG64( EQ_2_CSAR , RULL(0x1201280D), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 1201240D, +REG64( EQ_3_CSAR , RULL(0x1301280D), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 1301240D, +REG64( EQ_4_CSAR , RULL(0x1401280D), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 1401240D, +REG64( EQ_5_CSAR , RULL(0x1501280D), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 1501240D, +REG64( EX_CSAR , RULL(0x1001240D), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CSAR , RULL(0x1001240D), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CSAR , RULL(0x1001280D), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CSAR , RULL(0x1101240D), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CSAR , RULL(0x1101280D), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CSAR , RULL(0x1201240D), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CSAR , RULL(0x1201280D), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CSAR , RULL(0x1301240D), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CSAR , RULL(0x1301280D), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CSAR , RULL(0x1401240D), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CSAR , RULL(0x1401280D), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CSAR , RULL(0x1501240D), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CSAR , RULL(0x1501280D), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( EQ_CSCR , RULL(0x1001280A), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 1001240A, +REG64( EQ_CSCR_CLEAR , RULL(0x1001280B), SH_UNT_EQ , + SH_ACS_SCOM1_CLEAR ); //DUPS: 1001240B, +REG64( EQ_CSCR_OR , RULL(0x1001280C), SH_UNT_EQ , + SH_ACS_SCOM2_OR ); //DUPS: 1001240C, +REG64( EQ_0_CSCR , RULL(0x1001280A), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 1001240A, +REG64( EQ_0_CSCR_CLEAR , RULL(0x1001280B), SH_UNT_EQ_0 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 1001240B, +REG64( EQ_0_CSCR_OR , RULL(0x1001280C), SH_UNT_EQ_0 , + SH_ACS_SCOM2_OR ); //DUPS: 1001240C, +REG64( EQ_1_CSCR , RULL(0x1101280A), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 1101240A, +REG64( EQ_1_CSCR_CLEAR , RULL(0x1101280B), SH_UNT_EQ_1 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 1101240B, +REG64( EQ_1_CSCR_OR , RULL(0x1101280C), SH_UNT_EQ_1 , + SH_ACS_SCOM2_OR ); //DUPS: 1101240C, +REG64( EQ_2_CSCR , RULL(0x1201280A), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 1201240A, +REG64( EQ_2_CSCR_CLEAR , RULL(0x1201280B), SH_UNT_EQ_2 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 1201240B, +REG64( EQ_2_CSCR_OR , RULL(0x1201280C), SH_UNT_EQ_2 , + SH_ACS_SCOM2_OR ); //DUPS: 1201240C, +REG64( EQ_3_CSCR , RULL(0x1301280A), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 1301240A, +REG64( EQ_3_CSCR_CLEAR , RULL(0x1301280B), SH_UNT_EQ_3 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 1301240B, +REG64( EQ_3_CSCR_OR , RULL(0x1301280C), SH_UNT_EQ_3 , + SH_ACS_SCOM2_OR ); //DUPS: 1301240C, +REG64( EQ_4_CSCR , RULL(0x1401280A), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 1401240A, +REG64( EQ_4_CSCR_CLEAR , RULL(0x1401280B), SH_UNT_EQ_4 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 1401240B, +REG64( EQ_4_CSCR_OR , RULL(0x1401280C), SH_UNT_EQ_4 , + SH_ACS_SCOM2_OR ); //DUPS: 1401240C, +REG64( EQ_5_CSCR , RULL(0x1501280A), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 1501240A, +REG64( EQ_5_CSCR_CLEAR , RULL(0x1501280B), SH_UNT_EQ_5 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 1501240B, +REG64( EQ_5_CSCR_OR , RULL(0x1501280C), SH_UNT_EQ_5 , + SH_ACS_SCOM2_OR ); //DUPS: 1501240C, +REG64( EX_CSCR , RULL(0x1001240A), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_CSCR_CLEAR , RULL(0x1001240B), SH_UNT_EX , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_CSCR_OR , RULL(0x1001240C), SH_UNT_EX , SH_ACS_SCOM2_OR ); +REG64( EX_0_CSCR , RULL(0x1001240A), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_0_CSCR_CLEAR , RULL(0x1001240B), SH_UNT_EX_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_0_CSCR_OR , RULL(0x1001240C), SH_UNT_EX_0 , SH_ACS_SCOM2_OR ); +REG64( EX_1_CSCR , RULL(0x1001280A), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_1_CSCR_CLEAR , RULL(0x1001280B), SH_UNT_EX_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_1_CSCR_OR , RULL(0x1001280C), SH_UNT_EX_1 , SH_ACS_SCOM2_OR ); +REG64( EX_2_CSCR , RULL(0x1101240A), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_2_CSCR_CLEAR , RULL(0x1101240B), SH_UNT_EX_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_2_CSCR_OR , RULL(0x1101240C), SH_UNT_EX_2 , SH_ACS_SCOM2_OR ); +REG64( EX_3_CSCR , RULL(0x1101280A), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_3_CSCR_CLEAR , RULL(0x1101280B), SH_UNT_EX_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_3_CSCR_OR , RULL(0x1101280C), SH_UNT_EX_3 , SH_ACS_SCOM2_OR ); +REG64( EX_4_CSCR , RULL(0x1201240A), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_4_CSCR_CLEAR , RULL(0x1201240B), SH_UNT_EX_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_4_CSCR_OR , RULL(0x1201240C), SH_UNT_EX_4 , SH_ACS_SCOM2_OR ); +REG64( EX_5_CSCR , RULL(0x1201280A), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_5_CSCR_CLEAR , RULL(0x1201280B), SH_UNT_EX_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_5_CSCR_OR , RULL(0x1201280C), SH_UNT_EX_5 , SH_ACS_SCOM2_OR ); +REG64( EX_6_CSCR , RULL(0x1301240A), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_6_CSCR_CLEAR , RULL(0x1301240B), SH_UNT_EX_6 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_6_CSCR_OR , RULL(0x1301240C), SH_UNT_EX_6 , SH_ACS_SCOM2_OR ); +REG64( EX_7_CSCR , RULL(0x1301280A), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_7_CSCR_CLEAR , RULL(0x1301280B), SH_UNT_EX_7 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_7_CSCR_OR , RULL(0x1301280C), SH_UNT_EX_7 , SH_ACS_SCOM2_OR ); +REG64( EX_8_CSCR , RULL(0x1401240A), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_8_CSCR_CLEAR , RULL(0x1401240B), SH_UNT_EX_8 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_8_CSCR_OR , RULL(0x1401240C), SH_UNT_EX_8 , SH_ACS_SCOM2_OR ); +REG64( EX_9_CSCR , RULL(0x1401280A), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_9_CSCR_CLEAR , RULL(0x1401280B), SH_UNT_EX_9 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_9_CSCR_OR , RULL(0x1401280C), SH_UNT_EX_9 , SH_ACS_SCOM2_OR ); +REG64( EX_10_CSCR , RULL(0x1501240A), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_10_CSCR_CLEAR , RULL(0x1501240B), SH_UNT_EX_10 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_10_CSCR_OR , RULL(0x1501240C), SH_UNT_EX_10 , SH_ACS_SCOM2_OR ); +REG64( EX_11_CSCR , RULL(0x1501280A), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); +REG64( EX_11_CSCR_CLEAR , RULL(0x1501280B), SH_UNT_EX_11 , + SH_ACS_SCOM1_CLEAR ); +REG64( EX_11_CSCR_OR , RULL(0x1501280C), SH_UNT_EX_11 , SH_ACS_SCOM2_OR ); + +REG64( EQ_CSDR , RULL(0x1001280E), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 1001240E, +REG64( EQ_0_CSDR , RULL(0x1001280E), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 1001240E, +REG64( EQ_1_CSDR , RULL(0x1101280E), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 1101240E, +REG64( EQ_2_CSDR , RULL(0x1201280E), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 1201240E, +REG64( EQ_3_CSDR , RULL(0x1301280E), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 1301240E, +REG64( EQ_4_CSDR , RULL(0x1401280E), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 1401240E, +REG64( EQ_5_CSDR , RULL(0x1501280E), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 1501240E, +REG64( EX_CSDR , RULL(0x1001240E), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_CSDR , RULL(0x1001240E), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_CSDR , RULL(0x1001280E), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_CSDR , RULL(0x1101240E), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_CSDR , RULL(0x1101280E), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_CSDR , RULL(0x1201240E), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_CSDR , RULL(0x1201280E), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_CSDR , RULL(0x1301240E), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_CSDR , RULL(0x1301280E), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_CSDR , RULL(0x1401240E), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_CSDR , RULL(0x1401280E), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_10_CSDR , RULL(0x1501240E), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_CSDR , RULL(0x1501280E), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); + +REG64( C_CTRL , RULL(0x20010A85), SH_UNT_C , SH_ACS_SCOM_NC ); +REG64( C_0_CTRL , RULL(0x20010A85), SH_UNT_C_0 , SH_ACS_SCOM_NC ); +REG64( C_1_CTRL , RULL(0x21010A85), SH_UNT_C_1 , SH_ACS_SCOM_NC ); +REG64( C_2_CTRL , RULL(0x22010A85), SH_UNT_C_2 , SH_ACS_SCOM_NC ); +REG64( C_3_CTRL , RULL(0x23010A85), SH_UNT_C_3 , SH_ACS_SCOM_NC ); +REG64( C_4_CTRL , RULL(0x24010A85), SH_UNT_C_4 , SH_ACS_SCOM_NC ); +REG64( C_5_CTRL , RULL(0x25010A85), SH_UNT_C_5 , SH_ACS_SCOM_NC ); +REG64( C_6_CTRL , RULL(0x26010A85), SH_UNT_C_6 , SH_ACS_SCOM_NC ); +REG64( C_7_CTRL , RULL(0x27010A85), SH_UNT_C_7 , SH_ACS_SCOM_NC ); +REG64( C_8_CTRL , RULL(0x28010A85), SH_UNT_C_8 , SH_ACS_SCOM_NC ); +REG64( C_9_CTRL , RULL(0x29010A85), SH_UNT_C_9 , SH_ACS_SCOM_NC ); +REG64( C_10_CTRL , RULL(0x2A010A85), SH_UNT_C_10 , SH_ACS_SCOM_NC ); +REG64( C_11_CTRL , RULL(0x2B010A85), SH_UNT_C_11 , SH_ACS_SCOM_NC ); +REG64( C_12_CTRL , RULL(0x2C010A85), SH_UNT_C_12 , SH_ACS_SCOM_NC ); +REG64( C_13_CTRL , RULL(0x2D010A85), SH_UNT_C_13 , SH_ACS_SCOM_NC ); +REG64( C_14_CTRL , RULL(0x2E010A85), SH_UNT_C_14 , SH_ACS_SCOM_NC ); +REG64( C_15_CTRL , RULL(0x2F010A85), SH_UNT_C_15 , SH_ACS_SCOM_NC ); +REG64( C_16_CTRL , RULL(0x30010A85), SH_UNT_C_16 , SH_ACS_SCOM_NC ); +REG64( C_17_CTRL , RULL(0x31010A85), SH_UNT_C_17 , SH_ACS_SCOM_NC ); +REG64( C_18_CTRL , RULL(0x32010A85), SH_UNT_C_18 , SH_ACS_SCOM_NC ); +REG64( C_19_CTRL , RULL(0x33010A85), SH_UNT_C_19 , SH_ACS_SCOM_NC ); +REG64( C_20_CTRL , RULL(0x34010A85), SH_UNT_C_20 , SH_ACS_SCOM_NC ); +REG64( C_21_CTRL , RULL(0x35010A85), SH_UNT_C_21 , SH_ACS_SCOM_NC ); +REG64( C_22_CTRL , RULL(0x36010A85), SH_UNT_C_22 , SH_ACS_SCOM_NC ); +REG64( C_23_CTRL , RULL(0x37010A85), SH_UNT_C_23 , SH_ACS_SCOM_NC ); +REG64( EX_0_L2_CTRL , RULL(0x21010A85), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_NC ); //DUPS: 20010A85, +REG64( EX_10_L2_CTRL , RULL(0x35010A85), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_NC ); //DUPS: 34010A85, +REG64( EX_11_L2_CTRL , RULL(0x37010A85), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_NC ); //DUPS: 36010A85, +REG64( EX_1_L2_CTRL , RULL(0x23010A85), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_NC ); //DUPS: 22010A85, +REG64( EX_2_L2_CTRL , RULL(0x25010A85), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_NC ); //DUPS: 24010A85, +REG64( EX_3_L2_CTRL , RULL(0x27010A85), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_NC ); //DUPS: 26010A85, +REG64( EX_4_L2_CTRL , RULL(0x29010A85), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_NC ); //DUPS: 28010A85, +REG64( EX_5_L2_CTRL , RULL(0x2B010A85), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_NC ); //DUPS: 2A010A85, +REG64( EX_6_L2_CTRL , RULL(0x2D010A85), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_NC ); //DUPS: 2C010A85, +REG64( EX_7_L2_CTRL , RULL(0x2F010A85), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_NC ); //DUPS: 2E010A85, +REG64( EX_8_L2_CTRL , RULL(0x31010A85), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_NC ); //DUPS: 30010A85, +REG64( EX_9_L2_CTRL , RULL(0x33010A85), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_NC ); //DUPS: 32010A85, +REG64( EX_L2_CTRL , RULL(0x21010A85), SH_UNT_EX_L2 , + SH_ACS_SCOM_NC ); //DUPS: 20010A85, + +REG64( C_CTRL_ATOMIC_LOCK_REG , RULL(0x200003FF), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_CTRL_ATOMIC_LOCK_REG , RULL(0x200003FF), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_CTRL_ATOMIC_LOCK_REG , RULL(0x210003FF), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_CTRL_ATOMIC_LOCK_REG , RULL(0x220003FF), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_CTRL_ATOMIC_LOCK_REG , RULL(0x230003FF), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_CTRL_ATOMIC_LOCK_REG , RULL(0x240003FF), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_CTRL_ATOMIC_LOCK_REG , RULL(0x250003FF), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_CTRL_ATOMIC_LOCK_REG , RULL(0x260003FF), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_CTRL_ATOMIC_LOCK_REG , RULL(0x270003FF), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_CTRL_ATOMIC_LOCK_REG , RULL(0x280003FF), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_CTRL_ATOMIC_LOCK_REG , RULL(0x290003FF), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_CTRL_ATOMIC_LOCK_REG , RULL(0x2A0003FF), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_CTRL_ATOMIC_LOCK_REG , RULL(0x2B0003FF), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_CTRL_ATOMIC_LOCK_REG , RULL(0x2C0003FF), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_CTRL_ATOMIC_LOCK_REG , RULL(0x2D0003FF), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_CTRL_ATOMIC_LOCK_REG , RULL(0x2E0003FF), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_CTRL_ATOMIC_LOCK_REG , RULL(0x2F0003FF), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_CTRL_ATOMIC_LOCK_REG , RULL(0x300003FF), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_CTRL_ATOMIC_LOCK_REG , RULL(0x310003FF), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_CTRL_ATOMIC_LOCK_REG , RULL(0x320003FF), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_CTRL_ATOMIC_LOCK_REG , RULL(0x330003FF), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_CTRL_ATOMIC_LOCK_REG , RULL(0x340003FF), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_CTRL_ATOMIC_LOCK_REG , RULL(0x350003FF), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_CTRL_ATOMIC_LOCK_REG , RULL(0x360003FF), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_CTRL_ATOMIC_LOCK_REG , RULL(0x370003FF), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_CTRL_ATOMIC_LOCK_REG , RULL(0x100003FF), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_CTRL_ATOMIC_LOCK_REG , RULL(0x100003FF), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_CTRL_ATOMIC_LOCK_REG , RULL(0x110003FF), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_CTRL_ATOMIC_LOCK_REG , RULL(0x120003FF), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_CTRL_ATOMIC_LOCK_REG , RULL(0x130003FF), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_CTRL_ATOMIC_LOCK_REG , RULL(0x140003FF), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_CTRL_ATOMIC_LOCK_REG , RULL(0x150003FF), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_CTRL_ATOMIC_LOCK_REG , RULL(0x200003FF), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210003FF, +REG64( EX_0_CTRL_ATOMIC_LOCK_REG , RULL(0x200003FF), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210003FF, +REG64( EX_1_CTRL_ATOMIC_LOCK_REG , RULL(0x220003FF), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 230003FF, +REG64( EX_2_CTRL_ATOMIC_LOCK_REG , RULL(0x240003FF), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250003FF, +REG64( EX_3_CTRL_ATOMIC_LOCK_REG , RULL(0x260003FF), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270003FF, +REG64( EX_4_CTRL_ATOMIC_LOCK_REG , RULL(0x280003FF), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290003FF, +REG64( EX_5_CTRL_ATOMIC_LOCK_REG , RULL(0x2A0003FF), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0003FF, +REG64( EX_6_CTRL_ATOMIC_LOCK_REG , RULL(0x2C0003FF), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0003FF, +REG64( EX_7_CTRL_ATOMIC_LOCK_REG , RULL(0x2E0003FF), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0003FF, +REG64( EX_8_CTRL_ATOMIC_LOCK_REG , RULL(0x300003FF), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310003FF, +REG64( EX_9_CTRL_ATOMIC_LOCK_REG , RULL(0x320003FF), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330003FF, +REG64( EX_10_CTRL_ATOMIC_LOCK_REG , RULL(0x340003FF), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350003FF, +REG64( EX_11_CTRL_ATOMIC_LOCK_REG , RULL(0x360003FF), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370003FF, + +REG64( C_CTRL_PROTECT_MODE_REG , RULL(0x200003FE), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_CTRL_PROTECT_MODE_REG , RULL(0x200003FE), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_CTRL_PROTECT_MODE_REG , RULL(0x210003FE), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_CTRL_PROTECT_MODE_REG , RULL(0x220003FE), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_CTRL_PROTECT_MODE_REG , RULL(0x230003FE), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_CTRL_PROTECT_MODE_REG , RULL(0x240003FE), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_CTRL_PROTECT_MODE_REG , RULL(0x250003FE), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_CTRL_PROTECT_MODE_REG , RULL(0x260003FE), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_CTRL_PROTECT_MODE_REG , RULL(0x270003FE), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_CTRL_PROTECT_MODE_REG , RULL(0x280003FE), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_CTRL_PROTECT_MODE_REG , RULL(0x290003FE), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_CTRL_PROTECT_MODE_REG , RULL(0x2A0003FE), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_CTRL_PROTECT_MODE_REG , RULL(0x2B0003FE), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_CTRL_PROTECT_MODE_REG , RULL(0x2C0003FE), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_CTRL_PROTECT_MODE_REG , RULL(0x2D0003FE), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_CTRL_PROTECT_MODE_REG , RULL(0x2E0003FE), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_CTRL_PROTECT_MODE_REG , RULL(0x2F0003FE), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_CTRL_PROTECT_MODE_REG , RULL(0x300003FE), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_CTRL_PROTECT_MODE_REG , RULL(0x310003FE), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_CTRL_PROTECT_MODE_REG , RULL(0x320003FE), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_CTRL_PROTECT_MODE_REG , RULL(0x330003FE), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_CTRL_PROTECT_MODE_REG , RULL(0x340003FE), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_CTRL_PROTECT_MODE_REG , RULL(0x350003FE), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_CTRL_PROTECT_MODE_REG , RULL(0x360003FE), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_CTRL_PROTECT_MODE_REG , RULL(0x370003FE), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_CTRL_PROTECT_MODE_REG , RULL(0x100003FE), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_CTRL_PROTECT_MODE_REG , RULL(0x100003FE), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_CTRL_PROTECT_MODE_REG , RULL(0x110003FE), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_CTRL_PROTECT_MODE_REG , RULL(0x120003FE), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_CTRL_PROTECT_MODE_REG , RULL(0x130003FE), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_CTRL_PROTECT_MODE_REG , RULL(0x140003FE), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_CTRL_PROTECT_MODE_REG , RULL(0x150003FE), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_CTRL_PROTECT_MODE_REG , RULL(0x200003FE), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210003FE, +REG64( EX_0_CTRL_PROTECT_MODE_REG , RULL(0x200003FE), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210003FE, +REG64( EX_1_CTRL_PROTECT_MODE_REG , RULL(0x220003FE), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 230003FE, +REG64( EX_2_CTRL_PROTECT_MODE_REG , RULL(0x240003FE), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250003FE, +REG64( EX_3_CTRL_PROTECT_MODE_REG , RULL(0x260003FE), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270003FE, +REG64( EX_4_CTRL_PROTECT_MODE_REG , RULL(0x280003FE), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290003FE, +REG64( EX_5_CTRL_PROTECT_MODE_REG , RULL(0x2A0003FE), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0003FE, +REG64( EX_6_CTRL_PROTECT_MODE_REG , RULL(0x2C0003FE), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0003FE, +REG64( EX_7_CTRL_PROTECT_MODE_REG , RULL(0x2E0003FE), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0003FE, +REG64( EX_8_CTRL_PROTECT_MODE_REG , RULL(0x300003FE), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310003FE, +REG64( EX_9_CTRL_PROTECT_MODE_REG , RULL(0x320003FE), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330003FE, +REG64( EX_10_CTRL_PROTECT_MODE_REG , RULL(0x340003FE), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350003FE, +REG64( EX_11_CTRL_PROTECT_MODE_REG , RULL(0x360003FE), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370003FE, + +REG64( CAPP_CXA_SNP_ARRAY_ADDR_REG , RULL(0x02010828), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_CXA_SNP_ARRAY_ADDR_REG , RULL(0x02010828), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_CXA_SNP_ARRAY_ADDR_REG , RULL(0x04010828), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_CXA_SNP_ARRAY_READ_REG , RULL(0x02010829), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_CXA_SNP_ARRAY_READ_REG , RULL(0x02010829), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_CXA_SNP_ARRAY_READ_REG , RULL(0x04010829), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_CXA_SNP_ARRAY_WRITE_REG , RULL(0x02010841), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_CXA_SNP_ARRAY_WRITE_REG , RULL(0x02010841), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_CXA_SNP_ARRAY_WRITE_REG , RULL(0x04010841), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_CXA_SNP_CAN_PRESP_REG0 , RULL(0x0201081D), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_CXA_SNP_CAN_PRESP_REG0 , RULL(0x0201081D), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_CXA_SNP_CAN_PRESP_REG0 , RULL(0x0401081D), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_CXA_SNP_CAN_PRESP_REG1 , RULL(0x0201081E), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_CXA_SNP_CAN_PRESP_REG1 , RULL(0x0201081E), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_CXA_SNP_CAN_PRESP_REG1 , RULL(0x0401081E), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_CXA_SNP_CAN_PRESP_REG2 , RULL(0x0201081F), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_CXA_SNP_CAN_PRESP_REG2 , RULL(0x0201081F), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_CXA_SNP_CAN_PRESP_REG2 , RULL(0x0401081F), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_CXA_SNP_CAPI_CFG_REG , RULL(0x0201081A), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_CXA_SNP_CAPI_CFG_REG , RULL(0x0201081A), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_CXA_SNP_CAPI_CFG_REG , RULL(0x0401081A), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_CXA_SNP_CNTL_REG , RULL(0x0201081B), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_CXA_SNP_CNTL_REG , RULL(0x0201081B), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_CXA_SNP_CNTL_REG , RULL(0x0401081B), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_CXA_SNP_ERROR_REPORT_REG , RULL(0x0201080A), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_CXA_SNP_ERROR_REPORT_REG , RULL(0x0201080A), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_CXA_SNP_ERROR_REPORT_REG , RULL(0x0401080A), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_CXA_SNP_PMU_EVENTS_SELECT_REG , RULL(0x02010817), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_CXA_SNP_PMU_EVENTS_SELECT_REG , RULL(0x02010817), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_CXA_SNP_PMU_EVENTS_SELECT_REG , RULL(0x04010817), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_CXA_SNP_REMOTE_ADDR_BAR_BARM_REG , RULL(0x02010840), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_CXA_SNP_REMOTE_ADDR_BAR_BARM_REG , RULL(0x02010840), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_CXA_SNP_REMOTE_ADDR_BAR_BARM_REG , RULL(0x04010840), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_CXA_SNP_REMOTE_ADDR_BAR_BARM_REG1 , RULL(0x02010844), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_CXA_SNP_REMOTE_ADDR_BAR_BARM_REG1 , RULL(0x02010844), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_CXA_SNP_REMOTE_ADDR_BAR_BARM_REG1 , RULL(0x04010844), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_CXA_SNP_REMOTE_MMIO_BAR_BARM_REG , RULL(0x0201084A), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_CXA_SNP_REMOTE_MMIO_BAR_BARM_REG , RULL(0x0201084A), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_CXA_SNP_REMOTE_MMIO_BAR_BARM_REG , RULL(0x0401084A), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_CXA_SNP_REMOTE_MMIO_BAR_BARM_REG1 , RULL(0x0201084B), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_CXA_SNP_REMOTE_MMIO_BAR_BARM_REG1 , RULL(0x0201084B), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_CXA_SNP_REMOTE_MMIO_BAR_BARM_REG1 , RULL(0x0401084B), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( C_DBG_CBS_CC , RULL(0x20030013), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_DBG_CBS_CC , RULL(0x20030013), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_DBG_CBS_CC , RULL(0x21030013), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_DBG_CBS_CC , RULL(0x22030013), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_DBG_CBS_CC , RULL(0x23030013), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_DBG_CBS_CC , RULL(0x24030013), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_DBG_CBS_CC , RULL(0x25030013), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_DBG_CBS_CC , RULL(0x26030013), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_DBG_CBS_CC , RULL(0x27030013), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_DBG_CBS_CC , RULL(0x28030013), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_DBG_CBS_CC , RULL(0x29030013), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_DBG_CBS_CC , RULL(0x2A030013), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_DBG_CBS_CC , RULL(0x2B030013), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_DBG_CBS_CC , RULL(0x2C030013), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_DBG_CBS_CC , RULL(0x2D030013), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_DBG_CBS_CC , RULL(0x2E030013), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_DBG_CBS_CC , RULL(0x2F030013), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_DBG_CBS_CC , RULL(0x30030013), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_DBG_CBS_CC , RULL(0x31030013), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_DBG_CBS_CC , RULL(0x32030013), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_DBG_CBS_CC , RULL(0x33030013), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_DBG_CBS_CC , RULL(0x34030013), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_DBG_CBS_CC , RULL(0x35030013), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_DBG_CBS_CC , RULL(0x36030013), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_DBG_CBS_CC , RULL(0x37030013), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_DBG_CBS_CC , RULL(0x10030013), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_DBG_CBS_CC , RULL(0x10030013), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_DBG_CBS_CC , RULL(0x11030013), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_DBG_CBS_CC , RULL(0x12030013), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_DBG_CBS_CC , RULL(0x13030013), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_DBG_CBS_CC , RULL(0x14030013), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_DBG_CBS_CC , RULL(0x15030013), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_DBG_CBS_CC , RULL(0x20030013), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21030013, +REG64( EX_0_DBG_CBS_CC , RULL(0x20030013), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21030013, +REG64( EX_1_DBG_CBS_CC , RULL(0x22030013), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23030013, +REG64( EX_2_DBG_CBS_CC , RULL(0x24030013), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25030013, +REG64( EX_3_DBG_CBS_CC , RULL(0x26030013), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27030013, +REG64( EX_4_DBG_CBS_CC , RULL(0x28030013), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29030013, +REG64( EX_5_DBG_CBS_CC , RULL(0x2A030013), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B030013, +REG64( EX_6_DBG_CBS_CC , RULL(0x2C030013), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D030013, +REG64( EX_7_DBG_CBS_CC , RULL(0x2E030013), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F030013, +REG64( EX_8_DBG_CBS_CC , RULL(0x30030013), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31030013, +REG64( EX_9_DBG_CBS_CC , RULL(0x32030013), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33030013, +REG64( EX_10_DBG_CBS_CC , RULL(0x34030013), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35030013, +REG64( EX_11_DBG_CBS_CC , RULL(0x36030013), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37030013, + +REG64( CAPP_DEBUG_CONTROL , RULL(0x02010811), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_DEBUG_CONTROL , RULL(0x02010811), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_DEBUG_CONTROL , RULL(0x04010811), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( EQ_DEBUG_MUX_SEL_REG , RULL(0x10011818), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011C18, +REG64( EQ_0_DEBUG_MUX_SEL_REG , RULL(0x10011818), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011C18, +REG64( EQ_1_DEBUG_MUX_SEL_REG , RULL(0x11011818), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011C18, +REG64( EQ_2_DEBUG_MUX_SEL_REG , RULL(0x12011818), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011C18, +REG64( EQ_3_DEBUG_MUX_SEL_REG , RULL(0x13011818), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011C18, +REG64( EQ_4_DEBUG_MUX_SEL_REG , RULL(0x14011818), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011C18, +REG64( EQ_5_DEBUG_MUX_SEL_REG , RULL(0x15011818), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011C18, +REG64( EX_DEBUG_MUX_SEL_REG , RULL(0x10011818), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_DEBUG_MUX_SEL_REG , RULL(0x10011818), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_DEBUG_MUX_SEL_REG , RULL(0x10011C18), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_DEBUG_MUX_SEL_REG , RULL(0x11011818), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_DEBUG_MUX_SEL_REG , RULL(0x11011C18), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_DEBUG_MUX_SEL_REG , RULL(0x12011818), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_DEBUG_MUX_SEL_REG , RULL(0x12011C18), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_DEBUG_MUX_SEL_REG , RULL(0x13011818), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_DEBUG_MUX_SEL_REG , RULL(0x13011C18), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_DEBUG_MUX_SEL_REG , RULL(0x14011818), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_DEBUG_MUX_SEL_REG , RULL(0x14011C18), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_DEBUG_MUX_SEL_REG , RULL(0x15011818), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_DEBUG_MUX_SEL_REG , RULL(0x15011C18), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( CAPP_DFSUOP1 , RULL(0x02010843), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_DFSUOP1 , RULL(0x02010843), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_DFSUOP1 , RULL(0x04010843), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( C_DIRECT_CONTROLS , RULL(0x20010A9C), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_DIRECT_CONTROLS , RULL(0x20010A9C), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_DIRECT_CONTROLS , RULL(0x21010A9C), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_DIRECT_CONTROLS , RULL(0x22010A9C), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_DIRECT_CONTROLS , RULL(0x23010A9C), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_DIRECT_CONTROLS , RULL(0x24010A9C), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_DIRECT_CONTROLS , RULL(0x25010A9C), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_DIRECT_CONTROLS , RULL(0x26010A9C), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_DIRECT_CONTROLS , RULL(0x27010A9C), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_DIRECT_CONTROLS , RULL(0x28010A9C), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_DIRECT_CONTROLS , RULL(0x29010A9C), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_DIRECT_CONTROLS , RULL(0x2A010A9C), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_DIRECT_CONTROLS , RULL(0x2B010A9C), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_DIRECT_CONTROLS , RULL(0x2C010A9C), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_DIRECT_CONTROLS , RULL(0x2D010A9C), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_DIRECT_CONTROLS , RULL(0x2E010A9C), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_DIRECT_CONTROLS , RULL(0x2F010A9C), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_DIRECT_CONTROLS , RULL(0x30010A9C), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_DIRECT_CONTROLS , RULL(0x31010A9C), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_DIRECT_CONTROLS , RULL(0x32010A9C), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_DIRECT_CONTROLS , RULL(0x33010A9C), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_DIRECT_CONTROLS , RULL(0x34010A9C), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_DIRECT_CONTROLS , RULL(0x35010A9C), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_DIRECT_CONTROLS , RULL(0x36010A9C), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_DIRECT_CONTROLS , RULL(0x37010A9C), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_0_L2_DIRECT_CONTROLS , RULL(0x21010A9C), SH_UNT_EX_0_L2 , + SH_ACS_SCOM ); //DUPS: 20010A9C, +REG64( EX_10_L2_DIRECT_CONTROLS , RULL(0x35010A9C), SH_UNT_EX_10_L2 , + SH_ACS_SCOM ); //DUPS: 34010A9C, +REG64( EX_11_L2_DIRECT_CONTROLS , RULL(0x37010A9C), SH_UNT_EX_11_L2 , + SH_ACS_SCOM ); //DUPS: 36010A9C, +REG64( EX_1_L2_DIRECT_CONTROLS , RULL(0x23010A9C), SH_UNT_EX_1_L2 , + SH_ACS_SCOM ); //DUPS: 22010A9C, +REG64( EX_2_L2_DIRECT_CONTROLS , RULL(0x25010A9C), SH_UNT_EX_2_L2 , + SH_ACS_SCOM ); //DUPS: 24010A9C, +REG64( EX_3_L2_DIRECT_CONTROLS , RULL(0x27010A9C), SH_UNT_EX_3_L2 , + SH_ACS_SCOM ); //DUPS: 26010A9C, +REG64( EX_4_L2_DIRECT_CONTROLS , RULL(0x29010A9C), SH_UNT_EX_4_L2 , + SH_ACS_SCOM ); //DUPS: 28010A9C, +REG64( EX_5_L2_DIRECT_CONTROLS , RULL(0x2B010A9C), SH_UNT_EX_5_L2 , + SH_ACS_SCOM ); //DUPS: 2A010A9C, +REG64( EX_6_L2_DIRECT_CONTROLS , RULL(0x2D010A9C), SH_UNT_EX_6_L2 , + SH_ACS_SCOM ); //DUPS: 2C010A9C, +REG64( EX_7_L2_DIRECT_CONTROLS , RULL(0x2F010A9C), SH_UNT_EX_7_L2 , + SH_ACS_SCOM ); //DUPS: 2E010A9C, +REG64( EX_8_L2_DIRECT_CONTROLS , RULL(0x31010A9C), SH_UNT_EX_8_L2 , + SH_ACS_SCOM ); //DUPS: 30010A9C, +REG64( EX_9_L2_DIRECT_CONTROLS , RULL(0x33010A9C), SH_UNT_EX_9_L2 , + SH_ACS_SCOM ); //DUPS: 32010A9C, +REG64( EX_L2_DIRECT_CONTROLS , RULL(0x21010A9C), SH_UNT_EX_L2 , + SH_ACS_SCOM ); //DUPS: 20010A9C, + +REG64( EQ_DRAM_REF_REG , RULL(0x1001180F), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011C0F, +REG64( EQ_0_DRAM_REF_REG , RULL(0x1001180F), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011C0F, +REG64( EQ_1_DRAM_REF_REG , RULL(0x1101180F), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011C0F, +REG64( EQ_2_DRAM_REF_REG , RULL(0x1201180F), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011C0F, +REG64( EQ_3_DRAM_REF_REG , RULL(0x1301180F), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011C0F, +REG64( EQ_4_DRAM_REF_REG , RULL(0x1401180F), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011C0F, +REG64( EQ_5_DRAM_REF_REG , RULL(0x1501180F), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011C0F, +REG64( EX_DRAM_REF_REG , RULL(0x1001180F), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_DRAM_REF_REG , RULL(0x1001180F), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_DRAM_REF_REG , RULL(0x10011C0F), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_DRAM_REF_REG , RULL(0x1101180F), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_DRAM_REF_REG , RULL(0x11011C0F), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_DRAM_REF_REG , RULL(0x1201180F), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_DRAM_REF_REG , RULL(0x12011C0F), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_DRAM_REF_REG , RULL(0x1301180F), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_DRAM_REF_REG , RULL(0x13011C0F), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_DRAM_REF_REG , RULL(0x1401180F), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_DRAM_REF_REG , RULL(0x14011C0F), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_DRAM_REF_REG , RULL(0x1501180F), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_DRAM_REF_REG , RULL(0x15011C0F), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( C_DTS_RESULT0 , RULL(0x20050000), SH_UNT_C , SH_ACS_SCOM_RO ); +REG64( C_0_DTS_RESULT0 , RULL(0x20050000), SH_UNT_C_0 , SH_ACS_SCOM_RO ); +REG64( C_1_DTS_RESULT0 , RULL(0x21050000), SH_UNT_C_1 , SH_ACS_SCOM_RO ); +REG64( C_2_DTS_RESULT0 , RULL(0x22050000), SH_UNT_C_2 , SH_ACS_SCOM_RO ); +REG64( C_3_DTS_RESULT0 , RULL(0x23050000), SH_UNT_C_3 , SH_ACS_SCOM_RO ); +REG64( C_4_DTS_RESULT0 , RULL(0x24050000), SH_UNT_C_4 , SH_ACS_SCOM_RO ); +REG64( C_5_DTS_RESULT0 , RULL(0x25050000), SH_UNT_C_5 , SH_ACS_SCOM_RO ); +REG64( C_6_DTS_RESULT0 , RULL(0x26050000), SH_UNT_C_6 , SH_ACS_SCOM_RO ); +REG64( C_7_DTS_RESULT0 , RULL(0x27050000), SH_UNT_C_7 , SH_ACS_SCOM_RO ); +REG64( C_8_DTS_RESULT0 , RULL(0x28050000), SH_UNT_C_8 , SH_ACS_SCOM_RO ); +REG64( C_9_DTS_RESULT0 , RULL(0x29050000), SH_UNT_C_9 , SH_ACS_SCOM_RO ); +REG64( C_10_DTS_RESULT0 , RULL(0x2A050000), SH_UNT_C_10 , SH_ACS_SCOM_RO ); +REG64( C_11_DTS_RESULT0 , RULL(0x2B050000), SH_UNT_C_11 , SH_ACS_SCOM_RO ); +REG64( C_12_DTS_RESULT0 , RULL(0x2C050000), SH_UNT_C_12 , SH_ACS_SCOM_RO ); +REG64( C_13_DTS_RESULT0 , RULL(0x2D050000), SH_UNT_C_13 , SH_ACS_SCOM_RO ); +REG64( C_14_DTS_RESULT0 , RULL(0x2E050000), SH_UNT_C_14 , SH_ACS_SCOM_RO ); +REG64( C_15_DTS_RESULT0 , RULL(0x2F050000), SH_UNT_C_15 , SH_ACS_SCOM_RO ); +REG64( C_16_DTS_RESULT0 , RULL(0x30050000), SH_UNT_C_16 , SH_ACS_SCOM_RO ); +REG64( C_17_DTS_RESULT0 , RULL(0x31050000), SH_UNT_C_17 , SH_ACS_SCOM_RO ); +REG64( C_18_DTS_RESULT0 , RULL(0x32050000), SH_UNT_C_18 , SH_ACS_SCOM_RO ); +REG64( C_19_DTS_RESULT0 , RULL(0x33050000), SH_UNT_C_19 , SH_ACS_SCOM_RO ); +REG64( C_20_DTS_RESULT0 , RULL(0x34050000), SH_UNT_C_20 , SH_ACS_SCOM_RO ); +REG64( C_21_DTS_RESULT0 , RULL(0x35050000), SH_UNT_C_21 , SH_ACS_SCOM_RO ); +REG64( C_22_DTS_RESULT0 , RULL(0x36050000), SH_UNT_C_22 , SH_ACS_SCOM_RO ); +REG64( C_23_DTS_RESULT0 , RULL(0x37050000), SH_UNT_C_23 , SH_ACS_SCOM_RO ); +REG64( EQ_DTS_RESULT0 , RULL(0x10050000), SH_UNT_EQ , SH_ACS_SCOM_RO ); +REG64( EQ_0_DTS_RESULT0 , RULL(0x10050000), SH_UNT_EQ_0 , SH_ACS_SCOM_RO ); +REG64( EQ_1_DTS_RESULT0 , RULL(0x11050000), SH_UNT_EQ_1 , SH_ACS_SCOM_RO ); +REG64( EQ_2_DTS_RESULT0 , RULL(0x12050000), SH_UNT_EQ_2 , SH_ACS_SCOM_RO ); +REG64( EQ_3_DTS_RESULT0 , RULL(0x13050000), SH_UNT_EQ_3 , SH_ACS_SCOM_RO ); +REG64( EQ_4_DTS_RESULT0 , RULL(0x14050000), SH_UNT_EQ_4 , SH_ACS_SCOM_RO ); +REG64( EQ_5_DTS_RESULT0 , RULL(0x15050000), SH_UNT_EQ_5 , SH_ACS_SCOM_RO ); +REG64( EX_DTS_RESULT0 , RULL(0x20050000), SH_UNT_EX , + SH_ACS_SCOM_RO ); //DUPS: 21050000, +REG64( EX_0_DTS_RESULT0 , RULL(0x20050000), SH_UNT_EX_0 , + SH_ACS_SCOM_RO ); //DUPS: 21050000, +REG64( EX_1_DTS_RESULT0 , RULL(0x22050000), SH_UNT_EX_1 , + SH_ACS_SCOM_RO ); //DUPS: 23050000, +REG64( EX_2_DTS_RESULT0 , RULL(0x24050000), SH_UNT_EX_2 , + SH_ACS_SCOM_RO ); //DUPS: 25050000, +REG64( EX_3_DTS_RESULT0 , RULL(0x26050000), SH_UNT_EX_3 , + SH_ACS_SCOM_RO ); //DUPS: 27050000, +REG64( EX_4_DTS_RESULT0 , RULL(0x28050000), SH_UNT_EX_4 , + SH_ACS_SCOM_RO ); //DUPS: 29050000, +REG64( EX_5_DTS_RESULT0 , RULL(0x2A050000), SH_UNT_EX_5 , + SH_ACS_SCOM_RO ); //DUPS: 2B050000, +REG64( EX_6_DTS_RESULT0 , RULL(0x2C050000), SH_UNT_EX_6 , + SH_ACS_SCOM_RO ); //DUPS: 2D050000, +REG64( EX_7_DTS_RESULT0 , RULL(0x2E050000), SH_UNT_EX_7 , + SH_ACS_SCOM_RO ); //DUPS: 2F050000, +REG64( EX_8_DTS_RESULT0 , RULL(0x30050000), SH_UNT_EX_8 , + SH_ACS_SCOM_RO ); //DUPS: 31050000, +REG64( EX_9_DTS_RESULT0 , RULL(0x32050000), SH_UNT_EX_9 , + SH_ACS_SCOM_RO ); //DUPS: 33050000, +REG64( EX_10_DTS_RESULT0 , RULL(0x34050000), SH_UNT_EX_10 , + SH_ACS_SCOM_RO ); //DUPS: 35050000, +REG64( EX_11_DTS_RESULT0 , RULL(0x36050000), SH_UNT_EX_11 , + SH_ACS_SCOM_RO ); //DUPS: 37050000, + +REG64( C_DTS_TRC_RESULT , RULL(0x20050003), SH_UNT_C , SH_ACS_SCOM_RO ); +REG64( C_0_DTS_TRC_RESULT , RULL(0x20050003), SH_UNT_C_0 , SH_ACS_SCOM_RO ); +REG64( C_1_DTS_TRC_RESULT , RULL(0x21050003), SH_UNT_C_1 , SH_ACS_SCOM_RO ); +REG64( C_2_DTS_TRC_RESULT , RULL(0x22050003), SH_UNT_C_2 , SH_ACS_SCOM_RO ); +REG64( C_3_DTS_TRC_RESULT , RULL(0x23050003), SH_UNT_C_3 , SH_ACS_SCOM_RO ); +REG64( C_4_DTS_TRC_RESULT , RULL(0x24050003), SH_UNT_C_4 , SH_ACS_SCOM_RO ); +REG64( C_5_DTS_TRC_RESULT , RULL(0x25050003), SH_UNT_C_5 , SH_ACS_SCOM_RO ); +REG64( C_6_DTS_TRC_RESULT , RULL(0x26050003), SH_UNT_C_6 , SH_ACS_SCOM_RO ); +REG64( C_7_DTS_TRC_RESULT , RULL(0x27050003), SH_UNT_C_7 , SH_ACS_SCOM_RO ); +REG64( C_8_DTS_TRC_RESULT , RULL(0x28050003), SH_UNT_C_8 , SH_ACS_SCOM_RO ); +REG64( C_9_DTS_TRC_RESULT , RULL(0x29050003), SH_UNT_C_9 , SH_ACS_SCOM_RO ); +REG64( C_10_DTS_TRC_RESULT , RULL(0x2A050003), SH_UNT_C_10 , SH_ACS_SCOM_RO ); +REG64( C_11_DTS_TRC_RESULT , RULL(0x2B050003), SH_UNT_C_11 , SH_ACS_SCOM_RO ); +REG64( C_12_DTS_TRC_RESULT , RULL(0x2C050003), SH_UNT_C_12 , SH_ACS_SCOM_RO ); +REG64( C_13_DTS_TRC_RESULT , RULL(0x2D050003), SH_UNT_C_13 , SH_ACS_SCOM_RO ); +REG64( C_14_DTS_TRC_RESULT , RULL(0x2E050003), SH_UNT_C_14 , SH_ACS_SCOM_RO ); +REG64( C_15_DTS_TRC_RESULT , RULL(0x2F050003), SH_UNT_C_15 , SH_ACS_SCOM_RO ); +REG64( C_16_DTS_TRC_RESULT , RULL(0x30050003), SH_UNT_C_16 , SH_ACS_SCOM_RO ); +REG64( C_17_DTS_TRC_RESULT , RULL(0x31050003), SH_UNT_C_17 , SH_ACS_SCOM_RO ); +REG64( C_18_DTS_TRC_RESULT , RULL(0x32050003), SH_UNT_C_18 , SH_ACS_SCOM_RO ); +REG64( C_19_DTS_TRC_RESULT , RULL(0x33050003), SH_UNT_C_19 , SH_ACS_SCOM_RO ); +REG64( C_20_DTS_TRC_RESULT , RULL(0x34050003), SH_UNT_C_20 , SH_ACS_SCOM_RO ); +REG64( C_21_DTS_TRC_RESULT , RULL(0x35050003), SH_UNT_C_21 , SH_ACS_SCOM_RO ); +REG64( C_22_DTS_TRC_RESULT , RULL(0x36050003), SH_UNT_C_22 , SH_ACS_SCOM_RO ); +REG64( C_23_DTS_TRC_RESULT , RULL(0x37050003), SH_UNT_C_23 , SH_ACS_SCOM_RO ); +REG64( EQ_DTS_TRC_RESULT , RULL(0x10050003), SH_UNT_EQ , SH_ACS_SCOM_RO ); +REG64( EQ_0_DTS_TRC_RESULT , RULL(0x10050003), SH_UNT_EQ_0 , SH_ACS_SCOM_RO ); +REG64( EQ_1_DTS_TRC_RESULT , RULL(0x11050003), SH_UNT_EQ_1 , SH_ACS_SCOM_RO ); +REG64( EQ_2_DTS_TRC_RESULT , RULL(0x12050003), SH_UNT_EQ_2 , SH_ACS_SCOM_RO ); +REG64( EQ_3_DTS_TRC_RESULT , RULL(0x13050003), SH_UNT_EQ_3 , SH_ACS_SCOM_RO ); +REG64( EQ_4_DTS_TRC_RESULT , RULL(0x14050003), SH_UNT_EQ_4 , SH_ACS_SCOM_RO ); +REG64( EQ_5_DTS_TRC_RESULT , RULL(0x15050003), SH_UNT_EQ_5 , SH_ACS_SCOM_RO ); +REG64( EX_DTS_TRC_RESULT , RULL(0x20050003), SH_UNT_EX , + SH_ACS_SCOM_RO ); //DUPS: 21050003, +REG64( EX_0_DTS_TRC_RESULT , RULL(0x20050003), SH_UNT_EX_0 , + SH_ACS_SCOM_RO ); //DUPS: 21050003, +REG64( EX_1_DTS_TRC_RESULT , RULL(0x22050003), SH_UNT_EX_1 , + SH_ACS_SCOM_RO ); //DUPS: 23050003, +REG64( EX_2_DTS_TRC_RESULT , RULL(0x24050003), SH_UNT_EX_2 , + SH_ACS_SCOM_RO ); //DUPS: 25050003, +REG64( EX_3_DTS_TRC_RESULT , RULL(0x26050003), SH_UNT_EX_3 , + SH_ACS_SCOM_RO ); //DUPS: 27050003, +REG64( EX_4_DTS_TRC_RESULT , RULL(0x28050003), SH_UNT_EX_4 , + SH_ACS_SCOM_RO ); //DUPS: 29050003, +REG64( EX_5_DTS_TRC_RESULT , RULL(0x2A050003), SH_UNT_EX_5 , + SH_ACS_SCOM_RO ); //DUPS: 2B050003, +REG64( EX_6_DTS_TRC_RESULT , RULL(0x2C050003), SH_UNT_EX_6 , + SH_ACS_SCOM_RO ); //DUPS: 2D050003, +REG64( EX_7_DTS_TRC_RESULT , RULL(0x2E050003), SH_UNT_EX_7 , + SH_ACS_SCOM_RO ); //DUPS: 2F050003, +REG64( EX_8_DTS_TRC_RESULT , RULL(0x30050003), SH_UNT_EX_8 , + SH_ACS_SCOM_RO ); //DUPS: 31050003, +REG64( EX_9_DTS_TRC_RESULT , RULL(0x32050003), SH_UNT_EX_9 , + SH_ACS_SCOM_RO ); //DUPS: 33050003, +REG64( EX_10_DTS_TRC_RESULT , RULL(0x34050003), SH_UNT_EX_10 , + SH_ACS_SCOM_RO ); //DUPS: 35050003, +REG64( EX_11_DTS_TRC_RESULT , RULL(0x36050003), SH_UNT_EX_11 , + SH_ACS_SCOM_RO ); //DUPS: 37050003, + +REG64( EQ_EDRAM_BANK_FAIL , RULL(0x1001181B), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011C1B, +REG64( EQ_0_EDRAM_BANK_FAIL , RULL(0x1001181B), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011C1B, +REG64( EQ_1_EDRAM_BANK_FAIL , RULL(0x1101181B), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011C1B, +REG64( EQ_2_EDRAM_BANK_FAIL , RULL(0x1201181B), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011C1B, +REG64( EQ_3_EDRAM_BANK_FAIL , RULL(0x1301181B), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011C1B, +REG64( EQ_4_EDRAM_BANK_FAIL , RULL(0x1401181B), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011C1B, +REG64( EQ_5_EDRAM_BANK_FAIL , RULL(0x1501181B), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011C1B, +REG64( EX_0_L3_EDRAM_BANK_FAIL , RULL(0x1001181B), SH_UNT_EX_0_L3 , SH_ACS_SCOM ); +REG64( EX_10_L3_EDRAM_BANK_FAIL , RULL(0x1501181B), SH_UNT_EX_10_L3 , SH_ACS_SCOM ); +REG64( EX_11_L3_EDRAM_BANK_FAIL , RULL(0x15011C1B), SH_UNT_EX_11_L3 , SH_ACS_SCOM ); +REG64( EX_1_L3_EDRAM_BANK_FAIL , RULL(0x10011C1B), SH_UNT_EX_1_L3 , SH_ACS_SCOM ); +REG64( EX_2_L3_EDRAM_BANK_FAIL , RULL(0x1101181B), SH_UNT_EX_2_L3 , SH_ACS_SCOM ); +REG64( EX_3_L3_EDRAM_BANK_FAIL , RULL(0x11011C1B), SH_UNT_EX_3_L3 , SH_ACS_SCOM ); +REG64( EX_4_L3_EDRAM_BANK_FAIL , RULL(0x1201181B), SH_UNT_EX_4_L3 , SH_ACS_SCOM ); +REG64( EX_5_L3_EDRAM_BANK_FAIL , RULL(0x12011C1B), SH_UNT_EX_5_L3 , SH_ACS_SCOM ); +REG64( EX_6_L3_EDRAM_BANK_FAIL , RULL(0x1301181B), SH_UNT_EX_6_L3 , SH_ACS_SCOM ); +REG64( EX_7_L3_EDRAM_BANK_FAIL , RULL(0x13011C1B), SH_UNT_EX_7_L3 , SH_ACS_SCOM ); +REG64( EX_8_L3_EDRAM_BANK_FAIL , RULL(0x1401181B), SH_UNT_EX_8_L3 , SH_ACS_SCOM ); +REG64( EX_9_L3_EDRAM_BANK_FAIL , RULL(0x14011C1B), SH_UNT_EX_9_L3 , SH_ACS_SCOM ); +REG64( EX_L3_EDRAM_BANK_FAIL , RULL(0x1001181B), SH_UNT_EX_L3 , SH_ACS_SCOM ); + +REG64( EQ_EDRAM_BANK_SOFT_DIS , RULL(0x1001180B), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011C0B, +REG64( EQ_0_EDRAM_BANK_SOFT_DIS , RULL(0x1001180B), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011C0B, +REG64( EQ_1_EDRAM_BANK_SOFT_DIS , RULL(0x1101180B), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011C0B, +REG64( EQ_2_EDRAM_BANK_SOFT_DIS , RULL(0x1201180B), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011C0B, +REG64( EQ_3_EDRAM_BANK_SOFT_DIS , RULL(0x1301180B), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011C0B, +REG64( EQ_4_EDRAM_BANK_SOFT_DIS , RULL(0x1401180B), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011C0B, +REG64( EQ_5_EDRAM_BANK_SOFT_DIS , RULL(0x1501180B), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011C0B, +REG64( EX_0_L3_EDRAM_BANK_SOFT_DIS , RULL(0x1001180B), SH_UNT_EX_0_L3 , SH_ACS_SCOM ); +REG64( EX_10_L3_EDRAM_BANK_SOFT_DIS , RULL(0x1501180B), SH_UNT_EX_10_L3 , SH_ACS_SCOM ); +REG64( EX_11_L3_EDRAM_BANK_SOFT_DIS , RULL(0x15011C0B), SH_UNT_EX_11_L3 , SH_ACS_SCOM ); +REG64( EX_1_L3_EDRAM_BANK_SOFT_DIS , RULL(0x10011C0B), SH_UNT_EX_1_L3 , SH_ACS_SCOM ); +REG64( EX_2_L3_EDRAM_BANK_SOFT_DIS , RULL(0x1101180B), SH_UNT_EX_2_L3 , SH_ACS_SCOM ); +REG64( EX_3_L3_EDRAM_BANK_SOFT_DIS , RULL(0x11011C0B), SH_UNT_EX_3_L3 , SH_ACS_SCOM ); +REG64( EX_4_L3_EDRAM_BANK_SOFT_DIS , RULL(0x1201180B), SH_UNT_EX_4_L3 , SH_ACS_SCOM ); +REG64( EX_5_L3_EDRAM_BANK_SOFT_DIS , RULL(0x12011C0B), SH_UNT_EX_5_L3 , SH_ACS_SCOM ); +REG64( EX_6_L3_EDRAM_BANK_SOFT_DIS , RULL(0x1301180B), SH_UNT_EX_6_L3 , SH_ACS_SCOM ); +REG64( EX_7_L3_EDRAM_BANK_SOFT_DIS , RULL(0x13011C0B), SH_UNT_EX_7_L3 , SH_ACS_SCOM ); +REG64( EX_8_L3_EDRAM_BANK_SOFT_DIS , RULL(0x1401180B), SH_UNT_EX_8_L3 , SH_ACS_SCOM ); +REG64( EX_9_L3_EDRAM_BANK_SOFT_DIS , RULL(0x14011C0B), SH_UNT_EX_9_L3 , SH_ACS_SCOM ); +REG64( EX_L3_EDRAM_BANK_SOFT_DIS , RULL(0x1001180B), SH_UNT_EX_L3 , SH_ACS_SCOM ); + +REG64( EQ_EDRAM_REG , RULL(0x1001180C), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011C0C, +REG64( EQ_0_EDRAM_REG , RULL(0x1001180C), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011C0C, +REG64( EQ_1_EDRAM_REG , RULL(0x1101180C), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011C0C, +REG64( EQ_2_EDRAM_REG , RULL(0x1201180C), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011C0C, +REG64( EQ_3_EDRAM_REG , RULL(0x1301180C), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011C0C, +REG64( EQ_4_EDRAM_REG , RULL(0x1401180C), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011C0C, +REG64( EQ_5_EDRAM_REG , RULL(0x1501180C), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011C0C, +REG64( EX_0_L3_EDRAM_REG , RULL(0x1001180C), SH_UNT_EX_0_L3 , SH_ACS_SCOM ); +REG64( EX_10_L3_EDRAM_REG , RULL(0x1501180C), SH_UNT_EX_10_L3 , SH_ACS_SCOM ); +REG64( EX_11_L3_EDRAM_REG , RULL(0x15011C0C), SH_UNT_EX_11_L3 , SH_ACS_SCOM ); +REG64( EX_1_L3_EDRAM_REG , RULL(0x10011C0C), SH_UNT_EX_1_L3 , SH_ACS_SCOM ); +REG64( EX_2_L3_EDRAM_REG , RULL(0x1101180C), SH_UNT_EX_2_L3 , SH_ACS_SCOM ); +REG64( EX_3_L3_EDRAM_REG , RULL(0x11011C0C), SH_UNT_EX_3_L3 , SH_ACS_SCOM ); +REG64( EX_4_L3_EDRAM_REG , RULL(0x1201180C), SH_UNT_EX_4_L3 , SH_ACS_SCOM ); +REG64( EX_5_L3_EDRAM_REG , RULL(0x12011C0C), SH_UNT_EX_5_L3 , SH_ACS_SCOM ); +REG64( EX_6_L3_EDRAM_REG , RULL(0x1301180C), SH_UNT_EX_6_L3 , SH_ACS_SCOM ); +REG64( EX_7_L3_EDRAM_REG , RULL(0x13011C0C), SH_UNT_EX_7_L3 , SH_ACS_SCOM ); +REG64( EX_8_L3_EDRAM_REG , RULL(0x1401180C), SH_UNT_EX_8_L3 , SH_ACS_SCOM ); +REG64( EX_9_L3_EDRAM_REG , RULL(0x14011C0C), SH_UNT_EX_9_L3 , SH_ACS_SCOM ); +REG64( EX_L3_EDRAM_REG , RULL(0x1001180C), SH_UNT_EX_L3 , SH_ACS_SCOM ); + +REG64( EQ_ED_RD_ERR_STAT_REG0 , RULL(0x10011819), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011C19, +REG64( EQ_0_ED_RD_ERR_STAT_REG0 , RULL(0x10011819), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011C19, +REG64( EQ_1_ED_RD_ERR_STAT_REG0 , RULL(0x11011819), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011C19, +REG64( EQ_2_ED_RD_ERR_STAT_REG0 , RULL(0x12011819), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011C19, +REG64( EQ_3_ED_RD_ERR_STAT_REG0 , RULL(0x13011819), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011C19, +REG64( EQ_4_ED_RD_ERR_STAT_REG0 , RULL(0x14011819), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011C19, +REG64( EQ_5_ED_RD_ERR_STAT_REG0 , RULL(0x15011819), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011C19, +REG64( EX_ED_RD_ERR_STAT_REG0 , RULL(0x10011819), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_ED_RD_ERR_STAT_REG0 , RULL(0x10011819), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_ED_RD_ERR_STAT_REG0 , RULL(0x10011C19), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_ED_RD_ERR_STAT_REG0 , RULL(0x11011819), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_ED_RD_ERR_STAT_REG0 , RULL(0x11011C19), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_ED_RD_ERR_STAT_REG0 , RULL(0x12011819), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_ED_RD_ERR_STAT_REG0 , RULL(0x12011C19), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_ED_RD_ERR_STAT_REG0 , RULL(0x13011819), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_ED_RD_ERR_STAT_REG0 , RULL(0x13011C19), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_ED_RD_ERR_STAT_REG0 , RULL(0x14011819), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_ED_RD_ERR_STAT_REG0 , RULL(0x14011C19), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_ED_RD_ERR_STAT_REG0 , RULL(0x15011819), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_ED_RD_ERR_STAT_REG0 , RULL(0x15011C19), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( EQ_ED_RD_ERR_STAT_REG1 , RULL(0x1001181A), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011C1A, +REG64( EQ_0_ED_RD_ERR_STAT_REG1 , RULL(0x1001181A), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011C1A, +REG64( EQ_1_ED_RD_ERR_STAT_REG1 , RULL(0x1101181A), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011C1A, +REG64( EQ_2_ED_RD_ERR_STAT_REG1 , RULL(0x1201181A), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011C1A, +REG64( EQ_3_ED_RD_ERR_STAT_REG1 , RULL(0x1301181A), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011C1A, +REG64( EQ_4_ED_RD_ERR_STAT_REG1 , RULL(0x1401181A), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011C1A, +REG64( EQ_5_ED_RD_ERR_STAT_REG1 , RULL(0x1501181A), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011C1A, +REG64( EX_0_L3_ED_RD_ERR_STAT_REG1 , RULL(0x1001181A), SH_UNT_EX_0_L3 , SH_ACS_SCOM ); +REG64( EX_10_L3_ED_RD_ERR_STAT_REG1 , RULL(0x1501181A), SH_UNT_EX_10_L3 , SH_ACS_SCOM ); +REG64( EX_11_L3_ED_RD_ERR_STAT_REG1 , RULL(0x15011C1A), SH_UNT_EX_11_L3 , SH_ACS_SCOM ); +REG64( EX_1_L3_ED_RD_ERR_STAT_REG1 , RULL(0x10011C1A), SH_UNT_EX_1_L3 , SH_ACS_SCOM ); +REG64( EX_2_L3_ED_RD_ERR_STAT_REG1 , RULL(0x1101181A), SH_UNT_EX_2_L3 , SH_ACS_SCOM ); +REG64( EX_3_L3_ED_RD_ERR_STAT_REG1 , RULL(0x11011C1A), SH_UNT_EX_3_L3 , SH_ACS_SCOM ); +REG64( EX_4_L3_ED_RD_ERR_STAT_REG1 , RULL(0x1201181A), SH_UNT_EX_4_L3 , SH_ACS_SCOM ); +REG64( EX_5_L3_ED_RD_ERR_STAT_REG1 , RULL(0x12011C1A), SH_UNT_EX_5_L3 , SH_ACS_SCOM ); +REG64( EX_6_L3_ED_RD_ERR_STAT_REG1 , RULL(0x1301181A), SH_UNT_EX_6_L3 , SH_ACS_SCOM ); +REG64( EX_7_L3_ED_RD_ERR_STAT_REG1 , RULL(0x13011C1A), SH_UNT_EX_7_L3 , SH_ACS_SCOM ); +REG64( EX_8_L3_ED_RD_ERR_STAT_REG1 , RULL(0x1401181A), SH_UNT_EX_8_L3 , SH_ACS_SCOM ); +REG64( EX_9_L3_ED_RD_ERR_STAT_REG1 , RULL(0x14011C1A), SH_UNT_EX_9_L3 , SH_ACS_SCOM ); +REG64( EX_L3_ED_RD_ERR_STAT_REG1 , RULL(0x1001181A), SH_UNT_EX_L3 , SH_ACS_SCOM ); + +REG64( C_ERROR_REG , RULL(0x200F001F), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_ERROR_REG , RULL(0x200F001F), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_ERROR_REG , RULL(0x210F001F), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_ERROR_REG , RULL(0x220F001F), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_ERROR_REG , RULL(0x230F001F), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_ERROR_REG , RULL(0x240F001F), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_ERROR_REG , RULL(0x250F001F), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_ERROR_REG , RULL(0x260F001F), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_ERROR_REG , RULL(0x270F001F), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_ERROR_REG , RULL(0x280F001F), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_ERROR_REG , RULL(0x290F001F), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_ERROR_REG , RULL(0x2A0F001F), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_ERROR_REG , RULL(0x2B0F001F), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_ERROR_REG , RULL(0x2C0F001F), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_ERROR_REG , RULL(0x2D0F001F), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_ERROR_REG , RULL(0x2E0F001F), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_ERROR_REG , RULL(0x2F0F001F), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_ERROR_REG , RULL(0x300F001F), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_ERROR_REG , RULL(0x310F001F), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_ERROR_REG , RULL(0x320F001F), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_ERROR_REG , RULL(0x330F001F), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_ERROR_REG , RULL(0x340F001F), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_ERROR_REG , RULL(0x350F001F), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_ERROR_REG , RULL(0x360F001F), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_ERROR_REG , RULL(0x370F001F), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_ERROR_REG , RULL(0x100F001F), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_ERROR_REG , RULL(0x100F001F), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_ERROR_REG , RULL(0x110F001F), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_ERROR_REG , RULL(0x120F001F), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_ERROR_REG , RULL(0x130F001F), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_ERROR_REG , RULL(0x140F001F), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_ERROR_REG , RULL(0x150F001F), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_ERROR_REG , RULL(0x200F001F), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F001F, +REG64( EX_0_ERROR_REG , RULL(0x200F001F), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F001F, +REG64( EX_1_ERROR_REG , RULL(0x230F001F), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F001F, +REG64( EX_2_ERROR_REG , RULL(0x240F001F), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F001F, +REG64( EX_3_ERROR_REG , RULL(0x260F001F), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F001F, +REG64( EX_4_ERROR_REG , RULL(0x280F001F), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F001F, +REG64( EX_5_ERROR_REG , RULL(0x2A0F001F), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F001F, +REG64( EX_6_ERROR_REG , RULL(0x2C0F001F), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F001F, +REG64( EX_7_ERROR_REG , RULL(0x2E0F001F), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F001F, +REG64( EX_8_ERROR_REG , RULL(0x300F001F), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F001F, +REG64( EX_9_ERROR_REG , RULL(0x320F001F), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F001F, +REG64( EX_10_ERROR_REG , RULL(0x340F001F), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F001F, +REG64( EX_11_ERROR_REG , RULL(0x360F001F), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F001F, + +REG64( C_ERROR_STATUS , RULL(0x2003000F), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_ERROR_STATUS , RULL(0x2003000F), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_ERROR_STATUS , RULL(0x2103000F), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_ERROR_STATUS , RULL(0x2203000F), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_ERROR_STATUS , RULL(0x2303000F), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_ERROR_STATUS , RULL(0x2403000F), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_ERROR_STATUS , RULL(0x2503000F), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_ERROR_STATUS , RULL(0x2603000F), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_ERROR_STATUS , RULL(0x2703000F), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_ERROR_STATUS , RULL(0x2803000F), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_ERROR_STATUS , RULL(0x2903000F), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_ERROR_STATUS , RULL(0x2A03000F), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_ERROR_STATUS , RULL(0x2B03000F), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_ERROR_STATUS , RULL(0x2C03000F), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_ERROR_STATUS , RULL(0x2D03000F), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_ERROR_STATUS , RULL(0x2E03000F), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_ERROR_STATUS , RULL(0x2F03000F), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_ERROR_STATUS , RULL(0x3003000F), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_ERROR_STATUS , RULL(0x3103000F), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_ERROR_STATUS , RULL(0x3203000F), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_ERROR_STATUS , RULL(0x3303000F), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_ERROR_STATUS , RULL(0x3403000F), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_ERROR_STATUS , RULL(0x3503000F), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_ERROR_STATUS , RULL(0x3603000F), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_ERROR_STATUS , RULL(0x3703000F), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_ERROR_STATUS , RULL(0x1003000F), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_ERROR_STATUS , RULL(0x1003000F), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_ERROR_STATUS , RULL(0x1103000F), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_ERROR_STATUS , RULL(0x1203000F), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_ERROR_STATUS , RULL(0x1303000F), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_ERROR_STATUS , RULL(0x1403000F), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_ERROR_STATUS , RULL(0x1503000F), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_ERROR_STATUS , RULL(0x2003000F), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 2103000F, +REG64( EX_0_ERROR_STATUS , RULL(0x2003000F), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 2103000F, +REG64( EX_1_ERROR_STATUS , RULL(0x2203000F), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 2303000F, +REG64( EX_2_ERROR_STATUS , RULL(0x2403000F), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 2503000F, +REG64( EX_3_ERROR_STATUS , RULL(0x2603000F), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 2703000F, +REG64( EX_4_ERROR_STATUS , RULL(0x2803000F), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 2903000F, +REG64( EX_5_ERROR_STATUS , RULL(0x2A03000F), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B03000F, +REG64( EX_6_ERROR_STATUS , RULL(0x2C03000F), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D03000F, +REG64( EX_7_ERROR_STATUS , RULL(0x2E03000F), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F03000F, +REG64( EX_8_ERROR_STATUS , RULL(0x3003000F), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 3103000F, +REG64( EX_9_ERROR_STATUS , RULL(0x3203000F), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 3303000F, +REG64( EX_10_ERROR_STATUS , RULL(0x3403000F), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 3503000F, +REG64( EX_11_ERROR_STATUS , RULL(0x3603000F), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 3703000F, + +REG64( CAPP_ERRRPT , RULL(0x0201080B), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_ERRRPT , RULL(0x0201080B), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_ERRRPT , RULL(0x0401080B), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( EQ_ERR_INJ_REG , RULL(0x1001080C), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 1001180D, 10010C0C, 10011C0D, +REG64( EQ_0_ERR_INJ_REG , RULL(0x1001080C), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 1001180D, 10010C0C, 10011C0D, +REG64( EQ_1_ERR_INJ_REG , RULL(0x1101080C), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 1101180D, 11010C0C, 11011C0D, +REG64( EQ_2_ERR_INJ_REG , RULL(0x1201080C), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 1201180D, 12010C0C, 12011C0D, +REG64( EQ_3_ERR_INJ_REG , RULL(0x1301080C), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 1301180D, 13010C0C, 13011C0D, +REG64( EQ_4_ERR_INJ_REG , RULL(0x1401080C), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 1401180D, 14010C0C, 14011C0D, +REG64( EQ_5_ERR_INJ_REG , RULL(0x1501080C), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 1501180D, 15010C0C, 15011C0D, +REG64( EX_0_L2_ERR_INJ_REG , RULL(0x1001080C), SH_UNT_EX_0_L2 , SH_ACS_SCOM ); +REG64( EX_0_L3_ERR_INJ_REG , RULL(0x1001180D), SH_UNT_EX_0_L3 , SH_ACS_SCOM ); +REG64( EX_10_L2_ERR_INJ_REG , RULL(0x1501080C), SH_UNT_EX_10_L2 , SH_ACS_SCOM ); +REG64( EX_10_L3_ERR_INJ_REG , RULL(0x1501180D), SH_UNT_EX_10_L3 , SH_ACS_SCOM ); +REG64( EX_11_L2_ERR_INJ_REG , RULL(0x15010C0C), SH_UNT_EX_11_L2 , SH_ACS_SCOM ); +REG64( EX_11_L3_ERR_INJ_REG , RULL(0x15011C0D), SH_UNT_EX_11_L3 , SH_ACS_SCOM ); +REG64( EX_1_L2_ERR_INJ_REG , RULL(0x10010C0C), SH_UNT_EX_1_L2 , SH_ACS_SCOM ); +REG64( EX_1_L3_ERR_INJ_REG , RULL(0x10011C0D), SH_UNT_EX_1_L3 , SH_ACS_SCOM ); +REG64( EX_2_L2_ERR_INJ_REG , RULL(0x1101080C), SH_UNT_EX_2_L2 , SH_ACS_SCOM ); +REG64( EX_2_L3_ERR_INJ_REG , RULL(0x1101180D), SH_UNT_EX_2_L3 , SH_ACS_SCOM ); +REG64( EX_3_L2_ERR_INJ_REG , RULL(0x11010C0C), SH_UNT_EX_3_L2 , SH_ACS_SCOM ); +REG64( EX_3_L3_ERR_INJ_REG , RULL(0x11011C0D), SH_UNT_EX_3_L3 , SH_ACS_SCOM ); +REG64( EX_4_L2_ERR_INJ_REG , RULL(0x1201080C), SH_UNT_EX_4_L2 , SH_ACS_SCOM ); +REG64( EX_4_L3_ERR_INJ_REG , RULL(0x1201180D), SH_UNT_EX_4_L3 , SH_ACS_SCOM ); +REG64( EX_5_L2_ERR_INJ_REG , RULL(0x12010C0C), SH_UNT_EX_5_L2 , SH_ACS_SCOM ); +REG64( EX_5_L3_ERR_INJ_REG , RULL(0x12011C0D), SH_UNT_EX_5_L3 , SH_ACS_SCOM ); +REG64( EX_6_L2_ERR_INJ_REG , RULL(0x1301080C), SH_UNT_EX_6_L2 , SH_ACS_SCOM ); +REG64( EX_6_L3_ERR_INJ_REG , RULL(0x1301180D), SH_UNT_EX_6_L3 , SH_ACS_SCOM ); +REG64( EX_7_L2_ERR_INJ_REG , RULL(0x13010C0C), SH_UNT_EX_7_L2 , SH_ACS_SCOM ); +REG64( EX_7_L3_ERR_INJ_REG , RULL(0x13011C0D), SH_UNT_EX_7_L3 , SH_ACS_SCOM ); +REG64( EX_8_L2_ERR_INJ_REG , RULL(0x1401080C), SH_UNT_EX_8_L2 , SH_ACS_SCOM ); +REG64( EX_8_L3_ERR_INJ_REG , RULL(0x1401180D), SH_UNT_EX_8_L3 , SH_ACS_SCOM ); +REG64( EX_9_L2_ERR_INJ_REG , RULL(0x14010C0C), SH_UNT_EX_9_L2 , SH_ACS_SCOM ); +REG64( EX_9_L3_ERR_INJ_REG , RULL(0x14011C0D), SH_UNT_EX_9_L3 , SH_ACS_SCOM ); +REG64( EX_L2_ERR_INJ_REG , RULL(0x1001080C), SH_UNT_EX_L2 , SH_ACS_SCOM ); +REG64( EX_L3_ERR_INJ_REG , RULL(0x1001180D), SH_UNT_EX_L3 , SH_ACS_SCOM ); + +REG64( EQ_ERR_RPT0 , RULL(0x10010812), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10010C12, +REG64( EQ_0_ERR_RPT0 , RULL(0x10010812), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10010C12, +REG64( EQ_1_ERR_RPT0 , RULL(0x11010812), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11010C12, +REG64( EQ_2_ERR_RPT0 , RULL(0x12010812), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12010C12, +REG64( EQ_3_ERR_RPT0 , RULL(0x13010812), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13010C12, +REG64( EQ_4_ERR_RPT0 , RULL(0x14010812), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14010C12, +REG64( EQ_5_ERR_RPT0 , RULL(0x15010812), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15010C12, +REG64( EX_0_L2_ERR_RPT0 , RULL(0x10010812), SH_UNT_EX_0_L2 , SH_ACS_SCOM ); +REG64( EX_10_L2_ERR_RPT0 , RULL(0x15010812), SH_UNT_EX_10_L2 , SH_ACS_SCOM ); +REG64( EX_11_L2_ERR_RPT0 , RULL(0x15010C12), SH_UNT_EX_11_L2 , SH_ACS_SCOM ); +REG64( EX_1_L2_ERR_RPT0 , RULL(0x10010C12), SH_UNT_EX_1_L2 , SH_ACS_SCOM ); +REG64( EX_2_L2_ERR_RPT0 , RULL(0x11010812), SH_UNT_EX_2_L2 , SH_ACS_SCOM ); +REG64( EX_3_L2_ERR_RPT0 , RULL(0x11010C12), SH_UNT_EX_3_L2 , SH_ACS_SCOM ); +REG64( EX_4_L2_ERR_RPT0 , RULL(0x12010812), SH_UNT_EX_4_L2 , SH_ACS_SCOM ); +REG64( EX_5_L2_ERR_RPT0 , RULL(0x12010C12), SH_UNT_EX_5_L2 , SH_ACS_SCOM ); +REG64( EX_6_L2_ERR_RPT0 , RULL(0x13010812), SH_UNT_EX_6_L2 , SH_ACS_SCOM ); +REG64( EX_7_L2_ERR_RPT0 , RULL(0x13010C12), SH_UNT_EX_7_L2 , SH_ACS_SCOM ); +REG64( EX_8_L2_ERR_RPT0 , RULL(0x14010812), SH_UNT_EX_8_L2 , SH_ACS_SCOM ); +REG64( EX_9_L2_ERR_RPT0 , RULL(0x14010C12), SH_UNT_EX_9_L2 , SH_ACS_SCOM ); +REG64( EX_L2_ERR_RPT0 , RULL(0x10010812), SH_UNT_EX_L2 , SH_ACS_SCOM ); + +REG64( EQ_ERR_RPT1 , RULL(0x10010813), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10010C13, +REG64( EQ_0_ERR_RPT1 , RULL(0x10010813), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10010C13, +REG64( EQ_1_ERR_RPT1 , RULL(0x11010813), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11010C13, +REG64( EQ_2_ERR_RPT1 , RULL(0x12010813), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12010C13, +REG64( EQ_3_ERR_RPT1 , RULL(0x13010813), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13010C13, +REG64( EQ_4_ERR_RPT1 , RULL(0x14010813), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14010C13, +REG64( EQ_5_ERR_RPT1 , RULL(0x15010813), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15010C13, +REG64( EX_0_L2_ERR_RPT1 , RULL(0x10010813), SH_UNT_EX_0_L2 , SH_ACS_SCOM ); +REG64( EX_10_L2_ERR_RPT1 , RULL(0x15010813), SH_UNT_EX_10_L2 , SH_ACS_SCOM ); +REG64( EX_11_L2_ERR_RPT1 , RULL(0x15010C13), SH_UNT_EX_11_L2 , SH_ACS_SCOM ); +REG64( EX_1_L2_ERR_RPT1 , RULL(0x10010C13), SH_UNT_EX_1_L2 , SH_ACS_SCOM ); +REG64( EX_2_L2_ERR_RPT1 , RULL(0x11010813), SH_UNT_EX_2_L2 , SH_ACS_SCOM ); +REG64( EX_3_L2_ERR_RPT1 , RULL(0x11010C13), SH_UNT_EX_3_L2 , SH_ACS_SCOM ); +REG64( EX_4_L2_ERR_RPT1 , RULL(0x12010813), SH_UNT_EX_4_L2 , SH_ACS_SCOM ); +REG64( EX_5_L2_ERR_RPT1 , RULL(0x12010C13), SH_UNT_EX_5_L2 , SH_ACS_SCOM ); +REG64( EX_6_L2_ERR_RPT1 , RULL(0x13010813), SH_UNT_EX_6_L2 , SH_ACS_SCOM ); +REG64( EX_7_L2_ERR_RPT1 , RULL(0x13010C13), SH_UNT_EX_7_L2 , SH_ACS_SCOM ); +REG64( EX_8_L2_ERR_RPT1 , RULL(0x14010813), SH_UNT_EX_8_L2 , SH_ACS_SCOM ); +REG64( EX_9_L2_ERR_RPT1 , RULL(0x14010C13), SH_UNT_EX_9_L2 , SH_ACS_SCOM ); +REG64( EX_L2_ERR_RPT1 , RULL(0x10010813), SH_UNT_EX_L2 , SH_ACS_SCOM ); + +REG64( EQ_ERR_RPT_REG , RULL(0x1001100E), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 1001140E, +REG64( EQ_0_ERR_RPT_REG , RULL(0x1001100E), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 1001140E, +REG64( EQ_1_ERR_RPT_REG , RULL(0x1101100E), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 1101140E, +REG64( EQ_2_ERR_RPT_REG , RULL(0x1201100E), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 1201140E, +REG64( EQ_3_ERR_RPT_REG , RULL(0x1301100E), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 1301140E, +REG64( EQ_4_ERR_RPT_REG , RULL(0x1401100E), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 1401140E, +REG64( EQ_5_ERR_RPT_REG , RULL(0x1501100E), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 1501140E, +REG64( EX_ERR_RPT_REG , RULL(0x1001100E), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_ERR_RPT_REG , RULL(0x1001100E), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_ERR_RPT_REG , RULL(0x1001140E), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_ERR_RPT_REG , RULL(0x1101100E), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_ERR_RPT_REG , RULL(0x1101140E), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_ERR_RPT_REG , RULL(0x1201100E), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_ERR_RPT_REG , RULL(0x1201140E), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_ERR_RPT_REG , RULL(0x1301100E), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_ERR_RPT_REG , RULL(0x1301140E), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_ERR_RPT_REG , RULL(0x1401100E), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_ERR_RPT_REG , RULL(0x1401140E), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_ERR_RPT_REG , RULL(0x1501100E), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_ERR_RPT_REG , RULL(0x1501140E), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( C_ERR_STATUS_REG , RULL(0x20050013), SH_UNT_C , SH_ACS_SCOM_RO ); +REG64( C_0_ERR_STATUS_REG , RULL(0x20050013), SH_UNT_C_0 , SH_ACS_SCOM_RO ); +REG64( C_1_ERR_STATUS_REG , RULL(0x21050013), SH_UNT_C_1 , SH_ACS_SCOM_RO ); +REG64( C_2_ERR_STATUS_REG , RULL(0x22050013), SH_UNT_C_2 , SH_ACS_SCOM_RO ); +REG64( C_3_ERR_STATUS_REG , RULL(0x23050013), SH_UNT_C_3 , SH_ACS_SCOM_RO ); +REG64( C_4_ERR_STATUS_REG , RULL(0x24050013), SH_UNT_C_4 , SH_ACS_SCOM_RO ); +REG64( C_5_ERR_STATUS_REG , RULL(0x25050013), SH_UNT_C_5 , SH_ACS_SCOM_RO ); +REG64( C_6_ERR_STATUS_REG , RULL(0x26050013), SH_UNT_C_6 , SH_ACS_SCOM_RO ); +REG64( C_7_ERR_STATUS_REG , RULL(0x27050013), SH_UNT_C_7 , SH_ACS_SCOM_RO ); +REG64( C_8_ERR_STATUS_REG , RULL(0x28050013), SH_UNT_C_8 , SH_ACS_SCOM_RO ); +REG64( C_9_ERR_STATUS_REG , RULL(0x29050013), SH_UNT_C_9 , SH_ACS_SCOM_RO ); +REG64( C_10_ERR_STATUS_REG , RULL(0x2A050013), SH_UNT_C_10 , SH_ACS_SCOM_RO ); +REG64( C_11_ERR_STATUS_REG , RULL(0x2B050013), SH_UNT_C_11 , SH_ACS_SCOM_RO ); +REG64( C_12_ERR_STATUS_REG , RULL(0x2C050013), SH_UNT_C_12 , SH_ACS_SCOM_RO ); +REG64( C_13_ERR_STATUS_REG , RULL(0x2D050013), SH_UNT_C_13 , SH_ACS_SCOM_RO ); +REG64( C_14_ERR_STATUS_REG , RULL(0x2E050013), SH_UNT_C_14 , SH_ACS_SCOM_RO ); +REG64( C_15_ERR_STATUS_REG , RULL(0x2F050013), SH_UNT_C_15 , SH_ACS_SCOM_RO ); +REG64( C_16_ERR_STATUS_REG , RULL(0x30050013), SH_UNT_C_16 , SH_ACS_SCOM_RO ); +REG64( C_17_ERR_STATUS_REG , RULL(0x31050013), SH_UNT_C_17 , SH_ACS_SCOM_RO ); +REG64( C_18_ERR_STATUS_REG , RULL(0x32050013), SH_UNT_C_18 , SH_ACS_SCOM_RO ); +REG64( C_19_ERR_STATUS_REG , RULL(0x33050013), SH_UNT_C_19 , SH_ACS_SCOM_RO ); +REG64( C_20_ERR_STATUS_REG , RULL(0x34050013), SH_UNT_C_20 , SH_ACS_SCOM_RO ); +REG64( C_21_ERR_STATUS_REG , RULL(0x35050013), SH_UNT_C_21 , SH_ACS_SCOM_RO ); +REG64( C_22_ERR_STATUS_REG , RULL(0x36050013), SH_UNT_C_22 , SH_ACS_SCOM_RO ); +REG64( C_23_ERR_STATUS_REG , RULL(0x37050013), SH_UNT_C_23 , SH_ACS_SCOM_RO ); +REG64( EQ_ERR_STATUS_REG , RULL(0x10050013), SH_UNT_EQ , SH_ACS_SCOM_RO ); +REG64( EQ_0_ERR_STATUS_REG , RULL(0x10050013), SH_UNT_EQ_0 , SH_ACS_SCOM_RO ); +REG64( EQ_1_ERR_STATUS_REG , RULL(0x11050013), SH_UNT_EQ_1 , SH_ACS_SCOM_RO ); +REG64( EQ_2_ERR_STATUS_REG , RULL(0x12050013), SH_UNT_EQ_2 , SH_ACS_SCOM_RO ); +REG64( EQ_3_ERR_STATUS_REG , RULL(0x13050013), SH_UNT_EQ_3 , SH_ACS_SCOM_RO ); +REG64( EQ_4_ERR_STATUS_REG , RULL(0x14050013), SH_UNT_EQ_4 , SH_ACS_SCOM_RO ); +REG64( EQ_5_ERR_STATUS_REG , RULL(0x15050013), SH_UNT_EQ_5 , SH_ACS_SCOM_RO ); +REG64( EX_ERR_STATUS_REG , RULL(0x20050013), SH_UNT_EX , + SH_ACS_SCOM_RO ); //DUPS: 21050013, +REG64( EX_0_ERR_STATUS_REG , RULL(0x20050013), SH_UNT_EX_0 , + SH_ACS_SCOM_RO ); //DUPS: 21050013, +REG64( EX_1_ERR_STATUS_REG , RULL(0x22050013), SH_UNT_EX_1 , + SH_ACS_SCOM_RO ); //DUPS: 23050013, +REG64( EX_2_ERR_STATUS_REG , RULL(0x24050013), SH_UNT_EX_2 , + SH_ACS_SCOM_RO ); //DUPS: 25050013, +REG64( EX_3_ERR_STATUS_REG , RULL(0x26050013), SH_UNT_EX_3 , + SH_ACS_SCOM_RO ); //DUPS: 27050013, +REG64( EX_4_ERR_STATUS_REG , RULL(0x28050013), SH_UNT_EX_4 , + SH_ACS_SCOM_RO ); //DUPS: 29050013, +REG64( EX_5_ERR_STATUS_REG , RULL(0x2A050013), SH_UNT_EX_5 , + SH_ACS_SCOM_RO ); //DUPS: 2B050013, +REG64( EX_6_ERR_STATUS_REG , RULL(0x2C050013), SH_UNT_EX_6 , + SH_ACS_SCOM_RO ); //DUPS: 2D050013, +REG64( EX_7_ERR_STATUS_REG , RULL(0x2E050013), SH_UNT_EX_7 , + SH_ACS_SCOM_RO ); //DUPS: 2F050013, +REG64( EX_8_ERR_STATUS_REG , RULL(0x30050013), SH_UNT_EX_8 , + SH_ACS_SCOM_RO ); //DUPS: 31050013, +REG64( EX_9_ERR_STATUS_REG , RULL(0x32050013), SH_UNT_EX_9 , + SH_ACS_SCOM_RO ); //DUPS: 33050013, +REG64( EX_10_ERR_STATUS_REG , RULL(0x34050013), SH_UNT_EX_10 , + SH_ACS_SCOM_RO ); //DUPS: 35050013, +REG64( EX_11_ERR_STATUS_REG , RULL(0x36050013), SH_UNT_EX_11 , + SH_ACS_SCOM_RO ); //DUPS: 37050013, + +REG64( CAPP_FIR_ACTION0_REG , RULL(0x02010806), SH_UNT_CAPP , SH_ACS_SCOM_RO ); +REG64( CAPP_0_FIR_ACTION0_REG , RULL(0x02010806), SH_UNT_CAPP_0 , SH_ACS_SCOM_RO ); +REG64( CAPP_1_FIR_ACTION0_REG , RULL(0x04010806), SH_UNT_CAPP_1 , SH_ACS_SCOM_RO ); +REG64( EQ_FIR_ACTION0_REG , RULL(0x10010806), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10011806, 10011006, 10010C06, 10011C06, 10011406, +REG64( EQ_0_FIR_ACTION0_REG , RULL(0x10010806), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10011806, 10011006, 10010C06, 10011C06, 10011406, +REG64( EQ_1_FIR_ACTION0_REG , RULL(0x11010806), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11011806, 11011006, 11010C06, 11011C06, 11011406, +REG64( EQ_2_FIR_ACTION0_REG , RULL(0x12010806), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12011806, 12011006, 12010C06, 12011C06, 12011406, +REG64( EQ_3_FIR_ACTION0_REG , RULL(0x13010806), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13011806, 13011006, 13010C06, 13011C06, 13011406, +REG64( EQ_4_FIR_ACTION0_REG , RULL(0x14010806), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14011806, 14011006, 14010C06, 14011C06, 14011406, +REG64( EQ_5_FIR_ACTION0_REG , RULL(0x15010806), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15011806, 15011006, 15010C06, 15011C06, 15011406, +REG64( EX_FIR_ACTION0_REG , RULL(0x10011006), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_FIR_ACTION0_REG , RULL(0x10011006), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_FIR_ACTION0_REG , RULL(0x10011406), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_FIR_ACTION0_REG , RULL(0x11011006), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_FIR_ACTION0_REG , RULL(0x11011406), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_FIR_ACTION0_REG , RULL(0x12011006), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_FIR_ACTION0_REG , RULL(0x12011406), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_FIR_ACTION0_REG , RULL(0x13011006), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_FIR_ACTION0_REG , RULL(0x13011406), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_FIR_ACTION0_REG , RULL(0x14011006), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_FIR_ACTION0_REG , RULL(0x14011406), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_FIR_ACTION0_REG , RULL(0x10010806), SH_UNT_EX_0_L2 , SH_ACS_SCOM_RW ); +REG64( EX_0_L3_FIR_ACTION0_REG , RULL(0x10011806), SH_UNT_EX_0_L3 , SH_ACS_SCOM_RW ); +REG64( EX_10_FIR_ACTION0_REG , RULL(0x15011006), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_FIR_ACTION0_REG , RULL(0x15011406), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); +REG64( EX_10_L2_FIR_ACTION0_REG , RULL(0x15010806), SH_UNT_EX_10_L2 , SH_ACS_SCOM_RW ); +REG64( EX_10_L3_FIR_ACTION0_REG , RULL(0x15011806), SH_UNT_EX_10_L3 , SH_ACS_SCOM_RW ); +REG64( EX_11_L2_FIR_ACTION0_REG , RULL(0x15010C06), SH_UNT_EX_11_L2 , SH_ACS_SCOM_RW ); +REG64( EX_11_L3_FIR_ACTION0_REG , RULL(0x15011C06), SH_UNT_EX_11_L3 , SH_ACS_SCOM_RW ); +REG64( EX_1_L2_FIR_ACTION0_REG , RULL(0x10010C06), SH_UNT_EX_1_L2 , SH_ACS_SCOM_RW ); +REG64( EX_1_L3_FIR_ACTION0_REG , RULL(0x10011C06), SH_UNT_EX_1_L3 , SH_ACS_SCOM_RW ); +REG64( EX_2_L2_FIR_ACTION0_REG , RULL(0x11010806), SH_UNT_EX_2_L2 , SH_ACS_SCOM_RW ); +REG64( EX_2_L3_FIR_ACTION0_REG , RULL(0x11011806), SH_UNT_EX_2_L3 , SH_ACS_SCOM_RW ); +REG64( EX_3_L2_FIR_ACTION0_REG , RULL(0x11010C06), SH_UNT_EX_3_L2 , SH_ACS_SCOM_RW ); +REG64( EX_3_L3_FIR_ACTION0_REG , RULL(0x11011C06), SH_UNT_EX_3_L3 , SH_ACS_SCOM_RW ); +REG64( EX_4_L2_FIR_ACTION0_REG , RULL(0x12010806), SH_UNT_EX_4_L2 , SH_ACS_SCOM_RW ); +REG64( EX_4_L3_FIR_ACTION0_REG , RULL(0x12011806), SH_UNT_EX_4_L3 , SH_ACS_SCOM_RW ); +REG64( EX_5_L2_FIR_ACTION0_REG , RULL(0x12010C06), SH_UNT_EX_5_L2 , SH_ACS_SCOM_RW ); +REG64( EX_5_L3_FIR_ACTION0_REG , RULL(0x12011C06), SH_UNT_EX_5_L3 , SH_ACS_SCOM_RW ); +REG64( EX_6_L2_FIR_ACTION0_REG , RULL(0x13010806), SH_UNT_EX_6_L2 , SH_ACS_SCOM_RW ); +REG64( EX_6_L3_FIR_ACTION0_REG , RULL(0x13011806), SH_UNT_EX_6_L3 , SH_ACS_SCOM_RW ); +REG64( EX_7_L2_FIR_ACTION0_REG , RULL(0x13010C06), SH_UNT_EX_7_L2 , SH_ACS_SCOM_RW ); +REG64( EX_7_L3_FIR_ACTION0_REG , RULL(0x13011C06), SH_UNT_EX_7_L3 , SH_ACS_SCOM_RW ); +REG64( EX_8_L2_FIR_ACTION0_REG , RULL(0x14010806), SH_UNT_EX_8_L2 , SH_ACS_SCOM_RW ); +REG64( EX_8_L3_FIR_ACTION0_REG , RULL(0x14011806), SH_UNT_EX_8_L3 , SH_ACS_SCOM_RW ); +REG64( EX_9_L2_FIR_ACTION0_REG , RULL(0x14010C06), SH_UNT_EX_9_L2 , SH_ACS_SCOM_RW ); +REG64( EX_9_L3_FIR_ACTION0_REG , RULL(0x14011C06), SH_UNT_EX_9_L3 , SH_ACS_SCOM_RW ); +REG64( EX_L2_FIR_ACTION0_REG , RULL(0x10010806), SH_UNT_EX_L2 , SH_ACS_SCOM_RW ); +REG64( EX_L3_FIR_ACTION0_REG , RULL(0x10011806), SH_UNT_EX_L3 , SH_ACS_SCOM_RW ); + +REG64( CAPP_FIR_ACTION1_REG , RULL(0x02010807), SH_UNT_CAPP , SH_ACS_SCOM_RO ); +REG64( CAPP_0_FIR_ACTION1_REG , RULL(0x02010807), SH_UNT_CAPP_0 , SH_ACS_SCOM_RO ); +REG64( CAPP_1_FIR_ACTION1_REG , RULL(0x04010807), SH_UNT_CAPP_1 , SH_ACS_SCOM_RO ); +REG64( EQ_FIR_ACTION1_REG , RULL(0x10010807), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10011807, 10011007, 10010C07, 10011C07, 10011407, +REG64( EQ_0_FIR_ACTION1_REG , RULL(0x10010807), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10011807, 10011007, 10010C07, 10011C07, 10011407, +REG64( EQ_1_FIR_ACTION1_REG , RULL(0x11010807), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11011807, 11011007, 11010C07, 11011C07, 11011407, +REG64( EQ_2_FIR_ACTION1_REG , RULL(0x12010807), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12011807, 12011007, 12010C07, 12011C07, 12011407, +REG64( EQ_3_FIR_ACTION1_REG , RULL(0x13010807), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13011807, 13011007, 13010C07, 13011C07, 13011407, +REG64( EQ_4_FIR_ACTION1_REG , RULL(0x14010807), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14011807, 14011007, 14010C07, 14011C07, 14011407, +REG64( EQ_5_FIR_ACTION1_REG , RULL(0x15010807), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15011807, 15011007, 15010C07, 15011C07, 15011407, +REG64( EX_FIR_ACTION1_REG , RULL(0x10011007), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_0_FIR_ACTION1_REG , RULL(0x10011007), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_1_FIR_ACTION1_REG , RULL(0x10011407), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_2_FIR_ACTION1_REG , RULL(0x11011007), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_3_FIR_ACTION1_REG , RULL(0x11011407), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_4_FIR_ACTION1_REG , RULL(0x12011007), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_5_FIR_ACTION1_REG , RULL(0x12011407), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_6_FIR_ACTION1_REG , RULL(0x13011007), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_7_FIR_ACTION1_REG , RULL(0x13011407), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_8_FIR_ACTION1_REG , RULL(0x14011007), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_9_FIR_ACTION1_REG , RULL(0x14011407), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_FIR_ACTION1_REG , RULL(0x10010807), SH_UNT_EX_0_L2 , SH_ACS_SCOM_RW ); +REG64( EX_0_L3_FIR_ACTION1_REG , RULL(0x10011807), SH_UNT_EX_0_L3 , SH_ACS_SCOM_RW ); +REG64( EX_10_FIR_ACTION1_REG , RULL(0x15011007), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_11_FIR_ACTION1_REG , RULL(0x15011407), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); +REG64( EX_10_L2_FIR_ACTION1_REG , RULL(0x15010807), SH_UNT_EX_10_L2 , SH_ACS_SCOM_RW ); +REG64( EX_10_L3_FIR_ACTION1_REG , RULL(0x15011807), SH_UNT_EX_10_L3 , SH_ACS_SCOM_RW ); +REG64( EX_11_L2_FIR_ACTION1_REG , RULL(0x15010C07), SH_UNT_EX_11_L2 , SH_ACS_SCOM_RW ); +REG64( EX_11_L3_FIR_ACTION1_REG , RULL(0x15011C07), SH_UNT_EX_11_L3 , SH_ACS_SCOM_RW ); +REG64( EX_1_L2_FIR_ACTION1_REG , RULL(0x10010C07), SH_UNT_EX_1_L2 , SH_ACS_SCOM_RW ); +REG64( EX_1_L3_FIR_ACTION1_REG , RULL(0x10011C07), SH_UNT_EX_1_L3 , SH_ACS_SCOM_RW ); +REG64( EX_2_L2_FIR_ACTION1_REG , RULL(0x11010807), SH_UNT_EX_2_L2 , SH_ACS_SCOM_RW ); +REG64( EX_2_L3_FIR_ACTION1_REG , RULL(0x11011807), SH_UNT_EX_2_L3 , SH_ACS_SCOM_RW ); +REG64( EX_3_L2_FIR_ACTION1_REG , RULL(0x11010C07), SH_UNT_EX_3_L2 , SH_ACS_SCOM_RW ); +REG64( EX_3_L3_FIR_ACTION1_REG , RULL(0x11011C07), SH_UNT_EX_3_L3 , SH_ACS_SCOM_RW ); +REG64( EX_4_L2_FIR_ACTION1_REG , RULL(0x12010807), SH_UNT_EX_4_L2 , SH_ACS_SCOM_RW ); +REG64( EX_4_L3_FIR_ACTION1_REG , RULL(0x12011807), SH_UNT_EX_4_L3 , SH_ACS_SCOM_RW ); +REG64( EX_5_L2_FIR_ACTION1_REG , RULL(0x12010C07), SH_UNT_EX_5_L2 , SH_ACS_SCOM_RW ); +REG64( EX_5_L3_FIR_ACTION1_REG , RULL(0x12011C07), SH_UNT_EX_5_L3 , SH_ACS_SCOM_RW ); +REG64( EX_6_L2_FIR_ACTION1_REG , RULL(0x13010807), SH_UNT_EX_6_L2 , SH_ACS_SCOM_RW ); +REG64( EX_6_L3_FIR_ACTION1_REG , RULL(0x13011807), SH_UNT_EX_6_L3 , SH_ACS_SCOM_RW ); +REG64( EX_7_L2_FIR_ACTION1_REG , RULL(0x13010C07), SH_UNT_EX_7_L2 , SH_ACS_SCOM_RW ); +REG64( EX_7_L3_FIR_ACTION1_REG , RULL(0x13011C07), SH_UNT_EX_7_L3 , SH_ACS_SCOM_RW ); +REG64( EX_8_L2_FIR_ACTION1_REG , RULL(0x14010807), SH_UNT_EX_8_L2 , SH_ACS_SCOM_RW ); +REG64( EX_8_L3_FIR_ACTION1_REG , RULL(0x14011807), SH_UNT_EX_8_L3 , SH_ACS_SCOM_RW ); +REG64( EX_9_L2_FIR_ACTION1_REG , RULL(0x14010C07), SH_UNT_EX_9_L2 , SH_ACS_SCOM_RW ); +REG64( EX_9_L3_FIR_ACTION1_REG , RULL(0x14011C07), SH_UNT_EX_9_L3 , SH_ACS_SCOM_RW ); +REG64( EX_L2_FIR_ACTION1_REG , RULL(0x10010807), SH_UNT_EX_L2 , SH_ACS_SCOM_RW ); +REG64( EX_L3_FIR_ACTION1_REG , RULL(0x10011807), SH_UNT_EX_L3 , SH_ACS_SCOM_RW ); + +REG64( C_FIR_ERR_INJ , RULL(0x20010A4E), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_FIR_ERR_INJ , RULL(0x20010A4E), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_FIR_ERR_INJ , RULL(0x21010A4E), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_FIR_ERR_INJ , RULL(0x22010A4E), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_FIR_ERR_INJ , RULL(0x23010A4E), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_FIR_ERR_INJ , RULL(0x24010A4E), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_FIR_ERR_INJ , RULL(0x25010A4E), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_FIR_ERR_INJ , RULL(0x26010A4E), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_FIR_ERR_INJ , RULL(0x27010A4E), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_FIR_ERR_INJ , RULL(0x28010A4E), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_FIR_ERR_INJ , RULL(0x29010A4E), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_FIR_ERR_INJ , RULL(0x2A010A4E), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_FIR_ERR_INJ , RULL(0x2B010A4E), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_FIR_ERR_INJ , RULL(0x2C010A4E), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_FIR_ERR_INJ , RULL(0x2D010A4E), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_FIR_ERR_INJ , RULL(0x2E010A4E), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_FIR_ERR_INJ , RULL(0x2F010A4E), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_FIR_ERR_INJ , RULL(0x30010A4E), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_FIR_ERR_INJ , RULL(0x31010A4E), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_FIR_ERR_INJ , RULL(0x32010A4E), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_FIR_ERR_INJ , RULL(0x33010A4E), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_FIR_ERR_INJ , RULL(0x34010A4E), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_FIR_ERR_INJ , RULL(0x35010A4E), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_FIR_ERR_INJ , RULL(0x36010A4E), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_FIR_ERR_INJ , RULL(0x37010A4E), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_FIR_ERR_INJ , RULL(0x20010A4E), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 21010A4E, +REG64( EX_0_FIR_ERR_INJ , RULL(0x20010A4E), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 21010A4E, +REG64( EX_1_FIR_ERR_INJ , RULL(0x22010A4E), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 23010A4E, +REG64( EX_2_FIR_ERR_INJ , RULL(0x24010A4E), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 25010A4E, +REG64( EX_3_FIR_ERR_INJ , RULL(0x26010A4E), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 27010A4E, +REG64( EX_4_FIR_ERR_INJ , RULL(0x28010A4E), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 29010A4E, +REG64( EX_5_FIR_ERR_INJ , RULL(0x2A010A4E), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B010A4E, +REG64( EX_6_FIR_ERR_INJ , RULL(0x2C010A4E), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D010A4E, +REG64( EX_7_FIR_ERR_INJ , RULL(0x2E010A4E), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F010A4E, +REG64( EX_8_FIR_ERR_INJ , RULL(0x30010A4E), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 31010A4E, +REG64( EX_9_FIR_ERR_INJ , RULL(0x32010A4E), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 33010A4E, +REG64( EX_10_FIR_ERR_INJ , RULL(0x34010A4E), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 35010A4E, +REG64( EX_11_FIR_ERR_INJ , RULL(0x36010A4E), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 37010A4E, + +REG64( CAPP_FIR_MASK_REG , RULL(0x02010803), SH_UNT_CAPP , SH_ACS_SCOM_RW ); +REG64( CAPP_FIR_MASK_REG_AND , RULL(0x02010804), SH_UNT_CAPP , SH_ACS_SCOM1_AND ); +REG64( CAPP_FIR_MASK_REG_OR , RULL(0x02010805), SH_UNT_CAPP , SH_ACS_SCOM2_OR ); +REG64( CAPP_0_FIR_MASK_REG , RULL(0x02010803), SH_UNT_CAPP_0 , SH_ACS_SCOM_RW ); +REG64( CAPP_0_FIR_MASK_REG_AND , RULL(0x02010804), SH_UNT_CAPP_0 , SH_ACS_SCOM1_AND ); +REG64( CAPP_0_FIR_MASK_REG_OR , RULL(0x02010805), SH_UNT_CAPP_0 , SH_ACS_SCOM2_OR ); +REG64( CAPP_1_FIR_MASK_REG , RULL(0x04010803), SH_UNT_CAPP_1 , SH_ACS_SCOM_RW ); +REG64( CAPP_1_FIR_MASK_REG_AND , RULL(0x04010804), SH_UNT_CAPP_1 , SH_ACS_SCOM1_AND ); +REG64( CAPP_1_FIR_MASK_REG_OR , RULL(0x04010805), SH_UNT_CAPP_1 , SH_ACS_SCOM2_OR ); +REG64( EQ_FIR_MASK_REG , RULL(0x10010803), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10011803, 10011003, 10010C03, 10011C03, 10011403, +REG64( EQ_FIR_MASK_REG_AND , RULL(0x10010804), SH_UNT_EQ , + SH_ACS_SCOM1_AND ); //DUPS: 10011804, 10011004, 10010C04, 10011C04, 10011404, +REG64( EQ_FIR_MASK_REG_OR , RULL(0x10010805), SH_UNT_EQ , + SH_ACS_SCOM2_OR ); //DUPS: 10011805, 10011005, 10010C05, 10011C05, 10011405, +REG64( EQ_0_FIR_MASK_REG , RULL(0x10010803), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10011803, 10011003, 10010C03, 10011C03, 10011403, +REG64( EQ_0_FIR_MASK_REG_AND , RULL(0x10010804), SH_UNT_EQ_0 , + SH_ACS_SCOM1_AND ); //DUPS: 10011804, 10011004, 10010C04, 10011C04, 10011404, +REG64( EQ_0_FIR_MASK_REG_OR , RULL(0x10010805), SH_UNT_EQ_0 , + SH_ACS_SCOM2_OR ); //DUPS: 10011805, 10011005, 10010C05, 10011C05, 10011405, +REG64( EQ_1_FIR_MASK_REG , RULL(0x11010803), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11011803, 11011003, 11010C03, 11011C03, 11011403, +REG64( EQ_1_FIR_MASK_REG_AND , RULL(0x11010804), SH_UNT_EQ_1 , + SH_ACS_SCOM1_AND ); //DUPS: 11011804, 11011004, 11010C04, 11011C04, 11011404, +REG64( EQ_1_FIR_MASK_REG_OR , RULL(0x11010805), SH_UNT_EQ_1 , + SH_ACS_SCOM2_OR ); //DUPS: 11011805, 11011005, 11010C05, 11011C05, 11011405, +REG64( EQ_2_FIR_MASK_REG , RULL(0x12010803), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12011803, 12011003, 12010C03, 12011C03, 12011403, +REG64( EQ_2_FIR_MASK_REG_AND , RULL(0x12010804), SH_UNT_EQ_2 , + SH_ACS_SCOM1_AND ); //DUPS: 12011804, 12011004, 12010C04, 12011C04, 12011404, +REG64( EQ_2_FIR_MASK_REG_OR , RULL(0x12010805), SH_UNT_EQ_2 , + SH_ACS_SCOM2_OR ); //DUPS: 12011805, 12011005, 12010C05, 12011C05, 12011405, +REG64( EQ_3_FIR_MASK_REG , RULL(0x13010803), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13011803, 13011003, 13010C03, 13011C03, 13011403, +REG64( EQ_3_FIR_MASK_REG_AND , RULL(0x13010804), SH_UNT_EQ_3 , + SH_ACS_SCOM1_AND ); //DUPS: 13011804, 13011004, 13010C04, 13011C04, 13011404, +REG64( EQ_3_FIR_MASK_REG_OR , RULL(0x13010805), SH_UNT_EQ_3 , + SH_ACS_SCOM2_OR ); //DUPS: 13011805, 13011005, 13010C05, 13011C05, 13011405, +REG64( EQ_4_FIR_MASK_REG , RULL(0x14010803), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14011803, 14011003, 14010C03, 14011C03, 14011403, +REG64( EQ_4_FIR_MASK_REG_AND , RULL(0x14010804), SH_UNT_EQ_4 , + SH_ACS_SCOM1_AND ); //DUPS: 14011804, 14011004, 14010C04, 14011C04, 14011404, +REG64( EQ_4_FIR_MASK_REG_OR , RULL(0x14010805), SH_UNT_EQ_4 , + SH_ACS_SCOM2_OR ); //DUPS: 14011805, 14011005, 14010C05, 14011C05, 14011405, +REG64( EQ_5_FIR_MASK_REG , RULL(0x15010803), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15011803, 15011003, 15010C03, 15011C03, 15011403, +REG64( EQ_5_FIR_MASK_REG_AND , RULL(0x15010804), SH_UNT_EQ_5 , + SH_ACS_SCOM1_AND ); //DUPS: 15011804, 15011004, 15010C04, 15011C04, 15011404, +REG64( EQ_5_FIR_MASK_REG_OR , RULL(0x15010805), SH_UNT_EQ_5 , + SH_ACS_SCOM2_OR ); //DUPS: 15011805, 15011005, 15010C05, 15011C05, 15011405, +REG64( EX_FIR_MASK_REG , RULL(0x10011003), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_FIR_MASK_REG_AND , RULL(0x10011004), SH_UNT_EX , SH_ACS_SCOM1_AND ); +REG64( EX_FIR_MASK_REG_OR , RULL(0x10011005), SH_UNT_EX , SH_ACS_SCOM2_OR ); +REG64( EX_0_FIR_MASK_REG , RULL(0x10011003), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_0_FIR_MASK_REG_AND , RULL(0x10011004), SH_UNT_EX_0 , SH_ACS_SCOM1_AND ); +REG64( EX_0_FIR_MASK_REG_OR , RULL(0x10011005), SH_UNT_EX_0 , SH_ACS_SCOM2_OR ); +REG64( EX_1_FIR_MASK_REG , RULL(0x10011403), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_1_FIR_MASK_REG_AND , RULL(0x10011404), SH_UNT_EX_1 , SH_ACS_SCOM1_AND ); +REG64( EX_1_FIR_MASK_REG_OR , RULL(0x10011405), SH_UNT_EX_1 , SH_ACS_SCOM2_OR ); +REG64( EX_2_FIR_MASK_REG , RULL(0x11011003), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_2_FIR_MASK_REG_AND , RULL(0x11011004), SH_UNT_EX_2 , SH_ACS_SCOM1_AND ); +REG64( EX_2_FIR_MASK_REG_OR , RULL(0x11011005), SH_UNT_EX_2 , SH_ACS_SCOM2_OR ); +REG64( EX_3_FIR_MASK_REG , RULL(0x11011403), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_3_FIR_MASK_REG_AND , RULL(0x11011404), SH_UNT_EX_3 , SH_ACS_SCOM1_AND ); +REG64( EX_3_FIR_MASK_REG_OR , RULL(0x11011405), SH_UNT_EX_3 , SH_ACS_SCOM2_OR ); +REG64( EX_4_FIR_MASK_REG , RULL(0x12011003), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_4_FIR_MASK_REG_AND , RULL(0x12011004), SH_UNT_EX_4 , SH_ACS_SCOM1_AND ); +REG64( EX_4_FIR_MASK_REG_OR , RULL(0x12011005), SH_UNT_EX_4 , SH_ACS_SCOM2_OR ); +REG64( EX_5_FIR_MASK_REG , RULL(0x12011403), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_5_FIR_MASK_REG_AND , RULL(0x12011404), SH_UNT_EX_5 , SH_ACS_SCOM1_AND ); +REG64( EX_5_FIR_MASK_REG_OR , RULL(0x12011405), SH_UNT_EX_5 , SH_ACS_SCOM2_OR ); +REG64( EX_6_FIR_MASK_REG , RULL(0x13011003), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_6_FIR_MASK_REG_AND , RULL(0x13011004), SH_UNT_EX_6 , SH_ACS_SCOM1_AND ); +REG64( EX_6_FIR_MASK_REG_OR , RULL(0x13011005), SH_UNT_EX_6 , SH_ACS_SCOM2_OR ); +REG64( EX_7_FIR_MASK_REG , RULL(0x13011403), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_7_FIR_MASK_REG_AND , RULL(0x13011404), SH_UNT_EX_7 , SH_ACS_SCOM1_AND ); +REG64( EX_7_FIR_MASK_REG_OR , RULL(0x13011405), SH_UNT_EX_7 , SH_ACS_SCOM2_OR ); +REG64( EX_8_FIR_MASK_REG , RULL(0x14011003), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_8_FIR_MASK_REG_AND , RULL(0x14011004), SH_UNT_EX_8 , SH_ACS_SCOM1_AND ); +REG64( EX_8_FIR_MASK_REG_OR , RULL(0x14011005), SH_UNT_EX_8 , SH_ACS_SCOM2_OR ); +REG64( EX_9_FIR_MASK_REG , RULL(0x14011403), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_9_FIR_MASK_REG_AND , RULL(0x14011404), SH_UNT_EX_9 , SH_ACS_SCOM1_AND ); +REG64( EX_9_FIR_MASK_REG_OR , RULL(0x14011405), SH_UNT_EX_9 , SH_ACS_SCOM2_OR ); +REG64( EX_0_L2_FIR_MASK_REG , RULL(0x10010803), SH_UNT_EX_0_L2 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_FIR_MASK_REG_AND , RULL(0x10010804), SH_UNT_EX_0_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_0_L2_FIR_MASK_REG_OR , RULL(0x10010805), SH_UNT_EX_0_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_0_L3_FIR_MASK_REG , RULL(0x10011803), SH_UNT_EX_0_L3 , SH_ACS_SCOM_RW ); +REG64( EX_0_L3_FIR_MASK_REG_AND , RULL(0x10011804), SH_UNT_EX_0_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_0_L3_FIR_MASK_REG_OR , RULL(0x10011805), SH_UNT_EX_0_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_10_FIR_MASK_REG , RULL(0x15011003), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_10_FIR_MASK_REG_AND , RULL(0x15011004), SH_UNT_EX_10 , SH_ACS_SCOM1_AND ); +REG64( EX_10_FIR_MASK_REG_OR , RULL(0x15011005), SH_UNT_EX_10 , SH_ACS_SCOM2_OR ); +REG64( EX_11_FIR_MASK_REG , RULL(0x15011403), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); +REG64( EX_11_FIR_MASK_REG_AND , RULL(0x15011404), SH_UNT_EX_11 , SH_ACS_SCOM1_AND ); +REG64( EX_11_FIR_MASK_REG_OR , RULL(0x15011405), SH_UNT_EX_11 , SH_ACS_SCOM2_OR ); +REG64( EX_10_L2_FIR_MASK_REG , RULL(0x15010803), SH_UNT_EX_10_L2 , SH_ACS_SCOM_RW ); +REG64( EX_10_L2_FIR_MASK_REG_AND , RULL(0x15010804), SH_UNT_EX_10_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_10_L2_FIR_MASK_REG_OR , RULL(0x15010805), SH_UNT_EX_10_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_10_L3_FIR_MASK_REG , RULL(0x15011803), SH_UNT_EX_10_L3 , SH_ACS_SCOM_RW ); +REG64( EX_10_L3_FIR_MASK_REG_AND , RULL(0x15011804), SH_UNT_EX_10_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_10_L3_FIR_MASK_REG_OR , RULL(0x15011805), SH_UNT_EX_10_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_11_L2_FIR_MASK_REG , RULL(0x15010C03), SH_UNT_EX_11_L2 , SH_ACS_SCOM_RW ); +REG64( EX_11_L2_FIR_MASK_REG_AND , RULL(0x15010C04), SH_UNT_EX_11_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_11_L2_FIR_MASK_REG_OR , RULL(0x15010C05), SH_UNT_EX_11_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_11_L3_FIR_MASK_REG , RULL(0x15011C03), SH_UNT_EX_11_L3 , SH_ACS_SCOM_RW ); +REG64( EX_11_L3_FIR_MASK_REG_AND , RULL(0x15011C04), SH_UNT_EX_11_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_11_L3_FIR_MASK_REG_OR , RULL(0x15011C05), SH_UNT_EX_11_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_1_L2_FIR_MASK_REG , RULL(0x10010C03), SH_UNT_EX_1_L2 , SH_ACS_SCOM_RW ); +REG64( EX_1_L2_FIR_MASK_REG_AND , RULL(0x10010C04), SH_UNT_EX_1_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_1_L2_FIR_MASK_REG_OR , RULL(0x10010C05), SH_UNT_EX_1_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_1_L3_FIR_MASK_REG , RULL(0x10011C03), SH_UNT_EX_1_L3 , SH_ACS_SCOM_RW ); +REG64( EX_1_L3_FIR_MASK_REG_AND , RULL(0x10011C04), SH_UNT_EX_1_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_1_L3_FIR_MASK_REG_OR , RULL(0x10011C05), SH_UNT_EX_1_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_2_L2_FIR_MASK_REG , RULL(0x11010803), SH_UNT_EX_2_L2 , SH_ACS_SCOM_RW ); +REG64( EX_2_L2_FIR_MASK_REG_AND , RULL(0x11010804), SH_UNT_EX_2_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_2_L2_FIR_MASK_REG_OR , RULL(0x11010805), SH_UNT_EX_2_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_2_L3_FIR_MASK_REG , RULL(0x11011803), SH_UNT_EX_2_L3 , SH_ACS_SCOM_RW ); +REG64( EX_2_L3_FIR_MASK_REG_AND , RULL(0x11011804), SH_UNT_EX_2_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_2_L3_FIR_MASK_REG_OR , RULL(0x11011805), SH_UNT_EX_2_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_3_L2_FIR_MASK_REG , RULL(0x11010C03), SH_UNT_EX_3_L2 , SH_ACS_SCOM_RW ); +REG64( EX_3_L2_FIR_MASK_REG_AND , RULL(0x11010C04), SH_UNT_EX_3_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_3_L2_FIR_MASK_REG_OR , RULL(0x11010C05), SH_UNT_EX_3_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_3_L3_FIR_MASK_REG , RULL(0x11011C03), SH_UNT_EX_3_L3 , SH_ACS_SCOM_RW ); +REG64( EX_3_L3_FIR_MASK_REG_AND , RULL(0x11011C04), SH_UNT_EX_3_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_3_L3_FIR_MASK_REG_OR , RULL(0x11011C05), SH_UNT_EX_3_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_4_L2_FIR_MASK_REG , RULL(0x12010803), SH_UNT_EX_4_L2 , SH_ACS_SCOM_RW ); +REG64( EX_4_L2_FIR_MASK_REG_AND , RULL(0x12010804), SH_UNT_EX_4_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_4_L2_FIR_MASK_REG_OR , RULL(0x12010805), SH_UNT_EX_4_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_4_L3_FIR_MASK_REG , RULL(0x12011803), SH_UNT_EX_4_L3 , SH_ACS_SCOM_RW ); +REG64( EX_4_L3_FIR_MASK_REG_AND , RULL(0x12011804), SH_UNT_EX_4_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_4_L3_FIR_MASK_REG_OR , RULL(0x12011805), SH_UNT_EX_4_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_5_L2_FIR_MASK_REG , RULL(0x12010C03), SH_UNT_EX_5_L2 , SH_ACS_SCOM_RW ); +REG64( EX_5_L2_FIR_MASK_REG_AND , RULL(0x12010C04), SH_UNT_EX_5_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_5_L2_FIR_MASK_REG_OR , RULL(0x12010C05), SH_UNT_EX_5_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_5_L3_FIR_MASK_REG , RULL(0x12011C03), SH_UNT_EX_5_L3 , SH_ACS_SCOM_RW ); +REG64( EX_5_L3_FIR_MASK_REG_AND , RULL(0x12011C04), SH_UNT_EX_5_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_5_L3_FIR_MASK_REG_OR , RULL(0x12011C05), SH_UNT_EX_5_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_6_L2_FIR_MASK_REG , RULL(0x13010803), SH_UNT_EX_6_L2 , SH_ACS_SCOM_RW ); +REG64( EX_6_L2_FIR_MASK_REG_AND , RULL(0x13010804), SH_UNT_EX_6_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_6_L2_FIR_MASK_REG_OR , RULL(0x13010805), SH_UNT_EX_6_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_6_L3_FIR_MASK_REG , RULL(0x13011803), SH_UNT_EX_6_L3 , SH_ACS_SCOM_RW ); +REG64( EX_6_L3_FIR_MASK_REG_AND , RULL(0x13011804), SH_UNT_EX_6_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_6_L3_FIR_MASK_REG_OR , RULL(0x13011805), SH_UNT_EX_6_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_7_L2_FIR_MASK_REG , RULL(0x13010C03), SH_UNT_EX_7_L2 , SH_ACS_SCOM_RW ); +REG64( EX_7_L2_FIR_MASK_REG_AND , RULL(0x13010C04), SH_UNT_EX_7_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_7_L2_FIR_MASK_REG_OR , RULL(0x13010C05), SH_UNT_EX_7_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_7_L3_FIR_MASK_REG , RULL(0x13011C03), SH_UNT_EX_7_L3 , SH_ACS_SCOM_RW ); +REG64( EX_7_L3_FIR_MASK_REG_AND , RULL(0x13011C04), SH_UNT_EX_7_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_7_L3_FIR_MASK_REG_OR , RULL(0x13011C05), SH_UNT_EX_7_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_8_L2_FIR_MASK_REG , RULL(0x14010803), SH_UNT_EX_8_L2 , SH_ACS_SCOM_RW ); +REG64( EX_8_L2_FIR_MASK_REG_AND , RULL(0x14010804), SH_UNT_EX_8_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_8_L2_FIR_MASK_REG_OR , RULL(0x14010805), SH_UNT_EX_8_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_8_L3_FIR_MASK_REG , RULL(0x14011803), SH_UNT_EX_8_L3 , SH_ACS_SCOM_RW ); +REG64( EX_8_L3_FIR_MASK_REG_AND , RULL(0x14011804), SH_UNT_EX_8_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_8_L3_FIR_MASK_REG_OR , RULL(0x14011805), SH_UNT_EX_8_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_9_L2_FIR_MASK_REG , RULL(0x14010C03), SH_UNT_EX_9_L2 , SH_ACS_SCOM_RW ); +REG64( EX_9_L2_FIR_MASK_REG_AND , RULL(0x14010C04), SH_UNT_EX_9_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_9_L2_FIR_MASK_REG_OR , RULL(0x14010C05), SH_UNT_EX_9_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_9_L3_FIR_MASK_REG , RULL(0x14011C03), SH_UNT_EX_9_L3 , SH_ACS_SCOM_RW ); +REG64( EX_9_L3_FIR_MASK_REG_AND , RULL(0x14011C04), SH_UNT_EX_9_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_9_L3_FIR_MASK_REG_OR , RULL(0x14011C05), SH_UNT_EX_9_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_L2_FIR_MASK_REG , RULL(0x10010803), SH_UNT_EX_L2 , SH_ACS_SCOM_RW ); +REG64( EX_L2_FIR_MASK_REG_AND , RULL(0x10010804), SH_UNT_EX_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_L2_FIR_MASK_REG_OR , RULL(0x10010805), SH_UNT_EX_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_L3_FIR_MASK_REG , RULL(0x10011803), SH_UNT_EX_L3 , SH_ACS_SCOM_RW ); +REG64( EX_L3_FIR_MASK_REG_AND , RULL(0x10011804), SH_UNT_EX_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_L3_FIR_MASK_REG_OR , RULL(0x10011805), SH_UNT_EX_L3 , SH_ACS_SCOM2_OR ); + +REG64( C_FIR_MODEREG , RULL(0x20010A4B), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_FIR_MODEREG , RULL(0x20010A4B), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_FIR_MODEREG , RULL(0x21010A4B), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_FIR_MODEREG , RULL(0x22010A4B), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_FIR_MODEREG , RULL(0x23010A4B), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_FIR_MODEREG , RULL(0x24010A4B), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_FIR_MODEREG , RULL(0x25010A4B), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_FIR_MODEREG , RULL(0x26010A4B), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_FIR_MODEREG , RULL(0x27010A4B), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_FIR_MODEREG , RULL(0x28010A4B), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_FIR_MODEREG , RULL(0x29010A4B), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_FIR_MODEREG , RULL(0x2A010A4B), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_FIR_MODEREG , RULL(0x2B010A4B), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_FIR_MODEREG , RULL(0x2C010A4B), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_FIR_MODEREG , RULL(0x2D010A4B), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_FIR_MODEREG , RULL(0x2E010A4B), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_FIR_MODEREG , RULL(0x2F010A4B), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_FIR_MODEREG , RULL(0x30010A4B), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_FIR_MODEREG , RULL(0x31010A4B), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_FIR_MODEREG , RULL(0x32010A4B), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_FIR_MODEREG , RULL(0x33010A4B), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_FIR_MODEREG , RULL(0x34010A4B), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_FIR_MODEREG , RULL(0x35010A4B), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_FIR_MODEREG , RULL(0x36010A4B), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_FIR_MODEREG , RULL(0x37010A4B), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_0_L2_FIR_MODEREG , RULL(0x20010A4B), SH_UNT_EX_0_L2 , + SH_ACS_SCOM ); //DUPS: 21010A4B, +REG64( EX_10_L2_FIR_MODEREG , RULL(0x34010A4B), SH_UNT_EX_10_L2 , + SH_ACS_SCOM ); //DUPS: 35010A4B, +REG64( EX_11_L2_FIR_MODEREG , RULL(0x36010A4B), SH_UNT_EX_11_L2 , + SH_ACS_SCOM ); //DUPS: 37010A4B, +REG64( EX_1_L2_FIR_MODEREG , RULL(0x22010A4B), SH_UNT_EX_1_L2 , + SH_ACS_SCOM ); //DUPS: 23010A4B, +REG64( EX_2_L2_FIR_MODEREG , RULL(0x24010A4B), SH_UNT_EX_2_L2 , + SH_ACS_SCOM ); //DUPS: 25010A4B, +REG64( EX_3_L2_FIR_MODEREG , RULL(0x26010A4B), SH_UNT_EX_3_L2 , + SH_ACS_SCOM ); //DUPS: 27010A4B, +REG64( EX_4_L2_FIR_MODEREG , RULL(0x28010A4B), SH_UNT_EX_4_L2 , + SH_ACS_SCOM ); //DUPS: 29010A4B, +REG64( EX_5_L2_FIR_MODEREG , RULL(0x2A010A4B), SH_UNT_EX_5_L2 , + SH_ACS_SCOM ); //DUPS: 2B010A4B, +REG64( EX_6_L2_FIR_MODEREG , RULL(0x2C010A4B), SH_UNT_EX_6_L2 , + SH_ACS_SCOM ); //DUPS: 2D010A4B, +REG64( EX_7_L2_FIR_MODEREG , RULL(0x2E010A4B), SH_UNT_EX_7_L2 , + SH_ACS_SCOM ); //DUPS: 2F010A4B, +REG64( EX_8_L2_FIR_MODEREG , RULL(0x30010A4B), SH_UNT_EX_8_L2 , + SH_ACS_SCOM ); //DUPS: 31010A4B, +REG64( EX_9_L2_FIR_MODEREG , RULL(0x32010A4B), SH_UNT_EX_9_L2 , + SH_ACS_SCOM ); //DUPS: 33010A4B, +REG64( EX_L2_FIR_MODEREG , RULL(0x20010A4B), SH_UNT_EX_L2 , + SH_ACS_SCOM ); //DUPS: 21010A4B, + +REG64( C_FIR_RANDOM_LFSR , RULL(0x20010A50), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_FIR_RANDOM_LFSR , RULL(0x20010A50), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_FIR_RANDOM_LFSR , RULL(0x21010A50), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_FIR_RANDOM_LFSR , RULL(0x22010A50), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_FIR_RANDOM_LFSR , RULL(0x23010A50), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_FIR_RANDOM_LFSR , RULL(0x24010A50), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_FIR_RANDOM_LFSR , RULL(0x25010A50), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_FIR_RANDOM_LFSR , RULL(0x26010A50), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_FIR_RANDOM_LFSR , RULL(0x27010A50), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_FIR_RANDOM_LFSR , RULL(0x28010A50), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_FIR_RANDOM_LFSR , RULL(0x29010A50), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_FIR_RANDOM_LFSR , RULL(0x2A010A50), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_FIR_RANDOM_LFSR , RULL(0x2B010A50), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_FIR_RANDOM_LFSR , RULL(0x2C010A50), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_FIR_RANDOM_LFSR , RULL(0x2D010A50), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_FIR_RANDOM_LFSR , RULL(0x2E010A50), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_FIR_RANDOM_LFSR , RULL(0x2F010A50), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_FIR_RANDOM_LFSR , RULL(0x30010A50), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_FIR_RANDOM_LFSR , RULL(0x31010A50), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_FIR_RANDOM_LFSR , RULL(0x32010A50), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_FIR_RANDOM_LFSR , RULL(0x33010A50), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_FIR_RANDOM_LFSR , RULL(0x34010A50), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_FIR_RANDOM_LFSR , RULL(0x35010A50), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_FIR_RANDOM_LFSR , RULL(0x36010A50), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_FIR_RANDOM_LFSR , RULL(0x37010A50), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_0_L2_FIR_RANDOM_LFSR , RULL(0x20010A50), SH_UNT_EX_0_L2 , + SH_ACS_SCOM ); //DUPS: 21010A50, +REG64( EX_10_L2_FIR_RANDOM_LFSR , RULL(0x34010A50), SH_UNT_EX_10_L2 , + SH_ACS_SCOM ); //DUPS: 35010A50, +REG64( EX_11_L2_FIR_RANDOM_LFSR , RULL(0x36010A50), SH_UNT_EX_11_L2 , + SH_ACS_SCOM ); //DUPS: 37010A50, +REG64( EX_1_L2_FIR_RANDOM_LFSR , RULL(0x22010A50), SH_UNT_EX_1_L2 , + SH_ACS_SCOM ); //DUPS: 23010A50, +REG64( EX_2_L2_FIR_RANDOM_LFSR , RULL(0x24010A50), SH_UNT_EX_2_L2 , + SH_ACS_SCOM ); //DUPS: 25010A50, +REG64( EX_3_L2_FIR_RANDOM_LFSR , RULL(0x26010A50), SH_UNT_EX_3_L2 , + SH_ACS_SCOM ); //DUPS: 27010A50, +REG64( EX_4_L2_FIR_RANDOM_LFSR , RULL(0x28010A50), SH_UNT_EX_4_L2 , + SH_ACS_SCOM ); //DUPS: 29010A50, +REG64( EX_5_L2_FIR_RANDOM_LFSR , RULL(0x2A010A50), SH_UNT_EX_5_L2 , + SH_ACS_SCOM ); //DUPS: 2B010A50, +REG64( EX_6_L2_FIR_RANDOM_LFSR , RULL(0x2C010A50), SH_UNT_EX_6_L2 , + SH_ACS_SCOM ); //DUPS: 2D010A50, +REG64( EX_7_L2_FIR_RANDOM_LFSR , RULL(0x2E010A50), SH_UNT_EX_7_L2 , + SH_ACS_SCOM ); //DUPS: 2F010A50, +REG64( EX_8_L2_FIR_RANDOM_LFSR , RULL(0x30010A50), SH_UNT_EX_8_L2 , + SH_ACS_SCOM ); //DUPS: 31010A50, +REG64( EX_9_L2_FIR_RANDOM_LFSR , RULL(0x32010A50), SH_UNT_EX_9_L2 , + SH_ACS_SCOM ); //DUPS: 33010A50, +REG64( EX_L2_FIR_RANDOM_LFSR , RULL(0x20010A50), SH_UNT_EX_L2 , + SH_ACS_SCOM ); //DUPS: 21010A50, + +REG64( CAPP_FIR_REG , RULL(0x02010800), SH_UNT_CAPP , SH_ACS_SCOM_RW ); +REG64( CAPP_FIR_REG_AND , RULL(0x02010801), SH_UNT_CAPP , SH_ACS_SCOM1_AND ); +REG64( CAPP_FIR_REG_OR , RULL(0x02010802), SH_UNT_CAPP , SH_ACS_SCOM2_OR ); +REG64( CAPP_0_FIR_REG , RULL(0x02010800), SH_UNT_CAPP_0 , SH_ACS_SCOM_RW ); +REG64( CAPP_0_FIR_REG_AND , RULL(0x02010801), SH_UNT_CAPP_0 , SH_ACS_SCOM1_AND ); +REG64( CAPP_0_FIR_REG_OR , RULL(0x02010802), SH_UNT_CAPP_0 , SH_ACS_SCOM2_OR ); +REG64( CAPP_1_FIR_REG , RULL(0x04010800), SH_UNT_CAPP_1 , SH_ACS_SCOM_RW ); +REG64( CAPP_1_FIR_REG_AND , RULL(0x04010801), SH_UNT_CAPP_1 , SH_ACS_SCOM1_AND ); +REG64( CAPP_1_FIR_REG_OR , RULL(0x04010802), SH_UNT_CAPP_1 , SH_ACS_SCOM2_OR ); +REG64( EQ_FIR_REG , RULL(0x10010800), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10011800, 10011000, 10010C00, 10011C00, 10011400, +REG64( EQ_FIR_REG_AND , RULL(0x10010801), SH_UNT_EQ , + SH_ACS_SCOM1_AND ); //DUPS: 10011801, 10011001, 10010C01, 10011C01, 10011401, +REG64( EQ_FIR_REG_OR , RULL(0x10010802), SH_UNT_EQ , + SH_ACS_SCOM2_OR ); //DUPS: 10011802, 10011002, 10010C02, 10011C02, 10011402, +REG64( EQ_0_FIR_REG , RULL(0x10010800), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10011800, 10011000, 10010C00, 10011C00, 10011400, +REG64( EQ_0_FIR_REG_AND , RULL(0x10010801), SH_UNT_EQ_0 , + SH_ACS_SCOM1_AND ); //DUPS: 10011801, 10011001, 10010C01, 10011C01, 10011401, +REG64( EQ_0_FIR_REG_OR , RULL(0x10010802), SH_UNT_EQ_0 , + SH_ACS_SCOM2_OR ); //DUPS: 10011802, 10011002, 10010C02, 10011C02, 10011402, +REG64( EQ_1_FIR_REG , RULL(0x11010800), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11011800, 11011000, 11010C00, 11011C00, 11011400, +REG64( EQ_1_FIR_REG_AND , RULL(0x11010801), SH_UNT_EQ_1 , + SH_ACS_SCOM1_AND ); //DUPS: 11011801, 11011001, 11010C01, 11011C01, 11011401, +REG64( EQ_1_FIR_REG_OR , RULL(0x11010802), SH_UNT_EQ_1 , + SH_ACS_SCOM2_OR ); //DUPS: 11011802, 11011002, 11010C02, 11011C02, 11011402, +REG64( EQ_2_FIR_REG , RULL(0x12010800), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12011800, 12011000, 12010C00, 12011C00, 12011400, +REG64( EQ_2_FIR_REG_AND , RULL(0x12010801), SH_UNT_EQ_2 , + SH_ACS_SCOM1_AND ); //DUPS: 12011801, 12011001, 12010C01, 12011C01, 12011401, +REG64( EQ_2_FIR_REG_OR , RULL(0x12010802), SH_UNT_EQ_2 , + SH_ACS_SCOM2_OR ); //DUPS: 12011802, 12011002, 12010C02, 12011C02, 12011402, +REG64( EQ_3_FIR_REG , RULL(0x13010800), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13011800, 13011000, 13010C00, 13011C00, 13011400, +REG64( EQ_3_FIR_REG_AND , RULL(0x13010801), SH_UNT_EQ_3 , + SH_ACS_SCOM1_AND ); //DUPS: 13011801, 13011001, 13010C01, 13011C01, 13011401, +REG64( EQ_3_FIR_REG_OR , RULL(0x13010802), SH_UNT_EQ_3 , + SH_ACS_SCOM2_OR ); //DUPS: 13011802, 13011002, 13010C02, 13011C02, 13011402, +REG64( EQ_4_FIR_REG , RULL(0x14010800), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14011800, 14011000, 14010C00, 14011C00, 14011400, +REG64( EQ_4_FIR_REG_AND , RULL(0x14010801), SH_UNT_EQ_4 , + SH_ACS_SCOM1_AND ); //DUPS: 14011801, 14011001, 14010C01, 14011C01, 14011401, +REG64( EQ_4_FIR_REG_OR , RULL(0x14010802), SH_UNT_EQ_4 , + SH_ACS_SCOM2_OR ); //DUPS: 14011802, 14011002, 14010C02, 14011C02, 14011402, +REG64( EQ_5_FIR_REG , RULL(0x15010800), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15011800, 15011000, 15010C00, 15011C00, 15011400, +REG64( EQ_5_FIR_REG_AND , RULL(0x15010801), SH_UNT_EQ_5 , + SH_ACS_SCOM1_AND ); //DUPS: 15011801, 15011001, 15010C01, 15011C01, 15011401, +REG64( EQ_5_FIR_REG_OR , RULL(0x15010802), SH_UNT_EQ_5 , + SH_ACS_SCOM2_OR ); //DUPS: 15011802, 15011002, 15010C02, 15011C02, 15011402, +REG64( EX_FIR_REG , RULL(0x10011000), SH_UNT_EX , SH_ACS_SCOM_RW ); +REG64( EX_FIR_REG_AND , RULL(0x10011001), SH_UNT_EX , SH_ACS_SCOM1_AND ); +REG64( EX_FIR_REG_OR , RULL(0x10011002), SH_UNT_EX , SH_ACS_SCOM2_OR ); +REG64( EX_0_FIR_REG , RULL(0x10011000), SH_UNT_EX_0 , SH_ACS_SCOM_RW ); +REG64( EX_0_FIR_REG_AND , RULL(0x10011001), SH_UNT_EX_0 , SH_ACS_SCOM1_AND ); +REG64( EX_0_FIR_REG_OR , RULL(0x10011002), SH_UNT_EX_0 , SH_ACS_SCOM2_OR ); +REG64( EX_1_FIR_REG , RULL(0x10011400), SH_UNT_EX_1 , SH_ACS_SCOM_RW ); +REG64( EX_1_FIR_REG_AND , RULL(0x10011401), SH_UNT_EX_1 , SH_ACS_SCOM1_AND ); +REG64( EX_1_FIR_REG_OR , RULL(0x10011402), SH_UNT_EX_1 , SH_ACS_SCOM2_OR ); +REG64( EX_2_FIR_REG , RULL(0x11011000), SH_UNT_EX_2 , SH_ACS_SCOM_RW ); +REG64( EX_2_FIR_REG_AND , RULL(0x11011001), SH_UNT_EX_2 , SH_ACS_SCOM1_AND ); +REG64( EX_2_FIR_REG_OR , RULL(0x11011002), SH_UNT_EX_2 , SH_ACS_SCOM2_OR ); +REG64( EX_3_FIR_REG , RULL(0x11011400), SH_UNT_EX_3 , SH_ACS_SCOM_RW ); +REG64( EX_3_FIR_REG_AND , RULL(0x11011401), SH_UNT_EX_3 , SH_ACS_SCOM1_AND ); +REG64( EX_3_FIR_REG_OR , RULL(0x11011402), SH_UNT_EX_3 , SH_ACS_SCOM2_OR ); +REG64( EX_4_FIR_REG , RULL(0x12011000), SH_UNT_EX_4 , SH_ACS_SCOM_RW ); +REG64( EX_4_FIR_REG_AND , RULL(0x12011001), SH_UNT_EX_4 , SH_ACS_SCOM1_AND ); +REG64( EX_4_FIR_REG_OR , RULL(0x12011002), SH_UNT_EX_4 , SH_ACS_SCOM2_OR ); +REG64( EX_5_FIR_REG , RULL(0x12011400), SH_UNT_EX_5 , SH_ACS_SCOM_RW ); +REG64( EX_5_FIR_REG_AND , RULL(0x12011401), SH_UNT_EX_5 , SH_ACS_SCOM1_AND ); +REG64( EX_5_FIR_REG_OR , RULL(0x12011402), SH_UNT_EX_5 , SH_ACS_SCOM2_OR ); +REG64( EX_6_FIR_REG , RULL(0x13011000), SH_UNT_EX_6 , SH_ACS_SCOM_RW ); +REG64( EX_6_FIR_REG_AND , RULL(0x13011001), SH_UNT_EX_6 , SH_ACS_SCOM1_AND ); +REG64( EX_6_FIR_REG_OR , RULL(0x13011002), SH_UNT_EX_6 , SH_ACS_SCOM2_OR ); +REG64( EX_7_FIR_REG , RULL(0x13011400), SH_UNT_EX_7 , SH_ACS_SCOM_RW ); +REG64( EX_7_FIR_REG_AND , RULL(0x13011401), SH_UNT_EX_7 , SH_ACS_SCOM1_AND ); +REG64( EX_7_FIR_REG_OR , RULL(0x13011402), SH_UNT_EX_7 , SH_ACS_SCOM2_OR ); +REG64( EX_8_FIR_REG , RULL(0x14011000), SH_UNT_EX_8 , SH_ACS_SCOM_RW ); +REG64( EX_8_FIR_REG_AND , RULL(0x14011001), SH_UNT_EX_8 , SH_ACS_SCOM1_AND ); +REG64( EX_8_FIR_REG_OR , RULL(0x14011002), SH_UNT_EX_8 , SH_ACS_SCOM2_OR ); +REG64( EX_9_FIR_REG , RULL(0x14011400), SH_UNT_EX_9 , SH_ACS_SCOM_RW ); +REG64( EX_9_FIR_REG_AND , RULL(0x14011401), SH_UNT_EX_9 , SH_ACS_SCOM1_AND ); +REG64( EX_9_FIR_REG_OR , RULL(0x14011402), SH_UNT_EX_9 , SH_ACS_SCOM2_OR ); +REG64( EX_0_L2_FIR_REG , RULL(0x10010800), SH_UNT_EX_0_L2 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_FIR_REG_AND , RULL(0x10010801), SH_UNT_EX_0_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_0_L2_FIR_REG_OR , RULL(0x10010802), SH_UNT_EX_0_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_0_L3_FIR_REG , RULL(0x10011800), SH_UNT_EX_0_L3 , SH_ACS_SCOM_RW ); +REG64( EX_0_L3_FIR_REG_AND , RULL(0x10011801), SH_UNT_EX_0_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_0_L3_FIR_REG_OR , RULL(0x10011802), SH_UNT_EX_0_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_10_FIR_REG , RULL(0x15011000), SH_UNT_EX_10 , SH_ACS_SCOM_RW ); +REG64( EX_10_FIR_REG_AND , RULL(0x15011001), SH_UNT_EX_10 , SH_ACS_SCOM1_AND ); +REG64( EX_10_FIR_REG_OR , RULL(0x15011002), SH_UNT_EX_10 , SH_ACS_SCOM2_OR ); +REG64( EX_11_FIR_REG , RULL(0x15011400), SH_UNT_EX_11 , SH_ACS_SCOM_RW ); +REG64( EX_11_FIR_REG_AND , RULL(0x15011401), SH_UNT_EX_11 , SH_ACS_SCOM1_AND ); +REG64( EX_11_FIR_REG_OR , RULL(0x15011402), SH_UNT_EX_11 , SH_ACS_SCOM2_OR ); +REG64( EX_10_L2_FIR_REG , RULL(0x15010800), SH_UNT_EX_10_L2 , SH_ACS_SCOM_RW ); +REG64( EX_10_L2_FIR_REG_AND , RULL(0x15010801), SH_UNT_EX_10_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_10_L2_FIR_REG_OR , RULL(0x15010802), SH_UNT_EX_10_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_10_L3_FIR_REG , RULL(0x15011800), SH_UNT_EX_10_L3 , SH_ACS_SCOM_RW ); +REG64( EX_10_L3_FIR_REG_AND , RULL(0x15011801), SH_UNT_EX_10_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_10_L3_FIR_REG_OR , RULL(0x15011802), SH_UNT_EX_10_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_11_L2_FIR_REG , RULL(0x15010C00), SH_UNT_EX_11_L2 , SH_ACS_SCOM_RW ); +REG64( EX_11_L2_FIR_REG_AND , RULL(0x15010C01), SH_UNT_EX_11_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_11_L2_FIR_REG_OR , RULL(0x15010C02), SH_UNT_EX_11_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_11_L3_FIR_REG , RULL(0x15011C00), SH_UNT_EX_11_L3 , SH_ACS_SCOM_RW ); +REG64( EX_11_L3_FIR_REG_AND , RULL(0x15011C01), SH_UNT_EX_11_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_11_L3_FIR_REG_OR , RULL(0x15011C02), SH_UNT_EX_11_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_1_L2_FIR_REG , RULL(0x10010C00), SH_UNT_EX_1_L2 , SH_ACS_SCOM_RW ); +REG64( EX_1_L2_FIR_REG_AND , RULL(0x10010C01), SH_UNT_EX_1_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_1_L2_FIR_REG_OR , RULL(0x10010C02), SH_UNT_EX_1_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_1_L3_FIR_REG , RULL(0x10011C00), SH_UNT_EX_1_L3 , SH_ACS_SCOM_RW ); +REG64( EX_1_L3_FIR_REG_AND , RULL(0x10011C01), SH_UNT_EX_1_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_1_L3_FIR_REG_OR , RULL(0x10011C02), SH_UNT_EX_1_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_2_L2_FIR_REG , RULL(0x11010800), SH_UNT_EX_2_L2 , SH_ACS_SCOM_RW ); +REG64( EX_2_L2_FIR_REG_AND , RULL(0x11010801), SH_UNT_EX_2_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_2_L2_FIR_REG_OR , RULL(0x11010802), SH_UNT_EX_2_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_2_L3_FIR_REG , RULL(0x11011800), SH_UNT_EX_2_L3 , SH_ACS_SCOM_RW ); +REG64( EX_2_L3_FIR_REG_AND , RULL(0x11011801), SH_UNT_EX_2_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_2_L3_FIR_REG_OR , RULL(0x11011802), SH_UNT_EX_2_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_3_L2_FIR_REG , RULL(0x11010C00), SH_UNT_EX_3_L2 , SH_ACS_SCOM_RW ); +REG64( EX_3_L2_FIR_REG_AND , RULL(0x11010C01), SH_UNT_EX_3_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_3_L2_FIR_REG_OR , RULL(0x11010C02), SH_UNT_EX_3_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_3_L3_FIR_REG , RULL(0x11011C00), SH_UNT_EX_3_L3 , SH_ACS_SCOM_RW ); +REG64( EX_3_L3_FIR_REG_AND , RULL(0x11011C01), SH_UNT_EX_3_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_3_L3_FIR_REG_OR , RULL(0x11011C02), SH_UNT_EX_3_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_4_L2_FIR_REG , RULL(0x12010800), SH_UNT_EX_4_L2 , SH_ACS_SCOM_RW ); +REG64( EX_4_L2_FIR_REG_AND , RULL(0x12010801), SH_UNT_EX_4_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_4_L2_FIR_REG_OR , RULL(0x12010802), SH_UNT_EX_4_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_4_L3_FIR_REG , RULL(0x12011800), SH_UNT_EX_4_L3 , SH_ACS_SCOM_RW ); +REG64( EX_4_L3_FIR_REG_AND , RULL(0x12011801), SH_UNT_EX_4_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_4_L3_FIR_REG_OR , RULL(0x12011802), SH_UNT_EX_4_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_5_L2_FIR_REG , RULL(0x12010C00), SH_UNT_EX_5_L2 , SH_ACS_SCOM_RW ); +REG64( EX_5_L2_FIR_REG_AND , RULL(0x12010C01), SH_UNT_EX_5_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_5_L2_FIR_REG_OR , RULL(0x12010C02), SH_UNT_EX_5_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_5_L3_FIR_REG , RULL(0x12011C00), SH_UNT_EX_5_L3 , SH_ACS_SCOM_RW ); +REG64( EX_5_L3_FIR_REG_AND , RULL(0x12011C01), SH_UNT_EX_5_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_5_L3_FIR_REG_OR , RULL(0x12011C02), SH_UNT_EX_5_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_6_L2_FIR_REG , RULL(0x13010800), SH_UNT_EX_6_L2 , SH_ACS_SCOM_RW ); +REG64( EX_6_L2_FIR_REG_AND , RULL(0x13010801), SH_UNT_EX_6_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_6_L2_FIR_REG_OR , RULL(0x13010802), SH_UNT_EX_6_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_6_L3_FIR_REG , RULL(0x13011800), SH_UNT_EX_6_L3 , SH_ACS_SCOM_RW ); +REG64( EX_6_L3_FIR_REG_AND , RULL(0x13011801), SH_UNT_EX_6_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_6_L3_FIR_REG_OR , RULL(0x13011802), SH_UNT_EX_6_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_7_L2_FIR_REG , RULL(0x13010C00), SH_UNT_EX_7_L2 , SH_ACS_SCOM_RW ); +REG64( EX_7_L2_FIR_REG_AND , RULL(0x13010C01), SH_UNT_EX_7_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_7_L2_FIR_REG_OR , RULL(0x13010C02), SH_UNT_EX_7_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_7_L3_FIR_REG , RULL(0x13011C00), SH_UNT_EX_7_L3 , SH_ACS_SCOM_RW ); +REG64( EX_7_L3_FIR_REG_AND , RULL(0x13011C01), SH_UNT_EX_7_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_7_L3_FIR_REG_OR , RULL(0x13011C02), SH_UNT_EX_7_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_8_L2_FIR_REG , RULL(0x14010800), SH_UNT_EX_8_L2 , SH_ACS_SCOM_RW ); +REG64( EX_8_L2_FIR_REG_AND , RULL(0x14010801), SH_UNT_EX_8_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_8_L2_FIR_REG_OR , RULL(0x14010802), SH_UNT_EX_8_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_8_L3_FIR_REG , RULL(0x14011800), SH_UNT_EX_8_L3 , SH_ACS_SCOM_RW ); +REG64( EX_8_L3_FIR_REG_AND , RULL(0x14011801), SH_UNT_EX_8_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_8_L3_FIR_REG_OR , RULL(0x14011802), SH_UNT_EX_8_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_9_L2_FIR_REG , RULL(0x14010C00), SH_UNT_EX_9_L2 , SH_ACS_SCOM_RW ); +REG64( EX_9_L2_FIR_REG_AND , RULL(0x14010C01), SH_UNT_EX_9_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_9_L2_FIR_REG_OR , RULL(0x14010C02), SH_UNT_EX_9_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_9_L3_FIR_REG , RULL(0x14011C00), SH_UNT_EX_9_L3 , SH_ACS_SCOM_RW ); +REG64( EX_9_L3_FIR_REG_AND , RULL(0x14011C01), SH_UNT_EX_9_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_9_L3_FIR_REG_OR , RULL(0x14011C02), SH_UNT_EX_9_L3 , SH_ACS_SCOM2_OR ); +REG64( EX_L2_FIR_REG , RULL(0x10010800), SH_UNT_EX_L2 , SH_ACS_SCOM_RW ); +REG64( EX_L2_FIR_REG_AND , RULL(0x10010801), SH_UNT_EX_L2 , SH_ACS_SCOM1_AND ); +REG64( EX_L2_FIR_REG_OR , RULL(0x10010802), SH_UNT_EX_L2 , SH_ACS_SCOM2_OR ); +REG64( EX_L3_FIR_REG , RULL(0x10011800), SH_UNT_EX_L3 , SH_ACS_SCOM_RW ); +REG64( EX_L3_FIR_REG_AND , RULL(0x10011801), SH_UNT_EX_L3 , SH_ACS_SCOM1_AND ); +REG64( EX_L3_FIR_REG_OR , RULL(0x10011802), SH_UNT_EX_L3 , SH_ACS_SCOM2_OR ); + +REG64( CAPP_FLUSHCPIG , RULL(0x02010820), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_FLUSHCPIG , RULL(0x02010820), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_FLUSHCPIG , RULL(0x04010820), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_FLUSHSHUE , RULL(0x0201080F), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_FLUSHSHUE , RULL(0x0201080F), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_FLUSHSHUE , RULL(0x0401080F), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( C_GXSTOP0_MASK_REG , RULL(0x20040014), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_GXSTOP0_MASK_REG , RULL(0x20040014), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_GXSTOP0_MASK_REG , RULL(0x21040014), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_GXSTOP0_MASK_REG , RULL(0x22040014), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_GXSTOP0_MASK_REG , RULL(0x23040014), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_GXSTOP0_MASK_REG , RULL(0x24040014), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_GXSTOP0_MASK_REG , RULL(0x25040014), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_GXSTOP0_MASK_REG , RULL(0x26040014), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_GXSTOP0_MASK_REG , RULL(0x27040014), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_GXSTOP0_MASK_REG , RULL(0x28040014), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_GXSTOP0_MASK_REG , RULL(0x29040014), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_GXSTOP0_MASK_REG , RULL(0x2A040014), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_GXSTOP0_MASK_REG , RULL(0x2B040014), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_GXSTOP0_MASK_REG , RULL(0x2C040014), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_GXSTOP0_MASK_REG , RULL(0x2D040014), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_GXSTOP0_MASK_REG , RULL(0x2E040014), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_GXSTOP0_MASK_REG , RULL(0x2F040014), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_GXSTOP0_MASK_REG , RULL(0x30040014), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_GXSTOP0_MASK_REG , RULL(0x31040014), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_GXSTOP0_MASK_REG , RULL(0x32040014), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_GXSTOP0_MASK_REG , RULL(0x33040014), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_GXSTOP0_MASK_REG , RULL(0x34040014), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_GXSTOP0_MASK_REG , RULL(0x35040014), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_GXSTOP0_MASK_REG , RULL(0x36040014), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_GXSTOP0_MASK_REG , RULL(0x37040014), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_GXSTOP0_MASK_REG , RULL(0x10040014), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_GXSTOP0_MASK_REG , RULL(0x10040014), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_GXSTOP0_MASK_REG , RULL(0x11040014), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_GXSTOP0_MASK_REG , RULL(0x12040014), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_GXSTOP0_MASK_REG , RULL(0x13040014), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_GXSTOP0_MASK_REG , RULL(0x14040014), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_GXSTOP0_MASK_REG , RULL(0x15040014), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_GXSTOP0_MASK_REG , RULL(0x20040014), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21040014, +REG64( EX_0_GXSTOP0_MASK_REG , RULL(0x20040014), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21040014, +REG64( EX_1_GXSTOP0_MASK_REG , RULL(0x22040014), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23040014, +REG64( EX_2_GXSTOP0_MASK_REG , RULL(0x24040014), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25040014, +REG64( EX_3_GXSTOP0_MASK_REG , RULL(0x26040014), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27040014, +REG64( EX_4_GXSTOP0_MASK_REG , RULL(0x28040014), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29040014, +REG64( EX_5_GXSTOP0_MASK_REG , RULL(0x2A040014), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B040014, +REG64( EX_6_GXSTOP0_MASK_REG , RULL(0x2C040014), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D040014, +REG64( EX_7_GXSTOP0_MASK_REG , RULL(0x2E040014), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F040014, +REG64( EX_8_GXSTOP0_MASK_REG , RULL(0x30040014), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31040014, +REG64( EX_9_GXSTOP0_MASK_REG , RULL(0x32040014), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33040014, +REG64( EX_10_GXSTOP0_MASK_REG , RULL(0x34040014), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35040014, +REG64( EX_11_GXSTOP0_MASK_REG , RULL(0x36040014), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37040014, + +REG64( C_GXSTOP1_MASK_REG , RULL(0x20040015), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_GXSTOP1_MASK_REG , RULL(0x20040015), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_GXSTOP1_MASK_REG , RULL(0x21040015), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_GXSTOP1_MASK_REG , RULL(0x22040015), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_GXSTOP1_MASK_REG , RULL(0x23040015), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_GXSTOP1_MASK_REG , RULL(0x24040015), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_GXSTOP1_MASK_REG , RULL(0x25040015), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_GXSTOP1_MASK_REG , RULL(0x26040015), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_GXSTOP1_MASK_REG , RULL(0x27040015), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_GXSTOP1_MASK_REG , RULL(0x28040015), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_GXSTOP1_MASK_REG , RULL(0x29040015), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_GXSTOP1_MASK_REG , RULL(0x2A040015), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_GXSTOP1_MASK_REG , RULL(0x2B040015), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_GXSTOP1_MASK_REG , RULL(0x2C040015), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_GXSTOP1_MASK_REG , RULL(0x2D040015), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_GXSTOP1_MASK_REG , RULL(0x2E040015), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_GXSTOP1_MASK_REG , RULL(0x2F040015), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_GXSTOP1_MASK_REG , RULL(0x30040015), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_GXSTOP1_MASK_REG , RULL(0x31040015), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_GXSTOP1_MASK_REG , RULL(0x32040015), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_GXSTOP1_MASK_REG , RULL(0x33040015), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_GXSTOP1_MASK_REG , RULL(0x34040015), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_GXSTOP1_MASK_REG , RULL(0x35040015), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_GXSTOP1_MASK_REG , RULL(0x36040015), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_GXSTOP1_MASK_REG , RULL(0x37040015), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_GXSTOP1_MASK_REG , RULL(0x10040015), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_GXSTOP1_MASK_REG , RULL(0x10040015), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_GXSTOP1_MASK_REG , RULL(0x11040015), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_GXSTOP1_MASK_REG , RULL(0x12040015), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_GXSTOP1_MASK_REG , RULL(0x13040015), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_GXSTOP1_MASK_REG , RULL(0x14040015), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_GXSTOP1_MASK_REG , RULL(0x15040015), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_GXSTOP1_MASK_REG , RULL(0x20040015), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21040015, +REG64( EX_0_GXSTOP1_MASK_REG , RULL(0x20040015), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21040015, +REG64( EX_1_GXSTOP1_MASK_REG , RULL(0x22040015), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23040015, +REG64( EX_2_GXSTOP1_MASK_REG , RULL(0x24040015), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25040015, +REG64( EX_3_GXSTOP1_MASK_REG , RULL(0x26040015), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27040015, +REG64( EX_4_GXSTOP1_MASK_REG , RULL(0x28040015), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29040015, +REG64( EX_5_GXSTOP1_MASK_REG , RULL(0x2A040015), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B040015, +REG64( EX_6_GXSTOP1_MASK_REG , RULL(0x2C040015), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D040015, +REG64( EX_7_GXSTOP1_MASK_REG , RULL(0x2E040015), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F040015, +REG64( EX_8_GXSTOP1_MASK_REG , RULL(0x30040015), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31040015, +REG64( EX_9_GXSTOP1_MASK_REG , RULL(0x32040015), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33040015, +REG64( EX_10_GXSTOP1_MASK_REG , RULL(0x34040015), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35040015, +REG64( EX_11_GXSTOP1_MASK_REG , RULL(0x36040015), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37040015, + +REG64( C_GXSTOP2_MASK_REG , RULL(0x20040016), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_GXSTOP2_MASK_REG , RULL(0x20040016), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_GXSTOP2_MASK_REG , RULL(0x21040016), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_GXSTOP2_MASK_REG , RULL(0x22040016), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_GXSTOP2_MASK_REG , RULL(0x23040016), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_GXSTOP2_MASK_REG , RULL(0x24040016), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_GXSTOP2_MASK_REG , RULL(0x25040016), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_GXSTOP2_MASK_REG , RULL(0x26040016), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_GXSTOP2_MASK_REG , RULL(0x27040016), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_GXSTOP2_MASK_REG , RULL(0x28040016), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_GXSTOP2_MASK_REG , RULL(0x29040016), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_GXSTOP2_MASK_REG , RULL(0x2A040016), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_GXSTOP2_MASK_REG , RULL(0x2B040016), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_GXSTOP2_MASK_REG , RULL(0x2C040016), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_GXSTOP2_MASK_REG , RULL(0x2D040016), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_GXSTOP2_MASK_REG , RULL(0x2E040016), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_GXSTOP2_MASK_REG , RULL(0x2F040016), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_GXSTOP2_MASK_REG , RULL(0x30040016), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_GXSTOP2_MASK_REG , RULL(0x31040016), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_GXSTOP2_MASK_REG , RULL(0x32040016), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_GXSTOP2_MASK_REG , RULL(0x33040016), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_GXSTOP2_MASK_REG , RULL(0x34040016), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_GXSTOP2_MASK_REG , RULL(0x35040016), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_GXSTOP2_MASK_REG , RULL(0x36040016), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_GXSTOP2_MASK_REG , RULL(0x37040016), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_GXSTOP2_MASK_REG , RULL(0x10040016), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_GXSTOP2_MASK_REG , RULL(0x10040016), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_GXSTOP2_MASK_REG , RULL(0x11040016), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_GXSTOP2_MASK_REG , RULL(0x12040016), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_GXSTOP2_MASK_REG , RULL(0x13040016), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_GXSTOP2_MASK_REG , RULL(0x14040016), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_GXSTOP2_MASK_REG , RULL(0x15040016), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_GXSTOP2_MASK_REG , RULL(0x20040016), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21040016, +REG64( EX_0_GXSTOP2_MASK_REG , RULL(0x20040016), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21040016, +REG64( EX_1_GXSTOP2_MASK_REG , RULL(0x22040016), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23040016, +REG64( EX_2_GXSTOP2_MASK_REG , RULL(0x24040016), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25040016, +REG64( EX_3_GXSTOP2_MASK_REG , RULL(0x26040016), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27040016, +REG64( EX_4_GXSTOP2_MASK_REG , RULL(0x28040016), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29040016, +REG64( EX_5_GXSTOP2_MASK_REG , RULL(0x2A040016), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B040016, +REG64( EX_6_GXSTOP2_MASK_REG , RULL(0x2C040016), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D040016, +REG64( EX_7_GXSTOP2_MASK_REG , RULL(0x2E040016), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F040016, +REG64( EX_8_GXSTOP2_MASK_REG , RULL(0x30040016), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31040016, +REG64( EX_9_GXSTOP2_MASK_REG , RULL(0x32040016), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33040016, +REG64( EX_10_GXSTOP2_MASK_REG , RULL(0x34040016), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35040016, +REG64( EX_11_GXSTOP2_MASK_REG , RULL(0x36040016), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37040016, + +REG64( C_GXSTOP_TRIG_REG , RULL(0x20040013), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_GXSTOP_TRIG_REG , RULL(0x20040013), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_GXSTOP_TRIG_REG , RULL(0x21040013), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_GXSTOP_TRIG_REG , RULL(0x22040013), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_GXSTOP_TRIG_REG , RULL(0x23040013), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_GXSTOP_TRIG_REG , RULL(0x24040013), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_GXSTOP_TRIG_REG , RULL(0x25040013), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_GXSTOP_TRIG_REG , RULL(0x26040013), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_GXSTOP_TRIG_REG , RULL(0x27040013), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_GXSTOP_TRIG_REG , RULL(0x28040013), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_GXSTOP_TRIG_REG , RULL(0x29040013), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_GXSTOP_TRIG_REG , RULL(0x2A040013), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_GXSTOP_TRIG_REG , RULL(0x2B040013), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_GXSTOP_TRIG_REG , RULL(0x2C040013), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_GXSTOP_TRIG_REG , RULL(0x2D040013), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_GXSTOP_TRIG_REG , RULL(0x2E040013), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_GXSTOP_TRIG_REG , RULL(0x2F040013), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_GXSTOP_TRIG_REG , RULL(0x30040013), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_GXSTOP_TRIG_REG , RULL(0x31040013), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_GXSTOP_TRIG_REG , RULL(0x32040013), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_GXSTOP_TRIG_REG , RULL(0x33040013), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_GXSTOP_TRIG_REG , RULL(0x34040013), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_GXSTOP_TRIG_REG , RULL(0x35040013), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_GXSTOP_TRIG_REG , RULL(0x36040013), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_GXSTOP_TRIG_REG , RULL(0x37040013), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_GXSTOP_TRIG_REG , RULL(0x10040013), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_GXSTOP_TRIG_REG , RULL(0x10040013), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_GXSTOP_TRIG_REG , RULL(0x11040013), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_GXSTOP_TRIG_REG , RULL(0x12040013), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_GXSTOP_TRIG_REG , RULL(0x13040013), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_GXSTOP_TRIG_REG , RULL(0x14040013), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_GXSTOP_TRIG_REG , RULL(0x15040013), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_GXSTOP_TRIG_REG , RULL(0x20040013), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21040013, +REG64( EX_0_GXSTOP_TRIG_REG , RULL(0x20040013), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21040013, +REG64( EX_1_GXSTOP_TRIG_REG , RULL(0x22040013), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23040013, +REG64( EX_2_GXSTOP_TRIG_REG , RULL(0x24040013), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25040013, +REG64( EX_3_GXSTOP_TRIG_REG , RULL(0x26040013), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27040013, +REG64( EX_4_GXSTOP_TRIG_REG , RULL(0x28040013), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29040013, +REG64( EX_5_GXSTOP_TRIG_REG , RULL(0x2A040013), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B040013, +REG64( EX_6_GXSTOP_TRIG_REG , RULL(0x2C040013), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D040013, +REG64( EX_7_GXSTOP_TRIG_REG , RULL(0x2E040013), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F040013, +REG64( EX_8_GXSTOP_TRIG_REG , RULL(0x30040013), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31040013, +REG64( EX_9_GXSTOP_TRIG_REG , RULL(0x32040013), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33040013, +REG64( EX_10_GXSTOP_TRIG_REG , RULL(0x34040013), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35040013, +REG64( EX_11_GXSTOP_TRIG_REG , RULL(0x36040013), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37040013, + +REG64( C_HANG_CONTROL , RULL(0x20010A00), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_HANG_CONTROL , RULL(0x20010A00), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_HANG_CONTROL , RULL(0x21010A00), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_HANG_CONTROL , RULL(0x22010A00), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_HANG_CONTROL , RULL(0x23010A00), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_HANG_CONTROL , RULL(0x24010A00), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_HANG_CONTROL , RULL(0x25010A00), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_HANG_CONTROL , RULL(0x26010A00), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_HANG_CONTROL , RULL(0x27010A00), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_HANG_CONTROL , RULL(0x28010A00), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_HANG_CONTROL , RULL(0x29010A00), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_HANG_CONTROL , RULL(0x2A010A00), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_HANG_CONTROL , RULL(0x2B010A00), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_HANG_CONTROL , RULL(0x2C010A00), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_HANG_CONTROL , RULL(0x2D010A00), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_HANG_CONTROL , RULL(0x2E010A00), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_HANG_CONTROL , RULL(0x2F010A00), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_HANG_CONTROL , RULL(0x30010A00), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_HANG_CONTROL , RULL(0x31010A00), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_HANG_CONTROL , RULL(0x32010A00), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_HANG_CONTROL , RULL(0x33010A00), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_HANG_CONTROL , RULL(0x34010A00), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_HANG_CONTROL , RULL(0x35010A00), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_HANG_CONTROL , RULL(0x36010A00), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_HANG_CONTROL , RULL(0x37010A00), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_0_L2_HANG_CONTROL , RULL(0x20010A00), SH_UNT_EX_0_L2 , + SH_ACS_SCOM ); //DUPS: 21010A00, +REG64( EX_10_L2_HANG_CONTROL , RULL(0x34010A00), SH_UNT_EX_10_L2 , + SH_ACS_SCOM ); //DUPS: 35010A00, +REG64( EX_11_L2_HANG_CONTROL , RULL(0x36010A00), SH_UNT_EX_11_L2 , + SH_ACS_SCOM ); //DUPS: 37010A00, +REG64( EX_1_L2_HANG_CONTROL , RULL(0x22010A00), SH_UNT_EX_1_L2 , + SH_ACS_SCOM ); //DUPS: 23010A00, +REG64( EX_2_L2_HANG_CONTROL , RULL(0x24010A00), SH_UNT_EX_2_L2 , + SH_ACS_SCOM ); //DUPS: 25010A00, +REG64( EX_3_L2_HANG_CONTROL , RULL(0x26010A00), SH_UNT_EX_3_L2 , + SH_ACS_SCOM ); //DUPS: 27010A00, +REG64( EX_4_L2_HANG_CONTROL , RULL(0x28010A00), SH_UNT_EX_4_L2 , + SH_ACS_SCOM ); //DUPS: 29010A00, +REG64( EX_5_L2_HANG_CONTROL , RULL(0x2A010A00), SH_UNT_EX_5_L2 , + SH_ACS_SCOM ); //DUPS: 2B010A00, +REG64( EX_6_L2_HANG_CONTROL , RULL(0x2C010A00), SH_UNT_EX_6_L2 , + SH_ACS_SCOM ); //DUPS: 2D010A00, +REG64( EX_7_L2_HANG_CONTROL , RULL(0x2E010A00), SH_UNT_EX_7_L2 , + SH_ACS_SCOM ); //DUPS: 2F010A00, +REG64( EX_8_L2_HANG_CONTROL , RULL(0x30010A00), SH_UNT_EX_8_L2 , + SH_ACS_SCOM ); //DUPS: 31010A00, +REG64( EX_9_L2_HANG_CONTROL , RULL(0x32010A00), SH_UNT_EX_9_L2 , + SH_ACS_SCOM ); //DUPS: 33010A00, +REG64( EX_L2_HANG_CONTROL , RULL(0x20010A00), SH_UNT_EX_L2 , + SH_ACS_SCOM ); //DUPS: 21010A00, + +REG64( C_HANG_PULSE_0_REG , RULL(0x200F0020), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_HANG_PULSE_0_REG , RULL(0x200F0020), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_HANG_PULSE_0_REG , RULL(0x210F0020), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_HANG_PULSE_0_REG , RULL(0x220F0020), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_HANG_PULSE_0_REG , RULL(0x230F0020), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_HANG_PULSE_0_REG , RULL(0x240F0020), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_HANG_PULSE_0_REG , RULL(0x250F0020), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_HANG_PULSE_0_REG , RULL(0x260F0020), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_HANG_PULSE_0_REG , RULL(0x270F0020), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_HANG_PULSE_0_REG , RULL(0x280F0020), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_HANG_PULSE_0_REG , RULL(0x290F0020), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_HANG_PULSE_0_REG , RULL(0x2A0F0020), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_HANG_PULSE_0_REG , RULL(0x2B0F0020), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_HANG_PULSE_0_REG , RULL(0x2C0F0020), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_HANG_PULSE_0_REG , RULL(0x2D0F0020), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_HANG_PULSE_0_REG , RULL(0x2E0F0020), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_HANG_PULSE_0_REG , RULL(0x2F0F0020), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_HANG_PULSE_0_REG , RULL(0x300F0020), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_HANG_PULSE_0_REG , RULL(0x310F0020), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_HANG_PULSE_0_REG , RULL(0x320F0020), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_HANG_PULSE_0_REG , RULL(0x330F0020), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_HANG_PULSE_0_REG , RULL(0x340F0020), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_HANG_PULSE_0_REG , RULL(0x350F0020), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_HANG_PULSE_0_REG , RULL(0x360F0020), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_HANG_PULSE_0_REG , RULL(0x370F0020), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_HANG_PULSE_0_REG , RULL(0x100F0020), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_HANG_PULSE_0_REG , RULL(0x100F0020), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_HANG_PULSE_0_REG , RULL(0x110F0020), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_HANG_PULSE_0_REG , RULL(0x120F0020), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_HANG_PULSE_0_REG , RULL(0x130F0020), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_HANG_PULSE_0_REG , RULL(0x140F0020), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_HANG_PULSE_0_REG , RULL(0x150F0020), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_HANG_PULSE_0_REG , RULL(0x200F0020), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0020, +REG64( EX_0_HANG_PULSE_0_REG , RULL(0x200F0020), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0020, +REG64( EX_1_HANG_PULSE_0_REG , RULL(0x230F0020), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0020, +REG64( EX_2_HANG_PULSE_0_REG , RULL(0x240F0020), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0020, +REG64( EX_3_HANG_PULSE_0_REG , RULL(0x260F0020), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0020, +REG64( EX_4_HANG_PULSE_0_REG , RULL(0x280F0020), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0020, +REG64( EX_5_HANG_PULSE_0_REG , RULL(0x2A0F0020), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0020, +REG64( EX_6_HANG_PULSE_0_REG , RULL(0x2C0F0020), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0020, +REG64( EX_7_HANG_PULSE_0_REG , RULL(0x2E0F0020), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0020, +REG64( EX_8_HANG_PULSE_0_REG , RULL(0x300F0020), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0020, +REG64( EX_9_HANG_PULSE_0_REG , RULL(0x320F0020), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0020, +REG64( EX_10_HANG_PULSE_0_REG , RULL(0x340F0020), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0020, +REG64( EX_11_HANG_PULSE_0_REG , RULL(0x360F0020), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0020, + +REG64( C_HANG_PULSE_1_REG , RULL(0x200F0021), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_HANG_PULSE_1_REG , RULL(0x200F0021), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_HANG_PULSE_1_REG , RULL(0x210F0021), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_HANG_PULSE_1_REG , RULL(0x220F0021), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_HANG_PULSE_1_REG , RULL(0x230F0021), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_HANG_PULSE_1_REG , RULL(0x240F0021), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_HANG_PULSE_1_REG , RULL(0x250F0021), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_HANG_PULSE_1_REG , RULL(0x260F0021), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_HANG_PULSE_1_REG , RULL(0x270F0021), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_HANG_PULSE_1_REG , RULL(0x280F0021), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_HANG_PULSE_1_REG , RULL(0x290F0021), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_HANG_PULSE_1_REG , RULL(0x2A0F0021), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_HANG_PULSE_1_REG , RULL(0x2B0F0021), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_HANG_PULSE_1_REG , RULL(0x2C0F0021), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_HANG_PULSE_1_REG , RULL(0x2D0F0021), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_HANG_PULSE_1_REG , RULL(0x2E0F0021), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_HANG_PULSE_1_REG , RULL(0x2F0F0021), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_HANG_PULSE_1_REG , RULL(0x300F0021), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_HANG_PULSE_1_REG , RULL(0x310F0021), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_HANG_PULSE_1_REG , RULL(0x320F0021), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_HANG_PULSE_1_REG , RULL(0x330F0021), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_HANG_PULSE_1_REG , RULL(0x340F0021), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_HANG_PULSE_1_REG , RULL(0x350F0021), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_HANG_PULSE_1_REG , RULL(0x360F0021), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_HANG_PULSE_1_REG , RULL(0x370F0021), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_HANG_PULSE_1_REG , RULL(0x100F0021), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_HANG_PULSE_1_REG , RULL(0x100F0021), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_HANG_PULSE_1_REG , RULL(0x110F0021), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_HANG_PULSE_1_REG , RULL(0x120F0021), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_HANG_PULSE_1_REG , RULL(0x130F0021), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_HANG_PULSE_1_REG , RULL(0x140F0021), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_HANG_PULSE_1_REG , RULL(0x150F0021), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_HANG_PULSE_1_REG , RULL(0x200F0021), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0021, +REG64( EX_0_HANG_PULSE_1_REG , RULL(0x200F0021), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0021, +REG64( EX_1_HANG_PULSE_1_REG , RULL(0x230F0021), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0021, +REG64( EX_2_HANG_PULSE_1_REG , RULL(0x240F0021), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0021, +REG64( EX_3_HANG_PULSE_1_REG , RULL(0x260F0021), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0021, +REG64( EX_4_HANG_PULSE_1_REG , RULL(0x280F0021), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0021, +REG64( EX_5_HANG_PULSE_1_REG , RULL(0x2A0F0021), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0021, +REG64( EX_6_HANG_PULSE_1_REG , RULL(0x2C0F0021), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0021, +REG64( EX_7_HANG_PULSE_1_REG , RULL(0x2E0F0021), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0021, +REG64( EX_8_HANG_PULSE_1_REG , RULL(0x300F0021), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0021, +REG64( EX_9_HANG_PULSE_1_REG , RULL(0x320F0021), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0021, +REG64( EX_10_HANG_PULSE_1_REG , RULL(0x340F0021), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0021, +REG64( EX_11_HANG_PULSE_1_REG , RULL(0x360F0021), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0021, + +REG64( C_HANG_PULSE_2_REG , RULL(0x200F0022), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_HANG_PULSE_2_REG , RULL(0x200F0022), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_HANG_PULSE_2_REG , RULL(0x210F0022), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_HANG_PULSE_2_REG , RULL(0x220F0022), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_HANG_PULSE_2_REG , RULL(0x230F0022), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_HANG_PULSE_2_REG , RULL(0x240F0022), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_HANG_PULSE_2_REG , RULL(0x250F0022), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_HANG_PULSE_2_REG , RULL(0x260F0022), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_HANG_PULSE_2_REG , RULL(0x270F0022), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_HANG_PULSE_2_REG , RULL(0x280F0022), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_HANG_PULSE_2_REG , RULL(0x290F0022), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_HANG_PULSE_2_REG , RULL(0x2A0F0022), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_HANG_PULSE_2_REG , RULL(0x2B0F0022), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_HANG_PULSE_2_REG , RULL(0x2C0F0022), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_HANG_PULSE_2_REG , RULL(0x2D0F0022), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_HANG_PULSE_2_REG , RULL(0x2E0F0022), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_HANG_PULSE_2_REG , RULL(0x2F0F0022), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_HANG_PULSE_2_REG , RULL(0x300F0022), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_HANG_PULSE_2_REG , RULL(0x310F0022), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_HANG_PULSE_2_REG , RULL(0x320F0022), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_HANG_PULSE_2_REG , RULL(0x330F0022), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_HANG_PULSE_2_REG , RULL(0x340F0022), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_HANG_PULSE_2_REG , RULL(0x350F0022), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_HANG_PULSE_2_REG , RULL(0x360F0022), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_HANG_PULSE_2_REG , RULL(0x370F0022), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_HANG_PULSE_2_REG , RULL(0x100F0022), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_HANG_PULSE_2_REG , RULL(0x100F0022), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_HANG_PULSE_2_REG , RULL(0x110F0022), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_HANG_PULSE_2_REG , RULL(0x120F0022), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_HANG_PULSE_2_REG , RULL(0x130F0022), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_HANG_PULSE_2_REG , RULL(0x140F0022), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_HANG_PULSE_2_REG , RULL(0x150F0022), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_HANG_PULSE_2_REG , RULL(0x200F0022), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0022, +REG64( EX_0_HANG_PULSE_2_REG , RULL(0x200F0022), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0022, +REG64( EX_1_HANG_PULSE_2_REG , RULL(0x230F0022), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0022, +REG64( EX_2_HANG_PULSE_2_REG , RULL(0x240F0022), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0022, +REG64( EX_3_HANG_PULSE_2_REG , RULL(0x260F0022), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0022, +REG64( EX_4_HANG_PULSE_2_REG , RULL(0x280F0022), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0022, +REG64( EX_5_HANG_PULSE_2_REG , RULL(0x2A0F0022), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0022, +REG64( EX_6_HANG_PULSE_2_REG , RULL(0x2C0F0022), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0022, +REG64( EX_7_HANG_PULSE_2_REG , RULL(0x2E0F0022), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0022, +REG64( EX_8_HANG_PULSE_2_REG , RULL(0x300F0022), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0022, +REG64( EX_9_HANG_PULSE_2_REG , RULL(0x320F0022), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0022, +REG64( EX_10_HANG_PULSE_2_REG , RULL(0x340F0022), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0022, +REG64( EX_11_HANG_PULSE_2_REG , RULL(0x360F0022), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0022, + +REG64( C_HANG_PULSE_3_REG , RULL(0x200F0023), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_HANG_PULSE_3_REG , RULL(0x200F0023), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_HANG_PULSE_3_REG , RULL(0x210F0023), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_HANG_PULSE_3_REG , RULL(0x220F0023), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_HANG_PULSE_3_REG , RULL(0x230F0023), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_HANG_PULSE_3_REG , RULL(0x240F0023), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_HANG_PULSE_3_REG , RULL(0x250F0023), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_HANG_PULSE_3_REG , RULL(0x260F0023), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_HANG_PULSE_3_REG , RULL(0x270F0023), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_HANG_PULSE_3_REG , RULL(0x280F0023), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_HANG_PULSE_3_REG , RULL(0x290F0023), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_HANG_PULSE_3_REG , RULL(0x2A0F0023), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_HANG_PULSE_3_REG , RULL(0x2B0F0023), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_HANG_PULSE_3_REG , RULL(0x2C0F0023), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_HANG_PULSE_3_REG , RULL(0x2D0F0023), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_HANG_PULSE_3_REG , RULL(0x2E0F0023), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_HANG_PULSE_3_REG , RULL(0x2F0F0023), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_HANG_PULSE_3_REG , RULL(0x300F0023), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_HANG_PULSE_3_REG , RULL(0x310F0023), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_HANG_PULSE_3_REG , RULL(0x320F0023), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_HANG_PULSE_3_REG , RULL(0x330F0023), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_HANG_PULSE_3_REG , RULL(0x340F0023), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_HANG_PULSE_3_REG , RULL(0x350F0023), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_HANG_PULSE_3_REG , RULL(0x360F0023), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_HANG_PULSE_3_REG , RULL(0x370F0023), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_HANG_PULSE_3_REG , RULL(0x100F0023), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_HANG_PULSE_3_REG , RULL(0x100F0023), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_HANG_PULSE_3_REG , RULL(0x110F0023), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_HANG_PULSE_3_REG , RULL(0x120F0023), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_HANG_PULSE_3_REG , RULL(0x130F0023), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_HANG_PULSE_3_REG , RULL(0x140F0023), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_HANG_PULSE_3_REG , RULL(0x150F0023), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_HANG_PULSE_3_REG , RULL(0x200F0023), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0023, +REG64( EX_0_HANG_PULSE_3_REG , RULL(0x200F0023), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0023, +REG64( EX_1_HANG_PULSE_3_REG , RULL(0x230F0023), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0023, +REG64( EX_2_HANG_PULSE_3_REG , RULL(0x240F0023), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0023, +REG64( EX_3_HANG_PULSE_3_REG , RULL(0x260F0023), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0023, +REG64( EX_4_HANG_PULSE_3_REG , RULL(0x280F0023), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0023, +REG64( EX_5_HANG_PULSE_3_REG , RULL(0x2A0F0023), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0023, +REG64( EX_6_HANG_PULSE_3_REG , RULL(0x2C0F0023), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0023, +REG64( EX_7_HANG_PULSE_3_REG , RULL(0x2E0F0023), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0023, +REG64( EX_8_HANG_PULSE_3_REG , RULL(0x300F0023), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0023, +REG64( EX_9_HANG_PULSE_3_REG , RULL(0x320F0023), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0023, +REG64( EX_10_HANG_PULSE_3_REG , RULL(0x340F0023), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0023, +REG64( EX_11_HANG_PULSE_3_REG , RULL(0x360F0023), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0023, + +REG64( C_HANG_PULSE_4_REG , RULL(0x200F0024), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_HANG_PULSE_4_REG , RULL(0x200F0024), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_HANG_PULSE_4_REG , RULL(0x210F0024), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_HANG_PULSE_4_REG , RULL(0x220F0024), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_HANG_PULSE_4_REG , RULL(0x230F0024), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_HANG_PULSE_4_REG , RULL(0x240F0024), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_HANG_PULSE_4_REG , RULL(0x250F0024), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_HANG_PULSE_4_REG , RULL(0x260F0024), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_HANG_PULSE_4_REG , RULL(0x270F0024), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_HANG_PULSE_4_REG , RULL(0x280F0024), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_HANG_PULSE_4_REG , RULL(0x290F0024), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_HANG_PULSE_4_REG , RULL(0x2A0F0024), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_HANG_PULSE_4_REG , RULL(0x2B0F0024), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_HANG_PULSE_4_REG , RULL(0x2C0F0024), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_HANG_PULSE_4_REG , RULL(0x2D0F0024), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_HANG_PULSE_4_REG , RULL(0x2E0F0024), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_HANG_PULSE_4_REG , RULL(0x2F0F0024), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_HANG_PULSE_4_REG , RULL(0x300F0024), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_HANG_PULSE_4_REG , RULL(0x310F0024), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_HANG_PULSE_4_REG , RULL(0x320F0024), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_HANG_PULSE_4_REG , RULL(0x330F0024), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_HANG_PULSE_4_REG , RULL(0x340F0024), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_HANG_PULSE_4_REG , RULL(0x350F0024), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_HANG_PULSE_4_REG , RULL(0x360F0024), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_HANG_PULSE_4_REG , RULL(0x370F0024), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_HANG_PULSE_4_REG , RULL(0x100F0024), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_HANG_PULSE_4_REG , RULL(0x100F0024), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_HANG_PULSE_4_REG , RULL(0x110F0024), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_HANG_PULSE_4_REG , RULL(0x120F0024), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_HANG_PULSE_4_REG , RULL(0x130F0024), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_HANG_PULSE_4_REG , RULL(0x140F0024), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_HANG_PULSE_4_REG , RULL(0x150F0024), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_HANG_PULSE_4_REG , RULL(0x200F0024), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0024, +REG64( EX_0_HANG_PULSE_4_REG , RULL(0x200F0024), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0024, +REG64( EX_1_HANG_PULSE_4_REG , RULL(0x230F0024), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0024, +REG64( EX_2_HANG_PULSE_4_REG , RULL(0x240F0024), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0024, +REG64( EX_3_HANG_PULSE_4_REG , RULL(0x260F0024), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0024, +REG64( EX_4_HANG_PULSE_4_REG , RULL(0x280F0024), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0024, +REG64( EX_5_HANG_PULSE_4_REG , RULL(0x2A0F0024), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0024, +REG64( EX_6_HANG_PULSE_4_REG , RULL(0x2C0F0024), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0024, +REG64( EX_7_HANG_PULSE_4_REG , RULL(0x2E0F0024), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0024, +REG64( EX_8_HANG_PULSE_4_REG , RULL(0x300F0024), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0024, +REG64( EX_9_HANG_PULSE_4_REG , RULL(0x320F0024), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0024, +REG64( EX_10_HANG_PULSE_4_REG , RULL(0x340F0024), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0024, +REG64( EX_11_HANG_PULSE_4_REG , RULL(0x360F0024), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0024, + +REG64( C_HANG_PULSE_5_REG , RULL(0x200F0025), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_HANG_PULSE_5_REG , RULL(0x200F0025), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_HANG_PULSE_5_REG , RULL(0x210F0025), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_HANG_PULSE_5_REG , RULL(0x220F0025), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_HANG_PULSE_5_REG , RULL(0x230F0025), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_HANG_PULSE_5_REG , RULL(0x240F0025), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_HANG_PULSE_5_REG , RULL(0x250F0025), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_HANG_PULSE_5_REG , RULL(0x260F0025), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_HANG_PULSE_5_REG , RULL(0x270F0025), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_HANG_PULSE_5_REG , RULL(0x280F0025), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_HANG_PULSE_5_REG , RULL(0x290F0025), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_HANG_PULSE_5_REG , RULL(0x2A0F0025), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_HANG_PULSE_5_REG , RULL(0x2B0F0025), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_HANG_PULSE_5_REG , RULL(0x2C0F0025), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_HANG_PULSE_5_REG , RULL(0x2D0F0025), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_HANG_PULSE_5_REG , RULL(0x2E0F0025), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_HANG_PULSE_5_REG , RULL(0x2F0F0025), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_HANG_PULSE_5_REG , RULL(0x300F0025), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_HANG_PULSE_5_REG , RULL(0x310F0025), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_HANG_PULSE_5_REG , RULL(0x320F0025), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_HANG_PULSE_5_REG , RULL(0x330F0025), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_HANG_PULSE_5_REG , RULL(0x340F0025), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_HANG_PULSE_5_REG , RULL(0x350F0025), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_HANG_PULSE_5_REG , RULL(0x360F0025), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_HANG_PULSE_5_REG , RULL(0x370F0025), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_HANG_PULSE_5_REG , RULL(0x100F0025), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_HANG_PULSE_5_REG , RULL(0x100F0025), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_HANG_PULSE_5_REG , RULL(0x110F0025), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_HANG_PULSE_5_REG , RULL(0x120F0025), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_HANG_PULSE_5_REG , RULL(0x130F0025), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_HANG_PULSE_5_REG , RULL(0x140F0025), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_HANG_PULSE_5_REG , RULL(0x150F0025), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_HANG_PULSE_5_REG , RULL(0x200F0025), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0025, +REG64( EX_0_HANG_PULSE_5_REG , RULL(0x200F0025), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0025, +REG64( EX_1_HANG_PULSE_5_REG , RULL(0x230F0025), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0025, +REG64( EX_2_HANG_PULSE_5_REG , RULL(0x240F0025), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0025, +REG64( EX_3_HANG_PULSE_5_REG , RULL(0x260F0025), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0025, +REG64( EX_4_HANG_PULSE_5_REG , RULL(0x280F0025), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0025, +REG64( EX_5_HANG_PULSE_5_REG , RULL(0x2A0F0025), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0025, +REG64( EX_6_HANG_PULSE_5_REG , RULL(0x2C0F0025), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0025, +REG64( EX_7_HANG_PULSE_5_REG , RULL(0x2E0F0025), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0025, +REG64( EX_8_HANG_PULSE_5_REG , RULL(0x300F0025), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0025, +REG64( EX_9_HANG_PULSE_5_REG , RULL(0x320F0025), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0025, +REG64( EX_10_HANG_PULSE_5_REG , RULL(0x340F0025), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0025, +REG64( EX_11_HANG_PULSE_5_REG , RULL(0x360F0025), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0025, + +REG64( C_HANG_PULSE_6_REG , RULL(0x200F0026), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_HANG_PULSE_6_REG , RULL(0x200F0026), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_HANG_PULSE_6_REG , RULL(0x210F0026), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_HANG_PULSE_6_REG , RULL(0x220F0026), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_HANG_PULSE_6_REG , RULL(0x230F0026), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_HANG_PULSE_6_REG , RULL(0x240F0026), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_HANG_PULSE_6_REG , RULL(0x250F0026), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_HANG_PULSE_6_REG , RULL(0x260F0026), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_HANG_PULSE_6_REG , RULL(0x270F0026), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_HANG_PULSE_6_REG , RULL(0x280F0026), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_HANG_PULSE_6_REG , RULL(0x290F0026), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_HANG_PULSE_6_REG , RULL(0x2A0F0026), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_HANG_PULSE_6_REG , RULL(0x2B0F0026), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_HANG_PULSE_6_REG , RULL(0x2C0F0026), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_HANG_PULSE_6_REG , RULL(0x2D0F0026), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_HANG_PULSE_6_REG , RULL(0x2E0F0026), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_HANG_PULSE_6_REG , RULL(0x2F0F0026), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_HANG_PULSE_6_REG , RULL(0x300F0026), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_HANG_PULSE_6_REG , RULL(0x310F0026), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_HANG_PULSE_6_REG , RULL(0x320F0026), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_HANG_PULSE_6_REG , RULL(0x330F0026), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_HANG_PULSE_6_REG , RULL(0x340F0026), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_HANG_PULSE_6_REG , RULL(0x350F0026), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_HANG_PULSE_6_REG , RULL(0x360F0026), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_HANG_PULSE_6_REG , RULL(0x370F0026), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_HANG_PULSE_6_REG , RULL(0x100F0026), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_HANG_PULSE_6_REG , RULL(0x100F0026), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_HANG_PULSE_6_REG , RULL(0x110F0026), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_HANG_PULSE_6_REG , RULL(0x120F0026), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_HANG_PULSE_6_REG , RULL(0x130F0026), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_HANG_PULSE_6_REG , RULL(0x140F0026), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_HANG_PULSE_6_REG , RULL(0x150F0026), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_HANG_PULSE_6_REG , RULL(0x200F0026), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0026, +REG64( EX_0_HANG_PULSE_6_REG , RULL(0x200F0026), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0026, +REG64( EX_1_HANG_PULSE_6_REG , RULL(0x230F0026), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0026, +REG64( EX_2_HANG_PULSE_6_REG , RULL(0x240F0026), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0026, +REG64( EX_3_HANG_PULSE_6_REG , RULL(0x260F0026), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0026, +REG64( EX_4_HANG_PULSE_6_REG , RULL(0x280F0026), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0026, +REG64( EX_5_HANG_PULSE_6_REG , RULL(0x2A0F0026), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0026, +REG64( EX_6_HANG_PULSE_6_REG , RULL(0x2C0F0026), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0026, +REG64( EX_7_HANG_PULSE_6_REG , RULL(0x2E0F0026), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0026, +REG64( EX_8_HANG_PULSE_6_REG , RULL(0x300F0026), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0026, +REG64( EX_9_HANG_PULSE_6_REG , RULL(0x320F0026), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0026, +REG64( EX_10_HANG_PULSE_6_REG , RULL(0x340F0026), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0026, +REG64( EX_11_HANG_PULSE_6_REG , RULL(0x360F0026), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0026, + +REG64( C_HEARTBEAT_REG , RULL(0x200F0018), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_HEARTBEAT_REG , RULL(0x200F0018), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_HEARTBEAT_REG , RULL(0x210F0018), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_HEARTBEAT_REG , RULL(0x220F0018), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_HEARTBEAT_REG , RULL(0x230F0018), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_HEARTBEAT_REG , RULL(0x240F0018), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_HEARTBEAT_REG , RULL(0x250F0018), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_HEARTBEAT_REG , RULL(0x260F0018), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_HEARTBEAT_REG , RULL(0x270F0018), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_HEARTBEAT_REG , RULL(0x280F0018), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_HEARTBEAT_REG , RULL(0x290F0018), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_HEARTBEAT_REG , RULL(0x2A0F0018), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_HEARTBEAT_REG , RULL(0x2B0F0018), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_HEARTBEAT_REG , RULL(0x2C0F0018), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_HEARTBEAT_REG , RULL(0x2D0F0018), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_HEARTBEAT_REG , RULL(0x2E0F0018), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_HEARTBEAT_REG , RULL(0x2F0F0018), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_HEARTBEAT_REG , RULL(0x300F0018), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_HEARTBEAT_REG , RULL(0x310F0018), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_HEARTBEAT_REG , RULL(0x320F0018), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_HEARTBEAT_REG , RULL(0x330F0018), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_HEARTBEAT_REG , RULL(0x340F0018), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_HEARTBEAT_REG , RULL(0x350F0018), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_HEARTBEAT_REG , RULL(0x360F0018), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_HEARTBEAT_REG , RULL(0x370F0018), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_HEARTBEAT_REG , RULL(0x100F0018), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_HEARTBEAT_REG , RULL(0x100F0018), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_HEARTBEAT_REG , RULL(0x110F0018), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_HEARTBEAT_REG , RULL(0x120F0018), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_HEARTBEAT_REG , RULL(0x130F0018), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_HEARTBEAT_REG , RULL(0x140F0018), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_HEARTBEAT_REG , RULL(0x150F0018), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_HEARTBEAT_REG , RULL(0x200F0018), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0018, +REG64( EX_0_HEARTBEAT_REG , RULL(0x200F0018), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0018, +REG64( EX_1_HEARTBEAT_REG , RULL(0x230F0018), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0018, +REG64( EX_2_HEARTBEAT_REG , RULL(0x240F0018), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0018, +REG64( EX_3_HEARTBEAT_REG , RULL(0x260F0018), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0018, +REG64( EX_4_HEARTBEAT_REG , RULL(0x280F0018), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0018, +REG64( EX_5_HEARTBEAT_REG , RULL(0x2A0F0018), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0018, +REG64( EX_6_HEARTBEAT_REG , RULL(0x2C0F0018), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0018, +REG64( EX_7_HEARTBEAT_REG , RULL(0x2E0F0018), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0018, +REG64( EX_8_HEARTBEAT_REG , RULL(0x300F0018), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0018, +REG64( EX_9_HEARTBEAT_REG , RULL(0x320F0018), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0018, +REG64( EX_10_HEARTBEAT_REG , RULL(0x340F0018), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0018, +REG64( EX_11_HEARTBEAT_REG , RULL(0x360F0018), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0018, + +REG64( C_HID , RULL(0x20010A01), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_HID , RULL(0x20010A01), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_HID , RULL(0x21010A01), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_HID , RULL(0x22010A01), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_HID , RULL(0x23010A01), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_HID , RULL(0x24010A01), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_HID , RULL(0x25010A01), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_HID , RULL(0x26010A01), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_HID , RULL(0x27010A01), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_HID , RULL(0x28010A01), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_HID , RULL(0x29010A01), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_HID , RULL(0x2A010A01), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_HID , RULL(0x2B010A01), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_HID , RULL(0x2C010A01), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_HID , RULL(0x2D010A01), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_HID , RULL(0x2E010A01), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_HID , RULL(0x2F010A01), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_HID , RULL(0x30010A01), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_HID , RULL(0x31010A01), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_HID , RULL(0x32010A01), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_HID , RULL(0x33010A01), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_HID , RULL(0x34010A01), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_HID , RULL(0x35010A01), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_HID , RULL(0x36010A01), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_HID , RULL(0x37010A01), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_0_L2_HID , RULL(0x20010A01), SH_UNT_EX_0_L2 , + SH_ACS_SCOM ); //DUPS: 21010A01, +REG64( EX_10_L2_HID , RULL(0x34010A01), SH_UNT_EX_10_L2 , + SH_ACS_SCOM ); //DUPS: 35010A01, +REG64( EX_11_L2_HID , RULL(0x36010A01), SH_UNT_EX_11_L2 , + SH_ACS_SCOM ); //DUPS: 37010A01, +REG64( EX_1_L2_HID , RULL(0x22010A01), SH_UNT_EX_1_L2 , + SH_ACS_SCOM ); //DUPS: 23010A01, +REG64( EX_2_L2_HID , RULL(0x24010A01), SH_UNT_EX_2_L2 , + SH_ACS_SCOM ); //DUPS: 25010A01, +REG64( EX_3_L2_HID , RULL(0x26010A01), SH_UNT_EX_3_L2 , + SH_ACS_SCOM ); //DUPS: 27010A01, +REG64( EX_4_L2_HID , RULL(0x28010A01), SH_UNT_EX_4_L2 , + SH_ACS_SCOM ); //DUPS: 29010A01, +REG64( EX_5_L2_HID , RULL(0x2A010A01), SH_UNT_EX_5_L2 , + SH_ACS_SCOM ); //DUPS: 2B010A01, +REG64( EX_6_L2_HID , RULL(0x2C010A01), SH_UNT_EX_6_L2 , + SH_ACS_SCOM ); //DUPS: 2D010A01, +REG64( EX_7_L2_HID , RULL(0x2E010A01), SH_UNT_EX_7_L2 , + SH_ACS_SCOM ); //DUPS: 2F010A01, +REG64( EX_8_L2_HID , RULL(0x30010A01), SH_UNT_EX_8_L2 , + SH_ACS_SCOM ); //DUPS: 31010A01, +REG64( EX_9_L2_HID , RULL(0x32010A01), SH_UNT_EX_9_L2 , + SH_ACS_SCOM ); //DUPS: 33010A01, +REG64( EX_L2_HID , RULL(0x20010A01), SH_UNT_EX_L2 , + SH_ACS_SCOM ); //DUPS: 21010A01, + +REG64( C_HMEER , RULL(0x20010A96), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_HMEER , RULL(0x20010A96), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_HMEER , RULL(0x21010A96), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_HMEER , RULL(0x22010A96), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_HMEER , RULL(0x23010A96), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_HMEER , RULL(0x24010A96), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_HMEER , RULL(0x25010A96), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_HMEER , RULL(0x26010A96), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_HMEER , RULL(0x27010A96), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_HMEER , RULL(0x28010A96), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_HMEER , RULL(0x29010A96), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_HMEER , RULL(0x2A010A96), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_HMEER , RULL(0x2B010A96), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_HMEER , RULL(0x2C010A96), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_HMEER , RULL(0x2D010A96), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_HMEER , RULL(0x2E010A96), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_HMEER , RULL(0x2F010A96), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_HMEER , RULL(0x30010A96), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_HMEER , RULL(0x31010A96), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_HMEER , RULL(0x32010A96), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_HMEER , RULL(0x33010A96), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_HMEER , RULL(0x34010A96), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_HMEER , RULL(0x35010A96), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_HMEER , RULL(0x36010A96), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_HMEER , RULL(0x37010A96), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_HMEER , RULL(0x21010A96), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RW ); //DUPS: 20010A96, +REG64( EX_10_L2_HMEER , RULL(0x35010A96), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RW ); //DUPS: 34010A96, +REG64( EX_11_L2_HMEER , RULL(0x37010A96), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RW ); //DUPS: 36010A96, +REG64( EX_1_L2_HMEER , RULL(0x23010A96), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RW ); //DUPS: 22010A96, +REG64( EX_2_L2_HMEER , RULL(0x25010A96), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RW ); //DUPS: 24010A96, +REG64( EX_3_L2_HMEER , RULL(0x27010A96), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RW ); //DUPS: 26010A96, +REG64( EX_4_L2_HMEER , RULL(0x29010A96), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RW ); //DUPS: 28010A96, +REG64( EX_5_L2_HMEER , RULL(0x2B010A96), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2A010A96, +REG64( EX_6_L2_HMEER , RULL(0x2D010A96), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2C010A96, +REG64( EX_7_L2_HMEER , RULL(0x2F010A96), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2E010A96, +REG64( EX_8_L2_HMEER , RULL(0x31010A96), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RW ); //DUPS: 30010A96, +REG64( EX_9_L2_HMEER , RULL(0x33010A96), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RW ); //DUPS: 32010A96, +REG64( EX_L2_HMEER , RULL(0x21010A96), SH_UNT_EX_L2 , + SH_ACS_SCOM_RW ); //DUPS: 20010A96, + +REG64( EQ_HTM_CTRL , RULL(0x10012A05), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012B05, 10012605, 10012705, +REG64( EQ_0_HTM_CTRL , RULL(0x10012A05), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012B05, 10012605, 10012705, +REG64( EQ_1_HTM_CTRL , RULL(0x11012A05), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012B05, 11012605, 11012705, +REG64( EQ_2_HTM_CTRL , RULL(0x12012A05), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012B05, 12012605, 12012705, +REG64( EQ_3_HTM_CTRL , RULL(0x13012A05), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012B05, 13012605, 13012705, +REG64( EQ_4_HTM_CTRL , RULL(0x14012A05), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012B05, 14012605, 14012705, +REG64( EQ_5_HTM_CTRL , RULL(0x15012A05), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012B05, 15012605, 15012705, +REG64( EX_0_CHTMLBS0_HTM_CTRL , RULL(0x10012605), SH_UNT_EX_0_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_0_CHTMLBS1_HTM_CTRL , RULL(0x10012705), SH_UNT_EX_0_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_10_CHTMLBS0_HTM_CTRL , RULL(0x15012605), SH_UNT_EX_10_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_10_CHTMLBS1_HTM_CTRL , RULL(0x15012705), SH_UNT_EX_10_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_11_CHTMLBS0_HTM_CTRL , RULL(0x15012A05), SH_UNT_EX_11_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_11_CHTMLBS1_HTM_CTRL , RULL(0x15012B05), SH_UNT_EX_11_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_1_CHTMLBS0_HTM_CTRL , RULL(0x10012A05), SH_UNT_EX_1_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_1_CHTMLBS1_HTM_CTRL , RULL(0x10012B05), SH_UNT_EX_1_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_2_CHTMLBS0_HTM_CTRL , RULL(0x11012605), SH_UNT_EX_2_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_2_CHTMLBS1_HTM_CTRL , RULL(0x11012705), SH_UNT_EX_2_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_3_CHTMLBS0_HTM_CTRL , RULL(0x11012A05), SH_UNT_EX_3_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_3_CHTMLBS1_HTM_CTRL , RULL(0x11012B05), SH_UNT_EX_3_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_4_CHTMLBS0_HTM_CTRL , RULL(0x12012605), SH_UNT_EX_4_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_4_CHTMLBS1_HTM_CTRL , RULL(0x12012705), SH_UNT_EX_4_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_5_CHTMLBS0_HTM_CTRL , RULL(0x12012A05), SH_UNT_EX_5_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_5_CHTMLBS1_HTM_CTRL , RULL(0x12012B05), SH_UNT_EX_5_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_6_CHTMLBS0_HTM_CTRL , RULL(0x13012605), SH_UNT_EX_6_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_6_CHTMLBS1_HTM_CTRL , RULL(0x13012705), SH_UNT_EX_6_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_7_CHTMLBS0_HTM_CTRL , RULL(0x13012A05), SH_UNT_EX_7_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_7_CHTMLBS1_HTM_CTRL , RULL(0x13012B05), SH_UNT_EX_7_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_8_CHTMLBS0_HTM_CTRL , RULL(0x14012605), SH_UNT_EX_8_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_8_CHTMLBS1_HTM_CTRL , RULL(0x14012705), SH_UNT_EX_8_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_9_CHTMLBS0_HTM_CTRL , RULL(0x14012A05), SH_UNT_EX_9_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_9_CHTMLBS1_HTM_CTRL , RULL(0x14012B05), SH_UNT_EX_9_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_CHTMLBS0_HTM_CTRL , RULL(0x10012605), SH_UNT_EX_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_CHTMLBS1_HTM_CTRL , RULL(0x10012705), SH_UNT_EX_CHTMLBS1, + SH_ACS_SCOM_RW ); + +REG64( EQ_HTM_IMA_PDBAR , RULL(0x10012A0B), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012B0B, 1001260B, 1001270B, +REG64( EQ_0_HTM_IMA_PDBAR , RULL(0x10012A0B), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012B0B, 1001260B, 1001270B, +REG64( EQ_1_HTM_IMA_PDBAR , RULL(0x11012A0B), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012B0B, 1101260B, 1101270B, +REG64( EQ_2_HTM_IMA_PDBAR , RULL(0x12012A0B), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012B0B, 1201260B, 1201270B, +REG64( EQ_3_HTM_IMA_PDBAR , RULL(0x13012A0B), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012B0B, 1301260B, 1301270B, +REG64( EQ_4_HTM_IMA_PDBAR , RULL(0x14012A0B), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012B0B, 1401260B, 1401270B, +REG64( EQ_5_HTM_IMA_PDBAR , RULL(0x15012A0B), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012B0B, 1501260B, 1501270B, +REG64( EX_0_CHTMLBS0_HTM_IMA_PDBAR , RULL(0x1001260B), SH_UNT_EX_0_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_0_CHTMLBS1_HTM_IMA_PDBAR , RULL(0x1001270B), SH_UNT_EX_0_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_10_CHTMLBS0_HTM_IMA_PDBAR , RULL(0x1501260B), SH_UNT_EX_10_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_10_CHTMLBS1_HTM_IMA_PDBAR , RULL(0x1501270B), SH_UNT_EX_10_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_11_CHTMLBS0_HTM_IMA_PDBAR , RULL(0x15012A0B), SH_UNT_EX_11_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_11_CHTMLBS1_HTM_IMA_PDBAR , RULL(0x15012B0B), SH_UNT_EX_11_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_1_CHTMLBS0_HTM_IMA_PDBAR , RULL(0x10012A0B), SH_UNT_EX_1_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_1_CHTMLBS1_HTM_IMA_PDBAR , RULL(0x10012B0B), SH_UNT_EX_1_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_2_CHTMLBS0_HTM_IMA_PDBAR , RULL(0x1101260B), SH_UNT_EX_2_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_2_CHTMLBS1_HTM_IMA_PDBAR , RULL(0x1101270B), SH_UNT_EX_2_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_3_CHTMLBS0_HTM_IMA_PDBAR , RULL(0x11012A0B), SH_UNT_EX_3_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_3_CHTMLBS1_HTM_IMA_PDBAR , RULL(0x11012B0B), SH_UNT_EX_3_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_4_CHTMLBS0_HTM_IMA_PDBAR , RULL(0x1201260B), SH_UNT_EX_4_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_4_CHTMLBS1_HTM_IMA_PDBAR , RULL(0x1201270B), SH_UNT_EX_4_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_5_CHTMLBS0_HTM_IMA_PDBAR , RULL(0x12012A0B), SH_UNT_EX_5_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_5_CHTMLBS1_HTM_IMA_PDBAR , RULL(0x12012B0B), SH_UNT_EX_5_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_6_CHTMLBS0_HTM_IMA_PDBAR , RULL(0x1301260B), SH_UNT_EX_6_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_6_CHTMLBS1_HTM_IMA_PDBAR , RULL(0x1301270B), SH_UNT_EX_6_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_7_CHTMLBS0_HTM_IMA_PDBAR , RULL(0x13012A0B), SH_UNT_EX_7_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_7_CHTMLBS1_HTM_IMA_PDBAR , RULL(0x13012B0B), SH_UNT_EX_7_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_8_CHTMLBS0_HTM_IMA_PDBAR , RULL(0x1401260B), SH_UNT_EX_8_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_8_CHTMLBS1_HTM_IMA_PDBAR , RULL(0x1401270B), SH_UNT_EX_8_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_9_CHTMLBS0_HTM_IMA_PDBAR , RULL(0x14012A0B), SH_UNT_EX_9_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_9_CHTMLBS1_HTM_IMA_PDBAR , RULL(0x14012B0B), SH_UNT_EX_9_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_CHTMLBS0_HTM_IMA_PDBAR , RULL(0x1001260B), SH_UNT_EX_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_CHTMLBS1_HTM_IMA_PDBAR , RULL(0x1001270B), SH_UNT_EX_CHTMLBS1, + SH_ACS_SCOM_RW ); + +REG64( EQ_HTM_IMA_STATUS , RULL(0x10012A0A), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 10012B0A, 1001260A, 1001270A, +REG64( EQ_0_HTM_IMA_STATUS , RULL(0x10012A0A), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 10012B0A, 1001260A, 1001270A, +REG64( EQ_1_HTM_IMA_STATUS , RULL(0x11012A0A), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 11012B0A, 1101260A, 1101270A, +REG64( EQ_2_HTM_IMA_STATUS , RULL(0x12012A0A), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 12012B0A, 1201260A, 1201270A, +REG64( EQ_3_HTM_IMA_STATUS , RULL(0x13012A0A), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 13012B0A, 1301260A, 1301270A, +REG64( EQ_4_HTM_IMA_STATUS , RULL(0x14012A0A), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 14012B0A, 1401260A, 1401270A, +REG64( EQ_5_HTM_IMA_STATUS , RULL(0x15012A0A), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 15012B0A, 1501260A, 1501270A, +REG64( EX_0_CHTMLBS0_HTM_IMA_STATUS , RULL(0x1001260A), SH_UNT_EX_0_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_0_CHTMLBS1_HTM_IMA_STATUS , RULL(0x1001270A), SH_UNT_EX_0_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_10_CHTMLBS0_HTM_IMA_STATUS , RULL(0x1501260A), SH_UNT_EX_10_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_10_CHTMLBS1_HTM_IMA_STATUS , RULL(0x1501270A), SH_UNT_EX_10_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_11_CHTMLBS0_HTM_IMA_STATUS , RULL(0x15012A0A), SH_UNT_EX_11_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_11_CHTMLBS1_HTM_IMA_STATUS , RULL(0x15012B0A), SH_UNT_EX_11_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_1_CHTMLBS0_HTM_IMA_STATUS , RULL(0x10012A0A), SH_UNT_EX_1_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_1_CHTMLBS1_HTM_IMA_STATUS , RULL(0x10012B0A), SH_UNT_EX_1_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_2_CHTMLBS0_HTM_IMA_STATUS , RULL(0x1101260A), SH_UNT_EX_2_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_2_CHTMLBS1_HTM_IMA_STATUS , RULL(0x1101270A), SH_UNT_EX_2_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_3_CHTMLBS0_HTM_IMA_STATUS , RULL(0x11012A0A), SH_UNT_EX_3_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_3_CHTMLBS1_HTM_IMA_STATUS , RULL(0x11012B0A), SH_UNT_EX_3_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_4_CHTMLBS0_HTM_IMA_STATUS , RULL(0x1201260A), SH_UNT_EX_4_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_4_CHTMLBS1_HTM_IMA_STATUS , RULL(0x1201270A), SH_UNT_EX_4_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_5_CHTMLBS0_HTM_IMA_STATUS , RULL(0x12012A0A), SH_UNT_EX_5_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_5_CHTMLBS1_HTM_IMA_STATUS , RULL(0x12012B0A), SH_UNT_EX_5_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_6_CHTMLBS0_HTM_IMA_STATUS , RULL(0x1301260A), SH_UNT_EX_6_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_6_CHTMLBS1_HTM_IMA_STATUS , RULL(0x1301270A), SH_UNT_EX_6_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_7_CHTMLBS0_HTM_IMA_STATUS , RULL(0x13012A0A), SH_UNT_EX_7_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_7_CHTMLBS1_HTM_IMA_STATUS , RULL(0x13012B0A), SH_UNT_EX_7_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_8_CHTMLBS0_HTM_IMA_STATUS , RULL(0x1401260A), SH_UNT_EX_8_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_8_CHTMLBS1_HTM_IMA_STATUS , RULL(0x1401270A), SH_UNT_EX_8_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_9_CHTMLBS0_HTM_IMA_STATUS , RULL(0x14012A0A), SH_UNT_EX_9_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_9_CHTMLBS1_HTM_IMA_STATUS , RULL(0x14012B0A), SH_UNT_EX_9_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_CHTMLBS0_HTM_IMA_STATUS , RULL(0x1001260A), SH_UNT_EX_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_CHTMLBS1_HTM_IMA_STATUS , RULL(0x1001270A), SH_UNT_EX_CHTMLBS1, + SH_ACS_SCOM_RO ); + +REG64( EQ_HTM_LAST , RULL(0x10012A03), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 10012B03, 10012603, 10012703, +REG64( EQ_0_HTM_LAST , RULL(0x10012A03), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 10012B03, 10012603, 10012703, +REG64( EQ_1_HTM_LAST , RULL(0x11012A03), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 11012B03, 11012603, 11012703, +REG64( EQ_2_HTM_LAST , RULL(0x12012A03), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 12012B03, 12012603, 12012703, +REG64( EQ_3_HTM_LAST , RULL(0x13012A03), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 13012B03, 13012603, 13012703, +REG64( EQ_4_HTM_LAST , RULL(0x14012A03), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 14012B03, 14012603, 14012703, +REG64( EQ_5_HTM_LAST , RULL(0x15012A03), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 15012B03, 15012603, 15012703, +REG64( EX_0_CHTMLBS0_HTM_LAST , RULL(0x10012603), SH_UNT_EX_0_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_0_CHTMLBS1_HTM_LAST , RULL(0x10012703), SH_UNT_EX_0_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_10_CHTMLBS0_HTM_LAST , RULL(0x15012603), SH_UNT_EX_10_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_10_CHTMLBS1_HTM_LAST , RULL(0x15012703), SH_UNT_EX_10_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_11_CHTMLBS0_HTM_LAST , RULL(0x15012A03), SH_UNT_EX_11_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_11_CHTMLBS1_HTM_LAST , RULL(0x15012B03), SH_UNT_EX_11_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_1_CHTMLBS0_HTM_LAST , RULL(0x10012A03), SH_UNT_EX_1_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_1_CHTMLBS1_HTM_LAST , RULL(0x10012B03), SH_UNT_EX_1_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_2_CHTMLBS0_HTM_LAST , RULL(0x11012603), SH_UNT_EX_2_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_2_CHTMLBS1_HTM_LAST , RULL(0x11012703), SH_UNT_EX_2_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_3_CHTMLBS0_HTM_LAST , RULL(0x11012A03), SH_UNT_EX_3_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_3_CHTMLBS1_HTM_LAST , RULL(0x11012B03), SH_UNT_EX_3_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_4_CHTMLBS0_HTM_LAST , RULL(0x12012603), SH_UNT_EX_4_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_4_CHTMLBS1_HTM_LAST , RULL(0x12012703), SH_UNT_EX_4_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_5_CHTMLBS0_HTM_LAST , RULL(0x12012A03), SH_UNT_EX_5_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_5_CHTMLBS1_HTM_LAST , RULL(0x12012B03), SH_UNT_EX_5_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_6_CHTMLBS0_HTM_LAST , RULL(0x13012603), SH_UNT_EX_6_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_6_CHTMLBS1_HTM_LAST , RULL(0x13012703), SH_UNT_EX_6_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_7_CHTMLBS0_HTM_LAST , RULL(0x13012A03), SH_UNT_EX_7_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_7_CHTMLBS1_HTM_LAST , RULL(0x13012B03), SH_UNT_EX_7_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_8_CHTMLBS0_HTM_LAST , RULL(0x14012603), SH_UNT_EX_8_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_8_CHTMLBS1_HTM_LAST , RULL(0x14012703), SH_UNT_EX_8_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_9_CHTMLBS0_HTM_LAST , RULL(0x14012A03), SH_UNT_EX_9_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_9_CHTMLBS1_HTM_LAST , RULL(0x14012B03), SH_UNT_EX_9_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_CHTMLBS0_HTM_LAST , RULL(0x10012603), SH_UNT_EX_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_CHTMLBS1_HTM_LAST , RULL(0x10012703), SH_UNT_EX_CHTMLBS1, + SH_ACS_SCOM_RO ); + +REG64( EQ_HTM_MEM , RULL(0x10012A01), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012B01, 10012601, 10012701, +REG64( EQ_0_HTM_MEM , RULL(0x10012A01), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012B01, 10012601, 10012701, +REG64( EQ_1_HTM_MEM , RULL(0x11012A01), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012B01, 11012601, 11012701, +REG64( EQ_2_HTM_MEM , RULL(0x12012A01), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012B01, 12012601, 12012701, +REG64( EQ_3_HTM_MEM , RULL(0x13012A01), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012B01, 13012601, 13012701, +REG64( EQ_4_HTM_MEM , RULL(0x14012A01), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012B01, 14012601, 14012701, +REG64( EQ_5_HTM_MEM , RULL(0x15012A01), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012B01, 15012601, 15012701, +REG64( EX_0_CHTMLBS0_HTM_MEM , RULL(0x10012601), SH_UNT_EX_0_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_0_CHTMLBS1_HTM_MEM , RULL(0x10012701), SH_UNT_EX_0_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_10_CHTMLBS0_HTM_MEM , RULL(0x15012601), SH_UNT_EX_10_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_10_CHTMLBS1_HTM_MEM , RULL(0x15012701), SH_UNT_EX_10_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_11_CHTMLBS0_HTM_MEM , RULL(0x15012A01), SH_UNT_EX_11_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_11_CHTMLBS1_HTM_MEM , RULL(0x15012B01), SH_UNT_EX_11_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_1_CHTMLBS0_HTM_MEM , RULL(0x10012A01), SH_UNT_EX_1_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_1_CHTMLBS1_HTM_MEM , RULL(0x10012B01), SH_UNT_EX_1_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_2_CHTMLBS0_HTM_MEM , RULL(0x11012601), SH_UNT_EX_2_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_2_CHTMLBS1_HTM_MEM , RULL(0x11012701), SH_UNT_EX_2_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_3_CHTMLBS0_HTM_MEM , RULL(0x11012A01), SH_UNT_EX_3_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_3_CHTMLBS1_HTM_MEM , RULL(0x11012B01), SH_UNT_EX_3_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_4_CHTMLBS0_HTM_MEM , RULL(0x12012601), SH_UNT_EX_4_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_4_CHTMLBS1_HTM_MEM , RULL(0x12012701), SH_UNT_EX_4_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_5_CHTMLBS0_HTM_MEM , RULL(0x12012A01), SH_UNT_EX_5_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_5_CHTMLBS1_HTM_MEM , RULL(0x12012B01), SH_UNT_EX_5_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_6_CHTMLBS0_HTM_MEM , RULL(0x13012601), SH_UNT_EX_6_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_6_CHTMLBS1_HTM_MEM , RULL(0x13012701), SH_UNT_EX_6_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_7_CHTMLBS0_HTM_MEM , RULL(0x13012A01), SH_UNT_EX_7_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_7_CHTMLBS1_HTM_MEM , RULL(0x13012B01), SH_UNT_EX_7_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_8_CHTMLBS0_HTM_MEM , RULL(0x14012601), SH_UNT_EX_8_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_8_CHTMLBS1_HTM_MEM , RULL(0x14012701), SH_UNT_EX_8_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_9_CHTMLBS0_HTM_MEM , RULL(0x14012A01), SH_UNT_EX_9_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_9_CHTMLBS1_HTM_MEM , RULL(0x14012B01), SH_UNT_EX_9_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_CHTMLBS0_HTM_MEM , RULL(0x10012601), SH_UNT_EX_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_CHTMLBS1_HTM_MEM , RULL(0x10012701), SH_UNT_EX_CHTMLBS1, + SH_ACS_SCOM_RW ); + +REG64( EQ_HTM_MODE , RULL(0x10012A00), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012B00, 10012600, 10012700, +REG64( EQ_0_HTM_MODE , RULL(0x10012A00), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012B00, 10012600, 10012700, +REG64( EQ_1_HTM_MODE , RULL(0x11012A00), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012B00, 11012600, 11012700, +REG64( EQ_2_HTM_MODE , RULL(0x12012A00), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012B00, 12012600, 12012700, +REG64( EQ_3_HTM_MODE , RULL(0x13012A00), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012B00, 13012600, 13012700, +REG64( EQ_4_HTM_MODE , RULL(0x14012A00), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012B00, 14012600, 14012700, +REG64( EQ_5_HTM_MODE , RULL(0x15012A00), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012B00, 15012600, 15012700, +REG64( EX_0_CHTMLBS0_HTM_MODE , RULL(0x10012600), SH_UNT_EX_0_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_0_CHTMLBS1_HTM_MODE , RULL(0x10012700), SH_UNT_EX_0_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_10_CHTMLBS0_HTM_MODE , RULL(0x15012600), SH_UNT_EX_10_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_10_CHTMLBS1_HTM_MODE , RULL(0x15012700), SH_UNT_EX_10_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_11_CHTMLBS0_HTM_MODE , RULL(0x15012A00), SH_UNT_EX_11_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_11_CHTMLBS1_HTM_MODE , RULL(0x15012B00), SH_UNT_EX_11_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_1_CHTMLBS0_HTM_MODE , RULL(0x10012A00), SH_UNT_EX_1_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_1_CHTMLBS1_HTM_MODE , RULL(0x10012B00), SH_UNT_EX_1_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_2_CHTMLBS0_HTM_MODE , RULL(0x11012600), SH_UNT_EX_2_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_2_CHTMLBS1_HTM_MODE , RULL(0x11012700), SH_UNT_EX_2_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_3_CHTMLBS0_HTM_MODE , RULL(0x11012A00), SH_UNT_EX_3_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_3_CHTMLBS1_HTM_MODE , RULL(0x11012B00), SH_UNT_EX_3_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_4_CHTMLBS0_HTM_MODE , RULL(0x12012600), SH_UNT_EX_4_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_4_CHTMLBS1_HTM_MODE , RULL(0x12012700), SH_UNT_EX_4_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_5_CHTMLBS0_HTM_MODE , RULL(0x12012A00), SH_UNT_EX_5_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_5_CHTMLBS1_HTM_MODE , RULL(0x12012B00), SH_UNT_EX_5_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_6_CHTMLBS0_HTM_MODE , RULL(0x13012600), SH_UNT_EX_6_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_6_CHTMLBS1_HTM_MODE , RULL(0x13012700), SH_UNT_EX_6_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_7_CHTMLBS0_HTM_MODE , RULL(0x13012A00), SH_UNT_EX_7_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_7_CHTMLBS1_HTM_MODE , RULL(0x13012B00), SH_UNT_EX_7_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_8_CHTMLBS0_HTM_MODE , RULL(0x14012600), SH_UNT_EX_8_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_8_CHTMLBS1_HTM_MODE , RULL(0x14012700), SH_UNT_EX_8_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_9_CHTMLBS0_HTM_MODE , RULL(0x14012A00), SH_UNT_EX_9_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_9_CHTMLBS1_HTM_MODE , RULL(0x14012B00), SH_UNT_EX_9_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_CHTMLBS0_HTM_MODE , RULL(0x10012600), SH_UNT_EX_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_CHTMLBS1_HTM_MODE , RULL(0x10012700), SH_UNT_EX_CHTMLBS1, + SH_ACS_SCOM_RW ); + +REG64( EQ_HTM_STAT , RULL(0x10012A02), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 10012B02, 10012602, 10012702, +REG64( EQ_0_HTM_STAT , RULL(0x10012A02), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 10012B02, 10012602, 10012702, +REG64( EQ_1_HTM_STAT , RULL(0x11012A02), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 11012B02, 11012602, 11012702, +REG64( EQ_2_HTM_STAT , RULL(0x12012A02), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 12012B02, 12012602, 12012702, +REG64( EQ_3_HTM_STAT , RULL(0x13012A02), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 13012B02, 13012602, 13012702, +REG64( EQ_4_HTM_STAT , RULL(0x14012A02), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 14012B02, 14012602, 14012702, +REG64( EQ_5_HTM_STAT , RULL(0x15012A02), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 15012B02, 15012602, 15012702, +REG64( EX_0_CHTMLBS0_HTM_STAT , RULL(0x10012602), SH_UNT_EX_0_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_0_CHTMLBS1_HTM_STAT , RULL(0x10012702), SH_UNT_EX_0_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_10_CHTMLBS0_HTM_STAT , RULL(0x15012602), SH_UNT_EX_10_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_10_CHTMLBS1_HTM_STAT , RULL(0x15012702), SH_UNT_EX_10_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_11_CHTMLBS0_HTM_STAT , RULL(0x15012A02), SH_UNT_EX_11_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_11_CHTMLBS1_HTM_STAT , RULL(0x15012B02), SH_UNT_EX_11_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_1_CHTMLBS0_HTM_STAT , RULL(0x10012A02), SH_UNT_EX_1_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_1_CHTMLBS1_HTM_STAT , RULL(0x10012B02), SH_UNT_EX_1_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_2_CHTMLBS0_HTM_STAT , RULL(0x11012602), SH_UNT_EX_2_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_2_CHTMLBS1_HTM_STAT , RULL(0x11012702), SH_UNT_EX_2_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_3_CHTMLBS0_HTM_STAT , RULL(0x11012A02), SH_UNT_EX_3_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_3_CHTMLBS1_HTM_STAT , RULL(0x11012B02), SH_UNT_EX_3_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_4_CHTMLBS0_HTM_STAT , RULL(0x12012602), SH_UNT_EX_4_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_4_CHTMLBS1_HTM_STAT , RULL(0x12012702), SH_UNT_EX_4_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_5_CHTMLBS0_HTM_STAT , RULL(0x12012A02), SH_UNT_EX_5_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_5_CHTMLBS1_HTM_STAT , RULL(0x12012B02), SH_UNT_EX_5_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_6_CHTMLBS0_HTM_STAT , RULL(0x13012602), SH_UNT_EX_6_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_6_CHTMLBS1_HTM_STAT , RULL(0x13012702), SH_UNT_EX_6_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_7_CHTMLBS0_HTM_STAT , RULL(0x13012A02), SH_UNT_EX_7_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_7_CHTMLBS1_HTM_STAT , RULL(0x13012B02), SH_UNT_EX_7_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_8_CHTMLBS0_HTM_STAT , RULL(0x14012602), SH_UNT_EX_8_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_8_CHTMLBS1_HTM_STAT , RULL(0x14012702), SH_UNT_EX_8_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_9_CHTMLBS0_HTM_STAT , RULL(0x14012A02), SH_UNT_EX_9_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_9_CHTMLBS1_HTM_STAT , RULL(0x14012B02), SH_UNT_EX_9_CHTMLBS1, + SH_ACS_SCOM_RO ); +REG64( EX_CHTMLBS0_HTM_STAT , RULL(0x10012602), SH_UNT_EX_CHTMLBS0, + SH_ACS_SCOM_RO ); +REG64( EX_CHTMLBS1_HTM_STAT , RULL(0x10012702), SH_UNT_EX_CHTMLBS1, + SH_ACS_SCOM_RO ); + +REG64( EQ_HTM_TRIG , RULL(0x10012A04), SH_UNT_EQ , + SH_ACS_SCOM_RW ); //DUPS: 10012B04, 10012604, 10012704, +REG64( EQ_0_HTM_TRIG , RULL(0x10012A04), SH_UNT_EQ_0 , + SH_ACS_SCOM_RW ); //DUPS: 10012B04, 10012604, 10012704, +REG64( EQ_1_HTM_TRIG , RULL(0x11012A04), SH_UNT_EQ_1 , + SH_ACS_SCOM_RW ); //DUPS: 11012B04, 11012604, 11012704, +REG64( EQ_2_HTM_TRIG , RULL(0x12012A04), SH_UNT_EQ_2 , + SH_ACS_SCOM_RW ); //DUPS: 12012B04, 12012604, 12012704, +REG64( EQ_3_HTM_TRIG , RULL(0x13012A04), SH_UNT_EQ_3 , + SH_ACS_SCOM_RW ); //DUPS: 13012B04, 13012604, 13012704, +REG64( EQ_4_HTM_TRIG , RULL(0x14012A04), SH_UNT_EQ_4 , + SH_ACS_SCOM_RW ); //DUPS: 14012B04, 14012604, 14012704, +REG64( EQ_5_HTM_TRIG , RULL(0x15012A04), SH_UNT_EQ_5 , + SH_ACS_SCOM_RW ); //DUPS: 15012B04, 15012604, 15012704, +REG64( EX_0_CHTMLBS0_HTM_TRIG , RULL(0x10012604), SH_UNT_EX_0_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_0_CHTMLBS1_HTM_TRIG , RULL(0x10012704), SH_UNT_EX_0_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_10_CHTMLBS0_HTM_TRIG , RULL(0x15012604), SH_UNT_EX_10_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_10_CHTMLBS1_HTM_TRIG , RULL(0x15012704), SH_UNT_EX_10_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_11_CHTMLBS0_HTM_TRIG , RULL(0x15012A04), SH_UNT_EX_11_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_11_CHTMLBS1_HTM_TRIG , RULL(0x15012B04), SH_UNT_EX_11_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_1_CHTMLBS0_HTM_TRIG , RULL(0x10012A04), SH_UNT_EX_1_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_1_CHTMLBS1_HTM_TRIG , RULL(0x10012B04), SH_UNT_EX_1_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_2_CHTMLBS0_HTM_TRIG , RULL(0x11012604), SH_UNT_EX_2_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_2_CHTMLBS1_HTM_TRIG , RULL(0x11012704), SH_UNT_EX_2_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_3_CHTMLBS0_HTM_TRIG , RULL(0x11012A04), SH_UNT_EX_3_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_3_CHTMLBS1_HTM_TRIG , RULL(0x11012B04), SH_UNT_EX_3_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_4_CHTMLBS0_HTM_TRIG , RULL(0x12012604), SH_UNT_EX_4_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_4_CHTMLBS1_HTM_TRIG , RULL(0x12012704), SH_UNT_EX_4_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_5_CHTMLBS0_HTM_TRIG , RULL(0x12012A04), SH_UNT_EX_5_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_5_CHTMLBS1_HTM_TRIG , RULL(0x12012B04), SH_UNT_EX_5_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_6_CHTMLBS0_HTM_TRIG , RULL(0x13012604), SH_UNT_EX_6_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_6_CHTMLBS1_HTM_TRIG , RULL(0x13012704), SH_UNT_EX_6_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_7_CHTMLBS0_HTM_TRIG , RULL(0x13012A04), SH_UNT_EX_7_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_7_CHTMLBS1_HTM_TRIG , RULL(0x13012B04), SH_UNT_EX_7_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_8_CHTMLBS0_HTM_TRIG , RULL(0x14012604), SH_UNT_EX_8_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_8_CHTMLBS1_HTM_TRIG , RULL(0x14012704), SH_UNT_EX_8_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_9_CHTMLBS0_HTM_TRIG , RULL(0x14012A04), SH_UNT_EX_9_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_9_CHTMLBS1_HTM_TRIG , RULL(0x14012B04), SH_UNT_EX_9_CHTMLBS1, + SH_ACS_SCOM_RW ); +REG64( EX_CHTMLBS0_HTM_TRIG , RULL(0x10012604), SH_UNT_EX_CHTMLBS0, + SH_ACS_SCOM_RW ); +REG64( EX_CHTMLBS1_HTM_TRIG , RULL(0x10012704), SH_UNT_EX_CHTMLBS1, + SH_ACS_SCOM_RW ); + +REG64( C_IMA_EVENT_MASK , RULL(0x20010AA8), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_IMA_EVENT_MASK , RULL(0x20010AA8), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_IMA_EVENT_MASK , RULL(0x21010AA8), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_IMA_EVENT_MASK , RULL(0x22010AA8), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_IMA_EVENT_MASK , RULL(0x23010AA8), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_IMA_EVENT_MASK , RULL(0x24010AA8), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_IMA_EVENT_MASK , RULL(0x25010AA8), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_IMA_EVENT_MASK , RULL(0x26010AA8), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_IMA_EVENT_MASK , RULL(0x27010AA8), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_IMA_EVENT_MASK , RULL(0x28010AA8), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_IMA_EVENT_MASK , RULL(0x29010AA8), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_IMA_EVENT_MASK , RULL(0x2A010AA8), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_IMA_EVENT_MASK , RULL(0x2B010AA8), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_IMA_EVENT_MASK , RULL(0x2C010AA8), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_IMA_EVENT_MASK , RULL(0x2D010AA8), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_IMA_EVENT_MASK , RULL(0x2E010AA8), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_IMA_EVENT_MASK , RULL(0x2F010AA8), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_IMA_EVENT_MASK , RULL(0x30010AA8), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_IMA_EVENT_MASK , RULL(0x31010AA8), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_IMA_EVENT_MASK , RULL(0x32010AA8), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_IMA_EVENT_MASK , RULL(0x33010AA8), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_IMA_EVENT_MASK , RULL(0x34010AA8), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_IMA_EVENT_MASK , RULL(0x35010AA8), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_IMA_EVENT_MASK , RULL(0x36010AA8), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_IMA_EVENT_MASK , RULL(0x37010AA8), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_IMA_EVENT_MASK , RULL(0x20010AA8), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 21010AA8, +REG64( EX_0_IMA_EVENT_MASK , RULL(0x20010AA8), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 21010AA8, +REG64( EX_1_IMA_EVENT_MASK , RULL(0x22010AA8), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 23010AA8, +REG64( EX_2_IMA_EVENT_MASK , RULL(0x24010AA8), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 25010AA8, +REG64( EX_3_IMA_EVENT_MASK , RULL(0x26010AA8), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 27010AA8, +REG64( EX_4_IMA_EVENT_MASK , RULL(0x28010AA8), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 29010AA8, +REG64( EX_5_IMA_EVENT_MASK , RULL(0x2A010AA8), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B010AA8, +REG64( EX_6_IMA_EVENT_MASK , RULL(0x2C010AA8), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D010AA8, +REG64( EX_7_IMA_EVENT_MASK , RULL(0x2E010AA8), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F010AA8, +REG64( EX_8_IMA_EVENT_MASK , RULL(0x30010AA8), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 31010AA8, +REG64( EX_9_IMA_EVENT_MASK , RULL(0x32010AA8), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 33010AA8, +REG64( EX_10_IMA_EVENT_MASK , RULL(0x34010AA8), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 35010AA8, +REG64( EX_11_IMA_EVENT_MASK , RULL(0x36010AA8), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 37010AA8, + +REG64( C_IMA_TRACE , RULL(0x20010AA9), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_IMA_TRACE , RULL(0x20010AA9), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_IMA_TRACE , RULL(0x21010AA9), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_IMA_TRACE , RULL(0x22010AA9), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_IMA_TRACE , RULL(0x23010AA9), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_IMA_TRACE , RULL(0x24010AA9), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_IMA_TRACE , RULL(0x25010AA9), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_IMA_TRACE , RULL(0x26010AA9), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_IMA_TRACE , RULL(0x27010AA9), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_IMA_TRACE , RULL(0x28010AA9), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_IMA_TRACE , RULL(0x29010AA9), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_IMA_TRACE , RULL(0x2A010AA9), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_IMA_TRACE , RULL(0x2B010AA9), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_IMA_TRACE , RULL(0x2C010AA9), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_IMA_TRACE , RULL(0x2D010AA9), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_IMA_TRACE , RULL(0x2E010AA9), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_IMA_TRACE , RULL(0x2F010AA9), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_IMA_TRACE , RULL(0x30010AA9), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_IMA_TRACE , RULL(0x31010AA9), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_IMA_TRACE , RULL(0x32010AA9), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_IMA_TRACE , RULL(0x33010AA9), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_IMA_TRACE , RULL(0x34010AA9), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_IMA_TRACE , RULL(0x35010AA9), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_IMA_TRACE , RULL(0x36010AA9), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_IMA_TRACE , RULL(0x37010AA9), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_IMA_TRACE , RULL(0x20010AA9), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 21010AA9, +REG64( EX_0_IMA_TRACE , RULL(0x20010AA9), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 21010AA9, +REG64( EX_1_IMA_TRACE , RULL(0x22010AA9), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 23010AA9, +REG64( EX_2_IMA_TRACE , RULL(0x24010AA9), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 25010AA9, +REG64( EX_3_IMA_TRACE , RULL(0x26010AA9), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 27010AA9, +REG64( EX_4_IMA_TRACE , RULL(0x28010AA9), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 29010AA9, +REG64( EX_5_IMA_TRACE , RULL(0x2A010AA9), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B010AA9, +REG64( EX_6_IMA_TRACE , RULL(0x2C010AA9), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D010AA9, +REG64( EX_7_IMA_TRACE , RULL(0x2E010AA9), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F010AA9, +REG64( EX_8_IMA_TRACE , RULL(0x30010AA9), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 31010AA9, +REG64( EX_9_IMA_TRACE , RULL(0x32010AA9), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 33010AA9, +REG64( EX_10_IMA_TRACE , RULL(0x34010AA9), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 35010AA9, +REG64( EX_11_IMA_TRACE , RULL(0x36010AA9), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 37010AA9, + +REG64( C_INJECT_REG , RULL(0x20050011), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_INJECT_REG , RULL(0x20050011), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_INJECT_REG , RULL(0x21050011), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_INJECT_REG , RULL(0x22050011), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_INJECT_REG , RULL(0x23050011), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_INJECT_REG , RULL(0x24050011), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_INJECT_REG , RULL(0x25050011), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_INJECT_REG , RULL(0x26050011), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_INJECT_REG , RULL(0x27050011), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_INJECT_REG , RULL(0x28050011), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_INJECT_REG , RULL(0x29050011), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_INJECT_REG , RULL(0x2A050011), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_INJECT_REG , RULL(0x2B050011), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_INJECT_REG , RULL(0x2C050011), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_INJECT_REG , RULL(0x2D050011), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_INJECT_REG , RULL(0x2E050011), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_INJECT_REG , RULL(0x2F050011), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_INJECT_REG , RULL(0x30050011), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_INJECT_REG , RULL(0x31050011), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_INJECT_REG , RULL(0x32050011), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_INJECT_REG , RULL(0x33050011), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_INJECT_REG , RULL(0x34050011), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_INJECT_REG , RULL(0x35050011), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_INJECT_REG , RULL(0x36050011), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_INJECT_REG , RULL(0x37050011), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_INJECT_REG , RULL(0x10050011), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_INJECT_REG , RULL(0x10050011), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_INJECT_REG , RULL(0x11050011), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_INJECT_REG , RULL(0x12050011), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_INJECT_REG , RULL(0x13050011), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_INJECT_REG , RULL(0x14050011), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_INJECT_REG , RULL(0x15050011), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_INJECT_REG , RULL(0x20050011), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21050011, +REG64( EX_0_INJECT_REG , RULL(0x20050011), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21050011, +REG64( EX_1_INJECT_REG , RULL(0x22050011), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23050011, +REG64( EX_2_INJECT_REG , RULL(0x24050011), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25050011, +REG64( EX_3_INJECT_REG , RULL(0x26050011), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27050011, +REG64( EX_4_INJECT_REG , RULL(0x28050011), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29050011, +REG64( EX_5_INJECT_REG , RULL(0x2A050011), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B050011, +REG64( EX_6_INJECT_REG , RULL(0x2C050011), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D050011, +REG64( EX_7_INJECT_REG , RULL(0x2E050011), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F050011, +REG64( EX_8_INJECT_REG , RULL(0x30050011), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31050011, +REG64( EX_9_INJECT_REG , RULL(0x32050011), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33050011, +REG64( EX_10_INJECT_REG , RULL(0x34050011), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35050011, +REG64( EX_11_INJECT_REG , RULL(0x36050011), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37050011, + +REG64( EQ_INJ_REG , RULL(0x1001100D), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 1001140D, +REG64( EQ_0_INJ_REG , RULL(0x1001100D), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 1001140D, +REG64( EQ_1_INJ_REG , RULL(0x1101100D), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 1101140D, +REG64( EQ_2_INJ_REG , RULL(0x1201100D), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 1201140D, +REG64( EQ_3_INJ_REG , RULL(0x1301100D), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 1301140D, +REG64( EQ_4_INJ_REG , RULL(0x1401100D), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 1401140D, +REG64( EQ_5_INJ_REG , RULL(0x1501100D), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 1501140D, +REG64( EX_INJ_REG , RULL(0x1001100D), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_INJ_REG , RULL(0x1001100D), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_INJ_REG , RULL(0x1001140D), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_INJ_REG , RULL(0x1101100D), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_INJ_REG , RULL(0x1101140D), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_INJ_REG , RULL(0x1201100D), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_INJ_REG , RULL(0x1201140D), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_INJ_REG , RULL(0x1301100D), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_INJ_REG , RULL(0x1301140D), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_INJ_REG , RULL(0x1401100D), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_INJ_REG , RULL(0x1401140D), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_INJ_REG , RULL(0x1501100D), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_INJ_REG , RULL(0x1501140D), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( EQ_L3_CTL_CHECK_RD0_REG , RULL(0x10011810), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011C10, +REG64( EQ_0_L3_CTL_CHECK_RD0_REG , RULL(0x10011810), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011C10, +REG64( EQ_1_L3_CTL_CHECK_RD0_REG , RULL(0x11011810), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011C10, +REG64( EQ_2_L3_CTL_CHECK_RD0_REG , RULL(0x12011810), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011C10, +REG64( EQ_3_L3_CTL_CHECK_RD0_REG , RULL(0x13011810), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011C10, +REG64( EQ_4_L3_CTL_CHECK_RD0_REG , RULL(0x14011810), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011C10, +REG64( EQ_5_L3_CTL_CHECK_RD0_REG , RULL(0x15011810), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011C10, +REG64( EX_0_L3_L3_CTL_CHECK_RD0_REG , RULL(0x10011810), SH_UNT_EX_0_L3 , SH_ACS_SCOM ); +REG64( EX_10_L3_L3_CTL_CHECK_RD0_REG , RULL(0x15011810), SH_UNT_EX_10_L3 , SH_ACS_SCOM ); +REG64( EX_11_L3_L3_CTL_CHECK_RD0_REG , RULL(0x15011C10), SH_UNT_EX_11_L3 , SH_ACS_SCOM ); +REG64( EX_1_L3_L3_CTL_CHECK_RD0_REG , RULL(0x10011C10), SH_UNT_EX_1_L3 , SH_ACS_SCOM ); +REG64( EX_2_L3_L3_CTL_CHECK_RD0_REG , RULL(0x11011810), SH_UNT_EX_2_L3 , SH_ACS_SCOM ); +REG64( EX_3_L3_L3_CTL_CHECK_RD0_REG , RULL(0x11011C10), SH_UNT_EX_3_L3 , SH_ACS_SCOM ); +REG64( EX_4_L3_L3_CTL_CHECK_RD0_REG , RULL(0x12011810), SH_UNT_EX_4_L3 , SH_ACS_SCOM ); +REG64( EX_5_L3_L3_CTL_CHECK_RD0_REG , RULL(0x12011C10), SH_UNT_EX_5_L3 , SH_ACS_SCOM ); +REG64( EX_6_L3_L3_CTL_CHECK_RD0_REG , RULL(0x13011810), SH_UNT_EX_6_L3 , SH_ACS_SCOM ); +REG64( EX_7_L3_L3_CTL_CHECK_RD0_REG , RULL(0x13011C10), SH_UNT_EX_7_L3 , SH_ACS_SCOM ); +REG64( EX_8_L3_L3_CTL_CHECK_RD0_REG , RULL(0x14011810), SH_UNT_EX_8_L3 , SH_ACS_SCOM ); +REG64( EX_9_L3_L3_CTL_CHECK_RD0_REG , RULL(0x14011C10), SH_UNT_EX_9_L3 , SH_ACS_SCOM ); +REG64( EX_L3_L3_CTL_CHECK_RD0_REG , RULL(0x10011810), SH_UNT_EX_L3 , SH_ACS_SCOM ); + +REG64( EQ_L3_CTL_CHECK_RD1_REG , RULL(0x10011817), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011C17, +REG64( EQ_0_L3_CTL_CHECK_RD1_REG , RULL(0x10011817), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011C17, +REG64( EQ_1_L3_CTL_CHECK_RD1_REG , RULL(0x11011817), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011C17, +REG64( EQ_2_L3_CTL_CHECK_RD1_REG , RULL(0x12011817), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011C17, +REG64( EQ_3_L3_CTL_CHECK_RD1_REG , RULL(0x13011817), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011C17, +REG64( EQ_4_L3_CTL_CHECK_RD1_REG , RULL(0x14011817), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011C17, +REG64( EQ_5_L3_CTL_CHECK_RD1_REG , RULL(0x15011817), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011C17, +REG64( EX_0_L3_L3_CTL_CHECK_RD1_REG , RULL(0x10011817), SH_UNT_EX_0_L3 , SH_ACS_SCOM ); +REG64( EX_10_L3_L3_CTL_CHECK_RD1_REG , RULL(0x15011817), SH_UNT_EX_10_L3 , SH_ACS_SCOM ); +REG64( EX_11_L3_L3_CTL_CHECK_RD1_REG , RULL(0x15011C17), SH_UNT_EX_11_L3 , SH_ACS_SCOM ); +REG64( EX_1_L3_L3_CTL_CHECK_RD1_REG , RULL(0x10011C17), SH_UNT_EX_1_L3 , SH_ACS_SCOM ); +REG64( EX_2_L3_L3_CTL_CHECK_RD1_REG , RULL(0x11011817), SH_UNT_EX_2_L3 , SH_ACS_SCOM ); +REG64( EX_3_L3_L3_CTL_CHECK_RD1_REG , RULL(0x11011C17), SH_UNT_EX_3_L3 , SH_ACS_SCOM ); +REG64( EX_4_L3_L3_CTL_CHECK_RD1_REG , RULL(0x12011817), SH_UNT_EX_4_L3 , SH_ACS_SCOM ); +REG64( EX_5_L3_L3_CTL_CHECK_RD1_REG , RULL(0x12011C17), SH_UNT_EX_5_L3 , SH_ACS_SCOM ); +REG64( EX_6_L3_L3_CTL_CHECK_RD1_REG , RULL(0x13011817), SH_UNT_EX_6_L3 , SH_ACS_SCOM ); +REG64( EX_7_L3_L3_CTL_CHECK_RD1_REG , RULL(0x13011C17), SH_UNT_EX_7_L3 , SH_ACS_SCOM ); +REG64( EX_8_L3_L3_CTL_CHECK_RD1_REG , RULL(0x14011817), SH_UNT_EX_8_L3 , SH_ACS_SCOM ); +REG64( EX_9_L3_L3_CTL_CHECK_RD1_REG , RULL(0x14011C17), SH_UNT_EX_9_L3 , SH_ACS_SCOM ); +REG64( EX_L3_L3_CTL_CHECK_RD1_REG , RULL(0x10011817), SH_UNT_EX_L3 , SH_ACS_SCOM ); + +REG64( EQ_L3_RD_EPSILON_CFG_REG , RULL(0x10011829), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011C29, +REG64( EQ_0_L3_RD_EPSILON_CFG_REG , RULL(0x10011829), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011C29, +REG64( EQ_1_L3_RD_EPSILON_CFG_REG , RULL(0x11011829), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011C29, +REG64( EQ_2_L3_RD_EPSILON_CFG_REG , RULL(0x12011829), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011C29, +REG64( EQ_3_L3_RD_EPSILON_CFG_REG , RULL(0x13011829), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011C29, +REG64( EQ_4_L3_RD_EPSILON_CFG_REG , RULL(0x14011829), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011C29, +REG64( EQ_5_L3_RD_EPSILON_CFG_REG , RULL(0x15011829), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011C29, +REG64( EX_L3_RD_EPSILON_CFG_REG , RULL(0x10011829), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_L3_RD_EPSILON_CFG_REG , RULL(0x10011829), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_L3_RD_EPSILON_CFG_REG , RULL(0x10011C29), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_L3_RD_EPSILON_CFG_REG , RULL(0x11011829), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_L3_RD_EPSILON_CFG_REG , RULL(0x11011C29), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_L3_RD_EPSILON_CFG_REG , RULL(0x12011829), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_L3_RD_EPSILON_CFG_REG , RULL(0x12011C29), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_L3_RD_EPSILON_CFG_REG , RULL(0x13011829), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_L3_RD_EPSILON_CFG_REG , RULL(0x13011C29), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_L3_RD_EPSILON_CFG_REG , RULL(0x14011829), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_L3_RD_EPSILON_CFG_REG , RULL(0x14011C29), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_L3_RD_EPSILON_CFG_REG , RULL(0x15011829), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_L3_RD_EPSILON_CFG_REG , RULL(0x15011C29), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( EQ_L3_RTIM_PERIOD_MONITOR , RULL(0x10011812), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011C12, +REG64( EQ_0_L3_RTIM_PERIOD_MONITOR , RULL(0x10011812), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011C12, +REG64( EQ_1_L3_RTIM_PERIOD_MONITOR , RULL(0x11011812), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011C12, +REG64( EQ_2_L3_RTIM_PERIOD_MONITOR , RULL(0x12011812), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011C12, +REG64( EQ_3_L3_RTIM_PERIOD_MONITOR , RULL(0x13011812), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011C12, +REG64( EQ_4_L3_RTIM_PERIOD_MONITOR , RULL(0x14011812), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011C12, +REG64( EQ_5_L3_RTIM_PERIOD_MONITOR , RULL(0x15011812), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011C12, +REG64( EX_0_L3_L3_RTIM_PERIOD_MONITOR , RULL(0x10011812), SH_UNT_EX_0_L3 , SH_ACS_SCOM ); +REG64( EX_10_L3_L3_RTIM_PERIOD_MONITOR , RULL(0x15011812), SH_UNT_EX_10_L3 , SH_ACS_SCOM ); +REG64( EX_11_L3_L3_RTIM_PERIOD_MONITOR , RULL(0x15011C12), SH_UNT_EX_11_L3 , SH_ACS_SCOM ); +REG64( EX_1_L3_L3_RTIM_PERIOD_MONITOR , RULL(0x10011C12), SH_UNT_EX_1_L3 , SH_ACS_SCOM ); +REG64( EX_2_L3_L3_RTIM_PERIOD_MONITOR , RULL(0x11011812), SH_UNT_EX_2_L3 , SH_ACS_SCOM ); +REG64( EX_3_L3_L3_RTIM_PERIOD_MONITOR , RULL(0x11011C12), SH_UNT_EX_3_L3 , SH_ACS_SCOM ); +REG64( EX_4_L3_L3_RTIM_PERIOD_MONITOR , RULL(0x12011812), SH_UNT_EX_4_L3 , SH_ACS_SCOM ); +REG64( EX_5_L3_L3_RTIM_PERIOD_MONITOR , RULL(0x12011C12), SH_UNT_EX_5_L3 , SH_ACS_SCOM ); +REG64( EX_6_L3_L3_RTIM_PERIOD_MONITOR , RULL(0x13011812), SH_UNT_EX_6_L3 , SH_ACS_SCOM ); +REG64( EX_7_L3_L3_RTIM_PERIOD_MONITOR , RULL(0x13011C12), SH_UNT_EX_7_L3 , SH_ACS_SCOM ); +REG64( EX_8_L3_L3_RTIM_PERIOD_MONITOR , RULL(0x14011812), SH_UNT_EX_8_L3 , SH_ACS_SCOM ); +REG64( EX_9_L3_L3_RTIM_PERIOD_MONITOR , RULL(0x14011C12), SH_UNT_EX_9_L3 , SH_ACS_SCOM ); +REG64( EX_L3_L3_RTIM_PERIOD_MONITOR , RULL(0x10011812), SH_UNT_EX_L3 , SH_ACS_SCOM ); + +REG64( EQ_L3_WR_EPSILON_CFG_REG , RULL(0x1001182A), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011C2A, +REG64( EQ_0_L3_WR_EPSILON_CFG_REG , RULL(0x1001182A), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011C2A, +REG64( EQ_1_L3_WR_EPSILON_CFG_REG , RULL(0x1101182A), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011C2A, +REG64( EQ_2_L3_WR_EPSILON_CFG_REG , RULL(0x1201182A), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011C2A, +REG64( EQ_3_L3_WR_EPSILON_CFG_REG , RULL(0x1301182A), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011C2A, +REG64( EQ_4_L3_WR_EPSILON_CFG_REG , RULL(0x1401182A), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011C2A, +REG64( EQ_5_L3_WR_EPSILON_CFG_REG , RULL(0x1501182A), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011C2A, +REG64( EX_0_L3_L3_WR_EPSILON_CFG_REG , RULL(0x1001182A), SH_UNT_EX_0_L3 , SH_ACS_SCOM ); +REG64( EX_10_L3_L3_WR_EPSILON_CFG_REG , RULL(0x1501182A), SH_UNT_EX_10_L3 , SH_ACS_SCOM ); +REG64( EX_11_L3_L3_WR_EPSILON_CFG_REG , RULL(0x15011C2A), SH_UNT_EX_11_L3 , SH_ACS_SCOM ); +REG64( EX_1_L3_L3_WR_EPSILON_CFG_REG , RULL(0x10011C2A), SH_UNT_EX_1_L3 , SH_ACS_SCOM ); +REG64( EX_2_L3_L3_WR_EPSILON_CFG_REG , RULL(0x1101182A), SH_UNT_EX_2_L3 , SH_ACS_SCOM ); +REG64( EX_3_L3_L3_WR_EPSILON_CFG_REG , RULL(0x11011C2A), SH_UNT_EX_3_L3 , SH_ACS_SCOM ); +REG64( EX_4_L3_L3_WR_EPSILON_CFG_REG , RULL(0x1201182A), SH_UNT_EX_4_L3 , SH_ACS_SCOM ); +REG64( EX_5_L3_L3_WR_EPSILON_CFG_REG , RULL(0x12011C2A), SH_UNT_EX_5_L3 , SH_ACS_SCOM ); +REG64( EX_6_L3_L3_WR_EPSILON_CFG_REG , RULL(0x1301182A), SH_UNT_EX_6_L3 , SH_ACS_SCOM ); +REG64( EX_7_L3_L3_WR_EPSILON_CFG_REG , RULL(0x13011C2A), SH_UNT_EX_7_L3 , SH_ACS_SCOM ); +REG64( EX_8_L3_L3_WR_EPSILON_CFG_REG , RULL(0x1401182A), SH_UNT_EX_8_L3 , SH_ACS_SCOM ); +REG64( EX_9_L3_L3_WR_EPSILON_CFG_REG , RULL(0x14011C2A), SH_UNT_EX_9_L3 , SH_ACS_SCOM ); +REG64( EX_L3_L3_WR_EPSILON_CFG_REG , RULL(0x1001182A), SH_UNT_EX_L3 , SH_ACS_SCOM ); + +REG64( EQ_LINEDEL_TRIG_REG , RULL(0x1001080D), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10010C0D, +REG64( EQ_0_LINEDEL_TRIG_REG , RULL(0x1001080D), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10010C0D, +REG64( EQ_1_LINEDEL_TRIG_REG , RULL(0x1101080D), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11010C0D, +REG64( EQ_2_LINEDEL_TRIG_REG , RULL(0x1201080D), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12010C0D, +REG64( EQ_3_LINEDEL_TRIG_REG , RULL(0x1301080D), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13010C0D, +REG64( EQ_4_LINEDEL_TRIG_REG , RULL(0x1401080D), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14010C0D, +REG64( EQ_5_LINEDEL_TRIG_REG , RULL(0x1501080D), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15010C0D, +REG64( EX_0_L2_LINEDEL_TRIG_REG , RULL(0x1001080D), SH_UNT_EX_0_L2 , SH_ACS_SCOM ); +REG64( EX_10_L2_LINEDEL_TRIG_REG , RULL(0x1501080D), SH_UNT_EX_10_L2 , SH_ACS_SCOM ); +REG64( EX_11_L2_LINEDEL_TRIG_REG , RULL(0x15010C0D), SH_UNT_EX_11_L2 , SH_ACS_SCOM ); +REG64( EX_1_L2_LINEDEL_TRIG_REG , RULL(0x10010C0D), SH_UNT_EX_1_L2 , SH_ACS_SCOM ); +REG64( EX_2_L2_LINEDEL_TRIG_REG , RULL(0x1101080D), SH_UNT_EX_2_L2 , SH_ACS_SCOM ); +REG64( EX_3_L2_LINEDEL_TRIG_REG , RULL(0x11010C0D), SH_UNT_EX_3_L2 , SH_ACS_SCOM ); +REG64( EX_4_L2_LINEDEL_TRIG_REG , RULL(0x1201080D), SH_UNT_EX_4_L2 , SH_ACS_SCOM ); +REG64( EX_5_L2_LINEDEL_TRIG_REG , RULL(0x12010C0D), SH_UNT_EX_5_L2 , SH_ACS_SCOM ); +REG64( EX_6_L2_LINEDEL_TRIG_REG , RULL(0x1301080D), SH_UNT_EX_6_L2 , SH_ACS_SCOM ); +REG64( EX_7_L2_LINEDEL_TRIG_REG , RULL(0x13010C0D), SH_UNT_EX_7_L2 , SH_ACS_SCOM ); +REG64( EX_8_L2_LINEDEL_TRIG_REG , RULL(0x1401080D), SH_UNT_EX_8_L2 , SH_ACS_SCOM ); +REG64( EX_9_L2_LINEDEL_TRIG_REG , RULL(0x14010C0D), SH_UNT_EX_9_L2 , SH_ACS_SCOM ); +REG64( EX_L2_LINEDEL_TRIG_REG , RULL(0x1001080D), SH_UNT_EX_L2 , SH_ACS_SCOM ); + +REG64( EQ_LINE_DELETED_MEMBERS_REG , RULL(0x10011815), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011C15, +REG64( EQ_0_LINE_DELETED_MEMBERS_REG , RULL(0x10011815), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011C15, +REG64( EQ_1_LINE_DELETED_MEMBERS_REG , RULL(0x11011815), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011C15, +REG64( EQ_2_LINE_DELETED_MEMBERS_REG , RULL(0x12011815), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011C15, +REG64( EQ_3_LINE_DELETED_MEMBERS_REG , RULL(0x13011815), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011C15, +REG64( EQ_4_LINE_DELETED_MEMBERS_REG , RULL(0x14011815), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011C15, +REG64( EQ_5_LINE_DELETED_MEMBERS_REG , RULL(0x15011815), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011C15, +REG64( EX_0_L3_LINE_DELETED_MEMBERS_REG , RULL(0x10011815), SH_UNT_EX_0_L3 , SH_ACS_SCOM ); +REG64( EX_10_L3_LINE_DELETED_MEMBERS_REG , RULL(0x15011815), SH_UNT_EX_10_L3 , SH_ACS_SCOM ); +REG64( EX_11_L3_LINE_DELETED_MEMBERS_REG , RULL(0x15011C15), SH_UNT_EX_11_L3 , SH_ACS_SCOM ); +REG64( EX_1_L3_LINE_DELETED_MEMBERS_REG , RULL(0x10011C15), SH_UNT_EX_1_L3 , SH_ACS_SCOM ); +REG64( EX_2_L3_LINE_DELETED_MEMBERS_REG , RULL(0x11011815), SH_UNT_EX_2_L3 , SH_ACS_SCOM ); +REG64( EX_3_L3_LINE_DELETED_MEMBERS_REG , RULL(0x11011C15), SH_UNT_EX_3_L3 , SH_ACS_SCOM ); +REG64( EX_4_L3_LINE_DELETED_MEMBERS_REG , RULL(0x12011815), SH_UNT_EX_4_L3 , SH_ACS_SCOM ); +REG64( EX_5_L3_LINE_DELETED_MEMBERS_REG , RULL(0x12011C15), SH_UNT_EX_5_L3 , SH_ACS_SCOM ); +REG64( EX_6_L3_LINE_DELETED_MEMBERS_REG , RULL(0x13011815), SH_UNT_EX_6_L3 , SH_ACS_SCOM ); +REG64( EX_7_L3_LINE_DELETED_MEMBERS_REG , RULL(0x13011C15), SH_UNT_EX_7_L3 , SH_ACS_SCOM ); +REG64( EX_8_L3_LINE_DELETED_MEMBERS_REG , RULL(0x14011815), SH_UNT_EX_8_L3 , SH_ACS_SCOM ); +REG64( EX_9_L3_LINE_DELETED_MEMBERS_REG , RULL(0x14011C15), SH_UNT_EX_9_L3 , SH_ACS_SCOM ); +REG64( EX_L3_LINE_DELETED_MEMBERS_REG , RULL(0x10011815), SH_UNT_EX_L3 , SH_ACS_SCOM ); + +REG64( CAPP_LINK_DELAY_RESP_DATA0 , RULL(0x02010850), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_LINK_DELAY_RESP_DATA0 , RULL(0x02010850), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_LINK_DELAY_RESP_DATA0 , RULL(0x04010850), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_LINK_DELAY_RESP_DATA1 , RULL(0x02010851), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_LINK_DELAY_RESP_DATA1 , RULL(0x02010851), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_LINK_DELAY_RESP_DATA1 , RULL(0x04010851), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_LINK_DELAY_RESP_DATA10 , RULL(0x0201085A), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_LINK_DELAY_RESP_DATA10 , RULL(0x0201085A), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_LINK_DELAY_RESP_DATA10 , RULL(0x0401085A), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_LINK_DELAY_RESP_DATA11 , RULL(0x0201085B), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_LINK_DELAY_RESP_DATA11 , RULL(0x0201085B), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_LINK_DELAY_RESP_DATA11 , RULL(0x0401085B), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_LINK_DELAY_RESP_DATA12 , RULL(0x0201085C), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_LINK_DELAY_RESP_DATA12 , RULL(0x0201085C), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_LINK_DELAY_RESP_DATA12 , RULL(0x0401085C), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_LINK_DELAY_RESP_DATA13 , RULL(0x0201085D), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_LINK_DELAY_RESP_DATA13 , RULL(0x0201085D), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_LINK_DELAY_RESP_DATA13 , RULL(0x0401085D), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_LINK_DELAY_RESP_DATA14 , RULL(0x0201085E), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_LINK_DELAY_RESP_DATA14 , RULL(0x0201085E), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_LINK_DELAY_RESP_DATA14 , RULL(0x0401085E), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_LINK_DELAY_RESP_DATA15 , RULL(0x0201085F), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_LINK_DELAY_RESP_DATA15 , RULL(0x0201085F), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_LINK_DELAY_RESP_DATA15 , RULL(0x0401085F), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_LINK_DELAY_RESP_DATA2 , RULL(0x02010852), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_LINK_DELAY_RESP_DATA2 , RULL(0x02010852), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_LINK_DELAY_RESP_DATA2 , RULL(0x04010852), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_LINK_DELAY_RESP_DATA3 , RULL(0x02010853), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_LINK_DELAY_RESP_DATA3 , RULL(0x02010853), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_LINK_DELAY_RESP_DATA3 , RULL(0x04010853), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_LINK_DELAY_RESP_DATA4 , RULL(0x02010854), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_LINK_DELAY_RESP_DATA4 , RULL(0x02010854), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_LINK_DELAY_RESP_DATA4 , RULL(0x04010854), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_LINK_DELAY_RESP_DATA5 , RULL(0x02010855), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_LINK_DELAY_RESP_DATA5 , RULL(0x02010855), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_LINK_DELAY_RESP_DATA5 , RULL(0x04010855), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_LINK_DELAY_RESP_DATA6 , RULL(0x02010856), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_LINK_DELAY_RESP_DATA6 , RULL(0x02010856), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_LINK_DELAY_RESP_DATA6 , RULL(0x04010856), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_LINK_DELAY_RESP_DATA7 , RULL(0x02010857), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_LINK_DELAY_RESP_DATA7 , RULL(0x02010857), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_LINK_DELAY_RESP_DATA7 , RULL(0x04010857), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_LINK_DELAY_RESP_DATA8 , RULL(0x02010858), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_LINK_DELAY_RESP_DATA8 , RULL(0x02010858), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_LINK_DELAY_RESP_DATA8 , RULL(0x04010858), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_LINK_DELAY_RESP_DATA9 , RULL(0x02010859), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_LINK_DELAY_RESP_DATA9 , RULL(0x02010859), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_LINK_DELAY_RESP_DATA9 , RULL(0x04010859), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_LINK_DELAY_TIMER , RULL(0x02010845), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_LINK_DELAY_TIMER , RULL(0x02010845), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_LINK_DELAY_TIMER , RULL(0x04010845), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( C_LOCAL_FIR_ACTION0 , RULL(0x20040010), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_LOCAL_FIR_ACTION0 , RULL(0x20040010), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_LOCAL_FIR_ACTION0 , RULL(0x21040010), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_LOCAL_FIR_ACTION0 , RULL(0x22040010), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_LOCAL_FIR_ACTION0 , RULL(0x23040010), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_LOCAL_FIR_ACTION0 , RULL(0x24040010), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_LOCAL_FIR_ACTION0 , RULL(0x25040010), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_LOCAL_FIR_ACTION0 , RULL(0x26040010), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_LOCAL_FIR_ACTION0 , RULL(0x27040010), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_LOCAL_FIR_ACTION0 , RULL(0x28040010), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_LOCAL_FIR_ACTION0 , RULL(0x29040010), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_LOCAL_FIR_ACTION0 , RULL(0x2A040010), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_LOCAL_FIR_ACTION0 , RULL(0x2B040010), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_LOCAL_FIR_ACTION0 , RULL(0x2C040010), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_LOCAL_FIR_ACTION0 , RULL(0x2D040010), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_LOCAL_FIR_ACTION0 , RULL(0x2E040010), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_LOCAL_FIR_ACTION0 , RULL(0x2F040010), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_LOCAL_FIR_ACTION0 , RULL(0x30040010), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_LOCAL_FIR_ACTION0 , RULL(0x31040010), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_LOCAL_FIR_ACTION0 , RULL(0x32040010), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_LOCAL_FIR_ACTION0 , RULL(0x33040010), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_LOCAL_FIR_ACTION0 , RULL(0x34040010), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_LOCAL_FIR_ACTION0 , RULL(0x35040010), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_LOCAL_FIR_ACTION0 , RULL(0x36040010), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_LOCAL_FIR_ACTION0 , RULL(0x37040010), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_LOCAL_FIR_ACTION0 , RULL(0x10040010), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_LOCAL_FIR_ACTION0 , RULL(0x10040010), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_LOCAL_FIR_ACTION0 , RULL(0x11040010), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_LOCAL_FIR_ACTION0 , RULL(0x12040010), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_LOCAL_FIR_ACTION0 , RULL(0x13040010), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_LOCAL_FIR_ACTION0 , RULL(0x14040010), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_LOCAL_FIR_ACTION0 , RULL(0x15040010), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_LOCAL_FIR_ACTION0 , RULL(0x20040010), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21040010, +REG64( EX_0_LOCAL_FIR_ACTION0 , RULL(0x20040010), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21040010, +REG64( EX_1_LOCAL_FIR_ACTION0 , RULL(0x22040010), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23040010, +REG64( EX_2_LOCAL_FIR_ACTION0 , RULL(0x24040010), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25040010, +REG64( EX_3_LOCAL_FIR_ACTION0 , RULL(0x26040010), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27040010, +REG64( EX_4_LOCAL_FIR_ACTION0 , RULL(0x28040010), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29040010, +REG64( EX_5_LOCAL_FIR_ACTION0 , RULL(0x2A040010), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B040010, +REG64( EX_6_LOCAL_FIR_ACTION0 , RULL(0x2C040010), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D040010, +REG64( EX_7_LOCAL_FIR_ACTION0 , RULL(0x2E040010), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F040010, +REG64( EX_8_LOCAL_FIR_ACTION0 , RULL(0x30040010), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31040010, +REG64( EX_9_LOCAL_FIR_ACTION0 , RULL(0x32040010), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33040010, +REG64( EX_10_LOCAL_FIR_ACTION0 , RULL(0x34040010), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35040010, +REG64( EX_11_LOCAL_FIR_ACTION0 , RULL(0x36040010), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37040010, + +REG64( C_LOCAL_FIR_ACTION1 , RULL(0x20040011), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_LOCAL_FIR_ACTION1 , RULL(0x20040011), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_LOCAL_FIR_ACTION1 , RULL(0x21040011), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_LOCAL_FIR_ACTION1 , RULL(0x22040011), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_LOCAL_FIR_ACTION1 , RULL(0x23040011), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_LOCAL_FIR_ACTION1 , RULL(0x24040011), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_LOCAL_FIR_ACTION1 , RULL(0x25040011), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_LOCAL_FIR_ACTION1 , RULL(0x26040011), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_LOCAL_FIR_ACTION1 , RULL(0x27040011), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_LOCAL_FIR_ACTION1 , RULL(0x28040011), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_LOCAL_FIR_ACTION1 , RULL(0x29040011), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_LOCAL_FIR_ACTION1 , RULL(0x2A040011), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_LOCAL_FIR_ACTION1 , RULL(0x2B040011), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_LOCAL_FIR_ACTION1 , RULL(0x2C040011), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_LOCAL_FIR_ACTION1 , RULL(0x2D040011), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_LOCAL_FIR_ACTION1 , RULL(0x2E040011), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_LOCAL_FIR_ACTION1 , RULL(0x2F040011), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_LOCAL_FIR_ACTION1 , RULL(0x30040011), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_LOCAL_FIR_ACTION1 , RULL(0x31040011), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_LOCAL_FIR_ACTION1 , RULL(0x32040011), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_LOCAL_FIR_ACTION1 , RULL(0x33040011), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_LOCAL_FIR_ACTION1 , RULL(0x34040011), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_LOCAL_FIR_ACTION1 , RULL(0x35040011), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_LOCAL_FIR_ACTION1 , RULL(0x36040011), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_LOCAL_FIR_ACTION1 , RULL(0x37040011), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_LOCAL_FIR_ACTION1 , RULL(0x10040011), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_LOCAL_FIR_ACTION1 , RULL(0x10040011), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_LOCAL_FIR_ACTION1 , RULL(0x11040011), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_LOCAL_FIR_ACTION1 , RULL(0x12040011), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_LOCAL_FIR_ACTION1 , RULL(0x13040011), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_LOCAL_FIR_ACTION1 , RULL(0x14040011), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_LOCAL_FIR_ACTION1 , RULL(0x15040011), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_LOCAL_FIR_ACTION1 , RULL(0x20040011), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21040011, +REG64( EX_0_LOCAL_FIR_ACTION1 , RULL(0x20040011), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21040011, +REG64( EX_1_LOCAL_FIR_ACTION1 , RULL(0x22040011), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23040011, +REG64( EX_2_LOCAL_FIR_ACTION1 , RULL(0x24040011), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25040011, +REG64( EX_3_LOCAL_FIR_ACTION1 , RULL(0x26040011), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27040011, +REG64( EX_4_LOCAL_FIR_ACTION1 , RULL(0x28040011), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29040011, +REG64( EX_5_LOCAL_FIR_ACTION1 , RULL(0x2A040011), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B040011, +REG64( EX_6_LOCAL_FIR_ACTION1 , RULL(0x2C040011), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D040011, +REG64( EX_7_LOCAL_FIR_ACTION1 , RULL(0x2E040011), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F040011, +REG64( EX_8_LOCAL_FIR_ACTION1 , RULL(0x30040011), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31040011, +REG64( EX_9_LOCAL_FIR_ACTION1 , RULL(0x32040011), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33040011, +REG64( EX_10_LOCAL_FIR_ACTION1 , RULL(0x34040011), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35040011, +REG64( EX_11_LOCAL_FIR_ACTION1 , RULL(0x36040011), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37040011, + +REG64( C_LOCAL_FIR_MASK , RULL(0x2004000D), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_LOCAL_FIR_MASK_AND , RULL(0x2004000E), SH_UNT_C , SH_ACS_SCOM1_AND ); +REG64( C_LOCAL_FIR_MASK_OR , RULL(0x2004000F), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_LOCAL_FIR_MASK , RULL(0x2004000D), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_LOCAL_FIR_MASK_AND , RULL(0x2004000E), SH_UNT_C_0 , SH_ACS_SCOM1_AND ); +REG64( C_0_LOCAL_FIR_MASK_OR , RULL(0x2004000F), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_LOCAL_FIR_MASK , RULL(0x2104000D), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_LOCAL_FIR_MASK_AND , RULL(0x2104000E), SH_UNT_C_1 , SH_ACS_SCOM1_AND ); +REG64( C_1_LOCAL_FIR_MASK_OR , RULL(0x2104000F), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_LOCAL_FIR_MASK , RULL(0x2204000D), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_LOCAL_FIR_MASK_AND , RULL(0x2204000E), SH_UNT_C_2 , SH_ACS_SCOM1_AND ); +REG64( C_2_LOCAL_FIR_MASK_OR , RULL(0x2204000F), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_LOCAL_FIR_MASK , RULL(0x2304000D), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_LOCAL_FIR_MASK_AND , RULL(0x2304000E), SH_UNT_C_3 , SH_ACS_SCOM1_AND ); +REG64( C_3_LOCAL_FIR_MASK_OR , RULL(0x2304000F), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_LOCAL_FIR_MASK , RULL(0x2404000D), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_LOCAL_FIR_MASK_AND , RULL(0x2404000E), SH_UNT_C_4 , SH_ACS_SCOM1_AND ); +REG64( C_4_LOCAL_FIR_MASK_OR , RULL(0x2404000F), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_LOCAL_FIR_MASK , RULL(0x2504000D), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_LOCAL_FIR_MASK_AND , RULL(0x2504000E), SH_UNT_C_5 , SH_ACS_SCOM1_AND ); +REG64( C_5_LOCAL_FIR_MASK_OR , RULL(0x2504000F), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_LOCAL_FIR_MASK , RULL(0x2604000D), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_LOCAL_FIR_MASK_AND , RULL(0x2604000E), SH_UNT_C_6 , SH_ACS_SCOM1_AND ); +REG64( C_6_LOCAL_FIR_MASK_OR , RULL(0x2604000F), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_LOCAL_FIR_MASK , RULL(0x2704000D), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_LOCAL_FIR_MASK_AND , RULL(0x2704000E), SH_UNT_C_7 , SH_ACS_SCOM1_AND ); +REG64( C_7_LOCAL_FIR_MASK_OR , RULL(0x2704000F), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_LOCAL_FIR_MASK , RULL(0x2804000D), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_LOCAL_FIR_MASK_AND , RULL(0x2804000E), SH_UNT_C_8 , SH_ACS_SCOM1_AND ); +REG64( C_8_LOCAL_FIR_MASK_OR , RULL(0x2804000F), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_LOCAL_FIR_MASK , RULL(0x2904000D), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_LOCAL_FIR_MASK_AND , RULL(0x2904000E), SH_UNT_C_9 , SH_ACS_SCOM1_AND ); +REG64( C_9_LOCAL_FIR_MASK_OR , RULL(0x2904000F), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_LOCAL_FIR_MASK , RULL(0x2A04000D), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_LOCAL_FIR_MASK_AND , RULL(0x2A04000E), SH_UNT_C_10 , SH_ACS_SCOM1_AND ); +REG64( C_10_LOCAL_FIR_MASK_OR , RULL(0x2A04000F), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_LOCAL_FIR_MASK , RULL(0x2B04000D), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_LOCAL_FIR_MASK_AND , RULL(0x2B04000E), SH_UNT_C_11 , SH_ACS_SCOM1_AND ); +REG64( C_11_LOCAL_FIR_MASK_OR , RULL(0x2B04000F), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_LOCAL_FIR_MASK , RULL(0x2C04000D), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_LOCAL_FIR_MASK_AND , RULL(0x2C04000E), SH_UNT_C_12 , SH_ACS_SCOM1_AND ); +REG64( C_12_LOCAL_FIR_MASK_OR , RULL(0x2C04000F), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_LOCAL_FIR_MASK , RULL(0x2D04000D), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_LOCAL_FIR_MASK_AND , RULL(0x2D04000E), SH_UNT_C_13 , SH_ACS_SCOM1_AND ); +REG64( C_13_LOCAL_FIR_MASK_OR , RULL(0x2D04000F), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_LOCAL_FIR_MASK , RULL(0x2E04000D), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_LOCAL_FIR_MASK_AND , RULL(0x2E04000E), SH_UNT_C_14 , SH_ACS_SCOM1_AND ); +REG64( C_14_LOCAL_FIR_MASK_OR , RULL(0x2E04000F), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_LOCAL_FIR_MASK , RULL(0x2F04000D), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_LOCAL_FIR_MASK_AND , RULL(0x2F04000E), SH_UNT_C_15 , SH_ACS_SCOM1_AND ); +REG64( C_15_LOCAL_FIR_MASK_OR , RULL(0x2F04000F), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_LOCAL_FIR_MASK , RULL(0x3004000D), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_LOCAL_FIR_MASK_AND , RULL(0x3004000E), SH_UNT_C_16 , SH_ACS_SCOM1_AND ); +REG64( C_16_LOCAL_FIR_MASK_OR , RULL(0x3004000F), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_LOCAL_FIR_MASK , RULL(0x3104000D), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_LOCAL_FIR_MASK_AND , RULL(0x3104000E), SH_UNT_C_17 , SH_ACS_SCOM1_AND ); +REG64( C_17_LOCAL_FIR_MASK_OR , RULL(0x3104000F), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_LOCAL_FIR_MASK , RULL(0x3204000D), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_LOCAL_FIR_MASK_AND , RULL(0x3204000E), SH_UNT_C_18 , SH_ACS_SCOM1_AND ); +REG64( C_18_LOCAL_FIR_MASK_OR , RULL(0x3204000F), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_LOCAL_FIR_MASK , RULL(0x3304000D), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_LOCAL_FIR_MASK_AND , RULL(0x3304000E), SH_UNT_C_19 , SH_ACS_SCOM1_AND ); +REG64( C_19_LOCAL_FIR_MASK_OR , RULL(0x3304000F), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_LOCAL_FIR_MASK , RULL(0x3404000D), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_LOCAL_FIR_MASK_AND , RULL(0x3404000E), SH_UNT_C_20 , SH_ACS_SCOM1_AND ); +REG64( C_20_LOCAL_FIR_MASK_OR , RULL(0x3404000F), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_LOCAL_FIR_MASK , RULL(0x3504000D), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_LOCAL_FIR_MASK_AND , RULL(0x3504000E), SH_UNT_C_21 , SH_ACS_SCOM1_AND ); +REG64( C_21_LOCAL_FIR_MASK_OR , RULL(0x3504000F), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_LOCAL_FIR_MASK , RULL(0x3604000D), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_LOCAL_FIR_MASK_AND , RULL(0x3604000E), SH_UNT_C_22 , SH_ACS_SCOM1_AND ); +REG64( C_22_LOCAL_FIR_MASK_OR , RULL(0x3604000F), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_LOCAL_FIR_MASK , RULL(0x3704000D), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_LOCAL_FIR_MASK_AND , RULL(0x3704000E), SH_UNT_C_23 , SH_ACS_SCOM1_AND ); +REG64( C_23_LOCAL_FIR_MASK_OR , RULL(0x3704000F), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EQ_LOCAL_FIR_MASK , RULL(0x1004000D), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_LOCAL_FIR_MASK_AND , RULL(0x1004000E), SH_UNT_EQ , SH_ACS_SCOM1_AND ); +REG64( EQ_LOCAL_FIR_MASK_OR , RULL(0x1004000F), SH_UNT_EQ , SH_ACS_SCOM2_OR ); +REG64( EQ_0_LOCAL_FIR_MASK , RULL(0x1004000D), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_0_LOCAL_FIR_MASK_AND , RULL(0x1004000E), SH_UNT_EQ_0 , SH_ACS_SCOM1_AND ); +REG64( EQ_0_LOCAL_FIR_MASK_OR , RULL(0x1004000F), SH_UNT_EQ_0 , SH_ACS_SCOM2_OR ); +REG64( EQ_1_LOCAL_FIR_MASK , RULL(0x1104000D), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_1_LOCAL_FIR_MASK_AND , RULL(0x1104000E), SH_UNT_EQ_1 , SH_ACS_SCOM1_AND ); +REG64( EQ_1_LOCAL_FIR_MASK_OR , RULL(0x1104000F), SH_UNT_EQ_1 , SH_ACS_SCOM2_OR ); +REG64( EQ_2_LOCAL_FIR_MASK , RULL(0x1204000D), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_2_LOCAL_FIR_MASK_AND , RULL(0x1204000E), SH_UNT_EQ_2 , SH_ACS_SCOM1_AND ); +REG64( EQ_2_LOCAL_FIR_MASK_OR , RULL(0x1204000F), SH_UNT_EQ_2 , SH_ACS_SCOM2_OR ); +REG64( EQ_3_LOCAL_FIR_MASK , RULL(0x1304000D), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_3_LOCAL_FIR_MASK_AND , RULL(0x1304000E), SH_UNT_EQ_3 , SH_ACS_SCOM1_AND ); +REG64( EQ_3_LOCAL_FIR_MASK_OR , RULL(0x1304000F), SH_UNT_EQ_3 , SH_ACS_SCOM2_OR ); +REG64( EQ_4_LOCAL_FIR_MASK , RULL(0x1404000D), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_4_LOCAL_FIR_MASK_AND , RULL(0x1404000E), SH_UNT_EQ_4 , SH_ACS_SCOM1_AND ); +REG64( EQ_4_LOCAL_FIR_MASK_OR , RULL(0x1404000F), SH_UNT_EQ_4 , SH_ACS_SCOM2_OR ); +REG64( EQ_5_LOCAL_FIR_MASK , RULL(0x1504000D), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EQ_5_LOCAL_FIR_MASK_AND , RULL(0x1504000E), SH_UNT_EQ_5 , SH_ACS_SCOM1_AND ); +REG64( EQ_5_LOCAL_FIR_MASK_OR , RULL(0x1504000F), SH_UNT_EQ_5 , SH_ACS_SCOM2_OR ); +REG64( EX_LOCAL_FIR_MASK , RULL(0x2004000D), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 2104000D, +REG64( EX_LOCAL_FIR_MASK_AND , RULL(0x2004000E), SH_UNT_EX , + SH_ACS_SCOM1_AND ); //DUPS: 2104000E, +REG64( EX_LOCAL_FIR_MASK_OR , RULL(0x2004000F), SH_UNT_EX , + SH_ACS_SCOM2_OR ); //DUPS: 2104000F, +REG64( EX_0_LOCAL_FIR_MASK , RULL(0x2004000D), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 2104000D, +REG64( EX_0_LOCAL_FIR_MASK_AND , RULL(0x2004000E), SH_UNT_EX_0 , + SH_ACS_SCOM1_AND ); //DUPS: 2104000E, +REG64( EX_0_LOCAL_FIR_MASK_OR , RULL(0x2004000F), SH_UNT_EX_0 , + SH_ACS_SCOM2_OR ); //DUPS: 2104000F, +REG64( EX_1_LOCAL_FIR_MASK , RULL(0x2204000D), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 2304000D, +REG64( EX_1_LOCAL_FIR_MASK_AND , RULL(0x2204000E), SH_UNT_EX_1 , + SH_ACS_SCOM1_AND ); //DUPS: 2304000E, +REG64( EX_1_LOCAL_FIR_MASK_OR , RULL(0x2204000F), SH_UNT_EX_1 , + SH_ACS_SCOM2_OR ); //DUPS: 2304000F, +REG64( EX_2_LOCAL_FIR_MASK , RULL(0x2404000D), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 2504000D, +REG64( EX_2_LOCAL_FIR_MASK_AND , RULL(0x2404000E), SH_UNT_EX_2 , + SH_ACS_SCOM1_AND ); //DUPS: 2504000E, +REG64( EX_2_LOCAL_FIR_MASK_OR , RULL(0x2404000F), SH_UNT_EX_2 , + SH_ACS_SCOM2_OR ); //DUPS: 2504000F, +REG64( EX_3_LOCAL_FIR_MASK , RULL(0x2604000D), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 2704000D, +REG64( EX_3_LOCAL_FIR_MASK_AND , RULL(0x2604000E), SH_UNT_EX_3 , + SH_ACS_SCOM1_AND ); //DUPS: 2704000E, +REG64( EX_3_LOCAL_FIR_MASK_OR , RULL(0x2604000F), SH_UNT_EX_3 , + SH_ACS_SCOM2_OR ); //DUPS: 2704000F, +REG64( EX_4_LOCAL_FIR_MASK , RULL(0x2804000D), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 2904000D, +REG64( EX_4_LOCAL_FIR_MASK_AND , RULL(0x2804000E), SH_UNT_EX_4 , + SH_ACS_SCOM1_AND ); //DUPS: 2904000E, +REG64( EX_4_LOCAL_FIR_MASK_OR , RULL(0x2804000F), SH_UNT_EX_4 , + SH_ACS_SCOM2_OR ); //DUPS: 2904000F, +REG64( EX_5_LOCAL_FIR_MASK , RULL(0x2A04000D), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B04000D, +REG64( EX_5_LOCAL_FIR_MASK_AND , RULL(0x2A04000E), SH_UNT_EX_5 , + SH_ACS_SCOM1_AND ); //DUPS: 2B04000E, +REG64( EX_5_LOCAL_FIR_MASK_OR , RULL(0x2A04000F), SH_UNT_EX_5 , + SH_ACS_SCOM2_OR ); //DUPS: 2B04000F, +REG64( EX_6_LOCAL_FIR_MASK , RULL(0x2C04000D), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D04000D, +REG64( EX_6_LOCAL_FIR_MASK_AND , RULL(0x2C04000E), SH_UNT_EX_6 , + SH_ACS_SCOM1_AND ); //DUPS: 2D04000E, +REG64( EX_6_LOCAL_FIR_MASK_OR , RULL(0x2C04000F), SH_UNT_EX_6 , + SH_ACS_SCOM2_OR ); //DUPS: 2D04000F, +REG64( EX_7_LOCAL_FIR_MASK , RULL(0x2E04000D), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F04000D, +REG64( EX_7_LOCAL_FIR_MASK_AND , RULL(0x2E04000E), SH_UNT_EX_7 , + SH_ACS_SCOM1_AND ); //DUPS: 2F04000E, +REG64( EX_7_LOCAL_FIR_MASK_OR , RULL(0x2E04000F), SH_UNT_EX_7 , + SH_ACS_SCOM2_OR ); //DUPS: 2F04000F, +REG64( EX_8_LOCAL_FIR_MASK , RULL(0x3004000D), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 3104000D, +REG64( EX_8_LOCAL_FIR_MASK_AND , RULL(0x3004000E), SH_UNT_EX_8 , + SH_ACS_SCOM1_AND ); //DUPS: 3104000E, +REG64( EX_8_LOCAL_FIR_MASK_OR , RULL(0x3004000F), SH_UNT_EX_8 , + SH_ACS_SCOM2_OR ); //DUPS: 3104000F, +REG64( EX_9_LOCAL_FIR_MASK , RULL(0x3204000D), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 3304000D, +REG64( EX_9_LOCAL_FIR_MASK_AND , RULL(0x3204000E), SH_UNT_EX_9 , + SH_ACS_SCOM1_AND ); //DUPS: 3304000E, +REG64( EX_9_LOCAL_FIR_MASK_OR , RULL(0x3204000F), SH_UNT_EX_9 , + SH_ACS_SCOM2_OR ); //DUPS: 3304000F, +REG64( EX_10_LOCAL_FIR_MASK , RULL(0x3404000D), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 3504000D, +REG64( EX_10_LOCAL_FIR_MASK_AND , RULL(0x3404000E), SH_UNT_EX_10 , + SH_ACS_SCOM1_AND ); //DUPS: 3504000E, +REG64( EX_10_LOCAL_FIR_MASK_OR , RULL(0x3404000F), SH_UNT_EX_10 , + SH_ACS_SCOM2_OR ); //DUPS: 3504000F, +REG64( EX_11_LOCAL_FIR_MASK , RULL(0x3604000D), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 3704000D, +REG64( EX_11_LOCAL_FIR_MASK_AND , RULL(0x3604000E), SH_UNT_EX_11 , + SH_ACS_SCOM1_AND ); //DUPS: 3704000E, +REG64( EX_11_LOCAL_FIR_MASK_OR , RULL(0x3604000F), SH_UNT_EX_11 , + SH_ACS_SCOM2_OR ); //DUPS: 3704000F, + +REG64( EQ_LRU_VIC_ALLOC_REG , RULL(0x10011811), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011C11, +REG64( EQ_0_LRU_VIC_ALLOC_REG , RULL(0x10011811), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011C11, +REG64( EQ_1_LRU_VIC_ALLOC_REG , RULL(0x11011811), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011C11, +REG64( EQ_2_LRU_VIC_ALLOC_REG , RULL(0x12011811), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011C11, +REG64( EQ_3_LRU_VIC_ALLOC_REG , RULL(0x13011811), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011C11, +REG64( EQ_4_LRU_VIC_ALLOC_REG , RULL(0x14011811), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011C11, +REG64( EQ_5_LRU_VIC_ALLOC_REG , RULL(0x15011811), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011C11, +REG64( EX_0_L3_LRU_VIC_ALLOC_REG , RULL(0x10011811), SH_UNT_EX_0_L3 , SH_ACS_SCOM ); +REG64( EX_10_L3_LRU_VIC_ALLOC_REG , RULL(0x15011811), SH_UNT_EX_10_L3 , SH_ACS_SCOM ); +REG64( EX_11_L3_LRU_VIC_ALLOC_REG , RULL(0x15011C11), SH_UNT_EX_11_L3 , SH_ACS_SCOM ); +REG64( EX_1_L3_LRU_VIC_ALLOC_REG , RULL(0x10011C11), SH_UNT_EX_1_L3 , SH_ACS_SCOM ); +REG64( EX_2_L3_LRU_VIC_ALLOC_REG , RULL(0x11011811), SH_UNT_EX_2_L3 , SH_ACS_SCOM ); +REG64( EX_3_L3_LRU_VIC_ALLOC_REG , RULL(0x11011C11), SH_UNT_EX_3_L3 , SH_ACS_SCOM ); +REG64( EX_4_L3_LRU_VIC_ALLOC_REG , RULL(0x12011811), SH_UNT_EX_4_L3 , SH_ACS_SCOM ); +REG64( EX_5_L3_LRU_VIC_ALLOC_REG , RULL(0x12011C11), SH_UNT_EX_5_L3 , SH_ACS_SCOM ); +REG64( EX_6_L3_LRU_VIC_ALLOC_REG , RULL(0x13011811), SH_UNT_EX_6_L3 , SH_ACS_SCOM ); +REG64( EX_7_L3_LRU_VIC_ALLOC_REG , RULL(0x13011C11), SH_UNT_EX_7_L3 , SH_ACS_SCOM ); +REG64( EX_8_L3_LRU_VIC_ALLOC_REG , RULL(0x14011811), SH_UNT_EX_8_L3 , SH_ACS_SCOM ); +REG64( EX_9_L3_LRU_VIC_ALLOC_REG , RULL(0x14011C11), SH_UNT_EX_9_L3 , SH_ACS_SCOM ); +REG64( EX_L3_LRU_VIC_ALLOC_REG , RULL(0x10011811), SH_UNT_EX_L3 , SH_ACS_SCOM ); + +REG64( EQ_MIB_XIICAC , RULL(0x10012839), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 10012439, +REG64( EQ_0_MIB_XIICAC , RULL(0x10012839), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 10012439, +REG64( EQ_1_MIB_XIICAC , RULL(0x11012839), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 11012439, +REG64( EQ_2_MIB_XIICAC , RULL(0x12012839), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 12012439, +REG64( EQ_3_MIB_XIICAC , RULL(0x13012839), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 13012439, +REG64( EQ_4_MIB_XIICAC , RULL(0x14012839), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 14012439, +REG64( EQ_5_MIB_XIICAC , RULL(0x15012839), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 15012439, +REG64( EX_MIB_XIICAC , RULL(0x10012439), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_MIB_XIICAC , RULL(0x10012439), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_MIB_XIICAC , RULL(0x10012839), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_MIB_XIICAC , RULL(0x11012439), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_MIB_XIICAC , RULL(0x11012839), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_MIB_XIICAC , RULL(0x12012439), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_MIB_XIICAC , RULL(0x12012839), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_MIB_XIICAC , RULL(0x13012439), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_MIB_XIICAC , RULL(0x13012839), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_MIB_XIICAC , RULL(0x14012439), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_MIB_XIICAC , RULL(0x14012839), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_MIB_XIICAC , RULL(0x15012439), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_MIB_XIICAC , RULL(0x15012839), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_MIB_XIMEM , RULL(0x10012837), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 10012437, +REG64( EQ_0_MIB_XIMEM , RULL(0x10012837), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 10012437, +REG64( EQ_1_MIB_XIMEM , RULL(0x11012837), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 11012437, +REG64( EQ_2_MIB_XIMEM , RULL(0x12012837), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 12012437, +REG64( EQ_3_MIB_XIMEM , RULL(0x13012837), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 13012437, +REG64( EQ_4_MIB_XIMEM , RULL(0x14012837), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 14012437, +REG64( EQ_5_MIB_XIMEM , RULL(0x15012837), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 15012437, +REG64( EX_MIB_XIMEM , RULL(0x10012437), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_MIB_XIMEM , RULL(0x10012437), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_MIB_XIMEM , RULL(0x10012837), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_MIB_XIMEM , RULL(0x11012437), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_MIB_XIMEM , RULL(0x11012837), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_MIB_XIMEM , RULL(0x12012437), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_MIB_XIMEM , RULL(0x12012837), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_MIB_XIMEM , RULL(0x13012437), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_MIB_XIMEM , RULL(0x13012837), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_MIB_XIMEM , RULL(0x14012437), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_MIB_XIMEM , RULL(0x14012837), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_MIB_XIMEM , RULL(0x15012437), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_MIB_XIMEM , RULL(0x15012837), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_MIB_XISGB , RULL(0x10012838), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 10012438, +REG64( EQ_0_MIB_XISGB , RULL(0x10012838), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 10012438, +REG64( EQ_1_MIB_XISGB , RULL(0x11012838), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 11012438, +REG64( EQ_2_MIB_XISGB , RULL(0x12012838), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 12012438, +REG64( EQ_3_MIB_XISGB , RULL(0x13012838), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 13012438, +REG64( EQ_4_MIB_XISGB , RULL(0x14012838), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 14012438, +REG64( EQ_5_MIB_XISGB , RULL(0x15012838), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 15012438, +REG64( EX_MIB_XISGB , RULL(0x10012438), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_MIB_XISGB , RULL(0x10012438), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_MIB_XISGB , RULL(0x10012838), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_MIB_XISGB , RULL(0x11012438), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_MIB_XISGB , RULL(0x11012838), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_MIB_XISGB , RULL(0x12012438), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_MIB_XISGB , RULL(0x12012838), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_MIB_XISGB , RULL(0x13012438), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_MIB_XISGB , RULL(0x13012838), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_MIB_XISGB , RULL(0x14012438), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_MIB_XISGB , RULL(0x14012838), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_MIB_XISGB , RULL(0x15012438), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_MIB_XISGB , RULL(0x15012838), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( EQ_MIB_XISIB , RULL(0x10012836), SH_UNT_EQ , + SH_ACS_SCOM_RO ); //DUPS: 10012436, +REG64( EQ_0_MIB_XISIB , RULL(0x10012836), SH_UNT_EQ_0 , + SH_ACS_SCOM_RO ); //DUPS: 10012436, +REG64( EQ_1_MIB_XISIB , RULL(0x11012836), SH_UNT_EQ_1 , + SH_ACS_SCOM_RO ); //DUPS: 11012436, +REG64( EQ_2_MIB_XISIB , RULL(0x12012836), SH_UNT_EQ_2 , + SH_ACS_SCOM_RO ); //DUPS: 12012436, +REG64( EQ_3_MIB_XISIB , RULL(0x13012836), SH_UNT_EQ_3 , + SH_ACS_SCOM_RO ); //DUPS: 13012436, +REG64( EQ_4_MIB_XISIB , RULL(0x14012836), SH_UNT_EQ_4 , + SH_ACS_SCOM_RO ); //DUPS: 14012436, +REG64( EQ_5_MIB_XISIB , RULL(0x15012836), SH_UNT_EQ_5 , + SH_ACS_SCOM_RO ); //DUPS: 15012436, +REG64( EX_MIB_XISIB , RULL(0x10012436), SH_UNT_EX , SH_ACS_SCOM_RO ); +REG64( EX_0_MIB_XISIB , RULL(0x10012436), SH_UNT_EX_0 , SH_ACS_SCOM_RO ); +REG64( EX_1_MIB_XISIB , RULL(0x10012836), SH_UNT_EX_1 , SH_ACS_SCOM_RO ); +REG64( EX_2_MIB_XISIB , RULL(0x11012436), SH_UNT_EX_2 , SH_ACS_SCOM_RO ); +REG64( EX_3_MIB_XISIB , RULL(0x11012836), SH_UNT_EX_3 , SH_ACS_SCOM_RO ); +REG64( EX_4_MIB_XISIB , RULL(0x12012436), SH_UNT_EX_4 , SH_ACS_SCOM_RO ); +REG64( EX_5_MIB_XISIB , RULL(0x12012836), SH_UNT_EX_5 , SH_ACS_SCOM_RO ); +REG64( EX_6_MIB_XISIB , RULL(0x13012436), SH_UNT_EX_6 , SH_ACS_SCOM_RO ); +REG64( EX_7_MIB_XISIB , RULL(0x13012836), SH_UNT_EX_7 , SH_ACS_SCOM_RO ); +REG64( EX_8_MIB_XISIB , RULL(0x14012436), SH_UNT_EX_8 , SH_ACS_SCOM_RO ); +REG64( EX_9_MIB_XISIB , RULL(0x14012836), SH_UNT_EX_9 , SH_ACS_SCOM_RO ); +REG64( EX_10_MIB_XISIB , RULL(0x15012436), SH_UNT_EX_10 , SH_ACS_SCOM_RO ); +REG64( EX_11_MIB_XISIB , RULL(0x15012836), SH_UNT_EX_11 , SH_ACS_SCOM_RO ); + +REG64( C_MODE_REG , RULL(0x20040008), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_MODE_REG , RULL(0x20040008), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_MODE_REG , RULL(0x21040008), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_MODE_REG , RULL(0x22040008), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_MODE_REG , RULL(0x23040008), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_MODE_REG , RULL(0x24040008), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_MODE_REG , RULL(0x25040008), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_MODE_REG , RULL(0x26040008), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_MODE_REG , RULL(0x27040008), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_MODE_REG , RULL(0x28040008), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_MODE_REG , RULL(0x29040008), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_MODE_REG , RULL(0x2A040008), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_MODE_REG , RULL(0x2B040008), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_MODE_REG , RULL(0x2C040008), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_MODE_REG , RULL(0x2D040008), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_MODE_REG , RULL(0x2E040008), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_MODE_REG , RULL(0x2F040008), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_MODE_REG , RULL(0x30040008), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_MODE_REG , RULL(0x31040008), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_MODE_REG , RULL(0x32040008), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_MODE_REG , RULL(0x33040008), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_MODE_REG , RULL(0x34040008), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_MODE_REG , RULL(0x35040008), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_MODE_REG , RULL(0x36040008), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_MODE_REG , RULL(0x37040008), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_MODE_REG , RULL(0x10040008), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_MODE_REG , RULL(0x10040008), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_MODE_REG , RULL(0x11040008), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_MODE_REG , RULL(0x12040008), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_MODE_REG , RULL(0x13040008), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_MODE_REG , RULL(0x14040008), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_MODE_REG , RULL(0x15040008), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_MODE_REG , RULL(0x20040008), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21040008, +REG64( EX_0_MODE_REG , RULL(0x20040008), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21040008, +REG64( EX_1_MODE_REG , RULL(0x22040008), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23040008, +REG64( EX_2_MODE_REG , RULL(0x24040008), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25040008, +REG64( EX_3_MODE_REG , RULL(0x26040008), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27040008, +REG64( EX_4_MODE_REG , RULL(0x28040008), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29040008, +REG64( EX_5_MODE_REG , RULL(0x2A040008), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B040008, +REG64( EX_6_MODE_REG , RULL(0x2C040008), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D040008, +REG64( EX_7_MODE_REG , RULL(0x2E040008), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F040008, +REG64( EX_8_MODE_REG , RULL(0x30040008), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31040008, +REG64( EX_9_MODE_REG , RULL(0x32040008), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33040008, +REG64( EX_10_MODE_REG , RULL(0x34040008), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35040008, +REG64( EX_11_MODE_REG , RULL(0x36040008), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37040008, + +REG64( EQ_MODE_REG0 , RULL(0x1001080A), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 1001182B, 10010C0A, 10011C2B, +REG64( EQ_0_MODE_REG0 , RULL(0x1001080A), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 1001182B, 10010C0A, 10011C2B, +REG64( EQ_1_MODE_REG0 , RULL(0x1101080A), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 1101182B, 11010C0A, 11011C2B, +REG64( EQ_2_MODE_REG0 , RULL(0x1201080A), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 1201182B, 12010C0A, 12011C2B, +REG64( EQ_3_MODE_REG0 , RULL(0x1301080A), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 1301182B, 13010C0A, 13011C2B, +REG64( EQ_4_MODE_REG0 , RULL(0x1401080A), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 1401182B, 14010C0A, 14011C2B, +REG64( EQ_5_MODE_REG0 , RULL(0x1501080A), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 1501182B, 15010C0A, 15011C2B, +REG64( EX_0_L2_MODE_REG0 , RULL(0x1001080A), SH_UNT_EX_0_L2 , SH_ACS_SCOM ); +REG64( EX_0_L3_MODE_REG0 , RULL(0x1001182B), SH_UNT_EX_0_L3 , SH_ACS_SCOM ); +REG64( EX_10_L2_MODE_REG0 , RULL(0x1501080A), SH_UNT_EX_10_L2 , SH_ACS_SCOM ); +REG64( EX_10_L3_MODE_REG0 , RULL(0x1501182B), SH_UNT_EX_10_L3 , SH_ACS_SCOM ); +REG64( EX_11_L2_MODE_REG0 , RULL(0x15010C0A), SH_UNT_EX_11_L2 , SH_ACS_SCOM ); +REG64( EX_11_L3_MODE_REG0 , RULL(0x15011C2B), SH_UNT_EX_11_L3 , SH_ACS_SCOM ); +REG64( EX_1_L2_MODE_REG0 , RULL(0x10010C0A), SH_UNT_EX_1_L2 , SH_ACS_SCOM ); +REG64( EX_1_L3_MODE_REG0 , RULL(0x10011C2B), SH_UNT_EX_1_L3 , SH_ACS_SCOM ); +REG64( EX_2_L2_MODE_REG0 , RULL(0x1101080A), SH_UNT_EX_2_L2 , SH_ACS_SCOM ); +REG64( EX_2_L3_MODE_REG0 , RULL(0x1101182B), SH_UNT_EX_2_L3 , SH_ACS_SCOM ); +REG64( EX_3_L2_MODE_REG0 , RULL(0x11010C0A), SH_UNT_EX_3_L2 , SH_ACS_SCOM ); +REG64( EX_3_L3_MODE_REG0 , RULL(0x11011C2B), SH_UNT_EX_3_L3 , SH_ACS_SCOM ); +REG64( EX_4_L2_MODE_REG0 , RULL(0x1201080A), SH_UNT_EX_4_L2 , SH_ACS_SCOM ); +REG64( EX_4_L3_MODE_REG0 , RULL(0x1201182B), SH_UNT_EX_4_L3 , SH_ACS_SCOM ); +REG64( EX_5_L2_MODE_REG0 , RULL(0x12010C0A), SH_UNT_EX_5_L2 , SH_ACS_SCOM ); +REG64( EX_5_L3_MODE_REG0 , RULL(0x12011C2B), SH_UNT_EX_5_L3 , SH_ACS_SCOM ); +REG64( EX_6_L2_MODE_REG0 , RULL(0x1301080A), SH_UNT_EX_6_L2 , SH_ACS_SCOM ); +REG64( EX_6_L3_MODE_REG0 , RULL(0x1301182B), SH_UNT_EX_6_L3 , SH_ACS_SCOM ); +REG64( EX_7_L2_MODE_REG0 , RULL(0x13010C0A), SH_UNT_EX_7_L2 , SH_ACS_SCOM ); +REG64( EX_7_L3_MODE_REG0 , RULL(0x13011C2B), SH_UNT_EX_7_L3 , SH_ACS_SCOM ); +REG64( EX_8_L2_MODE_REG0 , RULL(0x1401080A), SH_UNT_EX_8_L2 , SH_ACS_SCOM ); +REG64( EX_8_L3_MODE_REG0 , RULL(0x1401182B), SH_UNT_EX_8_L3 , SH_ACS_SCOM ); +REG64( EX_9_L2_MODE_REG0 , RULL(0x14010C0A), SH_UNT_EX_9_L2 , SH_ACS_SCOM ); +REG64( EX_9_L3_MODE_REG0 , RULL(0x14011C2B), SH_UNT_EX_9_L3 , SH_ACS_SCOM ); +REG64( EX_L2_MODE_REG0 , RULL(0x1001080A), SH_UNT_EX_L2 , SH_ACS_SCOM ); +REG64( EX_L3_MODE_REG0 , RULL(0x1001182B), SH_UNT_EX_L3 , SH_ACS_SCOM ); + +REG64( EQ_MODE_REG1 , RULL(0x1001080B), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 1001180A, 10010C0B, 10011C0A, +REG64( EQ_0_MODE_REG1 , RULL(0x1001080B), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 1001180A, 10010C0B, 10011C0A, +REG64( EQ_1_MODE_REG1 , RULL(0x1101080B), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 1101180A, 11010C0B, 11011C0A, +REG64( EQ_2_MODE_REG1 , RULL(0x1201080B), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 1201180A, 12010C0B, 12011C0A, +REG64( EQ_3_MODE_REG1 , RULL(0x1301080B), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 1301180A, 13010C0B, 13011C0A, +REG64( EQ_4_MODE_REG1 , RULL(0x1401080B), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 1401180A, 14010C0B, 14011C0A, +REG64( EQ_5_MODE_REG1 , RULL(0x1501080B), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 1501180A, 15010C0B, 15011C0A, +REG64( EX_0_L2_MODE_REG1 , RULL(0x1001080B), SH_UNT_EX_0_L2 , SH_ACS_SCOM ); +REG64( EX_0_L3_MODE_REG1 , RULL(0x1001180A), SH_UNT_EX_0_L3 , SH_ACS_SCOM ); +REG64( EX_10_L2_MODE_REG1 , RULL(0x1501080B), SH_UNT_EX_10_L2 , SH_ACS_SCOM ); +REG64( EX_10_L3_MODE_REG1 , RULL(0x1501180A), SH_UNT_EX_10_L3 , SH_ACS_SCOM ); +REG64( EX_11_L2_MODE_REG1 , RULL(0x15010C0B), SH_UNT_EX_11_L2 , SH_ACS_SCOM ); +REG64( EX_11_L3_MODE_REG1 , RULL(0x15011C0A), SH_UNT_EX_11_L3 , SH_ACS_SCOM ); +REG64( EX_1_L2_MODE_REG1 , RULL(0x10010C0B), SH_UNT_EX_1_L2 , SH_ACS_SCOM ); +REG64( EX_1_L3_MODE_REG1 , RULL(0x10011C0A), SH_UNT_EX_1_L3 , SH_ACS_SCOM ); +REG64( EX_2_L2_MODE_REG1 , RULL(0x1101080B), SH_UNT_EX_2_L2 , SH_ACS_SCOM ); +REG64( EX_2_L3_MODE_REG1 , RULL(0x1101180A), SH_UNT_EX_2_L3 , SH_ACS_SCOM ); +REG64( EX_3_L2_MODE_REG1 , RULL(0x11010C0B), SH_UNT_EX_3_L2 , SH_ACS_SCOM ); +REG64( EX_3_L3_MODE_REG1 , RULL(0x11011C0A), SH_UNT_EX_3_L3 , SH_ACS_SCOM ); +REG64( EX_4_L2_MODE_REG1 , RULL(0x1201080B), SH_UNT_EX_4_L2 , SH_ACS_SCOM ); +REG64( EX_4_L3_MODE_REG1 , RULL(0x1201180A), SH_UNT_EX_4_L3 , SH_ACS_SCOM ); +REG64( EX_5_L2_MODE_REG1 , RULL(0x12010C0B), SH_UNT_EX_5_L2 , SH_ACS_SCOM ); +REG64( EX_5_L3_MODE_REG1 , RULL(0x12011C0A), SH_UNT_EX_5_L3 , SH_ACS_SCOM ); +REG64( EX_6_L2_MODE_REG1 , RULL(0x1301080B), SH_UNT_EX_6_L2 , SH_ACS_SCOM ); +REG64( EX_6_L3_MODE_REG1 , RULL(0x1301180A), SH_UNT_EX_6_L3 , SH_ACS_SCOM ); +REG64( EX_7_L2_MODE_REG1 , RULL(0x13010C0B), SH_UNT_EX_7_L2 , SH_ACS_SCOM ); +REG64( EX_7_L3_MODE_REG1 , RULL(0x13011C0A), SH_UNT_EX_7_L3 , SH_ACS_SCOM ); +REG64( EX_8_L2_MODE_REG1 , RULL(0x1401080B), SH_UNT_EX_8_L2 , SH_ACS_SCOM ); +REG64( EX_8_L3_MODE_REG1 , RULL(0x1401180A), SH_UNT_EX_8_L3 , SH_ACS_SCOM ); +REG64( EX_9_L2_MODE_REG1 , RULL(0x14010C0B), SH_UNT_EX_9_L2 , SH_ACS_SCOM ); +REG64( EX_9_L3_MODE_REG1 , RULL(0x14011C0A), SH_UNT_EX_9_L3 , SH_ACS_SCOM ); +REG64( EX_L2_MODE_REG1 , RULL(0x1001080B), SH_UNT_EX_L2 , SH_ACS_SCOM ); +REG64( EX_L3_MODE_REG1 , RULL(0x1001180A), SH_UNT_EX_L3 , SH_ACS_SCOM ); + +REG64( C_MULTICAST_GROUP_1 , RULL(0x200F0001), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_MULTICAST_GROUP_1 , RULL(0x200F0001), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_MULTICAST_GROUP_1 , RULL(0x210F0001), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_MULTICAST_GROUP_1 , RULL(0x220F0001), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_MULTICAST_GROUP_1 , RULL(0x230F0001), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_MULTICAST_GROUP_1 , RULL(0x240F0001), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_MULTICAST_GROUP_1 , RULL(0x250F0001), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_MULTICAST_GROUP_1 , RULL(0x260F0001), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_MULTICAST_GROUP_1 , RULL(0x270F0001), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_MULTICAST_GROUP_1 , RULL(0x280F0001), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_MULTICAST_GROUP_1 , RULL(0x290F0001), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_MULTICAST_GROUP_1 , RULL(0x2A0F0001), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_MULTICAST_GROUP_1 , RULL(0x2B0F0001), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_MULTICAST_GROUP_1 , RULL(0x2C0F0001), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_MULTICAST_GROUP_1 , RULL(0x2D0F0001), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_MULTICAST_GROUP_1 , RULL(0x2E0F0001), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_MULTICAST_GROUP_1 , RULL(0x2F0F0001), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_MULTICAST_GROUP_1 , RULL(0x300F0001), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_MULTICAST_GROUP_1 , RULL(0x310F0001), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_MULTICAST_GROUP_1 , RULL(0x320F0001), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_MULTICAST_GROUP_1 , RULL(0x330F0001), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_MULTICAST_GROUP_1 , RULL(0x340F0001), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_MULTICAST_GROUP_1 , RULL(0x350F0001), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_MULTICAST_GROUP_1 , RULL(0x360F0001), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_MULTICAST_GROUP_1 , RULL(0x370F0001), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_MULTICAST_GROUP_1 , RULL(0x100F0001), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_MULTICAST_GROUP_1 , RULL(0x100F0001), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_MULTICAST_GROUP_1 , RULL(0x110F0001), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_MULTICAST_GROUP_1 , RULL(0x120F0001), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_MULTICAST_GROUP_1 , RULL(0x130F0001), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_MULTICAST_GROUP_1 , RULL(0x140F0001), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_MULTICAST_GROUP_1 , RULL(0x150F0001), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_MULTICAST_GROUP_1 , RULL(0x200F0001), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0001, +REG64( EX_0_MULTICAST_GROUP_1 , RULL(0x200F0001), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0001, +REG64( EX_1_MULTICAST_GROUP_1 , RULL(0x230F0001), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0001, +REG64( EX_2_MULTICAST_GROUP_1 , RULL(0x240F0001), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0001, +REG64( EX_3_MULTICAST_GROUP_1 , RULL(0x260F0001), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0001, +REG64( EX_4_MULTICAST_GROUP_1 , RULL(0x280F0001), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0001, +REG64( EX_5_MULTICAST_GROUP_1 , RULL(0x2A0F0001), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0001, +REG64( EX_6_MULTICAST_GROUP_1 , RULL(0x2C0F0001), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0001, +REG64( EX_7_MULTICAST_GROUP_1 , RULL(0x2E0F0001), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0001, +REG64( EX_8_MULTICAST_GROUP_1 , RULL(0x300F0001), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0001, +REG64( EX_9_MULTICAST_GROUP_1 , RULL(0x320F0001), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0001, +REG64( EX_10_MULTICAST_GROUP_1 , RULL(0x340F0001), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0001, +REG64( EX_11_MULTICAST_GROUP_1 , RULL(0x360F0001), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0001, + +REG64( C_MULTICAST_GROUP_2 , RULL(0x200F0002), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_MULTICAST_GROUP_2 , RULL(0x200F0002), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_MULTICAST_GROUP_2 , RULL(0x210F0002), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_MULTICAST_GROUP_2 , RULL(0x220F0002), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_MULTICAST_GROUP_2 , RULL(0x230F0002), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_MULTICAST_GROUP_2 , RULL(0x240F0002), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_MULTICAST_GROUP_2 , RULL(0x250F0002), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_MULTICAST_GROUP_2 , RULL(0x260F0002), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_MULTICAST_GROUP_2 , RULL(0x270F0002), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_MULTICAST_GROUP_2 , RULL(0x280F0002), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_MULTICAST_GROUP_2 , RULL(0x290F0002), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_MULTICAST_GROUP_2 , RULL(0x2A0F0002), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_MULTICAST_GROUP_2 , RULL(0x2B0F0002), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_MULTICAST_GROUP_2 , RULL(0x2C0F0002), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_MULTICAST_GROUP_2 , RULL(0x2D0F0002), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_MULTICAST_GROUP_2 , RULL(0x2E0F0002), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_MULTICAST_GROUP_2 , RULL(0x2F0F0002), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_MULTICAST_GROUP_2 , RULL(0x300F0002), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_MULTICAST_GROUP_2 , RULL(0x310F0002), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_MULTICAST_GROUP_2 , RULL(0x320F0002), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_MULTICAST_GROUP_2 , RULL(0x330F0002), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_MULTICAST_GROUP_2 , RULL(0x340F0002), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_MULTICAST_GROUP_2 , RULL(0x350F0002), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_MULTICAST_GROUP_2 , RULL(0x360F0002), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_MULTICAST_GROUP_2 , RULL(0x370F0002), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_MULTICAST_GROUP_2 , RULL(0x100F0002), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_MULTICAST_GROUP_2 , RULL(0x100F0002), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_MULTICAST_GROUP_2 , RULL(0x110F0002), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_MULTICAST_GROUP_2 , RULL(0x120F0002), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_MULTICAST_GROUP_2 , RULL(0x130F0002), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_MULTICAST_GROUP_2 , RULL(0x140F0002), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_MULTICAST_GROUP_2 , RULL(0x150F0002), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_MULTICAST_GROUP_2 , RULL(0x200F0002), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0002, +REG64( EX_0_MULTICAST_GROUP_2 , RULL(0x200F0002), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0002, +REG64( EX_1_MULTICAST_GROUP_2 , RULL(0x230F0002), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0002, +REG64( EX_2_MULTICAST_GROUP_2 , RULL(0x240F0002), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0002, +REG64( EX_3_MULTICAST_GROUP_2 , RULL(0x260F0002), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0002, +REG64( EX_4_MULTICAST_GROUP_2 , RULL(0x280F0002), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0002, +REG64( EX_5_MULTICAST_GROUP_2 , RULL(0x2A0F0002), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0002, +REG64( EX_6_MULTICAST_GROUP_2 , RULL(0x2C0F0002), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0002, +REG64( EX_7_MULTICAST_GROUP_2 , RULL(0x2E0F0002), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0002, +REG64( EX_8_MULTICAST_GROUP_2 , RULL(0x300F0002), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0002, +REG64( EX_9_MULTICAST_GROUP_2 , RULL(0x320F0002), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0002, +REG64( EX_10_MULTICAST_GROUP_2 , RULL(0x340F0002), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0002, +REG64( EX_11_MULTICAST_GROUP_2 , RULL(0x360F0002), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0002, + +REG64( C_MULTICAST_GROUP_3 , RULL(0x200F0003), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_MULTICAST_GROUP_3 , RULL(0x200F0003), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_MULTICAST_GROUP_3 , RULL(0x210F0003), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_MULTICAST_GROUP_3 , RULL(0x220F0003), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_MULTICAST_GROUP_3 , RULL(0x230F0003), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_MULTICAST_GROUP_3 , RULL(0x240F0003), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_MULTICAST_GROUP_3 , RULL(0x250F0003), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_MULTICAST_GROUP_3 , RULL(0x260F0003), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_MULTICAST_GROUP_3 , RULL(0x270F0003), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_MULTICAST_GROUP_3 , RULL(0x280F0003), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_MULTICAST_GROUP_3 , RULL(0x290F0003), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_MULTICAST_GROUP_3 , RULL(0x2A0F0003), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_MULTICAST_GROUP_3 , RULL(0x2B0F0003), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_MULTICAST_GROUP_3 , RULL(0x2C0F0003), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_MULTICAST_GROUP_3 , RULL(0x2D0F0003), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_MULTICAST_GROUP_3 , RULL(0x2E0F0003), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_MULTICAST_GROUP_3 , RULL(0x2F0F0003), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_MULTICAST_GROUP_3 , RULL(0x300F0003), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_MULTICAST_GROUP_3 , RULL(0x310F0003), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_MULTICAST_GROUP_3 , RULL(0x320F0003), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_MULTICAST_GROUP_3 , RULL(0x330F0003), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_MULTICAST_GROUP_3 , RULL(0x340F0003), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_MULTICAST_GROUP_3 , RULL(0x350F0003), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_MULTICAST_GROUP_3 , RULL(0x360F0003), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_MULTICAST_GROUP_3 , RULL(0x370F0003), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_MULTICAST_GROUP_3 , RULL(0x100F0003), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_MULTICAST_GROUP_3 , RULL(0x100F0003), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_MULTICAST_GROUP_3 , RULL(0x110F0003), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_MULTICAST_GROUP_3 , RULL(0x120F0003), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_MULTICAST_GROUP_3 , RULL(0x130F0003), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_MULTICAST_GROUP_3 , RULL(0x140F0003), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_MULTICAST_GROUP_3 , RULL(0x150F0003), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_MULTICAST_GROUP_3 , RULL(0x200F0003), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0003, +REG64( EX_0_MULTICAST_GROUP_3 , RULL(0x200F0003), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0003, +REG64( EX_1_MULTICAST_GROUP_3 , RULL(0x230F0003), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0003, +REG64( EX_2_MULTICAST_GROUP_3 , RULL(0x240F0003), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0003, +REG64( EX_3_MULTICAST_GROUP_3 , RULL(0x260F0003), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0003, +REG64( EX_4_MULTICAST_GROUP_3 , RULL(0x280F0003), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0003, +REG64( EX_5_MULTICAST_GROUP_3 , RULL(0x2A0F0003), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0003, +REG64( EX_6_MULTICAST_GROUP_3 , RULL(0x2C0F0003), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0003, +REG64( EX_7_MULTICAST_GROUP_3 , RULL(0x2E0F0003), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0003, +REG64( EX_8_MULTICAST_GROUP_3 , RULL(0x300F0003), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0003, +REG64( EX_9_MULTICAST_GROUP_3 , RULL(0x320F0003), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0003, +REG64( EX_10_MULTICAST_GROUP_3 , RULL(0x340F0003), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0003, +REG64( EX_11_MULTICAST_GROUP_3 , RULL(0x360F0003), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0003, + +REG64( C_MULTICAST_GROUP_4 , RULL(0x200F0004), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_MULTICAST_GROUP_4 , RULL(0x200F0004), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_MULTICAST_GROUP_4 , RULL(0x210F0004), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_MULTICAST_GROUP_4 , RULL(0x220F0004), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_MULTICAST_GROUP_4 , RULL(0x230F0004), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_MULTICAST_GROUP_4 , RULL(0x240F0004), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_MULTICAST_GROUP_4 , RULL(0x250F0004), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_MULTICAST_GROUP_4 , RULL(0x260F0004), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_MULTICAST_GROUP_4 , RULL(0x270F0004), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_MULTICAST_GROUP_4 , RULL(0x280F0004), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_MULTICAST_GROUP_4 , RULL(0x290F0004), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_MULTICAST_GROUP_4 , RULL(0x2A0F0004), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_MULTICAST_GROUP_4 , RULL(0x2B0F0004), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_MULTICAST_GROUP_4 , RULL(0x2C0F0004), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_MULTICAST_GROUP_4 , RULL(0x2D0F0004), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_MULTICAST_GROUP_4 , RULL(0x2E0F0004), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_MULTICAST_GROUP_4 , RULL(0x2F0F0004), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_MULTICAST_GROUP_4 , RULL(0x300F0004), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_MULTICAST_GROUP_4 , RULL(0x310F0004), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_MULTICAST_GROUP_4 , RULL(0x320F0004), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_MULTICAST_GROUP_4 , RULL(0x330F0004), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_MULTICAST_GROUP_4 , RULL(0x340F0004), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_MULTICAST_GROUP_4 , RULL(0x350F0004), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_MULTICAST_GROUP_4 , RULL(0x360F0004), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_MULTICAST_GROUP_4 , RULL(0x370F0004), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_MULTICAST_GROUP_4 , RULL(0x100F0004), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_MULTICAST_GROUP_4 , RULL(0x100F0004), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_MULTICAST_GROUP_4 , RULL(0x110F0004), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_MULTICAST_GROUP_4 , RULL(0x120F0004), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_MULTICAST_GROUP_4 , RULL(0x130F0004), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_MULTICAST_GROUP_4 , RULL(0x140F0004), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_MULTICAST_GROUP_4 , RULL(0x150F0004), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_MULTICAST_GROUP_4 , RULL(0x200F0004), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0004, +REG64( EX_0_MULTICAST_GROUP_4 , RULL(0x200F0004), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0004, +REG64( EX_1_MULTICAST_GROUP_4 , RULL(0x230F0004), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0004, +REG64( EX_2_MULTICAST_GROUP_4 , RULL(0x240F0004), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0004, +REG64( EX_3_MULTICAST_GROUP_4 , RULL(0x260F0004), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0004, +REG64( EX_4_MULTICAST_GROUP_4 , RULL(0x280F0004), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0004, +REG64( EX_5_MULTICAST_GROUP_4 , RULL(0x2A0F0004), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0004, +REG64( EX_6_MULTICAST_GROUP_4 , RULL(0x2C0F0004), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0004, +REG64( EX_7_MULTICAST_GROUP_4 , RULL(0x2E0F0004), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0004, +REG64( EX_8_MULTICAST_GROUP_4 , RULL(0x300F0004), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0004, +REG64( EX_9_MULTICAST_GROUP_4 , RULL(0x320F0004), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0004, +REG64( EX_10_MULTICAST_GROUP_4 , RULL(0x340F0004), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0004, +REG64( EX_11_MULTICAST_GROUP_4 , RULL(0x360F0004), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0004, + +REG64( EQ_NCU_DARN_BAR_REG , RULL(0x10011011), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011411, +REG64( EQ_0_NCU_DARN_BAR_REG , RULL(0x10011011), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011411, +REG64( EQ_1_NCU_DARN_BAR_REG , RULL(0x11011011), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011411, +REG64( EQ_2_NCU_DARN_BAR_REG , RULL(0x12011011), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011411, +REG64( EQ_3_NCU_DARN_BAR_REG , RULL(0x13011011), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011411, +REG64( EQ_4_NCU_DARN_BAR_REG , RULL(0x14011011), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011411, +REG64( EQ_5_NCU_DARN_BAR_REG , RULL(0x15011011), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011411, +REG64( EX_NCU_DARN_BAR_REG , RULL(0x10011011), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_NCU_DARN_BAR_REG , RULL(0x10011011), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_NCU_DARN_BAR_REG , RULL(0x10011411), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_NCU_DARN_BAR_REG , RULL(0x11011011), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_NCU_DARN_BAR_REG , RULL(0x11011411), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_NCU_DARN_BAR_REG , RULL(0x12011011), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_NCU_DARN_BAR_REG , RULL(0x12011411), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_NCU_DARN_BAR_REG , RULL(0x13011011), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_NCU_DARN_BAR_REG , RULL(0x13011411), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_NCU_DARN_BAR_REG , RULL(0x14011011), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_NCU_DARN_BAR_REG , RULL(0x14011411), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_NCU_DARN_BAR_REG , RULL(0x15011011), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_NCU_DARN_BAR_REG , RULL(0x15011411), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( EQ_NCU_MODE_REG , RULL(0x1001100A), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 1001140A, +REG64( EQ_0_NCU_MODE_REG , RULL(0x1001100A), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 1001140A, +REG64( EQ_1_NCU_MODE_REG , RULL(0x1101100A), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 1101140A, +REG64( EQ_2_NCU_MODE_REG , RULL(0x1201100A), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 1201140A, +REG64( EQ_3_NCU_MODE_REG , RULL(0x1301100A), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 1301140A, +REG64( EQ_4_NCU_MODE_REG , RULL(0x1401100A), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 1401140A, +REG64( EQ_5_NCU_MODE_REG , RULL(0x1501100A), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 1501140A, +REG64( EX_NCU_MODE_REG , RULL(0x1001100A), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_NCU_MODE_REG , RULL(0x1001100A), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_NCU_MODE_REG , RULL(0x1001140A), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_NCU_MODE_REG , RULL(0x1101100A), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_NCU_MODE_REG , RULL(0x1101140A), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_NCU_MODE_REG , RULL(0x1201100A), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_NCU_MODE_REG , RULL(0x1201140A), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_NCU_MODE_REG , RULL(0x1301100A), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_NCU_MODE_REG , RULL(0x1301140A), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_NCU_MODE_REG , RULL(0x1401100A), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_NCU_MODE_REG , RULL(0x1401140A), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_NCU_MODE_REG , RULL(0x1501100A), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_NCU_MODE_REG , RULL(0x1501140A), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( EQ_NCU_MODE_REG2 , RULL(0x1001100B), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 1001140B, +REG64( EQ_0_NCU_MODE_REG2 , RULL(0x1001100B), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 1001140B, +REG64( EQ_1_NCU_MODE_REG2 , RULL(0x1101100B), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 1101140B, +REG64( EQ_2_NCU_MODE_REG2 , RULL(0x1201100B), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 1201140B, +REG64( EQ_3_NCU_MODE_REG2 , RULL(0x1301100B), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 1301140B, +REG64( EQ_4_NCU_MODE_REG2 , RULL(0x1401100B), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 1401140B, +REG64( EQ_5_NCU_MODE_REG2 , RULL(0x1501100B), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 1501140B, +REG64( EX_NCU_MODE_REG2 , RULL(0x1001100B), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_NCU_MODE_REG2 , RULL(0x1001100B), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_NCU_MODE_REG2 , RULL(0x1001140B), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_NCU_MODE_REG2 , RULL(0x1101100B), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_NCU_MODE_REG2 , RULL(0x1101140B), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_NCU_MODE_REG2 , RULL(0x1201100B), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_NCU_MODE_REG2 , RULL(0x1201140B), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_NCU_MODE_REG2 , RULL(0x1301100B), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_NCU_MODE_REG2 , RULL(0x1301140B), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_NCU_MODE_REG2 , RULL(0x1401100B), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_NCU_MODE_REG2 , RULL(0x1401140B), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_NCU_MODE_REG2 , RULL(0x1501100B), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_NCU_MODE_REG2 , RULL(0x1501140B), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( EQ_NCU_MODE_REG3 , RULL(0x1001100C), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 1001140C, +REG64( EQ_0_NCU_MODE_REG3 , RULL(0x1001100C), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 1001140C, +REG64( EQ_1_NCU_MODE_REG3 , RULL(0x1101100C), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 1101140C, +REG64( EQ_2_NCU_MODE_REG3 , RULL(0x1201100C), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 1201140C, +REG64( EQ_3_NCU_MODE_REG3 , RULL(0x1301100C), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 1301140C, +REG64( EQ_4_NCU_MODE_REG3 , RULL(0x1401100C), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 1401140C, +REG64( EQ_5_NCU_MODE_REG3 , RULL(0x1501100C), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 1501140C, +REG64( EX_NCU_MODE_REG3 , RULL(0x1001100C), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_NCU_MODE_REG3 , RULL(0x1001100C), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_NCU_MODE_REG3 , RULL(0x1001140C), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_NCU_MODE_REG3 , RULL(0x1101100C), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_NCU_MODE_REG3 , RULL(0x1101140C), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_NCU_MODE_REG3 , RULL(0x1201100C), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_NCU_MODE_REG3 , RULL(0x1201140C), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_NCU_MODE_REG3 , RULL(0x1301100C), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_NCU_MODE_REG3 , RULL(0x1301140C), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_NCU_MODE_REG3 , RULL(0x1401100C), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_NCU_MODE_REG3 , RULL(0x1401140C), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_NCU_MODE_REG3 , RULL(0x1501100C), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_NCU_MODE_REG3 , RULL(0x1501140C), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( EQ_NCU_SLOW_LPAR_REG0 , RULL(0x10011012), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011412, +REG64( EQ_0_NCU_SLOW_LPAR_REG0 , RULL(0x10011012), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011412, +REG64( EQ_1_NCU_SLOW_LPAR_REG0 , RULL(0x11011012), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011412, +REG64( EQ_2_NCU_SLOW_LPAR_REG0 , RULL(0x12011012), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011412, +REG64( EQ_3_NCU_SLOW_LPAR_REG0 , RULL(0x13011012), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011412, +REG64( EQ_4_NCU_SLOW_LPAR_REG0 , RULL(0x14011012), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011412, +REG64( EQ_5_NCU_SLOW_LPAR_REG0 , RULL(0x15011012), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011412, +REG64( EX_NCU_SLOW_LPAR_REG0 , RULL(0x10011012), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_NCU_SLOW_LPAR_REG0 , RULL(0x10011012), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_NCU_SLOW_LPAR_REG0 , RULL(0x10011412), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_NCU_SLOW_LPAR_REG0 , RULL(0x11011012), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_NCU_SLOW_LPAR_REG0 , RULL(0x11011412), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_NCU_SLOW_LPAR_REG0 , RULL(0x12011012), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_NCU_SLOW_LPAR_REG0 , RULL(0x12011412), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_NCU_SLOW_LPAR_REG0 , RULL(0x13011012), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_NCU_SLOW_LPAR_REG0 , RULL(0x13011412), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_NCU_SLOW_LPAR_REG0 , RULL(0x14011012), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_NCU_SLOW_LPAR_REG0 , RULL(0x14011412), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_NCU_SLOW_LPAR_REG0 , RULL(0x15011012), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_NCU_SLOW_LPAR_REG0 , RULL(0x15011412), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( EQ_NCU_SLOW_LPAR_REG1 , RULL(0x10011013), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011413, +REG64( EQ_0_NCU_SLOW_LPAR_REG1 , RULL(0x10011013), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011413, +REG64( EQ_1_NCU_SLOW_LPAR_REG1 , RULL(0x11011013), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011413, +REG64( EQ_2_NCU_SLOW_LPAR_REG1 , RULL(0x12011013), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011413, +REG64( EQ_3_NCU_SLOW_LPAR_REG1 , RULL(0x13011013), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011413, +REG64( EQ_4_NCU_SLOW_LPAR_REG1 , RULL(0x14011013), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011413, +REG64( EQ_5_NCU_SLOW_LPAR_REG1 , RULL(0x15011013), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011413, +REG64( EX_NCU_SLOW_LPAR_REG1 , RULL(0x10011013), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_NCU_SLOW_LPAR_REG1 , RULL(0x10011013), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_NCU_SLOW_LPAR_REG1 , RULL(0x10011413), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_NCU_SLOW_LPAR_REG1 , RULL(0x11011013), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_NCU_SLOW_LPAR_REG1 , RULL(0x11011413), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_NCU_SLOW_LPAR_REG1 , RULL(0x12011013), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_NCU_SLOW_LPAR_REG1 , RULL(0x12011413), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_NCU_SLOW_LPAR_REG1 , RULL(0x13011013), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_NCU_SLOW_LPAR_REG1 , RULL(0x13011413), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_NCU_SLOW_LPAR_REG1 , RULL(0x14011013), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_NCU_SLOW_LPAR_REG1 , RULL(0x14011413), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_NCU_SLOW_LPAR_REG1 , RULL(0x15011013), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_NCU_SLOW_LPAR_REG1 , RULL(0x15011413), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( EQ_NCU_SPEC_BAR_REG , RULL(0x10011010), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011410, +REG64( EQ_0_NCU_SPEC_BAR_REG , RULL(0x10011010), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011410, +REG64( EQ_1_NCU_SPEC_BAR_REG , RULL(0x11011010), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011410, +REG64( EQ_2_NCU_SPEC_BAR_REG , RULL(0x12011010), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011410, +REG64( EQ_3_NCU_SPEC_BAR_REG , RULL(0x13011010), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011410, +REG64( EQ_4_NCU_SPEC_BAR_REG , RULL(0x14011010), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011410, +REG64( EQ_5_NCU_SPEC_BAR_REG , RULL(0x15011010), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011410, +REG64( EX_NCU_SPEC_BAR_REG , RULL(0x10011010), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_NCU_SPEC_BAR_REG , RULL(0x10011010), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_NCU_SPEC_BAR_REG , RULL(0x10011410), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_NCU_SPEC_BAR_REG , RULL(0x11011010), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_NCU_SPEC_BAR_REG , RULL(0x11011410), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_NCU_SPEC_BAR_REG , RULL(0x12011010), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_NCU_SPEC_BAR_REG , RULL(0x12011410), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_NCU_SPEC_BAR_REG , RULL(0x13011010), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_NCU_SPEC_BAR_REG , RULL(0x13011410), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_NCU_SPEC_BAR_REG , RULL(0x14011010), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_NCU_SPEC_BAR_REG , RULL(0x14011410), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_NCU_SPEC_BAR_REG , RULL(0x15011010), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_NCU_SPEC_BAR_REG , RULL(0x15011410), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( EQ_NCU_STATUS_REG , RULL(0x1001100F), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 1001140F, +REG64( EQ_0_NCU_STATUS_REG , RULL(0x1001100F), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 1001140F, +REG64( EQ_1_NCU_STATUS_REG , RULL(0x1101100F), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 1101140F, +REG64( EQ_2_NCU_STATUS_REG , RULL(0x1201100F), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 1201140F, +REG64( EQ_3_NCU_STATUS_REG , RULL(0x1301100F), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 1301140F, +REG64( EQ_4_NCU_STATUS_REG , RULL(0x1401100F), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 1401140F, +REG64( EQ_5_NCU_STATUS_REG , RULL(0x1501100F), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 1501140F, +REG64( EX_NCU_STATUS_REG , RULL(0x1001100F), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_NCU_STATUS_REG , RULL(0x1001100F), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_NCU_STATUS_REG , RULL(0x1001140F), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_NCU_STATUS_REG , RULL(0x1101100F), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_NCU_STATUS_REG , RULL(0x1101140F), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_NCU_STATUS_REG , RULL(0x1201100F), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_NCU_STATUS_REG , RULL(0x1201140F), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_NCU_STATUS_REG , RULL(0x1301100F), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_NCU_STATUS_REG , RULL(0x1301140F), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_NCU_STATUS_REG , RULL(0x1401100F), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_NCU_STATUS_REG , RULL(0x1401140F), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_NCU_STATUS_REG , RULL(0x1501100F), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_NCU_STATUS_REG , RULL(0x1501140F), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( C_NET_CTRL0 , RULL(0x200F0040), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_NET_CTRL0_WAND , RULL(0x200F0041), SH_UNT_C , + SH_ACS_SCOM1_WAND ); +REG64( C_NET_CTRL0_WOR , RULL(0x200F0042), SH_UNT_C , SH_ACS_SCOM2_WOR ); +REG64( C_0_NET_CTRL0 , RULL(0x200F0040), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_NET_CTRL0_WAND , RULL(0x200F0041), SH_UNT_C_0 , + SH_ACS_SCOM1_WAND ); +REG64( C_0_NET_CTRL0_WOR , RULL(0x200F0042), SH_UNT_C_0 , SH_ACS_SCOM2_WOR ); +REG64( C_1_NET_CTRL0 , RULL(0x210F0040), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_NET_CTRL0_WAND , RULL(0x210F0041), SH_UNT_C_1 , + SH_ACS_SCOM1_WAND ); +REG64( C_1_NET_CTRL0_WOR , RULL(0x210F0042), SH_UNT_C_1 , SH_ACS_SCOM2_WOR ); +REG64( C_2_NET_CTRL0 , RULL(0x220F0040), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_NET_CTRL0_WAND , RULL(0x220F0041), SH_UNT_C_2 , + SH_ACS_SCOM1_WAND ); +REG64( C_2_NET_CTRL0_WOR , RULL(0x220F0042), SH_UNT_C_2 , SH_ACS_SCOM2_WOR ); +REG64( C_3_NET_CTRL0 , RULL(0x230F0040), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_NET_CTRL0_WAND , RULL(0x230F0041), SH_UNT_C_3 , + SH_ACS_SCOM1_WAND ); +REG64( C_3_NET_CTRL0_WOR , RULL(0x230F0042), SH_UNT_C_3 , SH_ACS_SCOM2_WOR ); +REG64( C_4_NET_CTRL0 , RULL(0x240F0040), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_NET_CTRL0_WAND , RULL(0x240F0041), SH_UNT_C_4 , + SH_ACS_SCOM1_WAND ); +REG64( C_4_NET_CTRL0_WOR , RULL(0x240F0042), SH_UNT_C_4 , SH_ACS_SCOM2_WOR ); +REG64( C_5_NET_CTRL0 , RULL(0x250F0040), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_NET_CTRL0_WAND , RULL(0x250F0041), SH_UNT_C_5 , + SH_ACS_SCOM1_WAND ); +REG64( C_5_NET_CTRL0_WOR , RULL(0x250F0042), SH_UNT_C_5 , SH_ACS_SCOM2_WOR ); +REG64( C_6_NET_CTRL0 , RULL(0x260F0040), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_NET_CTRL0_WAND , RULL(0x260F0041), SH_UNT_C_6 , + SH_ACS_SCOM1_WAND ); +REG64( C_6_NET_CTRL0_WOR , RULL(0x260F0042), SH_UNT_C_6 , SH_ACS_SCOM2_WOR ); +REG64( C_7_NET_CTRL0 , RULL(0x270F0040), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_NET_CTRL0_WAND , RULL(0x270F0041), SH_UNT_C_7 , + SH_ACS_SCOM1_WAND ); +REG64( C_7_NET_CTRL0_WOR , RULL(0x270F0042), SH_UNT_C_7 , SH_ACS_SCOM2_WOR ); +REG64( C_8_NET_CTRL0 , RULL(0x280F0040), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_NET_CTRL0_WAND , RULL(0x280F0041), SH_UNT_C_8 , + SH_ACS_SCOM1_WAND ); +REG64( C_8_NET_CTRL0_WOR , RULL(0x280F0042), SH_UNT_C_8 , SH_ACS_SCOM2_WOR ); +REG64( C_9_NET_CTRL0 , RULL(0x290F0040), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_NET_CTRL0_WAND , RULL(0x290F0041), SH_UNT_C_9 , + SH_ACS_SCOM1_WAND ); +REG64( C_9_NET_CTRL0_WOR , RULL(0x290F0042), SH_UNT_C_9 , SH_ACS_SCOM2_WOR ); +REG64( C_10_NET_CTRL0 , RULL(0x2A0F0040), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_NET_CTRL0_WAND , RULL(0x2A0F0041), SH_UNT_C_10 , + SH_ACS_SCOM1_WAND ); +REG64( C_10_NET_CTRL0_WOR , RULL(0x2A0F0042), SH_UNT_C_10 , SH_ACS_SCOM2_WOR ); +REG64( C_11_NET_CTRL0 , RULL(0x2B0F0040), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_NET_CTRL0_WAND , RULL(0x2B0F0041), SH_UNT_C_11 , + SH_ACS_SCOM1_WAND ); +REG64( C_11_NET_CTRL0_WOR , RULL(0x2B0F0042), SH_UNT_C_11 , SH_ACS_SCOM2_WOR ); +REG64( C_12_NET_CTRL0 , RULL(0x2C0F0040), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_NET_CTRL0_WAND , RULL(0x2C0F0041), SH_UNT_C_12 , + SH_ACS_SCOM1_WAND ); +REG64( C_12_NET_CTRL0_WOR , RULL(0x2C0F0042), SH_UNT_C_12 , SH_ACS_SCOM2_WOR ); +REG64( C_13_NET_CTRL0 , RULL(0x2D0F0040), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_NET_CTRL0_WAND , RULL(0x2D0F0041), SH_UNT_C_13 , + SH_ACS_SCOM1_WAND ); +REG64( C_13_NET_CTRL0_WOR , RULL(0x2D0F0042), SH_UNT_C_13 , SH_ACS_SCOM2_WOR ); +REG64( C_14_NET_CTRL0 , RULL(0x2E0F0040), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_NET_CTRL0_WAND , RULL(0x2E0F0041), SH_UNT_C_14 , + SH_ACS_SCOM1_WAND ); +REG64( C_14_NET_CTRL0_WOR , RULL(0x2E0F0042), SH_UNT_C_14 , SH_ACS_SCOM2_WOR ); +REG64( C_15_NET_CTRL0 , RULL(0x2F0F0040), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_NET_CTRL0_WAND , RULL(0x2F0F0041), SH_UNT_C_15 , + SH_ACS_SCOM1_WAND ); +REG64( C_15_NET_CTRL0_WOR , RULL(0x2F0F0042), SH_UNT_C_15 , SH_ACS_SCOM2_WOR ); +REG64( C_16_NET_CTRL0 , RULL(0x300F0040), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_NET_CTRL0_WAND , RULL(0x300F0041), SH_UNT_C_16 , + SH_ACS_SCOM1_WAND ); +REG64( C_16_NET_CTRL0_WOR , RULL(0x300F0042), SH_UNT_C_16 , SH_ACS_SCOM2_WOR ); +REG64( C_17_NET_CTRL0 , RULL(0x310F0040), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_NET_CTRL0_WAND , RULL(0x310F0041), SH_UNT_C_17 , + SH_ACS_SCOM1_WAND ); +REG64( C_17_NET_CTRL0_WOR , RULL(0x310F0042), SH_UNT_C_17 , SH_ACS_SCOM2_WOR ); +REG64( C_18_NET_CTRL0 , RULL(0x320F0040), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_NET_CTRL0_WAND , RULL(0x320F0041), SH_UNT_C_18 , + SH_ACS_SCOM1_WAND ); +REG64( C_18_NET_CTRL0_WOR , RULL(0x320F0042), SH_UNT_C_18 , SH_ACS_SCOM2_WOR ); +REG64( C_19_NET_CTRL0 , RULL(0x330F0040), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_NET_CTRL0_WAND , RULL(0x330F0041), SH_UNT_C_19 , + SH_ACS_SCOM1_WAND ); +REG64( C_19_NET_CTRL0_WOR , RULL(0x330F0042), SH_UNT_C_19 , SH_ACS_SCOM2_WOR ); +REG64( C_20_NET_CTRL0 , RULL(0x340F0040), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_NET_CTRL0_WAND , RULL(0x340F0041), SH_UNT_C_20 , + SH_ACS_SCOM1_WAND ); +REG64( C_20_NET_CTRL0_WOR , RULL(0x340F0042), SH_UNT_C_20 , SH_ACS_SCOM2_WOR ); +REG64( C_21_NET_CTRL0 , RULL(0x350F0040), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_NET_CTRL0_WAND , RULL(0x350F0041), SH_UNT_C_21 , + SH_ACS_SCOM1_WAND ); +REG64( C_21_NET_CTRL0_WOR , RULL(0x350F0042), SH_UNT_C_21 , SH_ACS_SCOM2_WOR ); +REG64( C_22_NET_CTRL0 , RULL(0x360F0040), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_NET_CTRL0_WAND , RULL(0x360F0041), SH_UNT_C_22 , + SH_ACS_SCOM1_WAND ); +REG64( C_22_NET_CTRL0_WOR , RULL(0x360F0042), SH_UNT_C_22 , SH_ACS_SCOM2_WOR ); +REG64( C_23_NET_CTRL0 , RULL(0x370F0040), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_NET_CTRL0_WAND , RULL(0x370F0041), SH_UNT_C_23 , + SH_ACS_SCOM1_WAND ); +REG64( C_23_NET_CTRL0_WOR , RULL(0x370F0042), SH_UNT_C_23 , SH_ACS_SCOM2_WOR ); +REG64( EQ_NET_CTRL0 , RULL(0x100F0040), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_NET_CTRL0_WAND , RULL(0x100F0041), SH_UNT_EQ , + SH_ACS_SCOM1_WAND ); +REG64( EQ_NET_CTRL0_WOR , RULL(0x100F0042), SH_UNT_EQ , SH_ACS_SCOM2_WOR ); +REG64( EQ_0_NET_CTRL0 , RULL(0x100F0040), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_0_NET_CTRL0_WAND , RULL(0x100F0041), SH_UNT_EQ_0 , + SH_ACS_SCOM1_WAND ); +REG64( EQ_0_NET_CTRL0_WOR , RULL(0x100F0042), SH_UNT_EQ_0 , SH_ACS_SCOM2_WOR ); +REG64( EQ_1_NET_CTRL0 , RULL(0x110F0040), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_1_NET_CTRL0_WAND , RULL(0x110F0041), SH_UNT_EQ_1 , + SH_ACS_SCOM1_WAND ); +REG64( EQ_1_NET_CTRL0_WOR , RULL(0x110F0042), SH_UNT_EQ_1 , SH_ACS_SCOM2_WOR ); +REG64( EQ_2_NET_CTRL0 , RULL(0x120F0040), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_2_NET_CTRL0_WAND , RULL(0x120F0041), SH_UNT_EQ_2 , + SH_ACS_SCOM1_WAND ); +REG64( EQ_2_NET_CTRL0_WOR , RULL(0x120F0042), SH_UNT_EQ_2 , SH_ACS_SCOM2_WOR ); +REG64( EQ_3_NET_CTRL0 , RULL(0x130F0040), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_3_NET_CTRL0_WAND , RULL(0x130F0041), SH_UNT_EQ_3 , + SH_ACS_SCOM1_WAND ); +REG64( EQ_3_NET_CTRL0_WOR , RULL(0x130F0042), SH_UNT_EQ_3 , SH_ACS_SCOM2_WOR ); +REG64( EQ_4_NET_CTRL0 , RULL(0x140F0040), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_4_NET_CTRL0_WAND , RULL(0x140F0041), SH_UNT_EQ_4 , + SH_ACS_SCOM1_WAND ); +REG64( EQ_4_NET_CTRL0_WOR , RULL(0x140F0042), SH_UNT_EQ_4 , SH_ACS_SCOM2_WOR ); +REG64( EQ_5_NET_CTRL0 , RULL(0x150F0040), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EQ_5_NET_CTRL0_WAND , RULL(0x150F0041), SH_UNT_EQ_5 , + SH_ACS_SCOM1_WAND ); +REG64( EQ_5_NET_CTRL0_WOR , RULL(0x150F0042), SH_UNT_EQ_5 , SH_ACS_SCOM2_WOR ); +REG64( EX_NET_CTRL0 , RULL(0x200F0040), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F0040, +REG64( EX_NET_CTRL0_WAND , RULL(0x200F0041), SH_UNT_EX , + SH_ACS_SCOM1_WAND ); //DUPS: 210F0041, +REG64( EX_NET_CTRL0_WOR , RULL(0x200F0042), SH_UNT_EX , + SH_ACS_SCOM2_WOR ); //DUPS: 210F0042, +REG64( EX_0_NET_CTRL0 , RULL(0x200F0040), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F0040, +REG64( EX_0_NET_CTRL0_WAND , RULL(0x200F0041), SH_UNT_EX_0 , + SH_ACS_SCOM1_WAND ); //DUPS: 210F0041, +REG64( EX_0_NET_CTRL0_WOR , RULL(0x200F0042), SH_UNT_EX_0 , + SH_ACS_SCOM2_WOR ); //DUPS: 210F0042, +REG64( EX_1_NET_CTRL0 , RULL(0x230F0040), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F0040, +REG64( EX_1_NET_CTRL0_WAND , RULL(0x230F0041), SH_UNT_EX_1 , + SH_ACS_SCOM1_WAND ); //DUPS: 220F0041, +REG64( EX_1_NET_CTRL0_WOR , RULL(0x230F0042), SH_UNT_EX_1 , + SH_ACS_SCOM2_WOR ); //DUPS: 220F0042, +REG64( EX_2_NET_CTRL0 , RULL(0x240F0040), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F0040, +REG64( EX_2_NET_CTRL0_WAND , RULL(0x240F0041), SH_UNT_EX_2 , + SH_ACS_SCOM1_WAND ); //DUPS: 250F0041, +REG64( EX_2_NET_CTRL0_WOR , RULL(0x240F0042), SH_UNT_EX_2 , + SH_ACS_SCOM2_WOR ); //DUPS: 250F0042, +REG64( EX_3_NET_CTRL0 , RULL(0x260F0040), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F0040, +REG64( EX_3_NET_CTRL0_WAND , RULL(0x260F0041), SH_UNT_EX_3 , + SH_ACS_SCOM1_WAND ); //DUPS: 270F0041, +REG64( EX_3_NET_CTRL0_WOR , RULL(0x260F0042), SH_UNT_EX_3 , + SH_ACS_SCOM2_WOR ); //DUPS: 270F0042, +REG64( EX_4_NET_CTRL0 , RULL(0x280F0040), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F0040, +REG64( EX_4_NET_CTRL0_WAND , RULL(0x280F0041), SH_UNT_EX_4 , + SH_ACS_SCOM1_WAND ); //DUPS: 290F0041, +REG64( EX_4_NET_CTRL0_WOR , RULL(0x280F0042), SH_UNT_EX_4 , + SH_ACS_SCOM2_WOR ); //DUPS: 290F0042, +REG64( EX_5_NET_CTRL0 , RULL(0x2A0F0040), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F0040, +REG64( EX_5_NET_CTRL0_WAND , RULL(0x2A0F0041), SH_UNT_EX_5 , + SH_ACS_SCOM1_WAND ); //DUPS: 2B0F0041, +REG64( EX_5_NET_CTRL0_WOR , RULL(0x2A0F0042), SH_UNT_EX_5 , + SH_ACS_SCOM2_WOR ); //DUPS: 2B0F0042, +REG64( EX_6_NET_CTRL0 , RULL(0x2C0F0040), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F0040, +REG64( EX_6_NET_CTRL0_WAND , RULL(0x2C0F0041), SH_UNT_EX_6 , + SH_ACS_SCOM1_WAND ); //DUPS: 2D0F0041, +REG64( EX_6_NET_CTRL0_WOR , RULL(0x2C0F0042), SH_UNT_EX_6 , + SH_ACS_SCOM2_WOR ); //DUPS: 2D0F0042, +REG64( EX_7_NET_CTRL0 , RULL(0x2E0F0040), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F0040, +REG64( EX_7_NET_CTRL0_WAND , RULL(0x2E0F0041), SH_UNT_EX_7 , + SH_ACS_SCOM1_WAND ); //DUPS: 2F0F0041, +REG64( EX_7_NET_CTRL0_WOR , RULL(0x2E0F0042), SH_UNT_EX_7 , + SH_ACS_SCOM2_WOR ); //DUPS: 2F0F0042, +REG64( EX_8_NET_CTRL0 , RULL(0x300F0040), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F0040, +REG64( EX_8_NET_CTRL0_WAND , RULL(0x300F0041), SH_UNT_EX_8 , + SH_ACS_SCOM1_WAND ); //DUPS: 310F0041, +REG64( EX_8_NET_CTRL0_WOR , RULL(0x300F0042), SH_UNT_EX_8 , + SH_ACS_SCOM2_WOR ); //DUPS: 310F0042, +REG64( EX_9_NET_CTRL0 , RULL(0x320F0040), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F0040, +REG64( EX_9_NET_CTRL0_WAND , RULL(0x320F0041), SH_UNT_EX_9 , + SH_ACS_SCOM1_WAND ); //DUPS: 330F0041, +REG64( EX_9_NET_CTRL0_WOR , RULL(0x320F0042), SH_UNT_EX_9 , + SH_ACS_SCOM2_WOR ); //DUPS: 330F0042, +REG64( EX_10_NET_CTRL0 , RULL(0x340F0040), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F0040, +REG64( EX_10_NET_CTRL0_WAND , RULL(0x340F0041), SH_UNT_EX_10 , + SH_ACS_SCOM1_WAND ); //DUPS: 350F0041, +REG64( EX_10_NET_CTRL0_WOR , RULL(0x340F0042), SH_UNT_EX_10 , + SH_ACS_SCOM2_WOR ); //DUPS: 350F0042, +REG64( EX_11_NET_CTRL0 , RULL(0x360F0040), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F0040, +REG64( EX_11_NET_CTRL0_WAND , RULL(0x360F0041), SH_UNT_EX_11 , + SH_ACS_SCOM1_WAND ); //DUPS: 370F0041, +REG64( EX_11_NET_CTRL0_WOR , RULL(0x360F0042), SH_UNT_EX_11 , + SH_ACS_SCOM2_WOR ); //DUPS: 370F0042, + +REG64( C_NET_CTRL1 , RULL(0x200F0044), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_NET_CTRL1_WAND , RULL(0x200F0045), SH_UNT_C , + SH_ACS_SCOM1_WAND ); +REG64( C_NET_CTRL1_WOR , RULL(0x200F0046), SH_UNT_C , SH_ACS_SCOM2_WOR ); +REG64( C_0_NET_CTRL1 , RULL(0x200F0044), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_NET_CTRL1_WAND , RULL(0x200F0045), SH_UNT_C_0 , + SH_ACS_SCOM1_WAND ); +REG64( C_0_NET_CTRL1_WOR , RULL(0x200F0046), SH_UNT_C_0 , SH_ACS_SCOM2_WOR ); +REG64( C_1_NET_CTRL1 , RULL(0x210F0044), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_NET_CTRL1_WAND , RULL(0x210F0045), SH_UNT_C_1 , + SH_ACS_SCOM1_WAND ); +REG64( C_1_NET_CTRL1_WOR , RULL(0x210F0046), SH_UNT_C_1 , SH_ACS_SCOM2_WOR ); +REG64( C_2_NET_CTRL1 , RULL(0x220F0044), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_NET_CTRL1_WAND , RULL(0x220F0045), SH_UNT_C_2 , + SH_ACS_SCOM1_WAND ); +REG64( C_2_NET_CTRL1_WOR , RULL(0x220F0046), SH_UNT_C_2 , SH_ACS_SCOM2_WOR ); +REG64( C_3_NET_CTRL1 , RULL(0x230F0044), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_NET_CTRL1_WAND , RULL(0x230F0045), SH_UNT_C_3 , + SH_ACS_SCOM1_WAND ); +REG64( C_3_NET_CTRL1_WOR , RULL(0x230F0046), SH_UNT_C_3 , SH_ACS_SCOM2_WOR ); +REG64( C_4_NET_CTRL1 , RULL(0x240F0044), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_NET_CTRL1_WAND , RULL(0x240F0045), SH_UNT_C_4 , + SH_ACS_SCOM1_WAND ); +REG64( C_4_NET_CTRL1_WOR , RULL(0x240F0046), SH_UNT_C_4 , SH_ACS_SCOM2_WOR ); +REG64( C_5_NET_CTRL1 , RULL(0x250F0044), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_NET_CTRL1_WAND , RULL(0x250F0045), SH_UNT_C_5 , + SH_ACS_SCOM1_WAND ); +REG64( C_5_NET_CTRL1_WOR , RULL(0x250F0046), SH_UNT_C_5 , SH_ACS_SCOM2_WOR ); +REG64( C_6_NET_CTRL1 , RULL(0x260F0044), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_NET_CTRL1_WAND , RULL(0x260F0045), SH_UNT_C_6 , + SH_ACS_SCOM1_WAND ); +REG64( C_6_NET_CTRL1_WOR , RULL(0x260F0046), SH_UNT_C_6 , SH_ACS_SCOM2_WOR ); +REG64( C_7_NET_CTRL1 , RULL(0x270F0044), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_NET_CTRL1_WAND , RULL(0x270F0045), SH_UNT_C_7 , + SH_ACS_SCOM1_WAND ); +REG64( C_7_NET_CTRL1_WOR , RULL(0x270F0046), SH_UNT_C_7 , SH_ACS_SCOM2_WOR ); +REG64( C_8_NET_CTRL1 , RULL(0x280F0044), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_NET_CTRL1_WAND , RULL(0x280F0045), SH_UNT_C_8 , + SH_ACS_SCOM1_WAND ); +REG64( C_8_NET_CTRL1_WOR , RULL(0x280F0046), SH_UNT_C_8 , SH_ACS_SCOM2_WOR ); +REG64( C_9_NET_CTRL1 , RULL(0x290F0044), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_NET_CTRL1_WAND , RULL(0x290F0045), SH_UNT_C_9 , + SH_ACS_SCOM1_WAND ); +REG64( C_9_NET_CTRL1_WOR , RULL(0x290F0046), SH_UNT_C_9 , SH_ACS_SCOM2_WOR ); +REG64( C_10_NET_CTRL1 , RULL(0x2A0F0044), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_NET_CTRL1_WAND , RULL(0x2A0F0045), SH_UNT_C_10 , + SH_ACS_SCOM1_WAND ); +REG64( C_10_NET_CTRL1_WOR , RULL(0x2A0F0046), SH_UNT_C_10 , SH_ACS_SCOM2_WOR ); +REG64( C_11_NET_CTRL1 , RULL(0x2B0F0044), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_NET_CTRL1_WAND , RULL(0x2B0F0045), SH_UNT_C_11 , + SH_ACS_SCOM1_WAND ); +REG64( C_11_NET_CTRL1_WOR , RULL(0x2B0F0046), SH_UNT_C_11 , SH_ACS_SCOM2_WOR ); +REG64( C_12_NET_CTRL1 , RULL(0x2C0F0044), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_NET_CTRL1_WAND , RULL(0x2C0F0045), SH_UNT_C_12 , + SH_ACS_SCOM1_WAND ); +REG64( C_12_NET_CTRL1_WOR , RULL(0x2C0F0046), SH_UNT_C_12 , SH_ACS_SCOM2_WOR ); +REG64( C_13_NET_CTRL1 , RULL(0x2D0F0044), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_NET_CTRL1_WAND , RULL(0x2D0F0045), SH_UNT_C_13 , + SH_ACS_SCOM1_WAND ); +REG64( C_13_NET_CTRL1_WOR , RULL(0x2D0F0046), SH_UNT_C_13 , SH_ACS_SCOM2_WOR ); +REG64( C_14_NET_CTRL1 , RULL(0x2E0F0044), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_NET_CTRL1_WAND , RULL(0x2E0F0045), SH_UNT_C_14 , + SH_ACS_SCOM1_WAND ); +REG64( C_14_NET_CTRL1_WOR , RULL(0x2E0F0046), SH_UNT_C_14 , SH_ACS_SCOM2_WOR ); +REG64( C_15_NET_CTRL1 , RULL(0x2F0F0044), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_NET_CTRL1_WAND , RULL(0x2F0F0045), SH_UNT_C_15 , + SH_ACS_SCOM1_WAND ); +REG64( C_15_NET_CTRL1_WOR , RULL(0x2F0F0046), SH_UNT_C_15 , SH_ACS_SCOM2_WOR ); +REG64( C_16_NET_CTRL1 , RULL(0x300F0044), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_NET_CTRL1_WAND , RULL(0x300F0045), SH_UNT_C_16 , + SH_ACS_SCOM1_WAND ); +REG64( C_16_NET_CTRL1_WOR , RULL(0x300F0046), SH_UNT_C_16 , SH_ACS_SCOM2_WOR ); +REG64( C_17_NET_CTRL1 , RULL(0x310F0044), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_NET_CTRL1_WAND , RULL(0x310F0045), SH_UNT_C_17 , + SH_ACS_SCOM1_WAND ); +REG64( C_17_NET_CTRL1_WOR , RULL(0x310F0046), SH_UNT_C_17 , SH_ACS_SCOM2_WOR ); +REG64( C_18_NET_CTRL1 , RULL(0x320F0044), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_NET_CTRL1_WAND , RULL(0x320F0045), SH_UNT_C_18 , + SH_ACS_SCOM1_WAND ); +REG64( C_18_NET_CTRL1_WOR , RULL(0x320F0046), SH_UNT_C_18 , SH_ACS_SCOM2_WOR ); +REG64( C_19_NET_CTRL1 , RULL(0x330F0044), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_NET_CTRL1_WAND , RULL(0x330F0045), SH_UNT_C_19 , + SH_ACS_SCOM1_WAND ); +REG64( C_19_NET_CTRL1_WOR , RULL(0x330F0046), SH_UNT_C_19 , SH_ACS_SCOM2_WOR ); +REG64( C_20_NET_CTRL1 , RULL(0x340F0044), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_NET_CTRL1_WAND , RULL(0x340F0045), SH_UNT_C_20 , + SH_ACS_SCOM1_WAND ); +REG64( C_20_NET_CTRL1_WOR , RULL(0x340F0046), SH_UNT_C_20 , SH_ACS_SCOM2_WOR ); +REG64( C_21_NET_CTRL1 , RULL(0x350F0044), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_NET_CTRL1_WAND , RULL(0x350F0045), SH_UNT_C_21 , + SH_ACS_SCOM1_WAND ); +REG64( C_21_NET_CTRL1_WOR , RULL(0x350F0046), SH_UNT_C_21 , SH_ACS_SCOM2_WOR ); +REG64( C_22_NET_CTRL1 , RULL(0x360F0044), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_NET_CTRL1_WAND , RULL(0x360F0045), SH_UNT_C_22 , + SH_ACS_SCOM1_WAND ); +REG64( C_22_NET_CTRL1_WOR , RULL(0x360F0046), SH_UNT_C_22 , SH_ACS_SCOM2_WOR ); +REG64( C_23_NET_CTRL1 , RULL(0x370F0044), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_NET_CTRL1_WAND , RULL(0x370F0045), SH_UNT_C_23 , + SH_ACS_SCOM1_WAND ); +REG64( C_23_NET_CTRL1_WOR , RULL(0x370F0046), SH_UNT_C_23 , SH_ACS_SCOM2_WOR ); +REG64( EQ_NET_CTRL1 , RULL(0x100F0044), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_NET_CTRL1_WAND , RULL(0x100F0045), SH_UNT_EQ , + SH_ACS_SCOM1_WAND ); +REG64( EQ_NET_CTRL1_WOR , RULL(0x100F0046), SH_UNT_EQ , SH_ACS_SCOM2_WOR ); +REG64( EQ_0_NET_CTRL1 , RULL(0x100F0044), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_0_NET_CTRL1_WAND , RULL(0x100F0045), SH_UNT_EQ_0 , + SH_ACS_SCOM1_WAND ); +REG64( EQ_0_NET_CTRL1_WOR , RULL(0x100F0046), SH_UNT_EQ_0 , SH_ACS_SCOM2_WOR ); +REG64( EQ_1_NET_CTRL1 , RULL(0x110F0044), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_1_NET_CTRL1_WAND , RULL(0x110F0045), SH_UNT_EQ_1 , + SH_ACS_SCOM1_WAND ); +REG64( EQ_1_NET_CTRL1_WOR , RULL(0x110F0046), SH_UNT_EQ_1 , SH_ACS_SCOM2_WOR ); +REG64( EQ_2_NET_CTRL1 , RULL(0x120F0044), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_2_NET_CTRL1_WAND , RULL(0x120F0045), SH_UNT_EQ_2 , + SH_ACS_SCOM1_WAND ); +REG64( EQ_2_NET_CTRL1_WOR , RULL(0x120F0046), SH_UNT_EQ_2 , SH_ACS_SCOM2_WOR ); +REG64( EQ_3_NET_CTRL1 , RULL(0x130F0044), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_3_NET_CTRL1_WAND , RULL(0x130F0045), SH_UNT_EQ_3 , + SH_ACS_SCOM1_WAND ); +REG64( EQ_3_NET_CTRL1_WOR , RULL(0x130F0046), SH_UNT_EQ_3 , SH_ACS_SCOM2_WOR ); +REG64( EQ_4_NET_CTRL1 , RULL(0x140F0044), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_4_NET_CTRL1_WAND , RULL(0x140F0045), SH_UNT_EQ_4 , + SH_ACS_SCOM1_WAND ); +REG64( EQ_4_NET_CTRL1_WOR , RULL(0x140F0046), SH_UNT_EQ_4 , SH_ACS_SCOM2_WOR ); +REG64( EQ_5_NET_CTRL1 , RULL(0x150F0044), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EQ_5_NET_CTRL1_WAND , RULL(0x150F0045), SH_UNT_EQ_5 , + SH_ACS_SCOM1_WAND ); +REG64( EQ_5_NET_CTRL1_WOR , RULL(0x150F0046), SH_UNT_EQ_5 , SH_ACS_SCOM2_WOR ); +REG64( EX_NET_CTRL1 , RULL(0x200F0044), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F0044, +REG64( EX_NET_CTRL1_WAND , RULL(0x200F0045), SH_UNT_EX , + SH_ACS_SCOM1_WAND ); //DUPS: 210F0045, +REG64( EX_NET_CTRL1_WOR , RULL(0x200F0046), SH_UNT_EX , + SH_ACS_SCOM2_WOR ); //DUPS: 210F0046, +REG64( EX_0_NET_CTRL1 , RULL(0x200F0044), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F0044, +REG64( EX_0_NET_CTRL1_WAND , RULL(0x200F0045), SH_UNT_EX_0 , + SH_ACS_SCOM1_WAND ); //DUPS: 210F0045, +REG64( EX_0_NET_CTRL1_WOR , RULL(0x200F0046), SH_UNT_EX_0 , + SH_ACS_SCOM2_WOR ); //DUPS: 210F0046, +REG64( EX_1_NET_CTRL1 , RULL(0x230F0044), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F0044, +REG64( EX_1_NET_CTRL1_WAND , RULL(0x230F0045), SH_UNT_EX_1 , + SH_ACS_SCOM1_WAND ); //DUPS: 220F0045, +REG64( EX_1_NET_CTRL1_WOR , RULL(0x230F0046), SH_UNT_EX_1 , + SH_ACS_SCOM2_WOR ); //DUPS: 220F0046, +REG64( EX_2_NET_CTRL1 , RULL(0x240F0044), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F0044, +REG64( EX_2_NET_CTRL1_WAND , RULL(0x240F0045), SH_UNT_EX_2 , + SH_ACS_SCOM1_WAND ); //DUPS: 250F0045, +REG64( EX_2_NET_CTRL1_WOR , RULL(0x240F0046), SH_UNT_EX_2 , + SH_ACS_SCOM2_WOR ); //DUPS: 250F0046, +REG64( EX_3_NET_CTRL1 , RULL(0x260F0044), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F0044, +REG64( EX_3_NET_CTRL1_WAND , RULL(0x260F0045), SH_UNT_EX_3 , + SH_ACS_SCOM1_WAND ); //DUPS: 270F0045, +REG64( EX_3_NET_CTRL1_WOR , RULL(0x260F0046), SH_UNT_EX_3 , + SH_ACS_SCOM2_WOR ); //DUPS: 270F0046, +REG64( EX_4_NET_CTRL1 , RULL(0x280F0044), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F0044, +REG64( EX_4_NET_CTRL1_WAND , RULL(0x280F0045), SH_UNT_EX_4 , + SH_ACS_SCOM1_WAND ); //DUPS: 290F0045, +REG64( EX_4_NET_CTRL1_WOR , RULL(0x280F0046), SH_UNT_EX_4 , + SH_ACS_SCOM2_WOR ); //DUPS: 290F0046, +REG64( EX_5_NET_CTRL1 , RULL(0x2A0F0044), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F0044, +REG64( EX_5_NET_CTRL1_WAND , RULL(0x2A0F0045), SH_UNT_EX_5 , + SH_ACS_SCOM1_WAND ); //DUPS: 2B0F0045, +REG64( EX_5_NET_CTRL1_WOR , RULL(0x2A0F0046), SH_UNT_EX_5 , + SH_ACS_SCOM2_WOR ); //DUPS: 2B0F0046, +REG64( EX_6_NET_CTRL1 , RULL(0x2C0F0044), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F0044, +REG64( EX_6_NET_CTRL1_WAND , RULL(0x2C0F0045), SH_UNT_EX_6 , + SH_ACS_SCOM1_WAND ); //DUPS: 2D0F0045, +REG64( EX_6_NET_CTRL1_WOR , RULL(0x2C0F0046), SH_UNT_EX_6 , + SH_ACS_SCOM2_WOR ); //DUPS: 2D0F0046, +REG64( EX_7_NET_CTRL1 , RULL(0x2E0F0044), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F0044, +REG64( EX_7_NET_CTRL1_WAND , RULL(0x2E0F0045), SH_UNT_EX_7 , + SH_ACS_SCOM1_WAND ); //DUPS: 2F0F0045, +REG64( EX_7_NET_CTRL1_WOR , RULL(0x2E0F0046), SH_UNT_EX_7 , + SH_ACS_SCOM2_WOR ); //DUPS: 2F0F0046, +REG64( EX_8_NET_CTRL1 , RULL(0x300F0044), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F0044, +REG64( EX_8_NET_CTRL1_WAND , RULL(0x300F0045), SH_UNT_EX_8 , + SH_ACS_SCOM1_WAND ); //DUPS: 310F0045, +REG64( EX_8_NET_CTRL1_WOR , RULL(0x300F0046), SH_UNT_EX_8 , + SH_ACS_SCOM2_WOR ); //DUPS: 310F0046, +REG64( EX_9_NET_CTRL1 , RULL(0x320F0044), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F0044, +REG64( EX_9_NET_CTRL1_WAND , RULL(0x320F0045), SH_UNT_EX_9 , + SH_ACS_SCOM1_WAND ); //DUPS: 330F0045, +REG64( EX_9_NET_CTRL1_WOR , RULL(0x320F0046), SH_UNT_EX_9 , + SH_ACS_SCOM2_WOR ); //DUPS: 330F0046, +REG64( EX_10_NET_CTRL1 , RULL(0x340F0044), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F0044, +REG64( EX_10_NET_CTRL1_WAND , RULL(0x340F0045), SH_UNT_EX_10 , + SH_ACS_SCOM1_WAND ); //DUPS: 350F0045, +REG64( EX_10_NET_CTRL1_WOR , RULL(0x340F0046), SH_UNT_EX_10 , + SH_ACS_SCOM2_WOR ); //DUPS: 350F0046, +REG64( EX_11_NET_CTRL1 , RULL(0x360F0044), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F0044, +REG64( EX_11_NET_CTRL1_WAND , RULL(0x360F0045), SH_UNT_EX_11 , + SH_ACS_SCOM1_WAND ); //DUPS: 370F0045, +REG64( EX_11_NET_CTRL1_WOR , RULL(0x360F0046), SH_UNT_EX_11 , + SH_ACS_SCOM2_WOR ); //DUPS: 370F0046, + +REG64( C_OCC_SCOMC , RULL(0x20010A82), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_OCC_SCOMC , RULL(0x20010A82), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_OCC_SCOMC , RULL(0x21010A82), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_OCC_SCOMC , RULL(0x22010A82), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_OCC_SCOMC , RULL(0x23010A82), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_OCC_SCOMC , RULL(0x24010A82), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_OCC_SCOMC , RULL(0x25010A82), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_OCC_SCOMC , RULL(0x26010A82), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_OCC_SCOMC , RULL(0x27010A82), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_OCC_SCOMC , RULL(0x28010A82), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_OCC_SCOMC , RULL(0x29010A82), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_OCC_SCOMC , RULL(0x2A010A82), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_OCC_SCOMC , RULL(0x2B010A82), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_OCC_SCOMC , RULL(0x2C010A82), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_OCC_SCOMC , RULL(0x2D010A82), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_OCC_SCOMC , RULL(0x2E010A82), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_OCC_SCOMC , RULL(0x2F010A82), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_OCC_SCOMC , RULL(0x30010A82), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_OCC_SCOMC , RULL(0x31010A82), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_OCC_SCOMC , RULL(0x32010A82), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_OCC_SCOMC , RULL(0x33010A82), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_OCC_SCOMC , RULL(0x34010A82), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_OCC_SCOMC , RULL(0x35010A82), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_OCC_SCOMC , RULL(0x36010A82), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_OCC_SCOMC , RULL(0x37010A82), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_OCC_SCOMC , RULL(0x21010A82), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RW ); //DUPS: 20010A82, +REG64( EX_10_L2_OCC_SCOMC , RULL(0x35010A82), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RW ); //DUPS: 34010A82, +REG64( EX_11_L2_OCC_SCOMC , RULL(0x37010A82), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RW ); //DUPS: 36010A82, +REG64( EX_1_L2_OCC_SCOMC , RULL(0x23010A82), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RW ); //DUPS: 22010A82, +REG64( EX_2_L2_OCC_SCOMC , RULL(0x25010A82), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RW ); //DUPS: 24010A82, +REG64( EX_3_L2_OCC_SCOMC , RULL(0x27010A82), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RW ); //DUPS: 26010A82, +REG64( EX_4_L2_OCC_SCOMC , RULL(0x29010A82), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RW ); //DUPS: 28010A82, +REG64( EX_5_L2_OCC_SCOMC , RULL(0x2B010A82), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2A010A82, +REG64( EX_6_L2_OCC_SCOMC , RULL(0x2D010A82), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2C010A82, +REG64( EX_7_L2_OCC_SCOMC , RULL(0x2F010A82), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2E010A82, +REG64( EX_8_L2_OCC_SCOMC , RULL(0x31010A82), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RW ); //DUPS: 30010A82, +REG64( EX_9_L2_OCC_SCOMC , RULL(0x33010A82), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RW ); //DUPS: 32010A82, +REG64( EX_L2_OCC_SCOMC , RULL(0x21010A82), SH_UNT_EX_L2 , + SH_ACS_SCOM_RW ); //DUPS: 20010A82, + +REG64( C_OPCG_ALIGN , RULL(0x20030001), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_OPCG_ALIGN , RULL(0x20030001), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_OPCG_ALIGN , RULL(0x21030001), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_OPCG_ALIGN , RULL(0x22030001), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_OPCG_ALIGN , RULL(0x23030001), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_OPCG_ALIGN , RULL(0x24030001), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_OPCG_ALIGN , RULL(0x25030001), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_OPCG_ALIGN , RULL(0x26030001), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_OPCG_ALIGN , RULL(0x27030001), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_OPCG_ALIGN , RULL(0x28030001), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_OPCG_ALIGN , RULL(0x29030001), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_OPCG_ALIGN , RULL(0x2A030001), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_OPCG_ALIGN , RULL(0x2B030001), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_OPCG_ALIGN , RULL(0x2C030001), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_OPCG_ALIGN , RULL(0x2D030001), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_OPCG_ALIGN , RULL(0x2E030001), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_OPCG_ALIGN , RULL(0x2F030001), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_OPCG_ALIGN , RULL(0x30030001), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_OPCG_ALIGN , RULL(0x31030001), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_OPCG_ALIGN , RULL(0x32030001), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_OPCG_ALIGN , RULL(0x33030001), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_OPCG_ALIGN , RULL(0x34030001), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_OPCG_ALIGN , RULL(0x35030001), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_OPCG_ALIGN , RULL(0x36030001), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_OPCG_ALIGN , RULL(0x37030001), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_OPCG_ALIGN , RULL(0x10030001), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_OPCG_ALIGN , RULL(0x10030001), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_OPCG_ALIGN , RULL(0x11030001), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_OPCG_ALIGN , RULL(0x12030001), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_OPCG_ALIGN , RULL(0x13030001), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_OPCG_ALIGN , RULL(0x14030001), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_OPCG_ALIGN , RULL(0x15030001), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_OPCG_ALIGN , RULL(0x20030001), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21030001, +REG64( EX_0_OPCG_ALIGN , RULL(0x20030001), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21030001, +REG64( EX_1_OPCG_ALIGN , RULL(0x22030001), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23030001, +REG64( EX_2_OPCG_ALIGN , RULL(0x24030001), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25030001, +REG64( EX_3_OPCG_ALIGN , RULL(0x26030001), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27030001, +REG64( EX_4_OPCG_ALIGN , RULL(0x28030001), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29030001, +REG64( EX_5_OPCG_ALIGN , RULL(0x2A030001), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B030001, +REG64( EX_6_OPCG_ALIGN , RULL(0x2C030001), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D030001, +REG64( EX_7_OPCG_ALIGN , RULL(0x2E030001), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F030001, +REG64( EX_8_OPCG_ALIGN , RULL(0x30030001), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31030001, +REG64( EX_9_OPCG_ALIGN , RULL(0x32030001), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33030001, +REG64( EX_10_OPCG_ALIGN , RULL(0x34030001), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35030001, +REG64( EX_11_OPCG_ALIGN , RULL(0x36030001), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37030001, + +REG64( C_OPCG_CAPT1 , RULL(0x20030010), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_OPCG_CAPT1 , RULL(0x20030010), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_OPCG_CAPT1 , RULL(0x21030010), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_OPCG_CAPT1 , RULL(0x22030010), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_OPCG_CAPT1 , RULL(0x23030010), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_OPCG_CAPT1 , RULL(0x24030010), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_OPCG_CAPT1 , RULL(0x25030010), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_OPCG_CAPT1 , RULL(0x26030010), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_OPCG_CAPT1 , RULL(0x27030010), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_OPCG_CAPT1 , RULL(0x28030010), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_OPCG_CAPT1 , RULL(0x29030010), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_OPCG_CAPT1 , RULL(0x2A030010), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_OPCG_CAPT1 , RULL(0x2B030010), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_OPCG_CAPT1 , RULL(0x2C030010), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_OPCG_CAPT1 , RULL(0x2D030010), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_OPCG_CAPT1 , RULL(0x2E030010), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_OPCG_CAPT1 , RULL(0x2F030010), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_OPCG_CAPT1 , RULL(0x30030010), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_OPCG_CAPT1 , RULL(0x31030010), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_OPCG_CAPT1 , RULL(0x32030010), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_OPCG_CAPT1 , RULL(0x33030010), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_OPCG_CAPT1 , RULL(0x34030010), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_OPCG_CAPT1 , RULL(0x35030010), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_OPCG_CAPT1 , RULL(0x36030010), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_OPCG_CAPT1 , RULL(0x37030010), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_OPCG_CAPT1 , RULL(0x10030010), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_OPCG_CAPT1 , RULL(0x10030010), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_OPCG_CAPT1 , RULL(0x11030010), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_OPCG_CAPT1 , RULL(0x12030010), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_OPCG_CAPT1 , RULL(0x13030010), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_OPCG_CAPT1 , RULL(0x14030010), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_OPCG_CAPT1 , RULL(0x15030010), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_OPCG_CAPT1 , RULL(0x20030010), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21030010, +REG64( EX_0_OPCG_CAPT1 , RULL(0x20030010), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21030010, +REG64( EX_1_OPCG_CAPT1 , RULL(0x22030010), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23030010, +REG64( EX_2_OPCG_CAPT1 , RULL(0x24030010), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25030010, +REG64( EX_3_OPCG_CAPT1 , RULL(0x26030010), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27030010, +REG64( EX_4_OPCG_CAPT1 , RULL(0x28030010), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29030010, +REG64( EX_5_OPCG_CAPT1 , RULL(0x2A030010), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B030010, +REG64( EX_6_OPCG_CAPT1 , RULL(0x2C030010), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D030010, +REG64( EX_7_OPCG_CAPT1 , RULL(0x2E030010), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F030010, +REG64( EX_8_OPCG_CAPT1 , RULL(0x30030010), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31030010, +REG64( EX_9_OPCG_CAPT1 , RULL(0x32030010), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33030010, +REG64( EX_10_OPCG_CAPT1 , RULL(0x34030010), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35030010, +REG64( EX_11_OPCG_CAPT1 , RULL(0x36030010), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37030010, + +REG64( C_OPCG_CAPT2 , RULL(0x20030011), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_OPCG_CAPT2 , RULL(0x20030011), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_OPCG_CAPT2 , RULL(0x21030011), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_OPCG_CAPT2 , RULL(0x22030011), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_OPCG_CAPT2 , RULL(0x23030011), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_OPCG_CAPT2 , RULL(0x24030011), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_OPCG_CAPT2 , RULL(0x25030011), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_OPCG_CAPT2 , RULL(0x26030011), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_OPCG_CAPT2 , RULL(0x27030011), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_OPCG_CAPT2 , RULL(0x28030011), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_OPCG_CAPT2 , RULL(0x29030011), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_OPCG_CAPT2 , RULL(0x2A030011), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_OPCG_CAPT2 , RULL(0x2B030011), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_OPCG_CAPT2 , RULL(0x2C030011), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_OPCG_CAPT2 , RULL(0x2D030011), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_OPCG_CAPT2 , RULL(0x2E030011), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_OPCG_CAPT2 , RULL(0x2F030011), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_OPCG_CAPT2 , RULL(0x30030011), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_OPCG_CAPT2 , RULL(0x31030011), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_OPCG_CAPT2 , RULL(0x32030011), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_OPCG_CAPT2 , RULL(0x33030011), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_OPCG_CAPT2 , RULL(0x34030011), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_OPCG_CAPT2 , RULL(0x35030011), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_OPCG_CAPT2 , RULL(0x36030011), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_OPCG_CAPT2 , RULL(0x37030011), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_OPCG_CAPT2 , RULL(0x10030011), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_OPCG_CAPT2 , RULL(0x10030011), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_OPCG_CAPT2 , RULL(0x11030011), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_OPCG_CAPT2 , RULL(0x12030011), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_OPCG_CAPT2 , RULL(0x13030011), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_OPCG_CAPT2 , RULL(0x14030011), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_OPCG_CAPT2 , RULL(0x15030011), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_OPCG_CAPT2 , RULL(0x20030011), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21030011, +REG64( EX_0_OPCG_CAPT2 , RULL(0x20030011), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21030011, +REG64( EX_1_OPCG_CAPT2 , RULL(0x22030011), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23030011, +REG64( EX_2_OPCG_CAPT2 , RULL(0x24030011), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25030011, +REG64( EX_3_OPCG_CAPT2 , RULL(0x26030011), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27030011, +REG64( EX_4_OPCG_CAPT2 , RULL(0x28030011), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29030011, +REG64( EX_5_OPCG_CAPT2 , RULL(0x2A030011), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B030011, +REG64( EX_6_OPCG_CAPT2 , RULL(0x2C030011), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D030011, +REG64( EX_7_OPCG_CAPT2 , RULL(0x2E030011), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F030011, +REG64( EX_8_OPCG_CAPT2 , RULL(0x30030011), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31030011, +REG64( EX_9_OPCG_CAPT2 , RULL(0x32030011), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33030011, +REG64( EX_10_OPCG_CAPT2 , RULL(0x34030011), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35030011, +REG64( EX_11_OPCG_CAPT2 , RULL(0x36030011), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37030011, + +REG64( C_OPCG_CAPT3 , RULL(0x20030012), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_OPCG_CAPT3 , RULL(0x20030012), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_OPCG_CAPT3 , RULL(0x21030012), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_OPCG_CAPT3 , RULL(0x22030012), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_OPCG_CAPT3 , RULL(0x23030012), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_OPCG_CAPT3 , RULL(0x24030012), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_OPCG_CAPT3 , RULL(0x25030012), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_OPCG_CAPT3 , RULL(0x26030012), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_OPCG_CAPT3 , RULL(0x27030012), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_OPCG_CAPT3 , RULL(0x28030012), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_OPCG_CAPT3 , RULL(0x29030012), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_OPCG_CAPT3 , RULL(0x2A030012), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_OPCG_CAPT3 , RULL(0x2B030012), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_OPCG_CAPT3 , RULL(0x2C030012), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_OPCG_CAPT3 , RULL(0x2D030012), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_OPCG_CAPT3 , RULL(0x2E030012), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_OPCG_CAPT3 , RULL(0x2F030012), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_OPCG_CAPT3 , RULL(0x30030012), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_OPCG_CAPT3 , RULL(0x31030012), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_OPCG_CAPT3 , RULL(0x32030012), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_OPCG_CAPT3 , RULL(0x33030012), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_OPCG_CAPT3 , RULL(0x34030012), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_OPCG_CAPT3 , RULL(0x35030012), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_OPCG_CAPT3 , RULL(0x36030012), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_OPCG_CAPT3 , RULL(0x37030012), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_OPCG_CAPT3 , RULL(0x10030012), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_OPCG_CAPT3 , RULL(0x10030012), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_OPCG_CAPT3 , RULL(0x11030012), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_OPCG_CAPT3 , RULL(0x12030012), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_OPCG_CAPT3 , RULL(0x13030012), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_OPCG_CAPT3 , RULL(0x14030012), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_OPCG_CAPT3 , RULL(0x15030012), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_OPCG_CAPT3 , RULL(0x20030012), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21030012, +REG64( EX_0_OPCG_CAPT3 , RULL(0x20030012), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21030012, +REG64( EX_1_OPCG_CAPT3 , RULL(0x22030012), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23030012, +REG64( EX_2_OPCG_CAPT3 , RULL(0x24030012), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25030012, +REG64( EX_3_OPCG_CAPT3 , RULL(0x26030012), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27030012, +REG64( EX_4_OPCG_CAPT3 , RULL(0x28030012), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29030012, +REG64( EX_5_OPCG_CAPT3 , RULL(0x2A030012), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B030012, +REG64( EX_6_OPCG_CAPT3 , RULL(0x2C030012), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D030012, +REG64( EX_7_OPCG_CAPT3 , RULL(0x2E030012), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F030012, +REG64( EX_8_OPCG_CAPT3 , RULL(0x30030012), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31030012, +REG64( EX_9_OPCG_CAPT3 , RULL(0x32030012), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33030012, +REG64( EX_10_OPCG_CAPT3 , RULL(0x34030012), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35030012, +REG64( EX_11_OPCG_CAPT3 , RULL(0x36030012), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37030012, + +REG64( C_OPCG_REG0 , RULL(0x20030002), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_OPCG_REG0 , RULL(0x20030002), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_OPCG_REG0 , RULL(0x21030002), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_OPCG_REG0 , RULL(0x22030002), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_OPCG_REG0 , RULL(0x23030002), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_OPCG_REG0 , RULL(0x24030002), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_OPCG_REG0 , RULL(0x25030002), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_OPCG_REG0 , RULL(0x26030002), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_OPCG_REG0 , RULL(0x27030002), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_OPCG_REG0 , RULL(0x28030002), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_OPCG_REG0 , RULL(0x29030002), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_OPCG_REG0 , RULL(0x2A030002), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_OPCG_REG0 , RULL(0x2B030002), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_OPCG_REG0 , RULL(0x2C030002), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_OPCG_REG0 , RULL(0x2D030002), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_OPCG_REG0 , RULL(0x2E030002), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_OPCG_REG0 , RULL(0x2F030002), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_OPCG_REG0 , RULL(0x30030002), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_OPCG_REG0 , RULL(0x31030002), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_OPCG_REG0 , RULL(0x32030002), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_OPCG_REG0 , RULL(0x33030002), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_OPCG_REG0 , RULL(0x34030002), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_OPCG_REG0 , RULL(0x35030002), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_OPCG_REG0 , RULL(0x36030002), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_OPCG_REG0 , RULL(0x37030002), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_OPCG_REG0 , RULL(0x10030002), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_OPCG_REG0 , RULL(0x10030002), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_OPCG_REG0 , RULL(0x11030002), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_OPCG_REG0 , RULL(0x12030002), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_OPCG_REG0 , RULL(0x13030002), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_OPCG_REG0 , RULL(0x14030002), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_OPCG_REG0 , RULL(0x15030002), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_OPCG_REG0 , RULL(0x20030002), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21030002, +REG64( EX_0_OPCG_REG0 , RULL(0x20030002), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21030002, +REG64( EX_1_OPCG_REG0 , RULL(0x22030002), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23030002, +REG64( EX_2_OPCG_REG0 , RULL(0x24030002), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25030002, +REG64( EX_3_OPCG_REG0 , RULL(0x26030002), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27030002, +REG64( EX_4_OPCG_REG0 , RULL(0x28030002), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29030002, +REG64( EX_5_OPCG_REG0 , RULL(0x2A030002), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B030002, +REG64( EX_6_OPCG_REG0 , RULL(0x2C030002), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D030002, +REG64( EX_7_OPCG_REG0 , RULL(0x2E030002), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F030002, +REG64( EX_8_OPCG_REG0 , RULL(0x30030002), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31030002, +REG64( EX_9_OPCG_REG0 , RULL(0x32030002), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33030002, +REG64( EX_10_OPCG_REG0 , RULL(0x34030002), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35030002, +REG64( EX_11_OPCG_REG0 , RULL(0x36030002), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37030002, + +REG64( C_OPCG_REG1 , RULL(0x20030003), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_OPCG_REG1 , RULL(0x20030003), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_OPCG_REG1 , RULL(0x21030003), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_OPCG_REG1 , RULL(0x22030003), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_OPCG_REG1 , RULL(0x23030003), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_OPCG_REG1 , RULL(0x24030003), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_OPCG_REG1 , RULL(0x25030003), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_OPCG_REG1 , RULL(0x26030003), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_OPCG_REG1 , RULL(0x27030003), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_OPCG_REG1 , RULL(0x28030003), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_OPCG_REG1 , RULL(0x29030003), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_OPCG_REG1 , RULL(0x2A030003), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_OPCG_REG1 , RULL(0x2B030003), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_OPCG_REG1 , RULL(0x2C030003), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_OPCG_REG1 , RULL(0x2D030003), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_OPCG_REG1 , RULL(0x2E030003), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_OPCG_REG1 , RULL(0x2F030003), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_OPCG_REG1 , RULL(0x30030003), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_OPCG_REG1 , RULL(0x31030003), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_OPCG_REG1 , RULL(0x32030003), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_OPCG_REG1 , RULL(0x33030003), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_OPCG_REG1 , RULL(0x34030003), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_OPCG_REG1 , RULL(0x35030003), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_OPCG_REG1 , RULL(0x36030003), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_OPCG_REG1 , RULL(0x37030003), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_OPCG_REG1 , RULL(0x10030003), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_OPCG_REG1 , RULL(0x10030003), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_OPCG_REG1 , RULL(0x11030003), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_OPCG_REG1 , RULL(0x12030003), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_OPCG_REG1 , RULL(0x13030003), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_OPCG_REG1 , RULL(0x14030003), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_OPCG_REG1 , RULL(0x15030003), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_OPCG_REG1 , RULL(0x20030003), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21030003, +REG64( EX_0_OPCG_REG1 , RULL(0x20030003), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21030003, +REG64( EX_1_OPCG_REG1 , RULL(0x22030003), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23030003, +REG64( EX_2_OPCG_REG1 , RULL(0x24030003), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25030003, +REG64( EX_3_OPCG_REG1 , RULL(0x26030003), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27030003, +REG64( EX_4_OPCG_REG1 , RULL(0x28030003), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29030003, +REG64( EX_5_OPCG_REG1 , RULL(0x2A030003), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B030003, +REG64( EX_6_OPCG_REG1 , RULL(0x2C030003), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D030003, +REG64( EX_7_OPCG_REG1 , RULL(0x2E030003), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F030003, +REG64( EX_8_OPCG_REG1 , RULL(0x30030003), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31030003, +REG64( EX_9_OPCG_REG1 , RULL(0x32030003), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33030003, +REG64( EX_10_OPCG_REG1 , RULL(0x34030003), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35030003, +REG64( EX_11_OPCG_REG1 , RULL(0x36030003), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37030003, + +REG64( C_OPCG_REG2 , RULL(0x20030004), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_OPCG_REG2 , RULL(0x20030004), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_OPCG_REG2 , RULL(0x21030004), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_OPCG_REG2 , RULL(0x22030004), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_OPCG_REG2 , RULL(0x23030004), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_OPCG_REG2 , RULL(0x24030004), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_OPCG_REG2 , RULL(0x25030004), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_OPCG_REG2 , RULL(0x26030004), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_OPCG_REG2 , RULL(0x27030004), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_OPCG_REG2 , RULL(0x28030004), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_OPCG_REG2 , RULL(0x29030004), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_OPCG_REG2 , RULL(0x2A030004), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_OPCG_REG2 , RULL(0x2B030004), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_OPCG_REG2 , RULL(0x2C030004), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_OPCG_REG2 , RULL(0x2D030004), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_OPCG_REG2 , RULL(0x2E030004), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_OPCG_REG2 , RULL(0x2F030004), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_OPCG_REG2 , RULL(0x30030004), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_OPCG_REG2 , RULL(0x31030004), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_OPCG_REG2 , RULL(0x32030004), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_OPCG_REG2 , RULL(0x33030004), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_OPCG_REG2 , RULL(0x34030004), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_OPCG_REG2 , RULL(0x35030004), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_OPCG_REG2 , RULL(0x36030004), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_OPCG_REG2 , RULL(0x37030004), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_OPCG_REG2 , RULL(0x10030004), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_OPCG_REG2 , RULL(0x10030004), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_OPCG_REG2 , RULL(0x11030004), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_OPCG_REG2 , RULL(0x12030004), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_OPCG_REG2 , RULL(0x13030004), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_OPCG_REG2 , RULL(0x14030004), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_OPCG_REG2 , RULL(0x15030004), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_OPCG_REG2 , RULL(0x20030004), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21030004, +REG64( EX_0_OPCG_REG2 , RULL(0x20030004), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21030004, +REG64( EX_1_OPCG_REG2 , RULL(0x22030004), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23030004, +REG64( EX_2_OPCG_REG2 , RULL(0x24030004), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25030004, +REG64( EX_3_OPCG_REG2 , RULL(0x26030004), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27030004, +REG64( EX_4_OPCG_REG2 , RULL(0x28030004), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29030004, +REG64( EX_5_OPCG_REG2 , RULL(0x2A030004), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B030004, +REG64( EX_6_OPCG_REG2 , RULL(0x2C030004), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D030004, +REG64( EX_7_OPCG_REG2 , RULL(0x2E030004), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F030004, +REG64( EX_8_OPCG_REG2 , RULL(0x30030004), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31030004, +REG64( EX_9_OPCG_REG2 , RULL(0x32030004), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33030004, +REG64( EX_10_OPCG_REG2 , RULL(0x34030004), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35030004, +REG64( EX_11_OPCG_REG2 , RULL(0x36030004), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37030004, + +REG64( EQ_PHYP_PURGE_CMD_REG , RULL(0x1001080F), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10010C0F, +REG64( EQ_0_PHYP_PURGE_CMD_REG , RULL(0x1001080F), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10010C0F, +REG64( EQ_1_PHYP_PURGE_CMD_REG , RULL(0x1101080F), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11010C0F, +REG64( EQ_2_PHYP_PURGE_CMD_REG , RULL(0x1201080F), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12010C0F, +REG64( EQ_3_PHYP_PURGE_CMD_REG , RULL(0x1301080F), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13010C0F, +REG64( EQ_4_PHYP_PURGE_CMD_REG , RULL(0x1401080F), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14010C0F, +REG64( EQ_5_PHYP_PURGE_CMD_REG , RULL(0x1501080F), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15010C0F, +REG64( EX_PHYP_PURGE_CMD_REG , RULL(0x1001080F), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_PHYP_PURGE_CMD_REG , RULL(0x1001080F), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_PHYP_PURGE_CMD_REG , RULL(0x10010C0F), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_PHYP_PURGE_CMD_REG , RULL(0x1101080F), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_PHYP_PURGE_CMD_REG , RULL(0x11010C0F), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_PHYP_PURGE_CMD_REG , RULL(0x1201080F), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_PHYP_PURGE_CMD_REG , RULL(0x12010C0F), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_PHYP_PURGE_CMD_REG , RULL(0x1301080F), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_PHYP_PURGE_CMD_REG , RULL(0x13010C0F), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_PHYP_PURGE_CMD_REG , RULL(0x1401080F), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_PHYP_PURGE_CMD_REG , RULL(0x14010C0F), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_PHYP_PURGE_CMD_REG , RULL(0x1501080F), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_PHYP_PURGE_CMD_REG , RULL(0x15010C0F), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( EQ_PHYP_PURGE_REG , RULL(0x10011814), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011C14, +REG64( EQ_0_PHYP_PURGE_REG , RULL(0x10011814), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011C14, +REG64( EQ_1_PHYP_PURGE_REG , RULL(0x11011814), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011C14, +REG64( EQ_2_PHYP_PURGE_REG , RULL(0x12011814), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011C14, +REG64( EQ_3_PHYP_PURGE_REG , RULL(0x13011814), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011C14, +REG64( EQ_4_PHYP_PURGE_REG , RULL(0x14011814), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011C14, +REG64( EQ_5_PHYP_PURGE_REG , RULL(0x15011814), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011C14, +REG64( EX_0_L3_PHYP_PURGE_REG , RULL(0x10011814), SH_UNT_EX_0_L3 , SH_ACS_SCOM ); +REG64( EX_10_L3_PHYP_PURGE_REG , RULL(0x15011814), SH_UNT_EX_10_L3 , SH_ACS_SCOM ); +REG64( EX_11_L3_PHYP_PURGE_REG , RULL(0x15011C14), SH_UNT_EX_11_L3 , SH_ACS_SCOM ); +REG64( EX_1_L3_PHYP_PURGE_REG , RULL(0x10011C14), SH_UNT_EX_1_L3 , SH_ACS_SCOM ); +REG64( EX_2_L3_PHYP_PURGE_REG , RULL(0x11011814), SH_UNT_EX_2_L3 , SH_ACS_SCOM ); +REG64( EX_3_L3_PHYP_PURGE_REG , RULL(0x11011C14), SH_UNT_EX_3_L3 , SH_ACS_SCOM ); +REG64( EX_4_L3_PHYP_PURGE_REG , RULL(0x12011814), SH_UNT_EX_4_L3 , SH_ACS_SCOM ); +REG64( EX_5_L3_PHYP_PURGE_REG , RULL(0x12011C14), SH_UNT_EX_5_L3 , SH_ACS_SCOM ); +REG64( EX_6_L3_PHYP_PURGE_REG , RULL(0x13011814), SH_UNT_EX_6_L3 , SH_ACS_SCOM ); +REG64( EX_7_L3_PHYP_PURGE_REG , RULL(0x13011C14), SH_UNT_EX_7_L3 , SH_ACS_SCOM ); +REG64( EX_8_L3_PHYP_PURGE_REG , RULL(0x14011814), SH_UNT_EX_8_L3 , SH_ACS_SCOM ); +REG64( EX_9_L3_PHYP_PURGE_REG , RULL(0x14011C14), SH_UNT_EX_9_L3 , SH_ACS_SCOM ); +REG64( EX_L3_PHYP_PURGE_REG , RULL(0x10011814), SH_UNT_EX_L3 , SH_ACS_SCOM ); + +REG64( C_PLL_LOCK_REG , RULL(0x200F0019), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_PLL_LOCK_REG , RULL(0x200F0019), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_PLL_LOCK_REG , RULL(0x210F0019), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_PLL_LOCK_REG , RULL(0x220F0019), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_PLL_LOCK_REG , RULL(0x230F0019), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_PLL_LOCK_REG , RULL(0x240F0019), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_PLL_LOCK_REG , RULL(0x250F0019), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_PLL_LOCK_REG , RULL(0x260F0019), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_PLL_LOCK_REG , RULL(0x270F0019), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_PLL_LOCK_REG , RULL(0x280F0019), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_PLL_LOCK_REG , RULL(0x290F0019), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_PLL_LOCK_REG , RULL(0x2A0F0019), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_PLL_LOCK_REG , RULL(0x2B0F0019), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_PLL_LOCK_REG , RULL(0x2C0F0019), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_PLL_LOCK_REG , RULL(0x2D0F0019), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_PLL_LOCK_REG , RULL(0x2E0F0019), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_PLL_LOCK_REG , RULL(0x2F0F0019), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_PLL_LOCK_REG , RULL(0x300F0019), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_PLL_LOCK_REG , RULL(0x310F0019), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_PLL_LOCK_REG , RULL(0x320F0019), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_PLL_LOCK_REG , RULL(0x330F0019), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_PLL_LOCK_REG , RULL(0x340F0019), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_PLL_LOCK_REG , RULL(0x350F0019), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_PLL_LOCK_REG , RULL(0x360F0019), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_PLL_LOCK_REG , RULL(0x370F0019), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_PLL_LOCK_REG , RULL(0x100F0019), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_PLL_LOCK_REG , RULL(0x100F0019), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_PLL_LOCK_REG , RULL(0x110F0019), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_PLL_LOCK_REG , RULL(0x120F0019), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_PLL_LOCK_REG , RULL(0x130F0019), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_PLL_LOCK_REG , RULL(0x140F0019), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_PLL_LOCK_REG , RULL(0x150F0019), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_PLL_LOCK_REG , RULL(0x200F0019), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0019, +REG64( EX_0_PLL_LOCK_REG , RULL(0x200F0019), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0019, +REG64( EX_1_PLL_LOCK_REG , RULL(0x230F0019), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0019, +REG64( EX_2_PLL_LOCK_REG , RULL(0x240F0019), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0019, +REG64( EX_3_PLL_LOCK_REG , RULL(0x260F0019), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0019, +REG64( EX_4_PLL_LOCK_REG , RULL(0x280F0019), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0019, +REG64( EX_5_PLL_LOCK_REG , RULL(0x2A0F0019), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0019, +REG64( EX_6_PLL_LOCK_REG , RULL(0x2C0F0019), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0019, +REG64( EX_7_PLL_LOCK_REG , RULL(0x2E0F0019), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0019, +REG64( EX_8_PLL_LOCK_REG , RULL(0x300F0019), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0019, +REG64( EX_9_PLL_LOCK_REG , RULL(0x320F0019), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0019, +REG64( EX_10_PLL_LOCK_REG , RULL(0x340F0019), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0019, +REG64( EX_11_PLL_LOCK_REG , RULL(0x360F0019), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0019, + +REG64( CAPP_PMU_CNTRA_CFG , RULL(0x02010814), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_PMU_CNTRA_CFG , RULL(0x02010814), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_PMU_CNTRA_CFG , RULL(0x04010814), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_PMU_CNTRA_REG , RULL(0x02010815), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_PMU_CNTRA_REG , RULL(0x02010815), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_PMU_CNTRA_REG , RULL(0x04010815), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_PMU_CNTRB_CFG , RULL(0x02010824), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_PMU_CNTRB_CFG , RULL(0x02010824), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_PMU_CNTRB_CFG , RULL(0x04010824), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_PMU_CNTRB_REG , RULL(0x02010825), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_PMU_CNTRB_REG , RULL(0x02010825), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_PMU_CNTRB_REG , RULL(0x04010825), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( C_PMU_HOLD_OUT , RULL(0x20010ABC), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_PMU_HOLD_OUT , RULL(0x20010ABC), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_PMU_HOLD_OUT , RULL(0x21010ABC), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_PMU_HOLD_OUT , RULL(0x22010ABC), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_PMU_HOLD_OUT , RULL(0x23010ABC), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_PMU_HOLD_OUT , RULL(0x24010ABC), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_PMU_HOLD_OUT , RULL(0x25010ABC), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_PMU_HOLD_OUT , RULL(0x26010ABC), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_PMU_HOLD_OUT , RULL(0x27010ABC), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_PMU_HOLD_OUT , RULL(0x28010ABC), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_PMU_HOLD_OUT , RULL(0x29010ABC), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_PMU_HOLD_OUT , RULL(0x2A010ABC), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_PMU_HOLD_OUT , RULL(0x2B010ABC), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_PMU_HOLD_OUT , RULL(0x2C010ABC), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_PMU_HOLD_OUT , RULL(0x2D010ABC), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_PMU_HOLD_OUT , RULL(0x2E010ABC), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_PMU_HOLD_OUT , RULL(0x2F010ABC), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_PMU_HOLD_OUT , RULL(0x30010ABC), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_PMU_HOLD_OUT , RULL(0x31010ABC), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_PMU_HOLD_OUT , RULL(0x32010ABC), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_PMU_HOLD_OUT , RULL(0x33010ABC), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_PMU_HOLD_OUT , RULL(0x34010ABC), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_PMU_HOLD_OUT , RULL(0x35010ABC), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_PMU_HOLD_OUT , RULL(0x36010ABC), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_PMU_HOLD_OUT , RULL(0x37010ABC), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_0_L2_PMU_HOLD_OUT , RULL(0x20010ABC), SH_UNT_EX_0_L2 , + SH_ACS_SCOM ); //DUPS: 21010ABC, +REG64( EX_10_L2_PMU_HOLD_OUT , RULL(0x34010ABC), SH_UNT_EX_10_L2 , + SH_ACS_SCOM ); //DUPS: 35010ABC, +REG64( EX_11_L2_PMU_HOLD_OUT , RULL(0x36010ABC), SH_UNT_EX_11_L2 , + SH_ACS_SCOM ); //DUPS: 37010ABC, +REG64( EX_1_L2_PMU_HOLD_OUT , RULL(0x22010ABC), SH_UNT_EX_1_L2 , + SH_ACS_SCOM ); //DUPS: 23010ABC, +REG64( EX_2_L2_PMU_HOLD_OUT , RULL(0x24010ABC), SH_UNT_EX_2_L2 , + SH_ACS_SCOM ); //DUPS: 25010ABC, +REG64( EX_3_L2_PMU_HOLD_OUT , RULL(0x26010ABC), SH_UNT_EX_3_L2 , + SH_ACS_SCOM ); //DUPS: 27010ABC, +REG64( EX_4_L2_PMU_HOLD_OUT , RULL(0x28010ABC), SH_UNT_EX_4_L2 , + SH_ACS_SCOM ); //DUPS: 29010ABC, +REG64( EX_5_L2_PMU_HOLD_OUT , RULL(0x2A010ABC), SH_UNT_EX_5_L2 , + SH_ACS_SCOM ); //DUPS: 2B010ABC, +REG64( EX_6_L2_PMU_HOLD_OUT , RULL(0x2C010ABC), SH_UNT_EX_6_L2 , + SH_ACS_SCOM ); //DUPS: 2D010ABC, +REG64( EX_7_L2_PMU_HOLD_OUT , RULL(0x2E010ABC), SH_UNT_EX_7_L2 , + SH_ACS_SCOM ); //DUPS: 2F010ABC, +REG64( EX_8_L2_PMU_HOLD_OUT , RULL(0x30010ABC), SH_UNT_EX_8_L2 , + SH_ACS_SCOM ); //DUPS: 31010ABC, +REG64( EX_9_L2_PMU_HOLD_OUT , RULL(0x32010ABC), SH_UNT_EX_9_L2 , + SH_ACS_SCOM ); //DUPS: 33010ABC, +REG64( EX_L2_PMU_HOLD_OUT , RULL(0x20010ABC), SH_UNT_EX_L2 , + SH_ACS_SCOM ); //DUPS: 21010ABC, + +REG64( C_PMU_SCOMC , RULL(0x20010AB0), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_PMU_SCOMC , RULL(0x20010AB0), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_PMU_SCOMC , RULL(0x21010AB0), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_PMU_SCOMC , RULL(0x22010AB0), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_PMU_SCOMC , RULL(0x23010AB0), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_PMU_SCOMC , RULL(0x24010AB0), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_PMU_SCOMC , RULL(0x25010AB0), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_PMU_SCOMC , RULL(0x26010AB0), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_PMU_SCOMC , RULL(0x27010AB0), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_PMU_SCOMC , RULL(0x28010AB0), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_PMU_SCOMC , RULL(0x29010AB0), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_PMU_SCOMC , RULL(0x2A010AB0), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_PMU_SCOMC , RULL(0x2B010AB0), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_PMU_SCOMC , RULL(0x2C010AB0), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_PMU_SCOMC , RULL(0x2D010AB0), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_PMU_SCOMC , RULL(0x2E010AB0), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_PMU_SCOMC , RULL(0x2F010AB0), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_PMU_SCOMC , RULL(0x30010AB0), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_PMU_SCOMC , RULL(0x31010AB0), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_PMU_SCOMC , RULL(0x32010AB0), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_PMU_SCOMC , RULL(0x33010AB0), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_PMU_SCOMC , RULL(0x34010AB0), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_PMU_SCOMC , RULL(0x35010AB0), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_PMU_SCOMC , RULL(0x36010AB0), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_PMU_SCOMC , RULL(0x37010AB0), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_PMU_SCOMC , RULL(0x20010AB0), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RW ); //DUPS: 21010AB0, +REG64( EX_10_L2_PMU_SCOMC , RULL(0x34010AB0), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RW ); //DUPS: 35010AB0, +REG64( EX_11_L2_PMU_SCOMC , RULL(0x36010AB0), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RW ); //DUPS: 37010AB0, +REG64( EX_1_L2_PMU_SCOMC , RULL(0x22010AB0), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RW ); //DUPS: 23010AB0, +REG64( EX_2_L2_PMU_SCOMC , RULL(0x24010AB0), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RW ); //DUPS: 25010AB0, +REG64( EX_3_L2_PMU_SCOMC , RULL(0x26010AB0), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RW ); //DUPS: 27010AB0, +REG64( EX_4_L2_PMU_SCOMC , RULL(0x28010AB0), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RW ); //DUPS: 29010AB0, +REG64( EX_5_L2_PMU_SCOMC , RULL(0x2A010AB0), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2B010AB0, +REG64( EX_6_L2_PMU_SCOMC , RULL(0x2C010AB0), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2D010AB0, +REG64( EX_7_L2_PMU_SCOMC , RULL(0x2E010AB0), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2F010AB0, +REG64( EX_8_L2_PMU_SCOMC , RULL(0x30010AB0), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RW ); //DUPS: 31010AB0, +REG64( EX_9_L2_PMU_SCOMC , RULL(0x32010AB0), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RW ); //DUPS: 33010AB0, +REG64( EX_L2_PMU_SCOMC , RULL(0x20010AB0), SH_UNT_EX_L2 , + SH_ACS_SCOM_RW ); //DUPS: 21010AB0, + +REG64( C_PMU_SCOMC_EN , RULL(0x20010AB2), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_PMU_SCOMC_EN , RULL(0x20010AB2), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_PMU_SCOMC_EN , RULL(0x21010AB2), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_PMU_SCOMC_EN , RULL(0x22010AB2), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_PMU_SCOMC_EN , RULL(0x23010AB2), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_PMU_SCOMC_EN , RULL(0x24010AB2), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_PMU_SCOMC_EN , RULL(0x25010AB2), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_PMU_SCOMC_EN , RULL(0x26010AB2), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_PMU_SCOMC_EN , RULL(0x27010AB2), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_PMU_SCOMC_EN , RULL(0x28010AB2), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_PMU_SCOMC_EN , RULL(0x29010AB2), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_PMU_SCOMC_EN , RULL(0x2A010AB2), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_PMU_SCOMC_EN , RULL(0x2B010AB2), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_PMU_SCOMC_EN , RULL(0x2C010AB2), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_PMU_SCOMC_EN , RULL(0x2D010AB2), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_PMU_SCOMC_EN , RULL(0x2E010AB2), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_PMU_SCOMC_EN , RULL(0x2F010AB2), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_PMU_SCOMC_EN , RULL(0x30010AB2), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_PMU_SCOMC_EN , RULL(0x31010AB2), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_PMU_SCOMC_EN , RULL(0x32010AB2), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_PMU_SCOMC_EN , RULL(0x33010AB2), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_PMU_SCOMC_EN , RULL(0x34010AB2), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_PMU_SCOMC_EN , RULL(0x35010AB2), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_PMU_SCOMC_EN , RULL(0x36010AB2), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_PMU_SCOMC_EN , RULL(0x37010AB2), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_PMU_SCOMC_EN , RULL(0x20010AB2), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RW ); //DUPS: 21010AB2, +REG64( EX_10_L2_PMU_SCOMC_EN , RULL(0x34010AB2), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RW ); //DUPS: 35010AB2, +REG64( EX_11_L2_PMU_SCOMC_EN , RULL(0x36010AB2), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RW ); //DUPS: 37010AB2, +REG64( EX_1_L2_PMU_SCOMC_EN , RULL(0x22010AB2), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RW ); //DUPS: 23010AB2, +REG64( EX_2_L2_PMU_SCOMC_EN , RULL(0x24010AB2), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RW ); //DUPS: 25010AB2, +REG64( EX_3_L2_PMU_SCOMC_EN , RULL(0x26010AB2), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RW ); //DUPS: 27010AB2, +REG64( EX_4_L2_PMU_SCOMC_EN , RULL(0x28010AB2), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RW ); //DUPS: 29010AB2, +REG64( EX_5_L2_PMU_SCOMC_EN , RULL(0x2A010AB2), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2B010AB2, +REG64( EX_6_L2_PMU_SCOMC_EN , RULL(0x2C010AB2), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2D010AB2, +REG64( EX_7_L2_PMU_SCOMC_EN , RULL(0x2E010AB2), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2F010AB2, +REG64( EX_8_L2_PMU_SCOMC_EN , RULL(0x30010AB2), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RW ); //DUPS: 31010AB2, +REG64( EX_9_L2_PMU_SCOMC_EN , RULL(0x32010AB2), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RW ); //DUPS: 33010AB2, +REG64( EX_L2_PMU_SCOMC_EN , RULL(0x20010AB2), SH_UNT_EX_L2 , + SH_ACS_SCOM_RW ); //DUPS: 21010AB2, + +REG64( EQ_PM_FENCE_LCO_REG , RULL(0x10011816), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011C16, +REG64( EQ_0_PM_FENCE_LCO_REG , RULL(0x10011816), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011C16, +REG64( EQ_1_PM_FENCE_LCO_REG , RULL(0x11011816), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011C16, +REG64( EQ_2_PM_FENCE_LCO_REG , RULL(0x12011816), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011C16, +REG64( EQ_3_PM_FENCE_LCO_REG , RULL(0x13011816), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011C16, +REG64( EQ_4_PM_FENCE_LCO_REG , RULL(0x14011816), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011C16, +REG64( EQ_5_PM_FENCE_LCO_REG , RULL(0x15011816), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011C16, +REG64( EX_0_L3_PM_FENCE_LCO_REG , RULL(0x10011816), SH_UNT_EX_0_L3 , SH_ACS_SCOM ); +REG64( EX_10_L3_PM_FENCE_LCO_REG , RULL(0x15011816), SH_UNT_EX_10_L3 , SH_ACS_SCOM ); +REG64( EX_11_L3_PM_FENCE_LCO_REG , RULL(0x15011C16), SH_UNT_EX_11_L3 , SH_ACS_SCOM ); +REG64( EX_1_L3_PM_FENCE_LCO_REG , RULL(0x10011C16), SH_UNT_EX_1_L3 , SH_ACS_SCOM ); +REG64( EX_2_L3_PM_FENCE_LCO_REG , RULL(0x11011816), SH_UNT_EX_2_L3 , SH_ACS_SCOM ); +REG64( EX_3_L3_PM_FENCE_LCO_REG , RULL(0x11011C16), SH_UNT_EX_3_L3 , SH_ACS_SCOM ); +REG64( EX_4_L3_PM_FENCE_LCO_REG , RULL(0x12011816), SH_UNT_EX_4_L3 , SH_ACS_SCOM ); +REG64( EX_5_L3_PM_FENCE_LCO_REG , RULL(0x12011C16), SH_UNT_EX_5_L3 , SH_ACS_SCOM ); +REG64( EX_6_L3_PM_FENCE_LCO_REG , RULL(0x13011816), SH_UNT_EX_6_L3 , SH_ACS_SCOM ); +REG64( EX_7_L3_PM_FENCE_LCO_REG , RULL(0x13011C16), SH_UNT_EX_7_L3 , SH_ACS_SCOM ); +REG64( EX_8_L3_PM_FENCE_LCO_REG , RULL(0x14011816), SH_UNT_EX_8_L3 , SH_ACS_SCOM ); +REG64( EX_9_L3_PM_FENCE_LCO_REG , RULL(0x14011C16), SH_UNT_EX_9_L3 , SH_ACS_SCOM ); +REG64( EX_L3_PM_FENCE_LCO_REG , RULL(0x10011816), SH_UNT_EX_L3 , SH_ACS_SCOM ); + +REG64( EQ_PM_PURGE_REG , RULL(0x10011813), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011C13, +REG64( EQ_0_PM_PURGE_REG , RULL(0x10011813), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011C13, +REG64( EQ_1_PM_PURGE_REG , RULL(0x11011813), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011C13, +REG64( EQ_2_PM_PURGE_REG , RULL(0x12011813), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011C13, +REG64( EQ_3_PM_PURGE_REG , RULL(0x13011813), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011C13, +REG64( EQ_4_PM_PURGE_REG , RULL(0x14011813), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011C13, +REG64( EQ_5_PM_PURGE_REG , RULL(0x15011813), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011C13, +REG64( EX_0_L3_PM_PURGE_REG , RULL(0x10011813), SH_UNT_EX_0_L3 , SH_ACS_SCOM ); +REG64( EX_10_L3_PM_PURGE_REG , RULL(0x15011813), SH_UNT_EX_10_L3 , SH_ACS_SCOM ); +REG64( EX_11_L3_PM_PURGE_REG , RULL(0x15011C13), SH_UNT_EX_11_L3 , SH_ACS_SCOM ); +REG64( EX_1_L3_PM_PURGE_REG , RULL(0x10011C13), SH_UNT_EX_1_L3 , SH_ACS_SCOM ); +REG64( EX_2_L3_PM_PURGE_REG , RULL(0x11011813), SH_UNT_EX_2_L3 , SH_ACS_SCOM ); +REG64( EX_3_L3_PM_PURGE_REG , RULL(0x11011C13), SH_UNT_EX_3_L3 , SH_ACS_SCOM ); +REG64( EX_4_L3_PM_PURGE_REG , RULL(0x12011813), SH_UNT_EX_4_L3 , SH_ACS_SCOM ); +REG64( EX_5_L3_PM_PURGE_REG , RULL(0x12011C13), SH_UNT_EX_5_L3 , SH_ACS_SCOM ); +REG64( EX_6_L3_PM_PURGE_REG , RULL(0x13011813), SH_UNT_EX_6_L3 , SH_ACS_SCOM ); +REG64( EX_7_L3_PM_PURGE_REG , RULL(0x13011C13), SH_UNT_EX_7_L3 , SH_ACS_SCOM ); +REG64( EX_8_L3_PM_PURGE_REG , RULL(0x14011813), SH_UNT_EX_8_L3 , SH_ACS_SCOM ); +REG64( EX_9_L3_PM_PURGE_REG , RULL(0x14011C13), SH_UNT_EX_9_L3 , SH_ACS_SCOM ); +REG64( EX_L3_PM_PURGE_REG , RULL(0x10011813), SH_UNT_EX_L3 , SH_ACS_SCOM ); + +REG64( EQ_PPE_XIDBGPRO , RULL(0x10012835), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10012435, +REG64( EQ_0_PPE_XIDBGPRO , RULL(0x10012835), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10012435, +REG64( EQ_1_PPE_XIDBGPRO , RULL(0x11012835), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11012435, +REG64( EQ_2_PPE_XIDBGPRO , RULL(0x12012835), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12012435, +REG64( EQ_3_PPE_XIDBGPRO , RULL(0x13012835), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13012435, +REG64( EQ_4_PPE_XIDBGPRO , RULL(0x14012835), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14012435, +REG64( EQ_5_PPE_XIDBGPRO , RULL(0x15012835), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15012435, +REG64( EX_PPE_XIDBGPRO , RULL(0x10012435), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_PPE_XIDBGPRO , RULL(0x10012435), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_PPE_XIDBGPRO , RULL(0x10012835), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_PPE_XIDBGPRO , RULL(0x11012435), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_PPE_XIDBGPRO , RULL(0x11012835), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_PPE_XIDBGPRO , RULL(0x12012435), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_PPE_XIDBGPRO , RULL(0x12012835), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_PPE_XIDBGPRO , RULL(0x13012435), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_PPE_XIDBGPRO , RULL(0x13012835), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_PPE_XIDBGPRO , RULL(0x14012435), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_PPE_XIDBGPRO , RULL(0x14012835), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_PPE_XIDBGPRO , RULL(0x15012435), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_PPE_XIDBGPRO , RULL(0x15012835), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( EQ_PPE_XIRAMDBG , RULL(0x10012833), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10012433, +REG64( EQ_0_PPE_XIRAMDBG , RULL(0x10012833), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10012433, +REG64( EQ_1_PPE_XIRAMDBG , RULL(0x11012833), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11012433, +REG64( EQ_2_PPE_XIRAMDBG , RULL(0x12012833), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12012433, +REG64( EQ_3_PPE_XIRAMDBG , RULL(0x13012833), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13012433, +REG64( EQ_4_PPE_XIRAMDBG , RULL(0x14012833), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14012433, +REG64( EQ_5_PPE_XIRAMDBG , RULL(0x15012833), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15012433, +REG64( EX_PPE_XIRAMDBG , RULL(0x10012433), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_PPE_XIRAMDBG , RULL(0x10012433), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_PPE_XIRAMDBG , RULL(0x10012833), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_PPE_XIRAMDBG , RULL(0x11012433), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_PPE_XIRAMDBG , RULL(0x11012833), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_PPE_XIRAMDBG , RULL(0x12012433), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_PPE_XIRAMDBG , RULL(0x12012833), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_PPE_XIRAMDBG , RULL(0x13012433), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_PPE_XIRAMDBG , RULL(0x13012833), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_PPE_XIRAMDBG , RULL(0x14012433), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_PPE_XIRAMDBG , RULL(0x14012833), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_PPE_XIRAMDBG , RULL(0x15012433), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_PPE_XIRAMDBG , RULL(0x15012833), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( EQ_PPE_XIRAMEDR , RULL(0x10012834), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10012434, +REG64( EQ_0_PPE_XIRAMEDR , RULL(0x10012834), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10012434, +REG64( EQ_1_PPE_XIRAMEDR , RULL(0x11012834), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11012434, +REG64( EQ_2_PPE_XIRAMEDR , RULL(0x12012834), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12012434, +REG64( EQ_3_PPE_XIRAMEDR , RULL(0x13012834), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13012434, +REG64( EQ_4_PPE_XIRAMEDR , RULL(0x14012834), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14012434, +REG64( EQ_5_PPE_XIRAMEDR , RULL(0x15012834), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15012434, +REG64( EX_PPE_XIRAMEDR , RULL(0x10012434), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_PPE_XIRAMEDR , RULL(0x10012434), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_PPE_XIRAMEDR , RULL(0x10012834), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_PPE_XIRAMEDR , RULL(0x11012434), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_PPE_XIRAMEDR , RULL(0x11012834), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_PPE_XIRAMEDR , RULL(0x12012434), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_PPE_XIRAMEDR , RULL(0x12012834), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_PPE_XIRAMEDR , RULL(0x13012434), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_PPE_XIRAMEDR , RULL(0x13012834), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_PPE_XIRAMEDR , RULL(0x14012434), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_PPE_XIRAMEDR , RULL(0x14012834), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_PPE_XIRAMEDR , RULL(0x15012434), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_PPE_XIRAMEDR , RULL(0x15012834), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( EQ_PPE_XIRAMGA , RULL(0x10012832), SH_UNT_EQ , + SH_ACS_SCOM_WO ); //DUPS: 10012432, +REG64( EQ_0_PPE_XIRAMGA , RULL(0x10012832), SH_UNT_EQ_0 , + SH_ACS_SCOM_WO ); //DUPS: 10012432, +REG64( EQ_1_PPE_XIRAMGA , RULL(0x11012832), SH_UNT_EQ_1 , + SH_ACS_SCOM_WO ); //DUPS: 11012432, +REG64( EQ_2_PPE_XIRAMGA , RULL(0x12012832), SH_UNT_EQ_2 , + SH_ACS_SCOM_WO ); //DUPS: 12012432, +REG64( EQ_3_PPE_XIRAMGA , RULL(0x13012832), SH_UNT_EQ_3 , + SH_ACS_SCOM_WO ); //DUPS: 13012432, +REG64( EQ_4_PPE_XIRAMGA , RULL(0x14012832), SH_UNT_EQ_4 , + SH_ACS_SCOM_WO ); //DUPS: 14012432, +REG64( EQ_5_PPE_XIRAMGA , RULL(0x15012832), SH_UNT_EQ_5 , + SH_ACS_SCOM_WO ); //DUPS: 15012432, +REG64( EX_PPE_XIRAMGA , RULL(0x10012432), SH_UNT_EX , SH_ACS_SCOM_WO ); +REG64( EX_0_PPE_XIRAMGA , RULL(0x10012432), SH_UNT_EX_0 , SH_ACS_SCOM_WO ); +REG64( EX_1_PPE_XIRAMGA , RULL(0x10012832), SH_UNT_EX_1 , SH_ACS_SCOM_WO ); +REG64( EX_2_PPE_XIRAMGA , RULL(0x11012432), SH_UNT_EX_2 , SH_ACS_SCOM_WO ); +REG64( EX_3_PPE_XIRAMGA , RULL(0x11012832), SH_UNT_EX_3 , SH_ACS_SCOM_WO ); +REG64( EX_4_PPE_XIRAMGA , RULL(0x12012432), SH_UNT_EX_4 , SH_ACS_SCOM_WO ); +REG64( EX_5_PPE_XIRAMGA , RULL(0x12012832), SH_UNT_EX_5 , SH_ACS_SCOM_WO ); +REG64( EX_6_PPE_XIRAMGA , RULL(0x13012432), SH_UNT_EX_6 , SH_ACS_SCOM_WO ); +REG64( EX_7_PPE_XIRAMGA , RULL(0x13012832), SH_UNT_EX_7 , SH_ACS_SCOM_WO ); +REG64( EX_8_PPE_XIRAMGA , RULL(0x14012432), SH_UNT_EX_8 , SH_ACS_SCOM_WO ); +REG64( EX_9_PPE_XIRAMGA , RULL(0x14012832), SH_UNT_EX_9 , SH_ACS_SCOM_WO ); +REG64( EX_10_PPE_XIRAMGA , RULL(0x15012432), SH_UNT_EX_10 , SH_ACS_SCOM_WO ); +REG64( EX_11_PPE_XIRAMGA , RULL(0x15012832), SH_UNT_EX_11 , SH_ACS_SCOM_WO ); + +REG64( EQ_PPE_XIRAMRA , RULL(0x10012831), SH_UNT_EQ , + SH_ACS_SCOM_WO ); //DUPS: 10012431, +REG64( EQ_0_PPE_XIRAMRA , RULL(0x10012831), SH_UNT_EQ_0 , + SH_ACS_SCOM_WO ); //DUPS: 10012431, +REG64( EQ_1_PPE_XIRAMRA , RULL(0x11012831), SH_UNT_EQ_1 , + SH_ACS_SCOM_WO ); //DUPS: 11012431, +REG64( EQ_2_PPE_XIRAMRA , RULL(0x12012831), SH_UNT_EQ_2 , + SH_ACS_SCOM_WO ); //DUPS: 12012431, +REG64( EQ_3_PPE_XIRAMRA , RULL(0x13012831), SH_UNT_EQ_3 , + SH_ACS_SCOM_WO ); //DUPS: 13012431, +REG64( EQ_4_PPE_XIRAMRA , RULL(0x14012831), SH_UNT_EQ_4 , + SH_ACS_SCOM_WO ); //DUPS: 14012431, +REG64( EQ_5_PPE_XIRAMRA , RULL(0x15012831), SH_UNT_EQ_5 , + SH_ACS_SCOM_WO ); //DUPS: 15012431, +REG64( EX_PPE_XIRAMRA , RULL(0x10012431), SH_UNT_EX , SH_ACS_SCOM_WO ); +REG64( EX_0_PPE_XIRAMRA , RULL(0x10012431), SH_UNT_EX_0 , SH_ACS_SCOM_WO ); +REG64( EX_1_PPE_XIRAMRA , RULL(0x10012831), SH_UNT_EX_1 , SH_ACS_SCOM_WO ); +REG64( EX_2_PPE_XIRAMRA , RULL(0x11012431), SH_UNT_EX_2 , SH_ACS_SCOM_WO ); +REG64( EX_3_PPE_XIRAMRA , RULL(0x11012831), SH_UNT_EX_3 , SH_ACS_SCOM_WO ); +REG64( EX_4_PPE_XIRAMRA , RULL(0x12012431), SH_UNT_EX_4 , SH_ACS_SCOM_WO ); +REG64( EX_5_PPE_XIRAMRA , RULL(0x12012831), SH_UNT_EX_5 , SH_ACS_SCOM_WO ); +REG64( EX_6_PPE_XIRAMRA , RULL(0x13012431), SH_UNT_EX_6 , SH_ACS_SCOM_WO ); +REG64( EX_7_PPE_XIRAMRA , RULL(0x13012831), SH_UNT_EX_7 , SH_ACS_SCOM_WO ); +REG64( EX_8_PPE_XIRAMRA , RULL(0x14012431), SH_UNT_EX_8 , SH_ACS_SCOM_WO ); +REG64( EX_9_PPE_XIRAMRA , RULL(0x14012831), SH_UNT_EX_9 , SH_ACS_SCOM_WO ); +REG64( EX_10_PPE_XIRAMRA , RULL(0x15012431), SH_UNT_EX_10 , SH_ACS_SCOM_WO ); +REG64( EX_11_PPE_XIRAMRA , RULL(0x15012831), SH_UNT_EX_11 , SH_ACS_SCOM_WO ); + +REG64( EQ_PPE_XIXCR , RULL(0x10012830), SH_UNT_EQ , + SH_ACS_SCOM_WO ); //DUPS: 10012430, +REG64( EQ_0_PPE_XIXCR , RULL(0x10012830), SH_UNT_EQ_0 , + SH_ACS_SCOM_WO ); //DUPS: 10012430, +REG64( EQ_1_PPE_XIXCR , RULL(0x11012830), SH_UNT_EQ_1 , + SH_ACS_SCOM_WO ); //DUPS: 11012430, +REG64( EQ_2_PPE_XIXCR , RULL(0x12012830), SH_UNT_EQ_2 , + SH_ACS_SCOM_WO ); //DUPS: 12012430, +REG64( EQ_3_PPE_XIXCR , RULL(0x13012830), SH_UNT_EQ_3 , + SH_ACS_SCOM_WO ); //DUPS: 13012430, +REG64( EQ_4_PPE_XIXCR , RULL(0x14012830), SH_UNT_EQ_4 , + SH_ACS_SCOM_WO ); //DUPS: 14012430, +REG64( EQ_5_PPE_XIXCR , RULL(0x15012830), SH_UNT_EQ_5 , + SH_ACS_SCOM_WO ); //DUPS: 15012430, +REG64( EX_PPE_XIXCR , RULL(0x10012430), SH_UNT_EX , SH_ACS_SCOM_WO ); +REG64( EX_0_PPE_XIXCR , RULL(0x10012430), SH_UNT_EX_0 , SH_ACS_SCOM_WO ); +REG64( EX_1_PPE_XIXCR , RULL(0x10012830), SH_UNT_EX_1 , SH_ACS_SCOM_WO ); +REG64( EX_2_PPE_XIXCR , RULL(0x11012430), SH_UNT_EX_2 , SH_ACS_SCOM_WO ); +REG64( EX_3_PPE_XIXCR , RULL(0x11012830), SH_UNT_EX_3 , SH_ACS_SCOM_WO ); +REG64( EX_4_PPE_XIXCR , RULL(0x12012430), SH_UNT_EX_4 , SH_ACS_SCOM_WO ); +REG64( EX_5_PPE_XIXCR , RULL(0x12012830), SH_UNT_EX_5 , SH_ACS_SCOM_WO ); +REG64( EX_6_PPE_XIXCR , RULL(0x13012430), SH_UNT_EX_6 , SH_ACS_SCOM_WO ); +REG64( EX_7_PPE_XIXCR , RULL(0x13012830), SH_UNT_EX_7 , SH_ACS_SCOM_WO ); +REG64( EX_8_PPE_XIXCR , RULL(0x14012430), SH_UNT_EX_8 , SH_ACS_SCOM_WO ); +REG64( EX_9_PPE_XIXCR , RULL(0x14012830), SH_UNT_EX_9 , SH_ACS_SCOM_WO ); +REG64( EX_10_PPE_XIXCR , RULL(0x15012430), SH_UNT_EX_10 , SH_ACS_SCOM_WO ); +REG64( EX_11_PPE_XIXCR , RULL(0x15012830), SH_UNT_EX_11 , SH_ACS_SCOM_WO ); + +REG64( C_PPM_CGCR , RULL(0x200F0165), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_PPM_CGCR_CLEAR , RULL(0x200F0166), SH_UNT_C , + SH_ACS_SCOM1_CLEAR ); +REG64( C_PPM_CGCR_OR , RULL(0x200F0167), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_PPM_CGCR , RULL(0x200F0165), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_PPM_CGCR_CLEAR , RULL(0x200F0166), SH_UNT_C_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_0_PPM_CGCR_OR , RULL(0x200F0167), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_PPM_CGCR , RULL(0x210F0165), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_PPM_CGCR_CLEAR , RULL(0x210F0166), SH_UNT_C_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_1_PPM_CGCR_OR , RULL(0x210F0167), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_PPM_CGCR , RULL(0x220F0165), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_PPM_CGCR_CLEAR , RULL(0x220F0166), SH_UNT_C_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_2_PPM_CGCR_OR , RULL(0x220F0167), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_PPM_CGCR , RULL(0x230F0165), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_PPM_CGCR_CLEAR , RULL(0x230F0166), SH_UNT_C_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_3_PPM_CGCR_OR , RULL(0x230F0167), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_PPM_CGCR , RULL(0x240F0165), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_PPM_CGCR_CLEAR , RULL(0x240F0166), SH_UNT_C_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_4_PPM_CGCR_OR , RULL(0x240F0167), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_PPM_CGCR , RULL(0x250F0165), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_PPM_CGCR_CLEAR , RULL(0x250F0166), SH_UNT_C_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_5_PPM_CGCR_OR , RULL(0x250F0167), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_PPM_CGCR , RULL(0x260F0165), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_PPM_CGCR_CLEAR , RULL(0x260F0166), SH_UNT_C_6 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_6_PPM_CGCR_OR , RULL(0x260F0167), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_PPM_CGCR , RULL(0x270F0165), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_PPM_CGCR_CLEAR , RULL(0x270F0166), SH_UNT_C_7 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_7_PPM_CGCR_OR , RULL(0x270F0167), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_PPM_CGCR , RULL(0x280F0165), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_PPM_CGCR_CLEAR , RULL(0x280F0166), SH_UNT_C_8 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_8_PPM_CGCR_OR , RULL(0x280F0167), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_PPM_CGCR , RULL(0x290F0165), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_PPM_CGCR_CLEAR , RULL(0x290F0166), SH_UNT_C_9 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_9_PPM_CGCR_OR , RULL(0x290F0167), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_PPM_CGCR , RULL(0x2A0F0165), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_PPM_CGCR_CLEAR , RULL(0x2A0F0166), SH_UNT_C_10 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_10_PPM_CGCR_OR , RULL(0x2A0F0167), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_PPM_CGCR , RULL(0x2B0F0165), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_PPM_CGCR_CLEAR , RULL(0x2B0F0166), SH_UNT_C_11 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_11_PPM_CGCR_OR , RULL(0x2B0F0167), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_PPM_CGCR , RULL(0x2C0F0165), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_PPM_CGCR_CLEAR , RULL(0x2C0F0166), SH_UNT_C_12 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_12_PPM_CGCR_OR , RULL(0x2C0F0167), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_PPM_CGCR , RULL(0x2D0F0165), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_PPM_CGCR_CLEAR , RULL(0x2D0F0166), SH_UNT_C_13 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_13_PPM_CGCR_OR , RULL(0x2D0F0167), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_PPM_CGCR , RULL(0x2E0F0165), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_PPM_CGCR_CLEAR , RULL(0x2E0F0166), SH_UNT_C_14 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_14_PPM_CGCR_OR , RULL(0x2E0F0167), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_PPM_CGCR , RULL(0x2F0F0165), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_PPM_CGCR_CLEAR , RULL(0x2F0F0166), SH_UNT_C_15 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_15_PPM_CGCR_OR , RULL(0x2F0F0167), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_PPM_CGCR , RULL(0x300F0165), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_PPM_CGCR_CLEAR , RULL(0x300F0166), SH_UNT_C_16 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_16_PPM_CGCR_OR , RULL(0x300F0167), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_PPM_CGCR , RULL(0x310F0165), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_PPM_CGCR_CLEAR , RULL(0x310F0166), SH_UNT_C_17 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_17_PPM_CGCR_OR , RULL(0x310F0167), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_PPM_CGCR , RULL(0x320F0165), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_PPM_CGCR_CLEAR , RULL(0x320F0166), SH_UNT_C_18 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_18_PPM_CGCR_OR , RULL(0x320F0167), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_PPM_CGCR , RULL(0x330F0165), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_PPM_CGCR_CLEAR , RULL(0x330F0166), SH_UNT_C_19 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_19_PPM_CGCR_OR , RULL(0x330F0167), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_PPM_CGCR , RULL(0x340F0165), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_PPM_CGCR_CLEAR , RULL(0x340F0166), SH_UNT_C_20 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_20_PPM_CGCR_OR , RULL(0x340F0167), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_PPM_CGCR , RULL(0x350F0165), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_PPM_CGCR_CLEAR , RULL(0x350F0166), SH_UNT_C_21 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_21_PPM_CGCR_OR , RULL(0x350F0167), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_PPM_CGCR , RULL(0x360F0165), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_PPM_CGCR_CLEAR , RULL(0x360F0166), SH_UNT_C_22 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_22_PPM_CGCR_OR , RULL(0x360F0167), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_PPM_CGCR , RULL(0x370F0165), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_PPM_CGCR_CLEAR , RULL(0x370F0166), SH_UNT_C_23 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_23_PPM_CGCR_OR , RULL(0x370F0167), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EQ_PPM_CGCR , RULL(0x100F0165), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_PPM_CGCR_CLEAR , RULL(0x100F0166), SH_UNT_EQ , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_PPM_CGCR_OR , RULL(0x100F0167), SH_UNT_EQ , SH_ACS_SCOM2_OR ); +REG64( EQ_0_PPM_CGCR , RULL(0x100F0165), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_0_PPM_CGCR_CLEAR , RULL(0x100F0166), SH_UNT_EQ_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_0_PPM_CGCR_OR , RULL(0x100F0167), SH_UNT_EQ_0 , SH_ACS_SCOM2_OR ); +REG64( EQ_1_PPM_CGCR , RULL(0x110F0165), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_1_PPM_CGCR_CLEAR , RULL(0x110F0166), SH_UNT_EQ_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_1_PPM_CGCR_OR , RULL(0x110F0167), SH_UNT_EQ_1 , SH_ACS_SCOM2_OR ); +REG64( EQ_2_PPM_CGCR , RULL(0x120F0165), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_2_PPM_CGCR_CLEAR , RULL(0x120F0166), SH_UNT_EQ_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_2_PPM_CGCR_OR , RULL(0x120F0167), SH_UNT_EQ_2 , SH_ACS_SCOM2_OR ); +REG64( EQ_3_PPM_CGCR , RULL(0x130F0165), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_3_PPM_CGCR_CLEAR , RULL(0x130F0166), SH_UNT_EQ_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_3_PPM_CGCR_OR , RULL(0x130F0167), SH_UNT_EQ_3 , SH_ACS_SCOM2_OR ); +REG64( EQ_4_PPM_CGCR , RULL(0x140F0165), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_4_PPM_CGCR_CLEAR , RULL(0x140F0166), SH_UNT_EQ_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_4_PPM_CGCR_OR , RULL(0x140F0167), SH_UNT_EQ_4 , SH_ACS_SCOM2_OR ); +REG64( EQ_5_PPM_CGCR , RULL(0x150F0165), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EQ_5_PPM_CGCR_CLEAR , RULL(0x150F0166), SH_UNT_EQ_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_5_PPM_CGCR_OR , RULL(0x150F0167), SH_UNT_EQ_5 , SH_ACS_SCOM2_OR ); +REG64( EX_PPM_CGCR , RULL(0x200F0165), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F0165, +REG64( EX_PPM_CGCR_CLEAR , RULL(0x200F0166), SH_UNT_EX , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F0166, +REG64( EX_PPM_CGCR_OR , RULL(0x200F0167), SH_UNT_EX , + SH_ACS_SCOM2_OR ); //DUPS: 210F0167, +REG64( EX_0_PPM_CGCR , RULL(0x200F0165), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F0165, +REG64( EX_0_PPM_CGCR_CLEAR , RULL(0x200F0166), SH_UNT_EX_0 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F0166, +REG64( EX_0_PPM_CGCR_OR , RULL(0x200F0167), SH_UNT_EX_0 , + SH_ACS_SCOM2_OR ); //DUPS: 210F0167, +REG64( EX_1_PPM_CGCR , RULL(0x230F0165), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F0165, +REG64( EX_1_PPM_CGCR_CLEAR , RULL(0x230F0166), SH_UNT_EX_1 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 220F0166, +REG64( EX_1_PPM_CGCR_OR , RULL(0x230F0167), SH_UNT_EX_1 , + SH_ACS_SCOM2_OR ); //DUPS: 220F0167, +REG64( EX_2_PPM_CGCR , RULL(0x240F0165), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F0165, +REG64( EX_2_PPM_CGCR_CLEAR , RULL(0x240F0166), SH_UNT_EX_2 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 250F0166, +REG64( EX_2_PPM_CGCR_OR , RULL(0x240F0167), SH_UNT_EX_2 , + SH_ACS_SCOM2_OR ); //DUPS: 250F0167, +REG64( EX_3_PPM_CGCR , RULL(0x260F0165), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F0165, +REG64( EX_3_PPM_CGCR_CLEAR , RULL(0x260F0166), SH_UNT_EX_3 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 270F0166, +REG64( EX_3_PPM_CGCR_OR , RULL(0x260F0167), SH_UNT_EX_3 , + SH_ACS_SCOM2_OR ); //DUPS: 270F0167, +REG64( EX_4_PPM_CGCR , RULL(0x280F0165), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F0165, +REG64( EX_4_PPM_CGCR_CLEAR , RULL(0x280F0166), SH_UNT_EX_4 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 290F0166, +REG64( EX_4_PPM_CGCR_OR , RULL(0x280F0167), SH_UNT_EX_4 , + SH_ACS_SCOM2_OR ); //DUPS: 290F0167, +REG64( EX_5_PPM_CGCR , RULL(0x2A0F0165), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F0165, +REG64( EX_5_PPM_CGCR_CLEAR , RULL(0x2A0F0166), SH_UNT_EX_5 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2B0F0166, +REG64( EX_5_PPM_CGCR_OR , RULL(0x2A0F0167), SH_UNT_EX_5 , + SH_ACS_SCOM2_OR ); //DUPS: 2B0F0167, +REG64( EX_6_PPM_CGCR , RULL(0x2C0F0165), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F0165, +REG64( EX_6_PPM_CGCR_CLEAR , RULL(0x2C0F0166), SH_UNT_EX_6 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2D0F0166, +REG64( EX_6_PPM_CGCR_OR , RULL(0x2C0F0167), SH_UNT_EX_6 , + SH_ACS_SCOM2_OR ); //DUPS: 2D0F0167, +REG64( EX_7_PPM_CGCR , RULL(0x2E0F0165), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F0165, +REG64( EX_7_PPM_CGCR_CLEAR , RULL(0x2E0F0166), SH_UNT_EX_7 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2F0F0166, +REG64( EX_7_PPM_CGCR_OR , RULL(0x2E0F0167), SH_UNT_EX_7 , + SH_ACS_SCOM2_OR ); //DUPS: 2F0F0167, +REG64( EX_8_PPM_CGCR , RULL(0x300F0165), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F0165, +REG64( EX_8_PPM_CGCR_CLEAR , RULL(0x300F0166), SH_UNT_EX_8 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 310F0166, +REG64( EX_8_PPM_CGCR_OR , RULL(0x300F0167), SH_UNT_EX_8 , + SH_ACS_SCOM2_OR ); //DUPS: 310F0167, +REG64( EX_9_PPM_CGCR , RULL(0x320F0165), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F0165, +REG64( EX_9_PPM_CGCR_CLEAR , RULL(0x320F0166), SH_UNT_EX_9 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 330F0166, +REG64( EX_9_PPM_CGCR_OR , RULL(0x320F0167), SH_UNT_EX_9 , + SH_ACS_SCOM2_OR ); //DUPS: 330F0167, +REG64( EX_10_PPM_CGCR , RULL(0x340F0165), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F0165, +REG64( EX_10_PPM_CGCR_CLEAR , RULL(0x340F0166), SH_UNT_EX_10 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 350F0166, +REG64( EX_10_PPM_CGCR_OR , RULL(0x340F0167), SH_UNT_EX_10 , + SH_ACS_SCOM2_OR ); //DUPS: 350F0167, +REG64( EX_11_PPM_CGCR , RULL(0x360F0165), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F0165, +REG64( EX_11_PPM_CGCR_CLEAR , RULL(0x360F0166), SH_UNT_EX_11 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 370F0166, +REG64( EX_11_PPM_CGCR_OR , RULL(0x360F0167), SH_UNT_EX_11 , + SH_ACS_SCOM2_OR ); //DUPS: 370F0167, + +REG64( C_PPM_GPMMR_SCOM , RULL(0x200F0100), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_PPM_GPMMR_SCOM1 , RULL(0x200F0101), SH_UNT_C , SH_ACS_SCOM1 ); +REG64( C_PPM_GPMMR_SCOM2 , RULL(0x200F0102), SH_UNT_C , SH_ACS_SCOM2 ); +REG64( C_0_PPM_GPMMR_SCOM , RULL(0x200F0100), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_0_PPM_GPMMR_SCOM1 , RULL(0x200F0101), SH_UNT_C_0 , SH_ACS_SCOM1 ); +REG64( C_0_PPM_GPMMR_SCOM2 , RULL(0x200F0102), SH_UNT_C_0 , SH_ACS_SCOM2 ); +REG64( C_1_PPM_GPMMR_SCOM , RULL(0x210F0100), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_1_PPM_GPMMR_SCOM1 , RULL(0x210F0101), SH_UNT_C_1 , SH_ACS_SCOM1 ); +REG64( C_1_PPM_GPMMR_SCOM2 , RULL(0x210F0102), SH_UNT_C_1 , SH_ACS_SCOM2 ); +REG64( C_2_PPM_GPMMR_SCOM , RULL(0x220F0100), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_2_PPM_GPMMR_SCOM1 , RULL(0x220F0101), SH_UNT_C_2 , SH_ACS_SCOM1 ); +REG64( C_2_PPM_GPMMR_SCOM2 , RULL(0x220F0102), SH_UNT_C_2 , SH_ACS_SCOM2 ); +REG64( C_3_PPM_GPMMR_SCOM , RULL(0x230F0100), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_3_PPM_GPMMR_SCOM1 , RULL(0x230F0101), SH_UNT_C_3 , SH_ACS_SCOM1 ); +REG64( C_3_PPM_GPMMR_SCOM2 , RULL(0x230F0102), SH_UNT_C_3 , SH_ACS_SCOM2 ); +REG64( C_4_PPM_GPMMR_SCOM , RULL(0x240F0100), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_4_PPM_GPMMR_SCOM1 , RULL(0x240F0101), SH_UNT_C_4 , SH_ACS_SCOM1 ); +REG64( C_4_PPM_GPMMR_SCOM2 , RULL(0x240F0102), SH_UNT_C_4 , SH_ACS_SCOM2 ); +REG64( C_5_PPM_GPMMR_SCOM , RULL(0x250F0100), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_5_PPM_GPMMR_SCOM1 , RULL(0x250F0101), SH_UNT_C_5 , SH_ACS_SCOM1 ); +REG64( C_5_PPM_GPMMR_SCOM2 , RULL(0x250F0102), SH_UNT_C_5 , SH_ACS_SCOM2 ); +REG64( C_6_PPM_GPMMR_SCOM , RULL(0x260F0100), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_6_PPM_GPMMR_SCOM1 , RULL(0x260F0101), SH_UNT_C_6 , SH_ACS_SCOM1 ); +REG64( C_6_PPM_GPMMR_SCOM2 , RULL(0x260F0102), SH_UNT_C_6 , SH_ACS_SCOM2 ); +REG64( C_7_PPM_GPMMR_SCOM , RULL(0x270F0100), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_7_PPM_GPMMR_SCOM1 , RULL(0x270F0101), SH_UNT_C_7 , SH_ACS_SCOM1 ); +REG64( C_7_PPM_GPMMR_SCOM2 , RULL(0x270F0102), SH_UNT_C_7 , SH_ACS_SCOM2 ); +REG64( C_8_PPM_GPMMR_SCOM , RULL(0x280F0100), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_8_PPM_GPMMR_SCOM1 , RULL(0x280F0101), SH_UNT_C_8 , SH_ACS_SCOM1 ); +REG64( C_8_PPM_GPMMR_SCOM2 , RULL(0x280F0102), SH_UNT_C_8 , SH_ACS_SCOM2 ); +REG64( C_9_PPM_GPMMR_SCOM , RULL(0x290F0100), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_9_PPM_GPMMR_SCOM1 , RULL(0x290F0101), SH_UNT_C_9 , SH_ACS_SCOM1 ); +REG64( C_9_PPM_GPMMR_SCOM2 , RULL(0x290F0102), SH_UNT_C_9 , SH_ACS_SCOM2 ); +REG64( C_10_PPM_GPMMR_SCOM , RULL(0x2A0F0100), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_10_PPM_GPMMR_SCOM1 , RULL(0x2A0F0101), SH_UNT_C_10 , SH_ACS_SCOM1 ); +REG64( C_10_PPM_GPMMR_SCOM2 , RULL(0x2A0F0102), SH_UNT_C_10 , SH_ACS_SCOM2 ); +REG64( C_11_PPM_GPMMR_SCOM , RULL(0x2B0F0100), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_11_PPM_GPMMR_SCOM1 , RULL(0x2B0F0101), SH_UNT_C_11 , SH_ACS_SCOM1 ); +REG64( C_11_PPM_GPMMR_SCOM2 , RULL(0x2B0F0102), SH_UNT_C_11 , SH_ACS_SCOM2 ); +REG64( C_12_PPM_GPMMR_SCOM , RULL(0x2C0F0100), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_12_PPM_GPMMR_SCOM1 , RULL(0x2C0F0101), SH_UNT_C_12 , SH_ACS_SCOM1 ); +REG64( C_12_PPM_GPMMR_SCOM2 , RULL(0x2C0F0102), SH_UNT_C_12 , SH_ACS_SCOM2 ); +REG64( C_13_PPM_GPMMR_SCOM , RULL(0x2D0F0100), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_13_PPM_GPMMR_SCOM1 , RULL(0x2D0F0101), SH_UNT_C_13 , SH_ACS_SCOM1 ); +REG64( C_13_PPM_GPMMR_SCOM2 , RULL(0x2D0F0102), SH_UNT_C_13 , SH_ACS_SCOM2 ); +REG64( C_14_PPM_GPMMR_SCOM , RULL(0x2E0F0100), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_14_PPM_GPMMR_SCOM1 , RULL(0x2E0F0101), SH_UNT_C_14 , SH_ACS_SCOM1 ); +REG64( C_14_PPM_GPMMR_SCOM2 , RULL(0x2E0F0102), SH_UNT_C_14 , SH_ACS_SCOM2 ); +REG64( C_15_PPM_GPMMR_SCOM , RULL(0x2F0F0100), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_15_PPM_GPMMR_SCOM1 , RULL(0x2F0F0101), SH_UNT_C_15 , SH_ACS_SCOM1 ); +REG64( C_15_PPM_GPMMR_SCOM2 , RULL(0x2F0F0102), SH_UNT_C_15 , SH_ACS_SCOM2 ); +REG64( C_16_PPM_GPMMR_SCOM , RULL(0x300F0100), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_16_PPM_GPMMR_SCOM1 , RULL(0x300F0101), SH_UNT_C_16 , SH_ACS_SCOM1 ); +REG64( C_16_PPM_GPMMR_SCOM2 , RULL(0x300F0102), SH_UNT_C_16 , SH_ACS_SCOM2 ); +REG64( C_17_PPM_GPMMR_SCOM , RULL(0x310F0100), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_17_PPM_GPMMR_SCOM1 , RULL(0x310F0101), SH_UNT_C_17 , SH_ACS_SCOM1 ); +REG64( C_17_PPM_GPMMR_SCOM2 , RULL(0x310F0102), SH_UNT_C_17 , SH_ACS_SCOM2 ); +REG64( C_18_PPM_GPMMR_SCOM , RULL(0x320F0100), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_18_PPM_GPMMR_SCOM1 , RULL(0x320F0101), SH_UNT_C_18 , SH_ACS_SCOM1 ); +REG64( C_18_PPM_GPMMR_SCOM2 , RULL(0x320F0102), SH_UNT_C_18 , SH_ACS_SCOM2 ); +REG64( C_19_PPM_GPMMR_SCOM , RULL(0x330F0100), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_19_PPM_GPMMR_SCOM1 , RULL(0x330F0101), SH_UNT_C_19 , SH_ACS_SCOM1 ); +REG64( C_19_PPM_GPMMR_SCOM2 , RULL(0x330F0102), SH_UNT_C_19 , SH_ACS_SCOM2 ); +REG64( C_20_PPM_GPMMR_SCOM , RULL(0x340F0100), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_20_PPM_GPMMR_SCOM1 , RULL(0x340F0101), SH_UNT_C_20 , SH_ACS_SCOM1 ); +REG64( C_20_PPM_GPMMR_SCOM2 , RULL(0x340F0102), SH_UNT_C_20 , SH_ACS_SCOM2 ); +REG64( C_21_PPM_GPMMR_SCOM , RULL(0x350F0100), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_21_PPM_GPMMR_SCOM1 , RULL(0x350F0101), SH_UNT_C_21 , SH_ACS_SCOM1 ); +REG64( C_21_PPM_GPMMR_SCOM2 , RULL(0x350F0102), SH_UNT_C_21 , SH_ACS_SCOM2 ); +REG64( C_22_PPM_GPMMR_SCOM , RULL(0x360F0100), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_22_PPM_GPMMR_SCOM1 , RULL(0x360F0101), SH_UNT_C_22 , SH_ACS_SCOM1 ); +REG64( C_22_PPM_GPMMR_SCOM2 , RULL(0x360F0102), SH_UNT_C_22 , SH_ACS_SCOM2 ); +REG64( C_23_PPM_GPMMR_SCOM , RULL(0x370F0100), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( C_23_PPM_GPMMR_SCOM1 , RULL(0x370F0101), SH_UNT_C_23 , SH_ACS_SCOM1 ); +REG64( C_23_PPM_GPMMR_SCOM2 , RULL(0x370F0102), SH_UNT_C_23 , SH_ACS_SCOM2 ); +REG64( EQ_PPM_GPMMR_SCOM , RULL(0x100F0100), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_PPM_GPMMR_SCOM1 , RULL(0x100F0101), SH_UNT_EQ , SH_ACS_SCOM1 ); +REG64( EQ_PPM_GPMMR_SCOM2 , RULL(0x100F0102), SH_UNT_EQ , SH_ACS_SCOM2 ); +REG64( EQ_0_PPM_GPMMR_SCOM , RULL(0x100F0100), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_0_PPM_GPMMR_SCOM1 , RULL(0x100F0101), SH_UNT_EQ_0 , SH_ACS_SCOM1 ); +REG64( EQ_0_PPM_GPMMR_SCOM2 , RULL(0x100F0102), SH_UNT_EQ_0 , SH_ACS_SCOM2 ); +REG64( EQ_1_PPM_GPMMR_SCOM , RULL(0x110F0100), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_1_PPM_GPMMR_SCOM1 , RULL(0x110F0101), SH_UNT_EQ_1 , SH_ACS_SCOM1 ); +REG64( EQ_1_PPM_GPMMR_SCOM2 , RULL(0x110F0102), SH_UNT_EQ_1 , SH_ACS_SCOM2 ); +REG64( EQ_2_PPM_GPMMR_SCOM , RULL(0x120F0100), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_2_PPM_GPMMR_SCOM1 , RULL(0x120F0101), SH_UNT_EQ_2 , SH_ACS_SCOM1 ); +REG64( EQ_2_PPM_GPMMR_SCOM2 , RULL(0x120F0102), SH_UNT_EQ_2 , SH_ACS_SCOM2 ); +REG64( EQ_3_PPM_GPMMR_SCOM , RULL(0x130F0100), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_3_PPM_GPMMR_SCOM1 , RULL(0x130F0101), SH_UNT_EQ_3 , SH_ACS_SCOM1 ); +REG64( EQ_3_PPM_GPMMR_SCOM2 , RULL(0x130F0102), SH_UNT_EQ_3 , SH_ACS_SCOM2 ); +REG64( EQ_4_PPM_GPMMR_SCOM , RULL(0x140F0100), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_4_PPM_GPMMR_SCOM1 , RULL(0x140F0101), SH_UNT_EQ_4 , SH_ACS_SCOM1 ); +REG64( EQ_4_PPM_GPMMR_SCOM2 , RULL(0x140F0102), SH_UNT_EQ_4 , SH_ACS_SCOM2 ); +REG64( EQ_5_PPM_GPMMR_SCOM , RULL(0x150F0100), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EQ_5_PPM_GPMMR_SCOM1 , RULL(0x150F0101), SH_UNT_EQ_5 , SH_ACS_SCOM1 ); +REG64( EQ_5_PPM_GPMMR_SCOM2 , RULL(0x150F0102), SH_UNT_EQ_5 , SH_ACS_SCOM2 ); +REG64( EX_PPM_GPMMR_SCOM , RULL(0x200F0100), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0100, +REG64( EX_PPM_GPMMR_SCOM1 , RULL(0x200F0101), SH_UNT_EX , + SH_ACS_SCOM1 ); //DUPS: 210F0101, +REG64( EX_PPM_GPMMR_SCOM2 , RULL(0x200F0102), SH_UNT_EX , + SH_ACS_SCOM2 ); //DUPS: 210F0102, +REG64( EX_0_PPM_GPMMR_SCOM , RULL(0x200F0100), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0100, +REG64( EX_0_PPM_GPMMR_SCOM1 , RULL(0x200F0101), SH_UNT_EX_0 , + SH_ACS_SCOM1 ); //DUPS: 210F0101, +REG64( EX_0_PPM_GPMMR_SCOM2 , RULL(0x200F0102), SH_UNT_EX_0 , + SH_ACS_SCOM2 ); //DUPS: 210F0102, +REG64( EX_1_PPM_GPMMR_SCOM , RULL(0x230F0100), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0100, +REG64( EX_1_PPM_GPMMR_SCOM1 , RULL(0x230F0101), SH_UNT_EX_1 , + SH_ACS_SCOM1 ); //DUPS: 220F0101, +REG64( EX_1_PPM_GPMMR_SCOM2 , RULL(0x230F0102), SH_UNT_EX_1 , + SH_ACS_SCOM2 ); //DUPS: 220F0102, +REG64( EX_2_PPM_GPMMR_SCOM , RULL(0x240F0100), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0100, +REG64( EX_2_PPM_GPMMR_SCOM1 , RULL(0x240F0101), SH_UNT_EX_2 , + SH_ACS_SCOM1 ); //DUPS: 250F0101, +REG64( EX_2_PPM_GPMMR_SCOM2 , RULL(0x240F0102), SH_UNT_EX_2 , + SH_ACS_SCOM2 ); //DUPS: 250F0102, +REG64( EX_3_PPM_GPMMR_SCOM , RULL(0x260F0100), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0100, +REG64( EX_3_PPM_GPMMR_SCOM1 , RULL(0x260F0101), SH_UNT_EX_3 , + SH_ACS_SCOM1 ); //DUPS: 270F0101, +REG64( EX_3_PPM_GPMMR_SCOM2 , RULL(0x260F0102), SH_UNT_EX_3 , + SH_ACS_SCOM2 ); //DUPS: 270F0102, +REG64( EX_4_PPM_GPMMR_SCOM , RULL(0x280F0100), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0100, +REG64( EX_4_PPM_GPMMR_SCOM1 , RULL(0x280F0101), SH_UNT_EX_4 , + SH_ACS_SCOM1 ); //DUPS: 290F0101, +REG64( EX_4_PPM_GPMMR_SCOM2 , RULL(0x280F0102), SH_UNT_EX_4 , + SH_ACS_SCOM2 ); //DUPS: 290F0102, +REG64( EX_5_PPM_GPMMR_SCOM , RULL(0x2A0F0100), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0100, +REG64( EX_5_PPM_GPMMR_SCOM1 , RULL(0x2A0F0101), SH_UNT_EX_5 , + SH_ACS_SCOM1 ); //DUPS: 2B0F0101, +REG64( EX_5_PPM_GPMMR_SCOM2 , RULL(0x2A0F0102), SH_UNT_EX_5 , + SH_ACS_SCOM2 ); //DUPS: 2B0F0102, +REG64( EX_6_PPM_GPMMR_SCOM , RULL(0x2C0F0100), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0100, +REG64( EX_6_PPM_GPMMR_SCOM1 , RULL(0x2C0F0101), SH_UNT_EX_6 , + SH_ACS_SCOM1 ); //DUPS: 2D0F0101, +REG64( EX_6_PPM_GPMMR_SCOM2 , RULL(0x2C0F0102), SH_UNT_EX_6 , + SH_ACS_SCOM2 ); //DUPS: 2D0F0102, +REG64( EX_7_PPM_GPMMR_SCOM , RULL(0x2E0F0100), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0100, +REG64( EX_7_PPM_GPMMR_SCOM1 , RULL(0x2E0F0101), SH_UNT_EX_7 , + SH_ACS_SCOM1 ); //DUPS: 2F0F0101, +REG64( EX_7_PPM_GPMMR_SCOM2 , RULL(0x2E0F0102), SH_UNT_EX_7 , + SH_ACS_SCOM2 ); //DUPS: 2F0F0102, +REG64( EX_8_PPM_GPMMR_SCOM , RULL(0x300F0100), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0100, +REG64( EX_8_PPM_GPMMR_SCOM1 , RULL(0x300F0101), SH_UNT_EX_8 , + SH_ACS_SCOM1 ); //DUPS: 310F0101, +REG64( EX_8_PPM_GPMMR_SCOM2 , RULL(0x300F0102), SH_UNT_EX_8 , + SH_ACS_SCOM2 ); //DUPS: 310F0102, +REG64( EX_9_PPM_GPMMR_SCOM , RULL(0x320F0100), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0100, +REG64( EX_9_PPM_GPMMR_SCOM1 , RULL(0x320F0101), SH_UNT_EX_9 , + SH_ACS_SCOM1 ); //DUPS: 330F0101, +REG64( EX_9_PPM_GPMMR_SCOM2 , RULL(0x320F0102), SH_UNT_EX_9 , + SH_ACS_SCOM2 ); //DUPS: 330F0102, +REG64( EX_10_PPM_GPMMR_SCOM , RULL(0x340F0100), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0100, +REG64( EX_10_PPM_GPMMR_SCOM1 , RULL(0x340F0101), SH_UNT_EX_10 , + SH_ACS_SCOM1 ); //DUPS: 350F0101, +REG64( EX_10_PPM_GPMMR_SCOM2 , RULL(0x340F0102), SH_UNT_EX_10 , + SH_ACS_SCOM2 ); //DUPS: 350F0102, +REG64( EX_11_PPM_GPMMR_SCOM , RULL(0x360F0100), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0100, +REG64( EX_11_PPM_GPMMR_SCOM1 , RULL(0x360F0101), SH_UNT_EX_11 , + SH_ACS_SCOM1 ); //DUPS: 370F0101, +REG64( EX_11_PPM_GPMMR_SCOM2 , RULL(0x360F0102), SH_UNT_EX_11 , + SH_ACS_SCOM2 ); //DUPS: 370F0102, + +REG64( C_PPM_IVRMAVR , RULL(0x200F01B5), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_PPM_IVRMAVR , RULL(0x200F01B5), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_PPM_IVRMAVR , RULL(0x210F01B5), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_PPM_IVRMAVR , RULL(0x220F01B5), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_PPM_IVRMAVR , RULL(0x230F01B5), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_PPM_IVRMAVR , RULL(0x240F01B5), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_PPM_IVRMAVR , RULL(0x250F01B5), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_PPM_IVRMAVR , RULL(0x260F01B5), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_PPM_IVRMAVR , RULL(0x270F01B5), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_PPM_IVRMAVR , RULL(0x280F01B5), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_PPM_IVRMAVR , RULL(0x290F01B5), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_PPM_IVRMAVR , RULL(0x2A0F01B5), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_PPM_IVRMAVR , RULL(0x2B0F01B5), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_PPM_IVRMAVR , RULL(0x2C0F01B5), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_PPM_IVRMAVR , RULL(0x2D0F01B5), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_PPM_IVRMAVR , RULL(0x2E0F01B5), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_PPM_IVRMAVR , RULL(0x2F0F01B5), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_PPM_IVRMAVR , RULL(0x300F01B5), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_PPM_IVRMAVR , RULL(0x310F01B5), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_PPM_IVRMAVR , RULL(0x320F01B5), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_PPM_IVRMAVR , RULL(0x330F01B5), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_PPM_IVRMAVR , RULL(0x340F01B5), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_PPM_IVRMAVR , RULL(0x350F01B5), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_PPM_IVRMAVR , RULL(0x360F01B5), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_PPM_IVRMAVR , RULL(0x370F01B5), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_PPM_IVRMAVR , RULL(0x100F01B5), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_PPM_IVRMAVR , RULL(0x100F01B5), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_PPM_IVRMAVR , RULL(0x110F01B5), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_PPM_IVRMAVR , RULL(0x120F01B5), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_PPM_IVRMAVR , RULL(0x130F01B5), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_PPM_IVRMAVR , RULL(0x140F01B5), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_PPM_IVRMAVR , RULL(0x150F01B5), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_PPM_IVRMAVR , RULL(0x200F01B5), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F01B5, +REG64( EX_0_PPM_IVRMAVR , RULL(0x200F01B5), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F01B5, +REG64( EX_1_PPM_IVRMAVR , RULL(0x230F01B5), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F01B5, +REG64( EX_2_PPM_IVRMAVR , RULL(0x240F01B5), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F01B5, +REG64( EX_3_PPM_IVRMAVR , RULL(0x260F01B5), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F01B5, +REG64( EX_4_PPM_IVRMAVR , RULL(0x280F01B5), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F01B5, +REG64( EX_5_PPM_IVRMAVR , RULL(0x2A0F01B5), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F01B5, +REG64( EX_6_PPM_IVRMAVR , RULL(0x2C0F01B5), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F01B5, +REG64( EX_7_PPM_IVRMAVR , RULL(0x2E0F01B5), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F01B5, +REG64( EX_8_PPM_IVRMAVR , RULL(0x300F01B5), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F01B5, +REG64( EX_9_PPM_IVRMAVR , RULL(0x320F01B5), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F01B5, +REG64( EX_10_PPM_IVRMAVR , RULL(0x340F01B5), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F01B5, +REG64( EX_11_PPM_IVRMAVR , RULL(0x360F01B5), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F01B5, + +REG64( C_PPM_IVRMCR , RULL(0x200F01B0), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_PPM_IVRMCR_CLEAR , RULL(0x200F01B1), SH_UNT_C , + SH_ACS_SCOM1_CLEAR ); +REG64( C_PPM_IVRMCR_OR , RULL(0x200F01B2), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_PPM_IVRMCR , RULL(0x200F01B0), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_PPM_IVRMCR_CLEAR , RULL(0x200F01B1), SH_UNT_C_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_0_PPM_IVRMCR_OR , RULL(0x200F01B2), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_PPM_IVRMCR , RULL(0x210F01B0), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_PPM_IVRMCR_CLEAR , RULL(0x210F01B1), SH_UNT_C_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_1_PPM_IVRMCR_OR , RULL(0x210F01B2), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_PPM_IVRMCR , RULL(0x220F01B0), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_PPM_IVRMCR_CLEAR , RULL(0x220F01B1), SH_UNT_C_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_2_PPM_IVRMCR_OR , RULL(0x220F01B2), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_PPM_IVRMCR , RULL(0x230F01B0), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_PPM_IVRMCR_CLEAR , RULL(0x230F01B1), SH_UNT_C_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_3_PPM_IVRMCR_OR , RULL(0x230F01B2), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_PPM_IVRMCR , RULL(0x240F01B0), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_PPM_IVRMCR_CLEAR , RULL(0x240F01B1), SH_UNT_C_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_4_PPM_IVRMCR_OR , RULL(0x240F01B2), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_PPM_IVRMCR , RULL(0x250F01B0), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_PPM_IVRMCR_CLEAR , RULL(0x250F01B1), SH_UNT_C_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_5_PPM_IVRMCR_OR , RULL(0x250F01B2), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_PPM_IVRMCR , RULL(0x260F01B0), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_PPM_IVRMCR_CLEAR , RULL(0x260F01B1), SH_UNT_C_6 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_6_PPM_IVRMCR_OR , RULL(0x260F01B2), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_PPM_IVRMCR , RULL(0x270F01B0), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_PPM_IVRMCR_CLEAR , RULL(0x270F01B1), SH_UNT_C_7 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_7_PPM_IVRMCR_OR , RULL(0x270F01B2), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_PPM_IVRMCR , RULL(0x280F01B0), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_PPM_IVRMCR_CLEAR , RULL(0x280F01B1), SH_UNT_C_8 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_8_PPM_IVRMCR_OR , RULL(0x280F01B2), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_PPM_IVRMCR , RULL(0x290F01B0), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_PPM_IVRMCR_CLEAR , RULL(0x290F01B1), SH_UNT_C_9 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_9_PPM_IVRMCR_OR , RULL(0x290F01B2), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_PPM_IVRMCR , RULL(0x2A0F01B0), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_PPM_IVRMCR_CLEAR , RULL(0x2A0F01B1), SH_UNT_C_10 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_10_PPM_IVRMCR_OR , RULL(0x2A0F01B2), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_PPM_IVRMCR , RULL(0x2B0F01B0), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_PPM_IVRMCR_CLEAR , RULL(0x2B0F01B1), SH_UNT_C_11 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_11_PPM_IVRMCR_OR , RULL(0x2B0F01B2), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_PPM_IVRMCR , RULL(0x2C0F01B0), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_PPM_IVRMCR_CLEAR , RULL(0x2C0F01B1), SH_UNT_C_12 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_12_PPM_IVRMCR_OR , RULL(0x2C0F01B2), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_PPM_IVRMCR , RULL(0x2D0F01B0), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_PPM_IVRMCR_CLEAR , RULL(0x2D0F01B1), SH_UNT_C_13 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_13_PPM_IVRMCR_OR , RULL(0x2D0F01B2), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_PPM_IVRMCR , RULL(0x2E0F01B0), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_PPM_IVRMCR_CLEAR , RULL(0x2E0F01B1), SH_UNT_C_14 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_14_PPM_IVRMCR_OR , RULL(0x2E0F01B2), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_PPM_IVRMCR , RULL(0x2F0F01B0), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_PPM_IVRMCR_CLEAR , RULL(0x2F0F01B1), SH_UNT_C_15 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_15_PPM_IVRMCR_OR , RULL(0x2F0F01B2), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_PPM_IVRMCR , RULL(0x300F01B0), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_PPM_IVRMCR_CLEAR , RULL(0x300F01B1), SH_UNT_C_16 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_16_PPM_IVRMCR_OR , RULL(0x300F01B2), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_PPM_IVRMCR , RULL(0x310F01B0), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_PPM_IVRMCR_CLEAR , RULL(0x310F01B1), SH_UNT_C_17 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_17_PPM_IVRMCR_OR , RULL(0x310F01B2), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_PPM_IVRMCR , RULL(0x320F01B0), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_PPM_IVRMCR_CLEAR , RULL(0x320F01B1), SH_UNT_C_18 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_18_PPM_IVRMCR_OR , RULL(0x320F01B2), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_PPM_IVRMCR , RULL(0x330F01B0), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_PPM_IVRMCR_CLEAR , RULL(0x330F01B1), SH_UNT_C_19 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_19_PPM_IVRMCR_OR , RULL(0x330F01B2), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_PPM_IVRMCR , RULL(0x340F01B0), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_PPM_IVRMCR_CLEAR , RULL(0x340F01B1), SH_UNT_C_20 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_20_PPM_IVRMCR_OR , RULL(0x340F01B2), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_PPM_IVRMCR , RULL(0x350F01B0), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_PPM_IVRMCR_CLEAR , RULL(0x350F01B1), SH_UNT_C_21 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_21_PPM_IVRMCR_OR , RULL(0x350F01B2), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_PPM_IVRMCR , RULL(0x360F01B0), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_PPM_IVRMCR_CLEAR , RULL(0x360F01B1), SH_UNT_C_22 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_22_PPM_IVRMCR_OR , RULL(0x360F01B2), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_PPM_IVRMCR , RULL(0x370F01B0), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_PPM_IVRMCR_CLEAR , RULL(0x370F01B1), SH_UNT_C_23 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_23_PPM_IVRMCR_OR , RULL(0x370F01B2), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EQ_PPM_IVRMCR , RULL(0x100F01B0), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_PPM_IVRMCR_CLEAR , RULL(0x100F01B1), SH_UNT_EQ , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_PPM_IVRMCR_OR , RULL(0x100F01B2), SH_UNT_EQ , SH_ACS_SCOM2_OR ); +REG64( EQ_0_PPM_IVRMCR , RULL(0x100F01B0), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_0_PPM_IVRMCR_CLEAR , RULL(0x100F01B1), SH_UNT_EQ_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_0_PPM_IVRMCR_OR , RULL(0x100F01B2), SH_UNT_EQ_0 , SH_ACS_SCOM2_OR ); +REG64( EQ_1_PPM_IVRMCR , RULL(0x110F01B0), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_1_PPM_IVRMCR_CLEAR , RULL(0x110F01B1), SH_UNT_EQ_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_1_PPM_IVRMCR_OR , RULL(0x110F01B2), SH_UNT_EQ_1 , SH_ACS_SCOM2_OR ); +REG64( EQ_2_PPM_IVRMCR , RULL(0x120F01B0), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_2_PPM_IVRMCR_CLEAR , RULL(0x120F01B1), SH_UNT_EQ_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_2_PPM_IVRMCR_OR , RULL(0x120F01B2), SH_UNT_EQ_2 , SH_ACS_SCOM2_OR ); +REG64( EQ_3_PPM_IVRMCR , RULL(0x130F01B0), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_3_PPM_IVRMCR_CLEAR , RULL(0x130F01B1), SH_UNT_EQ_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_3_PPM_IVRMCR_OR , RULL(0x130F01B2), SH_UNT_EQ_3 , SH_ACS_SCOM2_OR ); +REG64( EQ_4_PPM_IVRMCR , RULL(0x140F01B0), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_4_PPM_IVRMCR_CLEAR , RULL(0x140F01B1), SH_UNT_EQ_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_4_PPM_IVRMCR_OR , RULL(0x140F01B2), SH_UNT_EQ_4 , SH_ACS_SCOM2_OR ); +REG64( EQ_5_PPM_IVRMCR , RULL(0x150F01B0), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EQ_5_PPM_IVRMCR_CLEAR , RULL(0x150F01B1), SH_UNT_EQ_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_5_PPM_IVRMCR_OR , RULL(0x150F01B2), SH_UNT_EQ_5 , SH_ACS_SCOM2_OR ); +REG64( EX_PPM_IVRMCR , RULL(0x200F01B0), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F01B0, +REG64( EX_PPM_IVRMCR_CLEAR , RULL(0x200F01B1), SH_UNT_EX , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F01B1, +REG64( EX_PPM_IVRMCR_OR , RULL(0x200F01B2), SH_UNT_EX , + SH_ACS_SCOM2_OR ); //DUPS: 210F01B2, +REG64( EX_0_PPM_IVRMCR , RULL(0x200F01B0), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F01B0, +REG64( EX_0_PPM_IVRMCR_CLEAR , RULL(0x200F01B1), SH_UNT_EX_0 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F01B1, +REG64( EX_0_PPM_IVRMCR_OR , RULL(0x200F01B2), SH_UNT_EX_0 , + SH_ACS_SCOM2_OR ); //DUPS: 210F01B2, +REG64( EX_1_PPM_IVRMCR , RULL(0x230F01B0), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F01B0, +REG64( EX_1_PPM_IVRMCR_CLEAR , RULL(0x230F01B1), SH_UNT_EX_1 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 220F01B1, +REG64( EX_1_PPM_IVRMCR_OR , RULL(0x230F01B2), SH_UNT_EX_1 , + SH_ACS_SCOM2_OR ); //DUPS: 220F01B2, +REG64( EX_2_PPM_IVRMCR , RULL(0x240F01B0), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F01B0, +REG64( EX_2_PPM_IVRMCR_CLEAR , RULL(0x240F01B1), SH_UNT_EX_2 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 250F01B1, +REG64( EX_2_PPM_IVRMCR_OR , RULL(0x240F01B2), SH_UNT_EX_2 , + SH_ACS_SCOM2_OR ); //DUPS: 250F01B2, +REG64( EX_3_PPM_IVRMCR , RULL(0x260F01B0), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F01B0, +REG64( EX_3_PPM_IVRMCR_CLEAR , RULL(0x260F01B1), SH_UNT_EX_3 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 270F01B1, +REG64( EX_3_PPM_IVRMCR_OR , RULL(0x260F01B2), SH_UNT_EX_3 , + SH_ACS_SCOM2_OR ); //DUPS: 270F01B2, +REG64( EX_4_PPM_IVRMCR , RULL(0x280F01B0), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F01B0, +REG64( EX_4_PPM_IVRMCR_CLEAR , RULL(0x280F01B1), SH_UNT_EX_4 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 290F01B1, +REG64( EX_4_PPM_IVRMCR_OR , RULL(0x280F01B2), SH_UNT_EX_4 , + SH_ACS_SCOM2_OR ); //DUPS: 290F01B2, +REG64( EX_5_PPM_IVRMCR , RULL(0x2A0F01B0), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F01B0, +REG64( EX_5_PPM_IVRMCR_CLEAR , RULL(0x2A0F01B1), SH_UNT_EX_5 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2B0F01B1, +REG64( EX_5_PPM_IVRMCR_OR , RULL(0x2A0F01B2), SH_UNT_EX_5 , + SH_ACS_SCOM2_OR ); //DUPS: 2B0F01B2, +REG64( EX_6_PPM_IVRMCR , RULL(0x2C0F01B0), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F01B0, +REG64( EX_6_PPM_IVRMCR_CLEAR , RULL(0x2C0F01B1), SH_UNT_EX_6 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2D0F01B1, +REG64( EX_6_PPM_IVRMCR_OR , RULL(0x2C0F01B2), SH_UNT_EX_6 , + SH_ACS_SCOM2_OR ); //DUPS: 2D0F01B2, +REG64( EX_7_PPM_IVRMCR , RULL(0x2E0F01B0), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F01B0, +REG64( EX_7_PPM_IVRMCR_CLEAR , RULL(0x2E0F01B1), SH_UNT_EX_7 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2F0F01B1, +REG64( EX_7_PPM_IVRMCR_OR , RULL(0x2E0F01B2), SH_UNT_EX_7 , + SH_ACS_SCOM2_OR ); //DUPS: 2F0F01B2, +REG64( EX_8_PPM_IVRMCR , RULL(0x300F01B0), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F01B0, +REG64( EX_8_PPM_IVRMCR_CLEAR , RULL(0x300F01B1), SH_UNT_EX_8 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 310F01B1, +REG64( EX_8_PPM_IVRMCR_OR , RULL(0x300F01B2), SH_UNT_EX_8 , + SH_ACS_SCOM2_OR ); //DUPS: 310F01B2, +REG64( EX_9_PPM_IVRMCR , RULL(0x320F01B0), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F01B0, +REG64( EX_9_PPM_IVRMCR_CLEAR , RULL(0x320F01B1), SH_UNT_EX_9 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 330F01B1, +REG64( EX_9_PPM_IVRMCR_OR , RULL(0x320F01B2), SH_UNT_EX_9 , + SH_ACS_SCOM2_OR ); //DUPS: 330F01B2, +REG64( EX_10_PPM_IVRMCR , RULL(0x340F01B0), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F01B0, +REG64( EX_10_PPM_IVRMCR_CLEAR , RULL(0x340F01B1), SH_UNT_EX_10 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 350F01B1, +REG64( EX_10_PPM_IVRMCR_OR , RULL(0x340F01B2), SH_UNT_EX_10 , + SH_ACS_SCOM2_OR ); //DUPS: 350F01B2, +REG64( EX_11_PPM_IVRMCR , RULL(0x360F01B0), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F01B0, +REG64( EX_11_PPM_IVRMCR_CLEAR , RULL(0x360F01B1), SH_UNT_EX_11 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 370F01B1, +REG64( EX_11_PPM_IVRMCR_OR , RULL(0x360F01B2), SH_UNT_EX_11 , + SH_ACS_SCOM2_OR ); //DUPS: 370F01B2, + +REG64( C_PPM_IVRMDVR , RULL(0x200F01B4), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_PPM_IVRMDVR , RULL(0x200F01B4), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_PPM_IVRMDVR , RULL(0x210F01B4), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_PPM_IVRMDVR , RULL(0x220F01B4), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_PPM_IVRMDVR , RULL(0x230F01B4), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_PPM_IVRMDVR , RULL(0x240F01B4), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_PPM_IVRMDVR , RULL(0x250F01B4), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_PPM_IVRMDVR , RULL(0x260F01B4), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_PPM_IVRMDVR , RULL(0x270F01B4), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_PPM_IVRMDVR , RULL(0x280F01B4), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_PPM_IVRMDVR , RULL(0x290F01B4), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_PPM_IVRMDVR , RULL(0x2A0F01B4), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_PPM_IVRMDVR , RULL(0x2B0F01B4), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_PPM_IVRMDVR , RULL(0x2C0F01B4), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_PPM_IVRMDVR , RULL(0x2D0F01B4), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_PPM_IVRMDVR , RULL(0x2E0F01B4), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_PPM_IVRMDVR , RULL(0x2F0F01B4), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_PPM_IVRMDVR , RULL(0x300F01B4), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_PPM_IVRMDVR , RULL(0x310F01B4), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_PPM_IVRMDVR , RULL(0x320F01B4), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_PPM_IVRMDVR , RULL(0x330F01B4), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_PPM_IVRMDVR , RULL(0x340F01B4), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_PPM_IVRMDVR , RULL(0x350F01B4), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_PPM_IVRMDVR , RULL(0x360F01B4), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_PPM_IVRMDVR , RULL(0x370F01B4), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EQ_PPM_IVRMDVR , RULL(0x100F01B4), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_0_PPM_IVRMDVR , RULL(0x100F01B4), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_1_PPM_IVRMDVR , RULL(0x110F01B4), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_2_PPM_IVRMDVR , RULL(0x120F01B4), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_3_PPM_IVRMDVR , RULL(0x130F01B4), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_4_PPM_IVRMDVR , RULL(0x140F01B4), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_5_PPM_IVRMDVR , RULL(0x150F01B4), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EX_PPM_IVRMDVR , RULL(0x200F01B4), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F01B4, +REG64( EX_0_PPM_IVRMDVR , RULL(0x200F01B4), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F01B4, +REG64( EX_1_PPM_IVRMDVR , RULL(0x230F01B4), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F01B4, +REG64( EX_2_PPM_IVRMDVR , RULL(0x240F01B4), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F01B4, +REG64( EX_3_PPM_IVRMDVR , RULL(0x260F01B4), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F01B4, +REG64( EX_4_PPM_IVRMDVR , RULL(0x280F01B4), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F01B4, +REG64( EX_5_PPM_IVRMDVR , RULL(0x2A0F01B4), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F01B4, +REG64( EX_6_PPM_IVRMDVR , RULL(0x2C0F01B4), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F01B4, +REG64( EX_7_PPM_IVRMDVR , RULL(0x2E0F01B4), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F01B4, +REG64( EX_8_PPM_IVRMDVR , RULL(0x300F01B4), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F01B4, +REG64( EX_9_PPM_IVRMDVR , RULL(0x320F01B4), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F01B4, +REG64( EX_10_PPM_IVRMDVR , RULL(0x340F01B4), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F01B4, +REG64( EX_11_PPM_IVRMDVR , RULL(0x360F01B4), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F01B4, + +REG64( C_PPM_IVRMST , RULL(0x200F01B3), SH_UNT_C , SH_ACS_SCOM_RO ); +REG64( C_0_PPM_IVRMST , RULL(0x200F01B3), SH_UNT_C_0 , SH_ACS_SCOM_RO ); +REG64( C_1_PPM_IVRMST , RULL(0x210F01B3), SH_UNT_C_1 , SH_ACS_SCOM_RO ); +REG64( C_2_PPM_IVRMST , RULL(0x220F01B3), SH_UNT_C_2 , SH_ACS_SCOM_RO ); +REG64( C_3_PPM_IVRMST , RULL(0x230F01B3), SH_UNT_C_3 , SH_ACS_SCOM_RO ); +REG64( C_4_PPM_IVRMST , RULL(0x240F01B3), SH_UNT_C_4 , SH_ACS_SCOM_RO ); +REG64( C_5_PPM_IVRMST , RULL(0x250F01B3), SH_UNT_C_5 , SH_ACS_SCOM_RO ); +REG64( C_6_PPM_IVRMST , RULL(0x260F01B3), SH_UNT_C_6 , SH_ACS_SCOM_RO ); +REG64( C_7_PPM_IVRMST , RULL(0x270F01B3), SH_UNT_C_7 , SH_ACS_SCOM_RO ); +REG64( C_8_PPM_IVRMST , RULL(0x280F01B3), SH_UNT_C_8 , SH_ACS_SCOM_RO ); +REG64( C_9_PPM_IVRMST , RULL(0x290F01B3), SH_UNT_C_9 , SH_ACS_SCOM_RO ); +REG64( C_10_PPM_IVRMST , RULL(0x2A0F01B3), SH_UNT_C_10 , SH_ACS_SCOM_RO ); +REG64( C_11_PPM_IVRMST , RULL(0x2B0F01B3), SH_UNT_C_11 , SH_ACS_SCOM_RO ); +REG64( C_12_PPM_IVRMST , RULL(0x2C0F01B3), SH_UNT_C_12 , SH_ACS_SCOM_RO ); +REG64( C_13_PPM_IVRMST , RULL(0x2D0F01B3), SH_UNT_C_13 , SH_ACS_SCOM_RO ); +REG64( C_14_PPM_IVRMST , RULL(0x2E0F01B3), SH_UNT_C_14 , SH_ACS_SCOM_RO ); +REG64( C_15_PPM_IVRMST , RULL(0x2F0F01B3), SH_UNT_C_15 , SH_ACS_SCOM_RO ); +REG64( C_16_PPM_IVRMST , RULL(0x300F01B3), SH_UNT_C_16 , SH_ACS_SCOM_RO ); +REG64( C_17_PPM_IVRMST , RULL(0x310F01B3), SH_UNT_C_17 , SH_ACS_SCOM_RO ); +REG64( C_18_PPM_IVRMST , RULL(0x320F01B3), SH_UNT_C_18 , SH_ACS_SCOM_RO ); +REG64( C_19_PPM_IVRMST , RULL(0x330F01B3), SH_UNT_C_19 , SH_ACS_SCOM_RO ); +REG64( C_20_PPM_IVRMST , RULL(0x340F01B3), SH_UNT_C_20 , SH_ACS_SCOM_RO ); +REG64( C_21_PPM_IVRMST , RULL(0x350F01B3), SH_UNT_C_21 , SH_ACS_SCOM_RO ); +REG64( C_22_PPM_IVRMST , RULL(0x360F01B3), SH_UNT_C_22 , SH_ACS_SCOM_RO ); +REG64( C_23_PPM_IVRMST , RULL(0x370F01B3), SH_UNT_C_23 , SH_ACS_SCOM_RO ); +REG64( EQ_PPM_IVRMST , RULL(0x100F01B3), SH_UNT_EQ , SH_ACS_SCOM_RO ); +REG64( EQ_0_PPM_IVRMST , RULL(0x100F01B3), SH_UNT_EQ_0 , SH_ACS_SCOM_RO ); +REG64( EQ_1_PPM_IVRMST , RULL(0x110F01B3), SH_UNT_EQ_1 , SH_ACS_SCOM_RO ); +REG64( EQ_2_PPM_IVRMST , RULL(0x120F01B3), SH_UNT_EQ_2 , SH_ACS_SCOM_RO ); +REG64( EQ_3_PPM_IVRMST , RULL(0x130F01B3), SH_UNT_EQ_3 , SH_ACS_SCOM_RO ); +REG64( EQ_4_PPM_IVRMST , RULL(0x140F01B3), SH_UNT_EQ_4 , SH_ACS_SCOM_RO ); +REG64( EQ_5_PPM_IVRMST , RULL(0x150F01B3), SH_UNT_EQ_5 , SH_ACS_SCOM_RO ); +REG64( EX_PPM_IVRMST , RULL(0x200F01B3), SH_UNT_EX , + SH_ACS_SCOM_RO ); //DUPS: 210F01B3, +REG64( EX_0_PPM_IVRMST , RULL(0x200F01B3), SH_UNT_EX_0 , + SH_ACS_SCOM_RO ); //DUPS: 210F01B3, +REG64( EX_1_PPM_IVRMST , RULL(0x230F01B3), SH_UNT_EX_1 , + SH_ACS_SCOM_RO ); //DUPS: 220F01B3, +REG64( EX_2_PPM_IVRMST , RULL(0x240F01B3), SH_UNT_EX_2 , + SH_ACS_SCOM_RO ); //DUPS: 250F01B3, +REG64( EX_3_PPM_IVRMST , RULL(0x260F01B3), SH_UNT_EX_3 , + SH_ACS_SCOM_RO ); //DUPS: 270F01B3, +REG64( EX_4_PPM_IVRMST , RULL(0x280F01B3), SH_UNT_EX_4 , + SH_ACS_SCOM_RO ); //DUPS: 290F01B3, +REG64( EX_5_PPM_IVRMST , RULL(0x2A0F01B3), SH_UNT_EX_5 , + SH_ACS_SCOM_RO ); //DUPS: 2B0F01B3, +REG64( EX_6_PPM_IVRMST , RULL(0x2C0F01B3), SH_UNT_EX_6 , + SH_ACS_SCOM_RO ); //DUPS: 2D0F01B3, +REG64( EX_7_PPM_IVRMST , RULL(0x2E0F01B3), SH_UNT_EX_7 , + SH_ACS_SCOM_RO ); //DUPS: 2F0F01B3, +REG64( EX_8_PPM_IVRMST , RULL(0x300F01B3), SH_UNT_EX_8 , + SH_ACS_SCOM_RO ); //DUPS: 310F01B3, +REG64( EX_9_PPM_IVRMST , RULL(0x320F01B3), SH_UNT_EX_9 , + SH_ACS_SCOM_RO ); //DUPS: 330F01B3, +REG64( EX_10_PPM_IVRMST , RULL(0x340F01B3), SH_UNT_EX_10 , + SH_ACS_SCOM_RO ); //DUPS: 350F01B3, +REG64( EX_11_PPM_IVRMST , RULL(0x360F01B3), SH_UNT_EX_11 , + SH_ACS_SCOM_RO ); //DUPS: 370F01B3, + +REG64( C_PPM_PFCS_SCOM , RULL(0x200F0118), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_PPM_PFCS_SCOM1 , RULL(0x200F0119), SH_UNT_C , SH_ACS_SCOM1 ); +REG64( C_PPM_PFCS_SCOM2 , RULL(0x200F011A), SH_UNT_C , SH_ACS_SCOM2 ); +REG64( C_0_PPM_PFCS_SCOM , RULL(0x200F0118), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_0_PPM_PFCS_SCOM1 , RULL(0x200F0119), SH_UNT_C_0 , SH_ACS_SCOM1 ); +REG64( C_0_PPM_PFCS_SCOM2 , RULL(0x200F011A), SH_UNT_C_0 , SH_ACS_SCOM2 ); +REG64( C_1_PPM_PFCS_SCOM , RULL(0x210F0118), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_1_PPM_PFCS_SCOM1 , RULL(0x210F0119), SH_UNT_C_1 , SH_ACS_SCOM1 ); +REG64( C_1_PPM_PFCS_SCOM2 , RULL(0x210F011A), SH_UNT_C_1 , SH_ACS_SCOM2 ); +REG64( C_2_PPM_PFCS_SCOM , RULL(0x220F0118), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_2_PPM_PFCS_SCOM1 , RULL(0x220F0119), SH_UNT_C_2 , SH_ACS_SCOM1 ); +REG64( C_2_PPM_PFCS_SCOM2 , RULL(0x220F011A), SH_UNT_C_2 , SH_ACS_SCOM2 ); +REG64( C_3_PPM_PFCS_SCOM , RULL(0x230F0118), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_3_PPM_PFCS_SCOM1 , RULL(0x230F0119), SH_UNT_C_3 , SH_ACS_SCOM1 ); +REG64( C_3_PPM_PFCS_SCOM2 , RULL(0x230F011A), SH_UNT_C_3 , SH_ACS_SCOM2 ); +REG64( C_4_PPM_PFCS_SCOM , RULL(0x240F0118), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_4_PPM_PFCS_SCOM1 , RULL(0x240F0119), SH_UNT_C_4 , SH_ACS_SCOM1 ); +REG64( C_4_PPM_PFCS_SCOM2 , RULL(0x240F011A), SH_UNT_C_4 , SH_ACS_SCOM2 ); +REG64( C_5_PPM_PFCS_SCOM , RULL(0x250F0118), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_5_PPM_PFCS_SCOM1 , RULL(0x250F0119), SH_UNT_C_5 , SH_ACS_SCOM1 ); +REG64( C_5_PPM_PFCS_SCOM2 , RULL(0x250F011A), SH_UNT_C_5 , SH_ACS_SCOM2 ); +REG64( C_6_PPM_PFCS_SCOM , RULL(0x260F0118), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_6_PPM_PFCS_SCOM1 , RULL(0x260F0119), SH_UNT_C_6 , SH_ACS_SCOM1 ); +REG64( C_6_PPM_PFCS_SCOM2 , RULL(0x260F011A), SH_UNT_C_6 , SH_ACS_SCOM2 ); +REG64( C_7_PPM_PFCS_SCOM , RULL(0x270F0118), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_7_PPM_PFCS_SCOM1 , RULL(0x270F0119), SH_UNT_C_7 , SH_ACS_SCOM1 ); +REG64( C_7_PPM_PFCS_SCOM2 , RULL(0x270F011A), SH_UNT_C_7 , SH_ACS_SCOM2 ); +REG64( C_8_PPM_PFCS_SCOM , RULL(0x280F0118), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_8_PPM_PFCS_SCOM1 , RULL(0x280F0119), SH_UNT_C_8 , SH_ACS_SCOM1 ); +REG64( C_8_PPM_PFCS_SCOM2 , RULL(0x280F011A), SH_UNT_C_8 , SH_ACS_SCOM2 ); +REG64( C_9_PPM_PFCS_SCOM , RULL(0x290F0118), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_9_PPM_PFCS_SCOM1 , RULL(0x290F0119), SH_UNT_C_9 , SH_ACS_SCOM1 ); +REG64( C_9_PPM_PFCS_SCOM2 , RULL(0x290F011A), SH_UNT_C_9 , SH_ACS_SCOM2 ); +REG64( C_10_PPM_PFCS_SCOM , RULL(0x2A0F0118), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_10_PPM_PFCS_SCOM1 , RULL(0x2A0F0119), SH_UNT_C_10 , SH_ACS_SCOM1 ); +REG64( C_10_PPM_PFCS_SCOM2 , RULL(0x2A0F011A), SH_UNT_C_10 , SH_ACS_SCOM2 ); +REG64( C_11_PPM_PFCS_SCOM , RULL(0x2B0F0118), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_11_PPM_PFCS_SCOM1 , RULL(0x2B0F0119), SH_UNT_C_11 , SH_ACS_SCOM1 ); +REG64( C_11_PPM_PFCS_SCOM2 , RULL(0x2B0F011A), SH_UNT_C_11 , SH_ACS_SCOM2 ); +REG64( C_12_PPM_PFCS_SCOM , RULL(0x2C0F0118), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_12_PPM_PFCS_SCOM1 , RULL(0x2C0F0119), SH_UNT_C_12 , SH_ACS_SCOM1 ); +REG64( C_12_PPM_PFCS_SCOM2 , RULL(0x2C0F011A), SH_UNT_C_12 , SH_ACS_SCOM2 ); +REG64( C_13_PPM_PFCS_SCOM , RULL(0x2D0F0118), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_13_PPM_PFCS_SCOM1 , RULL(0x2D0F0119), SH_UNT_C_13 , SH_ACS_SCOM1 ); +REG64( C_13_PPM_PFCS_SCOM2 , RULL(0x2D0F011A), SH_UNT_C_13 , SH_ACS_SCOM2 ); +REG64( C_14_PPM_PFCS_SCOM , RULL(0x2E0F0118), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_14_PPM_PFCS_SCOM1 , RULL(0x2E0F0119), SH_UNT_C_14 , SH_ACS_SCOM1 ); +REG64( C_14_PPM_PFCS_SCOM2 , RULL(0x2E0F011A), SH_UNT_C_14 , SH_ACS_SCOM2 ); +REG64( C_15_PPM_PFCS_SCOM , RULL(0x2F0F0118), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_15_PPM_PFCS_SCOM1 , RULL(0x2F0F0119), SH_UNT_C_15 , SH_ACS_SCOM1 ); +REG64( C_15_PPM_PFCS_SCOM2 , RULL(0x2F0F011A), SH_UNT_C_15 , SH_ACS_SCOM2 ); +REG64( C_16_PPM_PFCS_SCOM , RULL(0x300F0118), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_16_PPM_PFCS_SCOM1 , RULL(0x300F0119), SH_UNT_C_16 , SH_ACS_SCOM1 ); +REG64( C_16_PPM_PFCS_SCOM2 , RULL(0x300F011A), SH_UNT_C_16 , SH_ACS_SCOM2 ); +REG64( C_17_PPM_PFCS_SCOM , RULL(0x310F0118), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_17_PPM_PFCS_SCOM1 , RULL(0x310F0119), SH_UNT_C_17 , SH_ACS_SCOM1 ); +REG64( C_17_PPM_PFCS_SCOM2 , RULL(0x310F011A), SH_UNT_C_17 , SH_ACS_SCOM2 ); +REG64( C_18_PPM_PFCS_SCOM , RULL(0x320F0118), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_18_PPM_PFCS_SCOM1 , RULL(0x320F0119), SH_UNT_C_18 , SH_ACS_SCOM1 ); +REG64( C_18_PPM_PFCS_SCOM2 , RULL(0x320F011A), SH_UNT_C_18 , SH_ACS_SCOM2 ); +REG64( C_19_PPM_PFCS_SCOM , RULL(0x330F0118), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_19_PPM_PFCS_SCOM1 , RULL(0x330F0119), SH_UNT_C_19 , SH_ACS_SCOM1 ); +REG64( C_19_PPM_PFCS_SCOM2 , RULL(0x330F011A), SH_UNT_C_19 , SH_ACS_SCOM2 ); +REG64( C_20_PPM_PFCS_SCOM , RULL(0x340F0118), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_20_PPM_PFCS_SCOM1 , RULL(0x340F0119), SH_UNT_C_20 , SH_ACS_SCOM1 ); +REG64( C_20_PPM_PFCS_SCOM2 , RULL(0x340F011A), SH_UNT_C_20 , SH_ACS_SCOM2 ); +REG64( C_21_PPM_PFCS_SCOM , RULL(0x350F0118), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_21_PPM_PFCS_SCOM1 , RULL(0x350F0119), SH_UNT_C_21 , SH_ACS_SCOM1 ); +REG64( C_21_PPM_PFCS_SCOM2 , RULL(0x350F011A), SH_UNT_C_21 , SH_ACS_SCOM2 ); +REG64( C_22_PPM_PFCS_SCOM , RULL(0x360F0118), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_22_PPM_PFCS_SCOM1 , RULL(0x360F0119), SH_UNT_C_22 , SH_ACS_SCOM1 ); +REG64( C_22_PPM_PFCS_SCOM2 , RULL(0x360F011A), SH_UNT_C_22 , SH_ACS_SCOM2 ); +REG64( C_23_PPM_PFCS_SCOM , RULL(0x370F0118), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( C_23_PPM_PFCS_SCOM1 , RULL(0x370F0119), SH_UNT_C_23 , SH_ACS_SCOM1 ); +REG64( C_23_PPM_PFCS_SCOM2 , RULL(0x370F011A), SH_UNT_C_23 , SH_ACS_SCOM2 ); +REG64( EQ_PPM_PFCS_SCOM , RULL(0x100F0118), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_PPM_PFCS_SCOM1 , RULL(0x100F0119), SH_UNT_EQ , SH_ACS_SCOM1 ); +REG64( EQ_PPM_PFCS_SCOM2 , RULL(0x100F011A), SH_UNT_EQ , SH_ACS_SCOM2 ); +REG64( EQ_0_PPM_PFCS_SCOM , RULL(0x100F0118), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_0_PPM_PFCS_SCOM1 , RULL(0x100F0119), SH_UNT_EQ_0 , SH_ACS_SCOM1 ); +REG64( EQ_0_PPM_PFCS_SCOM2 , RULL(0x100F011A), SH_UNT_EQ_0 , SH_ACS_SCOM2 ); +REG64( EQ_1_PPM_PFCS_SCOM , RULL(0x110F0118), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_1_PPM_PFCS_SCOM1 , RULL(0x110F0119), SH_UNT_EQ_1 , SH_ACS_SCOM1 ); +REG64( EQ_1_PPM_PFCS_SCOM2 , RULL(0x110F011A), SH_UNT_EQ_1 , SH_ACS_SCOM2 ); +REG64( EQ_2_PPM_PFCS_SCOM , RULL(0x120F0118), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_2_PPM_PFCS_SCOM1 , RULL(0x120F0119), SH_UNT_EQ_2 , SH_ACS_SCOM1 ); +REG64( EQ_2_PPM_PFCS_SCOM2 , RULL(0x120F011A), SH_UNT_EQ_2 , SH_ACS_SCOM2 ); +REG64( EQ_3_PPM_PFCS_SCOM , RULL(0x130F0118), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_3_PPM_PFCS_SCOM1 , RULL(0x130F0119), SH_UNT_EQ_3 , SH_ACS_SCOM1 ); +REG64( EQ_3_PPM_PFCS_SCOM2 , RULL(0x130F011A), SH_UNT_EQ_3 , SH_ACS_SCOM2 ); +REG64( EQ_4_PPM_PFCS_SCOM , RULL(0x140F0118), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_4_PPM_PFCS_SCOM1 , RULL(0x140F0119), SH_UNT_EQ_4 , SH_ACS_SCOM1 ); +REG64( EQ_4_PPM_PFCS_SCOM2 , RULL(0x140F011A), SH_UNT_EQ_4 , SH_ACS_SCOM2 ); +REG64( EQ_5_PPM_PFCS_SCOM , RULL(0x150F0118), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EQ_5_PPM_PFCS_SCOM1 , RULL(0x150F0119), SH_UNT_EQ_5 , SH_ACS_SCOM1 ); +REG64( EQ_5_PPM_PFCS_SCOM2 , RULL(0x150F011A), SH_UNT_EQ_5 , SH_ACS_SCOM2 ); +REG64( EX_PPM_PFCS_SCOM , RULL(0x200F0118), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0118, +REG64( EX_PPM_PFCS_SCOM1 , RULL(0x200F0119), SH_UNT_EX , + SH_ACS_SCOM1 ); //DUPS: 210F0119, +REG64( EX_PPM_PFCS_SCOM2 , RULL(0x200F011A), SH_UNT_EX , + SH_ACS_SCOM2 ); //DUPS: 210F011A, +REG64( EX_0_PPM_PFCS_SCOM , RULL(0x200F0118), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0118, +REG64( EX_0_PPM_PFCS_SCOM1 , RULL(0x200F0119), SH_UNT_EX_0 , + SH_ACS_SCOM1 ); //DUPS: 210F0119, +REG64( EX_0_PPM_PFCS_SCOM2 , RULL(0x200F011A), SH_UNT_EX_0 , + SH_ACS_SCOM2 ); //DUPS: 210F011A, +REG64( EX_1_PPM_PFCS_SCOM , RULL(0x230F0118), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0118, +REG64( EX_1_PPM_PFCS_SCOM1 , RULL(0x230F0119), SH_UNT_EX_1 , + SH_ACS_SCOM1 ); //DUPS: 220F0119, +REG64( EX_1_PPM_PFCS_SCOM2 , RULL(0x230F011A), SH_UNT_EX_1 , + SH_ACS_SCOM2 ); //DUPS: 220F011A, +REG64( EX_2_PPM_PFCS_SCOM , RULL(0x240F0118), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0118, +REG64( EX_2_PPM_PFCS_SCOM1 , RULL(0x240F0119), SH_UNT_EX_2 , + SH_ACS_SCOM1 ); //DUPS: 250F0119, +REG64( EX_2_PPM_PFCS_SCOM2 , RULL(0x240F011A), SH_UNT_EX_2 , + SH_ACS_SCOM2 ); //DUPS: 250F011A, +REG64( EX_3_PPM_PFCS_SCOM , RULL(0x260F0118), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0118, +REG64( EX_3_PPM_PFCS_SCOM1 , RULL(0x260F0119), SH_UNT_EX_3 , + SH_ACS_SCOM1 ); //DUPS: 270F0119, +REG64( EX_3_PPM_PFCS_SCOM2 , RULL(0x260F011A), SH_UNT_EX_3 , + SH_ACS_SCOM2 ); //DUPS: 270F011A, +REG64( EX_4_PPM_PFCS_SCOM , RULL(0x280F0118), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0118, +REG64( EX_4_PPM_PFCS_SCOM1 , RULL(0x280F0119), SH_UNT_EX_4 , + SH_ACS_SCOM1 ); //DUPS: 290F0119, +REG64( EX_4_PPM_PFCS_SCOM2 , RULL(0x280F011A), SH_UNT_EX_4 , + SH_ACS_SCOM2 ); //DUPS: 290F011A, +REG64( EX_5_PPM_PFCS_SCOM , RULL(0x2A0F0118), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0118, +REG64( EX_5_PPM_PFCS_SCOM1 , RULL(0x2A0F0119), SH_UNT_EX_5 , + SH_ACS_SCOM1 ); //DUPS: 2B0F0119, +REG64( EX_5_PPM_PFCS_SCOM2 , RULL(0x2A0F011A), SH_UNT_EX_5 , + SH_ACS_SCOM2 ); //DUPS: 2B0F011A, +REG64( EX_6_PPM_PFCS_SCOM , RULL(0x2C0F0118), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0118, +REG64( EX_6_PPM_PFCS_SCOM1 , RULL(0x2C0F0119), SH_UNT_EX_6 , + SH_ACS_SCOM1 ); //DUPS: 2D0F0119, +REG64( EX_6_PPM_PFCS_SCOM2 , RULL(0x2C0F011A), SH_UNT_EX_6 , + SH_ACS_SCOM2 ); //DUPS: 2D0F011A, +REG64( EX_7_PPM_PFCS_SCOM , RULL(0x2E0F0118), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0118, +REG64( EX_7_PPM_PFCS_SCOM1 , RULL(0x2E0F0119), SH_UNT_EX_7 , + SH_ACS_SCOM1 ); //DUPS: 2F0F0119, +REG64( EX_7_PPM_PFCS_SCOM2 , RULL(0x2E0F011A), SH_UNT_EX_7 , + SH_ACS_SCOM2 ); //DUPS: 2F0F011A, +REG64( EX_8_PPM_PFCS_SCOM , RULL(0x300F0118), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0118, +REG64( EX_8_PPM_PFCS_SCOM1 , RULL(0x300F0119), SH_UNT_EX_8 , + SH_ACS_SCOM1 ); //DUPS: 310F0119, +REG64( EX_8_PPM_PFCS_SCOM2 , RULL(0x300F011A), SH_UNT_EX_8 , + SH_ACS_SCOM2 ); //DUPS: 310F011A, +REG64( EX_9_PPM_PFCS_SCOM , RULL(0x320F0118), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0118, +REG64( EX_9_PPM_PFCS_SCOM1 , RULL(0x320F0119), SH_UNT_EX_9 , + SH_ACS_SCOM1 ); //DUPS: 330F0119, +REG64( EX_9_PPM_PFCS_SCOM2 , RULL(0x320F011A), SH_UNT_EX_9 , + SH_ACS_SCOM2 ); //DUPS: 330F011A, +REG64( EX_10_PPM_PFCS_SCOM , RULL(0x340F0118), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0118, +REG64( EX_10_PPM_PFCS_SCOM1 , RULL(0x340F0119), SH_UNT_EX_10 , + SH_ACS_SCOM1 ); //DUPS: 350F0119, +REG64( EX_10_PPM_PFCS_SCOM2 , RULL(0x340F011A), SH_UNT_EX_10 , + SH_ACS_SCOM2 ); //DUPS: 350F011A, +REG64( EX_11_PPM_PFCS_SCOM , RULL(0x360F0118), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0118, +REG64( EX_11_PPM_PFCS_SCOM1 , RULL(0x360F0119), SH_UNT_EX_11 , + SH_ACS_SCOM1 ); //DUPS: 370F0119, +REG64( EX_11_PPM_PFCS_SCOM2 , RULL(0x360F011A), SH_UNT_EX_11 , + SH_ACS_SCOM2 ); //DUPS: 370F011A, + +REG64( C_PPM_PFDLY , RULL(0x200F011B), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_PPM_PFDLY , RULL(0x200F011B), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_PPM_PFDLY , RULL(0x210F011B), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_PPM_PFDLY , RULL(0x220F011B), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_PPM_PFDLY , RULL(0x230F011B), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_PPM_PFDLY , RULL(0x240F011B), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_PPM_PFDLY , RULL(0x250F011B), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_PPM_PFDLY , RULL(0x260F011B), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_PPM_PFDLY , RULL(0x270F011B), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_PPM_PFDLY , RULL(0x280F011B), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_PPM_PFDLY , RULL(0x290F011B), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_PPM_PFDLY , RULL(0x2A0F011B), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_PPM_PFDLY , RULL(0x2B0F011B), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_PPM_PFDLY , RULL(0x2C0F011B), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_PPM_PFDLY , RULL(0x2D0F011B), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_PPM_PFDLY , RULL(0x2E0F011B), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_PPM_PFDLY , RULL(0x2F0F011B), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_PPM_PFDLY , RULL(0x300F011B), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_PPM_PFDLY , RULL(0x310F011B), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_PPM_PFDLY , RULL(0x320F011B), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_PPM_PFDLY , RULL(0x330F011B), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_PPM_PFDLY , RULL(0x340F011B), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_PPM_PFDLY , RULL(0x350F011B), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_PPM_PFDLY , RULL(0x360F011B), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_PPM_PFDLY , RULL(0x370F011B), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EQ_PPM_PFDLY , RULL(0x100F011B), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_0_PPM_PFDLY , RULL(0x100F011B), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_1_PPM_PFDLY , RULL(0x110F011B), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_2_PPM_PFDLY , RULL(0x120F011B), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_3_PPM_PFDLY , RULL(0x130F011B), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_4_PPM_PFDLY , RULL(0x140F011B), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_5_PPM_PFDLY , RULL(0x150F011B), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EX_PPM_PFDLY , RULL(0x200F011B), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F011B, +REG64( EX_0_PPM_PFDLY , RULL(0x200F011B), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F011B, +REG64( EX_1_PPM_PFDLY , RULL(0x230F011B), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F011B, +REG64( EX_2_PPM_PFDLY , RULL(0x240F011B), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F011B, +REG64( EX_3_PPM_PFDLY , RULL(0x260F011B), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F011B, +REG64( EX_4_PPM_PFDLY , RULL(0x280F011B), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F011B, +REG64( EX_5_PPM_PFDLY , RULL(0x2A0F011B), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F011B, +REG64( EX_6_PPM_PFDLY , RULL(0x2C0F011B), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F011B, +REG64( EX_7_PPM_PFDLY , RULL(0x2E0F011B), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F011B, +REG64( EX_8_PPM_PFDLY , RULL(0x300F011B), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F011B, +REG64( EX_9_PPM_PFDLY , RULL(0x320F011B), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F011B, +REG64( EX_10_PPM_PFDLY , RULL(0x340F011B), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F011B, +REG64( EX_11_PPM_PFDLY , RULL(0x360F011B), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F011B, + +REG64( C_PPM_PFOFF , RULL(0x200F011D), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_PPM_PFOFF , RULL(0x200F011D), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_PPM_PFOFF , RULL(0x210F011D), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_PPM_PFOFF , RULL(0x220F011D), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_PPM_PFOFF , RULL(0x230F011D), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_PPM_PFOFF , RULL(0x240F011D), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_PPM_PFOFF , RULL(0x250F011D), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_PPM_PFOFF , RULL(0x260F011D), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_PPM_PFOFF , RULL(0x270F011D), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_PPM_PFOFF , RULL(0x280F011D), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_PPM_PFOFF , RULL(0x290F011D), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_PPM_PFOFF , RULL(0x2A0F011D), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_PPM_PFOFF , RULL(0x2B0F011D), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_PPM_PFOFF , RULL(0x2C0F011D), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_PPM_PFOFF , RULL(0x2D0F011D), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_PPM_PFOFF , RULL(0x2E0F011D), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_PPM_PFOFF , RULL(0x2F0F011D), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_PPM_PFOFF , RULL(0x300F011D), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_PPM_PFOFF , RULL(0x310F011D), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_PPM_PFOFF , RULL(0x320F011D), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_PPM_PFOFF , RULL(0x330F011D), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_PPM_PFOFF , RULL(0x340F011D), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_PPM_PFOFF , RULL(0x350F011D), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_PPM_PFOFF , RULL(0x360F011D), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_PPM_PFOFF , RULL(0x370F011D), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EQ_PPM_PFOFF , RULL(0x100F011D), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_0_PPM_PFOFF , RULL(0x100F011D), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_1_PPM_PFOFF , RULL(0x110F011D), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_2_PPM_PFOFF , RULL(0x120F011D), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_3_PPM_PFOFF , RULL(0x130F011D), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_4_PPM_PFOFF , RULL(0x140F011D), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_5_PPM_PFOFF , RULL(0x150F011D), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EX_PPM_PFOFF , RULL(0x200F011D), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F011D, +REG64( EX_0_PPM_PFOFF , RULL(0x200F011D), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F011D, +REG64( EX_1_PPM_PFOFF , RULL(0x230F011D), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F011D, +REG64( EX_2_PPM_PFOFF , RULL(0x240F011D), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F011D, +REG64( EX_3_PPM_PFOFF , RULL(0x260F011D), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F011D, +REG64( EX_4_PPM_PFOFF , RULL(0x280F011D), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F011D, +REG64( EX_5_PPM_PFOFF , RULL(0x2A0F011D), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F011D, +REG64( EX_6_PPM_PFOFF , RULL(0x2C0F011D), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F011D, +REG64( EX_7_PPM_PFOFF , RULL(0x2E0F011D), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F011D, +REG64( EX_8_PPM_PFOFF , RULL(0x300F011D), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F011D, +REG64( EX_9_PPM_PFOFF , RULL(0x320F011D), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F011D, +REG64( EX_10_PPM_PFOFF , RULL(0x340F011D), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F011D, +REG64( EX_11_PPM_PFOFF , RULL(0x360F011D), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F011D, + +REG64( C_PPM_PFSNS , RULL(0x200F011C), SH_UNT_C , SH_ACS_SCOM_RO ); +REG64( C_0_PPM_PFSNS , RULL(0x200F011C), SH_UNT_C_0 , SH_ACS_SCOM_RO ); +REG64( C_1_PPM_PFSNS , RULL(0x210F011C), SH_UNT_C_1 , SH_ACS_SCOM_RO ); +REG64( C_2_PPM_PFSNS , RULL(0x220F011C), SH_UNT_C_2 , SH_ACS_SCOM_RO ); +REG64( C_3_PPM_PFSNS , RULL(0x230F011C), SH_UNT_C_3 , SH_ACS_SCOM_RO ); +REG64( C_4_PPM_PFSNS , RULL(0x240F011C), SH_UNT_C_4 , SH_ACS_SCOM_RO ); +REG64( C_5_PPM_PFSNS , RULL(0x250F011C), SH_UNT_C_5 , SH_ACS_SCOM_RO ); +REG64( C_6_PPM_PFSNS , RULL(0x260F011C), SH_UNT_C_6 , SH_ACS_SCOM_RO ); +REG64( C_7_PPM_PFSNS , RULL(0x270F011C), SH_UNT_C_7 , SH_ACS_SCOM_RO ); +REG64( C_8_PPM_PFSNS , RULL(0x280F011C), SH_UNT_C_8 , SH_ACS_SCOM_RO ); +REG64( C_9_PPM_PFSNS , RULL(0x290F011C), SH_UNT_C_9 , SH_ACS_SCOM_RO ); +REG64( C_10_PPM_PFSNS , RULL(0x2A0F011C), SH_UNT_C_10 , SH_ACS_SCOM_RO ); +REG64( C_11_PPM_PFSNS , RULL(0x2B0F011C), SH_UNT_C_11 , SH_ACS_SCOM_RO ); +REG64( C_12_PPM_PFSNS , RULL(0x2C0F011C), SH_UNT_C_12 , SH_ACS_SCOM_RO ); +REG64( C_13_PPM_PFSNS , RULL(0x2D0F011C), SH_UNT_C_13 , SH_ACS_SCOM_RO ); +REG64( C_14_PPM_PFSNS , RULL(0x2E0F011C), SH_UNT_C_14 , SH_ACS_SCOM_RO ); +REG64( C_15_PPM_PFSNS , RULL(0x2F0F011C), SH_UNT_C_15 , SH_ACS_SCOM_RO ); +REG64( C_16_PPM_PFSNS , RULL(0x300F011C), SH_UNT_C_16 , SH_ACS_SCOM_RO ); +REG64( C_17_PPM_PFSNS , RULL(0x310F011C), SH_UNT_C_17 , SH_ACS_SCOM_RO ); +REG64( C_18_PPM_PFSNS , RULL(0x320F011C), SH_UNT_C_18 , SH_ACS_SCOM_RO ); +REG64( C_19_PPM_PFSNS , RULL(0x330F011C), SH_UNT_C_19 , SH_ACS_SCOM_RO ); +REG64( C_20_PPM_PFSNS , RULL(0x340F011C), SH_UNT_C_20 , SH_ACS_SCOM_RO ); +REG64( C_21_PPM_PFSNS , RULL(0x350F011C), SH_UNT_C_21 , SH_ACS_SCOM_RO ); +REG64( C_22_PPM_PFSNS , RULL(0x360F011C), SH_UNT_C_22 , SH_ACS_SCOM_RO ); +REG64( C_23_PPM_PFSNS , RULL(0x370F011C), SH_UNT_C_23 , SH_ACS_SCOM_RO ); +REG64( EQ_PPM_PFSNS , RULL(0x100F011C), SH_UNT_EQ , SH_ACS_SCOM_RO ); +REG64( EQ_0_PPM_PFSNS , RULL(0x100F011C), SH_UNT_EQ_0 , SH_ACS_SCOM_RO ); +REG64( EQ_1_PPM_PFSNS , RULL(0x110F011C), SH_UNT_EQ_1 , SH_ACS_SCOM_RO ); +REG64( EQ_2_PPM_PFSNS , RULL(0x120F011C), SH_UNT_EQ_2 , SH_ACS_SCOM_RO ); +REG64( EQ_3_PPM_PFSNS , RULL(0x130F011C), SH_UNT_EQ_3 , SH_ACS_SCOM_RO ); +REG64( EQ_4_PPM_PFSNS , RULL(0x140F011C), SH_UNT_EQ_4 , SH_ACS_SCOM_RO ); +REG64( EQ_5_PPM_PFSNS , RULL(0x150F011C), SH_UNT_EQ_5 , SH_ACS_SCOM_RO ); +REG64( EX_PPM_PFSNS , RULL(0x200F011C), SH_UNT_EX , + SH_ACS_SCOM_RO ); //DUPS: 210F011C, +REG64( EX_0_PPM_PFSNS , RULL(0x200F011C), SH_UNT_EX_0 , + SH_ACS_SCOM_RO ); //DUPS: 210F011C, +REG64( EX_1_PPM_PFSNS , RULL(0x230F011C), SH_UNT_EX_1 , + SH_ACS_SCOM_RO ); //DUPS: 220F011C, +REG64( EX_2_PPM_PFSNS , RULL(0x240F011C), SH_UNT_EX_2 , + SH_ACS_SCOM_RO ); //DUPS: 250F011C, +REG64( EX_3_PPM_PFSNS , RULL(0x260F011C), SH_UNT_EX_3 , + SH_ACS_SCOM_RO ); //DUPS: 270F011C, +REG64( EX_4_PPM_PFSNS , RULL(0x280F011C), SH_UNT_EX_4 , + SH_ACS_SCOM_RO ); //DUPS: 290F011C, +REG64( EX_5_PPM_PFSNS , RULL(0x2A0F011C), SH_UNT_EX_5 , + SH_ACS_SCOM_RO ); //DUPS: 2B0F011C, +REG64( EX_6_PPM_PFSNS , RULL(0x2C0F011C), SH_UNT_EX_6 , + SH_ACS_SCOM_RO ); //DUPS: 2D0F011C, +REG64( EX_7_PPM_PFSNS , RULL(0x2E0F011C), SH_UNT_EX_7 , + SH_ACS_SCOM_RO ); //DUPS: 2F0F011C, +REG64( EX_8_PPM_PFSNS , RULL(0x300F011C), SH_UNT_EX_8 , + SH_ACS_SCOM_RO ); //DUPS: 310F011C, +REG64( EX_9_PPM_PFSNS , RULL(0x320F011C), SH_UNT_EX_9 , + SH_ACS_SCOM_RO ); //DUPS: 330F011C, +REG64( EX_10_PPM_PFSNS , RULL(0x340F011C), SH_UNT_EX_10 , + SH_ACS_SCOM_RO ); //DUPS: 350F011C, +REG64( EX_11_PPM_PFSNS , RULL(0x360F011C), SH_UNT_EX_11 , + SH_ACS_SCOM_RO ); //DUPS: 370F011C, + +REG64( C_PPM_PIG , RULL(0x200F0180), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_PPM_PIG , RULL(0x200F0180), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_PPM_PIG , RULL(0x210F0180), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_PPM_PIG , RULL(0x220F0180), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_PPM_PIG , RULL(0x230F0180), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_PPM_PIG , RULL(0x240F0180), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_PPM_PIG , RULL(0x250F0180), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_PPM_PIG , RULL(0x260F0180), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_PPM_PIG , RULL(0x270F0180), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_PPM_PIG , RULL(0x280F0180), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_PPM_PIG , RULL(0x290F0180), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_PPM_PIG , RULL(0x2A0F0180), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_PPM_PIG , RULL(0x2B0F0180), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_PPM_PIG , RULL(0x2C0F0180), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_PPM_PIG , RULL(0x2D0F0180), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_PPM_PIG , RULL(0x2E0F0180), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_PPM_PIG , RULL(0x2F0F0180), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_PPM_PIG , RULL(0x300F0180), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_PPM_PIG , RULL(0x310F0180), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_PPM_PIG , RULL(0x320F0180), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_PPM_PIG , RULL(0x330F0180), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_PPM_PIG , RULL(0x340F0180), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_PPM_PIG , RULL(0x350F0180), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_PPM_PIG , RULL(0x360F0180), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_PPM_PIG , RULL(0x370F0180), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_PPM_PIG , RULL(0x100F0180), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_PPM_PIG , RULL(0x100F0180), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_PPM_PIG , RULL(0x110F0180), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_PPM_PIG , RULL(0x120F0180), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_PPM_PIG , RULL(0x130F0180), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_PPM_PIG , RULL(0x140F0180), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_PPM_PIG , RULL(0x150F0180), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_PPM_PIG , RULL(0x200F0180), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0180, +REG64( EX_0_PPM_PIG , RULL(0x200F0180), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0180, +REG64( EX_1_PPM_PIG , RULL(0x230F0180), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0180, +REG64( EX_2_PPM_PIG , RULL(0x240F0180), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0180, +REG64( EX_3_PPM_PIG , RULL(0x260F0180), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0180, +REG64( EX_4_PPM_PIG , RULL(0x280F0180), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0180, +REG64( EX_5_PPM_PIG , RULL(0x2A0F0180), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0180, +REG64( EX_6_PPM_PIG , RULL(0x2C0F0180), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0180, +REG64( EX_7_PPM_PIG , RULL(0x2E0F0180), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0180, +REG64( EX_8_PPM_PIG , RULL(0x300F0180), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0180, +REG64( EX_9_PPM_PIG , RULL(0x320F0180), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0180, +REG64( EX_10_PPM_PIG , RULL(0x340F0180), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0180, +REG64( EX_11_PPM_PIG , RULL(0x360F0180), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0180, + +REG64( C_PPM_SCRATCH0 , RULL(0x200F011E), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_PPM_SCRATCH0 , RULL(0x200F011E), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_PPM_SCRATCH0 , RULL(0x210F011E), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_PPM_SCRATCH0 , RULL(0x220F011E), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_PPM_SCRATCH0 , RULL(0x230F011E), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_PPM_SCRATCH0 , RULL(0x240F011E), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_PPM_SCRATCH0 , RULL(0x250F011E), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_PPM_SCRATCH0 , RULL(0x260F011E), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_PPM_SCRATCH0 , RULL(0x270F011E), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_PPM_SCRATCH0 , RULL(0x280F011E), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_PPM_SCRATCH0 , RULL(0x290F011E), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_PPM_SCRATCH0 , RULL(0x2A0F011E), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_PPM_SCRATCH0 , RULL(0x2B0F011E), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_PPM_SCRATCH0 , RULL(0x2C0F011E), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_PPM_SCRATCH0 , RULL(0x2D0F011E), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_PPM_SCRATCH0 , RULL(0x2E0F011E), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_PPM_SCRATCH0 , RULL(0x2F0F011E), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_PPM_SCRATCH0 , RULL(0x300F011E), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_PPM_SCRATCH0 , RULL(0x310F011E), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_PPM_SCRATCH0 , RULL(0x320F011E), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_PPM_SCRATCH0 , RULL(0x330F011E), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_PPM_SCRATCH0 , RULL(0x340F011E), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_PPM_SCRATCH0 , RULL(0x350F011E), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_PPM_SCRATCH0 , RULL(0x360F011E), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_PPM_SCRATCH0 , RULL(0x370F011E), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EQ_PPM_SCRATCH0 , RULL(0x100F011E), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_0_PPM_SCRATCH0 , RULL(0x100F011E), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_1_PPM_SCRATCH0 , RULL(0x110F011E), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_2_PPM_SCRATCH0 , RULL(0x120F011E), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_3_PPM_SCRATCH0 , RULL(0x130F011E), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_4_PPM_SCRATCH0 , RULL(0x140F011E), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_5_PPM_SCRATCH0 , RULL(0x150F011E), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EX_PPM_SCRATCH0 , RULL(0x200F011E), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F011E, +REG64( EX_0_PPM_SCRATCH0 , RULL(0x200F011E), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F011E, +REG64( EX_1_PPM_SCRATCH0 , RULL(0x230F011E), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F011E, +REG64( EX_2_PPM_SCRATCH0 , RULL(0x240F011E), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F011E, +REG64( EX_3_PPM_SCRATCH0 , RULL(0x260F011E), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F011E, +REG64( EX_4_PPM_SCRATCH0 , RULL(0x280F011E), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F011E, +REG64( EX_5_PPM_SCRATCH0 , RULL(0x2A0F011E), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F011E, +REG64( EX_6_PPM_SCRATCH0 , RULL(0x2C0F011E), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F011E, +REG64( EX_7_PPM_SCRATCH0 , RULL(0x2E0F011E), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F011E, +REG64( EX_8_PPM_SCRATCH0 , RULL(0x300F011E), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F011E, +REG64( EX_9_PPM_SCRATCH0 , RULL(0x320F011E), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F011E, +REG64( EX_10_PPM_SCRATCH0 , RULL(0x340F011E), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F011E, +REG64( EX_11_PPM_SCRATCH0 , RULL(0x360F011E), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F011E, + +REG64( C_PPM_SCRATCH1 , RULL(0x200F011F), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_PPM_SCRATCH1 , RULL(0x200F011F), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_PPM_SCRATCH1 , RULL(0x210F011F), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_PPM_SCRATCH1 , RULL(0x220F011F), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_PPM_SCRATCH1 , RULL(0x230F011F), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_PPM_SCRATCH1 , RULL(0x240F011F), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_PPM_SCRATCH1 , RULL(0x250F011F), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_PPM_SCRATCH1 , RULL(0x260F011F), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_PPM_SCRATCH1 , RULL(0x270F011F), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_PPM_SCRATCH1 , RULL(0x280F011F), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_PPM_SCRATCH1 , RULL(0x290F011F), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_PPM_SCRATCH1 , RULL(0x2A0F011F), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_PPM_SCRATCH1 , RULL(0x2B0F011F), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_PPM_SCRATCH1 , RULL(0x2C0F011F), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_PPM_SCRATCH1 , RULL(0x2D0F011F), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_PPM_SCRATCH1 , RULL(0x2E0F011F), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_PPM_SCRATCH1 , RULL(0x2F0F011F), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_PPM_SCRATCH1 , RULL(0x300F011F), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_PPM_SCRATCH1 , RULL(0x310F011F), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_PPM_SCRATCH1 , RULL(0x320F011F), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_PPM_SCRATCH1 , RULL(0x330F011F), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_PPM_SCRATCH1 , RULL(0x340F011F), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_PPM_SCRATCH1 , RULL(0x350F011F), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_PPM_SCRATCH1 , RULL(0x360F011F), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_PPM_SCRATCH1 , RULL(0x370F011F), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EQ_PPM_SCRATCH1 , RULL(0x100F011F), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_0_PPM_SCRATCH1 , RULL(0x100F011F), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_1_PPM_SCRATCH1 , RULL(0x110F011F), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_2_PPM_SCRATCH1 , RULL(0x120F011F), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_3_PPM_SCRATCH1 , RULL(0x130F011F), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_4_PPM_SCRATCH1 , RULL(0x140F011F), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_5_PPM_SCRATCH1 , RULL(0x150F011F), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EX_PPM_SCRATCH1 , RULL(0x200F011F), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F011F, +REG64( EX_0_PPM_SCRATCH1 , RULL(0x200F011F), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F011F, +REG64( EX_1_PPM_SCRATCH1 , RULL(0x230F011F), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F011F, +REG64( EX_2_PPM_SCRATCH1 , RULL(0x240F011F), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F011F, +REG64( EX_3_PPM_SCRATCH1 , RULL(0x260F011F), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F011F, +REG64( EX_4_PPM_SCRATCH1 , RULL(0x280F011F), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F011F, +REG64( EX_5_PPM_SCRATCH1 , RULL(0x2A0F011F), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F011F, +REG64( EX_6_PPM_SCRATCH1 , RULL(0x2C0F011F), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F011F, +REG64( EX_7_PPM_SCRATCH1 , RULL(0x2E0F011F), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F011F, +REG64( EX_8_PPM_SCRATCH1 , RULL(0x300F011F), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F011F, +REG64( EX_9_PPM_SCRATCH1 , RULL(0x320F011F), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F011F, +REG64( EX_10_PPM_SCRATCH1 , RULL(0x340F011F), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F011F, +REG64( EX_11_PPM_SCRATCH1 , RULL(0x360F011F), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F011F, + +REG64( C_PPM_SPWKUP_FSP , RULL(0x200F010B), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_PPM_SPWKUP_FSP , RULL(0x200F010B), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_PPM_SPWKUP_FSP , RULL(0x210F010B), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_PPM_SPWKUP_FSP , RULL(0x220F010B), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_PPM_SPWKUP_FSP , RULL(0x230F010B), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_PPM_SPWKUP_FSP , RULL(0x240F010B), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_PPM_SPWKUP_FSP , RULL(0x250F010B), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_PPM_SPWKUP_FSP , RULL(0x260F010B), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_PPM_SPWKUP_FSP , RULL(0x270F010B), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_PPM_SPWKUP_FSP , RULL(0x280F010B), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_PPM_SPWKUP_FSP , RULL(0x290F010B), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_PPM_SPWKUP_FSP , RULL(0x2A0F010B), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_PPM_SPWKUP_FSP , RULL(0x2B0F010B), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_PPM_SPWKUP_FSP , RULL(0x2C0F010B), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_PPM_SPWKUP_FSP , RULL(0x2D0F010B), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_PPM_SPWKUP_FSP , RULL(0x2E0F010B), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_PPM_SPWKUP_FSP , RULL(0x2F0F010B), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_PPM_SPWKUP_FSP , RULL(0x300F010B), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_PPM_SPWKUP_FSP , RULL(0x310F010B), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_PPM_SPWKUP_FSP , RULL(0x320F010B), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_PPM_SPWKUP_FSP , RULL(0x330F010B), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_PPM_SPWKUP_FSP , RULL(0x340F010B), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_PPM_SPWKUP_FSP , RULL(0x350F010B), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_PPM_SPWKUP_FSP , RULL(0x360F010B), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_PPM_SPWKUP_FSP , RULL(0x370F010B), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EQ_PPM_SPWKUP_FSP , RULL(0x100F010B), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_0_PPM_SPWKUP_FSP , RULL(0x100F010B), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_1_PPM_SPWKUP_FSP , RULL(0x110F010B), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_2_PPM_SPWKUP_FSP , RULL(0x120F010B), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_3_PPM_SPWKUP_FSP , RULL(0x130F010B), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_4_PPM_SPWKUP_FSP , RULL(0x140F010B), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_5_PPM_SPWKUP_FSP , RULL(0x150F010B), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EX_PPM_SPWKUP_FSP , RULL(0x200F010B), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F010B, +REG64( EX_0_PPM_SPWKUP_FSP , RULL(0x200F010B), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F010B, +REG64( EX_1_PPM_SPWKUP_FSP , RULL(0x230F010B), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F010B, +REG64( EX_2_PPM_SPWKUP_FSP , RULL(0x240F010B), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F010B, +REG64( EX_3_PPM_SPWKUP_FSP , RULL(0x260F010B), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F010B, +REG64( EX_4_PPM_SPWKUP_FSP , RULL(0x280F010B), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F010B, +REG64( EX_5_PPM_SPWKUP_FSP , RULL(0x2A0F010B), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F010B, +REG64( EX_6_PPM_SPWKUP_FSP , RULL(0x2C0F010B), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F010B, +REG64( EX_7_PPM_SPWKUP_FSP , RULL(0x2E0F010B), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F010B, +REG64( EX_8_PPM_SPWKUP_FSP , RULL(0x300F010B), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F010B, +REG64( EX_9_PPM_SPWKUP_FSP , RULL(0x320F010B), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F010B, +REG64( EX_10_PPM_SPWKUP_FSP , RULL(0x340F010B), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F010B, +REG64( EX_11_PPM_SPWKUP_FSP , RULL(0x360F010B), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F010B, + +REG64( C_PPM_SPWKUP_HYP , RULL(0x200F010D), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_PPM_SPWKUP_HYP , RULL(0x200F010D), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_PPM_SPWKUP_HYP , RULL(0x210F010D), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_PPM_SPWKUP_HYP , RULL(0x220F010D), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_PPM_SPWKUP_HYP , RULL(0x230F010D), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_PPM_SPWKUP_HYP , RULL(0x240F010D), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_PPM_SPWKUP_HYP , RULL(0x250F010D), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_PPM_SPWKUP_HYP , RULL(0x260F010D), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_PPM_SPWKUP_HYP , RULL(0x270F010D), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_PPM_SPWKUP_HYP , RULL(0x280F010D), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_PPM_SPWKUP_HYP , RULL(0x290F010D), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_PPM_SPWKUP_HYP , RULL(0x2A0F010D), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_PPM_SPWKUP_HYP , RULL(0x2B0F010D), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_PPM_SPWKUP_HYP , RULL(0x2C0F010D), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_PPM_SPWKUP_HYP , RULL(0x2D0F010D), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_PPM_SPWKUP_HYP , RULL(0x2E0F010D), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_PPM_SPWKUP_HYP , RULL(0x2F0F010D), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_PPM_SPWKUP_HYP , RULL(0x300F010D), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_PPM_SPWKUP_HYP , RULL(0x310F010D), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_PPM_SPWKUP_HYP , RULL(0x320F010D), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_PPM_SPWKUP_HYP , RULL(0x330F010D), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_PPM_SPWKUP_HYP , RULL(0x340F010D), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_PPM_SPWKUP_HYP , RULL(0x350F010D), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_PPM_SPWKUP_HYP , RULL(0x360F010D), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_PPM_SPWKUP_HYP , RULL(0x370F010D), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EQ_PPM_SPWKUP_HYP , RULL(0x100F010D), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_0_PPM_SPWKUP_HYP , RULL(0x100F010D), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_1_PPM_SPWKUP_HYP , RULL(0x110F010D), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_2_PPM_SPWKUP_HYP , RULL(0x120F010D), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_3_PPM_SPWKUP_HYP , RULL(0x130F010D), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_4_PPM_SPWKUP_HYP , RULL(0x140F010D), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_5_PPM_SPWKUP_HYP , RULL(0x150F010D), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EX_PPM_SPWKUP_HYP , RULL(0x200F010D), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F010D, +REG64( EX_0_PPM_SPWKUP_HYP , RULL(0x200F010D), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F010D, +REG64( EX_1_PPM_SPWKUP_HYP , RULL(0x230F010D), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F010D, +REG64( EX_2_PPM_SPWKUP_HYP , RULL(0x240F010D), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F010D, +REG64( EX_3_PPM_SPWKUP_HYP , RULL(0x260F010D), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F010D, +REG64( EX_4_PPM_SPWKUP_HYP , RULL(0x280F010D), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F010D, +REG64( EX_5_PPM_SPWKUP_HYP , RULL(0x2A0F010D), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F010D, +REG64( EX_6_PPM_SPWKUP_HYP , RULL(0x2C0F010D), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F010D, +REG64( EX_7_PPM_SPWKUP_HYP , RULL(0x2E0F010D), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F010D, +REG64( EX_8_PPM_SPWKUP_HYP , RULL(0x300F010D), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F010D, +REG64( EX_9_PPM_SPWKUP_HYP , RULL(0x320F010D), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F010D, +REG64( EX_10_PPM_SPWKUP_HYP , RULL(0x340F010D), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F010D, +REG64( EX_11_PPM_SPWKUP_HYP , RULL(0x360F010D), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F010D, + +REG64( C_PPM_SPWKUP_OCC , RULL(0x200F010C), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_PPM_SPWKUP_OCC , RULL(0x200F010C), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_PPM_SPWKUP_OCC , RULL(0x210F010C), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_PPM_SPWKUP_OCC , RULL(0x220F010C), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_PPM_SPWKUP_OCC , RULL(0x230F010C), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_PPM_SPWKUP_OCC , RULL(0x240F010C), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_PPM_SPWKUP_OCC , RULL(0x250F010C), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_PPM_SPWKUP_OCC , RULL(0x260F010C), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_PPM_SPWKUP_OCC , RULL(0x270F010C), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_PPM_SPWKUP_OCC , RULL(0x280F010C), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_PPM_SPWKUP_OCC , RULL(0x290F010C), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_PPM_SPWKUP_OCC , RULL(0x2A0F010C), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_PPM_SPWKUP_OCC , RULL(0x2B0F010C), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_PPM_SPWKUP_OCC , RULL(0x2C0F010C), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_PPM_SPWKUP_OCC , RULL(0x2D0F010C), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_PPM_SPWKUP_OCC , RULL(0x2E0F010C), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_PPM_SPWKUP_OCC , RULL(0x2F0F010C), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_PPM_SPWKUP_OCC , RULL(0x300F010C), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_PPM_SPWKUP_OCC , RULL(0x310F010C), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_PPM_SPWKUP_OCC , RULL(0x320F010C), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_PPM_SPWKUP_OCC , RULL(0x330F010C), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_PPM_SPWKUP_OCC , RULL(0x340F010C), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_PPM_SPWKUP_OCC , RULL(0x350F010C), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_PPM_SPWKUP_OCC , RULL(0x360F010C), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_PPM_SPWKUP_OCC , RULL(0x370F010C), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EQ_PPM_SPWKUP_OCC , RULL(0x100F010C), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_0_PPM_SPWKUP_OCC , RULL(0x100F010C), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_1_PPM_SPWKUP_OCC , RULL(0x110F010C), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_2_PPM_SPWKUP_OCC , RULL(0x120F010C), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_3_PPM_SPWKUP_OCC , RULL(0x130F010C), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_4_PPM_SPWKUP_OCC , RULL(0x140F010C), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_5_PPM_SPWKUP_OCC , RULL(0x150F010C), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EX_PPM_SPWKUP_OCC , RULL(0x200F010C), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F010C, +REG64( EX_0_PPM_SPWKUP_OCC , RULL(0x200F010C), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F010C, +REG64( EX_1_PPM_SPWKUP_OCC , RULL(0x230F010C), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F010C, +REG64( EX_2_PPM_SPWKUP_OCC , RULL(0x240F010C), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F010C, +REG64( EX_3_PPM_SPWKUP_OCC , RULL(0x260F010C), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F010C, +REG64( EX_4_PPM_SPWKUP_OCC , RULL(0x280F010C), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F010C, +REG64( EX_5_PPM_SPWKUP_OCC , RULL(0x2A0F010C), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F010C, +REG64( EX_6_PPM_SPWKUP_OCC , RULL(0x2C0F010C), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F010C, +REG64( EX_7_PPM_SPWKUP_OCC , RULL(0x2E0F010C), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F010C, +REG64( EX_8_PPM_SPWKUP_OCC , RULL(0x300F010C), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F010C, +REG64( EX_9_PPM_SPWKUP_OCC , RULL(0x320F010C), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F010C, +REG64( EX_10_PPM_SPWKUP_OCC , RULL(0x340F010C), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F010C, +REG64( EX_11_PPM_SPWKUP_OCC , RULL(0x360F010C), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F010C, + +REG64( C_PPM_SPWKUP_OTR , RULL(0x200F010A), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_PPM_SPWKUP_OTR , RULL(0x200F010A), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_PPM_SPWKUP_OTR , RULL(0x210F010A), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_PPM_SPWKUP_OTR , RULL(0x220F010A), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_PPM_SPWKUP_OTR , RULL(0x230F010A), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_PPM_SPWKUP_OTR , RULL(0x240F010A), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_PPM_SPWKUP_OTR , RULL(0x250F010A), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_PPM_SPWKUP_OTR , RULL(0x260F010A), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_PPM_SPWKUP_OTR , RULL(0x270F010A), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_PPM_SPWKUP_OTR , RULL(0x280F010A), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_PPM_SPWKUP_OTR , RULL(0x290F010A), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_PPM_SPWKUP_OTR , RULL(0x2A0F010A), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_PPM_SPWKUP_OTR , RULL(0x2B0F010A), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_PPM_SPWKUP_OTR , RULL(0x2C0F010A), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_PPM_SPWKUP_OTR , RULL(0x2D0F010A), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_PPM_SPWKUP_OTR , RULL(0x2E0F010A), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_PPM_SPWKUP_OTR , RULL(0x2F0F010A), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_PPM_SPWKUP_OTR , RULL(0x300F010A), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_PPM_SPWKUP_OTR , RULL(0x310F010A), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_PPM_SPWKUP_OTR , RULL(0x320F010A), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_PPM_SPWKUP_OTR , RULL(0x330F010A), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_PPM_SPWKUP_OTR , RULL(0x340F010A), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_PPM_SPWKUP_OTR , RULL(0x350F010A), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_PPM_SPWKUP_OTR , RULL(0x360F010A), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_PPM_SPWKUP_OTR , RULL(0x370F010A), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EQ_PPM_SPWKUP_OTR , RULL(0x100F010A), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_0_PPM_SPWKUP_OTR , RULL(0x100F010A), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_1_PPM_SPWKUP_OTR , RULL(0x110F010A), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_2_PPM_SPWKUP_OTR , RULL(0x120F010A), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_3_PPM_SPWKUP_OTR , RULL(0x130F010A), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_4_PPM_SPWKUP_OTR , RULL(0x140F010A), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_5_PPM_SPWKUP_OTR , RULL(0x150F010A), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EX_PPM_SPWKUP_OTR , RULL(0x200F010A), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F010A, +REG64( EX_0_PPM_SPWKUP_OTR , RULL(0x200F010A), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F010A, +REG64( EX_1_PPM_SPWKUP_OTR , RULL(0x230F010A), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F010A, +REG64( EX_2_PPM_SPWKUP_OTR , RULL(0x240F010A), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F010A, +REG64( EX_3_PPM_SPWKUP_OTR , RULL(0x260F010A), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F010A, +REG64( EX_4_PPM_SPWKUP_OTR , RULL(0x280F010A), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F010A, +REG64( EX_5_PPM_SPWKUP_OTR , RULL(0x2A0F010A), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F010A, +REG64( EX_6_PPM_SPWKUP_OTR , RULL(0x2C0F010A), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F010A, +REG64( EX_7_PPM_SPWKUP_OTR , RULL(0x2E0F010A), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F010A, +REG64( EX_8_PPM_SPWKUP_OTR , RULL(0x300F010A), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F010A, +REG64( EX_9_PPM_SPWKUP_OTR , RULL(0x320F010A), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F010A, +REG64( EX_10_PPM_SPWKUP_OTR , RULL(0x340F010A), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F010A, +REG64( EX_11_PPM_SPWKUP_OTR , RULL(0x360F010A), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F010A, + +REG64( C_PPM_SSHFSP , RULL(0x200F0111), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_PPM_SSHFSP , RULL(0x200F0111), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_PPM_SSHFSP , RULL(0x210F0111), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_PPM_SSHFSP , RULL(0x220F0111), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_PPM_SSHFSP , RULL(0x230F0111), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_PPM_SSHFSP , RULL(0x240F0111), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_PPM_SSHFSP , RULL(0x250F0111), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_PPM_SSHFSP , RULL(0x260F0111), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_PPM_SSHFSP , RULL(0x270F0111), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_PPM_SSHFSP , RULL(0x280F0111), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_PPM_SSHFSP , RULL(0x290F0111), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_PPM_SSHFSP , RULL(0x2A0F0111), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_PPM_SSHFSP , RULL(0x2B0F0111), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_PPM_SSHFSP , RULL(0x2C0F0111), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_PPM_SSHFSP , RULL(0x2D0F0111), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_PPM_SSHFSP , RULL(0x2E0F0111), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_PPM_SSHFSP , RULL(0x2F0F0111), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_PPM_SSHFSP , RULL(0x300F0111), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_PPM_SSHFSP , RULL(0x310F0111), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_PPM_SSHFSP , RULL(0x320F0111), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_PPM_SSHFSP , RULL(0x330F0111), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_PPM_SSHFSP , RULL(0x340F0111), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_PPM_SSHFSP , RULL(0x350F0111), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_PPM_SSHFSP , RULL(0x360F0111), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_PPM_SSHFSP , RULL(0x370F0111), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_PPM_SSHFSP , RULL(0x100F0111), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_PPM_SSHFSP , RULL(0x100F0111), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_PPM_SSHFSP , RULL(0x110F0111), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_PPM_SSHFSP , RULL(0x120F0111), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_PPM_SSHFSP , RULL(0x130F0111), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_PPM_SSHFSP , RULL(0x140F0111), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_PPM_SSHFSP , RULL(0x150F0111), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_PPM_SSHFSP , RULL(0x200F0111), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0111, +REG64( EX_0_PPM_SSHFSP , RULL(0x200F0111), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0111, +REG64( EX_1_PPM_SSHFSP , RULL(0x230F0111), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0111, +REG64( EX_2_PPM_SSHFSP , RULL(0x240F0111), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0111, +REG64( EX_3_PPM_SSHFSP , RULL(0x260F0111), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0111, +REG64( EX_4_PPM_SSHFSP , RULL(0x280F0111), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0111, +REG64( EX_5_PPM_SSHFSP , RULL(0x2A0F0111), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0111, +REG64( EX_6_PPM_SSHFSP , RULL(0x2C0F0111), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0111, +REG64( EX_7_PPM_SSHFSP , RULL(0x2E0F0111), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0111, +REG64( EX_8_PPM_SSHFSP , RULL(0x300F0111), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0111, +REG64( EX_9_PPM_SSHFSP , RULL(0x320F0111), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0111, +REG64( EX_10_PPM_SSHFSP , RULL(0x340F0111), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0111, +REG64( EX_11_PPM_SSHFSP , RULL(0x360F0111), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0111, + +REG64( C_PPM_SSHHYP , RULL(0x200F0114), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_PPM_SSHHYP , RULL(0x200F0114), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_PPM_SSHHYP , RULL(0x210F0114), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_PPM_SSHHYP , RULL(0x220F0114), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_PPM_SSHHYP , RULL(0x230F0114), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_PPM_SSHHYP , RULL(0x240F0114), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_PPM_SSHHYP , RULL(0x250F0114), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_PPM_SSHHYP , RULL(0x260F0114), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_PPM_SSHHYP , RULL(0x270F0114), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_PPM_SSHHYP , RULL(0x280F0114), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_PPM_SSHHYP , RULL(0x290F0114), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_PPM_SSHHYP , RULL(0x2A0F0114), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_PPM_SSHHYP , RULL(0x2B0F0114), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_PPM_SSHHYP , RULL(0x2C0F0114), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_PPM_SSHHYP , RULL(0x2D0F0114), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_PPM_SSHHYP , RULL(0x2E0F0114), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_PPM_SSHHYP , RULL(0x2F0F0114), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_PPM_SSHHYP , RULL(0x300F0114), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_PPM_SSHHYP , RULL(0x310F0114), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_PPM_SSHHYP , RULL(0x320F0114), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_PPM_SSHHYP , RULL(0x330F0114), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_PPM_SSHHYP , RULL(0x340F0114), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_PPM_SSHHYP , RULL(0x350F0114), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_PPM_SSHHYP , RULL(0x360F0114), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_PPM_SSHHYP , RULL(0x370F0114), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_PPM_SSHHYP , RULL(0x100F0114), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_PPM_SSHHYP , RULL(0x100F0114), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_PPM_SSHHYP , RULL(0x110F0114), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_PPM_SSHHYP , RULL(0x120F0114), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_PPM_SSHHYP , RULL(0x130F0114), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_PPM_SSHHYP , RULL(0x140F0114), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_PPM_SSHHYP , RULL(0x150F0114), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_PPM_SSHHYP , RULL(0x200F0114), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0114, +REG64( EX_0_PPM_SSHHYP , RULL(0x200F0114), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0114, +REG64( EX_1_PPM_SSHHYP , RULL(0x230F0114), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0114, +REG64( EX_2_PPM_SSHHYP , RULL(0x240F0114), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0114, +REG64( EX_3_PPM_SSHHYP , RULL(0x260F0114), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0114, +REG64( EX_4_PPM_SSHHYP , RULL(0x280F0114), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0114, +REG64( EX_5_PPM_SSHHYP , RULL(0x2A0F0114), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0114, +REG64( EX_6_PPM_SSHHYP , RULL(0x2C0F0114), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0114, +REG64( EX_7_PPM_SSHHYP , RULL(0x2E0F0114), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0114, +REG64( EX_8_PPM_SSHHYP , RULL(0x300F0114), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0114, +REG64( EX_9_PPM_SSHHYP , RULL(0x320F0114), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0114, +REG64( EX_10_PPM_SSHHYP , RULL(0x340F0114), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0114, +REG64( EX_11_PPM_SSHHYP , RULL(0x360F0114), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0114, + +REG64( C_PPM_SSHOCC , RULL(0x200F0112), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_PPM_SSHOCC , RULL(0x200F0112), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_PPM_SSHOCC , RULL(0x210F0112), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_PPM_SSHOCC , RULL(0x220F0112), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_PPM_SSHOCC , RULL(0x230F0112), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_PPM_SSHOCC , RULL(0x240F0112), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_PPM_SSHOCC , RULL(0x250F0112), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_PPM_SSHOCC , RULL(0x260F0112), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_PPM_SSHOCC , RULL(0x270F0112), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_PPM_SSHOCC , RULL(0x280F0112), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_PPM_SSHOCC , RULL(0x290F0112), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_PPM_SSHOCC , RULL(0x2A0F0112), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_PPM_SSHOCC , RULL(0x2B0F0112), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_PPM_SSHOCC , RULL(0x2C0F0112), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_PPM_SSHOCC , RULL(0x2D0F0112), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_PPM_SSHOCC , RULL(0x2E0F0112), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_PPM_SSHOCC , RULL(0x2F0F0112), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_PPM_SSHOCC , RULL(0x300F0112), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_PPM_SSHOCC , RULL(0x310F0112), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_PPM_SSHOCC , RULL(0x320F0112), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_PPM_SSHOCC , RULL(0x330F0112), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_PPM_SSHOCC , RULL(0x340F0112), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_PPM_SSHOCC , RULL(0x350F0112), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_PPM_SSHOCC , RULL(0x360F0112), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_PPM_SSHOCC , RULL(0x370F0112), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_PPM_SSHOCC , RULL(0x100F0112), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_PPM_SSHOCC , RULL(0x100F0112), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_PPM_SSHOCC , RULL(0x110F0112), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_PPM_SSHOCC , RULL(0x120F0112), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_PPM_SSHOCC , RULL(0x130F0112), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_PPM_SSHOCC , RULL(0x140F0112), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_PPM_SSHOCC , RULL(0x150F0112), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_PPM_SSHOCC , RULL(0x200F0112), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0112, +REG64( EX_0_PPM_SSHOCC , RULL(0x200F0112), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0112, +REG64( EX_1_PPM_SSHOCC , RULL(0x230F0112), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0112, +REG64( EX_2_PPM_SSHOCC , RULL(0x240F0112), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0112, +REG64( EX_3_PPM_SSHOCC , RULL(0x260F0112), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0112, +REG64( EX_4_PPM_SSHOCC , RULL(0x280F0112), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0112, +REG64( EX_5_PPM_SSHOCC , RULL(0x2A0F0112), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0112, +REG64( EX_6_PPM_SSHOCC , RULL(0x2C0F0112), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0112, +REG64( EX_7_PPM_SSHOCC , RULL(0x2E0F0112), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0112, +REG64( EX_8_PPM_SSHOCC , RULL(0x300F0112), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0112, +REG64( EX_9_PPM_SSHOCC , RULL(0x320F0112), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0112, +REG64( EX_10_PPM_SSHOCC , RULL(0x340F0112), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0112, +REG64( EX_11_PPM_SSHOCC , RULL(0x360F0112), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0112, + +REG64( C_PPM_SSHOTR , RULL(0x200F0113), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_PPM_SSHOTR , RULL(0x200F0113), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_PPM_SSHOTR , RULL(0x210F0113), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_PPM_SSHOTR , RULL(0x220F0113), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_PPM_SSHOTR , RULL(0x230F0113), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_PPM_SSHOTR , RULL(0x240F0113), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_PPM_SSHOTR , RULL(0x250F0113), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_PPM_SSHOTR , RULL(0x260F0113), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_PPM_SSHOTR , RULL(0x270F0113), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_PPM_SSHOTR , RULL(0x280F0113), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_PPM_SSHOTR , RULL(0x290F0113), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_PPM_SSHOTR , RULL(0x2A0F0113), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_PPM_SSHOTR , RULL(0x2B0F0113), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_PPM_SSHOTR , RULL(0x2C0F0113), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_PPM_SSHOTR , RULL(0x2D0F0113), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_PPM_SSHOTR , RULL(0x2E0F0113), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_PPM_SSHOTR , RULL(0x2F0F0113), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_PPM_SSHOTR , RULL(0x300F0113), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_PPM_SSHOTR , RULL(0x310F0113), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_PPM_SSHOTR , RULL(0x320F0113), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_PPM_SSHOTR , RULL(0x330F0113), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_PPM_SSHOTR , RULL(0x340F0113), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_PPM_SSHOTR , RULL(0x350F0113), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_PPM_SSHOTR , RULL(0x360F0113), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_PPM_SSHOTR , RULL(0x370F0113), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_PPM_SSHOTR , RULL(0x100F0113), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_PPM_SSHOTR , RULL(0x100F0113), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_PPM_SSHOTR , RULL(0x110F0113), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_PPM_SSHOTR , RULL(0x120F0113), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_PPM_SSHOTR , RULL(0x130F0113), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_PPM_SSHOTR , RULL(0x140F0113), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_PPM_SSHOTR , RULL(0x150F0113), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_PPM_SSHOTR , RULL(0x200F0113), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0113, +REG64( EX_0_PPM_SSHOTR , RULL(0x200F0113), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0113, +REG64( EX_1_PPM_SSHOTR , RULL(0x230F0113), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0113, +REG64( EX_2_PPM_SSHOTR , RULL(0x240F0113), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0113, +REG64( EX_3_PPM_SSHOTR , RULL(0x260F0113), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0113, +REG64( EX_4_PPM_SSHOTR , RULL(0x280F0113), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0113, +REG64( EX_5_PPM_SSHOTR , RULL(0x2A0F0113), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0113, +REG64( EX_6_PPM_SSHOTR , RULL(0x2C0F0113), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0113, +REG64( EX_7_PPM_SSHOTR , RULL(0x2E0F0113), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0113, +REG64( EX_8_PPM_SSHOTR , RULL(0x300F0113), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0113, +REG64( EX_9_PPM_SSHOTR , RULL(0x320F0113), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0113, +REG64( EX_10_PPM_SSHOTR , RULL(0x340F0113), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0113, +REG64( EX_11_PPM_SSHOTR , RULL(0x360F0113), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0113, + +REG64( C_PPM_SSHSRC , RULL(0x200F0110), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_PPM_SSHSRC , RULL(0x200F0110), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_PPM_SSHSRC , RULL(0x210F0110), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_PPM_SSHSRC , RULL(0x220F0110), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_PPM_SSHSRC , RULL(0x230F0110), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_PPM_SSHSRC , RULL(0x240F0110), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_PPM_SSHSRC , RULL(0x250F0110), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_PPM_SSHSRC , RULL(0x260F0110), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_PPM_SSHSRC , RULL(0x270F0110), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_PPM_SSHSRC , RULL(0x280F0110), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_PPM_SSHSRC , RULL(0x290F0110), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_PPM_SSHSRC , RULL(0x2A0F0110), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_PPM_SSHSRC , RULL(0x2B0F0110), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_PPM_SSHSRC , RULL(0x2C0F0110), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_PPM_SSHSRC , RULL(0x2D0F0110), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_PPM_SSHSRC , RULL(0x2E0F0110), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_PPM_SSHSRC , RULL(0x2F0F0110), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_PPM_SSHSRC , RULL(0x300F0110), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_PPM_SSHSRC , RULL(0x310F0110), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_PPM_SSHSRC , RULL(0x320F0110), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_PPM_SSHSRC , RULL(0x330F0110), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_PPM_SSHSRC , RULL(0x340F0110), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_PPM_SSHSRC , RULL(0x350F0110), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_PPM_SSHSRC , RULL(0x360F0110), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_PPM_SSHSRC , RULL(0x370F0110), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_PPM_SSHSRC , RULL(0x100F0110), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_PPM_SSHSRC , RULL(0x100F0110), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_PPM_SSHSRC , RULL(0x110F0110), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_PPM_SSHSRC , RULL(0x120F0110), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_PPM_SSHSRC , RULL(0x130F0110), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_PPM_SSHSRC , RULL(0x140F0110), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_PPM_SSHSRC , RULL(0x150F0110), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_PPM_SSHSRC , RULL(0x200F0110), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0110, +REG64( EX_0_PPM_SSHSRC , RULL(0x200F0110), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0110, +REG64( EX_1_PPM_SSHSRC , RULL(0x230F0110), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0110, +REG64( EX_2_PPM_SSHSRC , RULL(0x240F0110), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0110, +REG64( EX_3_PPM_SSHSRC , RULL(0x260F0110), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0110, +REG64( EX_4_PPM_SSHSRC , RULL(0x280F0110), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0110, +REG64( EX_5_PPM_SSHSRC , RULL(0x2A0F0110), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0110, +REG64( EX_6_PPM_SSHSRC , RULL(0x2C0F0110), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0110, +REG64( EX_7_PPM_SSHSRC , RULL(0x2E0F0110), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0110, +REG64( EX_8_PPM_SSHSRC , RULL(0x300F0110), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0110, +REG64( EX_9_PPM_SSHSRC , RULL(0x320F0110), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0110, +REG64( EX_10_PPM_SSHSRC , RULL(0x340F0110), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0110, +REG64( EX_11_PPM_SSHSRC , RULL(0x360F0110), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0110, + +REG64( C_PPM_VDMCR , RULL(0x200F01B8), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_PPM_VDMCR_CLEAR , RULL(0x200F01B9), SH_UNT_C , + SH_ACS_SCOM1_CLEAR ); +REG64( C_PPM_VDMCR_OR , RULL(0x200F01BA), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_PPM_VDMCR , RULL(0x200F01B8), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_PPM_VDMCR_CLEAR , RULL(0x200F01B9), SH_UNT_C_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_0_PPM_VDMCR_OR , RULL(0x200F01BA), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_PPM_VDMCR , RULL(0x210F01B8), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_PPM_VDMCR_CLEAR , RULL(0x210F01B9), SH_UNT_C_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_1_PPM_VDMCR_OR , RULL(0x210F01BA), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_PPM_VDMCR , RULL(0x220F01B8), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_PPM_VDMCR_CLEAR , RULL(0x220F01B9), SH_UNT_C_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_2_PPM_VDMCR_OR , RULL(0x220F01BA), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_PPM_VDMCR , RULL(0x230F01B8), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_PPM_VDMCR_CLEAR , RULL(0x230F01B9), SH_UNT_C_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_3_PPM_VDMCR_OR , RULL(0x230F01BA), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_PPM_VDMCR , RULL(0x240F01B8), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_PPM_VDMCR_CLEAR , RULL(0x240F01B9), SH_UNT_C_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_4_PPM_VDMCR_OR , RULL(0x240F01BA), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_PPM_VDMCR , RULL(0x250F01B8), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_PPM_VDMCR_CLEAR , RULL(0x250F01B9), SH_UNT_C_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_5_PPM_VDMCR_OR , RULL(0x250F01BA), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_PPM_VDMCR , RULL(0x260F01B8), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_PPM_VDMCR_CLEAR , RULL(0x260F01B9), SH_UNT_C_6 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_6_PPM_VDMCR_OR , RULL(0x260F01BA), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_PPM_VDMCR , RULL(0x270F01B8), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_PPM_VDMCR_CLEAR , RULL(0x270F01B9), SH_UNT_C_7 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_7_PPM_VDMCR_OR , RULL(0x270F01BA), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_PPM_VDMCR , RULL(0x280F01B8), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_PPM_VDMCR_CLEAR , RULL(0x280F01B9), SH_UNT_C_8 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_8_PPM_VDMCR_OR , RULL(0x280F01BA), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_PPM_VDMCR , RULL(0x290F01B8), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_PPM_VDMCR_CLEAR , RULL(0x290F01B9), SH_UNT_C_9 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_9_PPM_VDMCR_OR , RULL(0x290F01BA), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_PPM_VDMCR , RULL(0x2A0F01B8), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_PPM_VDMCR_CLEAR , RULL(0x2A0F01B9), SH_UNT_C_10 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_10_PPM_VDMCR_OR , RULL(0x2A0F01BA), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_PPM_VDMCR , RULL(0x2B0F01B8), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_PPM_VDMCR_CLEAR , RULL(0x2B0F01B9), SH_UNT_C_11 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_11_PPM_VDMCR_OR , RULL(0x2B0F01BA), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_PPM_VDMCR , RULL(0x2C0F01B8), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_PPM_VDMCR_CLEAR , RULL(0x2C0F01B9), SH_UNT_C_12 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_12_PPM_VDMCR_OR , RULL(0x2C0F01BA), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_PPM_VDMCR , RULL(0x2D0F01B8), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_PPM_VDMCR_CLEAR , RULL(0x2D0F01B9), SH_UNT_C_13 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_13_PPM_VDMCR_OR , RULL(0x2D0F01BA), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_PPM_VDMCR , RULL(0x2E0F01B8), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_PPM_VDMCR_CLEAR , RULL(0x2E0F01B9), SH_UNT_C_14 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_14_PPM_VDMCR_OR , RULL(0x2E0F01BA), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_PPM_VDMCR , RULL(0x2F0F01B8), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_PPM_VDMCR_CLEAR , RULL(0x2F0F01B9), SH_UNT_C_15 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_15_PPM_VDMCR_OR , RULL(0x2F0F01BA), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_PPM_VDMCR , RULL(0x300F01B8), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_PPM_VDMCR_CLEAR , RULL(0x300F01B9), SH_UNT_C_16 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_16_PPM_VDMCR_OR , RULL(0x300F01BA), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_PPM_VDMCR , RULL(0x310F01B8), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_PPM_VDMCR_CLEAR , RULL(0x310F01B9), SH_UNT_C_17 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_17_PPM_VDMCR_OR , RULL(0x310F01BA), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_PPM_VDMCR , RULL(0x320F01B8), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_PPM_VDMCR_CLEAR , RULL(0x320F01B9), SH_UNT_C_18 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_18_PPM_VDMCR_OR , RULL(0x320F01BA), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_PPM_VDMCR , RULL(0x330F01B8), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_PPM_VDMCR_CLEAR , RULL(0x330F01B9), SH_UNT_C_19 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_19_PPM_VDMCR_OR , RULL(0x330F01BA), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_PPM_VDMCR , RULL(0x340F01B8), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_PPM_VDMCR_CLEAR , RULL(0x340F01B9), SH_UNT_C_20 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_20_PPM_VDMCR_OR , RULL(0x340F01BA), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_PPM_VDMCR , RULL(0x350F01B8), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_PPM_VDMCR_CLEAR , RULL(0x350F01B9), SH_UNT_C_21 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_21_PPM_VDMCR_OR , RULL(0x350F01BA), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_PPM_VDMCR , RULL(0x360F01B8), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_PPM_VDMCR_CLEAR , RULL(0x360F01B9), SH_UNT_C_22 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_22_PPM_VDMCR_OR , RULL(0x360F01BA), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_PPM_VDMCR , RULL(0x370F01B8), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_PPM_VDMCR_CLEAR , RULL(0x370F01B9), SH_UNT_C_23 , + SH_ACS_SCOM1_CLEAR ); +REG64( C_23_PPM_VDMCR_OR , RULL(0x370F01BA), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EQ_PPM_VDMCR , RULL(0x100F01B8), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_PPM_VDMCR_CLEAR , RULL(0x100F01B9), SH_UNT_EQ , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_PPM_VDMCR_OR , RULL(0x100F01BA), SH_UNT_EQ , SH_ACS_SCOM2_OR ); +REG64( EQ_0_PPM_VDMCR , RULL(0x100F01B8), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_0_PPM_VDMCR_CLEAR , RULL(0x100F01B9), SH_UNT_EQ_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_0_PPM_VDMCR_OR , RULL(0x100F01BA), SH_UNT_EQ_0 , SH_ACS_SCOM2_OR ); +REG64( EQ_1_PPM_VDMCR , RULL(0x110F01B8), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_1_PPM_VDMCR_CLEAR , RULL(0x110F01B9), SH_UNT_EQ_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_1_PPM_VDMCR_OR , RULL(0x110F01BA), SH_UNT_EQ_1 , SH_ACS_SCOM2_OR ); +REG64( EQ_2_PPM_VDMCR , RULL(0x120F01B8), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_2_PPM_VDMCR_CLEAR , RULL(0x120F01B9), SH_UNT_EQ_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_2_PPM_VDMCR_OR , RULL(0x120F01BA), SH_UNT_EQ_2 , SH_ACS_SCOM2_OR ); +REG64( EQ_3_PPM_VDMCR , RULL(0x130F01B8), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_3_PPM_VDMCR_CLEAR , RULL(0x130F01B9), SH_UNT_EQ_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_3_PPM_VDMCR_OR , RULL(0x130F01BA), SH_UNT_EQ_3 , SH_ACS_SCOM2_OR ); +REG64( EQ_4_PPM_VDMCR , RULL(0x140F01B8), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_4_PPM_VDMCR_CLEAR , RULL(0x140F01B9), SH_UNT_EQ_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_4_PPM_VDMCR_OR , RULL(0x140F01BA), SH_UNT_EQ_4 , SH_ACS_SCOM2_OR ); +REG64( EQ_5_PPM_VDMCR , RULL(0x150F01B8), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EQ_5_PPM_VDMCR_CLEAR , RULL(0x150F01B9), SH_UNT_EQ_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_5_PPM_VDMCR_OR , RULL(0x150F01BA), SH_UNT_EQ_5 , SH_ACS_SCOM2_OR ); +REG64( EX_PPM_VDMCR , RULL(0x200F01B8), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 210F01B8, +REG64( EX_PPM_VDMCR_CLEAR , RULL(0x200F01B9), SH_UNT_EX , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F01B9, +REG64( EX_PPM_VDMCR_OR , RULL(0x200F01BA), SH_UNT_EX , + SH_ACS_SCOM2_OR ); //DUPS: 210F01BA, +REG64( EX_0_PPM_VDMCR , RULL(0x200F01B8), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 210F01B8, +REG64( EX_0_PPM_VDMCR_CLEAR , RULL(0x200F01B9), SH_UNT_EX_0 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 210F01B9, +REG64( EX_0_PPM_VDMCR_OR , RULL(0x200F01BA), SH_UNT_EX_0 , + SH_ACS_SCOM2_OR ); //DUPS: 210F01BA, +REG64( EX_1_PPM_VDMCR , RULL(0x230F01B8), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220F01B8, +REG64( EX_1_PPM_VDMCR_CLEAR , RULL(0x230F01B9), SH_UNT_EX_1 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 220F01B9, +REG64( EX_1_PPM_VDMCR_OR , RULL(0x230F01BA), SH_UNT_EX_1 , + SH_ACS_SCOM2_OR ); //DUPS: 220F01BA, +REG64( EX_2_PPM_VDMCR , RULL(0x240F01B8), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 250F01B8, +REG64( EX_2_PPM_VDMCR_CLEAR , RULL(0x240F01B9), SH_UNT_EX_2 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 250F01B9, +REG64( EX_2_PPM_VDMCR_OR , RULL(0x240F01BA), SH_UNT_EX_2 , + SH_ACS_SCOM2_OR ); //DUPS: 250F01BA, +REG64( EX_3_PPM_VDMCR , RULL(0x260F01B8), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 270F01B8, +REG64( EX_3_PPM_VDMCR_CLEAR , RULL(0x260F01B9), SH_UNT_EX_3 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 270F01B9, +REG64( EX_3_PPM_VDMCR_OR , RULL(0x260F01BA), SH_UNT_EX_3 , + SH_ACS_SCOM2_OR ); //DUPS: 270F01BA, +REG64( EX_4_PPM_VDMCR , RULL(0x280F01B8), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 290F01B8, +REG64( EX_4_PPM_VDMCR_CLEAR , RULL(0x280F01B9), SH_UNT_EX_4 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 290F01B9, +REG64( EX_4_PPM_VDMCR_OR , RULL(0x280F01BA), SH_UNT_EX_4 , + SH_ACS_SCOM2_OR ); //DUPS: 290F01BA, +REG64( EX_5_PPM_VDMCR , RULL(0x2A0F01B8), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B0F01B8, +REG64( EX_5_PPM_VDMCR_CLEAR , RULL(0x2A0F01B9), SH_UNT_EX_5 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2B0F01B9, +REG64( EX_5_PPM_VDMCR_OR , RULL(0x2A0F01BA), SH_UNT_EX_5 , + SH_ACS_SCOM2_OR ); //DUPS: 2B0F01BA, +REG64( EX_6_PPM_VDMCR , RULL(0x2C0F01B8), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D0F01B8, +REG64( EX_6_PPM_VDMCR_CLEAR , RULL(0x2C0F01B9), SH_UNT_EX_6 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2D0F01B9, +REG64( EX_6_PPM_VDMCR_OR , RULL(0x2C0F01BA), SH_UNT_EX_6 , + SH_ACS_SCOM2_OR ); //DUPS: 2D0F01BA, +REG64( EX_7_PPM_VDMCR , RULL(0x2E0F01B8), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F0F01B8, +REG64( EX_7_PPM_VDMCR_CLEAR , RULL(0x2E0F01B9), SH_UNT_EX_7 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 2F0F01B9, +REG64( EX_7_PPM_VDMCR_OR , RULL(0x2E0F01BA), SH_UNT_EX_7 , + SH_ACS_SCOM2_OR ); //DUPS: 2F0F01BA, +REG64( EX_8_PPM_VDMCR , RULL(0x300F01B8), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 310F01B8, +REG64( EX_8_PPM_VDMCR_CLEAR , RULL(0x300F01B9), SH_UNT_EX_8 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 310F01B9, +REG64( EX_8_PPM_VDMCR_OR , RULL(0x300F01BA), SH_UNT_EX_8 , + SH_ACS_SCOM2_OR ); //DUPS: 310F01BA, +REG64( EX_9_PPM_VDMCR , RULL(0x320F01B8), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 330F01B8, +REG64( EX_9_PPM_VDMCR_CLEAR , RULL(0x320F01B9), SH_UNT_EX_9 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 330F01B9, +REG64( EX_9_PPM_VDMCR_OR , RULL(0x320F01BA), SH_UNT_EX_9 , + SH_ACS_SCOM2_OR ); //DUPS: 330F01BA, +REG64( EX_10_PPM_VDMCR , RULL(0x340F01B8), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 350F01B8, +REG64( EX_10_PPM_VDMCR_CLEAR , RULL(0x340F01B9), SH_UNT_EX_10 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 350F01B9, +REG64( EX_10_PPM_VDMCR_OR , RULL(0x340F01BA), SH_UNT_EX_10 , + SH_ACS_SCOM2_OR ); //DUPS: 350F01BA, +REG64( EX_11_PPM_VDMCR , RULL(0x360F01B8), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 370F01B8, +REG64( EX_11_PPM_VDMCR_CLEAR , RULL(0x360F01B9), SH_UNT_EX_11 , + SH_ACS_SCOM1_CLEAR ); //DUPS: 370F01B9, +REG64( EX_11_PPM_VDMCR_OR , RULL(0x360F01BA), SH_UNT_EX_11 , + SH_ACS_SCOM2_OR ); //DUPS: 370F01BA, + +REG64( EQ_PRD_PURGE_CMD_REG , RULL(0x1001080E), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10010C0E, +REG64( EQ_0_PRD_PURGE_CMD_REG , RULL(0x1001080E), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10010C0E, +REG64( EQ_1_PRD_PURGE_CMD_REG , RULL(0x1101080E), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11010C0E, +REG64( EQ_2_PRD_PURGE_CMD_REG , RULL(0x1201080E), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12010C0E, +REG64( EQ_3_PRD_PURGE_CMD_REG , RULL(0x1301080E), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13010C0E, +REG64( EQ_4_PRD_PURGE_CMD_REG , RULL(0x1401080E), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14010C0E, +REG64( EQ_5_PRD_PURGE_CMD_REG , RULL(0x1501080E), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15010C0E, +REG64( EX_PRD_PURGE_CMD_REG , RULL(0x1001080E), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_PRD_PURGE_CMD_REG , RULL(0x1001080E), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_PRD_PURGE_CMD_REG , RULL(0x10010C0E), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_PRD_PURGE_CMD_REG , RULL(0x1101080E), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_PRD_PURGE_CMD_REG , RULL(0x11010C0E), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_PRD_PURGE_CMD_REG , RULL(0x1201080E), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_PRD_PURGE_CMD_REG , RULL(0x12010C0E), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_PRD_PURGE_CMD_REG , RULL(0x1301080E), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_PRD_PURGE_CMD_REG , RULL(0x13010C0E), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_PRD_PURGE_CMD_REG , RULL(0x1401080E), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_PRD_PURGE_CMD_REG , RULL(0x14010C0E), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_PRD_PURGE_CMD_REG , RULL(0x1501080E), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_PRD_PURGE_CMD_REG , RULL(0x15010C0E), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( EQ_PRD_PURGE_REG , RULL(0x1001180E), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10011C0E, +REG64( EQ_0_PRD_PURGE_REG , RULL(0x1001180E), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10011C0E, +REG64( EQ_1_PRD_PURGE_REG , RULL(0x1101180E), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11011C0E, +REG64( EQ_2_PRD_PURGE_REG , RULL(0x1201180E), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12011C0E, +REG64( EQ_3_PRD_PURGE_REG , RULL(0x1301180E), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13011C0E, +REG64( EQ_4_PRD_PURGE_REG , RULL(0x1401180E), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14011C0E, +REG64( EQ_5_PRD_PURGE_REG , RULL(0x1501180E), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15011C0E, +REG64( EX_PRD_PURGE_REG , RULL(0x1001180E), SH_UNT_EX , SH_ACS_SCOM ); +REG64( EX_0_PRD_PURGE_REG , RULL(0x1001180E), SH_UNT_EX_0 , SH_ACS_SCOM ); +REG64( EX_1_PRD_PURGE_REG , RULL(0x10011C0E), SH_UNT_EX_1 , SH_ACS_SCOM ); +REG64( EX_2_PRD_PURGE_REG , RULL(0x1101180E), SH_UNT_EX_2 , SH_ACS_SCOM ); +REG64( EX_3_PRD_PURGE_REG , RULL(0x11011C0E), SH_UNT_EX_3 , SH_ACS_SCOM ); +REG64( EX_4_PRD_PURGE_REG , RULL(0x1201180E), SH_UNT_EX_4 , SH_ACS_SCOM ); +REG64( EX_5_PRD_PURGE_REG , RULL(0x12011C0E), SH_UNT_EX_5 , SH_ACS_SCOM ); +REG64( EX_6_PRD_PURGE_REG , RULL(0x1301180E), SH_UNT_EX_6 , SH_ACS_SCOM ); +REG64( EX_7_PRD_PURGE_REG , RULL(0x13011C0E), SH_UNT_EX_7 , SH_ACS_SCOM ); +REG64( EX_8_PRD_PURGE_REG , RULL(0x1401180E), SH_UNT_EX_8 , SH_ACS_SCOM ); +REG64( EX_9_PRD_PURGE_REG , RULL(0x14011C0E), SH_UNT_EX_9 , SH_ACS_SCOM ); +REG64( EX_10_PRD_PURGE_REG , RULL(0x1501180E), SH_UNT_EX_10 , SH_ACS_SCOM ); +REG64( EX_11_PRD_PURGE_REG , RULL(0x15011C0E), SH_UNT_EX_11 , SH_ACS_SCOM ); + +REG64( C_PRE_COUNTER_REG , RULL(0x200F0028), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_PRE_COUNTER_REG , RULL(0x200F0028), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_PRE_COUNTER_REG , RULL(0x210F0028), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_PRE_COUNTER_REG , RULL(0x220F0028), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_PRE_COUNTER_REG , RULL(0x230F0028), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_PRE_COUNTER_REG , RULL(0x240F0028), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_PRE_COUNTER_REG , RULL(0x250F0028), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_PRE_COUNTER_REG , RULL(0x260F0028), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_PRE_COUNTER_REG , RULL(0x270F0028), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_PRE_COUNTER_REG , RULL(0x280F0028), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_PRE_COUNTER_REG , RULL(0x290F0028), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_PRE_COUNTER_REG , RULL(0x2A0F0028), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_PRE_COUNTER_REG , RULL(0x2B0F0028), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_PRE_COUNTER_REG , RULL(0x2C0F0028), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_PRE_COUNTER_REG , RULL(0x2D0F0028), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_PRE_COUNTER_REG , RULL(0x2E0F0028), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_PRE_COUNTER_REG , RULL(0x2F0F0028), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_PRE_COUNTER_REG , RULL(0x300F0028), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_PRE_COUNTER_REG , RULL(0x310F0028), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_PRE_COUNTER_REG , RULL(0x320F0028), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_PRE_COUNTER_REG , RULL(0x330F0028), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_PRE_COUNTER_REG , RULL(0x340F0028), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_PRE_COUNTER_REG , RULL(0x350F0028), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_PRE_COUNTER_REG , RULL(0x360F0028), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_PRE_COUNTER_REG , RULL(0x370F0028), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_PRE_COUNTER_REG , RULL(0x100F0028), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_PRE_COUNTER_REG , RULL(0x100F0028), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_PRE_COUNTER_REG , RULL(0x110F0028), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_PRE_COUNTER_REG , RULL(0x120F0028), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_PRE_COUNTER_REG , RULL(0x130F0028), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_PRE_COUNTER_REG , RULL(0x140F0028), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_PRE_COUNTER_REG , RULL(0x150F0028), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_PRE_COUNTER_REG , RULL(0x200F0028), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0028, +REG64( EX_0_PRE_COUNTER_REG , RULL(0x200F0028), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0028, +REG64( EX_1_PRE_COUNTER_REG , RULL(0x230F0028), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0028, +REG64( EX_2_PRE_COUNTER_REG , RULL(0x240F0028), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0028, +REG64( EX_3_PRE_COUNTER_REG , RULL(0x260F0028), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0028, +REG64( EX_4_PRE_COUNTER_REG , RULL(0x280F0028), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0028, +REG64( EX_5_PRE_COUNTER_REG , RULL(0x2A0F0028), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0028, +REG64( EX_6_PRE_COUNTER_REG , RULL(0x2C0F0028), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0028, +REG64( EX_7_PRE_COUNTER_REG , RULL(0x2E0F0028), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0028, +REG64( EX_8_PRE_COUNTER_REG , RULL(0x300F0028), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0028, +REG64( EX_9_PRE_COUNTER_REG , RULL(0x320F0028), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0028, +REG64( EX_10_PRE_COUNTER_REG , RULL(0x340F0028), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0028, +REG64( EX_11_PRE_COUNTER_REG , RULL(0x360F0028), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0028, + +REG64( C_PRIMARY_ADDRESS_REG , RULL(0x200F0000), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_PRIMARY_ADDRESS_REG , RULL(0x200F0000), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_PRIMARY_ADDRESS_REG , RULL(0x210F0000), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_PRIMARY_ADDRESS_REG , RULL(0x220F0000), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_PRIMARY_ADDRESS_REG , RULL(0x230F0000), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_PRIMARY_ADDRESS_REG , RULL(0x240F0000), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_PRIMARY_ADDRESS_REG , RULL(0x250F0000), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_PRIMARY_ADDRESS_REG , RULL(0x260F0000), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_PRIMARY_ADDRESS_REG , RULL(0x270F0000), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_PRIMARY_ADDRESS_REG , RULL(0x280F0000), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_PRIMARY_ADDRESS_REG , RULL(0x290F0000), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_PRIMARY_ADDRESS_REG , RULL(0x2A0F0000), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_PRIMARY_ADDRESS_REG , RULL(0x2B0F0000), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_PRIMARY_ADDRESS_REG , RULL(0x2C0F0000), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_PRIMARY_ADDRESS_REG , RULL(0x2D0F0000), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_PRIMARY_ADDRESS_REG , RULL(0x2E0F0000), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_PRIMARY_ADDRESS_REG , RULL(0x2F0F0000), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_PRIMARY_ADDRESS_REG , RULL(0x300F0000), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_PRIMARY_ADDRESS_REG , RULL(0x310F0000), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_PRIMARY_ADDRESS_REG , RULL(0x320F0000), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_PRIMARY_ADDRESS_REG , RULL(0x330F0000), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_PRIMARY_ADDRESS_REG , RULL(0x340F0000), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_PRIMARY_ADDRESS_REG , RULL(0x350F0000), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_PRIMARY_ADDRESS_REG , RULL(0x360F0000), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_PRIMARY_ADDRESS_REG , RULL(0x370F0000), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_PRIMARY_ADDRESS_REG , RULL(0x100F0000), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_PRIMARY_ADDRESS_REG , RULL(0x100F0000), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_PRIMARY_ADDRESS_REG , RULL(0x110F0000), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_PRIMARY_ADDRESS_REG , RULL(0x120F0000), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_PRIMARY_ADDRESS_REG , RULL(0x130F0000), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_PRIMARY_ADDRESS_REG , RULL(0x140F0000), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_PRIMARY_ADDRESS_REG , RULL(0x150F0000), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_PRIMARY_ADDRESS_REG , RULL(0x200F0000), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0000, +REG64( EX_0_PRIMARY_ADDRESS_REG , RULL(0x200F0000), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0000, +REG64( EX_1_PRIMARY_ADDRESS_REG , RULL(0x230F0000), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0000, +REG64( EX_2_PRIMARY_ADDRESS_REG , RULL(0x240F0000), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0000, +REG64( EX_3_PRIMARY_ADDRESS_REG , RULL(0x260F0000), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0000, +REG64( EX_4_PRIMARY_ADDRESS_REG , RULL(0x280F0000), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0000, +REG64( EX_5_PRIMARY_ADDRESS_REG , RULL(0x2A0F0000), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0000, +REG64( EX_6_PRIMARY_ADDRESS_REG , RULL(0x2C0F0000), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0000, +REG64( EX_7_PRIMARY_ADDRESS_REG , RULL(0x2E0F0000), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0000, +REG64( EX_8_PRIMARY_ADDRESS_REG , RULL(0x300F0000), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0000, +REG64( EX_9_PRIMARY_ADDRESS_REG , RULL(0x320F0000), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0000, +REG64( EX_10_PRIMARY_ADDRESS_REG , RULL(0x340F0000), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0000, +REG64( EX_11_PRIMARY_ADDRESS_REG , RULL(0x360F0000), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0000, + +REG64( C_PROTECT_MODE_REG , RULL(0x200F03FE), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_PROTECT_MODE_REG , RULL(0x200F03FE), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_PROTECT_MODE_REG , RULL(0x210F03FE), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_PROTECT_MODE_REG , RULL(0x220F03FE), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_PROTECT_MODE_REG , RULL(0x230F03FE), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_PROTECT_MODE_REG , RULL(0x240F03FE), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_PROTECT_MODE_REG , RULL(0x250F03FE), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_PROTECT_MODE_REG , RULL(0x260F03FE), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_PROTECT_MODE_REG , RULL(0x270F03FE), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_PROTECT_MODE_REG , RULL(0x280F03FE), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_PROTECT_MODE_REG , RULL(0x290F03FE), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_PROTECT_MODE_REG , RULL(0x2A0F03FE), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_PROTECT_MODE_REG , RULL(0x2B0F03FE), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_PROTECT_MODE_REG , RULL(0x2C0F03FE), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_PROTECT_MODE_REG , RULL(0x2D0F03FE), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_PROTECT_MODE_REG , RULL(0x2E0F03FE), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_PROTECT_MODE_REG , RULL(0x2F0F03FE), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_PROTECT_MODE_REG , RULL(0x300F03FE), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_PROTECT_MODE_REG , RULL(0x310F03FE), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_PROTECT_MODE_REG , RULL(0x320F03FE), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_PROTECT_MODE_REG , RULL(0x330F03FE), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_PROTECT_MODE_REG , RULL(0x340F03FE), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_PROTECT_MODE_REG , RULL(0x350F03FE), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_PROTECT_MODE_REG , RULL(0x360F03FE), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_PROTECT_MODE_REG , RULL(0x370F03FE), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_PROTECT_MODE_REG , RULL(0x100F03FE), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_PROTECT_MODE_REG , RULL(0x100F03FE), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_PROTECT_MODE_REG , RULL(0x110F03FE), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_PROTECT_MODE_REG , RULL(0x120F03FE), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_PROTECT_MODE_REG , RULL(0x130F03FE), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_PROTECT_MODE_REG , RULL(0x140F03FE), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_PROTECT_MODE_REG , RULL(0x150F03FE), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_PROTECT_MODE_REG , RULL(0x200F03FE), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F03FE, +REG64( EX_0_PROTECT_MODE_REG , RULL(0x200F03FE), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F03FE, +REG64( EX_1_PROTECT_MODE_REG , RULL(0x230F03FE), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F03FE, +REG64( EX_2_PROTECT_MODE_REG , RULL(0x240F03FE), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F03FE, +REG64( EX_3_PROTECT_MODE_REG , RULL(0x260F03FE), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F03FE, +REG64( EX_4_PROTECT_MODE_REG , RULL(0x280F03FE), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F03FE, +REG64( EX_5_PROTECT_MODE_REG , RULL(0x2A0F03FE), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F03FE, +REG64( EX_6_PROTECT_MODE_REG , RULL(0x2C0F03FE), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F03FE, +REG64( EX_7_PROTECT_MODE_REG , RULL(0x2E0F03FE), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F03FE, +REG64( EX_8_PROTECT_MODE_REG , RULL(0x300F03FE), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F03FE, +REG64( EX_9_PROTECT_MODE_REG , RULL(0x320F03FE), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F03FE, +REG64( EX_10_PROTECT_MODE_REG , RULL(0x340F03FE), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F03FE, +REG64( EX_11_PROTECT_MODE_REG , RULL(0x360F03FE), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F03FE, + +REG64( CAPP_PSLTTMAP0 , RULL(0x0201082D), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_PSLTTMAP0 , RULL(0x0201082D), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_PSLTTMAP0 , RULL(0x0401082D), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_PSLTTMAP1 , RULL(0x0201082E), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_PSLTTMAP1 , RULL(0x0201082E), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_PSLTTMAP1 , RULL(0x0401082E), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_PSLTTMAP2 , RULL(0x0201082F), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_PSLTTMAP2 , RULL(0x0201082F), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_PSLTTMAP2 , RULL(0x0401082F), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_PSLTTMAP3 , RULL(0x02010830), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_PSLTTMAP3 , RULL(0x02010830), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_PSLTTMAP3 , RULL(0x04010830), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( C_PWM_EVENTS , RULL(0x20010822), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_PWM_EVENTS , RULL(0x20010822), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_PWM_EVENTS , RULL(0x21010822), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_PWM_EVENTS , RULL(0x22010822), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_PWM_EVENTS , RULL(0x23010822), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_PWM_EVENTS , RULL(0x24010822), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_PWM_EVENTS , RULL(0x25010822), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_PWM_EVENTS , RULL(0x26010822), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_PWM_EVENTS , RULL(0x27010822), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_PWM_EVENTS , RULL(0x28010822), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_PWM_EVENTS , RULL(0x29010822), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_PWM_EVENTS , RULL(0x2A010822), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_PWM_EVENTS , RULL(0x2B010822), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_PWM_EVENTS , RULL(0x2C010822), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_PWM_EVENTS , RULL(0x2D010822), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_PWM_EVENTS , RULL(0x2E010822), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_PWM_EVENTS , RULL(0x2F010822), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_PWM_EVENTS , RULL(0x30010822), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_PWM_EVENTS , RULL(0x31010822), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_PWM_EVENTS , RULL(0x32010822), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_PWM_EVENTS , RULL(0x33010822), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_PWM_EVENTS , RULL(0x34010822), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_PWM_EVENTS , RULL(0x35010822), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_PWM_EVENTS , RULL(0x36010822), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_PWM_EVENTS , RULL(0x37010822), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_PWM_EVENTS , RULL(0x21010822), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RW ); //DUPS: 20010822, +REG64( EX_10_L2_PWM_EVENTS , RULL(0x35010822), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RW ); //DUPS: 34010822, +REG64( EX_11_L2_PWM_EVENTS , RULL(0x37010822), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RW ); //DUPS: 36010822, +REG64( EX_1_L2_PWM_EVENTS , RULL(0x23010822), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RW ); //DUPS: 22010822, +REG64( EX_2_L2_PWM_EVENTS , RULL(0x25010822), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RW ); //DUPS: 24010822, +REG64( EX_3_L2_PWM_EVENTS , RULL(0x27010822), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RW ); //DUPS: 26010822, +REG64( EX_4_L2_PWM_EVENTS , RULL(0x29010822), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RW ); //DUPS: 28010822, +REG64( EX_5_L2_PWM_EVENTS , RULL(0x2B010822), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2A010822, +REG64( EX_6_L2_PWM_EVENTS , RULL(0x2D010822), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2C010822, +REG64( EX_7_L2_PWM_EVENTS , RULL(0x2F010822), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2E010822, +REG64( EX_8_L2_PWM_EVENTS , RULL(0x31010822), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RW ); //DUPS: 30010822, +REG64( EX_9_L2_PWM_EVENTS , RULL(0x33010822), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RW ); //DUPS: 32010822, +REG64( EX_L2_PWM_EVENTS , RULL(0x21010822), SH_UNT_EX_L2 , + SH_ACS_SCOM_RW ); //DUPS: 20010822, + +REG64( EQ_QPPM_DPLL_CTRL , RULL(0x100F0152), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_QPPM_DPLL_CTRL_CLEAR , RULL(0x100F0153), SH_UNT_EQ , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_QPPM_DPLL_CTRL_OR , RULL(0x100F0154), SH_UNT_EQ , SH_ACS_SCOM2_OR ); +REG64( EQ_0_QPPM_DPLL_CTRL , RULL(0x100F0152), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_0_QPPM_DPLL_CTRL_CLEAR , RULL(0x100F0153), SH_UNT_EQ_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_0_QPPM_DPLL_CTRL_OR , RULL(0x100F0154), SH_UNT_EQ_0 , SH_ACS_SCOM2_OR ); +REG64( EQ_1_QPPM_DPLL_CTRL , RULL(0x110F0152), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_1_QPPM_DPLL_CTRL_CLEAR , RULL(0x110F0153), SH_UNT_EQ_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_1_QPPM_DPLL_CTRL_OR , RULL(0x110F0154), SH_UNT_EQ_1 , SH_ACS_SCOM2_OR ); +REG64( EQ_2_QPPM_DPLL_CTRL , RULL(0x120F0152), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_2_QPPM_DPLL_CTRL_CLEAR , RULL(0x120F0153), SH_UNT_EQ_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_2_QPPM_DPLL_CTRL_OR , RULL(0x120F0154), SH_UNT_EQ_2 , SH_ACS_SCOM2_OR ); +REG64( EQ_3_QPPM_DPLL_CTRL , RULL(0x130F0152), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_3_QPPM_DPLL_CTRL_CLEAR , RULL(0x130F0153), SH_UNT_EQ_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_3_QPPM_DPLL_CTRL_OR , RULL(0x130F0154), SH_UNT_EQ_3 , SH_ACS_SCOM2_OR ); +REG64( EQ_4_QPPM_DPLL_CTRL , RULL(0x140F0152), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_4_QPPM_DPLL_CTRL_CLEAR , RULL(0x140F0153), SH_UNT_EQ_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_4_QPPM_DPLL_CTRL_OR , RULL(0x140F0154), SH_UNT_EQ_4 , SH_ACS_SCOM2_OR ); +REG64( EQ_5_QPPM_DPLL_CTRL , RULL(0x150F0152), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EQ_5_QPPM_DPLL_CTRL_CLEAR , RULL(0x150F0153), SH_UNT_EQ_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_5_QPPM_DPLL_CTRL_OR , RULL(0x150F0154), SH_UNT_EQ_5 , SH_ACS_SCOM2_OR ); + +REG64( EQ_QPPM_DPLL_FREQ , RULL(0x100F0151), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_0_QPPM_DPLL_FREQ , RULL(0x100F0151), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_1_QPPM_DPLL_FREQ , RULL(0x110F0151), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_2_QPPM_DPLL_FREQ , RULL(0x120F0151), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_3_QPPM_DPLL_FREQ , RULL(0x130F0151), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_4_QPPM_DPLL_FREQ , RULL(0x140F0151), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_5_QPPM_DPLL_FREQ , RULL(0x150F0151), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); + +REG64( EQ_QPPM_DPLL_ICHAR , RULL(0x100F0157), SH_UNT_EQ , SH_ACS_SCOM_RO ); +REG64( EQ_0_QPPM_DPLL_ICHAR , RULL(0x100F0157), SH_UNT_EQ_0 , SH_ACS_SCOM_RO ); +REG64( EQ_1_QPPM_DPLL_ICHAR , RULL(0x110F0157), SH_UNT_EQ_1 , SH_ACS_SCOM_RO ); +REG64( EQ_2_QPPM_DPLL_ICHAR , RULL(0x120F0157), SH_UNT_EQ_2 , SH_ACS_SCOM_RO ); +REG64( EQ_3_QPPM_DPLL_ICHAR , RULL(0x130F0157), SH_UNT_EQ_3 , SH_ACS_SCOM_RO ); +REG64( EQ_4_QPPM_DPLL_ICHAR , RULL(0x140F0157), SH_UNT_EQ_4 , SH_ACS_SCOM_RO ); +REG64( EQ_5_QPPM_DPLL_ICHAR , RULL(0x150F0157), SH_UNT_EQ_5 , SH_ACS_SCOM_RO ); + +REG64( EQ_QPPM_DPLL_OCHAR , RULL(0x100F0156), SH_UNT_EQ , SH_ACS_SCOM_RO ); +REG64( EQ_0_QPPM_DPLL_OCHAR , RULL(0x100F0156), SH_UNT_EQ_0 , SH_ACS_SCOM_RO ); +REG64( EQ_1_QPPM_DPLL_OCHAR , RULL(0x110F0156), SH_UNT_EQ_1 , SH_ACS_SCOM_RO ); +REG64( EQ_2_QPPM_DPLL_OCHAR , RULL(0x120F0156), SH_UNT_EQ_2 , SH_ACS_SCOM_RO ); +REG64( EQ_3_QPPM_DPLL_OCHAR , RULL(0x130F0156), SH_UNT_EQ_3 , SH_ACS_SCOM_RO ); +REG64( EQ_4_QPPM_DPLL_OCHAR , RULL(0x140F0156), SH_UNT_EQ_4 , SH_ACS_SCOM_RO ); +REG64( EQ_5_QPPM_DPLL_OCHAR , RULL(0x150F0156), SH_UNT_EQ_5 , SH_ACS_SCOM_RO ); + +REG64( EQ_QPPM_DPLL_STAT , RULL(0x100F0155), SH_UNT_EQ , SH_ACS_SCOM_RO ); +REG64( EQ_0_QPPM_DPLL_STAT , RULL(0x100F0155), SH_UNT_EQ_0 , SH_ACS_SCOM_RO ); +REG64( EQ_1_QPPM_DPLL_STAT , RULL(0x110F0155), SH_UNT_EQ_1 , SH_ACS_SCOM_RO ); +REG64( EQ_2_QPPM_DPLL_STAT , RULL(0x120F0155), SH_UNT_EQ_2 , SH_ACS_SCOM_RO ); +REG64( EQ_3_QPPM_DPLL_STAT , RULL(0x130F0155), SH_UNT_EQ_3 , SH_ACS_SCOM_RO ); +REG64( EQ_4_QPPM_DPLL_STAT , RULL(0x140F0155), SH_UNT_EQ_4 , SH_ACS_SCOM_RO ); +REG64( EQ_5_QPPM_DPLL_STAT , RULL(0x150F0155), SH_UNT_EQ_5 , SH_ACS_SCOM_RO ); + +REG64( EQ_QPPM_EDRAM_CTRL , RULL(0x100F01BD), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_QPPM_EDRAM_CTRL_CLEAR , RULL(0x100F01BE), SH_UNT_EQ , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_QPPM_EDRAM_CTRL_OR , RULL(0x100F01BF), SH_UNT_EQ , SH_ACS_SCOM2_OR ); +REG64( EQ_0_QPPM_EDRAM_CTRL , RULL(0x100F01BD), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_0_QPPM_EDRAM_CTRL_CLEAR , RULL(0x100F01BE), SH_UNT_EQ_0 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_0_QPPM_EDRAM_CTRL_OR , RULL(0x100F01BF), SH_UNT_EQ_0 , SH_ACS_SCOM2_OR ); +REG64( EQ_1_QPPM_EDRAM_CTRL , RULL(0x110F01BD), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_1_QPPM_EDRAM_CTRL_CLEAR , RULL(0x110F01BE), SH_UNT_EQ_1 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_1_QPPM_EDRAM_CTRL_OR , RULL(0x110F01BF), SH_UNT_EQ_1 , SH_ACS_SCOM2_OR ); +REG64( EQ_2_QPPM_EDRAM_CTRL , RULL(0x120F01BD), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_2_QPPM_EDRAM_CTRL_CLEAR , RULL(0x120F01BE), SH_UNT_EQ_2 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_2_QPPM_EDRAM_CTRL_OR , RULL(0x120F01BF), SH_UNT_EQ_2 , SH_ACS_SCOM2_OR ); +REG64( EQ_3_QPPM_EDRAM_CTRL , RULL(0x130F01BD), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_3_QPPM_EDRAM_CTRL_CLEAR , RULL(0x130F01BE), SH_UNT_EQ_3 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_3_QPPM_EDRAM_CTRL_OR , RULL(0x130F01BF), SH_UNT_EQ_3 , SH_ACS_SCOM2_OR ); +REG64( EQ_4_QPPM_EDRAM_CTRL , RULL(0x140F01BD), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_4_QPPM_EDRAM_CTRL_CLEAR , RULL(0x140F01BE), SH_UNT_EQ_4 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_4_QPPM_EDRAM_CTRL_OR , RULL(0x140F01BF), SH_UNT_EQ_4 , SH_ACS_SCOM2_OR ); +REG64( EQ_5_QPPM_EDRAM_CTRL , RULL(0x150F01BD), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); +REG64( EQ_5_QPPM_EDRAM_CTRL_CLEAR , RULL(0x150F01BE), SH_UNT_EQ_5 , + SH_ACS_SCOM1_CLEAR ); +REG64( EQ_5_QPPM_EDRAM_CTRL_OR , RULL(0x150F01BF), SH_UNT_EQ_5 , SH_ACS_SCOM2_OR ); + +REG64( EQ_QPPM_ERR , RULL(0x100F0121), SH_UNT_EQ , + SH_ACS_SCOM_WCLRPART ); +REG64( EQ_0_QPPM_ERR , RULL(0x100F0121), SH_UNT_EQ_0 , + SH_ACS_SCOM_WCLRPART ); +REG64( EQ_1_QPPM_ERR , RULL(0x110F0121), SH_UNT_EQ_1 , + SH_ACS_SCOM_WCLRPART ); +REG64( EQ_2_QPPM_ERR , RULL(0x120F0121), SH_UNT_EQ_2 , + SH_ACS_SCOM_WCLRPART ); +REG64( EQ_3_QPPM_ERR , RULL(0x130F0121), SH_UNT_EQ_3 , + SH_ACS_SCOM_WCLRPART ); +REG64( EQ_4_QPPM_ERR , RULL(0x140F0121), SH_UNT_EQ_4 , + SH_ACS_SCOM_WCLRPART ); +REG64( EQ_5_QPPM_ERR , RULL(0x150F0121), SH_UNT_EQ_5 , + SH_ACS_SCOM_WCLRPART ); + +REG64( EQ_QPPM_ERRMSK , RULL(0x100F0122), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_0_QPPM_ERRMSK , RULL(0x100F0122), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_1_QPPM_ERRMSK , RULL(0x110F0122), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_2_QPPM_ERRMSK , RULL(0x120F0122), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_3_QPPM_ERRMSK , RULL(0x130F0122), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_4_QPPM_ERRMSK , RULL(0x140F0122), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_5_QPPM_ERRMSK , RULL(0x150F0122), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); + +REG64( EQ_QPPM_ERRSUM , RULL(0x100F0120), SH_UNT_EQ , + SH_ACS_SCOM_WCLRPART ); +REG64( EQ_0_QPPM_ERRSUM , RULL(0x100F0120), SH_UNT_EQ_0 , + SH_ACS_SCOM_WCLRPART ); +REG64( EQ_1_QPPM_ERRSUM , RULL(0x110F0120), SH_UNT_EQ_1 , + SH_ACS_SCOM_WCLRPART ); +REG64( EQ_2_QPPM_ERRSUM , RULL(0x120F0120), SH_UNT_EQ_2 , + SH_ACS_SCOM_WCLRPART ); +REG64( EQ_3_QPPM_ERRSUM , RULL(0x130F0120), SH_UNT_EQ_3 , + SH_ACS_SCOM_WCLRPART ); +REG64( EQ_4_QPPM_ERRSUM , RULL(0x140F0120), SH_UNT_EQ_4 , + SH_ACS_SCOM_WCLRPART ); +REG64( EQ_5_QPPM_ERRSUM , RULL(0x150F0120), SH_UNT_EQ_5 , + SH_ACS_SCOM_WCLRPART ); + +REG64( EQ_QPPM_OCCHB , RULL(0x100F015F), SH_UNT_EQ , SH_ACS_SCOM_RW ); +REG64( EQ_0_QPPM_OCCHB , RULL(0x100F015F), SH_UNT_EQ_0 , SH_ACS_SCOM_RW ); +REG64( EQ_1_QPPM_OCCHB , RULL(0x110F015F), SH_UNT_EQ_1 , SH_ACS_SCOM_RW ); +REG64( EQ_2_QPPM_OCCHB , RULL(0x120F015F), SH_UNT_EQ_2 , SH_ACS_SCOM_RW ); +REG64( EQ_3_QPPM_OCCHB , RULL(0x130F015F), SH_UNT_EQ_3 , SH_ACS_SCOM_RW ); +REG64( EQ_4_QPPM_OCCHB , RULL(0x140F015F), SH_UNT_EQ_4 , SH_ACS_SCOM_RW ); +REG64( EQ_5_QPPM_OCCHB , RULL(0x150F015F), SH_UNT_EQ_5 , SH_ACS_SCOM_RW ); + +REG64( EQ_QPPM_QACCR_SCOM , RULL(0x100F0160), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_QPPM_QACCR_SCOM1 , RULL(0x100F0161), SH_UNT_EQ , SH_ACS_SCOM1 ); +REG64( EQ_QPPM_QACCR_SCOM2 , RULL(0x100F0162), SH_UNT_EQ , SH_ACS_SCOM2 ); +REG64( EQ_0_QPPM_QACCR_SCOM , RULL(0x100F0160), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_0_QPPM_QACCR_SCOM1 , RULL(0x100F0161), SH_UNT_EQ_0 , SH_ACS_SCOM1 ); +REG64( EQ_0_QPPM_QACCR_SCOM2 , RULL(0x100F0162), SH_UNT_EQ_0 , SH_ACS_SCOM2 ); +REG64( EQ_1_QPPM_QACCR_SCOM , RULL(0x110F0160), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_1_QPPM_QACCR_SCOM1 , RULL(0x110F0161), SH_UNT_EQ_1 , SH_ACS_SCOM1 ); +REG64( EQ_1_QPPM_QACCR_SCOM2 , RULL(0x110F0162), SH_UNT_EQ_1 , SH_ACS_SCOM2 ); +REG64( EQ_2_QPPM_QACCR_SCOM , RULL(0x120F0160), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_2_QPPM_QACCR_SCOM1 , RULL(0x120F0161), SH_UNT_EQ_2 , SH_ACS_SCOM1 ); +REG64( EQ_2_QPPM_QACCR_SCOM2 , RULL(0x120F0162), SH_UNT_EQ_2 , SH_ACS_SCOM2 ); +REG64( EQ_3_QPPM_QACCR_SCOM , RULL(0x130F0160), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_3_QPPM_QACCR_SCOM1 , RULL(0x130F0161), SH_UNT_EQ_3 , SH_ACS_SCOM1 ); +REG64( EQ_3_QPPM_QACCR_SCOM2 , RULL(0x130F0162), SH_UNT_EQ_3 , SH_ACS_SCOM2 ); +REG64( EQ_4_QPPM_QACCR_SCOM , RULL(0x140F0160), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_4_QPPM_QACCR_SCOM1 , RULL(0x140F0161), SH_UNT_EQ_4 , SH_ACS_SCOM1 ); +REG64( EQ_4_QPPM_QACCR_SCOM2 , RULL(0x140F0162), SH_UNT_EQ_4 , SH_ACS_SCOM2 ); +REG64( EQ_5_QPPM_QACCR_SCOM , RULL(0x150F0160), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EQ_5_QPPM_QACCR_SCOM1 , RULL(0x150F0161), SH_UNT_EQ_5 , SH_ACS_SCOM1 ); +REG64( EQ_5_QPPM_QACCR_SCOM2 , RULL(0x150F0162), SH_UNT_EQ_5 , SH_ACS_SCOM2 ); + +REG64( EQ_QPPM_QACSR , RULL(0x100F0163), SH_UNT_EQ , SH_ACS_SCOM_RO ); +REG64( EQ_0_QPPM_QACSR , RULL(0x100F0163), SH_UNT_EQ_0 , SH_ACS_SCOM_RO ); +REG64( EQ_1_QPPM_QACSR , RULL(0x110F0163), SH_UNT_EQ_1 , SH_ACS_SCOM_RO ); +REG64( EQ_2_QPPM_QACSR , RULL(0x120F0163), SH_UNT_EQ_2 , SH_ACS_SCOM_RO ); +REG64( EQ_3_QPPM_QACSR , RULL(0x130F0163), SH_UNT_EQ_3 , SH_ACS_SCOM_RO ); +REG64( EQ_4_QPPM_QACSR , RULL(0x140F0163), SH_UNT_EQ_4 , SH_ACS_SCOM_RO ); +REG64( EQ_5_QPPM_QACSR , RULL(0x150F0163), SH_UNT_EQ_5 , SH_ACS_SCOM_RO ); + +REG64( EQ_QPPM_QPMMR_SCOM , RULL(0x100F0103), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_QPPM_QPMMR_SCOM1 , RULL(0x100F0104), SH_UNT_EQ , SH_ACS_SCOM1 ); +REG64( EQ_QPPM_QPMMR_SCOM2 , RULL(0x100F0105), SH_UNT_EQ , SH_ACS_SCOM2 ); +REG64( EQ_0_QPPM_QPMMR_SCOM , RULL(0x100F0103), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_0_QPPM_QPMMR_SCOM1 , RULL(0x100F0104), SH_UNT_EQ_0 , SH_ACS_SCOM1 ); +REG64( EQ_0_QPPM_QPMMR_SCOM2 , RULL(0x100F0105), SH_UNT_EQ_0 , SH_ACS_SCOM2 ); +REG64( EQ_1_QPPM_QPMMR_SCOM , RULL(0x110F0103), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_1_QPPM_QPMMR_SCOM1 , RULL(0x110F0104), SH_UNT_EQ_1 , SH_ACS_SCOM1 ); +REG64( EQ_1_QPPM_QPMMR_SCOM2 , RULL(0x110F0105), SH_UNT_EQ_1 , SH_ACS_SCOM2 ); +REG64( EQ_2_QPPM_QPMMR_SCOM , RULL(0x120F0103), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_2_QPPM_QPMMR_SCOM1 , RULL(0x120F0104), SH_UNT_EQ_2 , SH_ACS_SCOM1 ); +REG64( EQ_2_QPPM_QPMMR_SCOM2 , RULL(0x120F0105), SH_UNT_EQ_2 , SH_ACS_SCOM2 ); +REG64( EQ_3_QPPM_QPMMR_SCOM , RULL(0x130F0103), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_3_QPPM_QPMMR_SCOM1 , RULL(0x130F0104), SH_UNT_EQ_3 , SH_ACS_SCOM1 ); +REG64( EQ_3_QPPM_QPMMR_SCOM2 , RULL(0x130F0105), SH_UNT_EQ_3 , SH_ACS_SCOM2 ); +REG64( EQ_4_QPPM_QPMMR_SCOM , RULL(0x140F0103), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_4_QPPM_QPMMR_SCOM1 , RULL(0x140F0104), SH_UNT_EQ_4 , SH_ACS_SCOM1 ); +REG64( EQ_4_QPPM_QPMMR_SCOM2 , RULL(0x140F0105), SH_UNT_EQ_4 , SH_ACS_SCOM2 ); +REG64( EQ_5_QPPM_QPMMR_SCOM , RULL(0x150F0103), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EQ_5_QPPM_QPMMR_SCOM1 , RULL(0x150F0104), SH_UNT_EQ_5 , SH_ACS_SCOM1 ); +REG64( EQ_5_QPPM_QPMMR_SCOM2 , RULL(0x150F0105), SH_UNT_EQ_5 , SH_ACS_SCOM2 ); + +REG64( EQ_QPPM_VDMCFGR , RULL(0x100F01B6), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_QPPM_VDMCFGR , RULL(0x100F01B6), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_QPPM_VDMCFGR , RULL(0x110F01B6), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_QPPM_VDMCFGR , RULL(0x120F01B6), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_QPPM_VDMCFGR , RULL(0x130F01B6), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_QPPM_VDMCFGR , RULL(0x140F01B6), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_QPPM_VDMCFGR , RULL(0x150F01B6), SH_UNT_EQ_5 , SH_ACS_SCOM ); + +REG64( C_RAM_CTRL , RULL(0x20010A52), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_RAM_CTRL , RULL(0x20010A52), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_RAM_CTRL , RULL(0x21010A52), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_RAM_CTRL , RULL(0x22010A52), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_RAM_CTRL , RULL(0x23010A52), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_RAM_CTRL , RULL(0x24010A52), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_RAM_CTRL , RULL(0x25010A52), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_RAM_CTRL , RULL(0x26010A52), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_RAM_CTRL , RULL(0x27010A52), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_RAM_CTRL , RULL(0x28010A52), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_RAM_CTRL , RULL(0x29010A52), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_RAM_CTRL , RULL(0x2A010A52), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_RAM_CTRL , RULL(0x2B010A52), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_RAM_CTRL , RULL(0x2C010A52), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_RAM_CTRL , RULL(0x2D010A52), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_RAM_CTRL , RULL(0x2E010A52), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_RAM_CTRL , RULL(0x2F010A52), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_RAM_CTRL , RULL(0x30010A52), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_RAM_CTRL , RULL(0x31010A52), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_RAM_CTRL , RULL(0x32010A52), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_RAM_CTRL , RULL(0x33010A52), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_RAM_CTRL , RULL(0x34010A52), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_RAM_CTRL , RULL(0x35010A52), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_RAM_CTRL , RULL(0x36010A52), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_RAM_CTRL , RULL(0x37010A52), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_0_L2_RAM_CTRL , RULL(0x20010A52), SH_UNT_EX_0_L2 , + SH_ACS_SCOM ); //DUPS: 21010A52, +REG64( EX_10_L2_RAM_CTRL , RULL(0x34010A52), SH_UNT_EX_10_L2 , + SH_ACS_SCOM ); //DUPS: 35010A52, +REG64( EX_11_L2_RAM_CTRL , RULL(0x36010A52), SH_UNT_EX_11_L2 , + SH_ACS_SCOM ); //DUPS: 37010A52, +REG64( EX_1_L2_RAM_CTRL , RULL(0x22010A52), SH_UNT_EX_1_L2 , + SH_ACS_SCOM ); //DUPS: 23010A52, +REG64( EX_2_L2_RAM_CTRL , RULL(0x24010A52), SH_UNT_EX_2_L2 , + SH_ACS_SCOM ); //DUPS: 25010A52, +REG64( EX_3_L2_RAM_CTRL , RULL(0x26010A52), SH_UNT_EX_3_L2 , + SH_ACS_SCOM ); //DUPS: 27010A52, +REG64( EX_4_L2_RAM_CTRL , RULL(0x28010A52), SH_UNT_EX_4_L2 , + SH_ACS_SCOM ); //DUPS: 29010A52, +REG64( EX_5_L2_RAM_CTRL , RULL(0x2A010A52), SH_UNT_EX_5_L2 , + SH_ACS_SCOM ); //DUPS: 2B010A52, +REG64( EX_6_L2_RAM_CTRL , RULL(0x2C010A52), SH_UNT_EX_6_L2 , + SH_ACS_SCOM ); //DUPS: 2D010A52, +REG64( EX_7_L2_RAM_CTRL , RULL(0x2E010A52), SH_UNT_EX_7_L2 , + SH_ACS_SCOM ); //DUPS: 2F010A52, +REG64( EX_8_L2_RAM_CTRL , RULL(0x30010A52), SH_UNT_EX_8_L2 , + SH_ACS_SCOM ); //DUPS: 31010A52, +REG64( EX_9_L2_RAM_CTRL , RULL(0x32010A52), SH_UNT_EX_9_L2 , + SH_ACS_SCOM ); //DUPS: 33010A52, +REG64( EX_L2_RAM_CTRL , RULL(0x20010A52), SH_UNT_EX_L2 , + SH_ACS_SCOM ); //DUPS: 21010A52, + +REG64( C_RAM_MODEREG , RULL(0x20010A51), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_RAM_MODEREG , RULL(0x20010A51), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_RAM_MODEREG , RULL(0x21010A51), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_RAM_MODEREG , RULL(0x22010A51), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_RAM_MODEREG , RULL(0x23010A51), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_RAM_MODEREG , RULL(0x24010A51), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_RAM_MODEREG , RULL(0x25010A51), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_RAM_MODEREG , RULL(0x26010A51), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_RAM_MODEREG , RULL(0x27010A51), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_RAM_MODEREG , RULL(0x28010A51), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_RAM_MODEREG , RULL(0x29010A51), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_RAM_MODEREG , RULL(0x2A010A51), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_RAM_MODEREG , RULL(0x2B010A51), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_RAM_MODEREG , RULL(0x2C010A51), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_RAM_MODEREG , RULL(0x2D010A51), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_RAM_MODEREG , RULL(0x2E010A51), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_RAM_MODEREG , RULL(0x2F010A51), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_RAM_MODEREG , RULL(0x30010A51), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_RAM_MODEREG , RULL(0x31010A51), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_RAM_MODEREG , RULL(0x32010A51), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_RAM_MODEREG , RULL(0x33010A51), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_RAM_MODEREG , RULL(0x34010A51), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_RAM_MODEREG , RULL(0x35010A51), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_RAM_MODEREG , RULL(0x36010A51), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_RAM_MODEREG , RULL(0x37010A51), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_RAM_MODEREG , RULL(0x20010A51), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RW ); //DUPS: 21010A51, +REG64( EX_10_L2_RAM_MODEREG , RULL(0x34010A51), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RW ); //DUPS: 35010A51, +REG64( EX_11_L2_RAM_MODEREG , RULL(0x36010A51), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RW ); //DUPS: 37010A51, +REG64( EX_1_L2_RAM_MODEREG , RULL(0x22010A51), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RW ); //DUPS: 23010A51, +REG64( EX_2_L2_RAM_MODEREG , RULL(0x24010A51), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RW ); //DUPS: 25010A51, +REG64( EX_3_L2_RAM_MODEREG , RULL(0x26010A51), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RW ); //DUPS: 27010A51, +REG64( EX_4_L2_RAM_MODEREG , RULL(0x28010A51), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RW ); //DUPS: 29010A51, +REG64( EX_5_L2_RAM_MODEREG , RULL(0x2A010A51), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2B010A51, +REG64( EX_6_L2_RAM_MODEREG , RULL(0x2C010A51), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2D010A51, +REG64( EX_7_L2_RAM_MODEREG , RULL(0x2E010A51), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2F010A51, +REG64( EX_8_L2_RAM_MODEREG , RULL(0x30010A51), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RW ); //DUPS: 31010A51, +REG64( EX_9_L2_RAM_MODEREG , RULL(0x32010A51), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RW ); //DUPS: 33010A51, +REG64( EX_L2_RAM_MODEREG , RULL(0x20010A51), SH_UNT_EX_L2 , + SH_ACS_SCOM_RW ); //DUPS: 21010A51, + +REG64( C_RAM_STATUS , RULL(0x20010A53), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_RAM_STATUS , RULL(0x20010A53), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_RAM_STATUS , RULL(0x21010A53), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_RAM_STATUS , RULL(0x22010A53), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_RAM_STATUS , RULL(0x23010A53), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_RAM_STATUS , RULL(0x24010A53), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_RAM_STATUS , RULL(0x25010A53), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_RAM_STATUS , RULL(0x26010A53), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_RAM_STATUS , RULL(0x27010A53), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_RAM_STATUS , RULL(0x28010A53), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_RAM_STATUS , RULL(0x29010A53), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_RAM_STATUS , RULL(0x2A010A53), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_RAM_STATUS , RULL(0x2B010A53), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_RAM_STATUS , RULL(0x2C010A53), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_RAM_STATUS , RULL(0x2D010A53), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_RAM_STATUS , RULL(0x2E010A53), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_RAM_STATUS , RULL(0x2F010A53), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_RAM_STATUS , RULL(0x30010A53), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_RAM_STATUS , RULL(0x31010A53), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_RAM_STATUS , RULL(0x32010A53), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_RAM_STATUS , RULL(0x33010A53), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_RAM_STATUS , RULL(0x34010A53), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_RAM_STATUS , RULL(0x35010A53), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_RAM_STATUS , RULL(0x36010A53), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_RAM_STATUS , RULL(0x37010A53), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_0_L2_RAM_STATUS , RULL(0x20010A53), SH_UNT_EX_0_L2 , + SH_ACS_SCOM ); //DUPS: 21010A53, +REG64( EX_10_L2_RAM_STATUS , RULL(0x34010A53), SH_UNT_EX_10_L2 , + SH_ACS_SCOM ); //DUPS: 35010A53, +REG64( EX_11_L2_RAM_STATUS , RULL(0x36010A53), SH_UNT_EX_11_L2 , + SH_ACS_SCOM ); //DUPS: 37010A53, +REG64( EX_1_L2_RAM_STATUS , RULL(0x22010A53), SH_UNT_EX_1_L2 , + SH_ACS_SCOM ); //DUPS: 23010A53, +REG64( EX_2_L2_RAM_STATUS , RULL(0x24010A53), SH_UNT_EX_2_L2 , + SH_ACS_SCOM ); //DUPS: 25010A53, +REG64( EX_3_L2_RAM_STATUS , RULL(0x26010A53), SH_UNT_EX_3_L2 , + SH_ACS_SCOM ); //DUPS: 27010A53, +REG64( EX_4_L2_RAM_STATUS , RULL(0x28010A53), SH_UNT_EX_4_L2 , + SH_ACS_SCOM ); //DUPS: 29010A53, +REG64( EX_5_L2_RAM_STATUS , RULL(0x2A010A53), SH_UNT_EX_5_L2 , + SH_ACS_SCOM ); //DUPS: 2B010A53, +REG64( EX_6_L2_RAM_STATUS , RULL(0x2C010A53), SH_UNT_EX_6_L2 , + SH_ACS_SCOM ); //DUPS: 2D010A53, +REG64( EX_7_L2_RAM_STATUS , RULL(0x2E010A53), SH_UNT_EX_7_L2 , + SH_ACS_SCOM ); //DUPS: 2F010A53, +REG64( EX_8_L2_RAM_STATUS , RULL(0x30010A53), SH_UNT_EX_8_L2 , + SH_ACS_SCOM ); //DUPS: 31010A53, +REG64( EX_9_L2_RAM_STATUS , RULL(0x32010A53), SH_UNT_EX_9_L2 , + SH_ACS_SCOM ); //DUPS: 33010A53, +REG64( EX_L2_RAM_STATUS , RULL(0x20010A53), SH_UNT_EX_L2 , + SH_ACS_SCOM ); //DUPS: 21010A53, + +REG64( C_RANDOM_CTRL , RULL(0x20010A4F), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_RANDOM_CTRL , RULL(0x20010A4F), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_RANDOM_CTRL , RULL(0x21010A4F), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_RANDOM_CTRL , RULL(0x22010A4F), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_RANDOM_CTRL , RULL(0x23010A4F), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_RANDOM_CTRL , RULL(0x24010A4F), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_RANDOM_CTRL , RULL(0x25010A4F), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_RANDOM_CTRL , RULL(0x26010A4F), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_RANDOM_CTRL , RULL(0x27010A4F), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_RANDOM_CTRL , RULL(0x28010A4F), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_RANDOM_CTRL , RULL(0x29010A4F), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_RANDOM_CTRL , RULL(0x2A010A4F), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_RANDOM_CTRL , RULL(0x2B010A4F), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_RANDOM_CTRL , RULL(0x2C010A4F), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_RANDOM_CTRL , RULL(0x2D010A4F), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_RANDOM_CTRL , RULL(0x2E010A4F), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_RANDOM_CTRL , RULL(0x2F010A4F), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_RANDOM_CTRL , RULL(0x30010A4F), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_RANDOM_CTRL , RULL(0x31010A4F), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_RANDOM_CTRL , RULL(0x32010A4F), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_RANDOM_CTRL , RULL(0x33010A4F), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_RANDOM_CTRL , RULL(0x34010A4F), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_RANDOM_CTRL , RULL(0x35010A4F), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_RANDOM_CTRL , RULL(0x36010A4F), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_RANDOM_CTRL , RULL(0x37010A4F), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_RANDOM_CTRL , RULL(0x20010A4F), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 21010A4F, +REG64( EX_0_RANDOM_CTRL , RULL(0x20010A4F), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 21010A4F, +REG64( EX_1_RANDOM_CTRL , RULL(0x22010A4F), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 23010A4F, +REG64( EX_2_RANDOM_CTRL , RULL(0x24010A4F), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 25010A4F, +REG64( EX_3_RANDOM_CTRL , RULL(0x26010A4F), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 27010A4F, +REG64( EX_4_RANDOM_CTRL , RULL(0x28010A4F), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 29010A4F, +REG64( EX_5_RANDOM_CTRL , RULL(0x2A010A4F), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2B010A4F, +REG64( EX_6_RANDOM_CTRL , RULL(0x2C010A4F), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2D010A4F, +REG64( EX_7_RANDOM_CTRL , RULL(0x2E010A4F), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2F010A4F, +REG64( EX_8_RANDOM_CTRL , RULL(0x30010A4F), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 31010A4F, +REG64( EX_9_RANDOM_CTRL , RULL(0x32010A4F), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 33010A4F, +REG64( EX_10_RANDOM_CTRL , RULL(0x34010A4F), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 35010A4F, +REG64( EX_11_RANDOM_CTRL , RULL(0x36010A4F), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 37010A4F, + +REG64( C_RAS_MODEREG , RULL(0x20010A9D), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_RAS_MODEREG , RULL(0x20010A9D), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_RAS_MODEREG , RULL(0x21010A9D), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_RAS_MODEREG , RULL(0x22010A9D), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_RAS_MODEREG , RULL(0x23010A9D), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_RAS_MODEREG , RULL(0x24010A9D), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_RAS_MODEREG , RULL(0x25010A9D), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_RAS_MODEREG , RULL(0x26010A9D), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_RAS_MODEREG , RULL(0x27010A9D), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_RAS_MODEREG , RULL(0x28010A9D), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_RAS_MODEREG , RULL(0x29010A9D), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_RAS_MODEREG , RULL(0x2A010A9D), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_RAS_MODEREG , RULL(0x2B010A9D), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_RAS_MODEREG , RULL(0x2C010A9D), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_RAS_MODEREG , RULL(0x2D010A9D), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_RAS_MODEREG , RULL(0x2E010A9D), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_RAS_MODEREG , RULL(0x2F010A9D), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_RAS_MODEREG , RULL(0x30010A9D), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_RAS_MODEREG , RULL(0x31010A9D), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_RAS_MODEREG , RULL(0x32010A9D), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_RAS_MODEREG , RULL(0x33010A9D), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_RAS_MODEREG , RULL(0x34010A9D), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_RAS_MODEREG , RULL(0x35010A9D), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_RAS_MODEREG , RULL(0x36010A9D), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_RAS_MODEREG , RULL(0x37010A9D), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_0_L2_RAS_MODEREG , RULL(0x20010A9D), SH_UNT_EX_0_L2 , + SH_ACS_SCOM ); //DUPS: 21010A9D, +REG64( EX_10_L2_RAS_MODEREG , RULL(0x34010A9D), SH_UNT_EX_10_L2 , + SH_ACS_SCOM ); //DUPS: 35010A9D, +REG64( EX_11_L2_RAS_MODEREG , RULL(0x36010A9D), SH_UNT_EX_11_L2 , + SH_ACS_SCOM ); //DUPS: 37010A9D, +REG64( EX_1_L2_RAS_MODEREG , RULL(0x22010A9D), SH_UNT_EX_1_L2 , + SH_ACS_SCOM ); //DUPS: 23010A9D, +REG64( EX_2_L2_RAS_MODEREG , RULL(0x24010A9D), SH_UNT_EX_2_L2 , + SH_ACS_SCOM ); //DUPS: 25010A9D, +REG64( EX_3_L2_RAS_MODEREG , RULL(0x26010A9D), SH_UNT_EX_3_L2 , + SH_ACS_SCOM ); //DUPS: 27010A9D, +REG64( EX_4_L2_RAS_MODEREG , RULL(0x28010A9D), SH_UNT_EX_4_L2 , + SH_ACS_SCOM ); //DUPS: 29010A9D, +REG64( EX_5_L2_RAS_MODEREG , RULL(0x2A010A9D), SH_UNT_EX_5_L2 , + SH_ACS_SCOM ); //DUPS: 2B010A9D, +REG64( EX_6_L2_RAS_MODEREG , RULL(0x2C010A9D), SH_UNT_EX_6_L2 , + SH_ACS_SCOM ); //DUPS: 2D010A9D, +REG64( EX_7_L2_RAS_MODEREG , RULL(0x2E010A9D), SH_UNT_EX_7_L2 , + SH_ACS_SCOM ); //DUPS: 2F010A9D, +REG64( EX_8_L2_RAS_MODEREG , RULL(0x30010A9D), SH_UNT_EX_8_L2 , + SH_ACS_SCOM ); //DUPS: 31010A9D, +REG64( EX_9_L2_RAS_MODEREG , RULL(0x32010A9D), SH_UNT_EX_9_L2 , + SH_ACS_SCOM ); //DUPS: 33010A9D, +REG64( EX_L2_RAS_MODEREG , RULL(0x20010A9D), SH_UNT_EX_L2 , + SH_ACS_SCOM ); //DUPS: 21010A9D, + +REG64( C_RAS_STATUS , RULL(0x20010A02), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_RAS_STATUS , RULL(0x20010A02), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_RAS_STATUS , RULL(0x21010A02), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_RAS_STATUS , RULL(0x22010A02), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_RAS_STATUS , RULL(0x23010A02), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_RAS_STATUS , RULL(0x24010A02), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_RAS_STATUS , RULL(0x25010A02), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_RAS_STATUS , RULL(0x26010A02), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_RAS_STATUS , RULL(0x27010A02), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_RAS_STATUS , RULL(0x28010A02), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_RAS_STATUS , RULL(0x29010A02), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_RAS_STATUS , RULL(0x2A010A02), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_RAS_STATUS , RULL(0x2B010A02), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_RAS_STATUS , RULL(0x2C010A02), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_RAS_STATUS , RULL(0x2D010A02), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_RAS_STATUS , RULL(0x2E010A02), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_RAS_STATUS , RULL(0x2F010A02), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_RAS_STATUS , RULL(0x30010A02), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_RAS_STATUS , RULL(0x31010A02), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_RAS_STATUS , RULL(0x32010A02), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_RAS_STATUS , RULL(0x33010A02), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_RAS_STATUS , RULL(0x34010A02), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_RAS_STATUS , RULL(0x35010A02), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_RAS_STATUS , RULL(0x36010A02), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_RAS_STATUS , RULL(0x37010A02), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_0_L2_RAS_STATUS , RULL(0x20010A02), SH_UNT_EX_0_L2 , + SH_ACS_SCOM ); //DUPS: 21010A02, +REG64( EX_10_L2_RAS_STATUS , RULL(0x34010A02), SH_UNT_EX_10_L2 , + SH_ACS_SCOM ); //DUPS: 35010A02, +REG64( EX_11_L2_RAS_STATUS , RULL(0x36010A02), SH_UNT_EX_11_L2 , + SH_ACS_SCOM ); //DUPS: 37010A02, +REG64( EX_1_L2_RAS_STATUS , RULL(0x22010A02), SH_UNT_EX_1_L2 , + SH_ACS_SCOM ); //DUPS: 23010A02, +REG64( EX_2_L2_RAS_STATUS , RULL(0x24010A02), SH_UNT_EX_2_L2 , + SH_ACS_SCOM ); //DUPS: 25010A02, +REG64( EX_3_L2_RAS_STATUS , RULL(0x26010A02), SH_UNT_EX_3_L2 , + SH_ACS_SCOM ); //DUPS: 27010A02, +REG64( EX_4_L2_RAS_STATUS , RULL(0x28010A02), SH_UNT_EX_4_L2 , + SH_ACS_SCOM ); //DUPS: 29010A02, +REG64( EX_5_L2_RAS_STATUS , RULL(0x2A010A02), SH_UNT_EX_5_L2 , + SH_ACS_SCOM ); //DUPS: 2B010A02, +REG64( EX_6_L2_RAS_STATUS , RULL(0x2C010A02), SH_UNT_EX_6_L2 , + SH_ACS_SCOM ); //DUPS: 2D010A02, +REG64( EX_7_L2_RAS_STATUS , RULL(0x2E010A02), SH_UNT_EX_7_L2 , + SH_ACS_SCOM ); //DUPS: 2F010A02, +REG64( EX_8_L2_RAS_STATUS , RULL(0x30010A02), SH_UNT_EX_8_L2 , + SH_ACS_SCOM ); //DUPS: 31010A02, +REG64( EX_9_L2_RAS_STATUS , RULL(0x32010A02), SH_UNT_EX_9_L2 , + SH_ACS_SCOM ); //DUPS: 33010A02, +REG64( EX_L2_RAS_STATUS , RULL(0x20010A02), SH_UNT_EX_L2 , + SH_ACS_SCOM ); //DUPS: 21010A02, + +REG64( EQ_RD_EPS_REG , RULL(0x10010810), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10010C10, +REG64( EQ_0_RD_EPS_REG , RULL(0x10010810), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10010C10, +REG64( EQ_1_RD_EPS_REG , RULL(0x11010810), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11010C10, +REG64( EQ_2_RD_EPS_REG , RULL(0x12010810), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12010C10, +REG64( EQ_3_RD_EPS_REG , RULL(0x13010810), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13010C10, +REG64( EQ_4_RD_EPS_REG , RULL(0x14010810), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14010C10, +REG64( EQ_5_RD_EPS_REG , RULL(0x15010810), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15010C10, +REG64( EX_0_L2_RD_EPS_REG , RULL(0x10010810), SH_UNT_EX_0_L2 , SH_ACS_SCOM ); +REG64( EX_10_L2_RD_EPS_REG , RULL(0x15010810), SH_UNT_EX_10_L2 , SH_ACS_SCOM ); +REG64( EX_11_L2_RD_EPS_REG , RULL(0x15010C10), SH_UNT_EX_11_L2 , SH_ACS_SCOM ); +REG64( EX_1_L2_RD_EPS_REG , RULL(0x10010C10), SH_UNT_EX_1_L2 , SH_ACS_SCOM ); +REG64( EX_2_L2_RD_EPS_REG , RULL(0x11010810), SH_UNT_EX_2_L2 , SH_ACS_SCOM ); +REG64( EX_3_L2_RD_EPS_REG , RULL(0x11010C10), SH_UNT_EX_3_L2 , SH_ACS_SCOM ); +REG64( EX_4_L2_RD_EPS_REG , RULL(0x12010810), SH_UNT_EX_4_L2 , SH_ACS_SCOM ); +REG64( EX_5_L2_RD_EPS_REG , RULL(0x12010C10), SH_UNT_EX_5_L2 , SH_ACS_SCOM ); +REG64( EX_6_L2_RD_EPS_REG , RULL(0x13010810), SH_UNT_EX_6_L2 , SH_ACS_SCOM ); +REG64( EX_7_L2_RD_EPS_REG , RULL(0x13010C10), SH_UNT_EX_7_L2 , SH_ACS_SCOM ); +REG64( EX_8_L2_RD_EPS_REG , RULL(0x14010810), SH_UNT_EX_8_L2 , SH_ACS_SCOM ); +REG64( EX_9_L2_RD_EPS_REG , RULL(0x14010C10), SH_UNT_EX_9_L2 , SH_ACS_SCOM ); +REG64( EX_L2_RD_EPS_REG , RULL(0x10010810), SH_UNT_EX_L2 , SH_ACS_SCOM ); + +REG64( C_RECOV_INTERRUPT_REG , RULL(0x200F001B), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_RECOV_INTERRUPT_REG , RULL(0x200F001B), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_RECOV_INTERRUPT_REG , RULL(0x210F001B), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_RECOV_INTERRUPT_REG , RULL(0x220F001B), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_RECOV_INTERRUPT_REG , RULL(0x230F001B), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_RECOV_INTERRUPT_REG , RULL(0x240F001B), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_RECOV_INTERRUPT_REG , RULL(0x250F001B), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_RECOV_INTERRUPT_REG , RULL(0x260F001B), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_RECOV_INTERRUPT_REG , RULL(0x270F001B), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_RECOV_INTERRUPT_REG , RULL(0x280F001B), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_RECOV_INTERRUPT_REG , RULL(0x290F001B), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_RECOV_INTERRUPT_REG , RULL(0x2A0F001B), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_RECOV_INTERRUPT_REG , RULL(0x2B0F001B), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_RECOV_INTERRUPT_REG , RULL(0x2C0F001B), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_RECOV_INTERRUPT_REG , RULL(0x2D0F001B), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_RECOV_INTERRUPT_REG , RULL(0x2E0F001B), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_RECOV_INTERRUPT_REG , RULL(0x2F0F001B), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_RECOV_INTERRUPT_REG , RULL(0x300F001B), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_RECOV_INTERRUPT_REG , RULL(0x310F001B), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_RECOV_INTERRUPT_REG , RULL(0x320F001B), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_RECOV_INTERRUPT_REG , RULL(0x330F001B), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_RECOV_INTERRUPT_REG , RULL(0x340F001B), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_RECOV_INTERRUPT_REG , RULL(0x350F001B), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_RECOV_INTERRUPT_REG , RULL(0x360F001B), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_RECOV_INTERRUPT_REG , RULL(0x370F001B), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_RECOV_INTERRUPT_REG , RULL(0x100F001B), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_RECOV_INTERRUPT_REG , RULL(0x100F001B), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_RECOV_INTERRUPT_REG , RULL(0x110F001B), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_RECOV_INTERRUPT_REG , RULL(0x120F001B), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_RECOV_INTERRUPT_REG , RULL(0x130F001B), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_RECOV_INTERRUPT_REG , RULL(0x140F001B), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_RECOV_INTERRUPT_REG , RULL(0x150F001B), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_RECOV_INTERRUPT_REG , RULL(0x200F001B), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F001B, +REG64( EX_0_RECOV_INTERRUPT_REG , RULL(0x200F001B), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F001B, +REG64( EX_1_RECOV_INTERRUPT_REG , RULL(0x230F001B), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F001B, +REG64( EX_2_RECOV_INTERRUPT_REG , RULL(0x240F001B), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F001B, +REG64( EX_3_RECOV_INTERRUPT_REG , RULL(0x260F001B), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F001B, +REG64( EX_4_RECOV_INTERRUPT_REG , RULL(0x280F001B), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F001B, +REG64( EX_5_RECOV_INTERRUPT_REG , RULL(0x2A0F001B), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F001B, +REG64( EX_6_RECOV_INTERRUPT_REG , RULL(0x2C0F001B), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F001B, +REG64( EX_7_RECOV_INTERRUPT_REG , RULL(0x2E0F001B), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F001B, +REG64( EX_8_RECOV_INTERRUPT_REG , RULL(0x300F001B), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F001B, +REG64( EX_9_RECOV_INTERRUPT_REG , RULL(0x320F001B), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F001B, +REG64( EX_10_RECOV_INTERRUPT_REG , RULL(0x340F001B), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F001B, +REG64( EX_11_RECOV_INTERRUPT_REG , RULL(0x360F001B), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F001B, + +REG64( C_RECOV_THOLD , RULL(0x20010A4D), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_RECOV_THOLD , RULL(0x20010A4D), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_RECOV_THOLD , RULL(0x21010A4D), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_RECOV_THOLD , RULL(0x22010A4D), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_RECOV_THOLD , RULL(0x23010A4D), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_RECOV_THOLD , RULL(0x24010A4D), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_RECOV_THOLD , RULL(0x25010A4D), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_RECOV_THOLD , RULL(0x26010A4D), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_RECOV_THOLD , RULL(0x27010A4D), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_RECOV_THOLD , RULL(0x28010A4D), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_RECOV_THOLD , RULL(0x29010A4D), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_RECOV_THOLD , RULL(0x2A010A4D), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_RECOV_THOLD , RULL(0x2B010A4D), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_RECOV_THOLD , RULL(0x2C010A4D), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_RECOV_THOLD , RULL(0x2D010A4D), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_RECOV_THOLD , RULL(0x2E010A4D), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_RECOV_THOLD , RULL(0x2F010A4D), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_RECOV_THOLD , RULL(0x30010A4D), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_RECOV_THOLD , RULL(0x31010A4D), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_RECOV_THOLD , RULL(0x32010A4D), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_RECOV_THOLD , RULL(0x33010A4D), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_RECOV_THOLD , RULL(0x34010A4D), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_RECOV_THOLD , RULL(0x35010A4D), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_RECOV_THOLD , RULL(0x36010A4D), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_RECOV_THOLD , RULL(0x37010A4D), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_RECOV_THOLD , RULL(0x20010A4D), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RW ); //DUPS: 21010A4D, +REG64( EX_10_L2_RECOV_THOLD , RULL(0x34010A4D), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RW ); //DUPS: 35010A4D, +REG64( EX_11_L2_RECOV_THOLD , RULL(0x36010A4D), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RW ); //DUPS: 37010A4D, +REG64( EX_1_L2_RECOV_THOLD , RULL(0x22010A4D), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RW ); //DUPS: 23010A4D, +REG64( EX_2_L2_RECOV_THOLD , RULL(0x24010A4D), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RW ); //DUPS: 25010A4D, +REG64( EX_3_L2_RECOV_THOLD , RULL(0x26010A4D), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RW ); //DUPS: 27010A4D, +REG64( EX_4_L2_RECOV_THOLD , RULL(0x28010A4D), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RW ); //DUPS: 29010A4D, +REG64( EX_5_L2_RECOV_THOLD , RULL(0x2A010A4D), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2B010A4D, +REG64( EX_6_L2_RECOV_THOLD , RULL(0x2C010A4D), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2D010A4D, +REG64( EX_7_L2_RECOV_THOLD , RULL(0x2E010A4D), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2F010A4D, +REG64( EX_8_L2_RECOV_THOLD , RULL(0x30010A4D), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RW ); //DUPS: 31010A4D, +REG64( EX_9_L2_RECOV_THOLD , RULL(0x32010A4D), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RW ); //DUPS: 33010A4D, +REG64( EX_L2_RECOV_THOLD , RULL(0x20010A4D), SH_UNT_EX_L2 , + SH_ACS_SCOM_RW ); //DUPS: 21010A4D, + +REG64( C_RECOV_THOLD_VAL , RULL(0x20010A4C), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_RECOV_THOLD_VAL , RULL(0x20010A4C), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_RECOV_THOLD_VAL , RULL(0x21010A4C), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_RECOV_THOLD_VAL , RULL(0x22010A4C), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_RECOV_THOLD_VAL , RULL(0x23010A4C), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_RECOV_THOLD_VAL , RULL(0x24010A4C), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_RECOV_THOLD_VAL , RULL(0x25010A4C), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_RECOV_THOLD_VAL , RULL(0x26010A4C), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_RECOV_THOLD_VAL , RULL(0x27010A4C), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_RECOV_THOLD_VAL , RULL(0x28010A4C), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_RECOV_THOLD_VAL , RULL(0x29010A4C), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_RECOV_THOLD_VAL , RULL(0x2A010A4C), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_RECOV_THOLD_VAL , RULL(0x2B010A4C), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_RECOV_THOLD_VAL , RULL(0x2C010A4C), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_RECOV_THOLD_VAL , RULL(0x2D010A4C), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_RECOV_THOLD_VAL , RULL(0x2E010A4C), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_RECOV_THOLD_VAL , RULL(0x2F010A4C), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_RECOV_THOLD_VAL , RULL(0x30010A4C), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_RECOV_THOLD_VAL , RULL(0x31010A4C), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_RECOV_THOLD_VAL , RULL(0x32010A4C), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_RECOV_THOLD_VAL , RULL(0x33010A4C), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_RECOV_THOLD_VAL , RULL(0x34010A4C), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_RECOV_THOLD_VAL , RULL(0x35010A4C), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_RECOV_THOLD_VAL , RULL(0x36010A4C), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_RECOV_THOLD_VAL , RULL(0x37010A4C), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_0_L2_RECOV_THOLD_VAL , RULL(0x20010A4C), SH_UNT_EX_0_L2 , + SH_ACS_SCOM ); //DUPS: 21010A4C, +REG64( EX_10_L2_RECOV_THOLD_VAL , RULL(0x34010A4C), SH_UNT_EX_10_L2 , + SH_ACS_SCOM ); //DUPS: 35010A4C, +REG64( EX_11_L2_RECOV_THOLD_VAL , RULL(0x36010A4C), SH_UNT_EX_11_L2 , + SH_ACS_SCOM ); //DUPS: 37010A4C, +REG64( EX_1_L2_RECOV_THOLD_VAL , RULL(0x22010A4C), SH_UNT_EX_1_L2 , + SH_ACS_SCOM ); //DUPS: 23010A4C, +REG64( EX_2_L2_RECOV_THOLD_VAL , RULL(0x24010A4C), SH_UNT_EX_2_L2 , + SH_ACS_SCOM ); //DUPS: 25010A4C, +REG64( EX_3_L2_RECOV_THOLD_VAL , RULL(0x26010A4C), SH_UNT_EX_3_L2 , + SH_ACS_SCOM ); //DUPS: 27010A4C, +REG64( EX_4_L2_RECOV_THOLD_VAL , RULL(0x28010A4C), SH_UNT_EX_4_L2 , + SH_ACS_SCOM ); //DUPS: 29010A4C, +REG64( EX_5_L2_RECOV_THOLD_VAL , RULL(0x2A010A4C), SH_UNT_EX_5_L2 , + SH_ACS_SCOM ); //DUPS: 2B010A4C, +REG64( EX_6_L2_RECOV_THOLD_VAL , RULL(0x2C010A4C), SH_UNT_EX_6_L2 , + SH_ACS_SCOM ); //DUPS: 2D010A4C, +REG64( EX_7_L2_RECOV_THOLD_VAL , RULL(0x2E010A4C), SH_UNT_EX_7_L2 , + SH_ACS_SCOM ); //DUPS: 2F010A4C, +REG64( EX_8_L2_RECOV_THOLD_VAL , RULL(0x30010A4C), SH_UNT_EX_8_L2 , + SH_ACS_SCOM ); //DUPS: 31010A4C, +REG64( EX_9_L2_RECOV_THOLD_VAL , RULL(0x32010A4C), SH_UNT_EX_9_L2 , + SH_ACS_SCOM ); //DUPS: 33010A4C, +REG64( EX_L2_RECOV_THOLD_VAL , RULL(0x20010A4C), SH_UNT_EX_L2 , + SH_ACS_SCOM ); //DUPS: 21010A4C, + +REG64( C_RESET_KEEPER , RULL(0x20010A4A), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_RESET_KEEPER , RULL(0x20010A4A), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_RESET_KEEPER , RULL(0x21010A4A), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_RESET_KEEPER , RULL(0x22010A4A), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_RESET_KEEPER , RULL(0x23010A4A), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_RESET_KEEPER , RULL(0x24010A4A), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_RESET_KEEPER , RULL(0x25010A4A), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_RESET_KEEPER , RULL(0x26010A4A), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_RESET_KEEPER , RULL(0x27010A4A), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_RESET_KEEPER , RULL(0x28010A4A), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_RESET_KEEPER , RULL(0x29010A4A), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_RESET_KEEPER , RULL(0x2A010A4A), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_RESET_KEEPER , RULL(0x2B010A4A), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_RESET_KEEPER , RULL(0x2C010A4A), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_RESET_KEEPER , RULL(0x2D010A4A), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_RESET_KEEPER , RULL(0x2E010A4A), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_RESET_KEEPER , RULL(0x2F010A4A), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_RESET_KEEPER , RULL(0x30010A4A), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_RESET_KEEPER , RULL(0x31010A4A), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_RESET_KEEPER , RULL(0x32010A4A), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_RESET_KEEPER , RULL(0x33010A4A), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_RESET_KEEPER , RULL(0x34010A4A), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_RESET_KEEPER , RULL(0x35010A4A), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_RESET_KEEPER , RULL(0x36010A4A), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_RESET_KEEPER , RULL(0x37010A4A), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_0_L2_RESET_KEEPER , RULL(0x20010A4A), SH_UNT_EX_0_L2 , + SH_ACS_SCOM ); //DUPS: 21010A4A, +REG64( EX_10_L2_RESET_KEEPER , RULL(0x34010A4A), SH_UNT_EX_10_L2 , + SH_ACS_SCOM ); //DUPS: 35010A4A, +REG64( EX_11_L2_RESET_KEEPER , RULL(0x36010A4A), SH_UNT_EX_11_L2 , + SH_ACS_SCOM ); //DUPS: 37010A4A, +REG64( EX_1_L2_RESET_KEEPER , RULL(0x22010A4A), SH_UNT_EX_1_L2 , + SH_ACS_SCOM ); //DUPS: 23010A4A, +REG64( EX_2_L2_RESET_KEEPER , RULL(0x24010A4A), SH_UNT_EX_2_L2 , + SH_ACS_SCOM ); //DUPS: 25010A4A, +REG64( EX_3_L2_RESET_KEEPER , RULL(0x26010A4A), SH_UNT_EX_3_L2 , + SH_ACS_SCOM ); //DUPS: 27010A4A, +REG64( EX_4_L2_RESET_KEEPER , RULL(0x28010A4A), SH_UNT_EX_4_L2 , + SH_ACS_SCOM ); //DUPS: 29010A4A, +REG64( EX_5_L2_RESET_KEEPER , RULL(0x2A010A4A), SH_UNT_EX_5_L2 , + SH_ACS_SCOM ); //DUPS: 2B010A4A, +REG64( EX_6_L2_RESET_KEEPER , RULL(0x2C010A4A), SH_UNT_EX_6_L2 , + SH_ACS_SCOM ); //DUPS: 2D010A4A, +REG64( EX_7_L2_RESET_KEEPER , RULL(0x2E010A4A), SH_UNT_EX_7_L2 , + SH_ACS_SCOM ); //DUPS: 2F010A4A, +REG64( EX_8_L2_RESET_KEEPER , RULL(0x30010A4A), SH_UNT_EX_8_L2 , + SH_ACS_SCOM ); //DUPS: 31010A4A, +REG64( EX_9_L2_RESET_KEEPER , RULL(0x32010A4A), SH_UNT_EX_9_L2 , + SH_ACS_SCOM ); //DUPS: 33010A4A, +REG64( EX_L2_RESET_KEEPER , RULL(0x20010A4A), SH_UNT_EX_L2 , + SH_ACS_SCOM ); //DUPS: 21010A4A, + +REG64( C_SCAN_REGION_TYPE , RULL(0x20030005), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_SCAN_REGION_TYPE , RULL(0x20030005), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_SCAN_REGION_TYPE , RULL(0x21030005), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_SCAN_REGION_TYPE , RULL(0x22030005), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_SCAN_REGION_TYPE , RULL(0x23030005), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_SCAN_REGION_TYPE , RULL(0x24030005), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_SCAN_REGION_TYPE , RULL(0x25030005), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_SCAN_REGION_TYPE , RULL(0x26030005), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_SCAN_REGION_TYPE , RULL(0x27030005), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_SCAN_REGION_TYPE , RULL(0x28030005), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_SCAN_REGION_TYPE , RULL(0x29030005), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_SCAN_REGION_TYPE , RULL(0x2A030005), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_SCAN_REGION_TYPE , RULL(0x2B030005), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_SCAN_REGION_TYPE , RULL(0x2C030005), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_SCAN_REGION_TYPE , RULL(0x2D030005), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_SCAN_REGION_TYPE , RULL(0x2E030005), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_SCAN_REGION_TYPE , RULL(0x2F030005), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_SCAN_REGION_TYPE , RULL(0x30030005), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_SCAN_REGION_TYPE , RULL(0x31030005), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_SCAN_REGION_TYPE , RULL(0x32030005), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_SCAN_REGION_TYPE , RULL(0x33030005), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_SCAN_REGION_TYPE , RULL(0x34030005), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_SCAN_REGION_TYPE , RULL(0x35030005), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_SCAN_REGION_TYPE , RULL(0x36030005), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_SCAN_REGION_TYPE , RULL(0x37030005), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_SCAN_REGION_TYPE , RULL(0x10030005), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_SCAN_REGION_TYPE , RULL(0x10030005), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_SCAN_REGION_TYPE , RULL(0x11030005), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_SCAN_REGION_TYPE , RULL(0x12030005), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_SCAN_REGION_TYPE , RULL(0x13030005), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_SCAN_REGION_TYPE , RULL(0x14030005), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_SCAN_REGION_TYPE , RULL(0x15030005), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_SCAN_REGION_TYPE , RULL(0x20030005), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21030005, +REG64( EX_0_SCAN_REGION_TYPE , RULL(0x20030005), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21030005, +REG64( EX_1_SCAN_REGION_TYPE , RULL(0x22030005), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23030005, +REG64( EX_2_SCAN_REGION_TYPE , RULL(0x24030005), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25030005, +REG64( EX_3_SCAN_REGION_TYPE , RULL(0x26030005), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27030005, +REG64( EX_4_SCAN_REGION_TYPE , RULL(0x28030005), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29030005, +REG64( EX_5_SCAN_REGION_TYPE , RULL(0x2A030005), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B030005, +REG64( EX_6_SCAN_REGION_TYPE , RULL(0x2C030005), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D030005, +REG64( EX_7_SCAN_REGION_TYPE , RULL(0x2E030005), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F030005, +REG64( EX_8_SCAN_REGION_TYPE , RULL(0x30030005), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31030005, +REG64( EX_9_SCAN_REGION_TYPE , RULL(0x32030005), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33030005, +REG64( EX_10_SCAN_REGION_TYPE , RULL(0x34030005), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35030005, +REG64( EX_11_SCAN_REGION_TYPE , RULL(0x36030005), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37030005, + +REG64( C_SCOMC , RULL(0x20010A80), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_SCOMC , RULL(0x20010A80), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_SCOMC , RULL(0x21010A80), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_SCOMC , RULL(0x22010A80), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_SCOMC , RULL(0x23010A80), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_SCOMC , RULL(0x24010A80), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_SCOMC , RULL(0x25010A80), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_SCOMC , RULL(0x26010A80), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_SCOMC , RULL(0x27010A80), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_SCOMC , RULL(0x28010A80), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_SCOMC , RULL(0x29010A80), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_SCOMC , RULL(0x2A010A80), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_SCOMC , RULL(0x2B010A80), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_SCOMC , RULL(0x2C010A80), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_SCOMC , RULL(0x2D010A80), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_SCOMC , RULL(0x2E010A80), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_SCOMC , RULL(0x2F010A80), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_SCOMC , RULL(0x30010A80), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_SCOMC , RULL(0x31010A80), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_SCOMC , RULL(0x32010A80), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_SCOMC , RULL(0x33010A80), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_SCOMC , RULL(0x34010A80), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_SCOMC , RULL(0x35010A80), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_SCOMC , RULL(0x36010A80), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_SCOMC , RULL(0x37010A80), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_SCOMC , RULL(0x21010A80), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RW ); //DUPS: 20010A80, +REG64( EX_10_L2_SCOMC , RULL(0x35010A80), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RW ); //DUPS: 34010A80, +REG64( EX_11_L2_SCOMC , RULL(0x37010A80), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RW ); //DUPS: 36010A80, +REG64( EX_1_L2_SCOMC , RULL(0x23010A80), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RW ); //DUPS: 22010A80, +REG64( EX_2_L2_SCOMC , RULL(0x25010A80), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RW ); //DUPS: 24010A80, +REG64( EX_3_L2_SCOMC , RULL(0x27010A80), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RW ); //DUPS: 26010A80, +REG64( EX_4_L2_SCOMC , RULL(0x29010A80), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RW ); //DUPS: 28010A80, +REG64( EX_5_L2_SCOMC , RULL(0x2B010A80), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2A010A80, +REG64( EX_6_L2_SCOMC , RULL(0x2D010A80), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2C010A80, +REG64( EX_7_L2_SCOMC , RULL(0x2F010A80), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2E010A80, +REG64( EX_8_L2_SCOMC , RULL(0x31010A80), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RW ); //DUPS: 30010A80, +REG64( EX_9_L2_SCOMC , RULL(0x33010A80), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RW ); //DUPS: 32010A80, +REG64( EX_L2_SCOMC , RULL(0x21010A80), SH_UNT_EX_L2 , + SH_ACS_SCOM_RW ); //DUPS: 20010A80, + +REG64( C_SCR0 , RULL(0x20010A86), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_SCR0 , RULL(0x20010A86), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_SCR0 , RULL(0x21010A86), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_SCR0 , RULL(0x22010A86), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_SCR0 , RULL(0x23010A86), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_SCR0 , RULL(0x24010A86), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_SCR0 , RULL(0x25010A86), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_SCR0 , RULL(0x26010A86), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_SCR0 , RULL(0x27010A86), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_SCR0 , RULL(0x28010A86), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_SCR0 , RULL(0x29010A86), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_SCR0 , RULL(0x2A010A86), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_SCR0 , RULL(0x2B010A86), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_SCR0 , RULL(0x2C010A86), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_SCR0 , RULL(0x2D010A86), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_SCR0 , RULL(0x2E010A86), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_SCR0 , RULL(0x2F010A86), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_SCR0 , RULL(0x30010A86), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_SCR0 , RULL(0x31010A86), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_SCR0 , RULL(0x32010A86), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_SCR0 , RULL(0x33010A86), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_SCR0 , RULL(0x34010A86), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_SCR0 , RULL(0x35010A86), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_SCR0 , RULL(0x36010A86), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_SCR0 , RULL(0x37010A86), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_SCR0 , RULL(0x21010A86), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RW ); //DUPS: 20010A86, +REG64( EX_10_L2_SCR0 , RULL(0x35010A86), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RW ); //DUPS: 34010A86, +REG64( EX_11_L2_SCR0 , RULL(0x37010A86), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RW ); //DUPS: 36010A86, +REG64( EX_1_L2_SCR0 , RULL(0x23010A86), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RW ); //DUPS: 22010A86, +REG64( EX_2_L2_SCR0 , RULL(0x25010A86), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RW ); //DUPS: 24010A86, +REG64( EX_3_L2_SCR0 , RULL(0x27010A86), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RW ); //DUPS: 26010A86, +REG64( EX_4_L2_SCR0 , RULL(0x29010A86), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RW ); //DUPS: 28010A86, +REG64( EX_5_L2_SCR0 , RULL(0x2B010A86), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2A010A86, +REG64( EX_6_L2_SCR0 , RULL(0x2D010A86), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2C010A86, +REG64( EX_7_L2_SCR0 , RULL(0x2F010A86), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2E010A86, +REG64( EX_8_L2_SCR0 , RULL(0x31010A86), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RW ); //DUPS: 30010A86, +REG64( EX_9_L2_SCR0 , RULL(0x33010A86), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RW ); //DUPS: 32010A86, +REG64( EX_L2_SCR0 , RULL(0x21010A86), SH_UNT_EX_L2 , + SH_ACS_SCOM_RW ); //DUPS: 20010A86, + +REG64( C_SCR1 , RULL(0x20010A87), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_SCR1 , RULL(0x20010A87), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_SCR1 , RULL(0x21010A87), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_SCR1 , RULL(0x22010A87), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_SCR1 , RULL(0x23010A87), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_SCR1 , RULL(0x24010A87), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_SCR1 , RULL(0x25010A87), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_SCR1 , RULL(0x26010A87), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_SCR1 , RULL(0x27010A87), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_SCR1 , RULL(0x28010A87), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_SCR1 , RULL(0x29010A87), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_SCR1 , RULL(0x2A010A87), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_SCR1 , RULL(0x2B010A87), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_SCR1 , RULL(0x2C010A87), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_SCR1 , RULL(0x2D010A87), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_SCR1 , RULL(0x2E010A87), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_SCR1 , RULL(0x2F010A87), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_SCR1 , RULL(0x30010A87), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_SCR1 , RULL(0x31010A87), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_SCR1 , RULL(0x32010A87), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_SCR1 , RULL(0x33010A87), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_SCR1 , RULL(0x34010A87), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_SCR1 , RULL(0x35010A87), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_SCR1 , RULL(0x36010A87), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_SCR1 , RULL(0x37010A87), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_SCR1 , RULL(0x21010A87), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RW ); //DUPS: 20010A87, +REG64( EX_10_L2_SCR1 , RULL(0x35010A87), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RW ); //DUPS: 34010A87, +REG64( EX_11_L2_SCR1 , RULL(0x37010A87), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RW ); //DUPS: 36010A87, +REG64( EX_1_L2_SCR1 , RULL(0x23010A87), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RW ); //DUPS: 22010A87, +REG64( EX_2_L2_SCR1 , RULL(0x25010A87), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RW ); //DUPS: 24010A87, +REG64( EX_3_L2_SCR1 , RULL(0x27010A87), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RW ); //DUPS: 26010A87, +REG64( EX_4_L2_SCR1 , RULL(0x29010A87), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RW ); //DUPS: 28010A87, +REG64( EX_5_L2_SCR1 , RULL(0x2B010A87), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2A010A87, +REG64( EX_6_L2_SCR1 , RULL(0x2D010A87), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2C010A87, +REG64( EX_7_L2_SCR1 , RULL(0x2F010A87), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2E010A87, +REG64( EX_8_L2_SCR1 , RULL(0x31010A87), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RW ); //DUPS: 30010A87, +REG64( EX_9_L2_SCR1 , RULL(0x33010A87), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RW ); //DUPS: 32010A87, +REG64( EX_L2_SCR1 , RULL(0x21010A87), SH_UNT_EX_L2 , + SH_ACS_SCOM_RW ); //DUPS: 20010A87, + +REG64( C_SCR2 , RULL(0x20010A88), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_SCR2 , RULL(0x20010A88), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_SCR2 , RULL(0x21010A88), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_SCR2 , RULL(0x22010A88), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_SCR2 , RULL(0x23010A88), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_SCR2 , RULL(0x24010A88), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_SCR2 , RULL(0x25010A88), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_SCR2 , RULL(0x26010A88), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_SCR2 , RULL(0x27010A88), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_SCR2 , RULL(0x28010A88), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_SCR2 , RULL(0x29010A88), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_SCR2 , RULL(0x2A010A88), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_SCR2 , RULL(0x2B010A88), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_SCR2 , RULL(0x2C010A88), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_SCR2 , RULL(0x2D010A88), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_SCR2 , RULL(0x2E010A88), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_SCR2 , RULL(0x2F010A88), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_SCR2 , RULL(0x30010A88), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_SCR2 , RULL(0x31010A88), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_SCR2 , RULL(0x32010A88), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_SCR2 , RULL(0x33010A88), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_SCR2 , RULL(0x34010A88), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_SCR2 , RULL(0x35010A88), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_SCR2 , RULL(0x36010A88), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_SCR2 , RULL(0x37010A88), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_SCR2 , RULL(0x21010A88), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 20010A88, +REG64( EX_0_SCR2 , RULL(0x21010A88), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 20010A88, +REG64( EX_1_SCR2 , RULL(0x23010A88), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 22010A88, +REG64( EX_2_SCR2 , RULL(0x25010A88), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 24010A88, +REG64( EX_3_SCR2 , RULL(0x27010A88), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 26010A88, +REG64( EX_4_SCR2 , RULL(0x29010A88), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 28010A88, +REG64( EX_5_SCR2 , RULL(0x2B010A88), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2A010A88, +REG64( EX_6_SCR2 , RULL(0x2D010A88), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2C010A88, +REG64( EX_7_SCR2 , RULL(0x2F010A88), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2E010A88, +REG64( EX_8_SCR2 , RULL(0x31010A88), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 30010A88, +REG64( EX_9_SCR2 , RULL(0x33010A88), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 32010A88, +REG64( EX_10_SCR2 , RULL(0x35010A88), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 34010A88, +REG64( EX_11_SCR2 , RULL(0x37010A88), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 36010A88, + +REG64( C_SCR3 , RULL(0x20010A89), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_SCR3 , RULL(0x20010A89), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_SCR3 , RULL(0x21010A89), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_SCR3 , RULL(0x22010A89), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_SCR3 , RULL(0x23010A89), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_SCR3 , RULL(0x24010A89), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_SCR3 , RULL(0x25010A89), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_SCR3 , RULL(0x26010A89), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_SCR3 , RULL(0x27010A89), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_SCR3 , RULL(0x28010A89), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_SCR3 , RULL(0x29010A89), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_SCR3 , RULL(0x2A010A89), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_SCR3 , RULL(0x2B010A89), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_SCR3 , RULL(0x2C010A89), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_SCR3 , RULL(0x2D010A89), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_SCR3 , RULL(0x2E010A89), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_SCR3 , RULL(0x2F010A89), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_SCR3 , RULL(0x30010A89), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_SCR3 , RULL(0x31010A89), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_SCR3 , RULL(0x32010A89), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_SCR3 , RULL(0x33010A89), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_SCR3 , RULL(0x34010A89), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_SCR3 , RULL(0x35010A89), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_SCR3 , RULL(0x36010A89), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_SCR3 , RULL(0x37010A89), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_SCR3 , RULL(0x21010A89), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 20010A89, +REG64( EX_0_SCR3 , RULL(0x21010A89), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 20010A89, +REG64( EX_1_SCR3 , RULL(0x23010A89), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 22010A89, +REG64( EX_2_SCR3 , RULL(0x25010A89), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 24010A89, +REG64( EX_3_SCR3 , RULL(0x27010A89), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 26010A89, +REG64( EX_4_SCR3 , RULL(0x29010A89), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 28010A89, +REG64( EX_5_SCR3 , RULL(0x2B010A89), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2A010A89, +REG64( EX_6_SCR3 , RULL(0x2D010A89), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2C010A89, +REG64( EX_7_SCR3 , RULL(0x2F010A89), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2E010A89, +REG64( EX_8_SCR3 , RULL(0x31010A89), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 30010A89, +REG64( EX_9_SCR3 , RULL(0x33010A89), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 32010A89, +REG64( EX_10_SCR3 , RULL(0x35010A89), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 34010A89, +REG64( EX_11_SCR3 , RULL(0x37010A89), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 36010A89, + +REG64( C_SHID0 , RULL(0x20010AA5), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_SHID0 , RULL(0x20010AA5), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_SHID0 , RULL(0x21010AA5), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_SHID0 , RULL(0x22010AA5), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_SHID0 , RULL(0x23010AA5), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_SHID0 , RULL(0x24010AA5), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_SHID0 , RULL(0x25010AA5), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_SHID0 , RULL(0x26010AA5), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_SHID0 , RULL(0x27010AA5), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_SHID0 , RULL(0x28010AA5), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_SHID0 , RULL(0x29010AA5), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_SHID0 , RULL(0x2A010AA5), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_SHID0 , RULL(0x2B010AA5), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_SHID0 , RULL(0x2C010AA5), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_SHID0 , RULL(0x2D010AA5), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_SHID0 , RULL(0x2E010AA5), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_SHID0 , RULL(0x2F010AA5), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_SHID0 , RULL(0x30010AA5), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_SHID0 , RULL(0x31010AA5), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_SHID0 , RULL(0x32010AA5), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_SHID0 , RULL(0x33010AA5), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_SHID0 , RULL(0x34010AA5), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_SHID0 , RULL(0x35010AA5), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_SHID0 , RULL(0x36010AA5), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_SHID0 , RULL(0x37010AA5), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_SHID0 , RULL(0x20010AA5), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RW ); //DUPS: 21010AA5, +REG64( EX_10_L2_SHID0 , RULL(0x34010AA5), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RW ); //DUPS: 35010AA5, +REG64( EX_11_L2_SHID0 , RULL(0x36010AA5), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RW ); //DUPS: 37010AA5, +REG64( EX_1_L2_SHID0 , RULL(0x22010AA5), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RW ); //DUPS: 23010AA5, +REG64( EX_2_L2_SHID0 , RULL(0x24010AA5), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RW ); //DUPS: 25010AA5, +REG64( EX_3_L2_SHID0 , RULL(0x26010AA5), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RW ); //DUPS: 27010AA5, +REG64( EX_4_L2_SHID0 , RULL(0x28010AA5), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RW ); //DUPS: 29010AA5, +REG64( EX_5_L2_SHID0 , RULL(0x2A010AA5), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2B010AA5, +REG64( EX_6_L2_SHID0 , RULL(0x2C010AA5), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2D010AA5, +REG64( EX_7_L2_SHID0 , RULL(0x2E010AA5), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2F010AA5, +REG64( EX_8_L2_SHID0 , RULL(0x30010AA5), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RW ); //DUPS: 31010AA5, +REG64( EX_9_L2_SHID0 , RULL(0x32010AA5), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RW ); //DUPS: 33010AA5, +REG64( EX_L2_SHID0 , RULL(0x20010AA5), SH_UNT_EX_L2 , + SH_ACS_SCOM_RW ); //DUPS: 21010AA5, + +REG64( C_SIER_MASK , RULL(0x20010AAE), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_SIER_MASK , RULL(0x20010AAE), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_SIER_MASK , RULL(0x21010AAE), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_SIER_MASK , RULL(0x22010AAE), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_SIER_MASK , RULL(0x23010AAE), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_SIER_MASK , RULL(0x24010AAE), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_SIER_MASK , RULL(0x25010AAE), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_SIER_MASK , RULL(0x26010AAE), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_SIER_MASK , RULL(0x27010AAE), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_SIER_MASK , RULL(0x28010AAE), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_SIER_MASK , RULL(0x29010AAE), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_SIER_MASK , RULL(0x2A010AAE), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_SIER_MASK , RULL(0x2B010AAE), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_SIER_MASK , RULL(0x2C010AAE), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_SIER_MASK , RULL(0x2D010AAE), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_SIER_MASK , RULL(0x2E010AAE), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_SIER_MASK , RULL(0x2F010AAE), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_SIER_MASK , RULL(0x30010AAE), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_SIER_MASK , RULL(0x31010AAE), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_SIER_MASK , RULL(0x32010AAE), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_SIER_MASK , RULL(0x33010AAE), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_SIER_MASK , RULL(0x34010AAE), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_SIER_MASK , RULL(0x35010AAE), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_SIER_MASK , RULL(0x36010AAE), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_SIER_MASK , RULL(0x37010AAE), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_SIER_MASK , RULL(0x20010AAE), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21010AAE, +REG64( EX_0_SIER_MASK , RULL(0x20010AAE), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21010AAE, +REG64( EX_1_SIER_MASK , RULL(0x22010AAE), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23010AAE, +REG64( EX_2_SIER_MASK , RULL(0x24010AAE), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25010AAE, +REG64( EX_3_SIER_MASK , RULL(0x26010AAE), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27010AAE, +REG64( EX_4_SIER_MASK , RULL(0x28010AAE), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29010AAE, +REG64( EX_5_SIER_MASK , RULL(0x2A010AAE), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B010AAE, +REG64( EX_6_SIER_MASK , RULL(0x2C010AAE), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D010AAE, +REG64( EX_7_SIER_MASK , RULL(0x2E010AAE), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F010AAE, +REG64( EX_8_SIER_MASK , RULL(0x30010AAE), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31010AAE, +REG64( EX_9_SIER_MASK , RULL(0x32010AAE), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33010AAE, +REG64( EX_10_SIER_MASK , RULL(0x34010AAE), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35010AAE, +REG64( EX_11_SIER_MASK , RULL(0x36010AAE), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37010AAE, + +REG64( C_SKITTER_CLKSRC_REG , RULL(0x20050016), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_SKITTER_CLKSRC_REG , RULL(0x20050016), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_SKITTER_CLKSRC_REG , RULL(0x21050016), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_SKITTER_CLKSRC_REG , RULL(0x22050016), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_SKITTER_CLKSRC_REG , RULL(0x23050016), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_SKITTER_CLKSRC_REG , RULL(0x24050016), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_SKITTER_CLKSRC_REG , RULL(0x25050016), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_SKITTER_CLKSRC_REG , RULL(0x26050016), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_SKITTER_CLKSRC_REG , RULL(0x27050016), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_SKITTER_CLKSRC_REG , RULL(0x28050016), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_SKITTER_CLKSRC_REG , RULL(0x29050016), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_SKITTER_CLKSRC_REG , RULL(0x2A050016), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_SKITTER_CLKSRC_REG , RULL(0x2B050016), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_SKITTER_CLKSRC_REG , RULL(0x2C050016), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_SKITTER_CLKSRC_REG , RULL(0x2D050016), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_SKITTER_CLKSRC_REG , RULL(0x2E050016), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_SKITTER_CLKSRC_REG , RULL(0x2F050016), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_SKITTER_CLKSRC_REG , RULL(0x30050016), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_SKITTER_CLKSRC_REG , RULL(0x31050016), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_SKITTER_CLKSRC_REG , RULL(0x32050016), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_SKITTER_CLKSRC_REG , RULL(0x33050016), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_SKITTER_CLKSRC_REG , RULL(0x34050016), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_SKITTER_CLKSRC_REG , RULL(0x35050016), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_SKITTER_CLKSRC_REG , RULL(0x36050016), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_SKITTER_CLKSRC_REG , RULL(0x37050016), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_SKITTER_CLKSRC_REG , RULL(0x10050016), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_SKITTER_CLKSRC_REG , RULL(0x10050016), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_SKITTER_CLKSRC_REG , RULL(0x11050016), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_SKITTER_CLKSRC_REG , RULL(0x12050016), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_SKITTER_CLKSRC_REG , RULL(0x13050016), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_SKITTER_CLKSRC_REG , RULL(0x14050016), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_SKITTER_CLKSRC_REG , RULL(0x15050016), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_SKITTER_CLKSRC_REG , RULL(0x20050016), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21050016, +REG64( EX_0_SKITTER_CLKSRC_REG , RULL(0x20050016), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21050016, +REG64( EX_1_SKITTER_CLKSRC_REG , RULL(0x22050016), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23050016, +REG64( EX_2_SKITTER_CLKSRC_REG , RULL(0x24050016), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25050016, +REG64( EX_3_SKITTER_CLKSRC_REG , RULL(0x26050016), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27050016, +REG64( EX_4_SKITTER_CLKSRC_REG , RULL(0x28050016), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29050016, +REG64( EX_5_SKITTER_CLKSRC_REG , RULL(0x2A050016), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B050016, +REG64( EX_6_SKITTER_CLKSRC_REG , RULL(0x2C050016), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D050016, +REG64( EX_7_SKITTER_CLKSRC_REG , RULL(0x2E050016), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F050016, +REG64( EX_8_SKITTER_CLKSRC_REG , RULL(0x30050016), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31050016, +REG64( EX_9_SKITTER_CLKSRC_REG , RULL(0x32050016), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33050016, +REG64( EX_10_SKITTER_CLKSRC_REG , RULL(0x34050016), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35050016, +REG64( EX_11_SKITTER_CLKSRC_REG , RULL(0x36050016), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37050016, + +REG64( C_SKITTER_DATA0 , RULL(0x20050019), SH_UNT_C , SH_ACS_SCOM_RO ); +REG64( C_0_SKITTER_DATA0 , RULL(0x20050019), SH_UNT_C_0 , SH_ACS_SCOM_RO ); +REG64( C_1_SKITTER_DATA0 , RULL(0x21050019), SH_UNT_C_1 , SH_ACS_SCOM_RO ); +REG64( C_2_SKITTER_DATA0 , RULL(0x22050019), SH_UNT_C_2 , SH_ACS_SCOM_RO ); +REG64( C_3_SKITTER_DATA0 , RULL(0x23050019), SH_UNT_C_3 , SH_ACS_SCOM_RO ); +REG64( C_4_SKITTER_DATA0 , RULL(0x24050019), SH_UNT_C_4 , SH_ACS_SCOM_RO ); +REG64( C_5_SKITTER_DATA0 , RULL(0x25050019), SH_UNT_C_5 , SH_ACS_SCOM_RO ); +REG64( C_6_SKITTER_DATA0 , RULL(0x26050019), SH_UNT_C_6 , SH_ACS_SCOM_RO ); +REG64( C_7_SKITTER_DATA0 , RULL(0x27050019), SH_UNT_C_7 , SH_ACS_SCOM_RO ); +REG64( C_8_SKITTER_DATA0 , RULL(0x28050019), SH_UNT_C_8 , SH_ACS_SCOM_RO ); +REG64( C_9_SKITTER_DATA0 , RULL(0x29050019), SH_UNT_C_9 , SH_ACS_SCOM_RO ); +REG64( C_10_SKITTER_DATA0 , RULL(0x2A050019), SH_UNT_C_10 , SH_ACS_SCOM_RO ); +REG64( C_11_SKITTER_DATA0 , RULL(0x2B050019), SH_UNT_C_11 , SH_ACS_SCOM_RO ); +REG64( C_12_SKITTER_DATA0 , RULL(0x2C050019), SH_UNT_C_12 , SH_ACS_SCOM_RO ); +REG64( C_13_SKITTER_DATA0 , RULL(0x2D050019), SH_UNT_C_13 , SH_ACS_SCOM_RO ); +REG64( C_14_SKITTER_DATA0 , RULL(0x2E050019), SH_UNT_C_14 , SH_ACS_SCOM_RO ); +REG64( C_15_SKITTER_DATA0 , RULL(0x2F050019), SH_UNT_C_15 , SH_ACS_SCOM_RO ); +REG64( C_16_SKITTER_DATA0 , RULL(0x30050019), SH_UNT_C_16 , SH_ACS_SCOM_RO ); +REG64( C_17_SKITTER_DATA0 , RULL(0x31050019), SH_UNT_C_17 , SH_ACS_SCOM_RO ); +REG64( C_18_SKITTER_DATA0 , RULL(0x32050019), SH_UNT_C_18 , SH_ACS_SCOM_RO ); +REG64( C_19_SKITTER_DATA0 , RULL(0x33050019), SH_UNT_C_19 , SH_ACS_SCOM_RO ); +REG64( C_20_SKITTER_DATA0 , RULL(0x34050019), SH_UNT_C_20 , SH_ACS_SCOM_RO ); +REG64( C_21_SKITTER_DATA0 , RULL(0x35050019), SH_UNT_C_21 , SH_ACS_SCOM_RO ); +REG64( C_22_SKITTER_DATA0 , RULL(0x36050019), SH_UNT_C_22 , SH_ACS_SCOM_RO ); +REG64( C_23_SKITTER_DATA0 , RULL(0x37050019), SH_UNT_C_23 , SH_ACS_SCOM_RO ); +REG64( EQ_SKITTER_DATA0 , RULL(0x10050019), SH_UNT_EQ , SH_ACS_SCOM_RO ); +REG64( EQ_0_SKITTER_DATA0 , RULL(0x10050019), SH_UNT_EQ_0 , SH_ACS_SCOM_RO ); +REG64( EQ_1_SKITTER_DATA0 , RULL(0x11050019), SH_UNT_EQ_1 , SH_ACS_SCOM_RO ); +REG64( EQ_2_SKITTER_DATA0 , RULL(0x12050019), SH_UNT_EQ_2 , SH_ACS_SCOM_RO ); +REG64( EQ_3_SKITTER_DATA0 , RULL(0x13050019), SH_UNT_EQ_3 , SH_ACS_SCOM_RO ); +REG64( EQ_4_SKITTER_DATA0 , RULL(0x14050019), SH_UNT_EQ_4 , SH_ACS_SCOM_RO ); +REG64( EQ_5_SKITTER_DATA0 , RULL(0x15050019), SH_UNT_EQ_5 , SH_ACS_SCOM_RO ); +REG64( EX_SKITTER_DATA0 , RULL(0x20050019), SH_UNT_EX , + SH_ACS_SCOM_RO ); //DUPS: 21050019, +REG64( EX_0_SKITTER_DATA0 , RULL(0x20050019), SH_UNT_EX_0 , + SH_ACS_SCOM_RO ); //DUPS: 21050019, +REG64( EX_1_SKITTER_DATA0 , RULL(0x22050019), SH_UNT_EX_1 , + SH_ACS_SCOM_RO ); //DUPS: 23050019, +REG64( EX_2_SKITTER_DATA0 , RULL(0x24050019), SH_UNT_EX_2 , + SH_ACS_SCOM_RO ); //DUPS: 25050019, +REG64( EX_3_SKITTER_DATA0 , RULL(0x26050019), SH_UNT_EX_3 , + SH_ACS_SCOM_RO ); //DUPS: 27050019, +REG64( EX_4_SKITTER_DATA0 , RULL(0x28050019), SH_UNT_EX_4 , + SH_ACS_SCOM_RO ); //DUPS: 29050019, +REG64( EX_5_SKITTER_DATA0 , RULL(0x2A050019), SH_UNT_EX_5 , + SH_ACS_SCOM_RO ); //DUPS: 2B050019, +REG64( EX_6_SKITTER_DATA0 , RULL(0x2C050019), SH_UNT_EX_6 , + SH_ACS_SCOM_RO ); //DUPS: 2D050019, +REG64( EX_7_SKITTER_DATA0 , RULL(0x2E050019), SH_UNT_EX_7 , + SH_ACS_SCOM_RO ); //DUPS: 2F050019, +REG64( EX_8_SKITTER_DATA0 , RULL(0x30050019), SH_UNT_EX_8 , + SH_ACS_SCOM_RO ); //DUPS: 31050019, +REG64( EX_9_SKITTER_DATA0 , RULL(0x32050019), SH_UNT_EX_9 , + SH_ACS_SCOM_RO ); //DUPS: 33050019, +REG64( EX_10_SKITTER_DATA0 , RULL(0x34050019), SH_UNT_EX_10 , + SH_ACS_SCOM_RO ); //DUPS: 35050019, +REG64( EX_11_SKITTER_DATA0 , RULL(0x36050019), SH_UNT_EX_11 , + SH_ACS_SCOM_RO ); //DUPS: 37050019, + +REG64( C_SKITTER_DATA1 , RULL(0x2005001A), SH_UNT_C , SH_ACS_SCOM_RO ); +REG64( C_0_SKITTER_DATA1 , RULL(0x2005001A), SH_UNT_C_0 , SH_ACS_SCOM_RO ); +REG64( C_1_SKITTER_DATA1 , RULL(0x2105001A), SH_UNT_C_1 , SH_ACS_SCOM_RO ); +REG64( C_2_SKITTER_DATA1 , RULL(0x2205001A), SH_UNT_C_2 , SH_ACS_SCOM_RO ); +REG64( C_3_SKITTER_DATA1 , RULL(0x2305001A), SH_UNT_C_3 , SH_ACS_SCOM_RO ); +REG64( C_4_SKITTER_DATA1 , RULL(0x2405001A), SH_UNT_C_4 , SH_ACS_SCOM_RO ); +REG64( C_5_SKITTER_DATA1 , RULL(0x2505001A), SH_UNT_C_5 , SH_ACS_SCOM_RO ); +REG64( C_6_SKITTER_DATA1 , RULL(0x2605001A), SH_UNT_C_6 , SH_ACS_SCOM_RO ); +REG64( C_7_SKITTER_DATA1 , RULL(0x2705001A), SH_UNT_C_7 , SH_ACS_SCOM_RO ); +REG64( C_8_SKITTER_DATA1 , RULL(0x2805001A), SH_UNT_C_8 , SH_ACS_SCOM_RO ); +REG64( C_9_SKITTER_DATA1 , RULL(0x2905001A), SH_UNT_C_9 , SH_ACS_SCOM_RO ); +REG64( C_10_SKITTER_DATA1 , RULL(0x2A05001A), SH_UNT_C_10 , SH_ACS_SCOM_RO ); +REG64( C_11_SKITTER_DATA1 , RULL(0x2B05001A), SH_UNT_C_11 , SH_ACS_SCOM_RO ); +REG64( C_12_SKITTER_DATA1 , RULL(0x2C05001A), SH_UNT_C_12 , SH_ACS_SCOM_RO ); +REG64( C_13_SKITTER_DATA1 , RULL(0x2D05001A), SH_UNT_C_13 , SH_ACS_SCOM_RO ); +REG64( C_14_SKITTER_DATA1 , RULL(0x2E05001A), SH_UNT_C_14 , SH_ACS_SCOM_RO ); +REG64( C_15_SKITTER_DATA1 , RULL(0x2F05001A), SH_UNT_C_15 , SH_ACS_SCOM_RO ); +REG64( C_16_SKITTER_DATA1 , RULL(0x3005001A), SH_UNT_C_16 , SH_ACS_SCOM_RO ); +REG64( C_17_SKITTER_DATA1 , RULL(0x3105001A), SH_UNT_C_17 , SH_ACS_SCOM_RO ); +REG64( C_18_SKITTER_DATA1 , RULL(0x3205001A), SH_UNT_C_18 , SH_ACS_SCOM_RO ); +REG64( C_19_SKITTER_DATA1 , RULL(0x3305001A), SH_UNT_C_19 , SH_ACS_SCOM_RO ); +REG64( C_20_SKITTER_DATA1 , RULL(0x3405001A), SH_UNT_C_20 , SH_ACS_SCOM_RO ); +REG64( C_21_SKITTER_DATA1 , RULL(0x3505001A), SH_UNT_C_21 , SH_ACS_SCOM_RO ); +REG64( C_22_SKITTER_DATA1 , RULL(0x3605001A), SH_UNT_C_22 , SH_ACS_SCOM_RO ); +REG64( C_23_SKITTER_DATA1 , RULL(0x3705001A), SH_UNT_C_23 , SH_ACS_SCOM_RO ); +REG64( EQ_SKITTER_DATA1 , RULL(0x1005001A), SH_UNT_EQ , SH_ACS_SCOM_RO ); +REG64( EQ_0_SKITTER_DATA1 , RULL(0x1005001A), SH_UNT_EQ_0 , SH_ACS_SCOM_RO ); +REG64( EQ_1_SKITTER_DATA1 , RULL(0x1105001A), SH_UNT_EQ_1 , SH_ACS_SCOM_RO ); +REG64( EQ_2_SKITTER_DATA1 , RULL(0x1205001A), SH_UNT_EQ_2 , SH_ACS_SCOM_RO ); +REG64( EQ_3_SKITTER_DATA1 , RULL(0x1305001A), SH_UNT_EQ_3 , SH_ACS_SCOM_RO ); +REG64( EQ_4_SKITTER_DATA1 , RULL(0x1405001A), SH_UNT_EQ_4 , SH_ACS_SCOM_RO ); +REG64( EQ_5_SKITTER_DATA1 , RULL(0x1505001A), SH_UNT_EQ_5 , SH_ACS_SCOM_RO ); +REG64( EX_SKITTER_DATA1 , RULL(0x2005001A), SH_UNT_EX , + SH_ACS_SCOM_RO ); //DUPS: 2105001A, +REG64( EX_0_SKITTER_DATA1 , RULL(0x2005001A), SH_UNT_EX_0 , + SH_ACS_SCOM_RO ); //DUPS: 2105001A, +REG64( EX_1_SKITTER_DATA1 , RULL(0x2205001A), SH_UNT_EX_1 , + SH_ACS_SCOM_RO ); //DUPS: 2305001A, +REG64( EX_2_SKITTER_DATA1 , RULL(0x2405001A), SH_UNT_EX_2 , + SH_ACS_SCOM_RO ); //DUPS: 2505001A, +REG64( EX_3_SKITTER_DATA1 , RULL(0x2605001A), SH_UNT_EX_3 , + SH_ACS_SCOM_RO ); //DUPS: 2705001A, +REG64( EX_4_SKITTER_DATA1 , RULL(0x2805001A), SH_UNT_EX_4 , + SH_ACS_SCOM_RO ); //DUPS: 2905001A, +REG64( EX_5_SKITTER_DATA1 , RULL(0x2A05001A), SH_UNT_EX_5 , + SH_ACS_SCOM_RO ); //DUPS: 2B05001A, +REG64( EX_6_SKITTER_DATA1 , RULL(0x2C05001A), SH_UNT_EX_6 , + SH_ACS_SCOM_RO ); //DUPS: 2D05001A, +REG64( EX_7_SKITTER_DATA1 , RULL(0x2E05001A), SH_UNT_EX_7 , + SH_ACS_SCOM_RO ); //DUPS: 2F05001A, +REG64( EX_8_SKITTER_DATA1 , RULL(0x3005001A), SH_UNT_EX_8 , + SH_ACS_SCOM_RO ); //DUPS: 3105001A, +REG64( EX_9_SKITTER_DATA1 , RULL(0x3205001A), SH_UNT_EX_9 , + SH_ACS_SCOM_RO ); //DUPS: 3305001A, +REG64( EX_10_SKITTER_DATA1 , RULL(0x3405001A), SH_UNT_EX_10 , + SH_ACS_SCOM_RO ); //DUPS: 3505001A, +REG64( EX_11_SKITTER_DATA1 , RULL(0x3605001A), SH_UNT_EX_11 , + SH_ACS_SCOM_RO ); //DUPS: 3705001A, + +REG64( C_SKITTER_DATA2 , RULL(0x2005001B), SH_UNT_C , SH_ACS_SCOM_RO ); +REG64( C_0_SKITTER_DATA2 , RULL(0x2005001B), SH_UNT_C_0 , SH_ACS_SCOM_RO ); +REG64( C_1_SKITTER_DATA2 , RULL(0x2105001B), SH_UNT_C_1 , SH_ACS_SCOM_RO ); +REG64( C_2_SKITTER_DATA2 , RULL(0x2205001B), SH_UNT_C_2 , SH_ACS_SCOM_RO ); +REG64( C_3_SKITTER_DATA2 , RULL(0x2305001B), SH_UNT_C_3 , SH_ACS_SCOM_RO ); +REG64( C_4_SKITTER_DATA2 , RULL(0x2405001B), SH_UNT_C_4 , SH_ACS_SCOM_RO ); +REG64( C_5_SKITTER_DATA2 , RULL(0x2505001B), SH_UNT_C_5 , SH_ACS_SCOM_RO ); +REG64( C_6_SKITTER_DATA2 , RULL(0x2605001B), SH_UNT_C_6 , SH_ACS_SCOM_RO ); +REG64( C_7_SKITTER_DATA2 , RULL(0x2705001B), SH_UNT_C_7 , SH_ACS_SCOM_RO ); +REG64( C_8_SKITTER_DATA2 , RULL(0x2805001B), SH_UNT_C_8 , SH_ACS_SCOM_RO ); +REG64( C_9_SKITTER_DATA2 , RULL(0x2905001B), SH_UNT_C_9 , SH_ACS_SCOM_RO ); +REG64( C_10_SKITTER_DATA2 , RULL(0x2A05001B), SH_UNT_C_10 , SH_ACS_SCOM_RO ); +REG64( C_11_SKITTER_DATA2 , RULL(0x2B05001B), SH_UNT_C_11 , SH_ACS_SCOM_RO ); +REG64( C_12_SKITTER_DATA2 , RULL(0x2C05001B), SH_UNT_C_12 , SH_ACS_SCOM_RO ); +REG64( C_13_SKITTER_DATA2 , RULL(0x2D05001B), SH_UNT_C_13 , SH_ACS_SCOM_RO ); +REG64( C_14_SKITTER_DATA2 , RULL(0x2E05001B), SH_UNT_C_14 , SH_ACS_SCOM_RO ); +REG64( C_15_SKITTER_DATA2 , RULL(0x2F05001B), SH_UNT_C_15 , SH_ACS_SCOM_RO ); +REG64( C_16_SKITTER_DATA2 , RULL(0x3005001B), SH_UNT_C_16 , SH_ACS_SCOM_RO ); +REG64( C_17_SKITTER_DATA2 , RULL(0x3105001B), SH_UNT_C_17 , SH_ACS_SCOM_RO ); +REG64( C_18_SKITTER_DATA2 , RULL(0x3205001B), SH_UNT_C_18 , SH_ACS_SCOM_RO ); +REG64( C_19_SKITTER_DATA2 , RULL(0x3305001B), SH_UNT_C_19 , SH_ACS_SCOM_RO ); +REG64( C_20_SKITTER_DATA2 , RULL(0x3405001B), SH_UNT_C_20 , SH_ACS_SCOM_RO ); +REG64( C_21_SKITTER_DATA2 , RULL(0x3505001B), SH_UNT_C_21 , SH_ACS_SCOM_RO ); +REG64( C_22_SKITTER_DATA2 , RULL(0x3605001B), SH_UNT_C_22 , SH_ACS_SCOM_RO ); +REG64( C_23_SKITTER_DATA2 , RULL(0x3705001B), SH_UNT_C_23 , SH_ACS_SCOM_RO ); +REG64( EQ_SKITTER_DATA2 , RULL(0x1005001B), SH_UNT_EQ , SH_ACS_SCOM_RO ); +REG64( EQ_0_SKITTER_DATA2 , RULL(0x1005001B), SH_UNT_EQ_0 , SH_ACS_SCOM_RO ); +REG64( EQ_1_SKITTER_DATA2 , RULL(0x1105001B), SH_UNT_EQ_1 , SH_ACS_SCOM_RO ); +REG64( EQ_2_SKITTER_DATA2 , RULL(0x1205001B), SH_UNT_EQ_2 , SH_ACS_SCOM_RO ); +REG64( EQ_3_SKITTER_DATA2 , RULL(0x1305001B), SH_UNT_EQ_3 , SH_ACS_SCOM_RO ); +REG64( EQ_4_SKITTER_DATA2 , RULL(0x1405001B), SH_UNT_EQ_4 , SH_ACS_SCOM_RO ); +REG64( EQ_5_SKITTER_DATA2 , RULL(0x1505001B), SH_UNT_EQ_5 , SH_ACS_SCOM_RO ); +REG64( EX_SKITTER_DATA2 , RULL(0x2005001B), SH_UNT_EX , + SH_ACS_SCOM_RO ); //DUPS: 2105001B, +REG64( EX_0_SKITTER_DATA2 , RULL(0x2005001B), SH_UNT_EX_0 , + SH_ACS_SCOM_RO ); //DUPS: 2105001B, +REG64( EX_1_SKITTER_DATA2 , RULL(0x2205001B), SH_UNT_EX_1 , + SH_ACS_SCOM_RO ); //DUPS: 2305001B, +REG64( EX_2_SKITTER_DATA2 , RULL(0x2405001B), SH_UNT_EX_2 , + SH_ACS_SCOM_RO ); //DUPS: 2505001B, +REG64( EX_3_SKITTER_DATA2 , RULL(0x2605001B), SH_UNT_EX_3 , + SH_ACS_SCOM_RO ); //DUPS: 2705001B, +REG64( EX_4_SKITTER_DATA2 , RULL(0x2805001B), SH_UNT_EX_4 , + SH_ACS_SCOM_RO ); //DUPS: 2905001B, +REG64( EX_5_SKITTER_DATA2 , RULL(0x2A05001B), SH_UNT_EX_5 , + SH_ACS_SCOM_RO ); //DUPS: 2B05001B, +REG64( EX_6_SKITTER_DATA2 , RULL(0x2C05001B), SH_UNT_EX_6 , + SH_ACS_SCOM_RO ); //DUPS: 2D05001B, +REG64( EX_7_SKITTER_DATA2 , RULL(0x2E05001B), SH_UNT_EX_7 , + SH_ACS_SCOM_RO ); //DUPS: 2F05001B, +REG64( EX_8_SKITTER_DATA2 , RULL(0x3005001B), SH_UNT_EX_8 , + SH_ACS_SCOM_RO ); //DUPS: 3105001B, +REG64( EX_9_SKITTER_DATA2 , RULL(0x3205001B), SH_UNT_EX_9 , + SH_ACS_SCOM_RO ); //DUPS: 3305001B, +REG64( EX_10_SKITTER_DATA2 , RULL(0x3405001B), SH_UNT_EX_10 , + SH_ACS_SCOM_RO ); //DUPS: 3505001B, +REG64( EX_11_SKITTER_DATA2 , RULL(0x3605001B), SH_UNT_EX_11 , + SH_ACS_SCOM_RO ); //DUPS: 3705001B, + +REG64( C_SKITTER_FORCE_REG , RULL(0x20050014), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_SKITTER_FORCE_REG , RULL(0x20050014), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_SKITTER_FORCE_REG , RULL(0x21050014), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_SKITTER_FORCE_REG , RULL(0x22050014), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_SKITTER_FORCE_REG , RULL(0x23050014), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_SKITTER_FORCE_REG , RULL(0x24050014), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_SKITTER_FORCE_REG , RULL(0x25050014), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_SKITTER_FORCE_REG , RULL(0x26050014), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_SKITTER_FORCE_REG , RULL(0x27050014), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_SKITTER_FORCE_REG , RULL(0x28050014), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_SKITTER_FORCE_REG , RULL(0x29050014), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_SKITTER_FORCE_REG , RULL(0x2A050014), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_SKITTER_FORCE_REG , RULL(0x2B050014), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_SKITTER_FORCE_REG , RULL(0x2C050014), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_SKITTER_FORCE_REG , RULL(0x2D050014), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_SKITTER_FORCE_REG , RULL(0x2E050014), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_SKITTER_FORCE_REG , RULL(0x2F050014), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_SKITTER_FORCE_REG , RULL(0x30050014), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_SKITTER_FORCE_REG , RULL(0x31050014), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_SKITTER_FORCE_REG , RULL(0x32050014), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_SKITTER_FORCE_REG , RULL(0x33050014), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_SKITTER_FORCE_REG , RULL(0x34050014), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_SKITTER_FORCE_REG , RULL(0x35050014), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_SKITTER_FORCE_REG , RULL(0x36050014), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_SKITTER_FORCE_REG , RULL(0x37050014), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_SKITTER_FORCE_REG , RULL(0x10050014), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_SKITTER_FORCE_REG , RULL(0x10050014), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_SKITTER_FORCE_REG , RULL(0x11050014), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_SKITTER_FORCE_REG , RULL(0x12050014), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_SKITTER_FORCE_REG , RULL(0x13050014), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_SKITTER_FORCE_REG , RULL(0x14050014), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_SKITTER_FORCE_REG , RULL(0x15050014), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_SKITTER_FORCE_REG , RULL(0x20050014), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21050014, +REG64( EX_0_SKITTER_FORCE_REG , RULL(0x20050014), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21050014, +REG64( EX_1_SKITTER_FORCE_REG , RULL(0x22050014), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23050014, +REG64( EX_2_SKITTER_FORCE_REG , RULL(0x24050014), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25050014, +REG64( EX_3_SKITTER_FORCE_REG , RULL(0x26050014), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27050014, +REG64( EX_4_SKITTER_FORCE_REG , RULL(0x28050014), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29050014, +REG64( EX_5_SKITTER_FORCE_REG , RULL(0x2A050014), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B050014, +REG64( EX_6_SKITTER_FORCE_REG , RULL(0x2C050014), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D050014, +REG64( EX_7_SKITTER_FORCE_REG , RULL(0x2E050014), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F050014, +REG64( EX_8_SKITTER_FORCE_REG , RULL(0x30050014), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31050014, +REG64( EX_9_SKITTER_FORCE_REG , RULL(0x32050014), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33050014, +REG64( EX_10_SKITTER_FORCE_REG , RULL(0x34050014), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35050014, +REG64( EX_11_SKITTER_FORCE_REG , RULL(0x36050014), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37050014, + +REG64( C_SKITTER_MODE_REG , RULL(0x20050010), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_SKITTER_MODE_REG , RULL(0x20050010), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_SKITTER_MODE_REG , RULL(0x21050010), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_SKITTER_MODE_REG , RULL(0x22050010), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_SKITTER_MODE_REG , RULL(0x23050010), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_SKITTER_MODE_REG , RULL(0x24050010), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_SKITTER_MODE_REG , RULL(0x25050010), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_SKITTER_MODE_REG , RULL(0x26050010), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_SKITTER_MODE_REG , RULL(0x27050010), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_SKITTER_MODE_REG , RULL(0x28050010), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_SKITTER_MODE_REG , RULL(0x29050010), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_SKITTER_MODE_REG , RULL(0x2A050010), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_SKITTER_MODE_REG , RULL(0x2B050010), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_SKITTER_MODE_REG , RULL(0x2C050010), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_SKITTER_MODE_REG , RULL(0x2D050010), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_SKITTER_MODE_REG , RULL(0x2E050010), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_SKITTER_MODE_REG , RULL(0x2F050010), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_SKITTER_MODE_REG , RULL(0x30050010), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_SKITTER_MODE_REG , RULL(0x31050010), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_SKITTER_MODE_REG , RULL(0x32050010), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_SKITTER_MODE_REG , RULL(0x33050010), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_SKITTER_MODE_REG , RULL(0x34050010), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_SKITTER_MODE_REG , RULL(0x35050010), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_SKITTER_MODE_REG , RULL(0x36050010), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_SKITTER_MODE_REG , RULL(0x37050010), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_SKITTER_MODE_REG , RULL(0x10050010), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_SKITTER_MODE_REG , RULL(0x10050010), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_SKITTER_MODE_REG , RULL(0x11050010), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_SKITTER_MODE_REG , RULL(0x12050010), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_SKITTER_MODE_REG , RULL(0x13050010), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_SKITTER_MODE_REG , RULL(0x14050010), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_SKITTER_MODE_REG , RULL(0x15050010), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_SKITTER_MODE_REG , RULL(0x20050010), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21050010, +REG64( EX_0_SKITTER_MODE_REG , RULL(0x20050010), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21050010, +REG64( EX_1_SKITTER_MODE_REG , RULL(0x22050010), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23050010, +REG64( EX_2_SKITTER_MODE_REG , RULL(0x24050010), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25050010, +REG64( EX_3_SKITTER_MODE_REG , RULL(0x26050010), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27050010, +REG64( EX_4_SKITTER_MODE_REG , RULL(0x28050010), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29050010, +REG64( EX_5_SKITTER_MODE_REG , RULL(0x2A050010), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B050010, +REG64( EX_6_SKITTER_MODE_REG , RULL(0x2C050010), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D050010, +REG64( EX_7_SKITTER_MODE_REG , RULL(0x2E050010), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F050010, +REG64( EX_8_SKITTER_MODE_REG , RULL(0x30050010), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31050010, +REG64( EX_9_SKITTER_MODE_REG , RULL(0x32050010), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33050010, +REG64( EX_10_SKITTER_MODE_REG , RULL(0x34050010), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35050010, +REG64( EX_11_SKITTER_MODE_REG , RULL(0x36050010), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37050010, + +REG64( C_SLAVE_CONFIG_REG , RULL(0x200F001E), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_SLAVE_CONFIG_REG , RULL(0x200F001E), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_SLAVE_CONFIG_REG , RULL(0x210F001E), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_SLAVE_CONFIG_REG , RULL(0x220F001E), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_SLAVE_CONFIG_REG , RULL(0x230F001E), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_SLAVE_CONFIG_REG , RULL(0x240F001E), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_SLAVE_CONFIG_REG , RULL(0x250F001E), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_SLAVE_CONFIG_REG , RULL(0x260F001E), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_SLAVE_CONFIG_REG , RULL(0x270F001E), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_SLAVE_CONFIG_REG , RULL(0x280F001E), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_SLAVE_CONFIG_REG , RULL(0x290F001E), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_SLAVE_CONFIG_REG , RULL(0x2A0F001E), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_SLAVE_CONFIG_REG , RULL(0x2B0F001E), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_SLAVE_CONFIG_REG , RULL(0x2C0F001E), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_SLAVE_CONFIG_REG , RULL(0x2D0F001E), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_SLAVE_CONFIG_REG , RULL(0x2E0F001E), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_SLAVE_CONFIG_REG , RULL(0x2F0F001E), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_SLAVE_CONFIG_REG , RULL(0x300F001E), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_SLAVE_CONFIG_REG , RULL(0x310F001E), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_SLAVE_CONFIG_REG , RULL(0x320F001E), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_SLAVE_CONFIG_REG , RULL(0x330F001E), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_SLAVE_CONFIG_REG , RULL(0x340F001E), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_SLAVE_CONFIG_REG , RULL(0x350F001E), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_SLAVE_CONFIG_REG , RULL(0x360F001E), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_SLAVE_CONFIG_REG , RULL(0x370F001E), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_SLAVE_CONFIG_REG , RULL(0x100F001E), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_SLAVE_CONFIG_REG , RULL(0x100F001E), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_SLAVE_CONFIG_REG , RULL(0x110F001E), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_SLAVE_CONFIG_REG , RULL(0x120F001E), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_SLAVE_CONFIG_REG , RULL(0x130F001E), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_SLAVE_CONFIG_REG , RULL(0x140F001E), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_SLAVE_CONFIG_REG , RULL(0x150F001E), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_SLAVE_CONFIG_REG , RULL(0x200F001E), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F001E, +REG64( EX_0_SLAVE_CONFIG_REG , RULL(0x200F001E), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F001E, +REG64( EX_1_SLAVE_CONFIG_REG , RULL(0x230F001E), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F001E, +REG64( EX_2_SLAVE_CONFIG_REG , RULL(0x240F001E), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F001E, +REG64( EX_3_SLAVE_CONFIG_REG , RULL(0x260F001E), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F001E, +REG64( EX_4_SLAVE_CONFIG_REG , RULL(0x280F001E), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F001E, +REG64( EX_5_SLAVE_CONFIG_REG , RULL(0x2A0F001E), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F001E, +REG64( EX_6_SLAVE_CONFIG_REG , RULL(0x2C0F001E), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F001E, +REG64( EX_7_SLAVE_CONFIG_REG , RULL(0x2E0F001E), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F001E, +REG64( EX_8_SLAVE_CONFIG_REG , RULL(0x300F001E), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F001E, +REG64( EX_9_SLAVE_CONFIG_REG , RULL(0x320F001E), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F001E, +REG64( EX_10_SLAVE_CONFIG_REG , RULL(0x340F001E), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F001E, +REG64( EX_11_SLAVE_CONFIG_REG , RULL(0x360F001E), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F001E, + +REG64( C_SPATTN , RULL(0x20010A99), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_SPATTN_AND , RULL(0x20010A98), SH_UNT_C , SH_ACS_SCOM1_AND ); +REG64( C_SPATTN_OR , RULL(0x20010A97), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_SPATTN , RULL(0x20010A99), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_0_SPATTN_AND , RULL(0x20010A98), SH_UNT_C_0 , SH_ACS_SCOM1_AND ); +REG64( C_0_SPATTN_OR , RULL(0x20010A97), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_SPATTN , RULL(0x21010A99), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_1_SPATTN_AND , RULL(0x21010A98), SH_UNT_C_1 , SH_ACS_SCOM1_AND ); +REG64( C_1_SPATTN_OR , RULL(0x21010A97), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_SPATTN , RULL(0x22010A99), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_2_SPATTN_AND , RULL(0x22010A98), SH_UNT_C_2 , SH_ACS_SCOM1_AND ); +REG64( C_2_SPATTN_OR , RULL(0x22010A97), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_SPATTN , RULL(0x23010A99), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_3_SPATTN_AND , RULL(0x23010A98), SH_UNT_C_3 , SH_ACS_SCOM1_AND ); +REG64( C_3_SPATTN_OR , RULL(0x23010A97), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_SPATTN , RULL(0x24010A99), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_4_SPATTN_AND , RULL(0x24010A98), SH_UNT_C_4 , SH_ACS_SCOM1_AND ); +REG64( C_4_SPATTN_OR , RULL(0x24010A97), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_SPATTN , RULL(0x25010A99), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_5_SPATTN_AND , RULL(0x25010A98), SH_UNT_C_5 , SH_ACS_SCOM1_AND ); +REG64( C_5_SPATTN_OR , RULL(0x25010A97), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_SPATTN , RULL(0x26010A99), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_6_SPATTN_AND , RULL(0x26010A98), SH_UNT_C_6 , SH_ACS_SCOM1_AND ); +REG64( C_6_SPATTN_OR , RULL(0x26010A97), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_SPATTN , RULL(0x27010A99), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_7_SPATTN_AND , RULL(0x27010A98), SH_UNT_C_7 , SH_ACS_SCOM1_AND ); +REG64( C_7_SPATTN_OR , RULL(0x27010A97), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_SPATTN , RULL(0x28010A99), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_8_SPATTN_AND , RULL(0x28010A98), SH_UNT_C_8 , SH_ACS_SCOM1_AND ); +REG64( C_8_SPATTN_OR , RULL(0x28010A97), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_SPATTN , RULL(0x29010A99), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_9_SPATTN_AND , RULL(0x29010A98), SH_UNT_C_9 , SH_ACS_SCOM1_AND ); +REG64( C_9_SPATTN_OR , RULL(0x29010A97), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_SPATTN , RULL(0x2A010A99), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_10_SPATTN_AND , RULL(0x2A010A98), SH_UNT_C_10 , SH_ACS_SCOM1_AND ); +REG64( C_10_SPATTN_OR , RULL(0x2A010A97), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_SPATTN , RULL(0x2B010A99), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_11_SPATTN_AND , RULL(0x2B010A98), SH_UNT_C_11 , SH_ACS_SCOM1_AND ); +REG64( C_11_SPATTN_OR , RULL(0x2B010A97), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_SPATTN , RULL(0x2C010A99), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_12_SPATTN_AND , RULL(0x2C010A98), SH_UNT_C_12 , SH_ACS_SCOM1_AND ); +REG64( C_12_SPATTN_OR , RULL(0x2C010A97), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_SPATTN , RULL(0x2D010A99), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_13_SPATTN_AND , RULL(0x2D010A98), SH_UNT_C_13 , SH_ACS_SCOM1_AND ); +REG64( C_13_SPATTN_OR , RULL(0x2D010A97), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_SPATTN , RULL(0x2E010A99), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_14_SPATTN_AND , RULL(0x2E010A98), SH_UNT_C_14 , SH_ACS_SCOM1_AND ); +REG64( C_14_SPATTN_OR , RULL(0x2E010A97), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_SPATTN , RULL(0x2F010A99), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_15_SPATTN_AND , RULL(0x2F010A98), SH_UNT_C_15 , SH_ACS_SCOM1_AND ); +REG64( C_15_SPATTN_OR , RULL(0x2F010A97), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_SPATTN , RULL(0x30010A99), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_16_SPATTN_AND , RULL(0x30010A98), SH_UNT_C_16 , SH_ACS_SCOM1_AND ); +REG64( C_16_SPATTN_OR , RULL(0x30010A97), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_SPATTN , RULL(0x31010A99), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_17_SPATTN_AND , RULL(0x31010A98), SH_UNT_C_17 , SH_ACS_SCOM1_AND ); +REG64( C_17_SPATTN_OR , RULL(0x31010A97), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_SPATTN , RULL(0x32010A99), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_18_SPATTN_AND , RULL(0x32010A98), SH_UNT_C_18 , SH_ACS_SCOM1_AND ); +REG64( C_18_SPATTN_OR , RULL(0x32010A97), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_SPATTN , RULL(0x33010A99), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_19_SPATTN_AND , RULL(0x33010A98), SH_UNT_C_19 , SH_ACS_SCOM1_AND ); +REG64( C_19_SPATTN_OR , RULL(0x33010A97), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_SPATTN , RULL(0x34010A99), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_20_SPATTN_AND , RULL(0x34010A98), SH_UNT_C_20 , SH_ACS_SCOM1_AND ); +REG64( C_20_SPATTN_OR , RULL(0x34010A97), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_SPATTN , RULL(0x35010A99), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_21_SPATTN_AND , RULL(0x35010A98), SH_UNT_C_21 , SH_ACS_SCOM1_AND ); +REG64( C_21_SPATTN_OR , RULL(0x35010A97), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_SPATTN , RULL(0x36010A99), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_22_SPATTN_AND , RULL(0x36010A98), SH_UNT_C_22 , SH_ACS_SCOM1_AND ); +REG64( C_22_SPATTN_OR , RULL(0x36010A97), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_SPATTN , RULL(0x37010A99), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( C_23_SPATTN_AND , RULL(0x37010A98), SH_UNT_C_23 , SH_ACS_SCOM1_AND ); +REG64( C_23_SPATTN_OR , RULL(0x37010A97), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EX_SPATTN , RULL(0x21010A99), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 20010A99, +REG64( EX_SPATTN_AND , RULL(0x21010A98), SH_UNT_EX , + SH_ACS_SCOM1_AND ); //DUPS: 20010A98, +REG64( EX_0_SPATTN , RULL(0x21010A99), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 20010A99, +REG64( EX_0_SPATTN_AND , RULL(0x21010A98), SH_UNT_EX_0 , + SH_ACS_SCOM1_AND ); //DUPS: 20010A98, +REG64( EX_1_SPATTN , RULL(0x23010A99), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 22010A99, +REG64( EX_1_SPATTN_AND , RULL(0x23010A98), SH_UNT_EX_1 , + SH_ACS_SCOM1_AND ); //DUPS: 22010A98, +REG64( EX_2_SPATTN , RULL(0x25010A99), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 24010A99, +REG64( EX_2_SPATTN_AND , RULL(0x25010A98), SH_UNT_EX_2 , + SH_ACS_SCOM1_AND ); //DUPS: 24010A98, +REG64( EX_3_SPATTN , RULL(0x27010A99), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 26010A99, +REG64( EX_3_SPATTN_AND , RULL(0x27010A98), SH_UNT_EX_3 , + SH_ACS_SCOM1_AND ); //DUPS: 26010A98, +REG64( EX_4_SPATTN , RULL(0x29010A99), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 28010A99, +REG64( EX_4_SPATTN_AND , RULL(0x29010A98), SH_UNT_EX_4 , + SH_ACS_SCOM1_AND ); //DUPS: 28010A98, +REG64( EX_5_SPATTN , RULL(0x2B010A99), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2A010A99, +REG64( EX_5_SPATTN_AND , RULL(0x2B010A98), SH_UNT_EX_5 , + SH_ACS_SCOM1_AND ); //DUPS: 2A010A98, +REG64( EX_6_SPATTN , RULL(0x2D010A99), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2C010A99, +REG64( EX_6_SPATTN_AND , RULL(0x2D010A98), SH_UNT_EX_6 , + SH_ACS_SCOM1_AND ); //DUPS: 2C010A98, +REG64( EX_7_SPATTN , RULL(0x2F010A99), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2E010A99, +REG64( EX_7_SPATTN_AND , RULL(0x2F010A98), SH_UNT_EX_7 , + SH_ACS_SCOM1_AND ); //DUPS: 2E010A98, +REG64( EX_8_SPATTN , RULL(0x31010A99), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 30010A99, +REG64( EX_8_SPATTN_AND , RULL(0x31010A98), SH_UNT_EX_8 , + SH_ACS_SCOM1_AND ); //DUPS: 30010A98, +REG64( EX_9_SPATTN , RULL(0x33010A99), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 32010A99, +REG64( EX_9_SPATTN_AND , RULL(0x33010A98), SH_UNT_EX_9 , + SH_ACS_SCOM1_AND ); //DUPS: 32010A98, +REG64( EX_0_L2_SPATTN , RULL(0x21010A97), SH_UNT_EX_0_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 20010A97, +REG64( EX_10_SPATTN , RULL(0x35010A99), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 34010A99, +REG64( EX_10_SPATTN_AND , RULL(0x35010A98), SH_UNT_EX_10 , + SH_ACS_SCOM1_AND ); //DUPS: 34010A98, +REG64( EX_11_SPATTN , RULL(0x37010A99), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 36010A99, +REG64( EX_11_SPATTN_AND , RULL(0x37010A98), SH_UNT_EX_11 , + SH_ACS_SCOM1_AND ); //DUPS: 36010A98, +REG64( EX_10_L2_SPATTN , RULL(0x35010A97), SH_UNT_EX_10_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 34010A97, +REG64( EX_11_L2_SPATTN , RULL(0x37010A97), SH_UNT_EX_11_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 36010A97, +REG64( EX_1_L2_SPATTN , RULL(0x23010A97), SH_UNT_EX_1_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 22010A97, +REG64( EX_2_L2_SPATTN , RULL(0x25010A97), SH_UNT_EX_2_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 24010A97, +REG64( EX_3_L2_SPATTN , RULL(0x27010A97), SH_UNT_EX_3_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 26010A97, +REG64( EX_4_L2_SPATTN , RULL(0x29010A97), SH_UNT_EX_4_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 28010A97, +REG64( EX_5_L2_SPATTN , RULL(0x2B010A97), SH_UNT_EX_5_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 2A010A97, +REG64( EX_6_L2_SPATTN , RULL(0x2D010A97), SH_UNT_EX_6_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 2C010A97, +REG64( EX_7_L2_SPATTN , RULL(0x2F010A97), SH_UNT_EX_7_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 2E010A97, +REG64( EX_8_L2_SPATTN , RULL(0x31010A97), SH_UNT_EX_8_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 30010A97, +REG64( EX_9_L2_SPATTN , RULL(0x33010A97), SH_UNT_EX_9_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 32010A97, +REG64( EX_L2_SPATTN , RULL(0x21010A97), SH_UNT_EX_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 20010A97, + +REG64( C_SPATTN_MASK , RULL(0x20010A9A), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_SPATTN_MASK , RULL(0x20010A9A), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_SPATTN_MASK , RULL(0x21010A9A), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_SPATTN_MASK , RULL(0x22010A9A), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_SPATTN_MASK , RULL(0x23010A9A), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_SPATTN_MASK , RULL(0x24010A9A), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_SPATTN_MASK , RULL(0x25010A9A), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_SPATTN_MASK , RULL(0x26010A9A), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_SPATTN_MASK , RULL(0x27010A9A), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_SPATTN_MASK , RULL(0x28010A9A), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_SPATTN_MASK , RULL(0x29010A9A), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_SPATTN_MASK , RULL(0x2A010A9A), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_SPATTN_MASK , RULL(0x2B010A9A), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_SPATTN_MASK , RULL(0x2C010A9A), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_SPATTN_MASK , RULL(0x2D010A9A), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_SPATTN_MASK , RULL(0x2E010A9A), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_SPATTN_MASK , RULL(0x2F010A9A), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_SPATTN_MASK , RULL(0x30010A9A), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_SPATTN_MASK , RULL(0x31010A9A), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_SPATTN_MASK , RULL(0x32010A9A), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_SPATTN_MASK , RULL(0x33010A9A), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_SPATTN_MASK , RULL(0x34010A9A), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_SPATTN_MASK , RULL(0x35010A9A), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_SPATTN_MASK , RULL(0x36010A9A), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_SPATTN_MASK , RULL(0x37010A9A), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_0_L2_SPATTN_MASK , RULL(0x21010A9A), SH_UNT_EX_0_L2 , + SH_ACS_SCOM ); //DUPS: 20010A9A, +REG64( EX_10_L2_SPATTN_MASK , RULL(0x35010A9A), SH_UNT_EX_10_L2 , + SH_ACS_SCOM ); //DUPS: 34010A9A, +REG64( EX_11_L2_SPATTN_MASK , RULL(0x37010A9A), SH_UNT_EX_11_L2 , + SH_ACS_SCOM ); //DUPS: 36010A9A, +REG64( EX_1_L2_SPATTN_MASK , RULL(0x23010A9A), SH_UNT_EX_1_L2 , + SH_ACS_SCOM ); //DUPS: 22010A9A, +REG64( EX_2_L2_SPATTN_MASK , RULL(0x25010A9A), SH_UNT_EX_2_L2 , + SH_ACS_SCOM ); //DUPS: 24010A9A, +REG64( EX_3_L2_SPATTN_MASK , RULL(0x27010A9A), SH_UNT_EX_3_L2 , + SH_ACS_SCOM ); //DUPS: 26010A9A, +REG64( EX_4_L2_SPATTN_MASK , RULL(0x29010A9A), SH_UNT_EX_4_L2 , + SH_ACS_SCOM ); //DUPS: 28010A9A, +REG64( EX_5_L2_SPATTN_MASK , RULL(0x2B010A9A), SH_UNT_EX_5_L2 , + SH_ACS_SCOM ); //DUPS: 2A010A9A, +REG64( EX_6_L2_SPATTN_MASK , RULL(0x2D010A9A), SH_UNT_EX_6_L2 , + SH_ACS_SCOM ); //DUPS: 2C010A9A, +REG64( EX_7_L2_SPATTN_MASK , RULL(0x2F010A9A), SH_UNT_EX_7_L2 , + SH_ACS_SCOM ); //DUPS: 2E010A9A, +REG64( EX_8_L2_SPATTN_MASK , RULL(0x31010A9A), SH_UNT_EX_8_L2 , + SH_ACS_SCOM ); //DUPS: 30010A9A, +REG64( EX_9_L2_SPATTN_MASK , RULL(0x33010A9A), SH_UNT_EX_9_L2 , + SH_ACS_SCOM ); //DUPS: 32010A9A, +REG64( EX_L2_SPATTN_MASK , RULL(0x21010A9A), SH_UNT_EX_L2 , + SH_ACS_SCOM ); //DUPS: 20010A9A, + +REG64( C_SPR_HOLD_OUT , RULL(0x20010ABB), SH_UNT_C , SH_ACS_SCOM_RO ); +REG64( C_0_SPR_HOLD_OUT , RULL(0x20010ABB), SH_UNT_C_0 , SH_ACS_SCOM_RO ); +REG64( C_1_SPR_HOLD_OUT , RULL(0x21010ABB), SH_UNT_C_1 , SH_ACS_SCOM_RO ); +REG64( C_2_SPR_HOLD_OUT , RULL(0x22010ABB), SH_UNT_C_2 , SH_ACS_SCOM_RO ); +REG64( C_3_SPR_HOLD_OUT , RULL(0x23010ABB), SH_UNT_C_3 , SH_ACS_SCOM_RO ); +REG64( C_4_SPR_HOLD_OUT , RULL(0x24010ABB), SH_UNT_C_4 , SH_ACS_SCOM_RO ); +REG64( C_5_SPR_HOLD_OUT , RULL(0x25010ABB), SH_UNT_C_5 , SH_ACS_SCOM_RO ); +REG64( C_6_SPR_HOLD_OUT , RULL(0x26010ABB), SH_UNT_C_6 , SH_ACS_SCOM_RO ); +REG64( C_7_SPR_HOLD_OUT , RULL(0x27010ABB), SH_UNT_C_7 , SH_ACS_SCOM_RO ); +REG64( C_8_SPR_HOLD_OUT , RULL(0x28010ABB), SH_UNT_C_8 , SH_ACS_SCOM_RO ); +REG64( C_9_SPR_HOLD_OUT , RULL(0x29010ABB), SH_UNT_C_9 , SH_ACS_SCOM_RO ); +REG64( C_10_SPR_HOLD_OUT , RULL(0x2A010ABB), SH_UNT_C_10 , SH_ACS_SCOM_RO ); +REG64( C_11_SPR_HOLD_OUT , RULL(0x2B010ABB), SH_UNT_C_11 , SH_ACS_SCOM_RO ); +REG64( C_12_SPR_HOLD_OUT , RULL(0x2C010ABB), SH_UNT_C_12 , SH_ACS_SCOM_RO ); +REG64( C_13_SPR_HOLD_OUT , RULL(0x2D010ABB), SH_UNT_C_13 , SH_ACS_SCOM_RO ); +REG64( C_14_SPR_HOLD_OUT , RULL(0x2E010ABB), SH_UNT_C_14 , SH_ACS_SCOM_RO ); +REG64( C_15_SPR_HOLD_OUT , RULL(0x2F010ABB), SH_UNT_C_15 , SH_ACS_SCOM_RO ); +REG64( C_16_SPR_HOLD_OUT , RULL(0x30010ABB), SH_UNT_C_16 , SH_ACS_SCOM_RO ); +REG64( C_17_SPR_HOLD_OUT , RULL(0x31010ABB), SH_UNT_C_17 , SH_ACS_SCOM_RO ); +REG64( C_18_SPR_HOLD_OUT , RULL(0x32010ABB), SH_UNT_C_18 , SH_ACS_SCOM_RO ); +REG64( C_19_SPR_HOLD_OUT , RULL(0x33010ABB), SH_UNT_C_19 , SH_ACS_SCOM_RO ); +REG64( C_20_SPR_HOLD_OUT , RULL(0x34010ABB), SH_UNT_C_20 , SH_ACS_SCOM_RO ); +REG64( C_21_SPR_HOLD_OUT , RULL(0x35010ABB), SH_UNT_C_21 , SH_ACS_SCOM_RO ); +REG64( C_22_SPR_HOLD_OUT , RULL(0x36010ABB), SH_UNT_C_22 , SH_ACS_SCOM_RO ); +REG64( C_23_SPR_HOLD_OUT , RULL(0x37010ABB), SH_UNT_C_23 , SH_ACS_SCOM_RO ); +REG64( EX_0_L2_SPR_HOLD_OUT , RULL(0x20010ABB), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RO ); //DUPS: 21010ABB, +REG64( EX_10_L2_SPR_HOLD_OUT , RULL(0x34010ABB), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RO ); //DUPS: 35010ABB, +REG64( EX_11_L2_SPR_HOLD_OUT , RULL(0x36010ABB), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RO ); //DUPS: 37010ABB, +REG64( EX_1_L2_SPR_HOLD_OUT , RULL(0x22010ABB), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RO ); //DUPS: 23010ABB, +REG64( EX_2_L2_SPR_HOLD_OUT , RULL(0x24010ABB), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RO ); //DUPS: 25010ABB, +REG64( EX_3_L2_SPR_HOLD_OUT , RULL(0x26010ABB), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RO ); //DUPS: 27010ABB, +REG64( EX_4_L2_SPR_HOLD_OUT , RULL(0x28010ABB), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RO ); //DUPS: 29010ABB, +REG64( EX_5_L2_SPR_HOLD_OUT , RULL(0x2A010ABB), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RO ); //DUPS: 2B010ABB, +REG64( EX_6_L2_SPR_HOLD_OUT , RULL(0x2C010ABB), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RO ); //DUPS: 2D010ABB, +REG64( EX_7_L2_SPR_HOLD_OUT , RULL(0x2E010ABB), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RO ); //DUPS: 2F010ABB, +REG64( EX_8_L2_SPR_HOLD_OUT , RULL(0x30010ABB), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RO ); //DUPS: 31010ABB, +REG64( EX_9_L2_SPR_HOLD_OUT , RULL(0x32010ABB), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RO ); //DUPS: 33010ABB, +REG64( EX_L2_SPR_HOLD_OUT , RULL(0x20010ABB), SH_UNT_EX_L2 , + SH_ACS_SCOM_RO ); //DUPS: 21010ABB, + +REG64( C_SPR_MODE , RULL(0x20010A84), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_SPR_MODE , RULL(0x20010A84), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_SPR_MODE , RULL(0x21010A84), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_SPR_MODE , RULL(0x22010A84), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_SPR_MODE , RULL(0x23010A84), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_SPR_MODE , RULL(0x24010A84), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_SPR_MODE , RULL(0x25010A84), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_SPR_MODE , RULL(0x26010A84), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_SPR_MODE , RULL(0x27010A84), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_SPR_MODE , RULL(0x28010A84), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_SPR_MODE , RULL(0x29010A84), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_SPR_MODE , RULL(0x2A010A84), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_SPR_MODE , RULL(0x2B010A84), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_SPR_MODE , RULL(0x2C010A84), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_SPR_MODE , RULL(0x2D010A84), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_SPR_MODE , RULL(0x2E010A84), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_SPR_MODE , RULL(0x2F010A84), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_SPR_MODE , RULL(0x30010A84), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_SPR_MODE , RULL(0x31010A84), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_SPR_MODE , RULL(0x32010A84), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_SPR_MODE , RULL(0x33010A84), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_SPR_MODE , RULL(0x34010A84), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_SPR_MODE , RULL(0x35010A84), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_SPR_MODE , RULL(0x36010A84), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_SPR_MODE , RULL(0x37010A84), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_0_L2_SPR_MODE , RULL(0x21010A84), SH_UNT_EX_0_L2 , + SH_ACS_SCOM ); //DUPS: 20010A84, +REG64( EX_10_L2_SPR_MODE , RULL(0x35010A84), SH_UNT_EX_10_L2 , + SH_ACS_SCOM ); //DUPS: 34010A84, +REG64( EX_11_L2_SPR_MODE , RULL(0x37010A84), SH_UNT_EX_11_L2 , + SH_ACS_SCOM ); //DUPS: 36010A84, +REG64( EX_1_L2_SPR_MODE , RULL(0x23010A84), SH_UNT_EX_1_L2 , + SH_ACS_SCOM ); //DUPS: 22010A84, +REG64( EX_2_L2_SPR_MODE , RULL(0x25010A84), SH_UNT_EX_2_L2 , + SH_ACS_SCOM ); //DUPS: 24010A84, +REG64( EX_3_L2_SPR_MODE , RULL(0x27010A84), SH_UNT_EX_3_L2 , + SH_ACS_SCOM ); //DUPS: 26010A84, +REG64( EX_4_L2_SPR_MODE , RULL(0x29010A84), SH_UNT_EX_4_L2 , + SH_ACS_SCOM ); //DUPS: 28010A84, +REG64( EX_5_L2_SPR_MODE , RULL(0x2B010A84), SH_UNT_EX_5_L2 , + SH_ACS_SCOM ); //DUPS: 2A010A84, +REG64( EX_6_L2_SPR_MODE , RULL(0x2D010A84), SH_UNT_EX_6_L2 , + SH_ACS_SCOM ); //DUPS: 2C010A84, +REG64( EX_7_L2_SPR_MODE , RULL(0x2F010A84), SH_UNT_EX_7_L2 , + SH_ACS_SCOM ); //DUPS: 2E010A84, +REG64( EX_8_L2_SPR_MODE , RULL(0x31010A84), SH_UNT_EX_8_L2 , + SH_ACS_SCOM ); //DUPS: 30010A84, +REG64( EX_9_L2_SPR_MODE , RULL(0x33010A84), SH_UNT_EX_9_L2 , + SH_ACS_SCOM ); //DUPS: 32010A84, +REG64( EX_L2_SPR_MODE , RULL(0x21010A84), SH_UNT_EX_L2 , + SH_ACS_SCOM ); //DUPS: 20010A84, + +REG64( C_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2001081F), SH_UNT_C , SH_ACS_SCOM_RO ); +REG64( C_0_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2001081F), SH_UNT_C_0 , SH_ACS_SCOM_RO ); +REG64( C_1_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2101081F), SH_UNT_C_1 , SH_ACS_SCOM_RO ); +REG64( C_2_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2201081F), SH_UNT_C_2 , SH_ACS_SCOM_RO ); +REG64( C_3_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2301081F), SH_UNT_C_3 , SH_ACS_SCOM_RO ); +REG64( C_4_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2401081F), SH_UNT_C_4 , SH_ACS_SCOM_RO ); +REG64( C_5_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2501081F), SH_UNT_C_5 , SH_ACS_SCOM_RO ); +REG64( C_6_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2601081F), SH_UNT_C_6 , SH_ACS_SCOM_RO ); +REG64( C_7_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2701081F), SH_UNT_C_7 , SH_ACS_SCOM_RO ); +REG64( C_8_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2801081F), SH_UNT_C_8 , SH_ACS_SCOM_RO ); +REG64( C_9_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2901081F), SH_UNT_C_9 , SH_ACS_SCOM_RO ); +REG64( C_10_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2A01081F), SH_UNT_C_10 , SH_ACS_SCOM_RO ); +REG64( C_11_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2B01081F), SH_UNT_C_11 , SH_ACS_SCOM_RO ); +REG64( C_12_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2C01081F), SH_UNT_C_12 , SH_ACS_SCOM_RO ); +REG64( C_13_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2D01081F), SH_UNT_C_13 , SH_ACS_SCOM_RO ); +REG64( C_14_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2E01081F), SH_UNT_C_14 , SH_ACS_SCOM_RO ); +REG64( C_15_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2F01081F), SH_UNT_C_15 , SH_ACS_SCOM_RO ); +REG64( C_16_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x3001081F), SH_UNT_C_16 , SH_ACS_SCOM_RO ); +REG64( C_17_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x3101081F), SH_UNT_C_17 , SH_ACS_SCOM_RO ); +REG64( C_18_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x3201081F), SH_UNT_C_18 , SH_ACS_SCOM_RO ); +REG64( C_19_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x3301081F), SH_UNT_C_19 , SH_ACS_SCOM_RO ); +REG64( C_20_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x3401081F), SH_UNT_C_20 , SH_ACS_SCOM_RO ); +REG64( C_21_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x3501081F), SH_UNT_C_21 , SH_ACS_SCOM_RO ); +REG64( C_22_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x3601081F), SH_UNT_C_22 , SH_ACS_SCOM_RO ); +REG64( C_23_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x3701081F), SH_UNT_C_23 , SH_ACS_SCOM_RO ); +REG64( EX_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2101081F), SH_UNT_EX , + SH_ACS_SCOM_RO ); //DUPS: 2001081F, +REG64( EX_0_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2101081F), SH_UNT_EX_0 , + SH_ACS_SCOM_RO ); //DUPS: 2001081F, +REG64( EX_1_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2301081F), SH_UNT_EX_1 , + SH_ACS_SCOM_RO ); //DUPS: 2201081F, +REG64( EX_2_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2501081F), SH_UNT_EX_2 , + SH_ACS_SCOM_RO ); //DUPS: 2401081F, +REG64( EX_3_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2701081F), SH_UNT_EX_3 , + SH_ACS_SCOM_RO ); //DUPS: 2601081F, +REG64( EX_4_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2901081F), SH_UNT_EX_4 , + SH_ACS_SCOM_RO ); //DUPS: 2801081F, +REG64( EX_5_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2B01081F), SH_UNT_EX_5 , + SH_ACS_SCOM_RO ); //DUPS: 2A01081F, +REG64( EX_6_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2D01081F), SH_UNT_EX_6 , + SH_ACS_SCOM_RO ); //DUPS: 2C01081F, +REG64( EX_7_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x2F01081F), SH_UNT_EX_7 , + SH_ACS_SCOM_RO ); //DUPS: 2E01081F, +REG64( EX_8_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x3101081F), SH_UNT_EX_8 , + SH_ACS_SCOM_RO ); //DUPS: 3001081F, +REG64( EX_9_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x3301081F), SH_UNT_EX_9 , + SH_ACS_SCOM_RO ); //DUPS: 3201081F, +REG64( EX_10_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x3501081F), SH_UNT_EX_10 , + SH_ACS_SCOM_RO ); //DUPS: 3401081F, +REG64( EX_11_SPURR_FREQ_DETECT_CYC_CNT , RULL(0x3701081F), SH_UNT_EX_11 , + SH_ACS_SCOM_RO ); //DUPS: 3601081F, + +REG64( C_SPURR_FREQ_REF , RULL(0x20010AA1), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_SPURR_FREQ_REF , RULL(0x20010AA1), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_SPURR_FREQ_REF , RULL(0x21010AA1), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_SPURR_FREQ_REF , RULL(0x22010AA1), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_SPURR_FREQ_REF , RULL(0x23010AA1), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_SPURR_FREQ_REF , RULL(0x24010AA1), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_SPURR_FREQ_REF , RULL(0x25010AA1), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_SPURR_FREQ_REF , RULL(0x26010AA1), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_SPURR_FREQ_REF , RULL(0x27010AA1), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_SPURR_FREQ_REF , RULL(0x28010AA1), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_SPURR_FREQ_REF , RULL(0x29010AA1), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_SPURR_FREQ_REF , RULL(0x2A010AA1), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_SPURR_FREQ_REF , RULL(0x2B010AA1), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_SPURR_FREQ_REF , RULL(0x2C010AA1), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_SPURR_FREQ_REF , RULL(0x2D010AA1), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_SPURR_FREQ_REF , RULL(0x2E010AA1), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_SPURR_FREQ_REF , RULL(0x2F010AA1), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_SPURR_FREQ_REF , RULL(0x30010AA1), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_SPURR_FREQ_REF , RULL(0x31010AA1), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_SPURR_FREQ_REF , RULL(0x32010AA1), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_SPURR_FREQ_REF , RULL(0x33010AA1), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_SPURR_FREQ_REF , RULL(0x34010AA1), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_SPURR_FREQ_REF , RULL(0x35010AA1), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_SPURR_FREQ_REF , RULL(0x36010AA1), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_SPURR_FREQ_REF , RULL(0x37010AA1), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_SPURR_FREQ_REF , RULL(0x21010AA1), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RW ); //DUPS: 20010AA1, +REG64( EX_10_L2_SPURR_FREQ_REF , RULL(0x35010AA1), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RW ); //DUPS: 34010AA1, +REG64( EX_11_L2_SPURR_FREQ_REF , RULL(0x37010AA1), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RW ); //DUPS: 36010AA1, +REG64( EX_1_L2_SPURR_FREQ_REF , RULL(0x23010AA1), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RW ); //DUPS: 22010AA1, +REG64( EX_2_L2_SPURR_FREQ_REF , RULL(0x25010AA1), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RW ); //DUPS: 24010AA1, +REG64( EX_3_L2_SPURR_FREQ_REF , RULL(0x27010AA1), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RW ); //DUPS: 26010AA1, +REG64( EX_4_L2_SPURR_FREQ_REF , RULL(0x29010AA1), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RW ); //DUPS: 28010AA1, +REG64( EX_5_L2_SPURR_FREQ_REF , RULL(0x2B010AA1), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2A010AA1, +REG64( EX_6_L2_SPURR_FREQ_REF , RULL(0x2D010AA1), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2C010AA1, +REG64( EX_7_L2_SPURR_FREQ_REF , RULL(0x2F010AA1), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2E010AA1, +REG64( EX_8_L2_SPURR_FREQ_REF , RULL(0x31010AA1), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RW ); //DUPS: 30010AA1, +REG64( EX_9_L2_SPURR_FREQ_REF , RULL(0x33010AA1), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RW ); //DUPS: 32010AA1, +REG64( EX_L2_SPURR_FREQ_REF , RULL(0x21010AA1), SH_UNT_EX_L2 , + SH_ACS_SCOM_RW ); //DUPS: 20010AA1, + +REG64( C_SPURR_FREQ_SCALE , RULL(0x20010AA0), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_SPURR_FREQ_SCALE , RULL(0x20010AA0), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_SPURR_FREQ_SCALE , RULL(0x21010AA0), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_SPURR_FREQ_SCALE , RULL(0x22010AA0), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_SPURR_FREQ_SCALE , RULL(0x23010AA0), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_SPURR_FREQ_SCALE , RULL(0x24010AA0), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_SPURR_FREQ_SCALE , RULL(0x25010AA0), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_SPURR_FREQ_SCALE , RULL(0x26010AA0), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_SPURR_FREQ_SCALE , RULL(0x27010AA0), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_SPURR_FREQ_SCALE , RULL(0x28010AA0), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_SPURR_FREQ_SCALE , RULL(0x29010AA0), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_SPURR_FREQ_SCALE , RULL(0x2A010AA0), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_SPURR_FREQ_SCALE , RULL(0x2B010AA0), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_SPURR_FREQ_SCALE , RULL(0x2C010AA0), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_SPURR_FREQ_SCALE , RULL(0x2D010AA0), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_SPURR_FREQ_SCALE , RULL(0x2E010AA0), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_SPURR_FREQ_SCALE , RULL(0x2F010AA0), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_SPURR_FREQ_SCALE , RULL(0x30010AA0), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_SPURR_FREQ_SCALE , RULL(0x31010AA0), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_SPURR_FREQ_SCALE , RULL(0x32010AA0), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_SPURR_FREQ_SCALE , RULL(0x33010AA0), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_SPURR_FREQ_SCALE , RULL(0x34010AA0), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_SPURR_FREQ_SCALE , RULL(0x35010AA0), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_SPURR_FREQ_SCALE , RULL(0x36010AA0), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_SPURR_FREQ_SCALE , RULL(0x37010AA0), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_0_L2_SPURR_FREQ_SCALE , RULL(0x21010AA0), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RW ); //DUPS: 20010AA0, +REG64( EX_10_L2_SPURR_FREQ_SCALE , RULL(0x35010AA0), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RW ); //DUPS: 34010AA0, +REG64( EX_11_L2_SPURR_FREQ_SCALE , RULL(0x37010AA0), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RW ); //DUPS: 36010AA0, +REG64( EX_1_L2_SPURR_FREQ_SCALE , RULL(0x23010AA0), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RW ); //DUPS: 22010AA0, +REG64( EX_2_L2_SPURR_FREQ_SCALE , RULL(0x25010AA0), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RW ); //DUPS: 24010AA0, +REG64( EX_3_L2_SPURR_FREQ_SCALE , RULL(0x27010AA0), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RW ); //DUPS: 26010AA0, +REG64( EX_4_L2_SPURR_FREQ_SCALE , RULL(0x29010AA0), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RW ); //DUPS: 28010AA0, +REG64( EX_5_L2_SPURR_FREQ_SCALE , RULL(0x2B010AA0), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2A010AA0, +REG64( EX_6_L2_SPURR_FREQ_SCALE , RULL(0x2D010AA0), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2C010AA0, +REG64( EX_7_L2_SPURR_FREQ_SCALE , RULL(0x2F010AA0), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RW ); //DUPS: 2E010AA0, +REG64( EX_8_L2_SPURR_FREQ_SCALE , RULL(0x31010AA0), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RW ); //DUPS: 30010AA0, +REG64( EX_9_L2_SPURR_FREQ_SCALE , RULL(0x33010AA0), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RW ); //DUPS: 32010AA0, +REG64( EX_L2_SPURR_FREQ_SCALE , RULL(0x21010AA0), SH_UNT_EX_L2 , + SH_ACS_SCOM_RW ); //DUPS: 20010AA0, + +REG64( C_SRC_MASK , RULL(0x20010AAF), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_SRC_MASK , RULL(0x20010AAF), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_SRC_MASK , RULL(0x21010AAF), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_SRC_MASK , RULL(0x22010AAF), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_SRC_MASK , RULL(0x23010AAF), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_SRC_MASK , RULL(0x24010AAF), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_SRC_MASK , RULL(0x25010AAF), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_SRC_MASK , RULL(0x26010AAF), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_SRC_MASK , RULL(0x27010AAF), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_SRC_MASK , RULL(0x28010AAF), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_SRC_MASK , RULL(0x29010AAF), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_SRC_MASK , RULL(0x2A010AAF), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_SRC_MASK , RULL(0x2B010AAF), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_SRC_MASK , RULL(0x2C010AAF), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_SRC_MASK , RULL(0x2D010AAF), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_SRC_MASK , RULL(0x2E010AAF), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_SRC_MASK , RULL(0x2F010AAF), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_SRC_MASK , RULL(0x30010AAF), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_SRC_MASK , RULL(0x31010AAF), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_SRC_MASK , RULL(0x32010AAF), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_SRC_MASK , RULL(0x33010AAF), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_SRC_MASK , RULL(0x34010AAF), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_SRC_MASK , RULL(0x35010AAF), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_SRC_MASK , RULL(0x36010AAF), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_SRC_MASK , RULL(0x37010AAF), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_SRC_MASK , RULL(0x20010AAF), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21010AAF, +REG64( EX_0_SRC_MASK , RULL(0x20010AAF), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21010AAF, +REG64( EX_1_SRC_MASK , RULL(0x22010AAF), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23010AAF, +REG64( EX_2_SRC_MASK , RULL(0x24010AAF), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25010AAF, +REG64( EX_3_SRC_MASK , RULL(0x26010AAF), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27010AAF, +REG64( EX_4_SRC_MASK , RULL(0x28010AAF), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29010AAF, +REG64( EX_5_SRC_MASK , RULL(0x2A010AAF), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B010AAF, +REG64( EX_6_SRC_MASK , RULL(0x2C010AAF), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D010AAF, +REG64( EX_7_SRC_MASK , RULL(0x2E010AAF), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F010AAF, +REG64( EX_8_SRC_MASK , RULL(0x30010AAF), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31010AAF, +REG64( EX_9_SRC_MASK , RULL(0x32010AAF), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33010AAF, +REG64( EX_10_SRC_MASK , RULL(0x34010AAF), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35010AAF, +REG64( EX_11_SRC_MASK , RULL(0x36010AAF), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37010AAF, + +REG64( C_SUM_MASK_REG , RULL(0x20040017), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_SUM_MASK_REG , RULL(0x20040017), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_SUM_MASK_REG , RULL(0x21040017), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_SUM_MASK_REG , RULL(0x22040017), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_SUM_MASK_REG , RULL(0x23040017), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_SUM_MASK_REG , RULL(0x24040017), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_SUM_MASK_REG , RULL(0x25040017), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_SUM_MASK_REG , RULL(0x26040017), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_SUM_MASK_REG , RULL(0x27040017), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_SUM_MASK_REG , RULL(0x28040017), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_SUM_MASK_REG , RULL(0x29040017), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_SUM_MASK_REG , RULL(0x2A040017), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_SUM_MASK_REG , RULL(0x2B040017), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_SUM_MASK_REG , RULL(0x2C040017), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_SUM_MASK_REG , RULL(0x2D040017), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_SUM_MASK_REG , RULL(0x2E040017), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_SUM_MASK_REG , RULL(0x2F040017), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_SUM_MASK_REG , RULL(0x30040017), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_SUM_MASK_REG , RULL(0x31040017), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_SUM_MASK_REG , RULL(0x32040017), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_SUM_MASK_REG , RULL(0x33040017), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_SUM_MASK_REG , RULL(0x34040017), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_SUM_MASK_REG , RULL(0x35040017), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_SUM_MASK_REG , RULL(0x36040017), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_SUM_MASK_REG , RULL(0x37040017), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_SUM_MASK_REG , RULL(0x10040017), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_SUM_MASK_REG , RULL(0x10040017), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_SUM_MASK_REG , RULL(0x11040017), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_SUM_MASK_REG , RULL(0x12040017), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_SUM_MASK_REG , RULL(0x13040017), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_SUM_MASK_REG , RULL(0x14040017), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_SUM_MASK_REG , RULL(0x15040017), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_SUM_MASK_REG , RULL(0x20040017), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21040017, +REG64( EX_0_SUM_MASK_REG , RULL(0x20040017), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21040017, +REG64( EX_1_SUM_MASK_REG , RULL(0x22040017), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23040017, +REG64( EX_2_SUM_MASK_REG , RULL(0x24040017), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25040017, +REG64( EX_3_SUM_MASK_REG , RULL(0x26040017), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27040017, +REG64( EX_4_SUM_MASK_REG , RULL(0x28040017), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29040017, +REG64( EX_5_SUM_MASK_REG , RULL(0x2A040017), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B040017, +REG64( EX_6_SUM_MASK_REG , RULL(0x2C040017), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D040017, +REG64( EX_7_SUM_MASK_REG , RULL(0x2E040017), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F040017, +REG64( EX_8_SUM_MASK_REG , RULL(0x30040017), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31040017, +REG64( EX_9_SUM_MASK_REG , RULL(0x32040017), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33040017, +REG64( EX_10_SUM_MASK_REG , RULL(0x34040017), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35040017, +REG64( EX_11_SUM_MASK_REG , RULL(0x36040017), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37040017, + +REG64( C_SYNC_CONFIG , RULL(0x20030000), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_SYNC_CONFIG , RULL(0x20030000), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_SYNC_CONFIG , RULL(0x21030000), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_SYNC_CONFIG , RULL(0x22030000), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_SYNC_CONFIG , RULL(0x23030000), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_SYNC_CONFIG , RULL(0x24030000), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_SYNC_CONFIG , RULL(0x25030000), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_SYNC_CONFIG , RULL(0x26030000), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_SYNC_CONFIG , RULL(0x27030000), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_SYNC_CONFIG , RULL(0x28030000), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_SYNC_CONFIG , RULL(0x29030000), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_SYNC_CONFIG , RULL(0x2A030000), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_SYNC_CONFIG , RULL(0x2B030000), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_SYNC_CONFIG , RULL(0x2C030000), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_SYNC_CONFIG , RULL(0x2D030000), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_SYNC_CONFIG , RULL(0x2E030000), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_SYNC_CONFIG , RULL(0x2F030000), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_SYNC_CONFIG , RULL(0x30030000), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_SYNC_CONFIG , RULL(0x31030000), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_SYNC_CONFIG , RULL(0x32030000), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_SYNC_CONFIG , RULL(0x33030000), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_SYNC_CONFIG , RULL(0x34030000), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_SYNC_CONFIG , RULL(0x35030000), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_SYNC_CONFIG , RULL(0x36030000), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_SYNC_CONFIG , RULL(0x37030000), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_SYNC_CONFIG , RULL(0x10030000), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_SYNC_CONFIG , RULL(0x10030000), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_SYNC_CONFIG , RULL(0x11030000), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_SYNC_CONFIG , RULL(0x12030000), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_SYNC_CONFIG , RULL(0x13030000), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_SYNC_CONFIG , RULL(0x14030000), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_SYNC_CONFIG , RULL(0x15030000), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_SYNC_CONFIG , RULL(0x20030000), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 21030000, +REG64( EX_0_SYNC_CONFIG , RULL(0x20030000), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 21030000, +REG64( EX_1_SYNC_CONFIG , RULL(0x22030000), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 23030000, +REG64( EX_2_SYNC_CONFIG , RULL(0x24030000), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 25030000, +REG64( EX_3_SYNC_CONFIG , RULL(0x26030000), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 27030000, +REG64( EX_4_SYNC_CONFIG , RULL(0x28030000), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 29030000, +REG64( EX_5_SYNC_CONFIG , RULL(0x2A030000), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B030000, +REG64( EX_6_SYNC_CONFIG , RULL(0x2C030000), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D030000, +REG64( EX_7_SYNC_CONFIG , RULL(0x2E030000), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F030000, +REG64( EX_8_SYNC_CONFIG , RULL(0x30030000), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 31030000, +REG64( EX_9_SYNC_CONFIG , RULL(0x32030000), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 33030000, +REG64( EX_10_SYNC_CONFIG , RULL(0x34030000), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 35030000, +REG64( EX_11_SYNC_CONFIG , RULL(0x36030000), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 37030000, + +REG64( CAPP_TFMR , RULL(0x02010827), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_TFMR , RULL(0x02010827), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_TFMR , RULL(0x04010827), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( C_THERM_MODE_REG , RULL(0x2005000F), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_THERM_MODE_REG , RULL(0x2005000F), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_THERM_MODE_REG , RULL(0x2105000F), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_THERM_MODE_REG , RULL(0x2205000F), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_THERM_MODE_REG , RULL(0x2305000F), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_THERM_MODE_REG , RULL(0x2405000F), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_THERM_MODE_REG , RULL(0x2505000F), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_THERM_MODE_REG , RULL(0x2605000F), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_THERM_MODE_REG , RULL(0x2705000F), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_THERM_MODE_REG , RULL(0x2805000F), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_THERM_MODE_REG , RULL(0x2905000F), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_THERM_MODE_REG , RULL(0x2A05000F), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_THERM_MODE_REG , RULL(0x2B05000F), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_THERM_MODE_REG , RULL(0x2C05000F), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_THERM_MODE_REG , RULL(0x2D05000F), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_THERM_MODE_REG , RULL(0x2E05000F), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_THERM_MODE_REG , RULL(0x2F05000F), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_THERM_MODE_REG , RULL(0x3005000F), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_THERM_MODE_REG , RULL(0x3105000F), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_THERM_MODE_REG , RULL(0x3205000F), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_THERM_MODE_REG , RULL(0x3305000F), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_THERM_MODE_REG , RULL(0x3405000F), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_THERM_MODE_REG , RULL(0x3505000F), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_THERM_MODE_REG , RULL(0x3605000F), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_THERM_MODE_REG , RULL(0x3705000F), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_THERM_MODE_REG , RULL(0x1005000F), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_THERM_MODE_REG , RULL(0x1005000F), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_THERM_MODE_REG , RULL(0x1105000F), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_THERM_MODE_REG , RULL(0x1205000F), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_THERM_MODE_REG , RULL(0x1305000F), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_THERM_MODE_REG , RULL(0x1405000F), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_THERM_MODE_REG , RULL(0x1505000F), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_THERM_MODE_REG , RULL(0x2005000F), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 2105000F, +REG64( EX_0_THERM_MODE_REG , RULL(0x2005000F), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 2105000F, +REG64( EX_1_THERM_MODE_REG , RULL(0x2205000F), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 2305000F, +REG64( EX_2_THERM_MODE_REG , RULL(0x2405000F), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 2505000F, +REG64( EX_3_THERM_MODE_REG , RULL(0x2605000F), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 2705000F, +REG64( EX_4_THERM_MODE_REG , RULL(0x2805000F), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 2905000F, +REG64( EX_5_THERM_MODE_REG , RULL(0x2A05000F), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B05000F, +REG64( EX_6_THERM_MODE_REG , RULL(0x2C05000F), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D05000F, +REG64( EX_7_THERM_MODE_REG , RULL(0x2E05000F), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F05000F, +REG64( EX_8_THERM_MODE_REG , RULL(0x3005000F), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 3105000F, +REG64( EX_9_THERM_MODE_REG , RULL(0x3205000F), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 3305000F, +REG64( EX_10_THERM_MODE_REG , RULL(0x3405000F), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 3505000F, +REG64( EX_11_THERM_MODE_REG , RULL(0x3605000F), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 3705000F, + +REG64( C_THREAD_INFO , RULL(0x20010A9B), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_THREAD_INFO , RULL(0x20010A9B), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_THREAD_INFO , RULL(0x21010A9B), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_THREAD_INFO , RULL(0x22010A9B), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_THREAD_INFO , RULL(0x23010A9B), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_THREAD_INFO , RULL(0x24010A9B), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_THREAD_INFO , RULL(0x25010A9B), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_THREAD_INFO , RULL(0x26010A9B), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_THREAD_INFO , RULL(0x27010A9B), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_THREAD_INFO , RULL(0x28010A9B), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_THREAD_INFO , RULL(0x29010A9B), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_THREAD_INFO , RULL(0x2A010A9B), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_THREAD_INFO , RULL(0x2B010A9B), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_THREAD_INFO , RULL(0x2C010A9B), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_THREAD_INFO , RULL(0x2D010A9B), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_THREAD_INFO , RULL(0x2E010A9B), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_THREAD_INFO , RULL(0x2F010A9B), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_THREAD_INFO , RULL(0x30010A9B), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_THREAD_INFO , RULL(0x31010A9B), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_THREAD_INFO , RULL(0x32010A9B), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_THREAD_INFO , RULL(0x33010A9B), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_THREAD_INFO , RULL(0x34010A9B), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_THREAD_INFO , RULL(0x35010A9B), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_THREAD_INFO , RULL(0x36010A9B), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_THREAD_INFO , RULL(0x37010A9B), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EX_0_L2_THREAD_INFO , RULL(0x21010A9B), SH_UNT_EX_0_L2 , + SH_ACS_SCOM ); //DUPS: 20010A9B, +REG64( EX_10_L2_THREAD_INFO , RULL(0x35010A9B), SH_UNT_EX_10_L2 , + SH_ACS_SCOM ); //DUPS: 34010A9B, +REG64( EX_11_L2_THREAD_INFO , RULL(0x37010A9B), SH_UNT_EX_11_L2 , + SH_ACS_SCOM ); //DUPS: 36010A9B, +REG64( EX_1_L2_THREAD_INFO , RULL(0x23010A9B), SH_UNT_EX_1_L2 , + SH_ACS_SCOM ); //DUPS: 22010A9B, +REG64( EX_2_L2_THREAD_INFO , RULL(0x25010A9B), SH_UNT_EX_2_L2 , + SH_ACS_SCOM ); //DUPS: 24010A9B, +REG64( EX_3_L2_THREAD_INFO , RULL(0x27010A9B), SH_UNT_EX_3_L2 , + SH_ACS_SCOM ); //DUPS: 26010A9B, +REG64( EX_4_L2_THREAD_INFO , RULL(0x29010A9B), SH_UNT_EX_4_L2 , + SH_ACS_SCOM ); //DUPS: 28010A9B, +REG64( EX_5_L2_THREAD_INFO , RULL(0x2B010A9B), SH_UNT_EX_5_L2 , + SH_ACS_SCOM ); //DUPS: 2A010A9B, +REG64( EX_6_L2_THREAD_INFO , RULL(0x2D010A9B), SH_UNT_EX_6_L2 , + SH_ACS_SCOM ); //DUPS: 2C010A9B, +REG64( EX_7_L2_THREAD_INFO , RULL(0x2F010A9B), SH_UNT_EX_7_L2 , + SH_ACS_SCOM ); //DUPS: 2E010A9B, +REG64( EX_8_L2_THREAD_INFO , RULL(0x31010A9B), SH_UNT_EX_8_L2 , + SH_ACS_SCOM ); //DUPS: 30010A9B, +REG64( EX_9_L2_THREAD_INFO , RULL(0x33010A9B), SH_UNT_EX_9_L2 , + SH_ACS_SCOM ); //DUPS: 32010A9B, +REG64( EX_L2_THREAD_INFO , RULL(0x21010A9B), SH_UNT_EX_L2 , + SH_ACS_SCOM ); //DUPS: 20010A9B, + +REG64( C_TIMEOUT_REG , RULL(0x200F0010), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_TIMEOUT_REG , RULL(0x200F0010), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_TIMEOUT_REG , RULL(0x210F0010), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_TIMEOUT_REG , RULL(0x220F0010), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_TIMEOUT_REG , RULL(0x230F0010), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_TIMEOUT_REG , RULL(0x240F0010), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_TIMEOUT_REG , RULL(0x250F0010), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_TIMEOUT_REG , RULL(0x260F0010), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_TIMEOUT_REG , RULL(0x270F0010), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_TIMEOUT_REG , RULL(0x280F0010), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_TIMEOUT_REG , RULL(0x290F0010), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_TIMEOUT_REG , RULL(0x2A0F0010), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_TIMEOUT_REG , RULL(0x2B0F0010), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_TIMEOUT_REG , RULL(0x2C0F0010), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_TIMEOUT_REG , RULL(0x2D0F0010), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_TIMEOUT_REG , RULL(0x2E0F0010), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_TIMEOUT_REG , RULL(0x2F0F0010), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_TIMEOUT_REG , RULL(0x300F0010), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_TIMEOUT_REG , RULL(0x310F0010), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_TIMEOUT_REG , RULL(0x320F0010), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_TIMEOUT_REG , RULL(0x330F0010), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_TIMEOUT_REG , RULL(0x340F0010), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_TIMEOUT_REG , RULL(0x350F0010), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_TIMEOUT_REG , RULL(0x360F0010), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_TIMEOUT_REG , RULL(0x370F0010), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_TIMEOUT_REG , RULL(0x100F0010), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_TIMEOUT_REG , RULL(0x100F0010), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_TIMEOUT_REG , RULL(0x110F0010), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_TIMEOUT_REG , RULL(0x120F0010), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_TIMEOUT_REG , RULL(0x130F0010), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_TIMEOUT_REG , RULL(0x140F0010), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_TIMEOUT_REG , RULL(0x150F0010), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_TIMEOUT_REG , RULL(0x200F0010), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F0010, +REG64( EX_0_TIMEOUT_REG , RULL(0x200F0010), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F0010, +REG64( EX_1_TIMEOUT_REG , RULL(0x230F0010), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F0010, +REG64( EX_2_TIMEOUT_REG , RULL(0x240F0010), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F0010, +REG64( EX_3_TIMEOUT_REG , RULL(0x260F0010), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F0010, +REG64( EX_4_TIMEOUT_REG , RULL(0x280F0010), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F0010, +REG64( EX_5_TIMEOUT_REG , RULL(0x2A0F0010), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F0010, +REG64( EX_6_TIMEOUT_REG , RULL(0x2C0F0010), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F0010, +REG64( EX_7_TIMEOUT_REG , RULL(0x2E0F0010), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F0010, +REG64( EX_8_TIMEOUT_REG , RULL(0x300F0010), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F0010, +REG64( EX_9_TIMEOUT_REG , RULL(0x320F0010), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F0010, +REG64( EX_10_TIMEOUT_REG , RULL(0x340F0010), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F0010, +REG64( EX_11_TIMEOUT_REG , RULL(0x360F0010), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F0010, + +REG64( C_TIMESTAMP_COUNTER_READ , RULL(0x2005001C), SH_UNT_C , SH_ACS_SCOM_RO ); +REG64( C_0_TIMESTAMP_COUNTER_READ , RULL(0x2005001C), SH_UNT_C_0 , SH_ACS_SCOM_RO ); +REG64( C_1_TIMESTAMP_COUNTER_READ , RULL(0x2105001C), SH_UNT_C_1 , SH_ACS_SCOM_RO ); +REG64( C_2_TIMESTAMP_COUNTER_READ , RULL(0x2205001C), SH_UNT_C_2 , SH_ACS_SCOM_RO ); +REG64( C_3_TIMESTAMP_COUNTER_READ , RULL(0x2305001C), SH_UNT_C_3 , SH_ACS_SCOM_RO ); +REG64( C_4_TIMESTAMP_COUNTER_READ , RULL(0x2405001C), SH_UNT_C_4 , SH_ACS_SCOM_RO ); +REG64( C_5_TIMESTAMP_COUNTER_READ , RULL(0x2505001C), SH_UNT_C_5 , SH_ACS_SCOM_RO ); +REG64( C_6_TIMESTAMP_COUNTER_READ , RULL(0x2605001C), SH_UNT_C_6 , SH_ACS_SCOM_RO ); +REG64( C_7_TIMESTAMP_COUNTER_READ , RULL(0x2705001C), SH_UNT_C_7 , SH_ACS_SCOM_RO ); +REG64( C_8_TIMESTAMP_COUNTER_READ , RULL(0x2805001C), SH_UNT_C_8 , SH_ACS_SCOM_RO ); +REG64( C_9_TIMESTAMP_COUNTER_READ , RULL(0x2905001C), SH_UNT_C_9 , SH_ACS_SCOM_RO ); +REG64( C_10_TIMESTAMP_COUNTER_READ , RULL(0x2A05001C), SH_UNT_C_10 , SH_ACS_SCOM_RO ); +REG64( C_11_TIMESTAMP_COUNTER_READ , RULL(0x2B05001C), SH_UNT_C_11 , SH_ACS_SCOM_RO ); +REG64( C_12_TIMESTAMP_COUNTER_READ , RULL(0x2C05001C), SH_UNT_C_12 , SH_ACS_SCOM_RO ); +REG64( C_13_TIMESTAMP_COUNTER_READ , RULL(0x2D05001C), SH_UNT_C_13 , SH_ACS_SCOM_RO ); +REG64( C_14_TIMESTAMP_COUNTER_READ , RULL(0x2E05001C), SH_UNT_C_14 , SH_ACS_SCOM_RO ); +REG64( C_15_TIMESTAMP_COUNTER_READ , RULL(0x2F05001C), SH_UNT_C_15 , SH_ACS_SCOM_RO ); +REG64( C_16_TIMESTAMP_COUNTER_READ , RULL(0x3005001C), SH_UNT_C_16 , SH_ACS_SCOM_RO ); +REG64( C_17_TIMESTAMP_COUNTER_READ , RULL(0x3105001C), SH_UNT_C_17 , SH_ACS_SCOM_RO ); +REG64( C_18_TIMESTAMP_COUNTER_READ , RULL(0x3205001C), SH_UNT_C_18 , SH_ACS_SCOM_RO ); +REG64( C_19_TIMESTAMP_COUNTER_READ , RULL(0x3305001C), SH_UNT_C_19 , SH_ACS_SCOM_RO ); +REG64( C_20_TIMESTAMP_COUNTER_READ , RULL(0x3405001C), SH_UNT_C_20 , SH_ACS_SCOM_RO ); +REG64( C_21_TIMESTAMP_COUNTER_READ , RULL(0x3505001C), SH_UNT_C_21 , SH_ACS_SCOM_RO ); +REG64( C_22_TIMESTAMP_COUNTER_READ , RULL(0x3605001C), SH_UNT_C_22 , SH_ACS_SCOM_RO ); +REG64( C_23_TIMESTAMP_COUNTER_READ , RULL(0x3705001C), SH_UNT_C_23 , SH_ACS_SCOM_RO ); +REG64( EQ_TIMESTAMP_COUNTER_READ , RULL(0x1005001C), SH_UNT_EQ , SH_ACS_SCOM_RO ); +REG64( EQ_0_TIMESTAMP_COUNTER_READ , RULL(0x1005001C), SH_UNT_EQ_0 , SH_ACS_SCOM_RO ); +REG64( EQ_1_TIMESTAMP_COUNTER_READ , RULL(0x1105001C), SH_UNT_EQ_1 , SH_ACS_SCOM_RO ); +REG64( EQ_2_TIMESTAMP_COUNTER_READ , RULL(0x1205001C), SH_UNT_EQ_2 , SH_ACS_SCOM_RO ); +REG64( EQ_3_TIMESTAMP_COUNTER_READ , RULL(0x1305001C), SH_UNT_EQ_3 , SH_ACS_SCOM_RO ); +REG64( EQ_4_TIMESTAMP_COUNTER_READ , RULL(0x1405001C), SH_UNT_EQ_4 , SH_ACS_SCOM_RO ); +REG64( EQ_5_TIMESTAMP_COUNTER_READ , RULL(0x1505001C), SH_UNT_EQ_5 , SH_ACS_SCOM_RO ); +REG64( EX_TIMESTAMP_COUNTER_READ , RULL(0x2005001C), SH_UNT_EX , + SH_ACS_SCOM_RO ); //DUPS: 2105001C, +REG64( EX_0_TIMESTAMP_COUNTER_READ , RULL(0x2005001C), SH_UNT_EX_0 , + SH_ACS_SCOM_RO ); //DUPS: 2105001C, +REG64( EX_1_TIMESTAMP_COUNTER_READ , RULL(0x2205001C), SH_UNT_EX_1 , + SH_ACS_SCOM_RO ); //DUPS: 2305001C, +REG64( EX_2_TIMESTAMP_COUNTER_READ , RULL(0x2405001C), SH_UNT_EX_2 , + SH_ACS_SCOM_RO ); //DUPS: 2505001C, +REG64( EX_3_TIMESTAMP_COUNTER_READ , RULL(0x2605001C), SH_UNT_EX_3 , + SH_ACS_SCOM_RO ); //DUPS: 2705001C, +REG64( EX_4_TIMESTAMP_COUNTER_READ , RULL(0x2805001C), SH_UNT_EX_4 , + SH_ACS_SCOM_RO ); //DUPS: 2905001C, +REG64( EX_5_TIMESTAMP_COUNTER_READ , RULL(0x2A05001C), SH_UNT_EX_5 , + SH_ACS_SCOM_RO ); //DUPS: 2B05001C, +REG64( EX_6_TIMESTAMP_COUNTER_READ , RULL(0x2C05001C), SH_UNT_EX_6 , + SH_ACS_SCOM_RO ); //DUPS: 2D05001C, +REG64( EX_7_TIMESTAMP_COUNTER_READ , RULL(0x2E05001C), SH_UNT_EX_7 , + SH_ACS_SCOM_RO ); //DUPS: 2F05001C, +REG64( EX_8_TIMESTAMP_COUNTER_READ , RULL(0x3005001C), SH_UNT_EX_8 , + SH_ACS_SCOM_RO ); //DUPS: 3105001C, +REG64( EX_9_TIMESTAMP_COUNTER_READ , RULL(0x3205001C), SH_UNT_EX_9 , + SH_ACS_SCOM_RO ); //DUPS: 3305001C, +REG64( EX_10_TIMESTAMP_COUNTER_READ , RULL(0x3405001C), SH_UNT_EX_10 , + SH_ACS_SCOM_RO ); //DUPS: 3505001C, +REG64( EX_11_TIMESTAMP_COUNTER_READ , RULL(0x3605001C), SH_UNT_EX_11 , + SH_ACS_SCOM_RO ); //DUPS: 3705001C, + +REG64( CAPP_TLBI_ERROR_REPORT , RULL(0x0201080D), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_TLBI_ERROR_REPORT , RULL(0x0201080D), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_TLBI_ERROR_REPORT , RULL(0x0401080D), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( C_TOD_READ , RULL(0x20010AA3), SH_UNT_C , SH_ACS_SCOM_RO ); +REG64( C_0_TOD_READ , RULL(0x20010AA3), SH_UNT_C_0 , SH_ACS_SCOM_RO ); +REG64( C_1_TOD_READ , RULL(0x21010AA3), SH_UNT_C_1 , SH_ACS_SCOM_RO ); +REG64( C_2_TOD_READ , RULL(0x22010AA3), SH_UNT_C_2 , SH_ACS_SCOM_RO ); +REG64( C_3_TOD_READ , RULL(0x23010AA3), SH_UNT_C_3 , SH_ACS_SCOM_RO ); +REG64( C_4_TOD_READ , RULL(0x24010AA3), SH_UNT_C_4 , SH_ACS_SCOM_RO ); +REG64( C_5_TOD_READ , RULL(0x25010AA3), SH_UNT_C_5 , SH_ACS_SCOM_RO ); +REG64( C_6_TOD_READ , RULL(0x26010AA3), SH_UNT_C_6 , SH_ACS_SCOM_RO ); +REG64( C_7_TOD_READ , RULL(0x27010AA3), SH_UNT_C_7 , SH_ACS_SCOM_RO ); +REG64( C_8_TOD_READ , RULL(0x28010AA3), SH_UNT_C_8 , SH_ACS_SCOM_RO ); +REG64( C_9_TOD_READ , RULL(0x29010AA3), SH_UNT_C_9 , SH_ACS_SCOM_RO ); +REG64( C_10_TOD_READ , RULL(0x2A010AA3), SH_UNT_C_10 , SH_ACS_SCOM_RO ); +REG64( C_11_TOD_READ , RULL(0x2B010AA3), SH_UNT_C_11 , SH_ACS_SCOM_RO ); +REG64( C_12_TOD_READ , RULL(0x2C010AA3), SH_UNT_C_12 , SH_ACS_SCOM_RO ); +REG64( C_13_TOD_READ , RULL(0x2D010AA3), SH_UNT_C_13 , SH_ACS_SCOM_RO ); +REG64( C_14_TOD_READ , RULL(0x2E010AA3), SH_UNT_C_14 , SH_ACS_SCOM_RO ); +REG64( C_15_TOD_READ , RULL(0x2F010AA3), SH_UNT_C_15 , SH_ACS_SCOM_RO ); +REG64( C_16_TOD_READ , RULL(0x30010AA3), SH_UNT_C_16 , SH_ACS_SCOM_RO ); +REG64( C_17_TOD_READ , RULL(0x31010AA3), SH_UNT_C_17 , SH_ACS_SCOM_RO ); +REG64( C_18_TOD_READ , RULL(0x32010AA3), SH_UNT_C_18 , SH_ACS_SCOM_RO ); +REG64( C_19_TOD_READ , RULL(0x33010AA3), SH_UNT_C_19 , SH_ACS_SCOM_RO ); +REG64( C_20_TOD_READ , RULL(0x34010AA3), SH_UNT_C_20 , SH_ACS_SCOM_RO ); +REG64( C_21_TOD_READ , RULL(0x35010AA3), SH_UNT_C_21 , SH_ACS_SCOM_RO ); +REG64( C_22_TOD_READ , RULL(0x36010AA3), SH_UNT_C_22 , SH_ACS_SCOM_RO ); +REG64( C_23_TOD_READ , RULL(0x37010AA3), SH_UNT_C_23 , SH_ACS_SCOM_RO ); +REG64( EX_0_L2_TOD_READ , RULL(0x21010AA3), SH_UNT_EX_0_L2 , + SH_ACS_SCOM_RO ); //DUPS: 20010AA3, +REG64( EX_10_L2_TOD_READ , RULL(0x35010AA3), SH_UNT_EX_10_L2 , + SH_ACS_SCOM_RO ); //DUPS: 34010AA3, +REG64( EX_11_L2_TOD_READ , RULL(0x37010AA3), SH_UNT_EX_11_L2 , + SH_ACS_SCOM_RO ); //DUPS: 36010AA3, +REG64( EX_1_L2_TOD_READ , RULL(0x23010AA3), SH_UNT_EX_1_L2 , + SH_ACS_SCOM_RO ); //DUPS: 22010AA3, +REG64( EX_2_L2_TOD_READ , RULL(0x25010AA3), SH_UNT_EX_2_L2 , + SH_ACS_SCOM_RO ); //DUPS: 24010AA3, +REG64( EX_3_L2_TOD_READ , RULL(0x27010AA3), SH_UNT_EX_3_L2 , + SH_ACS_SCOM_RO ); //DUPS: 26010AA3, +REG64( EX_4_L2_TOD_READ , RULL(0x29010AA3), SH_UNT_EX_4_L2 , + SH_ACS_SCOM_RO ); //DUPS: 28010AA3, +REG64( EX_5_L2_TOD_READ , RULL(0x2B010AA3), SH_UNT_EX_5_L2 , + SH_ACS_SCOM_RO ); //DUPS: 2A010AA3, +REG64( EX_6_L2_TOD_READ , RULL(0x2D010AA3), SH_UNT_EX_6_L2 , + SH_ACS_SCOM_RO ); //DUPS: 2C010AA3, +REG64( EX_7_L2_TOD_READ , RULL(0x2F010AA3), SH_UNT_EX_7_L2 , + SH_ACS_SCOM_RO ); //DUPS: 2E010AA3, +REG64( EX_8_L2_TOD_READ , RULL(0x31010AA3), SH_UNT_EX_8_L2 , + SH_ACS_SCOM_RO ); //DUPS: 30010AA3, +REG64( EX_9_L2_TOD_READ , RULL(0x33010AA3), SH_UNT_EX_9_L2 , + SH_ACS_SCOM_RO ); //DUPS: 32010AA3, +REG64( EX_L2_TOD_READ , RULL(0x21010AA3), SH_UNT_EX_L2 , + SH_ACS_SCOM_RO ); //DUPS: 20010AA3, + +REG64( C_TOD_STEP_CHECK , RULL(0x200112A4), SH_UNT_C , SH_ACS_SCOM_RW ); +REG64( C_0_TOD_STEP_CHECK , RULL(0x200112A4), SH_UNT_C_0 , SH_ACS_SCOM_RW ); +REG64( C_1_TOD_STEP_CHECK , RULL(0x210112A4), SH_UNT_C_1 , SH_ACS_SCOM_RW ); +REG64( C_2_TOD_STEP_CHECK , RULL(0x220112A4), SH_UNT_C_2 , SH_ACS_SCOM_RW ); +REG64( C_3_TOD_STEP_CHECK , RULL(0x230112A4), SH_UNT_C_3 , SH_ACS_SCOM_RW ); +REG64( C_4_TOD_STEP_CHECK , RULL(0x240112A4), SH_UNT_C_4 , SH_ACS_SCOM_RW ); +REG64( C_5_TOD_STEP_CHECK , RULL(0x250112A4), SH_UNT_C_5 , SH_ACS_SCOM_RW ); +REG64( C_6_TOD_STEP_CHECK , RULL(0x260112A4), SH_UNT_C_6 , SH_ACS_SCOM_RW ); +REG64( C_7_TOD_STEP_CHECK , RULL(0x270112A4), SH_UNT_C_7 , SH_ACS_SCOM_RW ); +REG64( C_8_TOD_STEP_CHECK , RULL(0x280112A4), SH_UNT_C_8 , SH_ACS_SCOM_RW ); +REG64( C_9_TOD_STEP_CHECK , RULL(0x290112A4), SH_UNT_C_9 , SH_ACS_SCOM_RW ); +REG64( C_10_TOD_STEP_CHECK , RULL(0x2A0112A4), SH_UNT_C_10 , SH_ACS_SCOM_RW ); +REG64( C_11_TOD_STEP_CHECK , RULL(0x2B0112A4), SH_UNT_C_11 , SH_ACS_SCOM_RW ); +REG64( C_12_TOD_STEP_CHECK , RULL(0x2C0112A4), SH_UNT_C_12 , SH_ACS_SCOM_RW ); +REG64( C_13_TOD_STEP_CHECK , RULL(0x2D0112A4), SH_UNT_C_13 , SH_ACS_SCOM_RW ); +REG64( C_14_TOD_STEP_CHECK , RULL(0x2E0112A4), SH_UNT_C_14 , SH_ACS_SCOM_RW ); +REG64( C_15_TOD_STEP_CHECK , RULL(0x2F0112A4), SH_UNT_C_15 , SH_ACS_SCOM_RW ); +REG64( C_16_TOD_STEP_CHECK , RULL(0x300112A4), SH_UNT_C_16 , SH_ACS_SCOM_RW ); +REG64( C_17_TOD_STEP_CHECK , RULL(0x310112A4), SH_UNT_C_17 , SH_ACS_SCOM_RW ); +REG64( C_18_TOD_STEP_CHECK , RULL(0x320112A4), SH_UNT_C_18 , SH_ACS_SCOM_RW ); +REG64( C_19_TOD_STEP_CHECK , RULL(0x330112A4), SH_UNT_C_19 , SH_ACS_SCOM_RW ); +REG64( C_20_TOD_STEP_CHECK , RULL(0x340112A4), SH_UNT_C_20 , SH_ACS_SCOM_RW ); +REG64( C_21_TOD_STEP_CHECK , RULL(0x350112A4), SH_UNT_C_21 , SH_ACS_SCOM_RW ); +REG64( C_22_TOD_STEP_CHECK , RULL(0x360112A4), SH_UNT_C_22 , SH_ACS_SCOM_RW ); +REG64( C_23_TOD_STEP_CHECK , RULL(0x370112A4), SH_UNT_C_23 , SH_ACS_SCOM_RW ); +REG64( EX_TOD_STEP_CHECK , RULL(0x210112A4), SH_UNT_EX , + SH_ACS_SCOM_RW ); //DUPS: 200112A4, +REG64( EX_0_TOD_STEP_CHECK , RULL(0x210112A4), SH_UNT_EX_0 , + SH_ACS_SCOM_RW ); //DUPS: 200112A4, +REG64( EX_1_TOD_STEP_CHECK , RULL(0x230112A4), SH_UNT_EX_1 , + SH_ACS_SCOM_RW ); //DUPS: 220112A4, +REG64( EX_2_TOD_STEP_CHECK , RULL(0x250112A4), SH_UNT_EX_2 , + SH_ACS_SCOM_RW ); //DUPS: 240112A4, +REG64( EX_3_TOD_STEP_CHECK , RULL(0x270112A4), SH_UNT_EX_3 , + SH_ACS_SCOM_RW ); //DUPS: 260112A4, +REG64( EX_4_TOD_STEP_CHECK , RULL(0x290112A4), SH_UNT_EX_4 , + SH_ACS_SCOM_RW ); //DUPS: 280112A4, +REG64( EX_5_TOD_STEP_CHECK , RULL(0x2B0112A4), SH_UNT_EX_5 , + SH_ACS_SCOM_RW ); //DUPS: 2A0112A4, +REG64( EX_6_TOD_STEP_CHECK , RULL(0x2D0112A4), SH_UNT_EX_6 , + SH_ACS_SCOM_RW ); //DUPS: 2C0112A4, +REG64( EX_7_TOD_STEP_CHECK , RULL(0x2F0112A4), SH_UNT_EX_7 , + SH_ACS_SCOM_RW ); //DUPS: 2E0112A4, +REG64( EX_8_TOD_STEP_CHECK , RULL(0x310112A4), SH_UNT_EX_8 , + SH_ACS_SCOM_RW ); //DUPS: 300112A4, +REG64( EX_9_TOD_STEP_CHECK , RULL(0x330112A4), SH_UNT_EX_9 , + SH_ACS_SCOM_RW ); //DUPS: 320112A4, +REG64( EX_10_TOD_STEP_CHECK , RULL(0x350112A4), SH_UNT_EX_10 , + SH_ACS_SCOM_RW ); //DUPS: 340112A4, +REG64( EX_11_TOD_STEP_CHECK , RULL(0x370112A4), SH_UNT_EX_11 , + SH_ACS_SCOM_RW ); //DUPS: 360112A4, + +REG64( C_TOD_SYNC000 , RULL(0x20010AA3), SH_UNT_C , SH_ACS_SCOM1_WO ); +REG64( CAPP_TOD_SYNC000 , RULL(0x02010826), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_TOD_SYNC000 , RULL(0x02010826), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_TOD_SYNC000 , RULL(0x04010826), SH_UNT_CAPP_1 , SH_ACS_SCOM ); +REG64( C_0_TOD_SYNC000 , RULL(0x20010AA3), SH_UNT_C_0 , SH_ACS_SCOM1_WO ); +REG64( C_1_TOD_SYNC000 , RULL(0x21010AA3), SH_UNT_C_1 , SH_ACS_SCOM1_WO ); +REG64( C_2_TOD_SYNC000 , RULL(0x22010AA3), SH_UNT_C_2 , SH_ACS_SCOM1_WO ); +REG64( C_3_TOD_SYNC000 , RULL(0x23010AA3), SH_UNT_C_3 , SH_ACS_SCOM1_WO ); +REG64( C_4_TOD_SYNC000 , RULL(0x24010AA3), SH_UNT_C_4 , SH_ACS_SCOM1_WO ); +REG64( C_5_TOD_SYNC000 , RULL(0x25010AA3), SH_UNT_C_5 , SH_ACS_SCOM1_WO ); +REG64( C_6_TOD_SYNC000 , RULL(0x26010AA3), SH_UNT_C_6 , SH_ACS_SCOM1_WO ); +REG64( C_7_TOD_SYNC000 , RULL(0x27010AA3), SH_UNT_C_7 , SH_ACS_SCOM1_WO ); +REG64( C_8_TOD_SYNC000 , RULL(0x28010AA3), SH_UNT_C_8 , SH_ACS_SCOM1_WO ); +REG64( C_9_TOD_SYNC000 , RULL(0x29010AA3), SH_UNT_C_9 , SH_ACS_SCOM1_WO ); +REG64( C_10_TOD_SYNC000 , RULL(0x2A010AA3), SH_UNT_C_10 , SH_ACS_SCOM1_WO ); +REG64( C_11_TOD_SYNC000 , RULL(0x2B010AA3), SH_UNT_C_11 , SH_ACS_SCOM1_WO ); +REG64( C_12_TOD_SYNC000 , RULL(0x2C010AA3), SH_UNT_C_12 , SH_ACS_SCOM1_WO ); +REG64( C_13_TOD_SYNC000 , RULL(0x2D010AA3), SH_UNT_C_13 , SH_ACS_SCOM1_WO ); +REG64( C_14_TOD_SYNC000 , RULL(0x2E010AA3), SH_UNT_C_14 , SH_ACS_SCOM1_WO ); +REG64( C_15_TOD_SYNC000 , RULL(0x2F010AA3), SH_UNT_C_15 , SH_ACS_SCOM1_WO ); +REG64( C_16_TOD_SYNC000 , RULL(0x30010AA3), SH_UNT_C_16 , SH_ACS_SCOM1_WO ); +REG64( C_17_TOD_SYNC000 , RULL(0x31010AA3), SH_UNT_C_17 , SH_ACS_SCOM1_WO ); +REG64( C_18_TOD_SYNC000 , RULL(0x32010AA3), SH_UNT_C_18 , SH_ACS_SCOM1_WO ); +REG64( C_19_TOD_SYNC000 , RULL(0x33010AA3), SH_UNT_C_19 , SH_ACS_SCOM1_WO ); +REG64( C_20_TOD_SYNC000 , RULL(0x34010AA3), SH_UNT_C_20 , SH_ACS_SCOM1_WO ); +REG64( C_21_TOD_SYNC000 , RULL(0x35010AA3), SH_UNT_C_21 , SH_ACS_SCOM1_WO ); +REG64( C_22_TOD_SYNC000 , RULL(0x36010AA3), SH_UNT_C_22 , SH_ACS_SCOM1_WO ); +REG64( C_23_TOD_SYNC000 , RULL(0x37010AA3), SH_UNT_C_23 , SH_ACS_SCOM1_WO ); +REG64( EX_0_L2_TOD_SYNC000 , RULL(0x21010AA3), SH_UNT_EX_0_L2 , + SH_ACS_SCOM1_WO ); //DUPS: 20010AA3, +REG64( EX_10_L2_TOD_SYNC000 , RULL(0x35010AA3), SH_UNT_EX_10_L2 , + SH_ACS_SCOM1_WO ); //DUPS: 34010AA3, +REG64( EX_11_L2_TOD_SYNC000 , RULL(0x37010AA3), SH_UNT_EX_11_L2 , + SH_ACS_SCOM1_WO ); //DUPS: 36010AA3, +REG64( EX_1_L2_TOD_SYNC000 , RULL(0x23010AA3), SH_UNT_EX_1_L2 , + SH_ACS_SCOM1_WO ); //DUPS: 22010AA3, +REG64( EX_2_L2_TOD_SYNC000 , RULL(0x25010AA3), SH_UNT_EX_2_L2 , + SH_ACS_SCOM1_WO ); //DUPS: 24010AA3, +REG64( EX_3_L2_TOD_SYNC000 , RULL(0x27010AA3), SH_UNT_EX_3_L2 , + SH_ACS_SCOM1_WO ); //DUPS: 26010AA3, +REG64( EX_4_L2_TOD_SYNC000 , RULL(0x29010AA3), SH_UNT_EX_4_L2 , + SH_ACS_SCOM1_WO ); //DUPS: 28010AA3, +REG64( EX_5_L2_TOD_SYNC000 , RULL(0x2B010AA3), SH_UNT_EX_5_L2 , + SH_ACS_SCOM1_WO ); //DUPS: 2A010AA3, +REG64( EX_6_L2_TOD_SYNC000 , RULL(0x2D010AA3), SH_UNT_EX_6_L2 , + SH_ACS_SCOM1_WO ); //DUPS: 2C010AA3, +REG64( EX_7_L2_TOD_SYNC000 , RULL(0x2F010AA3), SH_UNT_EX_7_L2 , + SH_ACS_SCOM1_WO ); //DUPS: 2E010AA3, +REG64( EX_8_L2_TOD_SYNC000 , RULL(0x31010AA3), SH_UNT_EX_8_L2 , + SH_ACS_SCOM1_WO ); //DUPS: 30010AA3, +REG64( EX_9_L2_TOD_SYNC000 , RULL(0x33010AA3), SH_UNT_EX_9_L2 , + SH_ACS_SCOM1_WO ); //DUPS: 32010AA3, +REG64( EX_L2_TOD_SYNC000 , RULL(0x21010AA3), SH_UNT_EX_L2 , + SH_ACS_SCOM1_WO ); //DUPS: 20010AA3, + +REG64( C_TOD_SYNC001 , RULL(0x20010AA3), SH_UNT_C , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_0_TOD_SYNC001 , RULL(0x20010AA3), SH_UNT_C_0 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_1_TOD_SYNC001 , RULL(0x21010AA3), SH_UNT_C_1 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_2_TOD_SYNC001 , RULL(0x22010AA3), SH_UNT_C_2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_3_TOD_SYNC001 , RULL(0x23010AA3), SH_UNT_C_3 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_4_TOD_SYNC001 , RULL(0x24010AA3), SH_UNT_C_4 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_5_TOD_SYNC001 , RULL(0x25010AA3), SH_UNT_C_5 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_6_TOD_SYNC001 , RULL(0x26010AA3), SH_UNT_C_6 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_7_TOD_SYNC001 , RULL(0x27010AA3), SH_UNT_C_7 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_8_TOD_SYNC001 , RULL(0x28010AA3), SH_UNT_C_8 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_9_TOD_SYNC001 , RULL(0x29010AA3), SH_UNT_C_9 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_10_TOD_SYNC001 , RULL(0x2A010AA3), SH_UNT_C_10 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_11_TOD_SYNC001 , RULL(0x2B010AA3), SH_UNT_C_11 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_12_TOD_SYNC001 , RULL(0x2C010AA3), SH_UNT_C_12 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_13_TOD_SYNC001 , RULL(0x2D010AA3), SH_UNT_C_13 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_14_TOD_SYNC001 , RULL(0x2E010AA3), SH_UNT_C_14 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_15_TOD_SYNC001 , RULL(0x2F010AA3), SH_UNT_C_15 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_16_TOD_SYNC001 , RULL(0x30010AA3), SH_UNT_C_16 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_17_TOD_SYNC001 , RULL(0x31010AA3), SH_UNT_C_17 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_18_TOD_SYNC001 , RULL(0x32010AA3), SH_UNT_C_18 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_19_TOD_SYNC001 , RULL(0x33010AA3), SH_UNT_C_19 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_20_TOD_SYNC001 , RULL(0x34010AA3), SH_UNT_C_20 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_21_TOD_SYNC001 , RULL(0x35010AA3), SH_UNT_C_21 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_22_TOD_SYNC001 , RULL(0x36010AA3), SH_UNT_C_22 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_23_TOD_SYNC001 , RULL(0x37010AA3), SH_UNT_C_23 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( EX_0_L2_TOD_SYNC001 , RULL(0x21010AA3), SH_UNT_EX_0_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 20010AA3, +REG64( EX_10_L2_TOD_SYNC001 , RULL(0x35010AA3), SH_UNT_EX_10_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 34010AA3, +REG64( EX_11_L2_TOD_SYNC001 , RULL(0x37010AA3), SH_UNT_EX_11_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 36010AA3, +REG64( EX_1_L2_TOD_SYNC001 , RULL(0x23010AA3), SH_UNT_EX_1_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 22010AA3, +REG64( EX_2_L2_TOD_SYNC001 , RULL(0x25010AA3), SH_UNT_EX_2_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 24010AA3, +REG64( EX_3_L2_TOD_SYNC001 , RULL(0x27010AA3), SH_UNT_EX_3_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 26010AA3, +REG64( EX_4_L2_TOD_SYNC001 , RULL(0x29010AA3), SH_UNT_EX_4_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 28010AA3, +REG64( EX_5_L2_TOD_SYNC001 , RULL(0x2B010AA3), SH_UNT_EX_5_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2A010AA3, +REG64( EX_6_L2_TOD_SYNC001 , RULL(0x2D010AA3), SH_UNT_EX_6_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2C010AA3, +REG64( EX_7_L2_TOD_SYNC001 , RULL(0x2F010AA3), SH_UNT_EX_7_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2E010AA3, +REG64( EX_8_L2_TOD_SYNC001 , RULL(0x31010AA3), SH_UNT_EX_8_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 30010AA3, +REG64( EX_9_L2_TOD_SYNC001 , RULL(0x33010AA3), SH_UNT_EX_9_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 32010AA3, +REG64( EX_L2_TOD_SYNC001 , RULL(0x21010AA3), SH_UNT_EX_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 20010AA3, + +REG64( C_TOD_SYNC010 , RULL(0x20010AA3), SH_UNT_C , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_0_TOD_SYNC010 , RULL(0x20010AA3), SH_UNT_C_0 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_1_TOD_SYNC010 , RULL(0x21010AA3), SH_UNT_C_1 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_2_TOD_SYNC010 , RULL(0x22010AA3), SH_UNT_C_2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_3_TOD_SYNC010 , RULL(0x23010AA3), SH_UNT_C_3 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_4_TOD_SYNC010 , RULL(0x24010AA3), SH_UNT_C_4 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_5_TOD_SYNC010 , RULL(0x25010AA3), SH_UNT_C_5 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_6_TOD_SYNC010 , RULL(0x26010AA3), SH_UNT_C_6 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_7_TOD_SYNC010 , RULL(0x27010AA3), SH_UNT_C_7 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_8_TOD_SYNC010 , RULL(0x28010AA3), SH_UNT_C_8 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_9_TOD_SYNC010 , RULL(0x29010AA3), SH_UNT_C_9 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_10_TOD_SYNC010 , RULL(0x2A010AA3), SH_UNT_C_10 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_11_TOD_SYNC010 , RULL(0x2B010AA3), SH_UNT_C_11 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_12_TOD_SYNC010 , RULL(0x2C010AA3), SH_UNT_C_12 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_13_TOD_SYNC010 , RULL(0x2D010AA3), SH_UNT_C_13 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_14_TOD_SYNC010 , RULL(0x2E010AA3), SH_UNT_C_14 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_15_TOD_SYNC010 , RULL(0x2F010AA3), SH_UNT_C_15 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_16_TOD_SYNC010 , RULL(0x30010AA3), SH_UNT_C_16 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_17_TOD_SYNC010 , RULL(0x31010AA3), SH_UNT_C_17 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_18_TOD_SYNC010 , RULL(0x32010AA3), SH_UNT_C_18 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_19_TOD_SYNC010 , RULL(0x33010AA3), SH_UNT_C_19 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_20_TOD_SYNC010 , RULL(0x34010AA3), SH_UNT_C_20 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_21_TOD_SYNC010 , RULL(0x35010AA3), SH_UNT_C_21 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_22_TOD_SYNC010 , RULL(0x36010AA3), SH_UNT_C_22 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_23_TOD_SYNC010 , RULL(0x37010AA3), SH_UNT_C_23 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( EX_0_L2_TOD_SYNC010 , RULL(0x21010AA3), SH_UNT_EX_0_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 20010AA3, +REG64( EX_10_L2_TOD_SYNC010 , RULL(0x35010AA3), SH_UNT_EX_10_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 34010AA3, +REG64( EX_11_L2_TOD_SYNC010 , RULL(0x37010AA3), SH_UNT_EX_11_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 36010AA3, +REG64( EX_1_L2_TOD_SYNC010 , RULL(0x23010AA3), SH_UNT_EX_1_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 22010AA3, +REG64( EX_2_L2_TOD_SYNC010 , RULL(0x25010AA3), SH_UNT_EX_2_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 24010AA3, +REG64( EX_3_L2_TOD_SYNC010 , RULL(0x27010AA3), SH_UNT_EX_3_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 26010AA3, +REG64( EX_4_L2_TOD_SYNC010 , RULL(0x29010AA3), SH_UNT_EX_4_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 28010AA3, +REG64( EX_5_L2_TOD_SYNC010 , RULL(0x2B010AA3), SH_UNT_EX_5_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2A010AA3, +REG64( EX_6_L2_TOD_SYNC010 , RULL(0x2D010AA3), SH_UNT_EX_6_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2C010AA3, +REG64( EX_7_L2_TOD_SYNC010 , RULL(0x2F010AA3), SH_UNT_EX_7_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2E010AA3, +REG64( EX_8_L2_TOD_SYNC010 , RULL(0x31010AA3), SH_UNT_EX_8_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 30010AA3, +REG64( EX_9_L2_TOD_SYNC010 , RULL(0x33010AA3), SH_UNT_EX_9_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 32010AA3, +REG64( EX_L2_TOD_SYNC010 , RULL(0x21010AA3), SH_UNT_EX_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 20010AA3, + +REG64( C_TOD_SYNC011 , RULL(0x20010AA3), SH_UNT_C , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_0_TOD_SYNC011 , RULL(0x20010AA3), SH_UNT_C_0 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_1_TOD_SYNC011 , RULL(0x21010AA3), SH_UNT_C_1 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_2_TOD_SYNC011 , RULL(0x22010AA3), SH_UNT_C_2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_3_TOD_SYNC011 , RULL(0x23010AA3), SH_UNT_C_3 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_4_TOD_SYNC011 , RULL(0x24010AA3), SH_UNT_C_4 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_5_TOD_SYNC011 , RULL(0x25010AA3), SH_UNT_C_5 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_6_TOD_SYNC011 , RULL(0x26010AA3), SH_UNT_C_6 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_7_TOD_SYNC011 , RULL(0x27010AA3), SH_UNT_C_7 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_8_TOD_SYNC011 , RULL(0x28010AA3), SH_UNT_C_8 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_9_TOD_SYNC011 , RULL(0x29010AA3), SH_UNT_C_9 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_10_TOD_SYNC011 , RULL(0x2A010AA3), SH_UNT_C_10 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_11_TOD_SYNC011 , RULL(0x2B010AA3), SH_UNT_C_11 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_12_TOD_SYNC011 , RULL(0x2C010AA3), SH_UNT_C_12 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_13_TOD_SYNC011 , RULL(0x2D010AA3), SH_UNT_C_13 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_14_TOD_SYNC011 , RULL(0x2E010AA3), SH_UNT_C_14 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_15_TOD_SYNC011 , RULL(0x2F010AA3), SH_UNT_C_15 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_16_TOD_SYNC011 , RULL(0x30010AA3), SH_UNT_C_16 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_17_TOD_SYNC011 , RULL(0x31010AA3), SH_UNT_C_17 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_18_TOD_SYNC011 , RULL(0x32010AA3), SH_UNT_C_18 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_19_TOD_SYNC011 , RULL(0x33010AA3), SH_UNT_C_19 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_20_TOD_SYNC011 , RULL(0x34010AA3), SH_UNT_C_20 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_21_TOD_SYNC011 , RULL(0x35010AA3), SH_UNT_C_21 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_22_TOD_SYNC011 , RULL(0x36010AA3), SH_UNT_C_22 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_23_TOD_SYNC011 , RULL(0x37010AA3), SH_UNT_C_23 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( EX_0_L2_TOD_SYNC011 , RULL(0x21010AA3), SH_UNT_EX_0_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 20010AA3, +REG64( EX_10_L2_TOD_SYNC011 , RULL(0x35010AA3), SH_UNT_EX_10_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 34010AA3, +REG64( EX_11_L2_TOD_SYNC011 , RULL(0x37010AA3), SH_UNT_EX_11_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 36010AA3, +REG64( EX_1_L2_TOD_SYNC011 , RULL(0x23010AA3), SH_UNT_EX_1_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 22010AA3, +REG64( EX_2_L2_TOD_SYNC011 , RULL(0x25010AA3), SH_UNT_EX_2_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 24010AA3, +REG64( EX_3_L2_TOD_SYNC011 , RULL(0x27010AA3), SH_UNT_EX_3_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 26010AA3, +REG64( EX_4_L2_TOD_SYNC011 , RULL(0x29010AA3), SH_UNT_EX_4_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 28010AA3, +REG64( EX_5_L2_TOD_SYNC011 , RULL(0x2B010AA3), SH_UNT_EX_5_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2A010AA3, +REG64( EX_6_L2_TOD_SYNC011 , RULL(0x2D010AA3), SH_UNT_EX_6_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2C010AA3, +REG64( EX_7_L2_TOD_SYNC011 , RULL(0x2F010AA3), SH_UNT_EX_7_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2E010AA3, +REG64( EX_8_L2_TOD_SYNC011 , RULL(0x31010AA3), SH_UNT_EX_8_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 30010AA3, +REG64( EX_9_L2_TOD_SYNC011 , RULL(0x33010AA3), SH_UNT_EX_9_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 32010AA3, +REG64( EX_L2_TOD_SYNC011 , RULL(0x21010AA3), SH_UNT_EX_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 20010AA3, + +REG64( C_TOD_SYNC100 , RULL(0x20010AA3), SH_UNT_C , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_0_TOD_SYNC100 , RULL(0x20010AA3), SH_UNT_C_0 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_1_TOD_SYNC100 , RULL(0x21010AA3), SH_UNT_C_1 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_2_TOD_SYNC100 , RULL(0x22010AA3), SH_UNT_C_2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_3_TOD_SYNC100 , RULL(0x23010AA3), SH_UNT_C_3 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_4_TOD_SYNC100 , RULL(0x24010AA3), SH_UNT_C_4 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_5_TOD_SYNC100 , RULL(0x25010AA3), SH_UNT_C_5 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_6_TOD_SYNC100 , RULL(0x26010AA3), SH_UNT_C_6 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_7_TOD_SYNC100 , RULL(0x27010AA3), SH_UNT_C_7 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_8_TOD_SYNC100 , RULL(0x28010AA3), SH_UNT_C_8 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_9_TOD_SYNC100 , RULL(0x29010AA3), SH_UNT_C_9 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_10_TOD_SYNC100 , RULL(0x2A010AA3), SH_UNT_C_10 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_11_TOD_SYNC100 , RULL(0x2B010AA3), SH_UNT_C_11 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_12_TOD_SYNC100 , RULL(0x2C010AA3), SH_UNT_C_12 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_13_TOD_SYNC100 , RULL(0x2D010AA3), SH_UNT_C_13 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_14_TOD_SYNC100 , RULL(0x2E010AA3), SH_UNT_C_14 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_15_TOD_SYNC100 , RULL(0x2F010AA3), SH_UNT_C_15 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_16_TOD_SYNC100 , RULL(0x30010AA3), SH_UNT_C_16 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_17_TOD_SYNC100 , RULL(0x31010AA3), SH_UNT_C_17 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_18_TOD_SYNC100 , RULL(0x32010AA3), SH_UNT_C_18 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_19_TOD_SYNC100 , RULL(0x33010AA3), SH_UNT_C_19 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_20_TOD_SYNC100 , RULL(0x34010AA3), SH_UNT_C_20 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_21_TOD_SYNC100 , RULL(0x35010AA3), SH_UNT_C_21 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_22_TOD_SYNC100 , RULL(0x36010AA3), SH_UNT_C_22 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_23_TOD_SYNC100 , RULL(0x37010AA3), SH_UNT_C_23 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( EX_0_L2_TOD_SYNC100 , RULL(0x21010AA3), SH_UNT_EX_0_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 20010AA3, +REG64( EX_10_L2_TOD_SYNC100 , RULL(0x35010AA3), SH_UNT_EX_10_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 34010AA3, +REG64( EX_11_L2_TOD_SYNC100 , RULL(0x37010AA3), SH_UNT_EX_11_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 36010AA3, +REG64( EX_1_L2_TOD_SYNC100 , RULL(0x23010AA3), SH_UNT_EX_1_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 22010AA3, +REG64( EX_2_L2_TOD_SYNC100 , RULL(0x25010AA3), SH_UNT_EX_2_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 24010AA3, +REG64( EX_3_L2_TOD_SYNC100 , RULL(0x27010AA3), SH_UNT_EX_3_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 26010AA3, +REG64( EX_4_L2_TOD_SYNC100 , RULL(0x29010AA3), SH_UNT_EX_4_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 28010AA3, +REG64( EX_5_L2_TOD_SYNC100 , RULL(0x2B010AA3), SH_UNT_EX_5_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2A010AA3, +REG64( EX_6_L2_TOD_SYNC100 , RULL(0x2D010AA3), SH_UNT_EX_6_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2C010AA3, +REG64( EX_7_L2_TOD_SYNC100 , RULL(0x2F010AA3), SH_UNT_EX_7_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2E010AA3, +REG64( EX_8_L2_TOD_SYNC100 , RULL(0x31010AA3), SH_UNT_EX_8_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 30010AA3, +REG64( EX_9_L2_TOD_SYNC100 , RULL(0x33010AA3), SH_UNT_EX_9_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 32010AA3, +REG64( EX_L2_TOD_SYNC100 , RULL(0x21010AA3), SH_UNT_EX_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 20010AA3, + +REG64( C_TOD_SYNC101 , RULL(0x20010AA3), SH_UNT_C , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_0_TOD_SYNC101 , RULL(0x20010AA3), SH_UNT_C_0 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_1_TOD_SYNC101 , RULL(0x21010AA3), SH_UNT_C_1 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_2_TOD_SYNC101 , RULL(0x22010AA3), SH_UNT_C_2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_3_TOD_SYNC101 , RULL(0x23010AA3), SH_UNT_C_3 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_4_TOD_SYNC101 , RULL(0x24010AA3), SH_UNT_C_4 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_5_TOD_SYNC101 , RULL(0x25010AA3), SH_UNT_C_5 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_6_TOD_SYNC101 , RULL(0x26010AA3), SH_UNT_C_6 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_7_TOD_SYNC101 , RULL(0x27010AA3), SH_UNT_C_7 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_8_TOD_SYNC101 , RULL(0x28010AA3), SH_UNT_C_8 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_9_TOD_SYNC101 , RULL(0x29010AA3), SH_UNT_C_9 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_10_TOD_SYNC101 , RULL(0x2A010AA3), SH_UNT_C_10 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_11_TOD_SYNC101 , RULL(0x2B010AA3), SH_UNT_C_11 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_12_TOD_SYNC101 , RULL(0x2C010AA3), SH_UNT_C_12 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_13_TOD_SYNC101 , RULL(0x2D010AA3), SH_UNT_C_13 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_14_TOD_SYNC101 , RULL(0x2E010AA3), SH_UNT_C_14 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_15_TOD_SYNC101 , RULL(0x2F010AA3), SH_UNT_C_15 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_16_TOD_SYNC101 , RULL(0x30010AA3), SH_UNT_C_16 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_17_TOD_SYNC101 , RULL(0x31010AA3), SH_UNT_C_17 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_18_TOD_SYNC101 , RULL(0x32010AA3), SH_UNT_C_18 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_19_TOD_SYNC101 , RULL(0x33010AA3), SH_UNT_C_19 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_20_TOD_SYNC101 , RULL(0x34010AA3), SH_UNT_C_20 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_21_TOD_SYNC101 , RULL(0x35010AA3), SH_UNT_C_21 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_22_TOD_SYNC101 , RULL(0x36010AA3), SH_UNT_C_22 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_23_TOD_SYNC101 , RULL(0x37010AA3), SH_UNT_C_23 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( EX_0_L2_TOD_SYNC101 , RULL(0x21010AA3), SH_UNT_EX_0_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 20010AA3, +REG64( EX_10_L2_TOD_SYNC101 , RULL(0x35010AA3), SH_UNT_EX_10_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 34010AA3, +REG64( EX_11_L2_TOD_SYNC101 , RULL(0x37010AA3), SH_UNT_EX_11_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 36010AA3, +REG64( EX_1_L2_TOD_SYNC101 , RULL(0x23010AA3), SH_UNT_EX_1_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 22010AA3, +REG64( EX_2_L2_TOD_SYNC101 , RULL(0x25010AA3), SH_UNT_EX_2_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 24010AA3, +REG64( EX_3_L2_TOD_SYNC101 , RULL(0x27010AA3), SH_UNT_EX_3_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 26010AA3, +REG64( EX_4_L2_TOD_SYNC101 , RULL(0x29010AA3), SH_UNT_EX_4_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 28010AA3, +REG64( EX_5_L2_TOD_SYNC101 , RULL(0x2B010AA3), SH_UNT_EX_5_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2A010AA3, +REG64( EX_6_L2_TOD_SYNC101 , RULL(0x2D010AA3), SH_UNT_EX_6_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2C010AA3, +REG64( EX_7_L2_TOD_SYNC101 , RULL(0x2F010AA3), SH_UNT_EX_7_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2E010AA3, +REG64( EX_8_L2_TOD_SYNC101 , RULL(0x31010AA3), SH_UNT_EX_8_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 30010AA3, +REG64( EX_9_L2_TOD_SYNC101 , RULL(0x33010AA3), SH_UNT_EX_9_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 32010AA3, +REG64( EX_L2_TOD_SYNC101 , RULL(0x21010AA3), SH_UNT_EX_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 20010AA3, + +REG64( C_TOD_SYNC110 , RULL(0x20010AA3), SH_UNT_C , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_0_TOD_SYNC110 , RULL(0x20010AA3), SH_UNT_C_0 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_1_TOD_SYNC110 , RULL(0x21010AA3), SH_UNT_C_1 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_2_TOD_SYNC110 , RULL(0x22010AA3), SH_UNT_C_2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_3_TOD_SYNC110 , RULL(0x23010AA3), SH_UNT_C_3 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_4_TOD_SYNC110 , RULL(0x24010AA3), SH_UNT_C_4 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_5_TOD_SYNC110 , RULL(0x25010AA3), SH_UNT_C_5 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_6_TOD_SYNC110 , RULL(0x26010AA3), SH_UNT_C_6 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_7_TOD_SYNC110 , RULL(0x27010AA3), SH_UNT_C_7 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_8_TOD_SYNC110 , RULL(0x28010AA3), SH_UNT_C_8 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_9_TOD_SYNC110 , RULL(0x29010AA3), SH_UNT_C_9 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_10_TOD_SYNC110 , RULL(0x2A010AA3), SH_UNT_C_10 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_11_TOD_SYNC110 , RULL(0x2B010AA3), SH_UNT_C_11 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_12_TOD_SYNC110 , RULL(0x2C010AA3), SH_UNT_C_12 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_13_TOD_SYNC110 , RULL(0x2D010AA3), SH_UNT_C_13 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_14_TOD_SYNC110 , RULL(0x2E010AA3), SH_UNT_C_14 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_15_TOD_SYNC110 , RULL(0x2F010AA3), SH_UNT_C_15 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_16_TOD_SYNC110 , RULL(0x30010AA3), SH_UNT_C_16 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_17_TOD_SYNC110 , RULL(0x31010AA3), SH_UNT_C_17 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_18_TOD_SYNC110 , RULL(0x32010AA3), SH_UNT_C_18 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_19_TOD_SYNC110 , RULL(0x33010AA3), SH_UNT_C_19 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_20_TOD_SYNC110 , RULL(0x34010AA3), SH_UNT_C_20 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_21_TOD_SYNC110 , RULL(0x35010AA3), SH_UNT_C_21 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_22_TOD_SYNC110 , RULL(0x36010AA3), SH_UNT_C_22 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_23_TOD_SYNC110 , RULL(0x37010AA3), SH_UNT_C_23 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( EX_0_L2_TOD_SYNC110 , RULL(0x21010AA3), SH_UNT_EX_0_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 20010AA3, +REG64( EX_10_L2_TOD_SYNC110 , RULL(0x35010AA3), SH_UNT_EX_10_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 34010AA3, +REG64( EX_11_L2_TOD_SYNC110 , RULL(0x37010AA3), SH_UNT_EX_11_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 36010AA3, +REG64( EX_1_L2_TOD_SYNC110 , RULL(0x23010AA3), SH_UNT_EX_1_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 22010AA3, +REG64( EX_2_L2_TOD_SYNC110 , RULL(0x25010AA3), SH_UNT_EX_2_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 24010AA3, +REG64( EX_3_L2_TOD_SYNC110 , RULL(0x27010AA3), SH_UNT_EX_3_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 26010AA3, +REG64( EX_4_L2_TOD_SYNC110 , RULL(0x29010AA3), SH_UNT_EX_4_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 28010AA3, +REG64( EX_5_L2_TOD_SYNC110 , RULL(0x2B010AA3), SH_UNT_EX_5_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2A010AA3, +REG64( EX_6_L2_TOD_SYNC110 , RULL(0x2D010AA3), SH_UNT_EX_6_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2C010AA3, +REG64( EX_7_L2_TOD_SYNC110 , RULL(0x2F010AA3), SH_UNT_EX_7_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2E010AA3, +REG64( EX_8_L2_TOD_SYNC110 , RULL(0x31010AA3), SH_UNT_EX_8_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 30010AA3, +REG64( EX_9_L2_TOD_SYNC110 , RULL(0x33010AA3), SH_UNT_EX_9_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 32010AA3, +REG64( EX_L2_TOD_SYNC110 , RULL(0x21010AA3), SH_UNT_EX_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 20010AA3, + +REG64( C_TOD_SYNC111 , RULL(0x20010AA3), SH_UNT_C , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_0_TOD_SYNC111 , RULL(0x20010AA3), SH_UNT_C_0 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_1_TOD_SYNC111 , RULL(0x21010AA3), SH_UNT_C_1 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_2_TOD_SYNC111 , RULL(0x22010AA3), SH_UNT_C_2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_3_TOD_SYNC111 , RULL(0x23010AA3), SH_UNT_C_3 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_4_TOD_SYNC111 , RULL(0x24010AA3), SH_UNT_C_4 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_5_TOD_SYNC111 , RULL(0x25010AA3), SH_UNT_C_5 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_6_TOD_SYNC111 , RULL(0x26010AA3), SH_UNT_C_6 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_7_TOD_SYNC111 , RULL(0x27010AA3), SH_UNT_C_7 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_8_TOD_SYNC111 , RULL(0x28010AA3), SH_UNT_C_8 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_9_TOD_SYNC111 , RULL(0x29010AA3), SH_UNT_C_9 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_10_TOD_SYNC111 , RULL(0x2A010AA3), SH_UNT_C_10 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_11_TOD_SYNC111 , RULL(0x2B010AA3), SH_UNT_C_11 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_12_TOD_SYNC111 , RULL(0x2C010AA3), SH_UNT_C_12 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_13_TOD_SYNC111 , RULL(0x2D010AA3), SH_UNT_C_13 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_14_TOD_SYNC111 , RULL(0x2E010AA3), SH_UNT_C_14 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_15_TOD_SYNC111 , RULL(0x2F010AA3), SH_UNT_C_15 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_16_TOD_SYNC111 , RULL(0x30010AA3), SH_UNT_C_16 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_17_TOD_SYNC111 , RULL(0x31010AA3), SH_UNT_C_17 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_18_TOD_SYNC111 , RULL(0x32010AA3), SH_UNT_C_18 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_19_TOD_SYNC111 , RULL(0x33010AA3), SH_UNT_C_19 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_20_TOD_SYNC111 , RULL(0x34010AA3), SH_UNT_C_20 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_21_TOD_SYNC111 , RULL(0x35010AA3), SH_UNT_C_21 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_22_TOD_SYNC111 , RULL(0x36010AA3), SH_UNT_C_22 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( C_23_TOD_SYNC111 , RULL(0x37010AA3), SH_UNT_C_23 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG +REG64( EX_0_L2_TOD_SYNC111 , RULL(0x21010AA3), SH_UNT_EX_0_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 20010AA3, +REG64( EX_10_L2_TOD_SYNC111 , RULL(0x35010AA3), SH_UNT_EX_10_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 34010AA3, +REG64( EX_11_L2_TOD_SYNC111 , RULL(0x37010AA3), SH_UNT_EX_11_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 36010AA3, +REG64( EX_1_L2_TOD_SYNC111 , RULL(0x23010AA3), SH_UNT_EX_1_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 22010AA3, +REG64( EX_2_L2_TOD_SYNC111 , RULL(0x25010AA3), SH_UNT_EX_2_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 24010AA3, +REG64( EX_3_L2_TOD_SYNC111 , RULL(0x27010AA3), SH_UNT_EX_3_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 26010AA3, +REG64( EX_4_L2_TOD_SYNC111 , RULL(0x29010AA3), SH_UNT_EX_4_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 28010AA3, +REG64( EX_5_L2_TOD_SYNC111 , RULL(0x2B010AA3), SH_UNT_EX_5_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2A010AA3, +REG64( EX_6_L2_TOD_SYNC111 , RULL(0x2D010AA3), SH_UNT_EX_6_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2C010AA3, +REG64( EX_7_L2_TOD_SYNC111 , RULL(0x2F010AA3), SH_UNT_EX_7_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 2E010AA3, +REG64( EX_8_L2_TOD_SYNC111 , RULL(0x31010AA3), SH_UNT_EX_8_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 30010AA3, +REG64( EX_9_L2_TOD_SYNC111 , RULL(0x33010AA3), SH_UNT_EX_9_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 32010AA3, +REG64( EX_L2_TOD_SYNC111 , RULL(0x21010AA3), SH_UNT_EX_L2 , + SH_ACS_SCOM1_WO ); //WARNING - VALUE SET SAME AS ANOTHER REG //DUPS: 20010AA3, + +REG64( C_V0_HMER_WAND , RULL(0x20010A92), SH_UNT_C , + SH_ACS_SCOM1_WAND ); +REG64( C_V0_HMER_OR , RULL(0x20010A8E), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_V0_HMER_WAND , RULL(0x20010A92), SH_UNT_C_0 , + SH_ACS_SCOM1_WAND ); +REG64( C_0_V0_HMER_OR , RULL(0x20010A8E), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_V0_HMER_WAND , RULL(0x21010A92), SH_UNT_C_1 , + SH_ACS_SCOM1_WAND ); +REG64( C_1_V0_HMER_OR , RULL(0x21010A8E), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_V0_HMER_WAND , RULL(0x22010A92), SH_UNT_C_2 , + SH_ACS_SCOM1_WAND ); +REG64( C_2_V0_HMER_OR , RULL(0x22010A8E), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_V0_HMER_WAND , RULL(0x23010A92), SH_UNT_C_3 , + SH_ACS_SCOM1_WAND ); +REG64( C_3_V0_HMER_OR , RULL(0x23010A8E), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_V0_HMER_WAND , RULL(0x24010A92), SH_UNT_C_4 , + SH_ACS_SCOM1_WAND ); +REG64( C_4_V0_HMER_OR , RULL(0x24010A8E), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_V0_HMER_WAND , RULL(0x25010A92), SH_UNT_C_5 , + SH_ACS_SCOM1_WAND ); +REG64( C_5_V0_HMER_OR , RULL(0x25010A8E), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_V0_HMER_WAND , RULL(0x26010A92), SH_UNT_C_6 , + SH_ACS_SCOM1_WAND ); +REG64( C_6_V0_HMER_OR , RULL(0x26010A8E), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_V0_HMER_WAND , RULL(0x27010A92), SH_UNT_C_7 , + SH_ACS_SCOM1_WAND ); +REG64( C_7_V0_HMER_OR , RULL(0x27010A8E), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_V0_HMER_WAND , RULL(0x28010A92), SH_UNT_C_8 , + SH_ACS_SCOM1_WAND ); +REG64( C_8_V0_HMER_OR , RULL(0x28010A8E), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_V0_HMER_WAND , RULL(0x29010A92), SH_UNT_C_9 , + SH_ACS_SCOM1_WAND ); +REG64( C_9_V0_HMER_OR , RULL(0x29010A8E), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_V0_HMER_WAND , RULL(0x2A010A92), SH_UNT_C_10 , + SH_ACS_SCOM1_WAND ); +REG64( C_10_V0_HMER_OR , RULL(0x2A010A8E), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_V0_HMER_WAND , RULL(0x2B010A92), SH_UNT_C_11 , + SH_ACS_SCOM1_WAND ); +REG64( C_11_V0_HMER_OR , RULL(0x2B010A8E), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_V0_HMER_WAND , RULL(0x2C010A92), SH_UNT_C_12 , + SH_ACS_SCOM1_WAND ); +REG64( C_12_V0_HMER_OR , RULL(0x2C010A8E), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_V0_HMER_WAND , RULL(0x2D010A92), SH_UNT_C_13 , + SH_ACS_SCOM1_WAND ); +REG64( C_13_V0_HMER_OR , RULL(0x2D010A8E), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_V0_HMER_WAND , RULL(0x2E010A92), SH_UNT_C_14 , + SH_ACS_SCOM1_WAND ); +REG64( C_14_V0_HMER_OR , RULL(0x2E010A8E), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_V0_HMER_WAND , RULL(0x2F010A92), SH_UNT_C_15 , + SH_ACS_SCOM1_WAND ); +REG64( C_15_V0_HMER_OR , RULL(0x2F010A8E), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_V0_HMER_WAND , RULL(0x30010A92), SH_UNT_C_16 , + SH_ACS_SCOM1_WAND ); +REG64( C_16_V0_HMER_OR , RULL(0x30010A8E), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_V0_HMER_WAND , RULL(0x31010A92), SH_UNT_C_17 , + SH_ACS_SCOM1_WAND ); +REG64( C_17_V0_HMER_OR , RULL(0x31010A8E), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_V0_HMER_WAND , RULL(0x32010A92), SH_UNT_C_18 , + SH_ACS_SCOM1_WAND ); +REG64( C_18_V0_HMER_OR , RULL(0x32010A8E), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_V0_HMER_WAND , RULL(0x33010A92), SH_UNT_C_19 , + SH_ACS_SCOM1_WAND ); +REG64( C_19_V0_HMER_OR , RULL(0x33010A8E), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_V0_HMER_WAND , RULL(0x34010A92), SH_UNT_C_20 , + SH_ACS_SCOM1_WAND ); +REG64( C_20_V0_HMER_OR , RULL(0x34010A8E), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_V0_HMER_WAND , RULL(0x35010A92), SH_UNT_C_21 , + SH_ACS_SCOM1_WAND ); +REG64( C_21_V0_HMER_OR , RULL(0x35010A8E), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_V0_HMER_WAND , RULL(0x36010A92), SH_UNT_C_22 , + SH_ACS_SCOM1_WAND ); +REG64( C_22_V0_HMER_OR , RULL(0x36010A8E), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_V0_HMER_WAND , RULL(0x37010A92), SH_UNT_C_23 , + SH_ACS_SCOM1_WAND ); +REG64( C_23_V0_HMER_OR , RULL(0x37010A8E), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EX_V0_HMER , RULL(0x21010A8E), SH_UNT_EX , + SH_ACS_SCOM2_OR ); //DUPS: 20010A8E, +REG64( EX_0_V0_HMER , RULL(0x21010A8E), SH_UNT_EX_0 , + SH_ACS_SCOM2_OR ); //DUPS: 20010A8E, +REG64( EX_1_V0_HMER , RULL(0x23010A8E), SH_UNT_EX_1 , + SH_ACS_SCOM2_OR ); //DUPS: 22010A8E, +REG64( EX_2_V0_HMER , RULL(0x25010A8E), SH_UNT_EX_2 , + SH_ACS_SCOM2_OR ); //DUPS: 24010A8E, +REG64( EX_3_V0_HMER , RULL(0x27010A8E), SH_UNT_EX_3 , + SH_ACS_SCOM2_OR ); //DUPS: 26010A8E, +REG64( EX_4_V0_HMER , RULL(0x29010A8E), SH_UNT_EX_4 , + SH_ACS_SCOM2_OR ); //DUPS: 28010A8E, +REG64( EX_5_V0_HMER , RULL(0x2B010A8E), SH_UNT_EX_5 , + SH_ACS_SCOM2_OR ); //DUPS: 2A010A8E, +REG64( EX_6_V0_HMER , RULL(0x2D010A8E), SH_UNT_EX_6 , + SH_ACS_SCOM2_OR ); //DUPS: 2C010A8E, +REG64( EX_7_V0_HMER , RULL(0x2F010A8E), SH_UNT_EX_7 , + SH_ACS_SCOM2_OR ); //DUPS: 2E010A8E, +REG64( EX_8_V0_HMER , RULL(0x31010A8E), SH_UNT_EX_8 , + SH_ACS_SCOM2_OR ); //DUPS: 30010A8E, +REG64( EX_9_V0_HMER , RULL(0x33010A8E), SH_UNT_EX_9 , + SH_ACS_SCOM2_OR ); //DUPS: 32010A8E, +REG64( EX_0_L2_V0_HMER , RULL(0x21010A92), SH_UNT_EX_0_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 20010A92, +REG64( EX_10_V0_HMER , RULL(0x35010A8E), SH_UNT_EX_10 , + SH_ACS_SCOM2_OR ); //DUPS: 34010A8E, +REG64( EX_11_V0_HMER , RULL(0x37010A8E), SH_UNT_EX_11 , + SH_ACS_SCOM2_OR ); //DUPS: 36010A8E, +REG64( EX_10_L2_V0_HMER , RULL(0x35010A92), SH_UNT_EX_10_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 34010A92, +REG64( EX_11_L2_V0_HMER , RULL(0x37010A92), SH_UNT_EX_11_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 36010A92, +REG64( EX_1_L2_V0_HMER , RULL(0x23010A92), SH_UNT_EX_1_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 22010A92, +REG64( EX_2_L2_V0_HMER , RULL(0x25010A92), SH_UNT_EX_2_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 24010A92, +REG64( EX_3_L2_V0_HMER , RULL(0x27010A92), SH_UNT_EX_3_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 26010A92, +REG64( EX_4_L2_V0_HMER , RULL(0x29010A92), SH_UNT_EX_4_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 28010A92, +REG64( EX_5_L2_V0_HMER , RULL(0x2B010A92), SH_UNT_EX_5_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 2A010A92, +REG64( EX_6_L2_V0_HMER , RULL(0x2D010A92), SH_UNT_EX_6_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 2C010A92, +REG64( EX_7_L2_V0_HMER , RULL(0x2F010A92), SH_UNT_EX_7_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 2E010A92, +REG64( EX_8_L2_V0_HMER , RULL(0x31010A92), SH_UNT_EX_8_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 30010A92, +REG64( EX_9_L2_V0_HMER , RULL(0x33010A92), SH_UNT_EX_9_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 32010A92, +REG64( EX_L2_V0_HMER , RULL(0x21010A92), SH_UNT_EX_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 20010A92, + +REG64( C_V1_HMER_WAND , RULL(0x20010A93), SH_UNT_C , + SH_ACS_SCOM1_WAND ); +REG64( C_V1_HMER_OR , RULL(0x20010A8F), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_V1_HMER_WAND , RULL(0x20010A93), SH_UNT_C_0 , + SH_ACS_SCOM1_WAND ); +REG64( C_0_V1_HMER_OR , RULL(0x20010A8F), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_V1_HMER_WAND , RULL(0x21010A93), SH_UNT_C_1 , + SH_ACS_SCOM1_WAND ); +REG64( C_1_V1_HMER_OR , RULL(0x21010A8F), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_V1_HMER_WAND , RULL(0x22010A93), SH_UNT_C_2 , + SH_ACS_SCOM1_WAND ); +REG64( C_2_V1_HMER_OR , RULL(0x22010A8F), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_V1_HMER_WAND , RULL(0x23010A93), SH_UNT_C_3 , + SH_ACS_SCOM1_WAND ); +REG64( C_3_V1_HMER_OR , RULL(0x23010A8F), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_V1_HMER_WAND , RULL(0x24010A93), SH_UNT_C_4 , + SH_ACS_SCOM1_WAND ); +REG64( C_4_V1_HMER_OR , RULL(0x24010A8F), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_V1_HMER_WAND , RULL(0x25010A93), SH_UNT_C_5 , + SH_ACS_SCOM1_WAND ); +REG64( C_5_V1_HMER_OR , RULL(0x25010A8F), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_V1_HMER_WAND , RULL(0x26010A93), SH_UNT_C_6 , + SH_ACS_SCOM1_WAND ); +REG64( C_6_V1_HMER_OR , RULL(0x26010A8F), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_V1_HMER_WAND , RULL(0x27010A93), SH_UNT_C_7 , + SH_ACS_SCOM1_WAND ); +REG64( C_7_V1_HMER_OR , RULL(0x27010A8F), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_V1_HMER_WAND , RULL(0x28010A93), SH_UNT_C_8 , + SH_ACS_SCOM1_WAND ); +REG64( C_8_V1_HMER_OR , RULL(0x28010A8F), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_V1_HMER_WAND , RULL(0x29010A93), SH_UNT_C_9 , + SH_ACS_SCOM1_WAND ); +REG64( C_9_V1_HMER_OR , RULL(0x29010A8F), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_V1_HMER_WAND , RULL(0x2A010A93), SH_UNT_C_10 , + SH_ACS_SCOM1_WAND ); +REG64( C_10_V1_HMER_OR , RULL(0x2A010A8F), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_V1_HMER_WAND , RULL(0x2B010A93), SH_UNT_C_11 , + SH_ACS_SCOM1_WAND ); +REG64( C_11_V1_HMER_OR , RULL(0x2B010A8F), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_V1_HMER_WAND , RULL(0x2C010A93), SH_UNT_C_12 , + SH_ACS_SCOM1_WAND ); +REG64( C_12_V1_HMER_OR , RULL(0x2C010A8F), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_V1_HMER_WAND , RULL(0x2D010A93), SH_UNT_C_13 , + SH_ACS_SCOM1_WAND ); +REG64( C_13_V1_HMER_OR , RULL(0x2D010A8F), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_V1_HMER_WAND , RULL(0x2E010A93), SH_UNT_C_14 , + SH_ACS_SCOM1_WAND ); +REG64( C_14_V1_HMER_OR , RULL(0x2E010A8F), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_V1_HMER_WAND , RULL(0x2F010A93), SH_UNT_C_15 , + SH_ACS_SCOM1_WAND ); +REG64( C_15_V1_HMER_OR , RULL(0x2F010A8F), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_V1_HMER_WAND , RULL(0x30010A93), SH_UNT_C_16 , + SH_ACS_SCOM1_WAND ); +REG64( C_16_V1_HMER_OR , RULL(0x30010A8F), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_V1_HMER_WAND , RULL(0x31010A93), SH_UNT_C_17 , + SH_ACS_SCOM1_WAND ); +REG64( C_17_V1_HMER_OR , RULL(0x31010A8F), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_V1_HMER_WAND , RULL(0x32010A93), SH_UNT_C_18 , + SH_ACS_SCOM1_WAND ); +REG64( C_18_V1_HMER_OR , RULL(0x32010A8F), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_V1_HMER_WAND , RULL(0x33010A93), SH_UNT_C_19 , + SH_ACS_SCOM1_WAND ); +REG64( C_19_V1_HMER_OR , RULL(0x33010A8F), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_V1_HMER_WAND , RULL(0x34010A93), SH_UNT_C_20 , + SH_ACS_SCOM1_WAND ); +REG64( C_20_V1_HMER_OR , RULL(0x34010A8F), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_V1_HMER_WAND , RULL(0x35010A93), SH_UNT_C_21 , + SH_ACS_SCOM1_WAND ); +REG64( C_21_V1_HMER_OR , RULL(0x35010A8F), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_V1_HMER_WAND , RULL(0x36010A93), SH_UNT_C_22 , + SH_ACS_SCOM1_WAND ); +REG64( C_22_V1_HMER_OR , RULL(0x36010A8F), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_V1_HMER_WAND , RULL(0x37010A93), SH_UNT_C_23 , + SH_ACS_SCOM1_WAND ); +REG64( C_23_V1_HMER_OR , RULL(0x37010A8F), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EX_V1_HMER , RULL(0x21010A8F), SH_UNT_EX , + SH_ACS_SCOM2_OR ); //DUPS: 20010A8F, +REG64( EX_0_V1_HMER , RULL(0x21010A8F), SH_UNT_EX_0 , + SH_ACS_SCOM2_OR ); //DUPS: 20010A8F, +REG64( EX_1_V1_HMER , RULL(0x23010A8F), SH_UNT_EX_1 , + SH_ACS_SCOM2_OR ); //DUPS: 22010A8F, +REG64( EX_2_V1_HMER , RULL(0x25010A8F), SH_UNT_EX_2 , + SH_ACS_SCOM2_OR ); //DUPS: 24010A8F, +REG64( EX_3_V1_HMER , RULL(0x27010A8F), SH_UNT_EX_3 , + SH_ACS_SCOM2_OR ); //DUPS: 26010A8F, +REG64( EX_4_V1_HMER , RULL(0x29010A8F), SH_UNT_EX_4 , + SH_ACS_SCOM2_OR ); //DUPS: 28010A8F, +REG64( EX_5_V1_HMER , RULL(0x2B010A8F), SH_UNT_EX_5 , + SH_ACS_SCOM2_OR ); //DUPS: 2A010A8F, +REG64( EX_6_V1_HMER , RULL(0x2D010A8F), SH_UNT_EX_6 , + SH_ACS_SCOM2_OR ); //DUPS: 2C010A8F, +REG64( EX_7_V1_HMER , RULL(0x2F010A8F), SH_UNT_EX_7 , + SH_ACS_SCOM2_OR ); //DUPS: 2E010A8F, +REG64( EX_8_V1_HMER , RULL(0x31010A8F), SH_UNT_EX_8 , + SH_ACS_SCOM2_OR ); //DUPS: 30010A8F, +REG64( EX_9_V1_HMER , RULL(0x33010A8F), SH_UNT_EX_9 , + SH_ACS_SCOM2_OR ); //DUPS: 32010A8F, +REG64( EX_0_L2_V1_HMER , RULL(0x21010A93), SH_UNT_EX_0_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 20010A93, +REG64( EX_10_V1_HMER , RULL(0x35010A8F), SH_UNT_EX_10 , + SH_ACS_SCOM2_OR ); //DUPS: 34010A8F, +REG64( EX_11_V1_HMER , RULL(0x37010A8F), SH_UNT_EX_11 , + SH_ACS_SCOM2_OR ); //DUPS: 36010A8F, +REG64( EX_10_L2_V1_HMER , RULL(0x35010A93), SH_UNT_EX_10_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 34010A93, +REG64( EX_11_L2_V1_HMER , RULL(0x37010A93), SH_UNT_EX_11_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 36010A93, +REG64( EX_1_L2_V1_HMER , RULL(0x23010A93), SH_UNT_EX_1_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 22010A93, +REG64( EX_2_L2_V1_HMER , RULL(0x25010A93), SH_UNT_EX_2_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 24010A93, +REG64( EX_3_L2_V1_HMER , RULL(0x27010A93), SH_UNT_EX_3_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 26010A93, +REG64( EX_4_L2_V1_HMER , RULL(0x29010A93), SH_UNT_EX_4_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 28010A93, +REG64( EX_5_L2_V1_HMER , RULL(0x2B010A93), SH_UNT_EX_5_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 2A010A93, +REG64( EX_6_L2_V1_HMER , RULL(0x2D010A93), SH_UNT_EX_6_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 2C010A93, +REG64( EX_7_L2_V1_HMER , RULL(0x2F010A93), SH_UNT_EX_7_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 2E010A93, +REG64( EX_8_L2_V1_HMER , RULL(0x31010A93), SH_UNT_EX_8_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 30010A93, +REG64( EX_9_L2_V1_HMER , RULL(0x33010A93), SH_UNT_EX_9_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 32010A93, +REG64( EX_L2_V1_HMER , RULL(0x21010A93), SH_UNT_EX_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 20010A93, + +REG64( C_V2_HMER_WAND , RULL(0x20010A94), SH_UNT_C , + SH_ACS_SCOM1_WAND ); +REG64( C_V2_HMER_OR , RULL(0x20010A90), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_V2_HMER_WAND , RULL(0x20010A94), SH_UNT_C_0 , + SH_ACS_SCOM1_WAND ); +REG64( C_0_V2_HMER_OR , RULL(0x20010A90), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_V2_HMER_WAND , RULL(0x21010A94), SH_UNT_C_1 , + SH_ACS_SCOM1_WAND ); +REG64( C_1_V2_HMER_OR , RULL(0x21010A90), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_V2_HMER_WAND , RULL(0x22010A94), SH_UNT_C_2 , + SH_ACS_SCOM1_WAND ); +REG64( C_2_V2_HMER_OR , RULL(0x22010A90), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_V2_HMER_WAND , RULL(0x23010A94), SH_UNT_C_3 , + SH_ACS_SCOM1_WAND ); +REG64( C_3_V2_HMER_OR , RULL(0x23010A90), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_V2_HMER_WAND , RULL(0x24010A94), SH_UNT_C_4 , + SH_ACS_SCOM1_WAND ); +REG64( C_4_V2_HMER_OR , RULL(0x24010A90), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_V2_HMER_WAND , RULL(0x25010A94), SH_UNT_C_5 , + SH_ACS_SCOM1_WAND ); +REG64( C_5_V2_HMER_OR , RULL(0x25010A90), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_V2_HMER_WAND , RULL(0x26010A94), SH_UNT_C_6 , + SH_ACS_SCOM1_WAND ); +REG64( C_6_V2_HMER_OR , RULL(0x26010A90), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_V2_HMER_WAND , RULL(0x27010A94), SH_UNT_C_7 , + SH_ACS_SCOM1_WAND ); +REG64( C_7_V2_HMER_OR , RULL(0x27010A90), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_V2_HMER_WAND , RULL(0x28010A94), SH_UNT_C_8 , + SH_ACS_SCOM1_WAND ); +REG64( C_8_V2_HMER_OR , RULL(0x28010A90), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_V2_HMER_WAND , RULL(0x29010A94), SH_UNT_C_9 , + SH_ACS_SCOM1_WAND ); +REG64( C_9_V2_HMER_OR , RULL(0x29010A90), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_V2_HMER_WAND , RULL(0x2A010A94), SH_UNT_C_10 , + SH_ACS_SCOM1_WAND ); +REG64( C_10_V2_HMER_OR , RULL(0x2A010A90), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_V2_HMER_WAND , RULL(0x2B010A94), SH_UNT_C_11 , + SH_ACS_SCOM1_WAND ); +REG64( C_11_V2_HMER_OR , RULL(0x2B010A90), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_V2_HMER_WAND , RULL(0x2C010A94), SH_UNT_C_12 , + SH_ACS_SCOM1_WAND ); +REG64( C_12_V2_HMER_OR , RULL(0x2C010A90), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_V2_HMER_WAND , RULL(0x2D010A94), SH_UNT_C_13 , + SH_ACS_SCOM1_WAND ); +REG64( C_13_V2_HMER_OR , RULL(0x2D010A90), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_V2_HMER_WAND , RULL(0x2E010A94), SH_UNT_C_14 , + SH_ACS_SCOM1_WAND ); +REG64( C_14_V2_HMER_OR , RULL(0x2E010A90), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_V2_HMER_WAND , RULL(0x2F010A94), SH_UNT_C_15 , + SH_ACS_SCOM1_WAND ); +REG64( C_15_V2_HMER_OR , RULL(0x2F010A90), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_V2_HMER_WAND , RULL(0x30010A94), SH_UNT_C_16 , + SH_ACS_SCOM1_WAND ); +REG64( C_16_V2_HMER_OR , RULL(0x30010A90), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_V2_HMER_WAND , RULL(0x31010A94), SH_UNT_C_17 , + SH_ACS_SCOM1_WAND ); +REG64( C_17_V2_HMER_OR , RULL(0x31010A90), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_V2_HMER_WAND , RULL(0x32010A94), SH_UNT_C_18 , + SH_ACS_SCOM1_WAND ); +REG64( C_18_V2_HMER_OR , RULL(0x32010A90), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_V2_HMER_WAND , RULL(0x33010A94), SH_UNT_C_19 , + SH_ACS_SCOM1_WAND ); +REG64( C_19_V2_HMER_OR , RULL(0x33010A90), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_V2_HMER_WAND , RULL(0x34010A94), SH_UNT_C_20 , + SH_ACS_SCOM1_WAND ); +REG64( C_20_V2_HMER_OR , RULL(0x34010A90), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_V2_HMER_WAND , RULL(0x35010A94), SH_UNT_C_21 , + SH_ACS_SCOM1_WAND ); +REG64( C_21_V2_HMER_OR , RULL(0x35010A90), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_V2_HMER_WAND , RULL(0x36010A94), SH_UNT_C_22 , + SH_ACS_SCOM1_WAND ); +REG64( C_22_V2_HMER_OR , RULL(0x36010A90), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_V2_HMER_WAND , RULL(0x37010A94), SH_UNT_C_23 , + SH_ACS_SCOM1_WAND ); +REG64( C_23_V2_HMER_OR , RULL(0x37010A90), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EX_0_L2_V2_HMER_WAND , RULL(0x21010A94), SH_UNT_EX_0_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 20010A94, +REG64( EX_0_L2_V2_HMER_OR , RULL(0x21010A90), SH_UNT_EX_0_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 20010A90, +REG64( EX_10_L2_V2_HMER_WAND , RULL(0x35010A94), SH_UNT_EX_10_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 34010A94, +REG64( EX_10_L2_V2_HMER_OR , RULL(0x35010A90), SH_UNT_EX_10_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 34010A90, +REG64( EX_11_L2_V2_HMER_WAND , RULL(0x37010A94), SH_UNT_EX_11_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 36010A94, +REG64( EX_11_L2_V2_HMER_OR , RULL(0x37010A90), SH_UNT_EX_11_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 36010A90, +REG64( EX_1_L2_V2_HMER_WAND , RULL(0x23010A94), SH_UNT_EX_1_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 22010A94, +REG64( EX_1_L2_V2_HMER_OR , RULL(0x23010A90), SH_UNT_EX_1_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 22010A90, +REG64( EX_2_L2_V2_HMER_WAND , RULL(0x25010A94), SH_UNT_EX_2_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 24010A94, +REG64( EX_2_L2_V2_HMER_OR , RULL(0x25010A90), SH_UNT_EX_2_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 24010A90, +REG64( EX_3_L2_V2_HMER_WAND , RULL(0x27010A94), SH_UNT_EX_3_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 26010A94, +REG64( EX_3_L2_V2_HMER_OR , RULL(0x27010A90), SH_UNT_EX_3_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 26010A90, +REG64( EX_4_L2_V2_HMER_WAND , RULL(0x29010A94), SH_UNT_EX_4_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 28010A94, +REG64( EX_4_L2_V2_HMER_OR , RULL(0x29010A90), SH_UNT_EX_4_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 28010A90, +REG64( EX_5_L2_V2_HMER_WAND , RULL(0x2B010A94), SH_UNT_EX_5_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 2A010A94, +REG64( EX_5_L2_V2_HMER_OR , RULL(0x2B010A90), SH_UNT_EX_5_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 2A010A90, +REG64( EX_6_L2_V2_HMER_WAND , RULL(0x2D010A94), SH_UNT_EX_6_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 2C010A94, +REG64( EX_6_L2_V2_HMER_OR , RULL(0x2D010A90), SH_UNT_EX_6_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 2C010A90, +REG64( EX_7_L2_V2_HMER_WAND , RULL(0x2F010A94), SH_UNT_EX_7_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 2E010A94, +REG64( EX_7_L2_V2_HMER_OR , RULL(0x2F010A90), SH_UNT_EX_7_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 2E010A90, +REG64( EX_8_L2_V2_HMER_WAND , RULL(0x31010A94), SH_UNT_EX_8_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 30010A94, +REG64( EX_8_L2_V2_HMER_OR , RULL(0x31010A90), SH_UNT_EX_8_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 30010A90, +REG64( EX_9_L2_V2_HMER_WAND , RULL(0x33010A94), SH_UNT_EX_9_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 32010A94, +REG64( EX_9_L2_V2_HMER_OR , RULL(0x33010A90), SH_UNT_EX_9_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 32010A90, +REG64( EX_L2_V2_HMER_WAND , RULL(0x21010A94), SH_UNT_EX_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 20010A94, +REG64( EX_L2_V2_HMER_OR , RULL(0x21010A90), SH_UNT_EX_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 20010A90, + +REG64( C_V3_HMER_WAND , RULL(0x20010A95), SH_UNT_C , + SH_ACS_SCOM1_WAND ); +REG64( C_V3_HMER_OR , RULL(0x20010A91), SH_UNT_C , SH_ACS_SCOM2_OR ); +REG64( C_0_V3_HMER_WAND , RULL(0x20010A95), SH_UNT_C_0 , + SH_ACS_SCOM1_WAND ); +REG64( C_0_V3_HMER_OR , RULL(0x20010A91), SH_UNT_C_0 , SH_ACS_SCOM2_OR ); +REG64( C_1_V3_HMER_WAND , RULL(0x21010A95), SH_UNT_C_1 , + SH_ACS_SCOM1_WAND ); +REG64( C_1_V3_HMER_OR , RULL(0x21010A91), SH_UNT_C_1 , SH_ACS_SCOM2_OR ); +REG64( C_2_V3_HMER_WAND , RULL(0x22010A95), SH_UNT_C_2 , + SH_ACS_SCOM1_WAND ); +REG64( C_2_V3_HMER_OR , RULL(0x22010A91), SH_UNT_C_2 , SH_ACS_SCOM2_OR ); +REG64( C_3_V3_HMER_WAND , RULL(0x23010A95), SH_UNT_C_3 , + SH_ACS_SCOM1_WAND ); +REG64( C_3_V3_HMER_OR , RULL(0x23010A91), SH_UNT_C_3 , SH_ACS_SCOM2_OR ); +REG64( C_4_V3_HMER_WAND , RULL(0x24010A95), SH_UNT_C_4 , + SH_ACS_SCOM1_WAND ); +REG64( C_4_V3_HMER_OR , RULL(0x24010A91), SH_UNT_C_4 , SH_ACS_SCOM2_OR ); +REG64( C_5_V3_HMER_WAND , RULL(0x25010A95), SH_UNT_C_5 , + SH_ACS_SCOM1_WAND ); +REG64( C_5_V3_HMER_OR , RULL(0x25010A91), SH_UNT_C_5 , SH_ACS_SCOM2_OR ); +REG64( C_6_V3_HMER_WAND , RULL(0x26010A95), SH_UNT_C_6 , + SH_ACS_SCOM1_WAND ); +REG64( C_6_V3_HMER_OR , RULL(0x26010A91), SH_UNT_C_6 , SH_ACS_SCOM2_OR ); +REG64( C_7_V3_HMER_WAND , RULL(0x27010A95), SH_UNT_C_7 , + SH_ACS_SCOM1_WAND ); +REG64( C_7_V3_HMER_OR , RULL(0x27010A91), SH_UNT_C_7 , SH_ACS_SCOM2_OR ); +REG64( C_8_V3_HMER_WAND , RULL(0x28010A95), SH_UNT_C_8 , + SH_ACS_SCOM1_WAND ); +REG64( C_8_V3_HMER_OR , RULL(0x28010A91), SH_UNT_C_8 , SH_ACS_SCOM2_OR ); +REG64( C_9_V3_HMER_WAND , RULL(0x29010A95), SH_UNT_C_9 , + SH_ACS_SCOM1_WAND ); +REG64( C_9_V3_HMER_OR , RULL(0x29010A91), SH_UNT_C_9 , SH_ACS_SCOM2_OR ); +REG64( C_10_V3_HMER_WAND , RULL(0x2A010A95), SH_UNT_C_10 , + SH_ACS_SCOM1_WAND ); +REG64( C_10_V3_HMER_OR , RULL(0x2A010A91), SH_UNT_C_10 , SH_ACS_SCOM2_OR ); +REG64( C_11_V3_HMER_WAND , RULL(0x2B010A95), SH_UNT_C_11 , + SH_ACS_SCOM1_WAND ); +REG64( C_11_V3_HMER_OR , RULL(0x2B010A91), SH_UNT_C_11 , SH_ACS_SCOM2_OR ); +REG64( C_12_V3_HMER_WAND , RULL(0x2C010A95), SH_UNT_C_12 , + SH_ACS_SCOM1_WAND ); +REG64( C_12_V3_HMER_OR , RULL(0x2C010A91), SH_UNT_C_12 , SH_ACS_SCOM2_OR ); +REG64( C_13_V3_HMER_WAND , RULL(0x2D010A95), SH_UNT_C_13 , + SH_ACS_SCOM1_WAND ); +REG64( C_13_V3_HMER_OR , RULL(0x2D010A91), SH_UNT_C_13 , SH_ACS_SCOM2_OR ); +REG64( C_14_V3_HMER_WAND , RULL(0x2E010A95), SH_UNT_C_14 , + SH_ACS_SCOM1_WAND ); +REG64( C_14_V3_HMER_OR , RULL(0x2E010A91), SH_UNT_C_14 , SH_ACS_SCOM2_OR ); +REG64( C_15_V3_HMER_WAND , RULL(0x2F010A95), SH_UNT_C_15 , + SH_ACS_SCOM1_WAND ); +REG64( C_15_V3_HMER_OR , RULL(0x2F010A91), SH_UNT_C_15 , SH_ACS_SCOM2_OR ); +REG64( C_16_V3_HMER_WAND , RULL(0x30010A95), SH_UNT_C_16 , + SH_ACS_SCOM1_WAND ); +REG64( C_16_V3_HMER_OR , RULL(0x30010A91), SH_UNT_C_16 , SH_ACS_SCOM2_OR ); +REG64( C_17_V3_HMER_WAND , RULL(0x31010A95), SH_UNT_C_17 , + SH_ACS_SCOM1_WAND ); +REG64( C_17_V3_HMER_OR , RULL(0x31010A91), SH_UNT_C_17 , SH_ACS_SCOM2_OR ); +REG64( C_18_V3_HMER_WAND , RULL(0x32010A95), SH_UNT_C_18 , + SH_ACS_SCOM1_WAND ); +REG64( C_18_V3_HMER_OR , RULL(0x32010A91), SH_UNT_C_18 , SH_ACS_SCOM2_OR ); +REG64( C_19_V3_HMER_WAND , RULL(0x33010A95), SH_UNT_C_19 , + SH_ACS_SCOM1_WAND ); +REG64( C_19_V3_HMER_OR , RULL(0x33010A91), SH_UNT_C_19 , SH_ACS_SCOM2_OR ); +REG64( C_20_V3_HMER_WAND , RULL(0x34010A95), SH_UNT_C_20 , + SH_ACS_SCOM1_WAND ); +REG64( C_20_V3_HMER_OR , RULL(0x34010A91), SH_UNT_C_20 , SH_ACS_SCOM2_OR ); +REG64( C_21_V3_HMER_WAND , RULL(0x35010A95), SH_UNT_C_21 , + SH_ACS_SCOM1_WAND ); +REG64( C_21_V3_HMER_OR , RULL(0x35010A91), SH_UNT_C_21 , SH_ACS_SCOM2_OR ); +REG64( C_22_V3_HMER_WAND , RULL(0x36010A95), SH_UNT_C_22 , + SH_ACS_SCOM1_WAND ); +REG64( C_22_V3_HMER_OR , RULL(0x36010A91), SH_UNT_C_22 , SH_ACS_SCOM2_OR ); +REG64( C_23_V3_HMER_WAND , RULL(0x37010A95), SH_UNT_C_23 , + SH_ACS_SCOM1_WAND ); +REG64( C_23_V3_HMER_OR , RULL(0x37010A91), SH_UNT_C_23 , SH_ACS_SCOM2_OR ); +REG64( EX_0_L2_V3_HMER_WAND , RULL(0x21010A95), SH_UNT_EX_0_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 20010A95, +REG64( EX_0_L2_V3_HMER_OR , RULL(0x21010A91), SH_UNT_EX_0_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 20010A91, +REG64( EX_10_L2_V3_HMER_WAND , RULL(0x35010A95), SH_UNT_EX_10_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 34010A95, +REG64( EX_10_L2_V3_HMER_OR , RULL(0x35010A91), SH_UNT_EX_10_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 34010A91, +REG64( EX_11_L2_V3_HMER_WAND , RULL(0x37010A95), SH_UNT_EX_11_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 36010A95, +REG64( EX_11_L2_V3_HMER_OR , RULL(0x37010A91), SH_UNT_EX_11_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 36010A91, +REG64( EX_1_L2_V3_HMER_WAND , RULL(0x23010A95), SH_UNT_EX_1_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 22010A95, +REG64( EX_1_L2_V3_HMER_OR , RULL(0x23010A91), SH_UNT_EX_1_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 22010A91, +REG64( EX_2_L2_V3_HMER_WAND , RULL(0x25010A95), SH_UNT_EX_2_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 24010A95, +REG64( EX_2_L2_V3_HMER_OR , RULL(0x25010A91), SH_UNT_EX_2_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 24010A91, +REG64( EX_3_L2_V3_HMER_WAND , RULL(0x27010A95), SH_UNT_EX_3_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 26010A95, +REG64( EX_3_L2_V3_HMER_OR , RULL(0x27010A91), SH_UNT_EX_3_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 26010A91, +REG64( EX_4_L2_V3_HMER_WAND , RULL(0x29010A95), SH_UNT_EX_4_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 28010A95, +REG64( EX_4_L2_V3_HMER_OR , RULL(0x29010A91), SH_UNT_EX_4_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 28010A91, +REG64( EX_5_L2_V3_HMER_WAND , RULL(0x2B010A95), SH_UNT_EX_5_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 2A010A95, +REG64( EX_5_L2_V3_HMER_OR , RULL(0x2B010A91), SH_UNT_EX_5_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 2A010A91, +REG64( EX_6_L2_V3_HMER_WAND , RULL(0x2D010A95), SH_UNT_EX_6_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 2C010A95, +REG64( EX_6_L2_V3_HMER_OR , RULL(0x2D010A91), SH_UNT_EX_6_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 2C010A91, +REG64( EX_7_L2_V3_HMER_WAND , RULL(0x2F010A95), SH_UNT_EX_7_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 2E010A95, +REG64( EX_7_L2_V3_HMER_OR , RULL(0x2F010A91), SH_UNT_EX_7_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 2E010A91, +REG64( EX_8_L2_V3_HMER_WAND , RULL(0x31010A95), SH_UNT_EX_8_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 30010A95, +REG64( EX_8_L2_V3_HMER_OR , RULL(0x31010A91), SH_UNT_EX_8_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 30010A91, +REG64( EX_9_L2_V3_HMER_WAND , RULL(0x33010A95), SH_UNT_EX_9_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 32010A95, +REG64( EX_9_L2_V3_HMER_OR , RULL(0x33010A91), SH_UNT_EX_9_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 32010A91, +REG64( EX_L2_V3_HMER_WAND , RULL(0x21010A95), SH_UNT_EX_L2 , + SH_ACS_SCOM1_WAND ); //DUPS: 20010A95, +REG64( EX_L2_V3_HMER_OR , RULL(0x21010A91), SH_UNT_EX_L2 , + SH_ACS_SCOM2_OR ); //DUPS: 20010A91, + +REG64( C_VITAL_SCAN_OUT , RULL(0x200F0017), SH_UNT_C , SH_ACS_SCOM_RO ); +REG64( C_0_VITAL_SCAN_OUT , RULL(0x200F0017), SH_UNT_C_0 , SH_ACS_SCOM_RO ); +REG64( C_1_VITAL_SCAN_OUT , RULL(0x210F0017), SH_UNT_C_1 , SH_ACS_SCOM_RO ); +REG64( C_2_VITAL_SCAN_OUT , RULL(0x220F0017), SH_UNT_C_2 , SH_ACS_SCOM_RO ); +REG64( C_3_VITAL_SCAN_OUT , RULL(0x230F0017), SH_UNT_C_3 , SH_ACS_SCOM_RO ); +REG64( C_4_VITAL_SCAN_OUT , RULL(0x240F0017), SH_UNT_C_4 , SH_ACS_SCOM_RO ); +REG64( C_5_VITAL_SCAN_OUT , RULL(0x250F0017), SH_UNT_C_5 , SH_ACS_SCOM_RO ); +REG64( C_6_VITAL_SCAN_OUT , RULL(0x260F0017), SH_UNT_C_6 , SH_ACS_SCOM_RO ); +REG64( C_7_VITAL_SCAN_OUT , RULL(0x270F0017), SH_UNT_C_7 , SH_ACS_SCOM_RO ); +REG64( C_8_VITAL_SCAN_OUT , RULL(0x280F0017), SH_UNT_C_8 , SH_ACS_SCOM_RO ); +REG64( C_9_VITAL_SCAN_OUT , RULL(0x290F0017), SH_UNT_C_9 , SH_ACS_SCOM_RO ); +REG64( C_10_VITAL_SCAN_OUT , RULL(0x2A0F0017), SH_UNT_C_10 , SH_ACS_SCOM_RO ); +REG64( C_11_VITAL_SCAN_OUT , RULL(0x2B0F0017), SH_UNT_C_11 , SH_ACS_SCOM_RO ); +REG64( C_12_VITAL_SCAN_OUT , RULL(0x2C0F0017), SH_UNT_C_12 , SH_ACS_SCOM_RO ); +REG64( C_13_VITAL_SCAN_OUT , RULL(0x2D0F0017), SH_UNT_C_13 , SH_ACS_SCOM_RO ); +REG64( C_14_VITAL_SCAN_OUT , RULL(0x2E0F0017), SH_UNT_C_14 , SH_ACS_SCOM_RO ); +REG64( C_15_VITAL_SCAN_OUT , RULL(0x2F0F0017), SH_UNT_C_15 , SH_ACS_SCOM_RO ); +REG64( C_16_VITAL_SCAN_OUT , RULL(0x300F0017), SH_UNT_C_16 , SH_ACS_SCOM_RO ); +REG64( C_17_VITAL_SCAN_OUT , RULL(0x310F0017), SH_UNT_C_17 , SH_ACS_SCOM_RO ); +REG64( C_18_VITAL_SCAN_OUT , RULL(0x320F0017), SH_UNT_C_18 , SH_ACS_SCOM_RO ); +REG64( C_19_VITAL_SCAN_OUT , RULL(0x330F0017), SH_UNT_C_19 , SH_ACS_SCOM_RO ); +REG64( C_20_VITAL_SCAN_OUT , RULL(0x340F0017), SH_UNT_C_20 , SH_ACS_SCOM_RO ); +REG64( C_21_VITAL_SCAN_OUT , RULL(0x350F0017), SH_UNT_C_21 , SH_ACS_SCOM_RO ); +REG64( C_22_VITAL_SCAN_OUT , RULL(0x360F0017), SH_UNT_C_22 , SH_ACS_SCOM_RO ); +REG64( C_23_VITAL_SCAN_OUT , RULL(0x370F0017), SH_UNT_C_23 , SH_ACS_SCOM_RO ); +REG64( EQ_VITAL_SCAN_OUT , RULL(0x100F0017), SH_UNT_EQ , SH_ACS_SCOM_RO ); +REG64( EQ_0_VITAL_SCAN_OUT , RULL(0x100F0017), SH_UNT_EQ_0 , SH_ACS_SCOM_RO ); +REG64( EQ_1_VITAL_SCAN_OUT , RULL(0x110F0017), SH_UNT_EQ_1 , SH_ACS_SCOM_RO ); +REG64( EQ_2_VITAL_SCAN_OUT , RULL(0x120F0017), SH_UNT_EQ_2 , SH_ACS_SCOM_RO ); +REG64( EQ_3_VITAL_SCAN_OUT , RULL(0x130F0017), SH_UNT_EQ_3 , SH_ACS_SCOM_RO ); +REG64( EQ_4_VITAL_SCAN_OUT , RULL(0x140F0017), SH_UNT_EQ_4 , SH_ACS_SCOM_RO ); +REG64( EQ_5_VITAL_SCAN_OUT , RULL(0x150F0017), SH_UNT_EQ_5 , SH_ACS_SCOM_RO ); +REG64( EX_VITAL_SCAN_OUT , RULL(0x200F0017), SH_UNT_EX , + SH_ACS_SCOM_RO ); //DUPS: 210F0017, +REG64( EX_0_VITAL_SCAN_OUT , RULL(0x200F0017), SH_UNT_EX_0 , + SH_ACS_SCOM_RO ); //DUPS: 210F0017, +REG64( EX_1_VITAL_SCAN_OUT , RULL(0x230F0017), SH_UNT_EX_1 , + SH_ACS_SCOM_RO ); //DUPS: 220F0017, +REG64( EX_2_VITAL_SCAN_OUT , RULL(0x240F0017), SH_UNT_EX_2 , + SH_ACS_SCOM_RO ); //DUPS: 250F0017, +REG64( EX_3_VITAL_SCAN_OUT , RULL(0x260F0017), SH_UNT_EX_3 , + SH_ACS_SCOM_RO ); //DUPS: 270F0017, +REG64( EX_4_VITAL_SCAN_OUT , RULL(0x280F0017), SH_UNT_EX_4 , + SH_ACS_SCOM_RO ); //DUPS: 290F0017, +REG64( EX_5_VITAL_SCAN_OUT , RULL(0x2A0F0017), SH_UNT_EX_5 , + SH_ACS_SCOM_RO ); //DUPS: 2B0F0017, +REG64( EX_6_VITAL_SCAN_OUT , RULL(0x2C0F0017), SH_UNT_EX_6 , + SH_ACS_SCOM_RO ); //DUPS: 2D0F0017, +REG64( EX_7_VITAL_SCAN_OUT , RULL(0x2E0F0017), SH_UNT_EX_7 , + SH_ACS_SCOM_RO ); //DUPS: 2F0F0017, +REG64( EX_8_VITAL_SCAN_OUT , RULL(0x300F0017), SH_UNT_EX_8 , + SH_ACS_SCOM_RO ); //DUPS: 310F0017, +REG64( EX_9_VITAL_SCAN_OUT , RULL(0x320F0017), SH_UNT_EX_9 , + SH_ACS_SCOM_RO ); //DUPS: 330F0017, +REG64( EX_10_VITAL_SCAN_OUT , RULL(0x340F0017), SH_UNT_EX_10 , + SH_ACS_SCOM_RO ); //DUPS: 350F0017, +REG64( EX_11_VITAL_SCAN_OUT , RULL(0x360F0017), SH_UNT_EX_11 , + SH_ACS_SCOM_RO ); //DUPS: 370F0017, + +REG64( EQ_WR_EPS_REG , RULL(0x10010811), SH_UNT_EQ , + SH_ACS_SCOM ); //DUPS: 10010C11, +REG64( EQ_0_WR_EPS_REG , RULL(0x10010811), SH_UNT_EQ_0 , + SH_ACS_SCOM ); //DUPS: 10010C11, +REG64( EQ_1_WR_EPS_REG , RULL(0x11010811), SH_UNT_EQ_1 , + SH_ACS_SCOM ); //DUPS: 11010C11, +REG64( EQ_2_WR_EPS_REG , RULL(0x12010811), SH_UNT_EQ_2 , + SH_ACS_SCOM ); //DUPS: 12010C11, +REG64( EQ_3_WR_EPS_REG , RULL(0x13010811), SH_UNT_EQ_3 , + SH_ACS_SCOM ); //DUPS: 13010C11, +REG64( EQ_4_WR_EPS_REG , RULL(0x14010811), SH_UNT_EQ_4 , + SH_ACS_SCOM ); //DUPS: 14010C11, +REG64( EQ_5_WR_EPS_REG , RULL(0x15010811), SH_UNT_EQ_5 , + SH_ACS_SCOM ); //DUPS: 15010C11, +REG64( EX_0_L2_WR_EPS_REG , RULL(0x10010811), SH_UNT_EX_0_L2 , SH_ACS_SCOM ); +REG64( EX_10_L2_WR_EPS_REG , RULL(0x15010811), SH_UNT_EX_10_L2 , SH_ACS_SCOM ); +REG64( EX_11_L2_WR_EPS_REG , RULL(0x15010C11), SH_UNT_EX_11_L2 , SH_ACS_SCOM ); +REG64( EX_1_L2_WR_EPS_REG , RULL(0x10010C11), SH_UNT_EX_1_L2 , SH_ACS_SCOM ); +REG64( EX_2_L2_WR_EPS_REG , RULL(0x11010811), SH_UNT_EX_2_L2 , SH_ACS_SCOM ); +REG64( EX_3_L2_WR_EPS_REG , RULL(0x11010C11), SH_UNT_EX_3_L2 , SH_ACS_SCOM ); +REG64( EX_4_L2_WR_EPS_REG , RULL(0x12010811), SH_UNT_EX_4_L2 , SH_ACS_SCOM ); +REG64( EX_5_L2_WR_EPS_REG , RULL(0x12010C11), SH_UNT_EX_5_L2 , SH_ACS_SCOM ); +REG64( EX_6_L2_WR_EPS_REG , RULL(0x13010811), SH_UNT_EX_6_L2 , SH_ACS_SCOM ); +REG64( EX_7_L2_WR_EPS_REG , RULL(0x13010C11), SH_UNT_EX_7_L2 , SH_ACS_SCOM ); +REG64( EX_8_L2_WR_EPS_REG , RULL(0x14010811), SH_UNT_EX_8_L2 , SH_ACS_SCOM ); +REG64( EX_9_L2_WR_EPS_REG , RULL(0x14010C11), SH_UNT_EX_9_L2 , SH_ACS_SCOM ); +REG64( EX_L2_WR_EPS_REG , RULL(0x10010811), SH_UNT_EX_L2 , SH_ACS_SCOM ); + +REG64( CAPP_XPT_CONTROL , RULL(0x0201081C), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_XPT_CONTROL , RULL(0x0201081C), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_XPT_CONTROL , RULL(0x0401081C), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( CAPP_XPT_PMU_EVENTS_SEL , RULL(0x02010822), SH_UNT_CAPP , SH_ACS_SCOM ); +REG64( CAPP_0_XPT_PMU_EVENTS_SEL , RULL(0x02010822), SH_UNT_CAPP_0 , SH_ACS_SCOM ); +REG64( CAPP_1_XPT_PMU_EVENTS_SEL , RULL(0x04010822), SH_UNT_CAPP_1 , SH_ACS_SCOM ); + +REG64( C_XSTOP1 , RULL(0x2003000C), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_XSTOP1 , RULL(0x2003000C), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_XSTOP1 , RULL(0x2103000C), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_XSTOP1 , RULL(0x2203000C), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_XSTOP1 , RULL(0x2303000C), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_XSTOP1 , RULL(0x2403000C), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_XSTOP1 , RULL(0x2503000C), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_XSTOP1 , RULL(0x2603000C), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_XSTOP1 , RULL(0x2703000C), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_XSTOP1 , RULL(0x2803000C), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_XSTOP1 , RULL(0x2903000C), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_XSTOP1 , RULL(0x2A03000C), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_XSTOP1 , RULL(0x2B03000C), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_XSTOP1 , RULL(0x2C03000C), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_XSTOP1 , RULL(0x2D03000C), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_XSTOP1 , RULL(0x2E03000C), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_XSTOP1 , RULL(0x2F03000C), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_XSTOP1 , RULL(0x3003000C), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_XSTOP1 , RULL(0x3103000C), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_XSTOP1 , RULL(0x3203000C), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_XSTOP1 , RULL(0x3303000C), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_XSTOP1 , RULL(0x3403000C), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_XSTOP1 , RULL(0x3503000C), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_XSTOP1 , RULL(0x3603000C), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_XSTOP1 , RULL(0x3703000C), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_XSTOP1 , RULL(0x1003000C), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_XSTOP1 , RULL(0x1003000C), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_XSTOP1 , RULL(0x1103000C), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_XSTOP1 , RULL(0x1203000C), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_XSTOP1 , RULL(0x1303000C), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_XSTOP1 , RULL(0x1403000C), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_XSTOP1 , RULL(0x1503000C), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_XSTOP1 , RULL(0x2003000C), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 2103000C, +REG64( EX_0_XSTOP1 , RULL(0x2003000C), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 2103000C, +REG64( EX_1_XSTOP1 , RULL(0x2203000C), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 2303000C, +REG64( EX_2_XSTOP1 , RULL(0x2403000C), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 2503000C, +REG64( EX_3_XSTOP1 , RULL(0x2603000C), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 2703000C, +REG64( EX_4_XSTOP1 , RULL(0x2803000C), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 2903000C, +REG64( EX_5_XSTOP1 , RULL(0x2A03000C), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B03000C, +REG64( EX_6_XSTOP1 , RULL(0x2C03000C), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D03000C, +REG64( EX_7_XSTOP1 , RULL(0x2E03000C), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F03000C, +REG64( EX_8_XSTOP1 , RULL(0x3003000C), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 3103000C, +REG64( EX_9_XSTOP1 , RULL(0x3203000C), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 3303000C, +REG64( EX_10_XSTOP1 , RULL(0x3403000C), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 3503000C, +REG64( EX_11_XSTOP1 , RULL(0x3603000C), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 3703000C, + +REG64( C_XSTOP2 , RULL(0x2003000D), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_XSTOP2 , RULL(0x2003000D), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_XSTOP2 , RULL(0x2103000D), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_XSTOP2 , RULL(0x2203000D), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_XSTOP2 , RULL(0x2303000D), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_XSTOP2 , RULL(0x2403000D), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_XSTOP2 , RULL(0x2503000D), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_XSTOP2 , RULL(0x2603000D), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_XSTOP2 , RULL(0x2703000D), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_XSTOP2 , RULL(0x2803000D), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_XSTOP2 , RULL(0x2903000D), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_XSTOP2 , RULL(0x2A03000D), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_XSTOP2 , RULL(0x2B03000D), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_XSTOP2 , RULL(0x2C03000D), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_XSTOP2 , RULL(0x2D03000D), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_XSTOP2 , RULL(0x2E03000D), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_XSTOP2 , RULL(0x2F03000D), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_XSTOP2 , RULL(0x3003000D), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_XSTOP2 , RULL(0x3103000D), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_XSTOP2 , RULL(0x3203000D), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_XSTOP2 , RULL(0x3303000D), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_XSTOP2 , RULL(0x3403000D), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_XSTOP2 , RULL(0x3503000D), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_XSTOP2 , RULL(0x3603000D), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_XSTOP2 , RULL(0x3703000D), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_XSTOP2 , RULL(0x1003000D), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_XSTOP2 , RULL(0x1003000D), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_XSTOP2 , RULL(0x1103000D), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_XSTOP2 , RULL(0x1203000D), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_XSTOP2 , RULL(0x1303000D), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_XSTOP2 , RULL(0x1403000D), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_XSTOP2 , RULL(0x1503000D), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_XSTOP2 , RULL(0x2003000D), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 2103000D, +REG64( EX_0_XSTOP2 , RULL(0x2003000D), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 2103000D, +REG64( EX_1_XSTOP2 , RULL(0x2203000D), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 2303000D, +REG64( EX_2_XSTOP2 , RULL(0x2403000D), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 2503000D, +REG64( EX_3_XSTOP2 , RULL(0x2603000D), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 2703000D, +REG64( EX_4_XSTOP2 , RULL(0x2803000D), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 2903000D, +REG64( EX_5_XSTOP2 , RULL(0x2A03000D), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B03000D, +REG64( EX_6_XSTOP2 , RULL(0x2C03000D), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D03000D, +REG64( EX_7_XSTOP2 , RULL(0x2E03000D), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F03000D, +REG64( EX_8_XSTOP2 , RULL(0x3003000D), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 3103000D, +REG64( EX_9_XSTOP2 , RULL(0x3203000D), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 3303000D, +REG64( EX_10_XSTOP2 , RULL(0x3403000D), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 3503000D, +REG64( EX_11_XSTOP2 , RULL(0x3603000D), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 3703000D, + +REG64( C_XSTOP3 , RULL(0x2003000E), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_XSTOP3 , RULL(0x2003000E), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_XSTOP3 , RULL(0x2103000E), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_XSTOP3 , RULL(0x2203000E), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_XSTOP3 , RULL(0x2303000E), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_XSTOP3 , RULL(0x2403000E), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_XSTOP3 , RULL(0x2503000E), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_XSTOP3 , RULL(0x2603000E), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_XSTOP3 , RULL(0x2703000E), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_XSTOP3 , RULL(0x2803000E), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_XSTOP3 , RULL(0x2903000E), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_XSTOP3 , RULL(0x2A03000E), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_XSTOP3 , RULL(0x2B03000E), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_XSTOP3 , RULL(0x2C03000E), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_XSTOP3 , RULL(0x2D03000E), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_XSTOP3 , RULL(0x2E03000E), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_XSTOP3 , RULL(0x2F03000E), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_XSTOP3 , RULL(0x3003000E), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_XSTOP3 , RULL(0x3103000E), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_XSTOP3 , RULL(0x3203000E), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_XSTOP3 , RULL(0x3303000E), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_XSTOP3 , RULL(0x3403000E), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_XSTOP3 , RULL(0x3503000E), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_XSTOP3 , RULL(0x3603000E), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_XSTOP3 , RULL(0x3703000E), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_XSTOP3 , RULL(0x1003000E), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_XSTOP3 , RULL(0x1003000E), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_XSTOP3 , RULL(0x1103000E), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_XSTOP3 , RULL(0x1203000E), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_XSTOP3 , RULL(0x1303000E), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_XSTOP3 , RULL(0x1403000E), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_XSTOP3 , RULL(0x1503000E), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_XSTOP3 , RULL(0x2003000E), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 2103000E, +REG64( EX_0_XSTOP3 , RULL(0x2003000E), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 2103000E, +REG64( EX_1_XSTOP3 , RULL(0x2203000E), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 2303000E, +REG64( EX_2_XSTOP3 , RULL(0x2403000E), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 2503000E, +REG64( EX_3_XSTOP3 , RULL(0x2603000E), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 2703000E, +REG64( EX_4_XSTOP3 , RULL(0x2803000E), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 2903000E, +REG64( EX_5_XSTOP3 , RULL(0x2A03000E), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B03000E, +REG64( EX_6_XSTOP3 , RULL(0x2C03000E), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D03000E, +REG64( EX_7_XSTOP3 , RULL(0x2E03000E), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F03000E, +REG64( EX_8_XSTOP3 , RULL(0x3003000E), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 3103000E, +REG64( EX_9_XSTOP3 , RULL(0x3203000E), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 3303000E, +REG64( EX_10_XSTOP3 , RULL(0x3403000E), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 3503000E, +REG64( EX_11_XSTOP3 , RULL(0x3603000E), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 3703000E, + +REG64( C_XSTOP_INTERRUPT_REG , RULL(0x200F001C), SH_UNT_C , SH_ACS_SCOM ); +REG64( C_0_XSTOP_INTERRUPT_REG , RULL(0x200F001C), SH_UNT_C_0 , SH_ACS_SCOM ); +REG64( C_1_XSTOP_INTERRUPT_REG , RULL(0x210F001C), SH_UNT_C_1 , SH_ACS_SCOM ); +REG64( C_2_XSTOP_INTERRUPT_REG , RULL(0x220F001C), SH_UNT_C_2 , SH_ACS_SCOM ); +REG64( C_3_XSTOP_INTERRUPT_REG , RULL(0x230F001C), SH_UNT_C_3 , SH_ACS_SCOM ); +REG64( C_4_XSTOP_INTERRUPT_REG , RULL(0x240F001C), SH_UNT_C_4 , SH_ACS_SCOM ); +REG64( C_5_XSTOP_INTERRUPT_REG , RULL(0x250F001C), SH_UNT_C_5 , SH_ACS_SCOM ); +REG64( C_6_XSTOP_INTERRUPT_REG , RULL(0x260F001C), SH_UNT_C_6 , SH_ACS_SCOM ); +REG64( C_7_XSTOP_INTERRUPT_REG , RULL(0x270F001C), SH_UNT_C_7 , SH_ACS_SCOM ); +REG64( C_8_XSTOP_INTERRUPT_REG , RULL(0x280F001C), SH_UNT_C_8 , SH_ACS_SCOM ); +REG64( C_9_XSTOP_INTERRUPT_REG , RULL(0x290F001C), SH_UNT_C_9 , SH_ACS_SCOM ); +REG64( C_10_XSTOP_INTERRUPT_REG , RULL(0x2A0F001C), SH_UNT_C_10 , SH_ACS_SCOM ); +REG64( C_11_XSTOP_INTERRUPT_REG , RULL(0x2B0F001C), SH_UNT_C_11 , SH_ACS_SCOM ); +REG64( C_12_XSTOP_INTERRUPT_REG , RULL(0x2C0F001C), SH_UNT_C_12 , SH_ACS_SCOM ); +REG64( C_13_XSTOP_INTERRUPT_REG , RULL(0x2D0F001C), SH_UNT_C_13 , SH_ACS_SCOM ); +REG64( C_14_XSTOP_INTERRUPT_REG , RULL(0x2E0F001C), SH_UNT_C_14 , SH_ACS_SCOM ); +REG64( C_15_XSTOP_INTERRUPT_REG , RULL(0x2F0F001C), SH_UNT_C_15 , SH_ACS_SCOM ); +REG64( C_16_XSTOP_INTERRUPT_REG , RULL(0x300F001C), SH_UNT_C_16 , SH_ACS_SCOM ); +REG64( C_17_XSTOP_INTERRUPT_REG , RULL(0x310F001C), SH_UNT_C_17 , SH_ACS_SCOM ); +REG64( C_18_XSTOP_INTERRUPT_REG , RULL(0x320F001C), SH_UNT_C_18 , SH_ACS_SCOM ); +REG64( C_19_XSTOP_INTERRUPT_REG , RULL(0x330F001C), SH_UNT_C_19 , SH_ACS_SCOM ); +REG64( C_20_XSTOP_INTERRUPT_REG , RULL(0x340F001C), SH_UNT_C_20 , SH_ACS_SCOM ); +REG64( C_21_XSTOP_INTERRUPT_REG , RULL(0x350F001C), SH_UNT_C_21 , SH_ACS_SCOM ); +REG64( C_22_XSTOP_INTERRUPT_REG , RULL(0x360F001C), SH_UNT_C_22 , SH_ACS_SCOM ); +REG64( C_23_XSTOP_INTERRUPT_REG , RULL(0x370F001C), SH_UNT_C_23 , SH_ACS_SCOM ); +REG64( EQ_XSTOP_INTERRUPT_REG , RULL(0x100F001C), SH_UNT_EQ , SH_ACS_SCOM ); +REG64( EQ_0_XSTOP_INTERRUPT_REG , RULL(0x100F001C), SH_UNT_EQ_0 , SH_ACS_SCOM ); +REG64( EQ_1_XSTOP_INTERRUPT_REG , RULL(0x110F001C), SH_UNT_EQ_1 , SH_ACS_SCOM ); +REG64( EQ_2_XSTOP_INTERRUPT_REG , RULL(0x120F001C), SH_UNT_EQ_2 , SH_ACS_SCOM ); +REG64( EQ_3_XSTOP_INTERRUPT_REG , RULL(0x130F001C), SH_UNT_EQ_3 , SH_ACS_SCOM ); +REG64( EQ_4_XSTOP_INTERRUPT_REG , RULL(0x140F001C), SH_UNT_EQ_4 , SH_ACS_SCOM ); +REG64( EQ_5_XSTOP_INTERRUPT_REG , RULL(0x150F001C), SH_UNT_EQ_5 , SH_ACS_SCOM ); +REG64( EX_XSTOP_INTERRUPT_REG , RULL(0x200F001C), SH_UNT_EX , + SH_ACS_SCOM ); //DUPS: 210F001C, +REG64( EX_0_XSTOP_INTERRUPT_REG , RULL(0x200F001C), SH_UNT_EX_0 , + SH_ACS_SCOM ); //DUPS: 210F001C, +REG64( EX_1_XSTOP_INTERRUPT_REG , RULL(0x230F001C), SH_UNT_EX_1 , + SH_ACS_SCOM ); //DUPS: 220F001C, +REG64( EX_2_XSTOP_INTERRUPT_REG , RULL(0x240F001C), SH_UNT_EX_2 , + SH_ACS_SCOM ); //DUPS: 250F001C, +REG64( EX_3_XSTOP_INTERRUPT_REG , RULL(0x260F001C), SH_UNT_EX_3 , + SH_ACS_SCOM ); //DUPS: 270F001C, +REG64( EX_4_XSTOP_INTERRUPT_REG , RULL(0x280F001C), SH_UNT_EX_4 , + SH_ACS_SCOM ); //DUPS: 290F001C, +REG64( EX_5_XSTOP_INTERRUPT_REG , RULL(0x2A0F001C), SH_UNT_EX_5 , + SH_ACS_SCOM ); //DUPS: 2B0F001C, +REG64( EX_6_XSTOP_INTERRUPT_REG , RULL(0x2C0F001C), SH_UNT_EX_6 , + SH_ACS_SCOM ); //DUPS: 2D0F001C, +REG64( EX_7_XSTOP_INTERRUPT_REG , RULL(0x2E0F001C), SH_UNT_EX_7 , + SH_ACS_SCOM ); //DUPS: 2F0F001C, +REG64( EX_8_XSTOP_INTERRUPT_REG , RULL(0x300F001C), SH_UNT_EX_8 , + SH_ACS_SCOM ); //DUPS: 310F001C, +REG64( EX_9_XSTOP_INTERRUPT_REG , RULL(0x320F001C), SH_UNT_EX_9 , + SH_ACS_SCOM ); //DUPS: 330F001C, +REG64( EX_10_XSTOP_INTERRUPT_REG , RULL(0x340F001C), SH_UNT_EX_10 , + SH_ACS_SCOM ); //DUPS: 350F001C, +REG64( EX_11_XSTOP_INTERRUPT_REG , RULL(0x360F001C), SH_UNT_EX_11 , + SH_ACS_SCOM ); //DUPS: 370F001C, +#endif + diff --git a/src/import/chips/p9/common/include/p9_scom_template_consts.H b/src/import/chips/p9/common/include/p9_scom_template_consts.H new file mode 100644 index 000000000..20185b0f9 --- /dev/null +++ b/src/import/chips/p9/common/include/p9_scom_template_consts.H @@ -0,0 +1,15776 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: chips/p9/common/include/p9_scom_template_consts.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* EKB Project */ +/* */ +/* COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file scom_template_consts.H +/// @brief File generated to contain constants used to define templates +/// for scom addresses +/// +// *HWP HWP Owner: Ben Gass <bgass@us.ibm.com> +// *HWP FW Owner: Thi Tran <thi@us.ibm.com> +// *HWP Team: SOA +// *HWP Level: 1 +// *HWP Consumed by: FSP:HB:HS:OCC:SBE:CME:SGPE:PGPE:FPPE:IPPE +#ifndef __P9_SCOM_TEMPLATE_CONSTS_H +#define __P9_SCOM_TEMPLATE_CONSTS_H + +const static uint64_t SH_UNT = 0; +const static uint64_t SH_UNT_C = 1; +const static uint64_t SH_UNT_CAPP = 2; +const static uint64_t SH_UNT_CAPP_0 = 3; +const static uint64_t SH_UNT_CAPP_1 = 4; +const static uint64_t SH_UNT_C_0 = 5; +const static uint64_t SH_UNT_C_1 = 6; +const static uint64_t SH_UNT_C_10 = 7; +const static uint64_t SH_UNT_C_11 = 8; +const static uint64_t SH_UNT_C_12 = 9; +const static uint64_t SH_UNT_C_13 = 10; +const static uint64_t SH_UNT_C_14 = 11; +const static uint64_t SH_UNT_C_15 = 12; +const static uint64_t SH_UNT_C_16 = 13; +const static uint64_t SH_UNT_C_17 = 14; +const static uint64_t SH_UNT_C_18 = 15; +const static uint64_t SH_UNT_C_19 = 16; +const static uint64_t SH_UNT_C_2 = 17; +const static uint64_t SH_UNT_C_20 = 18; +const static uint64_t SH_UNT_C_21 = 19; +const static uint64_t SH_UNT_C_22 = 20; +const static uint64_t SH_UNT_C_23 = 21; +const static uint64_t SH_UNT_C_3 = 22; +const static uint64_t SH_UNT_C_4 = 23; +const static uint64_t SH_UNT_C_5 = 24; +const static uint64_t SH_UNT_C_6 = 25; +const static uint64_t SH_UNT_C_7 = 26; +const static uint64_t SH_UNT_C_8 = 27; +const static uint64_t SH_UNT_C_9 = 28; +const static uint64_t SH_UNT_EQ = 29; +const static uint64_t SH_UNT_EQ_0 = 30; +const static uint64_t SH_UNT_EQ_1 = 31; +const static uint64_t SH_UNT_EQ_2 = 32; +const static uint64_t SH_UNT_EQ_3 = 33; +const static uint64_t SH_UNT_EQ_4 = 34; +const static uint64_t SH_UNT_EQ_5 = 35; +const static uint64_t SH_UNT_EX = 36; +const static uint64_t SH_UNT_EX_0 = 37; +const static uint64_t SH_UNT_EX_0_CHTMLBS0 = 38; +const static uint64_t SH_UNT_EX_0_CHTMLBS1 = 39; +const static uint64_t SH_UNT_EX_0_L2 = 40; +const static uint64_t SH_UNT_EX_0_L3 = 41; +const static uint64_t SH_UNT_EX_1 = 42; +const static uint64_t SH_UNT_EX_10 = 43; +const static uint64_t SH_UNT_EX_10_CHTMLBS0 = 44; +const static uint64_t SH_UNT_EX_10_CHTMLBS1 = 45; +const static uint64_t SH_UNT_EX_10_L2 = 46; +const static uint64_t SH_UNT_EX_10_L3 = 47; +const static uint64_t SH_UNT_EX_11 = 48; +const static uint64_t SH_UNT_EX_11_CHTMLBS0 = 49; +const static uint64_t SH_UNT_EX_11_CHTMLBS1 = 50; +const static uint64_t SH_UNT_EX_11_L2 = 51; +const static uint64_t SH_UNT_EX_11_L3 = 52; +const static uint64_t SH_UNT_EX_1_CHTMLBS0 = 53; +const static uint64_t SH_UNT_EX_1_CHTMLBS1 = 54; +const static uint64_t SH_UNT_EX_1_L2 = 55; +const static uint64_t SH_UNT_EX_1_L3 = 56; +const static uint64_t SH_UNT_EX_2 = 57; +const static uint64_t SH_UNT_EX_2_CHTMLBS0 = 58; +const static uint64_t SH_UNT_EX_2_CHTMLBS1 = 59; +const static uint64_t SH_UNT_EX_2_L2 = 60; +const static uint64_t SH_UNT_EX_2_L3 = 61; +const static uint64_t SH_UNT_EX_3 = 62; +const static uint64_t SH_UNT_EX_3_CHTMLBS0 = 63; +const static uint64_t SH_UNT_EX_3_CHTMLBS1 = 64; +const static uint64_t SH_UNT_EX_3_L2 = 65; +const static uint64_t SH_UNT_EX_3_L3 = 66; +const static uint64_t SH_UNT_EX_4 = 67; +const static uint64_t SH_UNT_EX_4_CHTMLBS0 = 68; +const static uint64_t SH_UNT_EX_4_CHTMLBS1 = 69; +const static uint64_t SH_UNT_EX_4_L2 = 70; +const static uint64_t SH_UNT_EX_4_L3 = 71; +const static uint64_t SH_UNT_EX_5 = 72; +const static uint64_t SH_UNT_EX_5_CHTMLBS0 = 73; +const static uint64_t SH_UNT_EX_5_CHTMLBS1 = 74; +const static uint64_t SH_UNT_EX_5_L2 = 75; +const static uint64_t SH_UNT_EX_5_L3 = 76; +const static uint64_t SH_UNT_EX_6 = 77; +const static uint64_t SH_UNT_EX_6_CHTMLBS0 = 78; +const static uint64_t SH_UNT_EX_6_CHTMLBS1 = 79; +const static uint64_t SH_UNT_EX_6_L2 = 80; +const static uint64_t SH_UNT_EX_6_L3 = 81; +const static uint64_t SH_UNT_EX_7 = 82; +const static uint64_t SH_UNT_EX_7_CHTMLBS0 = 83; +const static uint64_t SH_UNT_EX_7_CHTMLBS1 = 84; +const static uint64_t SH_UNT_EX_7_L2 = 85; +const static uint64_t SH_UNT_EX_7_L3 = 86; +const static uint64_t SH_UNT_EX_8 = 87; +const static uint64_t SH_UNT_EX_8_CHTMLBS0 = 88; +const static uint64_t SH_UNT_EX_8_CHTMLBS1 = 89; +const static uint64_t SH_UNT_EX_8_L2 = 90; +const static uint64_t SH_UNT_EX_8_L3 = 91; +const static uint64_t SH_UNT_EX_9 = 92; +const static uint64_t SH_UNT_EX_9_CHTMLBS0 = 93; +const static uint64_t SH_UNT_EX_9_CHTMLBS1 = 94; +const static uint64_t SH_UNT_EX_9_L2 = 95; +const static uint64_t SH_UNT_EX_9_L3 = 96; +const static uint64_t SH_UNT_EX_CHTMLBS0 = 97; +const static uint64_t SH_UNT_EX_CHTMLBS1 = 98; +const static uint64_t SH_UNT_EX_L2 = 99; +const static uint64_t SH_UNT_EX_L3 = 100; +const static uint64_t SH_UNT_MCA = 101; +const static uint64_t SH_UNT_MCA_0 = 102; +const static uint64_t SH_UNT_MCA_0_WDF = 103; +const static uint64_t SH_UNT_MCA_0_WREITE = 104; +const static uint64_t SH_UNT_MCA_1 = 105; +const static uint64_t SH_UNT_MCA_1_WDF = 106; +const static uint64_t SH_UNT_MCA_1_WREITE = 107; +const static uint64_t SH_UNT_MCA_2 = 108; +const static uint64_t SH_UNT_MCA_2_WDF = 109; +const static uint64_t SH_UNT_MCA_2_WREITE = 110; +const static uint64_t SH_UNT_MCA_3 = 111; +const static uint64_t SH_UNT_MCA_3_WDF = 112; +const static uint64_t SH_UNT_MCA_3_WREITE = 113; +const static uint64_t SH_UNT_MCA_4 = 114; +const static uint64_t SH_UNT_MCA_4_WDF = 115; +const static uint64_t SH_UNT_MCA_4_WREITE = 116; +const static uint64_t SH_UNT_MCA_5 = 117; +const static uint64_t SH_UNT_MCA_5_WDF = 118; +const static uint64_t SH_UNT_MCA_5_WREITE = 119; +const static uint64_t SH_UNT_MCA_6 = 120; +const static uint64_t SH_UNT_MCA_6_WDF = 121; +const static uint64_t SH_UNT_MCA_6_WREITE = 122; +const static uint64_t SH_UNT_MCA_7 = 123; +const static uint64_t SH_UNT_MCA_7_WDF = 124; +const static uint64_t SH_UNT_MCA_7_WREITE = 125; +const static uint64_t SH_UNT_MCA_WDF = 126; +const static uint64_t SH_UNT_MCA_WREITE = 127; +const static uint64_t SH_UNT_MCBIST = 128; +const static uint64_t SH_UNT_MCBIST_0 = 129; +const static uint64_t SH_UNT_MCBIST_1 = 130; +const static uint64_t SH_UNT_MCS = 131; +const static uint64_t SH_UNT_MCS_0 = 132; +const static uint64_t SH_UNT_MCS_0_PORT02 = 133; +const static uint64_t SH_UNT_MCS_0_PORT13 = 134; +const static uint64_t SH_UNT_MCS_1 = 135; +const static uint64_t SH_UNT_MCS_1_PORT02 = 136; +const static uint64_t SH_UNT_MCS_1_PORT13 = 137; +const static uint64_t SH_UNT_MCS_2 = 138; +const static uint64_t SH_UNT_MCS_2_PORT02 = 139; +const static uint64_t SH_UNT_MCS_2_PORT13 = 140; +const static uint64_t SH_UNT_MCS_3 = 141; +const static uint64_t SH_UNT_MCS_3_PORT02 = 142; +const static uint64_t SH_UNT_MCS_3_PORT13 = 143; +const static uint64_t SH_UNT_MCS_PORT02 = 144; +const static uint64_t SH_UNT_MCS_PORT13 = 145; +const static uint64_t SH_UNT_NV = 146; +const static uint64_t SH_UNT_NV_0 = 147; +const static uint64_t SH_UNT_NV_1 = 148; +const static uint64_t SH_UNT_NV_2 = 149; +const static uint64_t SH_UNT_NV_3 = 150; +const static uint64_t SH_UNT_OBUS = 151; +const static uint64_t SH_UNT_OBUS_0 = 152; +const static uint64_t SH_UNT_OBUS_3 = 153; +const static uint64_t SH_UNT_PEC = 154; +const static uint64_t SH_UNT_PEC_0 = 155; +const static uint64_t SH_UNT_PEC_0_STACK0 = 156; +const static uint64_t SH_UNT_PEC_0_STACK1 = 157; +const static uint64_t SH_UNT_PEC_0_STACK2 = 158; +const static uint64_t SH_UNT_PEC_1 = 159; +const static uint64_t SH_UNT_PEC_1_STACK0 = 160; +const static uint64_t SH_UNT_PEC_1_STACK1 = 161; +const static uint64_t SH_UNT_PEC_1_STACK2 = 162; +const static uint64_t SH_UNT_PEC_2 = 163; +const static uint64_t SH_UNT_PEC_2_STACK0 = 164; +const static uint64_t SH_UNT_PEC_2_STACK1 = 165; +const static uint64_t SH_UNT_PEC_2_STACK2 = 166; +const static uint64_t SH_UNT_PEC_STACK0 = 167; +const static uint64_t SH_UNT_PEC_STACK1 = 168; +const static uint64_t SH_UNT_PEC_STACK2 = 169; +const static uint64_t SH_UNT_PERV = 170; +const static uint64_t SH_UNT_PERV_0 = 171; +const static uint64_t SH_UNT_PERV_0_FSII2C = 172; +const static uint64_t SH_UNT_PERV_0_PIB2OPB0 = 173; +const static uint64_t SH_UNT_PERV_0_PIB2OPB1 = 174; +const static uint64_t SH_UNT_PERV_1 = 175; +const static uint64_t SH_UNT_PERV_12 = 176; +const static uint64_t SH_UNT_PERV_13 = 177; +const static uint64_t SH_UNT_PERV_14 = 178; +const static uint64_t SH_UNT_PERV_15 = 179; +const static uint64_t SH_UNT_PERV_16 = 180; +const static uint64_t SH_UNT_PERV_17 = 181; +const static uint64_t SH_UNT_PERV_18 = 182; +const static uint64_t SH_UNT_PERV_19 = 183; +const static uint64_t SH_UNT_PERV_2 = 184; +const static uint64_t SH_UNT_PERV_20 = 185; +const static uint64_t SH_UNT_PERV_21 = 186; +const static uint64_t SH_UNT_PERV_3 = 187; +const static uint64_t SH_UNT_PERV_32 = 188; +const static uint64_t SH_UNT_PERV_33 = 189; +const static uint64_t SH_UNT_PERV_34 = 190; +const static uint64_t SH_UNT_PERV_35 = 191; +const static uint64_t SH_UNT_PERV_36 = 192; +const static uint64_t SH_UNT_PERV_37 = 193; +const static uint64_t SH_UNT_PERV_38 = 194; +const static uint64_t SH_UNT_PERV_39 = 195; +const static uint64_t SH_UNT_PERV_4 = 196; +const static uint64_t SH_UNT_PERV_40 = 197; +const static uint64_t SH_UNT_PERV_41 = 198; +const static uint64_t SH_UNT_PERV_42 = 199; +const static uint64_t SH_UNT_PERV_43 = 200; +const static uint64_t SH_UNT_PERV_44 = 201; +const static uint64_t SH_UNT_PERV_45 = 202; +const static uint64_t SH_UNT_PERV_46 = 203; +const static uint64_t SH_UNT_PERV_47 = 204; +const static uint64_t SH_UNT_PERV_48 = 205; +const static uint64_t SH_UNT_PERV_49 = 206; +const static uint64_t SH_UNT_PERV_5 = 207; +const static uint64_t SH_UNT_PERV_50 = 208; +const static uint64_t SH_UNT_PERV_51 = 209; +const static uint64_t SH_UNT_PERV_52 = 210; +const static uint64_t SH_UNT_PERV_53 = 211; +const static uint64_t SH_UNT_PERV_54 = 212; +const static uint64_t SH_UNT_PERV_55 = 213; +const static uint64_t SH_UNT_PERV_6 = 214; +const static uint64_t SH_UNT_PERV_7 = 215; +const static uint64_t SH_UNT_PERV_8 = 216; +const static uint64_t SH_UNT_PERV_9 = 217; +const static uint64_t SH_UNT_PERV_FSB = 218; +const static uint64_t SH_UNT_PERV_FSI2PIB = 219; +const static uint64_t SH_UNT_PERV_FSII2C = 220; +const static uint64_t SH_UNT_PERV_FSISHIFT = 221; +const static uint64_t SH_UNT_PERV_PIB2OPB0 = 222; +const static uint64_t SH_UNT_PERV_PIB2OPB1 = 223; +const static uint64_t SH_UNT_PHB = 224; +const static uint64_t SH_UNT_PHB_0 = 225; +const static uint64_t SH_UNT_PHB_1 = 226; +const static uint64_t SH_UNT_PHB_2 = 227; +const static uint64_t SH_UNT_PHB_3 = 228; +const static uint64_t SH_UNT_PHB_4 = 229; +const static uint64_t SH_UNT_PHB_5 = 230; +const static uint64_t SH_UNT_PU_CME0 = 231; +const static uint64_t SH_UNT_PU_CME1 = 232; +const static uint64_t SH_UNT_PU_CME10 = 233; +const static uint64_t SH_UNT_PU_CME11 = 234; +const static uint64_t SH_UNT_PU_CME2 = 235; +const static uint64_t SH_UNT_PU_CME3 = 236; +const static uint64_t SH_UNT_PU_CME4 = 237; +const static uint64_t SH_UNT_PU_CME5 = 238; +const static uint64_t SH_UNT_PU_CME6 = 239; +const static uint64_t SH_UNT_PU_CME7 = 240; +const static uint64_t SH_UNT_PU_CME8 = 241; +const static uint64_t SH_UNT_PU_CME9 = 242; +const static uint64_t SH_UNT_PU_HTM0 = 243; +const static uint64_t SH_UNT_PU_HTM1 = 244; +const static uint64_t SH_UNT_PU_IOE = 245; +const static uint64_t SH_UNT_PU_IOPPE = 246; +const static uint64_t SH_UNT_PU_MCD1 = 247; +const static uint64_t SH_UNT_PU_NMMU = 248; +const static uint64_t SH_UNT_PU_NPU = 249; +const static uint64_t SH_UNT_PU_NPU0 = 250; +const static uint64_t SH_UNT_PU_NPU0_CTL = 251; +const static uint64_t SH_UNT_PU_NPU0_DAT = 252; +const static uint64_t SH_UNT_PU_NPU0_SM0 = 253; +const static uint64_t SH_UNT_PU_NPU0_SM1 = 254; +const static uint64_t SH_UNT_PU_NPU0_SM2 = 255; +const static uint64_t SH_UNT_PU_NPU0_SM3 = 256; +const static uint64_t SH_UNT_PU_NPU1 = 257; +const static uint64_t SH_UNT_PU_NPU1_CTL = 258; +const static uint64_t SH_UNT_PU_NPU1_DAT = 259; +const static uint64_t SH_UNT_PU_NPU1_SM0 = 260; +const static uint64_t SH_UNT_PU_NPU1_SM1 = 261; +const static uint64_t SH_UNT_PU_NPU1_SM2 = 262; +const static uint64_t SH_UNT_PU_NPU1_SM3 = 263; +const static uint64_t SH_UNT_PU_NPU2 = 264; +const static uint64_t SH_UNT_PU_NPU2_CTL = 265; +const static uint64_t SH_UNT_PU_NPU2_DAT = 266; +const static uint64_t SH_UNT_PU_NPU2_NTL0 = 267; +const static uint64_t SH_UNT_PU_NPU2_NTL1 = 268; +const static uint64_t SH_UNT_PU_NPU2_SM0 = 269; +const static uint64_t SH_UNT_PU_NPU2_SM1 = 270; +const static uint64_t SH_UNT_PU_NPU2_SM2 = 271; +const static uint64_t SH_UNT_PU_NPU2_SM3 = 272; +const static uint64_t SH_UNT_PU_NPU_CTL = 273; +const static uint64_t SH_UNT_PU_NPU_DAT = 274; +const static uint64_t SH_UNT_PU_NPU_NTL0 = 275; +const static uint64_t SH_UNT_PU_NPU_NTL1 = 276; +const static uint64_t SH_UNT_PU_NPU_SM0 = 277; +const static uint64_t SH_UNT_PU_NPU_SM1 = 278; +const static uint64_t SH_UNT_PU_NPU_SM2 = 279; +const static uint64_t SH_UNT_PU_OTPROM0 = 280; +const static uint64_t SH_UNT_PU_OTPROM1 = 281; +const static uint64_t SH_UNT_PU_PBAIB_STACK1 = 282; +const static uint64_t SH_UNT_PU_PBAIB_STACK2 = 283; +const static uint64_t SH_UNT_PU_PBAIB_STACK5 = 284; +const static uint64_t SH_UNT_XBUS_1 = 285; +const static uint64_t SH_UNT_XBUS_2 = 286; +const static uint64_t SH_UNT__SM0 = 287; +const static uint64_t SH_UNT__SM2 = 288; + + +const static uint64_t SH_ACS_FSI = 0; +const static uint64_t SH_ACS_FSI0 = 1; +const static uint64_t SH_ACS_FSI1 = 2; +const static uint64_t SH_ACS_FSI_BYTE = 3; +const static uint64_t SH_ACS_IODA = 4; +const static uint64_t SH_ACS_OCI = 5; +const static uint64_t SH_ACS_OCI1 = 6; +const static uint64_t SH_ACS_OCI2 = 7; +const static uint64_t SH_ACS_PPE = 8; +const static uint64_t SH_ACS_PPE1 = 9; +const static uint64_t SH_ACS_PPE2 = 10; +const static uint64_t SH_ACS_SCOM = 11; +const static uint64_t SH_ACS_SCOM1 = 12; +const static uint64_t SH_ACS_SCOM1_AND = 13; +const static uint64_t SH_ACS_SCOM1_CLEAR = 14; +const static uint64_t SH_ACS_SCOM1_NC = 15; +const static uint64_t SH_ACS_SCOM1_OR = 16; +const static uint64_t SH_ACS_SCOM1_RO = 17; +const static uint64_t SH_ACS_SCOM1_WAND = 18; +const static uint64_t SH_ACS_SCOM1_WO = 19; +const static uint64_t SH_ACS_SCOM1_WOR = 20; +const static uint64_t SH_ACS_SCOM2 = 21; +const static uint64_t SH_ACS_SCOM2_AND = 22; +const static uint64_t SH_ACS_SCOM2_CLEAR = 23; +const static uint64_t SH_ACS_SCOM2_NC = 24; +const static uint64_t SH_ACS_SCOM2_OR = 25; +const static uint64_t SH_ACS_SCOM2_WAND = 26; +const static uint64_t SH_ACS_SCOM2_WOR = 27; +const static uint64_t SH_ACS_SCOM3 = 28; +const static uint64_t SH_ACS_SCOM3_RW = 29; +const static uint64_t SH_ACS_SCOMFSI0 = 30; +const static uint64_t SH_ACS_SCOMFSI0_CLEAR = 31; +const static uint64_t SH_ACS_SCOMFSI0_OR = 32; +const static uint64_t SH_ACS_SCOMFSI0_RO = 33; +const static uint64_t SH_ACS_SCOMFSI0_RW = 34; +const static uint64_t SH_ACS_SCOMFSI1 = 35; +const static uint64_t SH_ACS_SCOMFSI1_CLEAR = 36; +const static uint64_t SH_ACS_SCOMFSI1_OR = 37; +const static uint64_t SH_ACS_SCOMFSI1_RO = 38; +const static uint64_t SH_ACS_SCOMFSI1_RW = 39; +const static uint64_t SH_ACS_SCOM_CLRPART = 40; +const static uint64_t SH_ACS_SCOM_NC = 41; +const static uint64_t SH_ACS_SCOM_RCLRPART = 42; +const static uint64_t SH_ACS_SCOM_RO = 43; +const static uint64_t SH_ACS_SCOM_RW = 44; +const static uint64_t SH_ACS_SCOM_W = 45; +const static uint64_t SH_ACS_SCOM_WAND = 46; +const static uint64_t SH_ACS_SCOM_WCLEAR = 47; +const static uint64_t SH_ACS_SCOM_WCLRPART = 48; +const static uint64_t SH_ACS_SCOM_WCLRREG = 49; +const static uint64_t SH_ACS_SCOM_WO = 50; +const static uint64_t SH_ACS_SCOM_WOR = 51; + + + +const static uint64_t SH_FLD_0 = 0; // 472 +const static uint64_t SH_FLD_01 = 1; // 96 +const static uint64_t SH_FLD_01_0_11 = 2; // 16 +const static uint64_t SH_FLD_01_0_11_LEN = 3; // 16 +const static uint64_t SH_FLD_01_12_15 = 4; // 16 +const static uint64_t SH_FLD_01_12_15_LEN = 5; // 16 +const static uint64_t SH_FLD_01_ADVANCE_PING_PONG = 6; // 16 +const static uint64_t SH_FLD_01_ADVANCE_PR_VALUE = 7; // 16 +const static uint64_t SH_FLD_01_ATESTSEL_0_4 = 8; // 8 +const static uint64_t SH_FLD_01_ATESTSEL_0_4_LEN = 9; // 8 +const static uint64_t SH_FLD_01_ATESTSEL_4 = 10; // 8 +const static uint64_t SH_FLD_01_ATESTSEL_4_LEN = 11; // 8 +const static uint64_t SH_FLD_01_BB_LOCK0 = 12; // 16 +const static uint64_t SH_FLD_01_BB_LOCK1 = 13; // 16 +const static uint64_t SH_FLD_01_BIG_STEP_RIGHT = 14; // 16 +const static uint64_t SH_FLD_01_BIT_CENTERED = 15; // 16 +const static uint64_t SH_FLD_01_BIT_CENTERED_LEN = 16; // 16 +const static uint64_t SH_FLD_01_BLFIFO_DIS = 17; // 16 +const static uint64_t SH_FLD_01_BUMP = 18; // 16 +const static uint64_t SH_FLD_01_CALGATE_ON = 19; // 16 +const static uint64_t SH_FLD_01_CALIBRATE_BIT = 20; // 16 +const static uint64_t SH_FLD_01_CALIBRATE_BIT_LEN = 21; // 16 +const static uint64_t SH_FLD_01_CAL_ERROR = 22; // 32 +const static uint64_t SH_FLD_01_CAL_ERROR_FINE = 23; // 32 +const static uint64_t SH_FLD_01_CAL_GOOD = 24; // 32 +const static uint64_t SH_FLD_01_CHECKER_ENABLE = 25; // 16 +const static uint64_t SH_FLD_01_CHECKER_RESET = 26; // 16 +const static uint64_t SH_FLD_01_CLK16_SINGLE_ENDED = 27; // 128 +const static uint64_t SH_FLD_01_CLK18_SINGLE_ENDED = 28; // 128 +const static uint64_t SH_FLD_01_CLK20_SINGLE_ENDED = 29; // 128 +const static uint64_t SH_FLD_01_CLK22_SINGLE_ENDED = 30; // 128 +const static uint64_t SH_FLD_01_CLK_LEVEL = 31; // 16 +const static uint64_t SH_FLD_01_CLK_LEVEL_LEN = 32; // 16 +const static uint64_t SH_FLD_01_CNTL_POL = 33; // 16 +const static uint64_t SH_FLD_01_CNTL_SRC = 34; // 16 +const static uint64_t SH_FLD_01_COARSE_PATTERN_ERR_N0 = 35; // 16 +const static uint64_t SH_FLD_01_COARSE_PATTERN_ERR_N0_MASK = 36; // 16 +const static uint64_t SH_FLD_01_COARSE_PATTERN_ERR_N1 = 37; // 16 +const static uint64_t SH_FLD_01_COARSE_PATTERN_ERR_N1_MASK = 38; // 16 +const static uint64_t SH_FLD_01_COARSE_PATTERN_ERR_N2 = 39; // 16 +const static uint64_t SH_FLD_01_COARSE_PATTERN_ERR_N2_MASK = 40; // 16 +const static uint64_t SH_FLD_01_COARSE_PATTERN_ERR_N3 = 41; // 16 +const static uint64_t SH_FLD_01_COARSE_PATTERN_ERR_N3_MASK = 42; // 16 +const static uint64_t SH_FLD_01_CONTINUOUS_UPDATE = 43; // 32 +const static uint64_t SH_FLD_01_DD2_DQS_FIX_DIS = 44; // 16 +const static uint64_t SH_FLD_01_DD2_FIX_DIS = 45; // 16 +const static uint64_t SH_FLD_01_DD2_WTRFL_SYNC_DIS = 46; // 16 +const static uint64_t SH_FLD_01_DELAY1 = 47; // 16 +const static uint64_t SH_FLD_01_DELAY10 = 48; // 16 +const static uint64_t SH_FLD_01_DELAY10_LEN = 49; // 16 +const static uint64_t SH_FLD_01_DELAY11 = 50; // 16 +const static uint64_t SH_FLD_01_DELAY11_LEN = 51; // 16 +const static uint64_t SH_FLD_01_DELAY12 = 52; // 16 +const static uint64_t SH_FLD_01_DELAY12_LEN = 53; // 16 +const static uint64_t SH_FLD_01_DELAY13 = 54; // 16 +const static uint64_t SH_FLD_01_DELAY13_LEN = 55; // 16 +const static uint64_t SH_FLD_01_DELAY14 = 56; // 16 +const static uint64_t SH_FLD_01_DELAY14_LEN = 57; // 16 +const static uint64_t SH_FLD_01_DELAY15 = 58; // 16 +const static uint64_t SH_FLD_01_DELAY15_LEN = 59; // 16 +const static uint64_t SH_FLD_01_DELAY1_LEN = 60; // 16 +const static uint64_t SH_FLD_01_DELAY2 = 61; // 16 +const static uint64_t SH_FLD_01_DELAY2_LEN = 62; // 16 +const static uint64_t SH_FLD_01_DELAY3 = 63; // 16 +const static uint64_t SH_FLD_01_DELAY3_LEN = 64; // 16 +const static uint64_t SH_FLD_01_DELAY4 = 65; // 16 +const static uint64_t SH_FLD_01_DELAY4_LEN = 66; // 16 +const static uint64_t SH_FLD_01_DELAY5 = 67; // 16 +const static uint64_t SH_FLD_01_DELAY5_LEN = 68; // 16 +const static uint64_t SH_FLD_01_DELAY6 = 69; // 16 +const static uint64_t SH_FLD_01_DELAY6_LEN = 70; // 16 +const static uint64_t SH_FLD_01_DELAY7 = 71; // 16 +const static uint64_t SH_FLD_01_DELAY7_LEN = 72; // 16 +const static uint64_t SH_FLD_01_DELAY8 = 73; // 16 +const static uint64_t SH_FLD_01_DELAY8_LEN = 74; // 16 +const static uint64_t SH_FLD_01_DELAY9 = 75; // 16 +const static uint64_t SH_FLD_01_DELAY9_LEN = 76; // 16 +const static uint64_t SH_FLD_01_DELAYG = 77; // 1280 +const static uint64_t SH_FLD_01_DELAYG_LEN = 78; // 1280 +const static uint64_t SH_FLD_01_DELAY_PING_PONG_HALF = 79; // 16 +const static uint64_t SH_FLD_01_DESIRED_EDGE_CNTR_TARGET_HIGH = 80; // 16 +const static uint64_t SH_FLD_01_DESIRED_EDGE_CNTR_TARGET_HIGH_LEN = 81; // 16 +const static uint64_t SH_FLD_01_DESIRED_EDGE_CNTR_TARGET_LOW = 82; // 16 +const static uint64_t SH_FLD_01_DESIRED_EDGE_CNTR_TARGET_LOW_LEN = 83; // 16 +const static uint64_t SH_FLD_01_DFT_FORCE_OUTPUTS = 84; // 16 +const static uint64_t SH_FLD_01_DFT_PRBS7_GEN_EN = 85; // 16 +const static uint64_t SH_FLD_01_DIGITAL_EN = 86; // 16 +const static uint64_t SH_FLD_01_DIR_0_15 = 87; // 8 +const static uint64_t SH_FLD_01_DIR_0_15_LEN = 88; // 8 +const static uint64_t SH_FLD_01_DIR_15 = 89; // 8 +const static uint64_t SH_FLD_01_DIR_15_LEN = 90; // 8 +const static uint64_t SH_FLD_01_DISABLE_0_15 = 91; // 32 +const static uint64_t SH_FLD_01_DISABLE_0_15_LEN = 92; // 32 +const static uint64_t SH_FLD_01_DISABLE_15 = 93; // 32 +const static uint64_t SH_FLD_01_DISABLE_15_LEN = 94; // 32 +const static uint64_t SH_FLD_01_DISABLE_16_23 = 95; // 64 +const static uint64_t SH_FLD_01_DISABLE_16_23_LEN = 96; // 64 +const static uint64_t SH_FLD_01_DISABLE_PING_PONG = 97; // 16 +const static uint64_t SH_FLD_01_DISABLE_TERMINATION = 98; // 16 +const static uint64_t SH_FLD_01_DIS_CLK_GATE = 99; // 16 +const static uint64_t SH_FLD_01_DI_ADR0 = 100; // 8 +const static uint64_t SH_FLD_01_DI_ADR1 = 101; // 8 +const static uint64_t SH_FLD_01_DI_ADR10_ADR11 = 102; // 16 +const static uint64_t SH_FLD_01_DI_ADR12_ADR13 = 103; // 16 +const static uint64_t SH_FLD_01_DI_ADR14_ADR15 = 104; // 16 +const static uint64_t SH_FLD_01_DI_ADR2_ADR3 = 105; // 16 +const static uint64_t SH_FLD_01_DI_ADR4_ADR5 = 106; // 16 +const static uint64_t SH_FLD_01_DI_ADR6_ADR7 = 107; // 16 +const static uint64_t SH_FLD_01_DI_ADR8_ADR9 = 108; // 16 +const static uint64_t SH_FLD_01_DL_FORCE_ON = 109; // 16 +const static uint64_t SH_FLD_01_DONE = 110; // 32 +const static uint64_t SH_FLD_01_DQS = 111; // 16 +const static uint64_t SH_FLD_01_DQSCLK_SELECT0 = 112; // 64 +const static uint64_t SH_FLD_01_DQSCLK_SELECT0_LEN = 113; // 64 +const static uint64_t SH_FLD_01_DQSCLK_SELECT1 = 114; // 64 +const static uint64_t SH_FLD_01_DQSCLK_SELECT1_LEN = 115; // 64 +const static uint64_t SH_FLD_01_DQSCLK_SELECT2 = 116; // 64 +const static uint64_t SH_FLD_01_DQSCLK_SELECT2_LEN = 117; // 64 +const static uint64_t SH_FLD_01_DQSCLK_SELECT3 = 118; // 64 +const static uint64_t SH_FLD_01_DQSCLK_SELECT3_LEN = 119; // 64 +const static uint64_t SH_FLD_01_DQS_ALIGN_CNTR = 120; // 16 +const static uint64_t SH_FLD_01_DQS_ALIGN_CNTR_LEN = 121; // 16 +const static uint64_t SH_FLD_01_DQS_ALIGN_FIX_DIS = 122; // 16 +const static uint64_t SH_FLD_01_DQS_ALIGN_ITR_CNTR = 123; // 16 +const static uint64_t SH_FLD_01_DQS_ALIGN_ITR_CNTR_LEN = 124; // 16 +const static uint64_t SH_FLD_01_DQS_ALIGN_JITTER = 125; // 16 +const static uint64_t SH_FLD_01_DQS_ALIGN_QUAD = 126; // 16 +const static uint64_t SH_FLD_01_DQS_ALIGN_QUAD_LEN = 127; // 16 +const static uint64_t SH_FLD_01_DQS_ALIGN_SM = 128; // 16 +const static uint64_t SH_FLD_01_DQS_ALIGN_SM_LEN = 129; // 16 +const static uint64_t SH_FLD_01_DQS_LEN = 130; // 16 +const static uint64_t SH_FLD_01_DQS_PIPE_FIX_DIS = 131; // 16 +const static uint64_t SH_FLD_01_DQS_PIPE_FIX_DIS_LEN = 132; // 16 +const static uint64_t SH_FLD_01_DRIFT_ERROR = 133; // 16 +const static uint64_t SH_FLD_01_DRIFT_MASK = 134; // 16 +const static uint64_t SH_FLD_01_DRVREN_MODE = 135; // 16 +const static uint64_t SH_FLD_01_DYN_MCTERM_CNTL_EN = 136; // 16 +const static uint64_t SH_FLD_01_DYN_POWER_CNTL_EN = 137; // 16 +const static uint64_t SH_FLD_01_DYN_RX_GATE_CNTL_EN = 138; // 16 +const static uint64_t SH_FLD_01_ENABLE = 139; // 32 +const static uint64_t SH_FLD_01_ENABLE_0_15 = 140; // 8 +const static uint64_t SH_FLD_01_ENABLE_0_15_LEN = 141; // 8 +const static uint64_t SH_FLD_01_ENABLE_15 = 142; // 8 +const static uint64_t SH_FLD_01_ENABLE_15_LEN = 143; // 8 +const static uint64_t SH_FLD_01_ENABLE_16_23 = 144; // 16 +const static uint64_t SH_FLD_01_ENABLE_16_23_LEN = 145; // 16 +const static uint64_t SH_FLD_01_EN_DQS_OFFSET = 146; // 16 +const static uint64_t SH_FLD_01_EN_DRIVER_INVFB_DC = 147; // 32 +const static uint64_t SH_FLD_01_EN_N_WR = 148; // 16 +const static uint64_t SH_FLD_01_EN_N_WR_LEN = 149; // 16 +const static uint64_t SH_FLD_01_EN_P_WR = 150; // 32 +const static uint64_t SH_FLD_01_EN_P_WR_LEN = 151; // 32 +const static uint64_t SH_FLD_01_ERROR = 152; // 16 +const static uint64_t SH_FLD_01_ERROR_LEN = 153; // 16 +const static uint64_t SH_FLD_01_ERR_CLK22_MASK = 154; // 16 +const static uint64_t SH_FLD_01_EYE_CLIPPING = 155; // 16 +const static uint64_t SH_FLD_01_EYE_CLIPPING_MASK = 156; // 16 +const static uint64_t SH_FLD_01_FINE_STEPPING = 157; // 16 +const static uint64_t SH_FLD_01_FLUSH = 158; // 16 +const static uint64_t SH_FLD_01_FORCE_DQS_LANES_ON = 159; // 16 +const static uint64_t SH_FLD_01_FORCE_FIFO_CAPTURE = 160; // 16 +const static uint64_t SH_FLD_01_FRZSULV = 161; // 32 +const static uint64_t SH_FLD_01_FW_LEFT_SIDE = 162; // 16 +const static uint64_t SH_FLD_01_FW_LEFT_SIDE_LEN = 163; // 16 +const static uint64_t SH_FLD_01_FW_RIGHT_SIDE = 164; // 16 +const static uint64_t SH_FLD_01_FW_RIGHT_SIDE_LEN = 165; // 16 +const static uint64_t SH_FLD_01_HS_DLLMUX_SEL0_0_3 = 166; // 8 +const static uint64_t SH_FLD_01_HS_DLLMUX_SEL0_0_3_LEN = 167; // 8 +const static uint64_t SH_FLD_01_HS_DLLMUX_SEL0_3 = 168; // 8 +const static uint64_t SH_FLD_01_HS_DLLMUX_SEL0_3_LEN = 169; // 8 +const static uint64_t SH_FLD_01_HS_DLLMUX_SEL1_0_3 = 170; // 8 +const static uint64_t SH_FLD_01_HS_DLLMUX_SEL1_0_3_LEN = 171; // 8 +const static uint64_t SH_FLD_01_HS_DLLMUX_SEL1_3 = 172; // 8 +const static uint64_t SH_FLD_01_HS_DLLMUX_SEL1_3_LEN = 173; // 8 +const static uint64_t SH_FLD_01_HS_PROBE_A = 174; // 16 +const static uint64_t SH_FLD_01_HS_PROBE_A_LEN = 175; // 16 +const static uint64_t SH_FLD_01_HS_PROBE_B = 176; // 16 +const static uint64_t SH_FLD_01_HS_PROBE_B_LEN = 177; // 16 +const static uint64_t SH_FLD_01_HW_VALUE = 178; // 16 +const static uint64_t SH_FLD_01_INCOMPLETE_CAL_N0 = 179; // 16 +const static uint64_t SH_FLD_01_INCOMPLETE_CAL_N0_MASK = 180; // 16 +const static uint64_t SH_FLD_01_INCOMPLETE_CAL_N1 = 181; // 16 +const static uint64_t SH_FLD_01_INCOMPLETE_CAL_N1_MASK = 182; // 16 +const static uint64_t SH_FLD_01_INCOMPLETE_CAL_N2 = 183; // 16 +const static uint64_t SH_FLD_01_INCOMPLETE_CAL_N2_MASK = 184; // 16 +const static uint64_t SH_FLD_01_INCOMPLETE_CAL_N3 = 185; // 16 +const static uint64_t SH_FLD_01_INCOMPLETE_CAL_N3_MASK = 186; // 16 +const static uint64_t SH_FLD_01_INIT_IO = 187; // 16 +const static uint64_t SH_FLD_01_INIT_RXDLL_CAL_RESET = 188; // 32 +const static uint64_t SH_FLD_01_INIT_RXDLL_CAL_UPDATE = 189; // 32 +const static uint64_t SH_FLD_01_INTERP_SIG_SLEW = 190; // 16 +const static uint64_t SH_FLD_01_INTERP_SIG_SLEW_LEN = 191; // 16 +const static uint64_t SH_FLD_01_INVALID_NS_BIG_R = 192; // 16 +const static uint64_t SH_FLD_01_INVALID_NS_BIG_R_MASK = 193; // 16 +const static uint64_t SH_FLD_01_INVALID_NS_SMALL_L = 194; // 16 +const static uint64_t SH_FLD_01_INVALID_NS_SMALL_L_MASK = 195; // 16 +const static uint64_t SH_FLD_01_INVALID_NS_SMALL_R = 196; // 16 +const static uint64_t SH_FLD_01_INVALID_NS_SMALL_R_MASK = 197; // 16 +const static uint64_t SH_FLD_01_JUMP_BACK_RIGHT = 198; // 16 +const static uint64_t SH_FLD_01_LANE__0_11_PD = 199; // 16 +const static uint64_t SH_FLD_01_LANE__0_11_PD_LEN = 200; // 16 +const static uint64_t SH_FLD_01_LANE__12_15_PD = 201; // 16 +const static uint64_t SH_FLD_01_LANE__12_15_PD_LEN = 202; // 16 +const static uint64_t SH_FLD_01_LEADING_EDGE_FOUND_MASK = 203; // 16 +const static uint64_t SH_FLD_01_LEADING_EDGE_NOT_FOUND = 204; // 16 +const static uint64_t SH_FLD_01_LEADING_EDGE_NOT_FOUND_0_15 = 205; // 8 +const static uint64_t SH_FLD_01_LEADING_EDGE_NOT_FOUND_0_15_LEN = 206; // 8 +const static uint64_t SH_FLD_01_LEADING_EDGE_NOT_FOUND_15 = 207; // 8 +const static uint64_t SH_FLD_01_LEADING_EDGE_NOT_FOUND_15_LEN = 208; // 8 +const static uint64_t SH_FLD_01_LEADING_EDGE_NOT_FOUND_16_23 = 209; // 16 +const static uint64_t SH_FLD_01_LEADING_EDGE_NOT_FOUND_16_23_LEN = 210; // 16 +const static uint64_t SH_FLD_01_LEN = 211; // 96 +const static uint64_t SH_FLD_01_LOOPBACK_DLY12 = 212; // 16 +const static uint64_t SH_FLD_01_LOOPBACK_FIX_EN = 213; // 16 +const static uint64_t SH_FLD_01_MATCH_STEP_RIGHT = 214; // 16 +const static uint64_t SH_FLD_01_MAX_DQS = 215; // 16 +const static uint64_t SH_FLD_01_MAX_DQS_ITER = 216; // 16 +const static uint64_t SH_FLD_01_MAX_DQS_LEN = 217; // 16 +const static uint64_t SH_FLD_01_MEMINTD00 = 218; // 16 +const static uint64_t SH_FLD_01_MEMINTD00_LEN = 219; // 16 +const static uint64_t SH_FLD_01_MEMINTD01 = 220; // 16 +const static uint64_t SH_FLD_01_MEMINTD01_LEN = 221; // 16 +const static uint64_t SH_FLD_01_MEMINTD02 = 222; // 16 +const static uint64_t SH_FLD_01_MEMINTD02_LEN = 223; // 16 +const static uint64_t SH_FLD_01_MEMINTD03 = 224; // 16 +const static uint64_t SH_FLD_01_MEMINTD03_LEN = 225; // 16 +const static uint64_t SH_FLD_01_MEMINTD04 = 226; // 16 +const static uint64_t SH_FLD_01_MEMINTD04_LEN = 227; // 16 +const static uint64_t SH_FLD_01_MEMINTD05 = 228; // 16 +const static uint64_t SH_FLD_01_MEMINTD05_LEN = 229; // 16 +const static uint64_t SH_FLD_01_MEMINTD06 = 230; // 16 +const static uint64_t SH_FLD_01_MEMINTD06_LEN = 231; // 16 +const static uint64_t SH_FLD_01_MEMINTD07 = 232; // 16 +const static uint64_t SH_FLD_01_MEMINTD07_LEN = 233; // 16 +const static uint64_t SH_FLD_01_MEMINTD08 = 234; // 16 +const static uint64_t SH_FLD_01_MEMINTD08_LEN = 235; // 16 +const static uint64_t SH_FLD_01_MEMINTD09 = 236; // 16 +const static uint64_t SH_FLD_01_MEMINTD09_LEN = 237; // 16 +const static uint64_t SH_FLD_01_MEMINTD10 = 238; // 16 +const static uint64_t SH_FLD_01_MEMINTD10_LEN = 239; // 16 +const static uint64_t SH_FLD_01_MEMINTD11 = 240; // 16 +const static uint64_t SH_FLD_01_MEMINTD11_LEN = 241; // 16 +const static uint64_t SH_FLD_01_MEMINTD12 = 242; // 16 +const static uint64_t SH_FLD_01_MEMINTD12_LEN = 243; // 16 +const static uint64_t SH_FLD_01_MEMINTD13 = 244; // 16 +const static uint64_t SH_FLD_01_MEMINTD13_LEN = 245; // 16 +const static uint64_t SH_FLD_01_MEMINTD14 = 246; // 16 +const static uint64_t SH_FLD_01_MEMINTD14_LEN = 247; // 16 +const static uint64_t SH_FLD_01_MEMINTD15 = 248; // 16 +const static uint64_t SH_FLD_01_MEMINTD15_LEN = 249; // 16 +const static uint64_t SH_FLD_01_MEMINTD16 = 250; // 16 +const static uint64_t SH_FLD_01_MEMINTD16_LEN = 251; // 16 +const static uint64_t SH_FLD_01_MEMINTD17 = 252; // 16 +const static uint64_t SH_FLD_01_MEMINTD17_LEN = 253; // 16 +const static uint64_t SH_FLD_01_MEMINTD18 = 254; // 16 +const static uint64_t SH_FLD_01_MEMINTD18_LEN = 255; // 16 +const static uint64_t SH_FLD_01_MEMINTD19 = 256; // 16 +const static uint64_t SH_FLD_01_MEMINTD19_LEN = 257; // 16 +const static uint64_t SH_FLD_01_MEMINTD20 = 258; // 16 +const static uint64_t SH_FLD_01_MEMINTD20_LEN = 259; // 16 +const static uint64_t SH_FLD_01_MEMINTD21 = 260; // 16 +const static uint64_t SH_FLD_01_MEMINTD21_LEN = 261; // 16 +const static uint64_t SH_FLD_01_MEMINTD22 = 262; // 16 +const static uint64_t SH_FLD_01_MEMINTD22_LEN = 263; // 16 +const static uint64_t SH_FLD_01_MEMINTD23 = 264; // 16 +const static uint64_t SH_FLD_01_MEMINTD23_LEN = 265; // 16 +const static uint64_t SH_FLD_01_MIN_EYE = 266; // 16 +const static uint64_t SH_FLD_01_MIN_EYE_MASK = 267; // 16 +const static uint64_t SH_FLD_01_MIN_RD_EYE_SIZE = 268; // 16 +const static uint64_t SH_FLD_01_MIN_RD_EYE_SIZE_LEN = 269; // 16 +const static uint64_t SH_FLD_01_MRS_CMD_N0 = 270; // 16 +const static uint64_t SH_FLD_01_MRS_CMD_N1 = 271; // 16 +const static uint64_t SH_FLD_01_MRS_CMD_N2 = 272; // 16 +const static uint64_t SH_FLD_01_MRS_CMD_N3 = 273; // 16 +const static uint64_t SH_FLD_01_N0 = 274; // 128 +const static uint64_t SH_FLD_01_N0_LEN = 275; // 128 +const static uint64_t SH_FLD_01_N1 = 276; // 128 +const static uint64_t SH_FLD_01_N1_LEN = 277; // 128 +const static uint64_t SH_FLD_01_N2 = 278; // 128 +const static uint64_t SH_FLD_01_N2_LEN = 279; // 128 +const static uint64_t SH_FLD_01_N3 = 280; // 128 +const static uint64_t SH_FLD_01_N3_LEN = 281; // 128 +const static uint64_t SH_FLD_01_NIB0 = 282; // 16 +const static uint64_t SH_FLD_01_NIB0TCFLIP_DC = 283; // 16 +const static uint64_t SH_FLD_01_NIB0_LEN = 284; // 16 +const static uint64_t SH_FLD_01_NIB1 = 285; // 16 +const static uint64_t SH_FLD_01_NIB1TCFLIP_DC = 286; // 16 +const static uint64_t SH_FLD_01_NIB1_LEN = 287; // 16 +const static uint64_t SH_FLD_01_NIB2 = 288; // 16 +const static uint64_t SH_FLD_01_NIB2TCFLIP_DC = 289; // 16 +const static uint64_t SH_FLD_01_NIB2_LEN = 290; // 16 +const static uint64_t SH_FLD_01_NIB3 = 291; // 16 +const static uint64_t SH_FLD_01_NIB3TCFLIP_DC = 292; // 16 +const static uint64_t SH_FLD_01_NIB3_LEN = 293; // 16 +const static uint64_t SH_FLD_01_NIB_0_2_DQSEL_CAP = 294; // 16 +const static uint64_t SH_FLD_01_NIB_0_2_DQSEL_CAP_LEN = 295; // 16 +const static uint64_t SH_FLD_01_NIB_0_2_DQSEL_IND = 296; // 16 +const static uint64_t SH_FLD_01_NIB_0_2_DQSEL_IND_LEN = 297; // 16 +const static uint64_t SH_FLD_01_NIB_0_2_DQSEL_RES = 298; // 16 +const static uint64_t SH_FLD_01_NIB_0_2_DQSEL_RES_LEN = 299; // 16 +const static uint64_t SH_FLD_01_NIB_1_3_DQSEL_CAP = 300; // 16 +const static uint64_t SH_FLD_01_NIB_1_3_DQSEL_CAP_LEN = 301; // 16 +const static uint64_t SH_FLD_01_NIB_1_3_DQSEL_IND = 302; // 16 +const static uint64_t SH_FLD_01_NIB_1_3_DQSEL_IND_LEN = 303; // 16 +const static uint64_t SH_FLD_01_NIB_1_3_DQSEL_RES = 304; // 16 +const static uint64_t SH_FLD_01_NIB_1_3_DQSEL_RES_LEN = 305; // 16 +const static uint64_t SH_FLD_01_NIB_2_DQSEL_CAP = 306; // 16 +const static uint64_t SH_FLD_01_NIB_2_DQSEL_CAP_LEN = 307; // 16 +const static uint64_t SH_FLD_01_NIB_2_DQSEL_IND = 308; // 16 +const static uint64_t SH_FLD_01_NIB_2_DQSEL_IND_LEN = 309; // 16 +const static uint64_t SH_FLD_01_NIB_2_DQSEL_RES = 310; // 16 +const static uint64_t SH_FLD_01_NIB_2_DQSEL_RES_LEN = 311; // 16 +const static uint64_t SH_FLD_01_NIB_3_DQSEL_CAP = 312; // 16 +const static uint64_t SH_FLD_01_NIB_3_DQSEL_CAP_LEN = 313; // 16 +const static uint64_t SH_FLD_01_NIB_3_DQSEL_IND = 314; // 16 +const static uint64_t SH_FLD_01_NIB_3_DQSEL_IND_LEN = 315; // 16 +const static uint64_t SH_FLD_01_NIB_3_DQSEL_RES = 316; // 16 +const static uint64_t SH_FLD_01_NIB_3_DQSEL_RES_LEN = 317; // 16 +const static uint64_t SH_FLD_01_NO_DQS = 318; // 16 +const static uint64_t SH_FLD_01_NO_DQS_MASK = 319; // 16 +const static uint64_t SH_FLD_01_NO_EYE_DETECTED = 320; // 16 +const static uint64_t SH_FLD_01_NO_EYE_DETECTED_MASK = 321; // 16 +const static uint64_t SH_FLD_01_NO_LOCK = 322; // 16 +const static uint64_t SH_FLD_01_NO_LOCK_MASK = 323; // 16 +const static uint64_t SH_FLD_01_OFFSET0 = 324; // 16 +const static uint64_t SH_FLD_01_OFFSET0_LEN = 325; // 16 +const static uint64_t SH_FLD_01_OFFSET1 = 326; // 16 +const static uint64_t SH_FLD_01_OFFSET1_LEN = 327; // 16 +const static uint64_t SH_FLD_01_OFFSET2 = 328; // 32 +const static uint64_t SH_FLD_01_OFFSET2_LEN = 329; // 32 +const static uint64_t SH_FLD_01_OFFSET3 = 330; // 32 +const static uint64_t SH_FLD_01_OFFSET3_LEN = 331; // 32 +const static uint64_t SH_FLD_01_OFFSET4 = 332; // 32 +const static uint64_t SH_FLD_01_OFFSET4_LEN = 333; // 32 +const static uint64_t SH_FLD_01_OFFSET5 = 334; // 32 +const static uint64_t SH_FLD_01_OFFSET5_LEN = 335; // 32 +const static uint64_t SH_FLD_01_OFFSET6 = 336; // 32 +const static uint64_t SH_FLD_01_OFFSET6_LEN = 337; // 32 +const static uint64_t SH_FLD_01_OFFSET7 = 338; // 32 +const static uint64_t SH_FLD_01_OFFSET7_LEN = 339; // 32 +const static uint64_t SH_FLD_01_OFFSET_ERR = 340; // 16 +const static uint64_t SH_FLD_01_OFFSET_ERR_MASK = 341; // 16 +const static uint64_t SH_FLD_01_OPERATE_MODE = 342; // 16 +const static uint64_t SH_FLD_01_OPERATE_MODE_LEN = 343; // 16 +const static uint64_t SH_FLD_01_PERCAL_PWR_DIS = 344; // 16 +const static uint64_t SH_FLD_01_PER_CAL_UPDATE_DISABLE = 345; // 16 +const static uint64_t SH_FLD_01_PHASE_ALIGN_RESET = 346; // 32 +const static uint64_t SH_FLD_01_PHASE_CNTL_EN = 347; // 32 +const static uint64_t SH_FLD_01_PHASE_DEFAULT_EN = 348; // 32 +const static uint64_t SH_FLD_01_POS_EDGE_ALIGN = 349; // 32 +const static uint64_t SH_FLD_01_QUAD0 = 350; // 16 +const static uint64_t SH_FLD_01_QUAD0_CLK16 = 351; // 128 +const static uint64_t SH_FLD_01_QUAD0_CLK18 = 352; // 128 +const static uint64_t SH_FLD_01_QUAD0_LEN = 353; // 16 +const static uint64_t SH_FLD_01_QUAD1 = 354; // 16 +const static uint64_t SH_FLD_01_QUAD1_CLK16 = 355; // 128 +const static uint64_t SH_FLD_01_QUAD1_CLK18 = 356; // 128 +const static uint64_t SH_FLD_01_QUAD1_LEN = 357; // 16 +const static uint64_t SH_FLD_01_QUAD2 = 358; // 16 +const static uint64_t SH_FLD_01_QUAD2_CLK16 = 359; // 128 +const static uint64_t SH_FLD_01_QUAD2_CLK18 = 360; // 64 +const static uint64_t SH_FLD_01_QUAD2_CLK20 = 361; // 128 +const static uint64_t SH_FLD_01_QUAD2_CLK22 = 362; // 128 +const static uint64_t SH_FLD_01_QUAD2_LEN = 363; // 16 +const static uint64_t SH_FLD_01_QUAD3 = 364; // 16 +const static uint64_t SH_FLD_01_QUAD3_CLK16 = 365; // 128 +const static uint64_t SH_FLD_01_QUAD3_CLK18 = 366; // 64 +const static uint64_t SH_FLD_01_QUAD3_CLK20 = 367; // 128 +const static uint64_t SH_FLD_01_QUAD3_CLK22 = 368; // 128 +const static uint64_t SH_FLD_01_QUAD3_LEN = 369; // 16 +const static uint64_t SH_FLD_01_RD = 370; // 272 +const static uint64_t SH_FLD_01_RDCLK_SELECT0 = 371; // 64 +const static uint64_t SH_FLD_01_RDCLK_SELECT0_LEN = 372; // 64 +const static uint64_t SH_FLD_01_RDCLK_SELECT1 = 373; // 64 +const static uint64_t SH_FLD_01_RDCLK_SELECT1_LEN = 374; // 64 +const static uint64_t SH_FLD_01_RDCLK_SELECT2 = 375; // 64 +const static uint64_t SH_FLD_01_RDCLK_SELECT2_LEN = 376; // 64 +const static uint64_t SH_FLD_01_RDCLK_SELECT3 = 377; // 64 +const static uint64_t SH_FLD_01_RDCLK_SELECT3_LEN = 378; // 64 +const static uint64_t SH_FLD_01_RD_DELAY0 = 379; // 112 +const static uint64_t SH_FLD_01_RD_DELAY0_LEN = 380; // 112 +const static uint64_t SH_FLD_01_RD_DELAY1 = 381; // 112 +const static uint64_t SH_FLD_01_RD_DELAY1_LEN = 382; // 112 +const static uint64_t SH_FLD_01_RD_DELAY2 = 383; // 112 +const static uint64_t SH_FLD_01_RD_DELAY2_LEN = 384; // 112 +const static uint64_t SH_FLD_01_RD_DELAY3 = 385; // 112 +const static uint64_t SH_FLD_01_RD_DELAY3_LEN = 386; // 112 +const static uint64_t SH_FLD_01_RD_DELAY4 = 387; // 112 +const static uint64_t SH_FLD_01_RD_DELAY4_LEN = 388; // 112 +const static uint64_t SH_FLD_01_RD_DELAY5 = 389; // 112 +const static uint64_t SH_FLD_01_RD_DELAY5_LEN = 390; // 112 +const static uint64_t SH_FLD_01_RD_DELAY6 = 391; // 112 +const static uint64_t SH_FLD_01_RD_DELAY6_LEN = 392; // 112 +const static uint64_t SH_FLD_01_RD_DELAY7 = 393; // 112 +const static uint64_t SH_FLD_01_RD_DELAY7_LEN = 394; // 112 +const static uint64_t SH_FLD_01_RD_LEN = 395; // 272 +const static uint64_t SH_FLD_01_RD_SIZE0 = 396; // 176 +const static uint64_t SH_FLD_01_RD_SIZE0_LEN = 397; // 176 +const static uint64_t SH_FLD_01_RD_SIZE1 = 398; // 176 +const static uint64_t SH_FLD_01_RD_SIZE1_LEN = 399; // 176 +const static uint64_t SH_FLD_01_RD_SIZE2 = 400; // 176 +const static uint64_t SH_FLD_01_RD_SIZE2_LEN = 401; // 176 +const static uint64_t SH_FLD_01_RD_SIZE3 = 402; // 176 +const static uint64_t SH_FLD_01_RD_SIZE3_LEN = 403; // 176 +const static uint64_t SH_FLD_01_RD_SIZE4 = 404; // 176 +const static uint64_t SH_FLD_01_RD_SIZE4_LEN = 405; // 176 +const static uint64_t SH_FLD_01_RD_SIZE5 = 406; // 176 +const static uint64_t SH_FLD_01_RD_SIZE5_LEN = 407; // 176 +const static uint64_t SH_FLD_01_RD_SIZE6 = 408; // 176 +const static uint64_t SH_FLD_01_RD_SIZE6_LEN = 409; // 176 +const static uint64_t SH_FLD_01_RD_SIZE7 = 410; // 176 +const static uint64_t SH_FLD_01_RD_SIZE7_LEN = 411; // 176 +const static uint64_t SH_FLD_01_READ_CENTERING_MODE = 412; // 16 +const static uint64_t SH_FLD_01_READ_CENTERING_MODE_LEN = 413; // 16 +const static uint64_t SH_FLD_01_REFERENCE1 = 414; // 16 +const static uint64_t SH_FLD_01_REFERENCE1_LEN = 415; // 16 +const static uint64_t SH_FLD_01_REFERENCE2 = 416; // 16 +const static uint64_t SH_FLD_01_REFERENCE2_LEN = 417; // 16 +const static uint64_t SH_FLD_01_REFERENCE3 = 418; // 16 +const static uint64_t SH_FLD_01_REFERENCE3_LEN = 419; // 16 +const static uint64_t SH_FLD_01_REGS_RXDLL_CAL_SKIP = 420; // 32 +const static uint64_t SH_FLD_01_REGS_RXDLL_CAL_SKIP_LEN = 421; // 32 +const static uint64_t SH_FLD_01_REGS_RXDLL_COARSE_ADJ_BY2 = 422; // 32 +const static uint64_t SH_FLD_01_REGS_RXDLL_COARSE_EN = 423; // 32 +const static uint64_t SH_FLD_01_REGS_RXDLL_COARSE_EN_LEN = 424; // 32 +const static uint64_t SH_FLD_01_REGS_RXDLL_DAC_COARSE = 425; // 32 +const static uint64_t SH_FLD_01_REGS_RXDLL_DAC_COARSE_LEN = 426; // 32 +const static uint64_t SH_FLD_01_REGS_RXDLL_VREG_LOWER = 427; // 32 +const static uint64_t SH_FLD_01_REGS_RXDLL_VREG_LOWER_LEN = 428; // 32 +const static uint64_t SH_FLD_01_REGS_RXDLL_VREG_UPPER = 429; // 32 +const static uint64_t SH_FLD_01_REGS_RXDLL_VREG_UPPER_LEN = 430; // 32 +const static uint64_t SH_FLD_01_RESERVED_56_63 = 431; // 16 +const static uint64_t SH_FLD_01_RESERVED_56_63_LEN = 432; // 16 +const static uint64_t SH_FLD_01_ROT0 = 433; // 16 +const static uint64_t SH_FLD_01_ROT0_LEN = 434; // 16 +const static uint64_t SH_FLD_01_ROT1 = 435; // 16 +const static uint64_t SH_FLD_01_ROT1_LEN = 436; // 16 +const static uint64_t SH_FLD_01_ROT_CLK_N0 = 437; // 128 +const static uint64_t SH_FLD_01_ROT_CLK_N0_LEN = 438; // 128 +const static uint64_t SH_FLD_01_ROT_CLK_N1 = 439; // 128 +const static uint64_t SH_FLD_01_ROT_CLK_N1_LEN = 440; // 128 +const static uint64_t SH_FLD_01_ROT_N0 = 441; // 128 +const static uint64_t SH_FLD_01_ROT_N0_LEN = 442; // 128 +const static uint64_t SH_FLD_01_ROT_N1 = 443; // 128 +const static uint64_t SH_FLD_01_ROT_N1_LEN = 444; // 128 +const static uint64_t SH_FLD_01_ROT_OVERRIDE = 445; // 32 +const static uint64_t SH_FLD_01_ROT_OVERRIDE_EN = 446; // 32 +const static uint64_t SH_FLD_01_ROT_OVERRIDE_LEN = 447; // 32 +const static uint64_t SH_FLD_01_RXREG_COMPCON_DC = 448; // 32 +const static uint64_t SH_FLD_01_RXREG_COMPCON_DC_LEN = 449; // 32 +const static uint64_t SH_FLD_01_RXREG_CON_DC = 450; // 32 +const static uint64_t SH_FLD_01_RXREG_DAC_PULLUP_DC = 451; // 32 +const static uint64_t SH_FLD_01_RXREG_DRVCON_DC = 452; // 32 +const static uint64_t SH_FLD_01_RXREG_DRVCON_DC_LEN = 453; // 32 +const static uint64_t SH_FLD_01_RXREG_FILTER_LENGTH_DC = 454; // 32 +const static uint64_t SH_FLD_01_RXREG_FILTER_LENGTH_DC_LEN = 455; // 32 +const static uint64_t SH_FLD_01_RXREG_LEAD_LAG_SEPARATION_DC = 456; // 32 +const static uint64_t SH_FLD_01_RXREG_LEAD_LAG_SEPARATION_DC_LEN = 457; // 32 +const static uint64_t SH_FLD_01_RXREG_REF_SEL_DC = 458; // 32 +const static uint64_t SH_FLD_01_RXREG_REF_SEL_DC_LEN = 459; // 32 +const static uint64_t SH_FLD_01_S0ACENSLICENDRV_DC = 460; // 16 +const static uint64_t SH_FLD_01_S0ACENSLICENDRV_DC_LEN = 461; // 16 +const static uint64_t SH_FLD_01_S0ACENSLICEPDRV_DC = 462; // 16 +const static uint64_t SH_FLD_01_S0ACENSLICEPDRV_DC_LEN = 463; // 16 +const static uint64_t SH_FLD_01_S0ACENSLICEPTERM_DC = 464; // 16 +const static uint64_t SH_FLD_01_S0ACENSLICEPTERM_DC_LEN = 465; // 16 +const static uint64_t SH_FLD_01_S0INSDLYTAP = 466; // 16 +const static uint64_t SH_FLD_01_S1ACENSLICENDRV_DC = 467; // 16 +const static uint64_t SH_FLD_01_S1ACENSLICENDRV_DC_LEN = 468; // 16 +const static uint64_t SH_FLD_01_S1ACENSLICEPDRV_DC = 469; // 16 +const static uint64_t SH_FLD_01_S1ACENSLICEPDRV_DC_LEN = 470; // 16 +const static uint64_t SH_FLD_01_S1ACENSLICEPTERM_DC = 471; // 16 +const static uint64_t SH_FLD_01_S1ACENSLICEPTERM_DC_LEN = 472; // 16 +const static uint64_t SH_FLD_01_S1INSDLYTAP = 473; // 16 +const static uint64_t SH_FLD_01_SEL0 = 474; // 32 +const static uint64_t SH_FLD_01_SEL0_LEN = 475; // 16 +const static uint64_t SH_FLD_01_SEL1 = 476; // 32 +const static uint64_t SH_FLD_01_SEL10 = 477; // 32 +const static uint64_t SH_FLD_01_SEL10_LEN = 478; // 32 +const static uint64_t SH_FLD_01_SEL11 = 479; // 32 +const static uint64_t SH_FLD_01_SEL11_LEN = 480; // 32 +const static uint64_t SH_FLD_01_SEL12 = 481; // 32 +const static uint64_t SH_FLD_01_SEL12_LEN = 482; // 32 +const static uint64_t SH_FLD_01_SEL13 = 483; // 32 +const static uint64_t SH_FLD_01_SEL13_LEN = 484; // 32 +const static uint64_t SH_FLD_01_SEL14 = 485; // 32 +const static uint64_t SH_FLD_01_SEL14_LEN = 486; // 32 +const static uint64_t SH_FLD_01_SEL15 = 487; // 32 +const static uint64_t SH_FLD_01_SEL15_LEN = 488; // 32 +const static uint64_t SH_FLD_01_SEL1_LEN = 489; // 32 +const static uint64_t SH_FLD_01_SEL2 = 490; // 32 +const static uint64_t SH_FLD_01_SEL2_LEN = 491; // 32 +const static uint64_t SH_FLD_01_SEL3 = 492; // 32 +const static uint64_t SH_FLD_01_SEL3_LEN = 493; // 32 +const static uint64_t SH_FLD_01_SEL4 = 494; // 32 +const static uint64_t SH_FLD_01_SEL4_LEN = 495; // 32 +const static uint64_t SH_FLD_01_SEL5 = 496; // 32 +const static uint64_t SH_FLD_01_SEL5_LEN = 497; // 32 +const static uint64_t SH_FLD_01_SEL6 = 498; // 32 +const static uint64_t SH_FLD_01_SEL6_LEN = 499; // 32 +const static uint64_t SH_FLD_01_SEL7 = 500; // 32 +const static uint64_t SH_FLD_01_SEL7_LEN = 501; // 32 +const static uint64_t SH_FLD_01_SEL8 = 502; // 32 +const static uint64_t SH_FLD_01_SEL8_LEN = 503; // 16 +const static uint64_t SH_FLD_01_SEL9 = 504; // 32 +const static uint64_t SH_FLD_01_SEL9_LEN = 505; // 32 +const static uint64_t SH_FLD_01_SMALL_STEP_LEFT = 506; // 16 +const static uint64_t SH_FLD_01_SMALL_STEP_RIGHT = 507; // 16 +const static uint64_t SH_FLD_01_SYNC = 508; // 16 +const static uint64_t SH_FLD_01_SYNC_LEN = 509; // 16 +const static uint64_t SH_FLD_01_SYSCLK_DQSCLK_OFFSET = 510; // 16 +const static uint64_t SH_FLD_01_SYSCLK_DQSCLK_OFFSET_LEN = 511; // 16 +const static uint64_t SH_FLD_01_SYSCLK_RDCLK_OFFSET = 512; // 16 +const static uint64_t SH_FLD_01_SYSCLK_RDCLK_OFFSET_LEN = 513; // 16 +const static uint64_t SH_FLD_01_TEST_4TO1_MODE = 514; // 16 +const static uint64_t SH_FLD_01_TEST_CHECK_EN = 515; // 16 +const static uint64_t SH_FLD_01_TEST_CLEAR_ERROR = 516; // 16 +const static uint64_t SH_FLD_01_TEST_DATA_EN = 517; // 16 +const static uint64_t SH_FLD_01_TEST_GEN_EN = 518; // 16 +const static uint64_t SH_FLD_01_TEST_LANE_PAIR_FAIL = 519; // 16 +const static uint64_t SH_FLD_01_TEST_LANE_PAIR_FAIL_LEN = 520; // 16 +const static uint64_t SH_FLD_01_TEST_MODE = 521; // 16 +const static uint64_t SH_FLD_01_TEST_MODE_LEN = 522; // 16 +const static uint64_t SH_FLD_01_TEST_RESET = 523; // 16 +const static uint64_t SH_FLD_01_TRAILING_EDGE_FOUND_MASK = 524; // 16 +const static uint64_t SH_FLD_01_TRAILING_EDGE_NOT_FOUND = 525; // 16 +const static uint64_t SH_FLD_01_TRAILING_EDGE_NOT_FOUND_0_15 = 526; // 8 +const static uint64_t SH_FLD_01_TRAILING_EDGE_NOT_FOUND_0_15_LEN = 527; // 8 +const static uint64_t SH_FLD_01_TRAILING_EDGE_NOT_FOUND_15 = 528; // 8 +const static uint64_t SH_FLD_01_TRAILING_EDGE_NOT_FOUND_15_LEN = 529; // 8 +const static uint64_t SH_FLD_01_TRAILING_EDGE_NOT_FOUND_16_23 = 530; // 16 +const static uint64_t SH_FLD_01_TRAILING_EDGE_NOT_FOUND_16_23_LEN = 531; // 16 +const static uint64_t SH_FLD_01_TRIG_PERIOD = 532; // 16 +const static uint64_t SH_FLD_01_TSYS = 533; // 16 +const static uint64_t SH_FLD_01_TSYS_LEN = 534; // 16 +const static uint64_t SH_FLD_01_TUNEATST = 535; // 16 +const static uint64_t SH_FLD_01_TUNEATST_0 = 536; // 8 +const static uint64_t SH_FLD_01_TUNEATST_1 = 537; // 8 +const static uint64_t SH_FLD_01_VALID_NS_BIG_L = 538; // 16 +const static uint64_t SH_FLD_01_VALID_NS_BIG_L_MASK = 539; // 16 +const static uint64_t SH_FLD_01_VALID_NS_BIG_R = 540; // 16 +const static uint64_t SH_FLD_01_VALID_NS_BIG_R_MASK = 541; // 16 +const static uint64_t SH_FLD_01_VALID_NS_JUMP_BACK = 542; // 16 +const static uint64_t SH_FLD_01_VALID_NS_JUMP_BACK_MASK = 543; // 16 +const static uint64_t SH_FLD_01_WL_ADVANCE_DISABLE = 544; // 16 +const static uint64_t SH_FLD_01_WL_ERR_CLK16 = 545; // 32 +const static uint64_t SH_FLD_01_WL_ERR_CLK16_MASK = 546; // 16 +const static uint64_t SH_FLD_01_WL_ERR_CLK18 = 547; // 32 +const static uint64_t SH_FLD_01_WL_ERR_CLK18_MASK = 548; // 16 +const static uint64_t SH_FLD_01_WL_ERR_CLK20 = 549; // 32 +const static uint64_t SH_FLD_01_WL_ERR_CLK20_MASK = 550; // 16 +const static uint64_t SH_FLD_01_WL_ERR_CLK22 = 551; // 32 +const static uint64_t SH_FLD_01_WRAPSEL = 552; // 16 +const static uint64_t SH_FLD_01_WTRFL_AVE_DIS = 553; // 16 +const static uint64_t SH_FLD_01_ZERO_DETECTED = 554; // 16 +const static uint64_t SH_FLD_0X00_DATA_PARITY = 555; // 4 +const static uint64_t SH_FLD_0X00_SPARE_30_31 = 556; // 1 +const static uint64_t SH_FLD_0X00_SPARE_30_31_LEN = 557; // 1 +const static uint64_t SH_FLD_0X01_DATA_PARITY = 558; // 4 +const static uint64_t SH_FLD_0X01_SPARE_03 = 559; // 1 +const static uint64_t SH_FLD_0X01_SPARE_28_31 = 560; // 1 +const static uint64_t SH_FLD_0X01_SPARE_28_31_LEN = 561; // 1 +const static uint64_t SH_FLD_0X02_DATA_PARITY = 562; // 4 +const static uint64_t SH_FLD_0X02_SPARE_03 = 563; // 1 +const static uint64_t SH_FLD_0X02_SPARE_28_31 = 564; // 1 +const static uint64_t SH_FLD_0X02_SPARE_28_31_LEN = 565; // 1 +const static uint64_t SH_FLD_0X03_DATA_PARITY = 566; // 4 +const static uint64_t SH_FLD_0X03_SPARE_03 = 567; // 1 +const static uint64_t SH_FLD_0X03_SPARE_28_31 = 568; // 1 +const static uint64_t SH_FLD_0X03_SPARE_28_31_LEN = 569; // 1 +const static uint64_t SH_FLD_0X04_DATA_PARITY = 570; // 4 +const static uint64_t SH_FLD_0X04_SPARE_03 = 571; // 1 +const static uint64_t SH_FLD_0X04_SPARE_28_31 = 572; // 1 +const static uint64_t SH_FLD_0X04_SPARE_28_31_LEN = 573; // 1 +const static uint64_t SH_FLD_0X05_DATA_PARITY = 574; // 4 +const static uint64_t SH_FLD_0X05_SPARE_01 = 575; // 1 +const static uint64_t SH_FLD_0X05_SPARE_05 = 576; // 1 +const static uint64_t SH_FLD_0X06_DATA_PARITY = 577; // 4 +const static uint64_t SH_FLD_0X06_SPARE_02_04 = 578; // 1 +const static uint64_t SH_FLD_0X06_SPARE_02_04_LEN = 579; // 1 +const static uint64_t SH_FLD_0X06_SPARE_16_21 = 580; // 1 +const static uint64_t SH_FLD_0X06_SPARE_16_21_LEN = 581; // 1 +const static uint64_t SH_FLD_0X07_DATA_PARITY = 582; // 4 +const static uint64_t SH_FLD_0X07_SPARE_19 = 583; // 1 +const static uint64_t SH_FLD_0X07_SPARE_20 = 584; // 1 +const static uint64_t SH_FLD_0X07_SPARE_22_31 = 585; // 1 +const static uint64_t SH_FLD_0X07_SPARE_22_31_LEN = 586; // 1 +const static uint64_t SH_FLD_0X08_DATA_PARITY = 587; // 4 +const static uint64_t SH_FLD_0X08_SPARE_03 = 588; // 1 +const static uint64_t SH_FLD_0X08_SPARE_30 = 589; // 1 +const static uint64_t SH_FLD_0X09_DATA_PARITY = 590; // 4 +const static uint64_t SH_FLD_0X0A_DATA_PARITY = 591; // 4 +const static uint64_t SH_FLD_0X0A_SPARE_13_15 = 592; // 1 +const static uint64_t SH_FLD_0X0A_SPARE_13_15_LEN = 593; // 1 +const static uint64_t SH_FLD_0X0B_DATA_PARITY = 594; // 4 +const static uint64_t SH_FLD_0X0B_SPARE_04_05 = 595; // 1 +const static uint64_t SH_FLD_0X0B_SPARE_04_05_LEN = 596; // 1 +const static uint64_t SH_FLD_0X0B_SPARE_17 = 597; // 1 +const static uint64_t SH_FLD_0X0B_SPARE_33_39 = 598; // 1 +const static uint64_t SH_FLD_0X0B_SPARE_33_39_LEN = 599; // 1 +const static uint64_t SH_FLD_0X0C_DATA_PARITY = 600; // 4 +const static uint64_t SH_FLD_0X0D_SPARE_60_62 = 601; // 1 +const static uint64_t SH_FLD_0X0D_SPARE_60_62_LEN = 602; // 1 +const static uint64_t SH_FLD_0X10_DATA_PARITY = 603; // 4 +const static uint64_t SH_FLD_0X10_SPARE_17_18 = 604; // 1 +const static uint64_t SH_FLD_0X10_SPARE_17_18_LEN = 605; // 1 +const static uint64_t SH_FLD_0X10_SPARE_19_23 = 606; // 1 +const static uint64_t SH_FLD_0X10_SPARE_19_23_LEN = 607; // 1 +const static uint64_t SH_FLD_0X10_SPARE_24_25 = 608; // 1 +const static uint64_t SH_FLD_0X10_SPARE_24_25_LEN = 609; // 1 +const static uint64_t SH_FLD_0X10_SPARE_27 = 610; // 1 +const static uint64_t SH_FLD_0X10_SPARE_29 = 611; // 1 +const static uint64_t SH_FLD_0X11_0X12_0X13_0X14_0X15_0X16_DATA_PARITY = 612; // 4 +const static uint64_t SH_FLD_0X17_0X18_0X21_0X22_DATA_PARITY = 613; // 4 +const static uint64_t SH_FLD_0X1D_0X1E_0X1F_DATA_PARITY = 614; // 4 +const static uint64_t SH_FLD_0X20_DATA_PARITY = 615; // 4 +const static uint64_t SH_FLD_0X22_SPARE_01 = 616; // 1 +const static uint64_t SH_FLD_0X22_SPARE_03_07 = 617; // 1 +const static uint64_t SH_FLD_0X22_SPARE_03_07_LEN = 618; // 1 +const static uint64_t SH_FLD_0X23_DATA_PARITY = 619; // 4 +const static uint64_t SH_FLD_0X23_SPARE_06_07 = 620; // 1 +const static uint64_t SH_FLD_0X23_SPARE_06_07_LEN = 621; // 1 +const static uint64_t SH_FLD_0X24_DATA_PARITY = 622; // 4 +const static uint64_t SH_FLD_0X24_SPARE_05_07 = 623; // 1 +const static uint64_t SH_FLD_0X24_SPARE_05_07_LEN = 624; // 1 +const static uint64_t SH_FLD_0X27_DATA_PARITY = 625; // 4 +const static uint64_t SH_FLD_0X27_SPARE_34 = 626; // 1 +const static uint64_t SH_FLD_0X27_SPARE_36 = 627; // 1 +const static uint64_t SH_FLD_0X29_DATA_PARITY = 628; // 4 +const static uint64_t SH_FLD_0X30_0X31_0X32_0X33_DATA_PARITY = 629; // 4 +const static uint64_t SH_FLD_0_2 = 630; // 16 +const static uint64_t SH_FLD_0_CANNED_0 = 631; // 2 +const static uint64_t SH_FLD_0_CANNED_0_LEN = 632; // 2 +const static uint64_t SH_FLD_0_CANNED_1 = 633; // 2 +const static uint64_t SH_FLD_0_CANNED_1_LEN = 634; // 2 +const static uint64_t SH_FLD_0_CPS = 635; // 2 +const static uint64_t SH_FLD_0_CPS_LEN = 636; // 2 +const static uint64_t SH_FLD_0_DATA = 637; // 1 +const static uint64_t SH_FLD_0_DATA_LEN = 638; // 1 +const static uint64_t SH_FLD_0_LEN = 639; // 54 +const static uint64_t SH_FLD_0_LOCAL_STEP_MODE_ENABLE = 640; // 1 +const static uint64_t SH_FLD_0_OSC_NOT_VALID = 641; // 1 +const static uint64_t SH_FLD_0_REMOTE_SYNC_LATE_SYNC_COUNT = 642; // 1 +const static uint64_t SH_FLD_0_REMOTE_SYNC_LATE_SYNC_COUNT_LEN = 643; // 1 +const static uint64_t SH_FLD_0_RESULT = 644; // 43 +const static uint64_t SH_FLD_0_RESULT_LEN = 645; // 43 +const static uint64_t SH_FLD_0_SELECT = 646; // 1 +const static uint64_t SH_FLD_0_SELECT_LEN = 647; // 1 +const static uint64_t SH_FLD_0_SPARE_SECTOR_BUFFER_CONTROL = 648; // 1 +const static uint64_t SH_FLD_0_STEP_ALIGN_DISABLE = 649; // 1 +const static uint64_t SH_FLD_0_STEP_ALIGN_THRESHOLD = 650; // 1 +const static uint64_t SH_FLD_0_STEP_ALIGN_THRESHOLD_LEN = 651; // 1 +const static uint64_t SH_FLD_0_STEP_CHECK_CONSTANT_CPS_ENABLE = 652; // 2 +const static uint64_t SH_FLD_0_STEP_CHECK_CPS_DEVIATION = 653; // 2 +const static uint64_t SH_FLD_0_STEP_CHECK_CPS_DEVIATION_LEN = 654; // 2 +const static uint64_t SH_FLD_0_STEP_CHECK_VALIDITY_COUNT = 655; // 2 +const static uint64_t SH_FLD_0_STEP_CHECK_VALIDITY_COUNT_LEN = 656; // 2 +const static uint64_t SH_FLD_0_STEP_STEER_ENABLE = 657; // 1 +const static uint64_t SH_FLD_1 = 658; // 515 +const static uint64_t SH_FLD_10 = 659; // 6 +const static uint64_t SH_FLD_10_RESERVED = 660; // 1 +const static uint64_t SH_FLD_10_SPARE_REFCLOCK = 661; // 1 +const static uint64_t SH_FLD_10_SPARE_SECTOR_BUFFER_CONTROL = 662; // 1 +const static uint64_t SH_FLD_11 = 663; // 6 +const static uint64_t SH_FLD_11_RESERVED = 664; // 1 +const static uint64_t SH_FLD_11_SPARE_REFCLOCK = 665; // 1 +const static uint64_t SH_FLD_11_SPARE_SECTOR_BUFFER_CONTROL = 666; // 1 +const static uint64_t SH_FLD_12 = 667; // 6 +const static uint64_t SH_FLD_12GB_ENABLE = 668; // 8 +const static uint64_t SH_FLD_12_RESERVED = 669; // 1 +const static uint64_t SH_FLD_12_SPARE_SECTOR_BUFFER_CONTROL = 670; // 1 +const static uint64_t SH_FLD_13 = 671; // 6 +const static uint64_t SH_FLD_13_RESERVED = 672; // 1 +const static uint64_t SH_FLD_13_SPARE_OPB_CONTROL = 673; // 1 +const static uint64_t SH_FLD_13_SPARE_PROBE = 674; // 1 +const static uint64_t SH_FLD_13_SPARE_SECTOR_BUFFER_CONTROL = 675; // 1 +const static uint64_t SH_FLD_14 = 676; // 6 +const static uint64_t SH_FLD_14_RESERVED = 677; // 1 +const static uint64_t SH_FLD_14_SPARE_OPB_CONTROL = 678; // 1 +const static uint64_t SH_FLD_14_SPARE_PLL = 679; // 1 +const static uint64_t SH_FLD_14_SPARE_PROBE = 680; // 1 +const static uint64_t SH_FLD_14_SPARE_SECTOR_BUFFER_CONTROL = 681; // 1 +const static uint64_t SH_FLD_15 = 682; // 6 +const static uint64_t SH_FLD_15_RESERVED = 683; // 1 +const static uint64_t SH_FLD_15_SPARE_OPB_CONTROL = 684; // 1 +const static uint64_t SH_FLD_15_SPARE_OSC = 685; // 1 +const static uint64_t SH_FLD_15_SPARE_PLL = 686; // 1 +const static uint64_t SH_FLD_15_SPARE_PROBE = 687; // 1 +const static uint64_t SH_FLD_15_SPARE_SECTOR_BUFFER_CONTROL = 688; // 1 +const static uint64_t SH_FLD_16 = 689; // 6 +const static uint64_t SH_FLD_16_FREE_USAGE = 690; // 1 +const static uint64_t SH_FLD_16_SPARE_OSC = 691; // 1 +const static uint64_t SH_FLD_16_SPARE_RESONANT_CLOCKING_CONTROL = 692; // 1 +const static uint64_t SH_FLD_17 = 693; // 6 +const static uint64_t SH_FLD_17_SPARE_OSC = 694; // 1 +const static uint64_t SH_FLD_17_SPARE_RESONANT_CLOCKING_CONTROL = 695; // 1 +const static uint64_t SH_FLD_18 = 696; // 6 +const static uint64_t SH_FLD_18_31_SPARE = 697; // 8 +const static uint64_t SH_FLD_18_31_SPARE_LEN = 698; // 8 +const static uint64_t SH_FLD_18_SPARE_MUX_CONTROL = 699; // 1 +const static uint64_t SH_FLD_18_SPARE_OSC = 700; // 1 +const static uint64_t SH_FLD_18_SPARE_RESONANT_CLOCKING_CONTROL = 701; // 1 +const static uint64_t SH_FLD_19 = 702; // 6 +const static uint64_t SH_FLD_19_SPARE_MUX_CONTROL = 703; // 1 +const static uint64_t SH_FLD_19_SPARE_OSC = 704; // 1 +const static uint64_t SH_FLD_19_SPARE_RESONANT_CLOCKING_CONTROL = 705; // 1 +const static uint64_t SH_FLD_1_3 = 706; // 16 +const static uint64_t SH_FLD_1_CANNED_0 = 707; // 2 +const static uint64_t SH_FLD_1_CANNED_0_LEN = 708; // 2 +const static uint64_t SH_FLD_1_CANNED_1 = 709; // 2 +const static uint64_t SH_FLD_1_CANNED_1_LEN = 710; // 2 +const static uint64_t SH_FLD_1_CPS = 711; // 2 +const static uint64_t SH_FLD_1_CPS_LEN = 712; // 2 +const static uint64_t SH_FLD_1_DATA = 713; // 1 +const static uint64_t SH_FLD_1_DATA_LEN = 714; // 1 +const static uint64_t SH_FLD_1_LEN = 715; // 97 +const static uint64_t SH_FLD_1_LOCAL_STEP_MODE_ENABLE = 716; // 1 +const static uint64_t SH_FLD_1_OSC_NOT_VALID = 717; // 1 +const static uint64_t SH_FLD_1_REMOTE_SYNC_LATE_SYNC_COUNT = 718; // 1 +const static uint64_t SH_FLD_1_REMOTE_SYNC_LATE_SYNC_COUNT_LEN = 719; // 1 +const static uint64_t SH_FLD_1_RESULT = 720; // 43 +const static uint64_t SH_FLD_1_RESULT_LEN = 721; // 43 +const static uint64_t SH_FLD_1_SELECT = 722; // 1 +const static uint64_t SH_FLD_1_SELECT_LEN = 723; // 1 +const static uint64_t SH_FLD_1_SPARE_SECTOR_BUFFER_CONTROL = 724; // 1 +const static uint64_t SH_FLD_1_STEP_ALIGN_DISABLE = 725; // 1 +const static uint64_t SH_FLD_1_STEP_ALIGN_THRESHOLD = 726; // 1 +const static uint64_t SH_FLD_1_STEP_ALIGN_THRESHOLD_LEN = 727; // 1 +const static uint64_t SH_FLD_1_STEP_CHECK_CONSTANT_CPS_ENABLE = 728; // 2 +const static uint64_t SH_FLD_1_STEP_CHECK_CPS_DEVIATION = 729; // 2 +const static uint64_t SH_FLD_1_STEP_CHECK_CPS_DEVIATION_LEN = 730; // 2 +const static uint64_t SH_FLD_1_STEP_CHECK_VALIDITY_COUNT = 731; // 2 +const static uint64_t SH_FLD_1_STEP_CHECK_VALIDITY_COUNT_LEN = 732; // 2 +const static uint64_t SH_FLD_1_STEP_STEER_ENABLE = 733; // 1 +const static uint64_t SH_FLD_2 = 734; // 464 +const static uint64_t SH_FLD_20 = 735; // 6 +const static uint64_t SH_FLD_20_FREE_USAGE = 736; // 1 +const static uint64_t SH_FLD_20_RESERVED = 737; // 1 +const static uint64_t SH_FLD_20_SPARE_OSC = 738; // 1 +const static uint64_t SH_FLD_20_SPARE_PLL_CONTROL = 739; // 1 +const static uint64_t SH_FLD_20_SPARE_RESONANT_CLOCKING_CONTROL = 740; // 1 +const static uint64_t SH_FLD_21 = 741; // 6 +const static uint64_t SH_FLD_21_FREE_USAGE = 742; // 1 +const static uint64_t SH_FLD_21_RESERVED = 743; // 1 +const static uint64_t SH_FLD_21_SPARE_OSC = 744; // 1 +const static uint64_t SH_FLD_21_SPARE_PLL_CONTROL = 745; // 1 +const static uint64_t SH_FLD_21_SPARE_RESONANT_CLOCKING_CONTROL = 746; // 1 +const static uint64_t SH_FLD_22 = 747; // 6 +const static uint64_t SH_FLD_22_FREE_USAGE = 748; // 1 +const static uint64_t SH_FLD_22_RESERVED = 749; // 2 +const static uint64_t SH_FLD_22_SPARE_OSC = 750; // 1 +const static uint64_t SH_FLD_22_SPARE_PLL_CONTROL = 751; // 1 +const static uint64_t SH_FLD_22_SPARE_RESONANT_CLOCKING_CONTROL = 752; // 1 +const static uint64_t SH_FLD_22_SPARE_TEST = 753; // 1 +const static uint64_t SH_FLD_23 = 754; // 102 +const static uint64_t SH_FLD_23_0_11 = 755; // 16 +const static uint64_t SH_FLD_23_0_11_LEN = 756; // 16 +const static uint64_t SH_FLD_23_12_15 = 757; // 16 +const static uint64_t SH_FLD_23_12_15_LEN = 758; // 16 +const static uint64_t SH_FLD_23_ADVANCE_PING_PONG = 759; // 16 +const static uint64_t SH_FLD_23_ADVANCE_PR_VALUE = 760; // 16 +const static uint64_t SH_FLD_23_ATESTSEL_0_4 = 761; // 16 +const static uint64_t SH_FLD_23_ATESTSEL_0_4_LEN = 762; // 16 +const static uint64_t SH_FLD_23_BB_LOCK0 = 763; // 16 +const static uint64_t SH_FLD_23_BB_LOCK1 = 764; // 16 +const static uint64_t SH_FLD_23_BIG_STEP_RIGHT = 765; // 16 +const static uint64_t SH_FLD_23_BIT_CENTERED = 766; // 16 +const static uint64_t SH_FLD_23_BIT_CENTERED_LEN = 767; // 16 +const static uint64_t SH_FLD_23_BLFIFO_DIS = 768; // 16 +const static uint64_t SH_FLD_23_BUMP = 769; // 16 +const static uint64_t SH_FLD_23_CALGATE_ON = 770; // 16 +const static uint64_t SH_FLD_23_CALIBRATE_BIT = 771; // 16 +const static uint64_t SH_FLD_23_CALIBRATE_BIT_LEN = 772; // 16 +const static uint64_t SH_FLD_23_CAL_ERROR = 773; // 32 +const static uint64_t SH_FLD_23_CAL_ERROR_FINE = 774; // 32 +const static uint64_t SH_FLD_23_CAL_GOOD = 775; // 32 +const static uint64_t SH_FLD_23_CHECKER_ENABLE = 776; // 16 +const static uint64_t SH_FLD_23_CHECKER_RESET = 777; // 16 +const static uint64_t SH_FLD_23_CLK16_SINGLE_ENDED = 778; // 128 +const static uint64_t SH_FLD_23_CLK18_SINGLE_ENDED = 779; // 128 +const static uint64_t SH_FLD_23_CLK20_SINGLE_ENDED = 780; // 128 +const static uint64_t SH_FLD_23_CLK22_SINGLE_ENDED = 781; // 128 +const static uint64_t SH_FLD_23_CLK_LEVEL = 782; // 16 +const static uint64_t SH_FLD_23_CLK_LEVEL_LEN = 783; // 16 +const static uint64_t SH_FLD_23_CNTL_POL = 784; // 16 +const static uint64_t SH_FLD_23_CNTL_SRC = 785; // 16 +const static uint64_t SH_FLD_23_COARSE_PATTERN_ERR_N0 = 786; // 16 +const static uint64_t SH_FLD_23_COARSE_PATTERN_ERR_N0_MASK = 787; // 16 +const static uint64_t SH_FLD_23_COARSE_PATTERN_ERR_N1 = 788; // 16 +const static uint64_t SH_FLD_23_COARSE_PATTERN_ERR_N1_MASK = 789; // 16 +const static uint64_t SH_FLD_23_COARSE_PATTERN_ERR_N2 = 790; // 16 +const static uint64_t SH_FLD_23_COARSE_PATTERN_ERR_N2_MASK = 791; // 16 +const static uint64_t SH_FLD_23_COARSE_PATTERN_ERR_N3 = 792; // 16 +const static uint64_t SH_FLD_23_COARSE_PATTERN_ERR_N3_MASK = 793; // 16 +const static uint64_t SH_FLD_23_CONTINUOUS_UPDATE = 794; // 32 +const static uint64_t SH_FLD_23_DD2_DQS_FIX_DIS = 795; // 16 +const static uint64_t SH_FLD_23_DD2_FIX_DIS = 796; // 16 +const static uint64_t SH_FLD_23_DD2_WTRFL_SYNC_DIS = 797; // 16 +const static uint64_t SH_FLD_23_DELAY1 = 798; // 16 +const static uint64_t SH_FLD_23_DELAY10 = 799; // 16 +const static uint64_t SH_FLD_23_DELAY10_LEN = 800; // 16 +const static uint64_t SH_FLD_23_DELAY11 = 801; // 16 +const static uint64_t SH_FLD_23_DELAY11_LEN = 802; // 16 +const static uint64_t SH_FLD_23_DELAY12 = 803; // 16 +const static uint64_t SH_FLD_23_DELAY12_LEN = 804; // 16 +const static uint64_t SH_FLD_23_DELAY13 = 805; // 16 +const static uint64_t SH_FLD_23_DELAY13_LEN = 806; // 16 +const static uint64_t SH_FLD_23_DELAY14 = 807; // 16 +const static uint64_t SH_FLD_23_DELAY14_LEN = 808; // 16 +const static uint64_t SH_FLD_23_DELAY15 = 809; // 16 +const static uint64_t SH_FLD_23_DELAY15_LEN = 810; // 16 +const static uint64_t SH_FLD_23_DELAY1_LEN = 811; // 16 +const static uint64_t SH_FLD_23_DELAY2 = 812; // 16 +const static uint64_t SH_FLD_23_DELAY2_LEN = 813; // 16 +const static uint64_t SH_FLD_23_DELAY3 = 814; // 16 +const static uint64_t SH_FLD_23_DELAY3_LEN = 815; // 16 +const static uint64_t SH_FLD_23_DELAY4 = 816; // 16 +const static uint64_t SH_FLD_23_DELAY4_LEN = 817; // 16 +const static uint64_t SH_FLD_23_DELAY5 = 818; // 16 +const static uint64_t SH_FLD_23_DELAY5_LEN = 819; // 16 +const static uint64_t SH_FLD_23_DELAY6 = 820; // 16 +const static uint64_t SH_FLD_23_DELAY6_LEN = 821; // 16 +const static uint64_t SH_FLD_23_DELAY7 = 822; // 16 +const static uint64_t SH_FLD_23_DELAY7_LEN = 823; // 16 +const static uint64_t SH_FLD_23_DELAY8 = 824; // 16 +const static uint64_t SH_FLD_23_DELAY8_LEN = 825; // 16 +const static uint64_t SH_FLD_23_DELAY9 = 826; // 16 +const static uint64_t SH_FLD_23_DELAY9_LEN = 827; // 16 +const static uint64_t SH_FLD_23_DELAYG = 828; // 1280 +const static uint64_t SH_FLD_23_DELAYG_LEN = 829; // 1280 +const static uint64_t SH_FLD_23_DELAY_PING_PONG_HALF = 830; // 16 +const static uint64_t SH_FLD_23_DESIRED_EDGE_CNTR_TARGET_HIGH = 831; // 16 +const static uint64_t SH_FLD_23_DESIRED_EDGE_CNTR_TARGET_HIGH_LEN = 832; // 16 +const static uint64_t SH_FLD_23_DESIRED_EDGE_CNTR_TARGET_LOW = 833; // 16 +const static uint64_t SH_FLD_23_DESIRED_EDGE_CNTR_TARGET_LOW_LEN = 834; // 16 +const static uint64_t SH_FLD_23_DFT_FORCE_OUTPUTS = 835; // 16 +const static uint64_t SH_FLD_23_DFT_PRBS7_GEN_EN = 836; // 16 +const static uint64_t SH_FLD_23_DIGITAL_EN = 837; // 16 +const static uint64_t SH_FLD_23_DIR_0_15 = 838; // 16 +const static uint64_t SH_FLD_23_DIR_0_15_LEN = 839; // 16 +const static uint64_t SH_FLD_23_DISABLE_0_15 = 840; // 64 +const static uint64_t SH_FLD_23_DISABLE_0_15_LEN = 841; // 64 +const static uint64_t SH_FLD_23_DISABLE_16_23 = 842; // 64 +const static uint64_t SH_FLD_23_DISABLE_16_23_LEN = 843; // 64 +const static uint64_t SH_FLD_23_DISABLE_PING_PONG = 844; // 16 +const static uint64_t SH_FLD_23_DISABLE_TERMINATION = 845; // 16 +const static uint64_t SH_FLD_23_DIS_CLK_GATE = 846; // 16 +const static uint64_t SH_FLD_23_DI_ADR0_ADR1 = 847; // 16 +const static uint64_t SH_FLD_23_DI_ADR10_ADR11 = 848; // 16 +const static uint64_t SH_FLD_23_DI_ADR12_ADR13 = 849; // 16 +const static uint64_t SH_FLD_23_DI_ADR14_ADR15 = 850; // 16 +const static uint64_t SH_FLD_23_DI_ADR2 = 851; // 8 +const static uint64_t SH_FLD_23_DI_ADR3 = 852; // 8 +const static uint64_t SH_FLD_23_DI_ADR4_ADR5 = 853; // 16 +const static uint64_t SH_FLD_23_DI_ADR6_ADR7 = 854; // 16 +const static uint64_t SH_FLD_23_DI_ADR8_ADR9 = 855; // 16 +const static uint64_t SH_FLD_23_DL_FORCE_ON = 856; // 16 +const static uint64_t SH_FLD_23_DONE = 857; // 32 +const static uint64_t SH_FLD_23_DQS = 858; // 16 +const static uint64_t SH_FLD_23_DQSCLK_SELECT0 = 859; // 64 +const static uint64_t SH_FLD_23_DQSCLK_SELECT0_LEN = 860; // 64 +const static uint64_t SH_FLD_23_DQSCLK_SELECT1 = 861; // 64 +const static uint64_t SH_FLD_23_DQSCLK_SELECT1_LEN = 862; // 64 +const static uint64_t SH_FLD_23_DQSCLK_SELECT2 = 863; // 64 +const static uint64_t SH_FLD_23_DQSCLK_SELECT2_LEN = 864; // 64 +const static uint64_t SH_FLD_23_DQSCLK_SELECT3 = 865; // 64 +const static uint64_t SH_FLD_23_DQSCLK_SELECT3_LEN = 866; // 64 +const static uint64_t SH_FLD_23_DQS_ALIGN_CNTR = 867; // 16 +const static uint64_t SH_FLD_23_DQS_ALIGN_CNTR_LEN = 868; // 16 +const static uint64_t SH_FLD_23_DQS_ALIGN_FIX_DIS = 869; // 16 +const static uint64_t SH_FLD_23_DQS_ALIGN_ITR_CNTR = 870; // 16 +const static uint64_t SH_FLD_23_DQS_ALIGN_ITR_CNTR_LEN = 871; // 16 +const static uint64_t SH_FLD_23_DQS_ALIGN_JITTER = 872; // 16 +const static uint64_t SH_FLD_23_DQS_ALIGN_QUAD = 873; // 16 +const static uint64_t SH_FLD_23_DQS_ALIGN_QUAD_LEN = 874; // 16 +const static uint64_t SH_FLD_23_DQS_ALIGN_SM = 875; // 16 +const static uint64_t SH_FLD_23_DQS_ALIGN_SM_LEN = 876; // 16 +const static uint64_t SH_FLD_23_DQS_LEN = 877; // 16 +const static uint64_t SH_FLD_23_DQS_PIPE_FIX_DIS = 878; // 16 +const static uint64_t SH_FLD_23_DQS_PIPE_FIX_DIS_LEN = 879; // 16 +const static uint64_t SH_FLD_23_DRIFT_ERROR = 880; // 16 +const static uint64_t SH_FLD_23_DRIFT_MASK = 881; // 16 +const static uint64_t SH_FLD_23_DRVREN_MODE = 882; // 16 +const static uint64_t SH_FLD_23_DYN_MCTERM_CNTL_EN = 883; // 16 +const static uint64_t SH_FLD_23_DYN_POWER_CNTL_EN = 884; // 16 +const static uint64_t SH_FLD_23_DYN_RX_GATE_CNTL_EN = 885; // 16 +const static uint64_t SH_FLD_23_ENABLE = 886; // 32 +const static uint64_t SH_FLD_23_ENABLE_0_15 = 887; // 16 +const static uint64_t SH_FLD_23_ENABLE_0_15_LEN = 888; // 16 +const static uint64_t SH_FLD_23_ENABLE_16_23 = 889; // 16 +const static uint64_t SH_FLD_23_ENABLE_16_23_LEN = 890; // 16 +const static uint64_t SH_FLD_23_EN_DQS_OFFSET = 891; // 16 +const static uint64_t SH_FLD_23_EN_DRIVER_INVFB_DC = 892; // 32 +const static uint64_t SH_FLD_23_EN_N_WR = 893; // 16 +const static uint64_t SH_FLD_23_EN_N_WR_LEN = 894; // 16 +const static uint64_t SH_FLD_23_EN_P_WR = 895; // 32 +const static uint64_t SH_FLD_23_EN_P_WR_LEN = 896; // 32 +const static uint64_t SH_FLD_23_ERROR = 897; // 16 +const static uint64_t SH_FLD_23_ERROR_LEN = 898; // 16 +const static uint64_t SH_FLD_23_ERR_CLK22_MASK = 899; // 16 +const static uint64_t SH_FLD_23_EYE_CLIPPING = 900; // 16 +const static uint64_t SH_FLD_23_EYE_CLIPPING_MASK = 901; // 16 +const static uint64_t SH_FLD_23_FINE_STEPPING = 902; // 16 +const static uint64_t SH_FLD_23_FLUSH = 903; // 16 +const static uint64_t SH_FLD_23_FORCE_DQS_LANES_ON = 904; // 16 +const static uint64_t SH_FLD_23_FORCE_FIFO_CAPTURE = 905; // 16 +const static uint64_t SH_FLD_23_FREE_USAGE = 906; // 1 +const static uint64_t SH_FLD_23_FRZSULV = 907; // 32 +const static uint64_t SH_FLD_23_FW_LEFT_SIDE = 908; // 16 +const static uint64_t SH_FLD_23_FW_LEFT_SIDE_LEN = 909; // 16 +const static uint64_t SH_FLD_23_FW_RIGHT_SIDE = 910; // 16 +const static uint64_t SH_FLD_23_FW_RIGHT_SIDE_LEN = 911; // 16 +const static uint64_t SH_FLD_23_HS_DLLMUX_SEL0_0 = 912; // 8 +const static uint64_t SH_FLD_23_HS_DLLMUX_SEL0_0_3 = 913; // 8 +const static uint64_t SH_FLD_23_HS_DLLMUX_SEL0_0_3_LEN = 914; // 8 +const static uint64_t SH_FLD_23_HS_DLLMUX_SEL0_0_LEN = 915; // 8 +const static uint64_t SH_FLD_23_HS_DLLMUX_SEL1_0 = 916; // 8 +const static uint64_t SH_FLD_23_HS_DLLMUX_SEL1_0_3 = 917; // 8 +const static uint64_t SH_FLD_23_HS_DLLMUX_SEL1_0_3_LEN = 918; // 8 +const static uint64_t SH_FLD_23_HS_DLLMUX_SEL1_0_LEN = 919; // 8 +const static uint64_t SH_FLD_23_HS_PROBE_A = 920; // 16 +const static uint64_t SH_FLD_23_HS_PROBE_A_LEN = 921; // 16 +const static uint64_t SH_FLD_23_HS_PROBE_B = 922; // 16 +const static uint64_t SH_FLD_23_HS_PROBE_B_LEN = 923; // 16 +const static uint64_t SH_FLD_23_HW_VALUE = 924; // 16 +const static uint64_t SH_FLD_23_INCOMPLETE_CAL_N0 = 925; // 16 +const static uint64_t SH_FLD_23_INCOMPLETE_CAL_N0_MASK = 926; // 16 +const static uint64_t SH_FLD_23_INCOMPLETE_CAL_N1 = 927; // 16 +const static uint64_t SH_FLD_23_INCOMPLETE_CAL_N1_MASK = 928; // 16 +const static uint64_t SH_FLD_23_INCOMPLETE_CAL_N2 = 929; // 16 +const static uint64_t SH_FLD_23_INCOMPLETE_CAL_N2_MASK = 930; // 16 +const static uint64_t SH_FLD_23_INCOMPLETE_CAL_N3 = 931; // 16 +const static uint64_t SH_FLD_23_INCOMPLETE_CAL_N3_MASK = 932; // 16 +const static uint64_t SH_FLD_23_INIT_IO = 933; // 16 +const static uint64_t SH_FLD_23_INIT_RXDLL_CAL_RESET = 934; // 32 +const static uint64_t SH_FLD_23_INIT_RXDLL_CAL_UPDATE = 935; // 32 +const static uint64_t SH_FLD_23_INTERP_SIG_SLEW = 936; // 16 +const static uint64_t SH_FLD_23_INTERP_SIG_SLEW_LEN = 937; // 16 +const static uint64_t SH_FLD_23_INVALID_NS_BIG_R = 938; // 16 +const static uint64_t SH_FLD_23_INVALID_NS_BIG_R_MASK = 939; // 16 +const static uint64_t SH_FLD_23_INVALID_NS_SMALL_L = 940; // 16 +const static uint64_t SH_FLD_23_INVALID_NS_SMALL_L_MASK = 941; // 16 +const static uint64_t SH_FLD_23_INVALID_NS_SMALL_R = 942; // 16 +const static uint64_t SH_FLD_23_INVALID_NS_SMALL_R_MASK = 943; // 16 +const static uint64_t SH_FLD_23_JUMP_BACK_RIGHT = 944; // 16 +const static uint64_t SH_FLD_23_LANE__0_11_PD = 945; // 16 +const static uint64_t SH_FLD_23_LANE__0_11_PD_LEN = 946; // 16 +const static uint64_t SH_FLD_23_LANE__12_15_PD = 947; // 16 +const static uint64_t SH_FLD_23_LANE__12_15_PD_LEN = 948; // 16 +const static uint64_t SH_FLD_23_LEADING_EDGE_FOUND_MASK = 949; // 16 +const static uint64_t SH_FLD_23_LEADING_EDGE_NOT_FOUND = 950; // 16 +const static uint64_t SH_FLD_23_LEADING_EDGE_NOT_FOUND_0_15 = 951; // 16 +const static uint64_t SH_FLD_23_LEADING_EDGE_NOT_FOUND_0_15_LEN = 952; // 16 +const static uint64_t SH_FLD_23_LEADING_EDGE_NOT_FOUND_16_23 = 953; // 16 +const static uint64_t SH_FLD_23_LEADING_EDGE_NOT_FOUND_16_23_LEN = 954; // 16 +const static uint64_t SH_FLD_23_LEN = 955; // 96 +const static uint64_t SH_FLD_23_LOOPBACK_DLY12 = 956; // 16 +const static uint64_t SH_FLD_23_LOOPBACK_FIX_EN = 957; // 16 +const static uint64_t SH_FLD_23_MATCH_STEP_RIGHT = 958; // 16 +const static uint64_t SH_FLD_23_MAX_DQS = 959; // 16 +const static uint64_t SH_FLD_23_MAX_DQS_ITER = 960; // 16 +const static uint64_t SH_FLD_23_MAX_DQS_LEN = 961; // 16 +const static uint64_t SH_FLD_23_MEMINTD00 = 962; // 16 +const static uint64_t SH_FLD_23_MEMINTD00_LEN = 963; // 16 +const static uint64_t SH_FLD_23_MEMINTD01 = 964; // 16 +const static uint64_t SH_FLD_23_MEMINTD01_LEN = 965; // 16 +const static uint64_t SH_FLD_23_MEMINTD02 = 966; // 16 +const static uint64_t SH_FLD_23_MEMINTD02_LEN = 967; // 16 +const static uint64_t SH_FLD_23_MEMINTD03 = 968; // 16 +const static uint64_t SH_FLD_23_MEMINTD03_LEN = 969; // 16 +const static uint64_t SH_FLD_23_MEMINTD04 = 970; // 16 +const static uint64_t SH_FLD_23_MEMINTD04_LEN = 971; // 16 +const static uint64_t SH_FLD_23_MEMINTD05 = 972; // 16 +const static uint64_t SH_FLD_23_MEMINTD05_LEN = 973; // 16 +const static uint64_t SH_FLD_23_MEMINTD06 = 974; // 16 +const static uint64_t SH_FLD_23_MEMINTD06_LEN = 975; // 16 +const static uint64_t SH_FLD_23_MEMINTD07 = 976; // 16 +const static uint64_t SH_FLD_23_MEMINTD07_LEN = 977; // 16 +const static uint64_t SH_FLD_23_MEMINTD08 = 978; // 16 +const static uint64_t SH_FLD_23_MEMINTD08_LEN = 979; // 16 +const static uint64_t SH_FLD_23_MEMINTD09 = 980; // 16 +const static uint64_t SH_FLD_23_MEMINTD09_LEN = 981; // 16 +const static uint64_t SH_FLD_23_MEMINTD10 = 982; // 16 +const static uint64_t SH_FLD_23_MEMINTD10_LEN = 983; // 16 +const static uint64_t SH_FLD_23_MEMINTD11 = 984; // 16 +const static uint64_t SH_FLD_23_MEMINTD11_LEN = 985; // 16 +const static uint64_t SH_FLD_23_MEMINTD12 = 986; // 16 +const static uint64_t SH_FLD_23_MEMINTD12_LEN = 987; // 16 +const static uint64_t SH_FLD_23_MEMINTD13 = 988; // 16 +const static uint64_t SH_FLD_23_MEMINTD13_LEN = 989; // 16 +const static uint64_t SH_FLD_23_MEMINTD14 = 990; // 16 +const static uint64_t SH_FLD_23_MEMINTD14_LEN = 991; // 16 +const static uint64_t SH_FLD_23_MEMINTD15 = 992; // 16 +const static uint64_t SH_FLD_23_MEMINTD15_LEN = 993; // 16 +const static uint64_t SH_FLD_23_MEMINTD16 = 994; // 16 +const static uint64_t SH_FLD_23_MEMINTD16_LEN = 995; // 16 +const static uint64_t SH_FLD_23_MEMINTD17 = 996; // 16 +const static uint64_t SH_FLD_23_MEMINTD17_LEN = 997; // 16 +const static uint64_t SH_FLD_23_MEMINTD18 = 998; // 16 +const static uint64_t SH_FLD_23_MEMINTD18_LEN = 999; // 16 +const static uint64_t SH_FLD_23_MEMINTD19 = 1000; // 16 +const static uint64_t SH_FLD_23_MEMINTD19_LEN = 1001; // 16 +const static uint64_t SH_FLD_23_MEMINTD20 = 1002; // 16 +const static uint64_t SH_FLD_23_MEMINTD20_LEN = 1003; // 16 +const static uint64_t SH_FLD_23_MEMINTD21 = 1004; // 16 +const static uint64_t SH_FLD_23_MEMINTD21_LEN = 1005; // 16 +const static uint64_t SH_FLD_23_MEMINTD22 = 1006; // 16 +const static uint64_t SH_FLD_23_MEMINTD22_LEN = 1007; // 16 +const static uint64_t SH_FLD_23_MEMINTD23 = 1008; // 16 +const static uint64_t SH_FLD_23_MEMINTD23_LEN = 1009; // 16 +const static uint64_t SH_FLD_23_MIN_EYE = 1010; // 16 +const static uint64_t SH_FLD_23_MIN_EYE_MASK = 1011; // 16 +const static uint64_t SH_FLD_23_MIN_RD_EYE_SIZE = 1012; // 16 +const static uint64_t SH_FLD_23_MIN_RD_EYE_SIZE_LEN = 1013; // 16 +const static uint64_t SH_FLD_23_MRS_CMD_N0 = 1014; // 16 +const static uint64_t SH_FLD_23_MRS_CMD_N1 = 1015; // 16 +const static uint64_t SH_FLD_23_MRS_CMD_N2 = 1016; // 16 +const static uint64_t SH_FLD_23_MRS_CMD_N3 = 1017; // 16 +const static uint64_t SH_FLD_23_N0 = 1018; // 128 +const static uint64_t SH_FLD_23_N0_LEN = 1019; // 128 +const static uint64_t SH_FLD_23_N1 = 1020; // 128 +const static uint64_t SH_FLD_23_N1_LEN = 1021; // 128 +const static uint64_t SH_FLD_23_N2 = 1022; // 128 +const static uint64_t SH_FLD_23_N2_LEN = 1023; // 128 +const static uint64_t SH_FLD_23_N3 = 1024; // 128 +const static uint64_t SH_FLD_23_N3_LEN = 1025; // 128 +const static uint64_t SH_FLD_23_NIB0 = 1026; // 16 +const static uint64_t SH_FLD_23_NIB0TCFLIP_DC = 1027; // 16 +const static uint64_t SH_FLD_23_NIB0_LEN = 1028; // 16 +const static uint64_t SH_FLD_23_NIB1 = 1029; // 16 +const static uint64_t SH_FLD_23_NIB1TCFLIP_DC = 1030; // 16 +const static uint64_t SH_FLD_23_NIB1_LEN = 1031; // 16 +const static uint64_t SH_FLD_23_NIB2 = 1032; // 16 +const static uint64_t SH_FLD_23_NIB2TCFLIP_DC = 1033; // 16 +const static uint64_t SH_FLD_23_NIB2_LEN = 1034; // 16 +const static uint64_t SH_FLD_23_NIB3 = 1035; // 16 +const static uint64_t SH_FLD_23_NIB3TCFLIP_DC = 1036; // 16 +const static uint64_t SH_FLD_23_NIB3_LEN = 1037; // 16 +const static uint64_t SH_FLD_23_NIB_0_2_DQSEL_CAP = 1038; // 16 +const static uint64_t SH_FLD_23_NIB_0_2_DQSEL_CAP_LEN = 1039; // 16 +const static uint64_t SH_FLD_23_NIB_0_2_DQSEL_IND = 1040; // 16 +const static uint64_t SH_FLD_23_NIB_0_2_DQSEL_IND_LEN = 1041; // 16 +const static uint64_t SH_FLD_23_NIB_0_2_DQSEL_RES = 1042; // 16 +const static uint64_t SH_FLD_23_NIB_0_2_DQSEL_RES_LEN = 1043; // 16 +const static uint64_t SH_FLD_23_NIB_0_DQSEL_CAP = 1044; // 16 +const static uint64_t SH_FLD_23_NIB_0_DQSEL_CAP_LEN = 1045; // 16 +const static uint64_t SH_FLD_23_NIB_0_DQSEL_IND = 1046; // 16 +const static uint64_t SH_FLD_23_NIB_0_DQSEL_IND_LEN = 1047; // 16 +const static uint64_t SH_FLD_23_NIB_0_DQSEL_RES = 1048; // 16 +const static uint64_t SH_FLD_23_NIB_0_DQSEL_RES_LEN = 1049; // 16 +const static uint64_t SH_FLD_23_NIB_1_3_DQSEL_CAP = 1050; // 16 +const static uint64_t SH_FLD_23_NIB_1_3_DQSEL_CAP_LEN = 1051; // 16 +const static uint64_t SH_FLD_23_NIB_1_3_DQSEL_IND = 1052; // 16 +const static uint64_t SH_FLD_23_NIB_1_3_DQSEL_IND_LEN = 1053; // 16 +const static uint64_t SH_FLD_23_NIB_1_3_DQSEL_RES = 1054; // 16 +const static uint64_t SH_FLD_23_NIB_1_3_DQSEL_RES_LEN = 1055; // 16 +const static uint64_t SH_FLD_23_NIB_1_DQSEL_CAP = 1056; // 16 +const static uint64_t SH_FLD_23_NIB_1_DQSEL_CAP_LEN = 1057; // 16 +const static uint64_t SH_FLD_23_NIB_1_DQSEL_IND = 1058; // 16 +const static uint64_t SH_FLD_23_NIB_1_DQSEL_IND_LEN = 1059; // 16 +const static uint64_t SH_FLD_23_NIB_1_DQSEL_RES = 1060; // 16 +const static uint64_t SH_FLD_23_NIB_1_DQSEL_RES_LEN = 1061; // 16 +const static uint64_t SH_FLD_23_NO_DQS = 1062; // 16 +const static uint64_t SH_FLD_23_NO_DQS_MASK = 1063; // 16 +const static uint64_t SH_FLD_23_NO_EYE_DETECTED = 1064; // 16 +const static uint64_t SH_FLD_23_NO_EYE_DETECTED_MASK = 1065; // 16 +const static uint64_t SH_FLD_23_NO_LOCK = 1066; // 16 +const static uint64_t SH_FLD_23_NO_LOCK_MASK = 1067; // 16 +const static uint64_t SH_FLD_23_OFFSET0 = 1068; // 16 +const static uint64_t SH_FLD_23_OFFSET0_LEN = 1069; // 16 +const static uint64_t SH_FLD_23_OFFSET1 = 1070; // 16 +const static uint64_t SH_FLD_23_OFFSET1_LEN = 1071; // 16 +const static uint64_t SH_FLD_23_OFFSET2 = 1072; // 32 +const static uint64_t SH_FLD_23_OFFSET2_LEN = 1073; // 32 +const static uint64_t SH_FLD_23_OFFSET3 = 1074; // 32 +const static uint64_t SH_FLD_23_OFFSET3_LEN = 1075; // 32 +const static uint64_t SH_FLD_23_OFFSET4 = 1076; // 32 +const static uint64_t SH_FLD_23_OFFSET4_LEN = 1077; // 32 +const static uint64_t SH_FLD_23_OFFSET5 = 1078; // 32 +const static uint64_t SH_FLD_23_OFFSET5_LEN = 1079; // 32 +const static uint64_t SH_FLD_23_OFFSET6 = 1080; // 32 +const static uint64_t SH_FLD_23_OFFSET6_LEN = 1081; // 32 +const static uint64_t SH_FLD_23_OFFSET7 = 1082; // 32 +const static uint64_t SH_FLD_23_OFFSET7_LEN = 1083; // 32 +const static uint64_t SH_FLD_23_OFFSET_ERR = 1084; // 16 +const static uint64_t SH_FLD_23_OFFSET_ERR_MASK = 1085; // 16 +const static uint64_t SH_FLD_23_OPERATE_MODE = 1086; // 16 +const static uint64_t SH_FLD_23_OPERATE_MODE_LEN = 1087; // 16 +const static uint64_t SH_FLD_23_PERCAL_PWR_DIS = 1088; // 16 +const static uint64_t SH_FLD_23_PER_CAL_UPDATE_DISABLE = 1089; // 16 +const static uint64_t SH_FLD_23_PHASE_ALIGN_RESET = 1090; // 32 +const static uint64_t SH_FLD_23_PHASE_CNTL_EN = 1091; // 32 +const static uint64_t SH_FLD_23_PHASE_DEFAULT_EN = 1092; // 32 +const static uint64_t SH_FLD_23_POS_EDGE_ALIGN = 1093; // 32 +const static uint64_t SH_FLD_23_QUAD0 = 1094; // 16 +const static uint64_t SH_FLD_23_QUAD0_CLK16 = 1095; // 128 +const static uint64_t SH_FLD_23_QUAD0_CLK18 = 1096; // 128 +const static uint64_t SH_FLD_23_QUAD0_LEN = 1097; // 16 +const static uint64_t SH_FLD_23_QUAD1 = 1098; // 16 +const static uint64_t SH_FLD_23_QUAD1_CLK16 = 1099; // 128 +const static uint64_t SH_FLD_23_QUAD1_CLK18 = 1100; // 128 +const static uint64_t SH_FLD_23_QUAD1_LEN = 1101; // 16 +const static uint64_t SH_FLD_23_QUAD2 = 1102; // 16 +const static uint64_t SH_FLD_23_QUAD2_CLK16 = 1103; // 128 +const static uint64_t SH_FLD_23_QUAD2_CLK18 = 1104; // 64 +const static uint64_t SH_FLD_23_QUAD2_CLK20 = 1105; // 128 +const static uint64_t SH_FLD_23_QUAD2_CLK22 = 1106; // 128 +const static uint64_t SH_FLD_23_QUAD2_LEN = 1107; // 16 +const static uint64_t SH_FLD_23_QUAD3 = 1108; // 16 +const static uint64_t SH_FLD_23_QUAD3_CLK16 = 1109; // 128 +const static uint64_t SH_FLD_23_QUAD3_CLK18 = 1110; // 64 +const static uint64_t SH_FLD_23_QUAD3_CLK20 = 1111; // 128 +const static uint64_t SH_FLD_23_QUAD3_CLK22 = 1112; // 128 +const static uint64_t SH_FLD_23_QUAD3_LEN = 1113; // 16 +const static uint64_t SH_FLD_23_RD = 1114; // 272 +const static uint64_t SH_FLD_23_RDCLK_SELECT0 = 1115; // 64 +const static uint64_t SH_FLD_23_RDCLK_SELECT0_LEN = 1116; // 64 +const static uint64_t SH_FLD_23_RDCLK_SELECT1 = 1117; // 64 +const static uint64_t SH_FLD_23_RDCLK_SELECT1_LEN = 1118; // 64 +const static uint64_t SH_FLD_23_RDCLK_SELECT2 = 1119; // 64 +const static uint64_t SH_FLD_23_RDCLK_SELECT2_LEN = 1120; // 64 +const static uint64_t SH_FLD_23_RDCLK_SELECT3 = 1121; // 64 +const static uint64_t SH_FLD_23_RDCLK_SELECT3_LEN = 1122; // 64 +const static uint64_t SH_FLD_23_RD_DELAY0 = 1123; // 112 +const static uint64_t SH_FLD_23_RD_DELAY0_LEN = 1124; // 112 +const static uint64_t SH_FLD_23_RD_DELAY1 = 1125; // 112 +const static uint64_t SH_FLD_23_RD_DELAY1_LEN = 1126; // 112 +const static uint64_t SH_FLD_23_RD_DELAY2 = 1127; // 112 +const static uint64_t SH_FLD_23_RD_DELAY2_LEN = 1128; // 112 +const static uint64_t SH_FLD_23_RD_DELAY3 = 1129; // 112 +const static uint64_t SH_FLD_23_RD_DELAY3_LEN = 1130; // 112 +const static uint64_t SH_FLD_23_RD_DELAY4 = 1131; // 112 +const static uint64_t SH_FLD_23_RD_DELAY4_LEN = 1132; // 112 +const static uint64_t SH_FLD_23_RD_DELAY5 = 1133; // 112 +const static uint64_t SH_FLD_23_RD_DELAY5_LEN = 1134; // 112 +const static uint64_t SH_FLD_23_RD_DELAY6 = 1135; // 112 +const static uint64_t SH_FLD_23_RD_DELAY6_LEN = 1136; // 112 +const static uint64_t SH_FLD_23_RD_DELAY7 = 1137; // 112 +const static uint64_t SH_FLD_23_RD_DELAY7_LEN = 1138; // 112 +const static uint64_t SH_FLD_23_RD_LEN = 1139; // 272 +const static uint64_t SH_FLD_23_RD_SIZE0 = 1140; // 176 +const static uint64_t SH_FLD_23_RD_SIZE0_LEN = 1141; // 176 +const static uint64_t SH_FLD_23_RD_SIZE1 = 1142; // 176 +const static uint64_t SH_FLD_23_RD_SIZE1_LEN = 1143; // 176 +const static uint64_t SH_FLD_23_RD_SIZE2 = 1144; // 176 +const static uint64_t SH_FLD_23_RD_SIZE2_LEN = 1145; // 176 +const static uint64_t SH_FLD_23_RD_SIZE3 = 1146; // 176 +const static uint64_t SH_FLD_23_RD_SIZE3_LEN = 1147; // 176 +const static uint64_t SH_FLD_23_RD_SIZE4 = 1148; // 176 +const static uint64_t SH_FLD_23_RD_SIZE4_LEN = 1149; // 176 +const static uint64_t SH_FLD_23_RD_SIZE5 = 1150; // 176 +const static uint64_t SH_FLD_23_RD_SIZE5_LEN = 1151; // 176 +const static uint64_t SH_FLD_23_RD_SIZE6 = 1152; // 176 +const static uint64_t SH_FLD_23_RD_SIZE6_LEN = 1153; // 176 +const static uint64_t SH_FLD_23_RD_SIZE7 = 1154; // 176 +const static uint64_t SH_FLD_23_RD_SIZE7_LEN = 1155; // 176 +const static uint64_t SH_FLD_23_READ_CENTERING_MODE = 1156; // 16 +const static uint64_t SH_FLD_23_READ_CENTERING_MODE_LEN = 1157; // 16 +const static uint64_t SH_FLD_23_REFERENCE1 = 1158; // 16 +const static uint64_t SH_FLD_23_REFERENCE1_LEN = 1159; // 16 +const static uint64_t SH_FLD_23_REFERENCE2 = 1160; // 16 +const static uint64_t SH_FLD_23_REFERENCE2_LEN = 1161; // 16 +const static uint64_t SH_FLD_23_REFERENCE3 = 1162; // 16 +const static uint64_t SH_FLD_23_REFERENCE3_LEN = 1163; // 16 +const static uint64_t SH_FLD_23_REGS_RXDLL_CAL_SKIP = 1164; // 32 +const static uint64_t SH_FLD_23_REGS_RXDLL_CAL_SKIP_LEN = 1165; // 32 +const static uint64_t SH_FLD_23_REGS_RXDLL_COARSE_ADJ_BY2 = 1166; // 32 +const static uint64_t SH_FLD_23_REGS_RXDLL_COARSE_EN = 1167; // 32 +const static uint64_t SH_FLD_23_REGS_RXDLL_COARSE_EN_LEN = 1168; // 32 +const static uint64_t SH_FLD_23_REGS_RXDLL_DAC_COARSE = 1169; // 32 +const static uint64_t SH_FLD_23_REGS_RXDLL_DAC_COARSE_LEN = 1170; // 32 +const static uint64_t SH_FLD_23_REGS_RXDLL_VREG_LOWER = 1171; // 32 +const static uint64_t SH_FLD_23_REGS_RXDLL_VREG_LOWER_LEN = 1172; // 32 +const static uint64_t SH_FLD_23_REGS_RXDLL_VREG_UPPER = 1173; // 32 +const static uint64_t SH_FLD_23_REGS_RXDLL_VREG_UPPER_LEN = 1174; // 32 +const static uint64_t SH_FLD_23_RESERVED = 1175; // 2 +const static uint64_t SH_FLD_23_RESERVED_56_63 = 1176; // 16 +const static uint64_t SH_FLD_23_RESERVED_56_63_LEN = 1177; // 16 +const static uint64_t SH_FLD_23_ROT0 = 1178; // 16 +const static uint64_t SH_FLD_23_ROT0_LEN = 1179; // 16 +const static uint64_t SH_FLD_23_ROT1 = 1180; // 16 +const static uint64_t SH_FLD_23_ROT1_LEN = 1181; // 16 +const static uint64_t SH_FLD_23_ROT_CLK_N0 = 1182; // 128 +const static uint64_t SH_FLD_23_ROT_CLK_N0_LEN = 1183; // 128 +const static uint64_t SH_FLD_23_ROT_CLK_N1 = 1184; // 128 +const static uint64_t SH_FLD_23_ROT_CLK_N1_LEN = 1185; // 128 +const static uint64_t SH_FLD_23_ROT_N0 = 1186; // 128 +const static uint64_t SH_FLD_23_ROT_N0_LEN = 1187; // 128 +const static uint64_t SH_FLD_23_ROT_N1 = 1188; // 128 +const static uint64_t SH_FLD_23_ROT_N1_LEN = 1189; // 128 +const static uint64_t SH_FLD_23_ROT_OVERRIDE = 1190; // 32 +const static uint64_t SH_FLD_23_ROT_OVERRIDE_EN = 1191; // 32 +const static uint64_t SH_FLD_23_ROT_OVERRIDE_LEN = 1192; // 32 +const static uint64_t SH_FLD_23_RXREG_COMPCON_DC = 1193; // 32 +const static uint64_t SH_FLD_23_RXREG_COMPCON_DC_LEN = 1194; // 32 +const static uint64_t SH_FLD_23_RXREG_CON_DC = 1195; // 32 +const static uint64_t SH_FLD_23_RXREG_DAC_PULLUP_DC = 1196; // 32 +const static uint64_t SH_FLD_23_RXREG_DRVCON_DC = 1197; // 32 +const static uint64_t SH_FLD_23_RXREG_DRVCON_DC_LEN = 1198; // 32 +const static uint64_t SH_FLD_23_RXREG_FILTER_LENGTH_DC = 1199; // 32 +const static uint64_t SH_FLD_23_RXREG_FILTER_LENGTH_DC_LEN = 1200; // 32 +const static uint64_t SH_FLD_23_RXREG_LEAD_LAG_SEPARATION_DC = 1201; // 32 +const static uint64_t SH_FLD_23_RXREG_LEAD_LAG_SEPARATION_DC_LEN = 1202; // 32 +const static uint64_t SH_FLD_23_RXREG_REF_SEL_DC = 1203; // 32 +const static uint64_t SH_FLD_23_RXREG_REF_SEL_DC_LEN = 1204; // 32 +const static uint64_t SH_FLD_23_S0ACENSLICENDRV_DC = 1205; // 16 +const static uint64_t SH_FLD_23_S0ACENSLICENDRV_DC_LEN = 1206; // 16 +const static uint64_t SH_FLD_23_S0ACENSLICEPDRV_DC = 1207; // 16 +const static uint64_t SH_FLD_23_S0ACENSLICEPDRV_DC_LEN = 1208; // 16 +const static uint64_t SH_FLD_23_S0ACENSLICEPTERM_DC = 1209; // 16 +const static uint64_t SH_FLD_23_S0ACENSLICEPTERM_DC_LEN = 1210; // 16 +const static uint64_t SH_FLD_23_S0INSDLYTAP = 1211; // 16 +const static uint64_t SH_FLD_23_S1ACENSLICENDRV_DC = 1212; // 16 +const static uint64_t SH_FLD_23_S1ACENSLICENDRV_DC_LEN = 1213; // 16 +const static uint64_t SH_FLD_23_S1ACENSLICEPDRV_DC = 1214; // 16 +const static uint64_t SH_FLD_23_S1ACENSLICEPDRV_DC_LEN = 1215; // 16 +const static uint64_t SH_FLD_23_S1ACENSLICEPTERM_DC = 1216; // 16 +const static uint64_t SH_FLD_23_S1ACENSLICEPTERM_DC_LEN = 1217; // 16 +const static uint64_t SH_FLD_23_S1INSDLYTAP = 1218; // 16 +const static uint64_t SH_FLD_23_SEL0 = 1219; // 32 +const static uint64_t SH_FLD_23_SEL0_LEN = 1220; // 16 +const static uint64_t SH_FLD_23_SEL1 = 1221; // 32 +const static uint64_t SH_FLD_23_SEL10 = 1222; // 32 +const static uint64_t SH_FLD_23_SEL10_LEN = 1223; // 32 +const static uint64_t SH_FLD_23_SEL11 = 1224; // 32 +const static uint64_t SH_FLD_23_SEL11_LEN = 1225; // 32 +const static uint64_t SH_FLD_23_SEL12 = 1226; // 32 +const static uint64_t SH_FLD_23_SEL12_LEN = 1227; // 32 +const static uint64_t SH_FLD_23_SEL13 = 1228; // 32 +const static uint64_t SH_FLD_23_SEL13_LEN = 1229; // 32 +const static uint64_t SH_FLD_23_SEL14 = 1230; // 32 +const static uint64_t SH_FLD_23_SEL14_LEN = 1231; // 32 +const static uint64_t SH_FLD_23_SEL15 = 1232; // 32 +const static uint64_t SH_FLD_23_SEL15_LEN = 1233; // 32 +const static uint64_t SH_FLD_23_SEL1_LEN = 1234; // 32 +const static uint64_t SH_FLD_23_SEL2 = 1235; // 32 +const static uint64_t SH_FLD_23_SEL2_LEN = 1236; // 32 +const static uint64_t SH_FLD_23_SEL3 = 1237; // 32 +const static uint64_t SH_FLD_23_SEL3_LEN = 1238; // 32 +const static uint64_t SH_FLD_23_SEL4 = 1239; // 32 +const static uint64_t SH_FLD_23_SEL4_LEN = 1240; // 32 +const static uint64_t SH_FLD_23_SEL5 = 1241; // 32 +const static uint64_t SH_FLD_23_SEL5_LEN = 1242; // 32 +const static uint64_t SH_FLD_23_SEL6 = 1243; // 32 +const static uint64_t SH_FLD_23_SEL6_LEN = 1244; // 32 +const static uint64_t SH_FLD_23_SEL7 = 1245; // 32 +const static uint64_t SH_FLD_23_SEL7_LEN = 1246; // 32 +const static uint64_t SH_FLD_23_SEL8 = 1247; // 32 +const static uint64_t SH_FLD_23_SEL8_LEN = 1248; // 16 +const static uint64_t SH_FLD_23_SEL9 = 1249; // 32 +const static uint64_t SH_FLD_23_SEL9_LEN = 1250; // 32 +const static uint64_t SH_FLD_23_SMALL_STEP_LEFT = 1251; // 16 +const static uint64_t SH_FLD_23_SMALL_STEP_RIGHT = 1252; // 16 +const static uint64_t SH_FLD_23_SPARE_OSC = 1253; // 1 +const static uint64_t SH_FLD_23_SPARE_PLL_CONTROL = 1254; // 1 +const static uint64_t SH_FLD_23_SPARE_RESONANT_CLOCKING_CONTROL = 1255; // 1 +const static uint64_t SH_FLD_23_SPARE_TEST = 1256; // 1 +const static uint64_t SH_FLD_23_SYNC = 1257; // 16 +const static uint64_t SH_FLD_23_SYNC_LEN = 1258; // 16 +const static uint64_t SH_FLD_23_SYSCLK_DQSCLK_OFFSET = 1259; // 16 +const static uint64_t SH_FLD_23_SYSCLK_DQSCLK_OFFSET_LEN = 1260; // 16 +const static uint64_t SH_FLD_23_SYSCLK_RDCLK_OFFSET = 1261; // 16 +const static uint64_t SH_FLD_23_SYSCLK_RDCLK_OFFSET_LEN = 1262; // 16 +const static uint64_t SH_FLD_23_TEST_4TO1_MODE = 1263; // 16 +const static uint64_t SH_FLD_23_TEST_CHECK_EN = 1264; // 16 +const static uint64_t SH_FLD_23_TEST_CLEAR_ERROR = 1265; // 16 +const static uint64_t SH_FLD_23_TEST_DATA_EN = 1266; // 16 +const static uint64_t SH_FLD_23_TEST_GEN_EN = 1267; // 16 +const static uint64_t SH_FLD_23_TEST_LANE_PAIR_FAIL = 1268; // 16 +const static uint64_t SH_FLD_23_TEST_LANE_PAIR_FAIL_LEN = 1269; // 16 +const static uint64_t SH_FLD_23_TEST_MODE = 1270; // 16 +const static uint64_t SH_FLD_23_TEST_MODE_LEN = 1271; // 16 +const static uint64_t SH_FLD_23_TEST_RESET = 1272; // 16 +const static uint64_t SH_FLD_23_TRAILING_EDGE_FOUND_MASK = 1273; // 16 +const static uint64_t SH_FLD_23_TRAILING_EDGE_NOT_FOUND = 1274; // 16 +const static uint64_t SH_FLD_23_TRAILING_EDGE_NOT_FOUND_0_15 = 1275; // 16 +const static uint64_t SH_FLD_23_TRAILING_EDGE_NOT_FOUND_0_15_LEN = 1276; // 16 +const static uint64_t SH_FLD_23_TRAILING_EDGE_NOT_FOUND_16_23 = 1277; // 16 +const static uint64_t SH_FLD_23_TRAILING_EDGE_NOT_FOUND_16_23_LEN = 1278; // 16 +const static uint64_t SH_FLD_23_TRIG_PERIOD = 1279; // 16 +const static uint64_t SH_FLD_23_TSYS = 1280; // 16 +const static uint64_t SH_FLD_23_TSYS_LEN = 1281; // 16 +const static uint64_t SH_FLD_23_TUNEATST_0 = 1282; // 16 +const static uint64_t SH_FLD_23_TUNEATST_1 = 1283; // 16 +const static uint64_t SH_FLD_23_VALID_NS_BIG_L = 1284; // 16 +const static uint64_t SH_FLD_23_VALID_NS_BIG_L_MASK = 1285; // 16 +const static uint64_t SH_FLD_23_VALID_NS_BIG_R = 1286; // 16 +const static uint64_t SH_FLD_23_VALID_NS_BIG_R_MASK = 1287; // 16 +const static uint64_t SH_FLD_23_VALID_NS_JUMP_BACK = 1288; // 16 +const static uint64_t SH_FLD_23_VALID_NS_JUMP_BACK_MASK = 1289; // 16 +const static uint64_t SH_FLD_23_WL_ADVANCE_DISABLE = 1290; // 16 +const static uint64_t SH_FLD_23_WL_ERR_CLK16 = 1291; // 32 +const static uint64_t SH_FLD_23_WL_ERR_CLK16_MASK = 1292; // 16 +const static uint64_t SH_FLD_23_WL_ERR_CLK18 = 1293; // 32 +const static uint64_t SH_FLD_23_WL_ERR_CLK18_MASK = 1294; // 16 +const static uint64_t SH_FLD_23_WL_ERR_CLK20 = 1295; // 32 +const static uint64_t SH_FLD_23_WL_ERR_CLK20_MASK = 1296; // 16 +const static uint64_t SH_FLD_23_WL_ERR_CLK22 = 1297; // 32 +const static uint64_t SH_FLD_23_WRAPSEL = 1298; // 16 +const static uint64_t SH_FLD_23_WTRFL_AVE_DIS = 1299; // 16 +const static uint64_t SH_FLD_23_ZERO_DETECTED = 1300; // 16 +const static uint64_t SH_FLD_24 = 1301; // 6 +const static uint64_t SH_FLD_24CORE_EN = 1302; // 1 +const static uint64_t SH_FLD_24_FREE_USAGE = 1303; // 1 +const static uint64_t SH_FLD_24_RESERVED = 1304; // 2 +const static uint64_t SH_FLD_24_SPARE_CBS_CONTROL = 1305; // 1 +const static uint64_t SH_FLD_24_SPARE_OSC = 1306; // 1 +const static uint64_t SH_FLD_24_SPARE_RESONANT_CLOCKING_CONTROL = 1307; // 1 +const static uint64_t SH_FLD_25 = 1308; // 6 +const static uint64_t SH_FLD_25_FREE_USAGE = 1309; // 1 +const static uint64_t SH_FLD_25_SPARE_CBS_CONTROL = 1310; // 1 +const static uint64_t SH_FLD_25_SPARE_CLKIN_CONTROL = 1311; // 1 +const static uint64_t SH_FLD_25_SPARE_OSC = 1312; // 1 +const static uint64_t SH_FLD_25_SPARE_REFCLOCK_CONTROL = 1313; // 1 +const static uint64_t SH_FLD_25_SPARE_RESONANT_CLOCKING_CONTROL = 1314; // 1 +const static uint64_t SH_FLD_26 = 1315; // 6 +const static uint64_t SH_FLD_26_FREE_USAGE = 1316; // 1 +const static uint64_t SH_FLD_26_SPARE_CBS_CONTROL = 1317; // 1 +const static uint64_t SH_FLD_26_SPARE_CLKIN_CONTROL = 1318; // 1 +const static uint64_t SH_FLD_26_SPARE_OSC = 1319; // 1 +const static uint64_t SH_FLD_26_SPARE_REFCLOCK_CONTROL = 1320; // 1 +const static uint64_t SH_FLD_26_SPARE_RESONANT_CLOCKING_CONTROL = 1321; // 1 +const static uint64_t SH_FLD_27 = 1322; // 6 +const static uint64_t SH_FLD_27_FREE_USAGE = 1323; // 1 +const static uint64_t SH_FLD_27_SPARE_CBS_CONTROL = 1324; // 1 +const static uint64_t SH_FLD_27_SPARE_CLKIN_CONTROL = 1325; // 1 +const static uint64_t SH_FLD_27_SPARE_OSC = 1326; // 1 +const static uint64_t SH_FLD_27_SPARE_RESONANT_CLOCKING_CONTROL = 1327; // 1 +const static uint64_t SH_FLD_28 = 1328; // 6 +const static uint64_t SH_FLD_28_FREE_USAGE = 1329; // 1 +const static uint64_t SH_FLD_28_RESERVED_FOR_HTB = 1330; // 1 +const static uint64_t SH_FLD_28_SPARE_OSC = 1331; // 1 +const static uint64_t SH_FLD_28_SPARE_RESET = 1332; // 1 +const static uint64_t SH_FLD_28_SPARE_RESONANT_CLOCKING_CONTROL = 1333; // 1 +const static uint64_t SH_FLD_28_SPARE_TEST_CONTROL = 1334; // 1 +const static uint64_t SH_FLD_29 = 1335; // 6 +const static uint64_t SH_FLD_29_FREE_USAGE = 1336; // 1 +const static uint64_t SH_FLD_29_RESERVED_FOR_HTB = 1337; // 1 +const static uint64_t SH_FLD_29_SPARE_OSC = 1338; // 1 +const static uint64_t SH_FLD_29_SPARE_REFCLOCK_CONTROL = 1339; // 1 +const static uint64_t SH_FLD_29_SPARE_RESET = 1340; // 1 +const static uint64_t SH_FLD_29_SPARE_RESONANT_CLOCKING_CONTROL = 1341; // 1 +const static uint64_t SH_FLD_29_SPARE_TEST_CONTROL = 1342; // 1 +const static uint64_t SH_FLD_2_CANNED_0 = 1343; // 2 +const static uint64_t SH_FLD_2_CANNED_0_LEN = 1344; // 2 +const static uint64_t SH_FLD_2_CANNED_1 = 1345; // 2 +const static uint64_t SH_FLD_2_CANNED_1_LEN = 1346; // 2 +const static uint64_t SH_FLD_2_DATA = 1347; // 1 +const static uint64_t SH_FLD_2_DATA_LEN = 1348; // 1 +const static uint64_t SH_FLD_2_LEN = 1349; // 46 +const static uint64_t SH_FLD_2_RESERVED = 1350; // 1 +const static uint64_t SH_FLD_2_SPARE_SECTOR_BUFFER_CONTROL = 1351; // 1 +const static uint64_t SH_FLD_2_SPARE_SS_PLL_CONTROL = 1352; // 1 +const static uint64_t SH_FLD_3 = 1353; // 464 +const static uint64_t SH_FLD_30 = 1354; // 6 +const static uint64_t SH_FLD_30_FREE_USAGE = 1355; // 1 +const static uint64_t SH_FLD_30_RESERVED = 1356; // 1 +const static uint64_t SH_FLD_30_RESERVED_FOR_HTB = 1357; // 1 +const static uint64_t SH_FLD_30_SPARE_OSC = 1358; // 1 +const static uint64_t SH_FLD_30_SPARE_REFCLOCK_CONTROL = 1359; // 1 +const static uint64_t SH_FLD_30_SPARE_RESONANT_CLOCKING_CONTROL = 1360; // 1 +const static uint64_t SH_FLD_30_SPARE_TEST_CONTROL = 1361; // 1 +const static uint64_t SH_FLD_31 = 1362; // 6 +const static uint64_t SH_FLD_31_FREE_USAGE = 1363; // 1 +const static uint64_t SH_FLD_31_RESERVED_FOR_HTB = 1364; // 1 +const static uint64_t SH_FLD_31_SPARE_OSC = 1365; // 1 +const static uint64_t SH_FLD_31_SPARE_REFCLOCK_CONTROL = 1366; // 1 +const static uint64_t SH_FLD_31_SPARE_RESONANT_CLOCKING_CONTROL = 1367; // 1 +const static uint64_t SH_FLD_31_SPARE_TEST_CONTROL = 1368; // 1 +const static uint64_t SH_FLD_3_DATA = 1369; // 1 +const static uint64_t SH_FLD_3_DATA_LEN = 1370; // 1 +const static uint64_t SH_FLD_3_LEN = 1371; // 46 +const static uint64_t SH_FLD_3_RESERVED = 1372; // 1 +const static uint64_t SH_FLD_3_SPARE_SECTOR_BUFFER_CONTROL = 1373; // 1 +const static uint64_t SH_FLD_3_SPARE_SS_PLL_CONTROL = 1374; // 1 +const static uint64_t SH_FLD_4 = 1375; // 502 +const static uint64_t SH_FLD_4X4_MODE = 1376; // 2 +const static uint64_t SH_FLD_4_ADVANCE_PING_PONG = 1377; // 8 +const static uint64_t SH_FLD_4_ADVANCE_PR_VALUE = 1378; // 8 +const static uint64_t SH_FLD_4_ATESTSEL_0 = 1379; // 8 +const static uint64_t SH_FLD_4_ATESTSEL_0_LEN = 1380; // 8 +const static uint64_t SH_FLD_4_BB_LOCK0 = 1381; // 8 +const static uint64_t SH_FLD_4_BB_LOCK1 = 1382; // 8 +const static uint64_t SH_FLD_4_BIG_STEP_RIGHT = 1383; // 8 +const static uint64_t SH_FLD_4_BIT_CENTERED = 1384; // 8 +const static uint64_t SH_FLD_4_BIT_CENTERED_LEN = 1385; // 8 +const static uint64_t SH_FLD_4_BLFIFO_DIS = 1386; // 8 +const static uint64_t SH_FLD_4_BUMP = 1387; // 8 +const static uint64_t SH_FLD_4_CALGATE_ON = 1388; // 8 +const static uint64_t SH_FLD_4_CALIBRATE_BIT = 1389; // 8 +const static uint64_t SH_FLD_4_CALIBRATE_BIT_LEN = 1390; // 8 +const static uint64_t SH_FLD_4_CAL_ERROR = 1391; // 16 +const static uint64_t SH_FLD_4_CAL_ERROR_FINE = 1392; // 16 +const static uint64_t SH_FLD_4_CAL_GOOD = 1393; // 16 +const static uint64_t SH_FLD_4_CHECKER_ENABLE = 1394; // 8 +const static uint64_t SH_FLD_4_CHECKER_RESET = 1395; // 8 +const static uint64_t SH_FLD_4_CLK16_SINGLE_ENDED = 1396; // 64 +const static uint64_t SH_FLD_4_CLK18_SINGLE_ENDED = 1397; // 64 +const static uint64_t SH_FLD_4_CLK20_SINGLE_ENDED = 1398; // 64 +const static uint64_t SH_FLD_4_CLK22_SINGLE_ENDED = 1399; // 64 +const static uint64_t SH_FLD_4_CLK_LEVEL = 1400; // 8 +const static uint64_t SH_FLD_4_CLK_LEVEL_LEN = 1401; // 8 +const static uint64_t SH_FLD_4_CNTL_POL = 1402; // 8 +const static uint64_t SH_FLD_4_CNTL_SRC = 1403; // 8 +const static uint64_t SH_FLD_4_COARSE_PATTERN_ERR_N0 = 1404; // 8 +const static uint64_t SH_FLD_4_COARSE_PATTERN_ERR_N0_MASK = 1405; // 8 +const static uint64_t SH_FLD_4_COARSE_PATTERN_ERR_N1 = 1406; // 8 +const static uint64_t SH_FLD_4_COARSE_PATTERN_ERR_N1_MASK = 1407; // 8 +const static uint64_t SH_FLD_4_COARSE_PATTERN_ERR_N2 = 1408; // 8 +const static uint64_t SH_FLD_4_COARSE_PATTERN_ERR_N2_MASK = 1409; // 8 +const static uint64_t SH_FLD_4_COARSE_PATTERN_ERR_N3 = 1410; // 8 +const static uint64_t SH_FLD_4_COARSE_PATTERN_ERR_N3_MASK = 1411; // 8 +const static uint64_t SH_FLD_4_CONTINUOUS_UPDATE = 1412; // 16 +const static uint64_t SH_FLD_4_DD2_DQS_FIX_DIS = 1413; // 8 +const static uint64_t SH_FLD_4_DD2_FIX_DIS = 1414; // 8 +const static uint64_t SH_FLD_4_DD2_WTRFL_SYNC_DIS = 1415; // 8 +const static uint64_t SH_FLD_4_DELAYG = 1416; // 608 +const static uint64_t SH_FLD_4_DELAYG_LEN = 1417; // 608 +const static uint64_t SH_FLD_4_DELAY_PING_PONG_HALF = 1418; // 8 +const static uint64_t SH_FLD_4_DESIRED_EDGE_CNTR_TARGET_HIGH = 1419; // 8 +const static uint64_t SH_FLD_4_DESIRED_EDGE_CNTR_TARGET_HIGH_LEN = 1420; // 8 +const static uint64_t SH_FLD_4_DESIRED_EDGE_CNTR_TARGET_LOW = 1421; // 8 +const static uint64_t SH_FLD_4_DESIRED_EDGE_CNTR_TARGET_LOW_LEN = 1422; // 8 +const static uint64_t SH_FLD_4_DFT_FORCE_OUTPUTS = 1423; // 8 +const static uint64_t SH_FLD_4_DFT_PRBS7_GEN_EN = 1424; // 8 +const static uint64_t SH_FLD_4_DIGITAL_EN = 1425; // 8 +const static uint64_t SH_FLD_4_DIR_0_15 = 1426; // 8 +const static uint64_t SH_FLD_4_DIR_0_15_LEN = 1427; // 8 +const static uint64_t SH_FLD_4_DISABLE_0_15 = 1428; // 32 +const static uint64_t SH_FLD_4_DISABLE_0_15_LEN = 1429; // 32 +const static uint64_t SH_FLD_4_DISABLE_16_23 = 1430; // 32 +const static uint64_t SH_FLD_4_DISABLE_16_23_LEN = 1431; // 32 +const static uint64_t SH_FLD_4_DISABLE_PING_PONG = 1432; // 8 +const static uint64_t SH_FLD_4_DISABLE_TERMINATION = 1433; // 8 +const static uint64_t SH_FLD_4_DIS_CLK_GATE = 1434; // 8 +const static uint64_t SH_FLD_4_DL_FORCE_ON = 1435; // 8 +const static uint64_t SH_FLD_4_DONE = 1436; // 16 +const static uint64_t SH_FLD_4_DQS = 1437; // 8 +const static uint64_t SH_FLD_4_DQSCLK_SELECT0 = 1438; // 32 +const static uint64_t SH_FLD_4_DQSCLK_SELECT0_LEN = 1439; // 32 +const static uint64_t SH_FLD_4_DQSCLK_SELECT1 = 1440; // 32 +const static uint64_t SH_FLD_4_DQSCLK_SELECT1_LEN = 1441; // 32 +const static uint64_t SH_FLD_4_DQSCLK_SELECT2 = 1442; // 32 +const static uint64_t SH_FLD_4_DQSCLK_SELECT2_LEN = 1443; // 32 +const static uint64_t SH_FLD_4_DQSCLK_SELECT3 = 1444; // 32 +const static uint64_t SH_FLD_4_DQSCLK_SELECT3_LEN = 1445; // 32 +const static uint64_t SH_FLD_4_DQS_ALIGN_CNTR = 1446; // 8 +const static uint64_t SH_FLD_4_DQS_ALIGN_CNTR_LEN = 1447; // 8 +const static uint64_t SH_FLD_4_DQS_ALIGN_FIX_DIS = 1448; // 8 +const static uint64_t SH_FLD_4_DQS_ALIGN_ITR_CNTR = 1449; // 8 +const static uint64_t SH_FLD_4_DQS_ALIGN_ITR_CNTR_LEN = 1450; // 8 +const static uint64_t SH_FLD_4_DQS_ALIGN_JITTER = 1451; // 8 +const static uint64_t SH_FLD_4_DQS_ALIGN_QUAD = 1452; // 8 +const static uint64_t SH_FLD_4_DQS_ALIGN_QUAD_LEN = 1453; // 8 +const static uint64_t SH_FLD_4_DQS_ALIGN_SM = 1454; // 8 +const static uint64_t SH_FLD_4_DQS_ALIGN_SM_LEN = 1455; // 8 +const static uint64_t SH_FLD_4_DQS_LEN = 1456; // 8 +const static uint64_t SH_FLD_4_DQS_PIPE_FIX_DIS = 1457; // 8 +const static uint64_t SH_FLD_4_DQS_PIPE_FIX_DIS_LEN = 1458; // 8 +const static uint64_t SH_FLD_4_DRIFT_ERROR = 1459; // 8 +const static uint64_t SH_FLD_4_DRIFT_MASK = 1460; // 8 +const static uint64_t SH_FLD_4_DRVREN_MODE = 1461; // 8 +const static uint64_t SH_FLD_4_DYN_MCTERM_CNTL_EN = 1462; // 8 +const static uint64_t SH_FLD_4_DYN_POWER_CNTL_EN = 1463; // 8 +const static uint64_t SH_FLD_4_DYN_RX_GATE_CNTL_EN = 1464; // 8 +const static uint64_t SH_FLD_4_ENABLE = 1465; // 16 +const static uint64_t SH_FLD_4_ENABLE_0_15 = 1466; // 8 +const static uint64_t SH_FLD_4_ENABLE_0_15_LEN = 1467; // 8 +const static uint64_t SH_FLD_4_ENABLE_16_23 = 1468; // 8 +const static uint64_t SH_FLD_4_ENABLE_16_23_LEN = 1469; // 8 +const static uint64_t SH_FLD_4_EN_DQS_OFFSET = 1470; // 8 +const static uint64_t SH_FLD_4_EN_DRIVER_INVFB_DC = 1471; // 16 +const static uint64_t SH_FLD_4_EN_N_WR = 1472; // 8 +const static uint64_t SH_FLD_4_EN_N_WR_LEN = 1473; // 8 +const static uint64_t SH_FLD_4_EN_P_WR = 1474; // 16 +const static uint64_t SH_FLD_4_EN_P_WR_LEN = 1475; // 16 +const static uint64_t SH_FLD_4_ERROR = 1476; // 8 +const static uint64_t SH_FLD_4_ERROR_LEN = 1477; // 8 +const static uint64_t SH_FLD_4_ERR_CLK22_MASK = 1478; // 8 +const static uint64_t SH_FLD_4_EYE_CLIPPING = 1479; // 8 +const static uint64_t SH_FLD_4_EYE_CLIPPING_MASK = 1480; // 8 +const static uint64_t SH_FLD_4_FINE_STEPPING = 1481; // 8 +const static uint64_t SH_FLD_4_FLUSH = 1482; // 8 +const static uint64_t SH_FLD_4_FORCE_DQS_LANES_ON = 1483; // 8 +const static uint64_t SH_FLD_4_FORCE_FIFO_CAPTURE = 1484; // 8 +const static uint64_t SH_FLD_4_FRZSULV = 1485; // 16 +const static uint64_t SH_FLD_4_FW_LEFT_SIDE = 1486; // 8 +const static uint64_t SH_FLD_4_FW_LEFT_SIDE_LEN = 1487; // 8 +const static uint64_t SH_FLD_4_FW_RIGHT_SIDE = 1488; // 8 +const static uint64_t SH_FLD_4_FW_RIGHT_SIDE_LEN = 1489; // 8 +const static uint64_t SH_FLD_4_HS_DLLMUX_SEL0_0_3 = 1490; // 8 +const static uint64_t SH_FLD_4_HS_DLLMUX_SEL0_0_3_LEN = 1491; // 8 +const static uint64_t SH_FLD_4_HS_DLLMUX_SEL1_0_3 = 1492; // 8 +const static uint64_t SH_FLD_4_HS_DLLMUX_SEL1_0_3_LEN = 1493; // 8 +const static uint64_t SH_FLD_4_HS_PROBE_A = 1494; // 8 +const static uint64_t SH_FLD_4_HS_PROBE_A_LEN = 1495; // 8 +const static uint64_t SH_FLD_4_HS_PROBE_B = 1496; // 8 +const static uint64_t SH_FLD_4_HS_PROBE_B_LEN = 1497; // 8 +const static uint64_t SH_FLD_4_HW_VALUE = 1498; // 8 +const static uint64_t SH_FLD_4_INCOMPLETE_CAL_N0 = 1499; // 8 +const static uint64_t SH_FLD_4_INCOMPLETE_CAL_N0_MASK = 1500; // 8 +const static uint64_t SH_FLD_4_INCOMPLETE_CAL_N1 = 1501; // 8 +const static uint64_t SH_FLD_4_INCOMPLETE_CAL_N1_MASK = 1502; // 8 +const static uint64_t SH_FLD_4_INCOMPLETE_CAL_N2 = 1503; // 8 +const static uint64_t SH_FLD_4_INCOMPLETE_CAL_N2_MASK = 1504; // 8 +const static uint64_t SH_FLD_4_INCOMPLETE_CAL_N3 = 1505; // 8 +const static uint64_t SH_FLD_4_INCOMPLETE_CAL_N3_MASK = 1506; // 8 +const static uint64_t SH_FLD_4_INIT_IO = 1507; // 8 +const static uint64_t SH_FLD_4_INIT_RXDLL_CAL_RESET = 1508; // 16 +const static uint64_t SH_FLD_4_INIT_RXDLL_CAL_UPDATE = 1509; // 16 +const static uint64_t SH_FLD_4_INTERP_SIG_SLEW = 1510; // 8 +const static uint64_t SH_FLD_4_INTERP_SIG_SLEW_LEN = 1511; // 8 +const static uint64_t SH_FLD_4_INVALID_NS_BIG_R = 1512; // 8 +const static uint64_t SH_FLD_4_INVALID_NS_BIG_R_MASK = 1513; // 8 +const static uint64_t SH_FLD_4_INVALID_NS_SMALL_L = 1514; // 8 +const static uint64_t SH_FLD_4_INVALID_NS_SMALL_L_MASK = 1515; // 8 +const static uint64_t SH_FLD_4_INVALID_NS_SMALL_R = 1516; // 8 +const static uint64_t SH_FLD_4_INVALID_NS_SMALL_R_MASK = 1517; // 8 +const static uint64_t SH_FLD_4_JUMP_BACK_RIGHT = 1518; // 8 +const static uint64_t SH_FLD_4_LEADING_EDGE_FOUND_MASK = 1519; // 8 +const static uint64_t SH_FLD_4_LEADING_EDGE_NOT_FOUND = 1520; // 8 +const static uint64_t SH_FLD_4_LEADING_EDGE_NOT_FOUND_0_15 = 1521; // 8 +const static uint64_t SH_FLD_4_LEADING_EDGE_NOT_FOUND_0_15_LEN = 1522; // 8 +const static uint64_t SH_FLD_4_LEADING_EDGE_NOT_FOUND_16_23 = 1523; // 8 +const static uint64_t SH_FLD_4_LEADING_EDGE_NOT_FOUND_16_23_LEN = 1524; // 8 +const static uint64_t SH_FLD_4_LEN = 1525; // 84 +const static uint64_t SH_FLD_4_LOOPBACK_DLY12 = 1526; // 8 +const static uint64_t SH_FLD_4_LOOPBACK_FIX_EN = 1527; // 8 +const static uint64_t SH_FLD_4_MATCH_STEP_RIGHT = 1528; // 8 +const static uint64_t SH_FLD_4_MAX_DQS = 1529; // 8 +const static uint64_t SH_FLD_4_MAX_DQS_ITER = 1530; // 8 +const static uint64_t SH_FLD_4_MAX_DQS_LEN = 1531; // 8 +const static uint64_t SH_FLD_4_MEMINTD00 = 1532; // 8 +const static uint64_t SH_FLD_4_MEMINTD00_LEN = 1533; // 8 +const static uint64_t SH_FLD_4_MEMINTD01 = 1534; // 8 +const static uint64_t SH_FLD_4_MEMINTD01_LEN = 1535; // 8 +const static uint64_t SH_FLD_4_MEMINTD02 = 1536; // 8 +const static uint64_t SH_FLD_4_MEMINTD02_LEN = 1537; // 8 +const static uint64_t SH_FLD_4_MEMINTD03 = 1538; // 8 +const static uint64_t SH_FLD_4_MEMINTD03_LEN = 1539; // 8 +const static uint64_t SH_FLD_4_MEMINTD04 = 1540; // 8 +const static uint64_t SH_FLD_4_MEMINTD04_LEN = 1541; // 8 +const static uint64_t SH_FLD_4_MEMINTD05 = 1542; // 8 +const static uint64_t SH_FLD_4_MEMINTD05_LEN = 1543; // 8 +const static uint64_t SH_FLD_4_MEMINTD06 = 1544; // 8 +const static uint64_t SH_FLD_4_MEMINTD06_LEN = 1545; // 8 +const static uint64_t SH_FLD_4_MEMINTD07 = 1546; // 8 +const static uint64_t SH_FLD_4_MEMINTD07_LEN = 1547; // 8 +const static uint64_t SH_FLD_4_MEMINTD08 = 1548; // 8 +const static uint64_t SH_FLD_4_MEMINTD08_LEN = 1549; // 8 +const static uint64_t SH_FLD_4_MEMINTD09 = 1550; // 8 +const static uint64_t SH_FLD_4_MEMINTD09_LEN = 1551; // 8 +const static uint64_t SH_FLD_4_MEMINTD10 = 1552; // 8 +const static uint64_t SH_FLD_4_MEMINTD10_LEN = 1553; // 8 +const static uint64_t SH_FLD_4_MEMINTD11 = 1554; // 8 +const static uint64_t SH_FLD_4_MEMINTD11_LEN = 1555; // 8 +const static uint64_t SH_FLD_4_MEMINTD12 = 1556; // 8 +const static uint64_t SH_FLD_4_MEMINTD12_LEN = 1557; // 8 +const static uint64_t SH_FLD_4_MEMINTD13 = 1558; // 8 +const static uint64_t SH_FLD_4_MEMINTD13_LEN = 1559; // 8 +const static uint64_t SH_FLD_4_MEMINTD14 = 1560; // 8 +const static uint64_t SH_FLD_4_MEMINTD14_LEN = 1561; // 8 +const static uint64_t SH_FLD_4_MEMINTD15 = 1562; // 8 +const static uint64_t SH_FLD_4_MEMINTD15_LEN = 1563; // 8 +const static uint64_t SH_FLD_4_MEMINTD16 = 1564; // 8 +const static uint64_t SH_FLD_4_MEMINTD16_LEN = 1565; // 8 +const static uint64_t SH_FLD_4_MEMINTD17 = 1566; // 8 +const static uint64_t SH_FLD_4_MEMINTD17_LEN = 1567; // 8 +const static uint64_t SH_FLD_4_MEMINTD18 = 1568; // 8 +const static uint64_t SH_FLD_4_MEMINTD18_LEN = 1569; // 8 +const static uint64_t SH_FLD_4_MEMINTD19 = 1570; // 8 +const static uint64_t SH_FLD_4_MEMINTD19_LEN = 1571; // 8 +const static uint64_t SH_FLD_4_MEMINTD20 = 1572; // 8 +const static uint64_t SH_FLD_4_MEMINTD20_LEN = 1573; // 8 +const static uint64_t SH_FLD_4_MEMINTD21 = 1574; // 8 +const static uint64_t SH_FLD_4_MEMINTD21_LEN = 1575; // 8 +const static uint64_t SH_FLD_4_MEMINTD22 = 1576; // 8 +const static uint64_t SH_FLD_4_MEMINTD22_LEN = 1577; // 8 +const static uint64_t SH_FLD_4_MEMINTD23 = 1578; // 8 +const static uint64_t SH_FLD_4_MEMINTD23_LEN = 1579; // 8 +const static uint64_t SH_FLD_4_MIN_EYE = 1580; // 8 +const static uint64_t SH_FLD_4_MIN_EYE_MASK = 1581; // 8 +const static uint64_t SH_FLD_4_MIN_RD_EYE_SIZE = 1582; // 8 +const static uint64_t SH_FLD_4_MIN_RD_EYE_SIZE_LEN = 1583; // 8 +const static uint64_t SH_FLD_4_MRS_CMD_N0 = 1584; // 8 +const static uint64_t SH_FLD_4_MRS_CMD_N1 = 1585; // 8 +const static uint64_t SH_FLD_4_MRS_CMD_N2 = 1586; // 8 +const static uint64_t SH_FLD_4_MRS_CMD_N3 = 1587; // 8 +const static uint64_t SH_FLD_4_N0 = 1588; // 64 +const static uint64_t SH_FLD_4_N0_LEN = 1589; // 64 +const static uint64_t SH_FLD_4_N1 = 1590; // 64 +const static uint64_t SH_FLD_4_N1_LEN = 1591; // 64 +const static uint64_t SH_FLD_4_N2 = 1592; // 64 +const static uint64_t SH_FLD_4_N2_LEN = 1593; // 64 +const static uint64_t SH_FLD_4_N3 = 1594; // 64 +const static uint64_t SH_FLD_4_N3_LEN = 1595; // 64 +const static uint64_t SH_FLD_4_NIB0 = 1596; // 8 +const static uint64_t SH_FLD_4_NIB0TCFLIP_DC = 1597; // 8 +const static uint64_t SH_FLD_4_NIB0_LEN = 1598; // 8 +const static uint64_t SH_FLD_4_NIB1 = 1599; // 8 +const static uint64_t SH_FLD_4_NIB1TCFLIP_DC = 1600; // 8 +const static uint64_t SH_FLD_4_NIB1_LEN = 1601; // 8 +const static uint64_t SH_FLD_4_NIB2 = 1602; // 8 +const static uint64_t SH_FLD_4_NIB2TCFLIP_DC = 1603; // 8 +const static uint64_t SH_FLD_4_NIB2_LEN = 1604; // 8 +const static uint64_t SH_FLD_4_NIB3 = 1605; // 8 +const static uint64_t SH_FLD_4_NIB3TCFLIP_DC = 1606; // 8 +const static uint64_t SH_FLD_4_NIB3_LEN = 1607; // 8 +const static uint64_t SH_FLD_4_NIB_0_2_DQSEL_CAP = 1608; // 16 +const static uint64_t SH_FLD_4_NIB_0_2_DQSEL_CAP_LEN = 1609; // 16 +const static uint64_t SH_FLD_4_NIB_0_2_DQSEL_IND = 1610; // 16 +const static uint64_t SH_FLD_4_NIB_0_2_DQSEL_IND_LEN = 1611; // 16 +const static uint64_t SH_FLD_4_NIB_0_2_DQSEL_RES = 1612; // 16 +const static uint64_t SH_FLD_4_NIB_0_2_DQSEL_RES_LEN = 1613; // 16 +const static uint64_t SH_FLD_4_NIB_1_3_DQSEL_CAP = 1614; // 16 +const static uint64_t SH_FLD_4_NIB_1_3_DQSEL_CAP_LEN = 1615; // 16 +const static uint64_t SH_FLD_4_NIB_1_3_DQSEL_IND = 1616; // 16 +const static uint64_t SH_FLD_4_NIB_1_3_DQSEL_IND_LEN = 1617; // 16 +const static uint64_t SH_FLD_4_NIB_1_3_DQSEL_RES = 1618; // 16 +const static uint64_t SH_FLD_4_NIB_1_3_DQSEL_RES_LEN = 1619; // 16 +const static uint64_t SH_FLD_4_NO_DQS = 1620; // 8 +const static uint64_t SH_FLD_4_NO_DQS_MASK = 1621; // 8 +const static uint64_t SH_FLD_4_NO_EYE_DETECTED = 1622; // 8 +const static uint64_t SH_FLD_4_NO_EYE_DETECTED_MASK = 1623; // 8 +const static uint64_t SH_FLD_4_NO_LOCK = 1624; // 8 +const static uint64_t SH_FLD_4_NO_LOCK_MASK = 1625; // 8 +const static uint64_t SH_FLD_4_OFFSET0 = 1626; // 8 +const static uint64_t SH_FLD_4_OFFSET0_LEN = 1627; // 8 +const static uint64_t SH_FLD_4_OFFSET1 = 1628; // 8 +const static uint64_t SH_FLD_4_OFFSET1_LEN = 1629; // 8 +const static uint64_t SH_FLD_4_OFFSET2 = 1630; // 16 +const static uint64_t SH_FLD_4_OFFSET2_LEN = 1631; // 16 +const static uint64_t SH_FLD_4_OFFSET3 = 1632; // 16 +const static uint64_t SH_FLD_4_OFFSET3_LEN = 1633; // 16 +const static uint64_t SH_FLD_4_OFFSET4 = 1634; // 16 +const static uint64_t SH_FLD_4_OFFSET4_LEN = 1635; // 16 +const static uint64_t SH_FLD_4_OFFSET5 = 1636; // 16 +const static uint64_t SH_FLD_4_OFFSET5_LEN = 1637; // 16 +const static uint64_t SH_FLD_4_OFFSET6 = 1638; // 16 +const static uint64_t SH_FLD_4_OFFSET6_LEN = 1639; // 16 +const static uint64_t SH_FLD_4_OFFSET7 = 1640; // 16 +const static uint64_t SH_FLD_4_OFFSET7_LEN = 1641; // 16 +const static uint64_t SH_FLD_4_OFFSET_ERR = 1642; // 8 +const static uint64_t SH_FLD_4_OFFSET_ERR_MASK = 1643; // 8 +const static uint64_t SH_FLD_4_OPERATE_MODE = 1644; // 8 +const static uint64_t SH_FLD_4_OPERATE_MODE_LEN = 1645; // 8 +const static uint64_t SH_FLD_4_PERCAL_PWR_DIS = 1646; // 8 +const static uint64_t SH_FLD_4_PER_CAL_UPDATE_DISABLE = 1647; // 8 +const static uint64_t SH_FLD_4_PHASE_ALIGN_RESET = 1648; // 16 +const static uint64_t SH_FLD_4_PHASE_CNTL_EN = 1649; // 16 +const static uint64_t SH_FLD_4_PHASE_DEFAULT_EN = 1650; // 16 +const static uint64_t SH_FLD_4_POS_EDGE_ALIGN = 1651; // 16 +const static uint64_t SH_FLD_4_QUAD0 = 1652; // 8 +const static uint64_t SH_FLD_4_QUAD0_CLK16 = 1653; // 64 +const static uint64_t SH_FLD_4_QUAD0_CLK18 = 1654; // 64 +const static uint64_t SH_FLD_4_QUAD0_LEN = 1655; // 8 +const static uint64_t SH_FLD_4_QUAD1 = 1656; // 8 +const static uint64_t SH_FLD_4_QUAD1_CLK16 = 1657; // 64 +const static uint64_t SH_FLD_4_QUAD1_CLK18 = 1658; // 64 +const static uint64_t SH_FLD_4_QUAD1_LEN = 1659; // 8 +const static uint64_t SH_FLD_4_QUAD2 = 1660; // 8 +const static uint64_t SH_FLD_4_QUAD2_CLK16 = 1661; // 64 +const static uint64_t SH_FLD_4_QUAD2_CLK18 = 1662; // 32 +const static uint64_t SH_FLD_4_QUAD2_CLK20 = 1663; // 64 +const static uint64_t SH_FLD_4_QUAD2_CLK22 = 1664; // 64 +const static uint64_t SH_FLD_4_QUAD2_LEN = 1665; // 8 +const static uint64_t SH_FLD_4_QUAD3 = 1666; // 8 +const static uint64_t SH_FLD_4_QUAD3_CLK16 = 1667; // 64 +const static uint64_t SH_FLD_4_QUAD3_CLK18 = 1668; // 32 +const static uint64_t SH_FLD_4_QUAD3_CLK20 = 1669; // 64 +const static uint64_t SH_FLD_4_QUAD3_CLK22 = 1670; // 64 +const static uint64_t SH_FLD_4_QUAD3_LEN = 1671; // 8 +const static uint64_t SH_FLD_4_RD = 1672; // 136 +const static uint64_t SH_FLD_4_RDCLK_SELECT0 = 1673; // 32 +const static uint64_t SH_FLD_4_RDCLK_SELECT0_LEN = 1674; // 32 +const static uint64_t SH_FLD_4_RDCLK_SELECT1 = 1675; // 32 +const static uint64_t SH_FLD_4_RDCLK_SELECT1_LEN = 1676; // 32 +const static uint64_t SH_FLD_4_RDCLK_SELECT2 = 1677; // 32 +const static uint64_t SH_FLD_4_RDCLK_SELECT2_LEN = 1678; // 32 +const static uint64_t SH_FLD_4_RDCLK_SELECT3 = 1679; // 32 +const static uint64_t SH_FLD_4_RDCLK_SELECT3_LEN = 1680; // 32 +const static uint64_t SH_FLD_4_RD_DELAY0 = 1681; // 56 +const static uint64_t SH_FLD_4_RD_DELAY0_LEN = 1682; // 56 +const static uint64_t SH_FLD_4_RD_DELAY1 = 1683; // 56 +const static uint64_t SH_FLD_4_RD_DELAY1_LEN = 1684; // 56 +const static uint64_t SH_FLD_4_RD_DELAY2 = 1685; // 56 +const static uint64_t SH_FLD_4_RD_DELAY2_LEN = 1686; // 56 +const static uint64_t SH_FLD_4_RD_DELAY3 = 1687; // 56 +const static uint64_t SH_FLD_4_RD_DELAY3_LEN = 1688; // 56 +const static uint64_t SH_FLD_4_RD_DELAY4 = 1689; // 56 +const static uint64_t SH_FLD_4_RD_DELAY4_LEN = 1690; // 56 +const static uint64_t SH_FLD_4_RD_DELAY5 = 1691; // 56 +const static uint64_t SH_FLD_4_RD_DELAY5_LEN = 1692; // 56 +const static uint64_t SH_FLD_4_RD_DELAY6 = 1693; // 56 +const static uint64_t SH_FLD_4_RD_DELAY6_LEN = 1694; // 56 +const static uint64_t SH_FLD_4_RD_DELAY7 = 1695; // 56 +const static uint64_t SH_FLD_4_RD_DELAY7_LEN = 1696; // 56 +const static uint64_t SH_FLD_4_RD_LEN = 1697; // 136 +const static uint64_t SH_FLD_4_RD_SIZE0 = 1698; // 88 +const static uint64_t SH_FLD_4_RD_SIZE0_LEN = 1699; // 88 +const static uint64_t SH_FLD_4_RD_SIZE1 = 1700; // 88 +const static uint64_t SH_FLD_4_RD_SIZE1_LEN = 1701; // 88 +const static uint64_t SH_FLD_4_RD_SIZE2 = 1702; // 88 +const static uint64_t SH_FLD_4_RD_SIZE2_LEN = 1703; // 88 +const static uint64_t SH_FLD_4_RD_SIZE3 = 1704; // 88 +const static uint64_t SH_FLD_4_RD_SIZE3_LEN = 1705; // 88 +const static uint64_t SH_FLD_4_RD_SIZE4 = 1706; // 88 +const static uint64_t SH_FLD_4_RD_SIZE4_LEN = 1707; // 88 +const static uint64_t SH_FLD_4_RD_SIZE5 = 1708; // 88 +const static uint64_t SH_FLD_4_RD_SIZE5_LEN = 1709; // 88 +const static uint64_t SH_FLD_4_RD_SIZE6 = 1710; // 88 +const static uint64_t SH_FLD_4_RD_SIZE6_LEN = 1711; // 88 +const static uint64_t SH_FLD_4_RD_SIZE7 = 1712; // 88 +const static uint64_t SH_FLD_4_RD_SIZE7_LEN = 1713; // 88 +const static uint64_t SH_FLD_4_READ_CENTERING_MODE = 1714; // 8 +const static uint64_t SH_FLD_4_READ_CENTERING_MODE_LEN = 1715; // 8 +const static uint64_t SH_FLD_4_REFERENCE1 = 1716; // 8 +const static uint64_t SH_FLD_4_REFERENCE1_LEN = 1717; // 8 +const static uint64_t SH_FLD_4_REFERENCE2 = 1718; // 8 +const static uint64_t SH_FLD_4_REFERENCE2_LEN = 1719; // 8 +const static uint64_t SH_FLD_4_REFERENCE3 = 1720; // 8 +const static uint64_t SH_FLD_4_REFERENCE3_LEN = 1721; // 8 +const static uint64_t SH_FLD_4_REGS_RXDLL_CAL_SKIP = 1722; // 16 +const static uint64_t SH_FLD_4_REGS_RXDLL_CAL_SKIP_LEN = 1723; // 16 +const static uint64_t SH_FLD_4_REGS_RXDLL_COARSE_ADJ_BY2 = 1724; // 16 +const static uint64_t SH_FLD_4_REGS_RXDLL_COARSE_EN = 1725; // 16 +const static uint64_t SH_FLD_4_REGS_RXDLL_COARSE_EN_LEN = 1726; // 16 +const static uint64_t SH_FLD_4_REGS_RXDLL_DAC_COARSE = 1727; // 16 +const static uint64_t SH_FLD_4_REGS_RXDLL_DAC_COARSE_LEN = 1728; // 16 +const static uint64_t SH_FLD_4_REGS_RXDLL_VREG_LOWER = 1729; // 16 +const static uint64_t SH_FLD_4_REGS_RXDLL_VREG_LOWER_LEN = 1730; // 16 +const static uint64_t SH_FLD_4_REGS_RXDLL_VREG_UPPER = 1731; // 16 +const static uint64_t SH_FLD_4_REGS_RXDLL_VREG_UPPER_LEN = 1732; // 16 +const static uint64_t SH_FLD_4_RESERVED = 1733; // 1 +const static uint64_t SH_FLD_4_RESERVED_56_63 = 1734; // 8 +const static uint64_t SH_FLD_4_RESERVED_56_63_LEN = 1735; // 8 +const static uint64_t SH_FLD_4_ROT0 = 1736; // 8 +const static uint64_t SH_FLD_4_ROT0_LEN = 1737; // 8 +const static uint64_t SH_FLD_4_ROT1 = 1738; // 8 +const static uint64_t SH_FLD_4_ROT1_LEN = 1739; // 8 +const static uint64_t SH_FLD_4_ROT_CLK_N0 = 1740; // 64 +const static uint64_t SH_FLD_4_ROT_CLK_N0_LEN = 1741; // 64 +const static uint64_t SH_FLD_4_ROT_CLK_N1 = 1742; // 64 +const static uint64_t SH_FLD_4_ROT_CLK_N1_LEN = 1743; // 64 +const static uint64_t SH_FLD_4_ROT_N0 = 1744; // 64 +const static uint64_t SH_FLD_4_ROT_N0_LEN = 1745; // 64 +const static uint64_t SH_FLD_4_ROT_N1 = 1746; // 64 +const static uint64_t SH_FLD_4_ROT_N1_LEN = 1747; // 64 +const static uint64_t SH_FLD_4_ROT_OVERRIDE = 1748; // 16 +const static uint64_t SH_FLD_4_ROT_OVERRIDE_EN = 1749; // 16 +const static uint64_t SH_FLD_4_ROT_OVERRIDE_LEN = 1750; // 16 +const static uint64_t SH_FLD_4_RXREG_COMPCON_DC = 1751; // 16 +const static uint64_t SH_FLD_4_RXREG_COMPCON_DC_LEN = 1752; // 16 +const static uint64_t SH_FLD_4_RXREG_CON_DC = 1753; // 16 +const static uint64_t SH_FLD_4_RXREG_DAC_PULLUP_DC = 1754; // 16 +const static uint64_t SH_FLD_4_RXREG_DRVCON_DC = 1755; // 16 +const static uint64_t SH_FLD_4_RXREG_DRVCON_DC_LEN = 1756; // 16 +const static uint64_t SH_FLD_4_RXREG_FILTER_LENGTH_DC = 1757; // 16 +const static uint64_t SH_FLD_4_RXREG_FILTER_LENGTH_DC_LEN = 1758; // 16 +const static uint64_t SH_FLD_4_RXREG_LEAD_LAG_SEPARATION_DC = 1759; // 16 +const static uint64_t SH_FLD_4_RXREG_LEAD_LAG_SEPARATION_DC_LEN = 1760; // 16 +const static uint64_t SH_FLD_4_RXREG_REF_SEL_DC = 1761; // 16 +const static uint64_t SH_FLD_4_RXREG_REF_SEL_DC_LEN = 1762; // 16 +const static uint64_t SH_FLD_4_S0ACENSLICENDRV_DC = 1763; // 8 +const static uint64_t SH_FLD_4_S0ACENSLICENDRV_DC_LEN = 1764; // 8 +const static uint64_t SH_FLD_4_S0ACENSLICEPDRV_DC = 1765; // 8 +const static uint64_t SH_FLD_4_S0ACENSLICEPDRV_DC_LEN = 1766; // 8 +const static uint64_t SH_FLD_4_S0ACENSLICEPTERM_DC = 1767; // 8 +const static uint64_t SH_FLD_4_S0ACENSLICEPTERM_DC_LEN = 1768; // 8 +const static uint64_t SH_FLD_4_S0INSDLYTAP = 1769; // 8 +const static uint64_t SH_FLD_4_S1ACENSLICENDRV_DC = 1770; // 8 +const static uint64_t SH_FLD_4_S1ACENSLICENDRV_DC_LEN = 1771; // 8 +const static uint64_t SH_FLD_4_S1ACENSLICEPDRV_DC = 1772; // 8 +const static uint64_t SH_FLD_4_S1ACENSLICEPDRV_DC_LEN = 1773; // 8 +const static uint64_t SH_FLD_4_S1ACENSLICEPTERM_DC = 1774; // 8 +const static uint64_t SH_FLD_4_S1ACENSLICEPTERM_DC_LEN = 1775; // 8 +const static uint64_t SH_FLD_4_S1INSDLYTAP = 1776; // 8 +const static uint64_t SH_FLD_4_SEND_ENABLE = 1777; // 1 +const static uint64_t SH_FLD_4_SEND_MODE = 1778; // 1 +const static uint64_t SH_FLD_4_SMALL_STEP_LEFT = 1779; // 8 +const static uint64_t SH_FLD_4_SMALL_STEP_RIGHT = 1780; // 8 +const static uint64_t SH_FLD_4_SPARE_SECTOR_BUFFER_CONTROL = 1781; // 1 +const static uint64_t SH_FLD_4_SYNC = 1782; // 8 +const static uint64_t SH_FLD_4_SYNC_LEN = 1783; // 8 +const static uint64_t SH_FLD_4_SYSCLK_DQSCLK_OFFSET = 1784; // 8 +const static uint64_t SH_FLD_4_SYSCLK_DQSCLK_OFFSET_LEN = 1785; // 8 +const static uint64_t SH_FLD_4_SYSCLK_RDCLK_OFFSET = 1786; // 8 +const static uint64_t SH_FLD_4_SYSCLK_RDCLK_OFFSET_LEN = 1787; // 8 +const static uint64_t SH_FLD_4_TRAILING_EDGE_FOUND_MASK = 1788; // 8 +const static uint64_t SH_FLD_4_TRAILING_EDGE_NOT_FOUND = 1789; // 8 +const static uint64_t SH_FLD_4_TRAILING_EDGE_NOT_FOUND_0_15 = 1790; // 8 +const static uint64_t SH_FLD_4_TRAILING_EDGE_NOT_FOUND_0_15_LEN = 1791; // 8 +const static uint64_t SH_FLD_4_TRAILING_EDGE_NOT_FOUND_16_23 = 1792; // 8 +const static uint64_t SH_FLD_4_TRAILING_EDGE_NOT_FOUND_16_23_LEN = 1793; // 8 +const static uint64_t SH_FLD_4_TRIG_PERIOD = 1794; // 8 +const static uint64_t SH_FLD_4_TSYS = 1795; // 8 +const static uint64_t SH_FLD_4_TSYS_LEN = 1796; // 8 +const static uint64_t SH_FLD_4_TUNEATST_0 = 1797; // 8 +const static uint64_t SH_FLD_4_TUNEATST_1 = 1798; // 8 +const static uint64_t SH_FLD_4_VALID_NS_BIG_L = 1799; // 8 +const static uint64_t SH_FLD_4_VALID_NS_BIG_L_MASK = 1800; // 8 +const static uint64_t SH_FLD_4_VALID_NS_BIG_R = 1801; // 8 +const static uint64_t SH_FLD_4_VALID_NS_BIG_R_MASK = 1802; // 8 +const static uint64_t SH_FLD_4_VALID_NS_JUMP_BACK = 1803; // 8 +const static uint64_t SH_FLD_4_VALID_NS_JUMP_BACK_MASK = 1804; // 8 +const static uint64_t SH_FLD_4_WL_ADVANCE_DISABLE = 1805; // 8 +const static uint64_t SH_FLD_4_WL_ERR_CLK16 = 1806; // 16 +const static uint64_t SH_FLD_4_WL_ERR_CLK16_MASK = 1807; // 8 +const static uint64_t SH_FLD_4_WL_ERR_CLK18 = 1808; // 16 +const static uint64_t SH_FLD_4_WL_ERR_CLK18_MASK = 1809; // 8 +const static uint64_t SH_FLD_4_WL_ERR_CLK20 = 1810; // 16 +const static uint64_t SH_FLD_4_WL_ERR_CLK20_MASK = 1811; // 8 +const static uint64_t SH_FLD_4_WL_ERR_CLK22 = 1812; // 16 +const static uint64_t SH_FLD_4_WRAPSEL = 1813; // 8 +const static uint64_t SH_FLD_4_WTRFL_AVE_DIS = 1814; // 8 +const static uint64_t SH_FLD_4_ZERO_DETECTED = 1815; // 8 +const static uint64_t SH_FLD_5 = 1816; // 455 +const static uint64_t SH_FLD_5_LEN = 1817; // 43 +const static uint64_t SH_FLD_5_RESERVED = 1818; // 1 +const static uint64_t SH_FLD_5_SPARE_SECTOR_BUFFER_CONTROL = 1819; // 1 +const static uint64_t SH_FLD_6 = 1820; // 455 +const static uint64_t SH_FLD_6_LEN = 1821; // 43 +const static uint64_t SH_FLD_6_RESERVED = 1822; // 1 +const static uint64_t SH_FLD_6_SPARE_SECTOR_BUFFER_CONTROL = 1823; // 1 +const static uint64_t SH_FLD_6_SPARE_TERM_DIS = 1824; // 1 +const static uint64_t SH_FLD_7 = 1825; // 412 +const static uint64_t SH_FLD_7_RESERVED = 1826; // 1 +const static uint64_t SH_FLD_7_SPARE_SECTOR_BUFFER_CONTROL = 1827; // 1 +const static uint64_t SH_FLD_7_SPARE_TERM_DIS = 1828; // 1 +const static uint64_t SH_FLD_8 = 1829; // 6 +const static uint64_t SH_FLD_842_FC_SELECT = 1830; // 1 +const static uint64_t SH_FLD_842_FC_SELECT_LEN = 1831; // 1 +const static uint64_t SH_FLD_842_LATENCY_CFG = 1832; // 1 +const static uint64_t SH_FLD_8_11_SPARE = 1833; // 8 +const static uint64_t SH_FLD_8_11_SPARE_LEN = 1834; // 8 +const static uint64_t SH_FLD_8_9 = 1835; // 6 +const static uint64_t SH_FLD_8_9_LEN = 1836; // 6 +const static uint64_t SH_FLD_8_RESERVED = 1837; // 2 +const static uint64_t SH_FLD_8_SPARE_FILTER_PLL_CONTROL = 1838; // 1 +const static uint64_t SH_FLD_8_SPARE_SECTOR_BUFFER_CONTROL = 1839; // 1 +const static uint64_t SH_FLD_9 = 1840; // 6 +const static uint64_t SH_FLD_9_RESERVED = 1841; // 1 +const static uint64_t SH_FLD_9_SPARE_FILTER_PLL_CONTROL = 1842; // 1 +const static uint64_t SH_FLD_9_SPARE_SECTOR_BUFFER_CONTROL = 1843; // 1 +const static uint64_t SH_FLD_ABIST = 1844; // 43 +const static uint64_t SH_FLD_ABORT = 1845; // 6 +const static uint64_t SH_FLD_ABORTED_CMD = 1846; // 1 +const static uint64_t SH_FLD_ABORT_CHECK_TIMEOUT_SEL = 1847; // 6 +const static uint64_t SH_FLD_ABORT_CHECK_TIMEOUT_SEL_LEN = 1848; // 6 +const static uint64_t SH_FLD_ABORT_ON_ERROR = 1849; // 8 +const static uint64_t SH_FLD_ABORT_ON_ERR_EN = 1850; // 8 +const static uint64_t SH_FLD_ACCR_OVERRIDE_EN = 1851; // 12 +const static uint64_t SH_FLD_ACCUM = 1852; // 6 +const static uint64_t SH_FLD_ACCUM_LEN = 1853; // 6 +const static uint64_t SH_FLD_ACK = 1854; // 1 +const static uint64_t SH_FLD_ACM_EN = 1855; // 1 +const static uint64_t SH_FLD_ACT = 1856; // 62 +const static uint64_t SH_FLD_ACTCYCLECNT = 1857; // 3 +const static uint64_t SH_FLD_ACTCYCLECNT_LEN = 1858; // 3 +const static uint64_t SH_FLD_ACTION0 = 1859; // 47 +const static uint64_t SH_FLD_ACTION0_LEN = 1860; // 47 +const static uint64_t SH_FLD_ACTION1 = 1861; // 47 +const static uint64_t SH_FLD_ACTION1_LEN = 1862; // 47 +const static uint64_t SH_FLD_ACTION_0 = 1863; // 4 +const static uint64_t SH_FLD_ACTION_0_LEN = 1864; // 4 +const static uint64_t SH_FLD_ACTION_1 = 1865; // 4 +const static uint64_t SH_FLD_ACTION_1_LEN = 1866; // 4 +const static uint64_t SH_FLD_ACTIVATE_COUNT = 1867; // 8 +const static uint64_t SH_FLD_ACTIVATE_COUNT_LEN = 1868; // 8 +const static uint64_t SH_FLD_ACTIVE_CHANNEL_CNT = 1869; // 1 +const static uint64_t SH_FLD_ACTIVE_CHANNEL_CNT_LEN = 1870; // 1 +const static uint64_t SH_FLD_ACTIVITY = 1871; // 129 +const static uint64_t SH_FLD_ACTIVITY_0 = 1872; // 1 +const static uint64_t SH_FLD_ACTIVITY_0_LEN = 1873; // 1 +const static uint64_t SH_FLD_ACTIVITY_1 = 1874; // 1 +const static uint64_t SH_FLD_ACTIVITY_1_LEN = 1875; // 1 +const static uint64_t SH_FLD_ACTIVITY_2 = 1876; // 1 +const static uint64_t SH_FLD_ACTIVITY_2_LEN = 1877; // 1 +const static uint64_t SH_FLD_ACTIVITY_3 = 1878; // 1 +const static uint64_t SH_FLD_ACTIVITY_3_LEN = 1879; // 1 +const static uint64_t SH_FLD_ACTIVITY_LEN = 1880; // 129 +const static uint64_t SH_FLD_ACTUAL_CLK_SB_PULSE_MODE = 1881; // 24 +const static uint64_t SH_FLD_ACTUAL_CLK_SB_PULSE_MODE_EN = 1882; // 24 +const static uint64_t SH_FLD_ACTUAL_CLK_SB_PULSE_MODE_LEN = 1883; // 24 +const static uint64_t SH_FLD_ACTUAL_CLK_SB_SPARE = 1884; // 24 +const static uint64_t SH_FLD_ACTUAL_CLK_SB_STRENGTH = 1885; // 24 +const static uint64_t SH_FLD_ACTUAL_CLK_SB_STRENGTH_LEN = 1886; // 24 +const static uint64_t SH_FLD_ACTUAL_CLK_SW_RESCLK = 1887; // 24 +const static uint64_t SH_FLD_ACTUAL_CLK_SW_RESCLK_LEN = 1888; // 24 +const static uint64_t SH_FLD_ACTUAL_CLK_SW_SPARE = 1889; // 24 +const static uint64_t SH_FLD_ACTUAL_ERROR = 1890; // 3 +const static uint64_t SH_FLD_ACTUAL_ERROR_LEN = 1891; // 3 +const static uint64_t SH_FLD_ACT_CHECK_TIMEOUT_SEL = 1892; // 4 +const static uint64_t SH_FLD_ACT_CHECK_TIMEOUT_SEL_LEN = 1893; // 4 +const static uint64_t SH_FLD_ACT_DIS = 1894; // 43 +const static uint64_t SH_FLD_ACT_STOP_LEVEL = 1895; // 30 +const static uint64_t SH_FLD_ACT_STOP_LEVEL_FSP = 1896; // 30 +const static uint64_t SH_FLD_ACT_STOP_LEVEL_FSP_LEN = 1897; // 30 +const static uint64_t SH_FLD_ACT_STOP_LEVEL_HYP = 1898; // 30 +const static uint64_t SH_FLD_ACT_STOP_LEVEL_HYP_LEN = 1899; // 30 +const static uint64_t SH_FLD_ACT_STOP_LEVEL_LEN = 1900; // 30 +const static uint64_t SH_FLD_ACT_STOP_LEVEL_OCC = 1901; // 30 +const static uint64_t SH_FLD_ACT_STOP_LEVEL_OCC_LEN = 1902; // 30 +const static uint64_t SH_FLD_ACT_STOP_LEVEL_OTR = 1903; // 30 +const static uint64_t SH_FLD_ACT_STOP_LEVEL_OTR_LEN = 1904; // 30 +const static uint64_t SH_FLD_ADAPTEST_1BIT_ENABLE = 1905; // 1 +const static uint64_t SH_FLD_ADAPTEST_1BIT_MATCH_TH_MAX = 1906; // 1 +const static uint64_t SH_FLD_ADAPTEST_1BIT_MATCH_TH_MAX_LEN = 1907; // 1 +const static uint64_t SH_FLD_ADAPTEST_1BIT_MATCH_TH_MIN = 1908; // 1 +const static uint64_t SH_FLD_ADAPTEST_1BIT_MATCH_TH_MIN_LEN = 1909; // 1 +const static uint64_t SH_FLD_ADAPTEST_CRN_RNG0_MATCH_TH = 1910; // 1 +const static uint64_t SH_FLD_ADAPTEST_CRN_RNG0_MATCH_TH_LEN = 1911; // 1 +const static uint64_t SH_FLD_ADAPTEST_CRN_RNG1_MATCH_TH = 1912; // 1 +const static uint64_t SH_FLD_ADAPTEST_CRN_RNG1_MATCH_TH_LEN = 1913; // 1 +const static uint64_t SH_FLD_ADAPTEST_ENABLE = 1914; // 1 +const static uint64_t SH_FLD_ADAPTEST_RRN_RNG0_MATCH_TH = 1915; // 1 +const static uint64_t SH_FLD_ADAPTEST_RRN_RNG0_MATCH_TH_LEN = 1916; // 1 +const static uint64_t SH_FLD_ADAPTEST_RRN_RNG1_MATCH_TH = 1917; // 1 +const static uint64_t SH_FLD_ADAPTEST_RRN_RNG1_MATCH_TH_LEN = 1918; // 1 +const static uint64_t SH_FLD_ADAPTEST_SAMPLE_SIZE = 1919; // 1 +const static uint64_t SH_FLD_ADAPTEST_SAMPLE_SIZE_LEN = 1920; // 1 +const static uint64_t SH_FLD_ADAPTEST_SOFT_FAIL_COUNT_CRN_RNG0 = 1921; // 1 +const static uint64_t SH_FLD_ADAPTEST_SOFT_FAIL_COUNT_CRN_RNG0_LEN = 1922; // 1 +const static uint64_t SH_FLD_ADAPTEST_SOFT_FAIL_COUNT_CRN_RNG1 = 1923; // 1 +const static uint64_t SH_FLD_ADAPTEST_SOFT_FAIL_COUNT_CRN_RNG1_LEN = 1924; // 1 +const static uint64_t SH_FLD_ADAPTEST_SOFT_FAIL_COUNT_RRN_RNG0 = 1925; // 1 +const static uint64_t SH_FLD_ADAPTEST_SOFT_FAIL_COUNT_RRN_RNG0_LEN = 1926; // 1 +const static uint64_t SH_FLD_ADAPTEST_SOFT_FAIL_COUNT_RRN_RNG1 = 1927; // 1 +const static uint64_t SH_FLD_ADAPTEST_SOFT_FAIL_COUNT_RRN_RNG1_LEN = 1928; // 1 +const static uint64_t SH_FLD_ADAPTEST_SOFT_FAIL_TH = 1929; // 1 +const static uint64_t SH_FLD_ADAPTEST_SOFT_FAIL_TH_LEN = 1930; // 1 +const static uint64_t SH_FLD_ADAPTEST_WINDOW_SIZE = 1931; // 1 +const static uint64_t SH_FLD_ADAPTEST_WINDOW_SIZE_LEN = 1932; // 1 +const static uint64_t SH_FLD_ADCFSM_ONGOING = 1933; // 1 +const static uint64_t SH_FLD_ADDR = 1934; // 38 +const static uint64_t SH_FLD_ADDR0 = 1935; // 8 +const static uint64_t SH_FLD_ADDR0_LEN = 1936; // 8 +const static uint64_t SH_FLD_ADDR1 = 1937; // 8 +const static uint64_t SH_FLD_ADDR1_LEN = 1938; // 8 +const static uint64_t SH_FLD_ADDR2 = 1939; // 16 +const static uint64_t SH_FLD_ADDR2_LEN = 1940; // 16 +const static uint64_t SH_FLD_ADDR3 = 1941; // 16 +const static uint64_t SH_FLD_ADDR3_LEN = 1942; // 16 +const static uint64_t SH_FLD_ADDR4 = 1943; // 16 +const static uint64_t SH_FLD_ADDR4_LEN = 1944; // 16 +const static uint64_t SH_FLD_ADDRESS = 1945; // 131 +const static uint64_t SH_FLD_ADDRESS_8_63 = 1946; // 1 +const static uint64_t SH_FLD_ADDRESS_8_63_LEN = 1947; // 1 +const static uint64_t SH_FLD_ADDRESS_LEN = 1948; // 130 +const static uint64_t SH_FLD_ADDRESS_PARITY = 1949; // 43 +const static uint64_t SH_FLD_ADDRESS_PIPELINE_MASTERWAIT_COUNT = 1950; // 2 +const static uint64_t SH_FLD_ADDRESS_PIPELINE_MASTERWAIT_COUNT_LEN = 1951; // 2 +const static uint64_t SH_FLD_ADDR_21_37 = 1952; // 1 +const static uint64_t SH_FLD_ADDR_21_37_LEN = 1953; // 1 +const static uint64_t SH_FLD_ADDR_26_38 = 1954; // 1 +const static uint64_t SH_FLD_ADDR_26_38_LEN = 1955; // 1 +const static uint64_t SH_FLD_ADDR_8_37 = 1956; // 1 +const static uint64_t SH_FLD_ADDR_8_37_LEN = 1957; // 1 +const static uint64_t SH_FLD_ADDR_8_38 = 1958; // 1 +const static uint64_t SH_FLD_ADDR_8_38_LEN = 1959; // 1 +const static uint64_t SH_FLD_ADDR_8_48 = 1960; // 1 +const static uint64_t SH_FLD_ADDR_8_48_LEN = 1961; // 1 +const static uint64_t SH_FLD_ADDR_8_49 = 1962; // 2 +const static uint64_t SH_FLD_ADDR_8_49_LEN = 1963; // 2 +const static uint64_t SH_FLD_ADDR_BAR = 1964; // 1 +const static uint64_t SH_FLD_ADDR_BAR_MODE = 1965; // 2 +const static uint64_t SH_FLD_ADDR_BUFFER = 1966; // 43 +const static uint64_t SH_FLD_ADDR_ERROR = 1967; // 2 +const static uint64_t SH_FLD_ADDR_ERROR_PULSE = 1968; // 2 +const static uint64_t SH_FLD_ADDR_INVALID_FACES = 1969; // 1 +const static uint64_t SH_FLD_ADDR_INVALID_PIB = 1970; // 1 +const static uint64_t SH_FLD_ADDR_LEN = 1971; // 38 +const static uint64_t SH_FLD_ADDR_MIRROR_A11_A13 = 1972; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_A3_A4 = 1973; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_A5_A6 = 1974; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_A7_A8 = 1975; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_BA0_BA1 = 1976; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_BG0_BG1 = 1977; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_RP0_PRI = 1978; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_RP0_QUA = 1979; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_RP0_SEC = 1980; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_RP0_TER = 1981; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_RP1_PRI = 1982; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_RP1_QUA = 1983; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_RP1_SEC = 1984; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_RP1_TER = 1985; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_RP2_PRI = 1986; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_RP2_QUA = 1987; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_RP2_SEC = 1988; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_RP2_TER = 1989; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_RP3_PRI = 1990; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_RP3_QUA = 1991; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_RP3_SEC = 1992; // 8 +const static uint64_t SH_FLD_ADDR_MIRROR_RP3_TER = 1993; // 8 +const static uint64_t SH_FLD_ADDR_NVLD = 1994; // 1 +const static uint64_t SH_FLD_ADDR_PARITY_ERR = 1995; // 4 +const static uint64_t SH_FLD_ADDR_RESET_INTR_FACES = 1996; // 1 +const static uint64_t SH_FLD_ADDR_RESET_INTR_FACES_LEN = 1997; // 1 +const static uint64_t SH_FLD_ADDR_RESET_INTR_PIB = 1998; // 1 +const static uint64_t SH_FLD_ADDR_RESET_INTR_PIB_LEN = 1999; // 1 +const static uint64_t SH_FLD_ADDR_TAG = 2000; // 1 +const static uint64_t SH_FLD_ADDR_TAG_LEN = 2001; // 1 +const static uint64_t SH_FLD_ADR = 2002; // 4 +const static uint64_t SH_FLD_ADR0_ANALOG_WRAPON = 2003; // 8 +const static uint64_t SH_FLD_ADR0_ATESTSEL_0_2 = 2004; // 8 +const static uint64_t SH_FLD_ADR0_ATESTSEL_0_2_LEN = 2005; // 8 +const static uint64_t SH_FLD_ADR0_ATEST_SEL_0 = 2006; // 8 +const static uint64_t SH_FLD_ADR0_ATEST_SEL_0_LEN = 2007; // 8 +const static uint64_t SH_FLD_ADR0_BB_LOCK = 2008; // 8 +const static uint64_t SH_FLD_ADR0_CAL_ERROR = 2009; // 8 +const static uint64_t SH_FLD_ADR0_CAL_ERROR_FINE = 2010; // 8 +const static uint64_t SH_FLD_ADR0_CAL_GOOD = 2011; // 8 +const static uint64_t SH_FLD_ADR0_CONTINUOUS_UPDATE = 2012; // 8 +const static uint64_t SH_FLD_ADR0_EN = 2013; // 8 +const static uint64_t SH_FLD_ADR0_ENABLE = 2014; // 8 +const static uint64_t SH_FLD_ADR0_EN_DRIVER_INVFB_DC = 2015; // 8 +const static uint64_t SH_FLD_ADR0_FLUSH = 2016; // 8 +const static uint64_t SH_FLD_ADR0_FRZSULV = 2017; // 8 +const static uint64_t SH_FLD_ADR0_HS_DLLMUX_SEL_0_3 = 2018; // 8 +const static uint64_t SH_FLD_ADR0_HS_DLLMUX_SEL_0_3_LEN = 2019; // 8 +const static uint64_t SH_FLD_ADR0_HS_PROBE_A_SEL_0_3 = 2020; // 8 +const static uint64_t SH_FLD_ADR0_HS_PROBE_A_SEL_0_3_LEN = 2021; // 8 +const static uint64_t SH_FLD_ADR0_HS_PROBE_B_SEL_0_3 = 2022; // 8 +const static uint64_t SH_FLD_ADR0_HS_PROBE_B_SEL_0_3_LEN = 2023; // 8 +const static uint64_t SH_FLD_ADR0_INIT_IO = 2024; // 8 +const static uint64_t SH_FLD_ADR0_INIT_RXDLL_CAL_RESET = 2025; // 8 +const static uint64_t SH_FLD_ADR0_INIT_RXDLL_CAL_UPDATE = 2026; // 8 +const static uint64_t SH_FLD_ADR0_INTERP_SIG_SLEW_0_3 = 2027; // 8 +const static uint64_t SH_FLD_ADR0_INTERP_SIG_SLEW_0_3_LEN = 2028; // 8 +const static uint64_t SH_FLD_ADR0_OVERRIDE = 2029; // 8 +const static uint64_t SH_FLD_ADR0_OVERRIDE_EN = 2030; // 8 +const static uint64_t SH_FLD_ADR0_OVERRIDE_LEN = 2031; // 8 +const static uint64_t SH_FLD_ADR0_PHASE_ALIGN_RESET = 2032; // 8 +const static uint64_t SH_FLD_ADR0_PHASE_DEFAULT_EN = 2033; // 8 +const static uint64_t SH_FLD_ADR0_PHASE_EN = 2034; // 8 +const static uint64_t SH_FLD_ADR0_POS_EDGE_ALIGN = 2035; // 8 +const static uint64_t SH_FLD_ADR0_REGS_RXDLL_CAL_SKIP = 2036; // 8 +const static uint64_t SH_FLD_ADR0_REGS_RXDLL_CAL_SKIP_LEN = 2037; // 8 +const static uint64_t SH_FLD_ADR0_REGS_RXDLL_COARSE_ADJ_BY2 = 2038; // 8 +const static uint64_t SH_FLD_ADR0_REGS_RXDLL_DAC = 2039; // 8 +const static uint64_t SH_FLD_ADR0_REGS_RXDLL_DAC_LEN = 2040; // 8 +const static uint64_t SH_FLD_ADR0_REGS_RXDLL_EN = 2041; // 8 +const static uint64_t SH_FLD_ADR0_REGS_RXDLL_EN_LEN = 2042; // 8 +const static uint64_t SH_FLD_ADR0_REGS_RXDLL_VREG = 2043; // 16 +const static uint64_t SH_FLD_ADR0_REGS_RXDLL_VREG_LEN = 2044; // 16 +const static uint64_t SH_FLD_ADR0_RESERVED_60_63 = 2045; // 8 +const static uint64_t SH_FLD_ADR0_RESERVED_60_63_LEN = 2046; // 8 +const static uint64_t SH_FLD_ADR0_ROT = 2047; // 8 +const static uint64_t SH_FLD_ADR0_ROT_LEN = 2048; // 8 +const static uint64_t SH_FLD_ADR0_ROT_OVERRIDE = 2049; // 8 +const static uint64_t SH_FLD_ADR0_ROT_OVERRIDE_EN = 2050; // 8 +const static uint64_t SH_FLD_ADR0_ROT_OVERRIDE_LEN = 2051; // 8 +const static uint64_t SH_FLD_ADR0_RXREG_COMPCON_DC = 2052; // 8 +const static uint64_t SH_FLD_ADR0_RXREG_COMPCON_DC_LEN = 2053; // 8 +const static uint64_t SH_FLD_ADR0_RXREG_CON_DC = 2054; // 8 +const static uint64_t SH_FLD_ADR0_RXREG_DAC_PULLUP_DC = 2055; // 8 +const static uint64_t SH_FLD_ADR0_RXREG_DRVCON_DC = 2056; // 8 +const static uint64_t SH_FLD_ADR0_RXREG_DRVCON_DC_LEN = 2057; // 8 +const static uint64_t SH_FLD_ADR0_RXREG_FILTER_LENGTH_DC = 2058; // 8 +const static uint64_t SH_FLD_ADR0_RXREG_FILTER_LENGTH_DC_LEN = 2059; // 8 +const static uint64_t SH_FLD_ADR0_RXREG_LEAD_LAG_SEPARATION_DC = 2060; // 8 +const static uint64_t SH_FLD_ADR0_RXREG_LEAD_LAG_SEPARATION_DC_LEN = 2061; // 8 +const static uint64_t SH_FLD_ADR0_RXREG_REF_SEL_DC = 2062; // 8 +const static uint64_t SH_FLD_ADR0_RXREG_REF_SEL_DC_LEN = 2063; // 8 +const static uint64_t SH_FLD_ADR0_SLEW_DONE_STATUS = 2064; // 8 +const static uint64_t SH_FLD_ADR0_SLEW_DONE_STATUS_LEN = 2065; // 8 +const static uint64_t SH_FLD_ADR0_START = 2066; // 8 +const static uint64_t SH_FLD_ADR0_TARGET_PR_OFFSET = 2067; // 8 +const static uint64_t SH_FLD_ADR0_TARGET_PR_OFFSET_LEN = 2068; // 8 +const static uint64_t SH_FLD_ADR0_TSYS = 2069; // 8 +const static uint64_t SH_FLD_ADR0_TSYS_LEN = 2070; // 8 +const static uint64_t SH_FLD_ADR0_VALUE = 2071; // 16 +const static uint64_t SH_FLD_ADR0_VALUE_LEN = 2072; // 16 +const static uint64_t SH_FLD_ADR1_ANALOG_WRAPON = 2073; // 8 +const static uint64_t SH_FLD_ADR1_ATESTSEL_0_2 = 2074; // 8 +const static uint64_t SH_FLD_ADR1_ATESTSEL_0_2_LEN = 2075; // 8 +const static uint64_t SH_FLD_ADR1_ATEST_SEL_0 = 2076; // 8 +const static uint64_t SH_FLD_ADR1_ATEST_SEL_0_LEN = 2077; // 8 +const static uint64_t SH_FLD_ADR1_BB_LOCK = 2078; // 8 +const static uint64_t SH_FLD_ADR1_CAL_ERROR = 2079; // 8 +const static uint64_t SH_FLD_ADR1_CAL_ERROR_FINE = 2080; // 8 +const static uint64_t SH_FLD_ADR1_CAL_GOOD = 2081; // 8 +const static uint64_t SH_FLD_ADR1_CONTINUOUS_UPDATE = 2082; // 8 +const static uint64_t SH_FLD_ADR1_EN = 2083; // 8 +const static uint64_t SH_FLD_ADR1_ENABLE = 2084; // 8 +const static uint64_t SH_FLD_ADR1_EN_DRIVER_INVFB_DC = 2085; // 8 +const static uint64_t SH_FLD_ADR1_FLUSH = 2086; // 8 +const static uint64_t SH_FLD_ADR1_FRZSULV = 2087; // 8 +const static uint64_t SH_FLD_ADR1_HS_DLLMUX_SEL_0_3 = 2088; // 8 +const static uint64_t SH_FLD_ADR1_HS_DLLMUX_SEL_0_3_LEN = 2089; // 8 +const static uint64_t SH_FLD_ADR1_HS_PROBE_A_SEL_0_3 = 2090; // 8 +const static uint64_t SH_FLD_ADR1_HS_PROBE_A_SEL_0_3_LEN = 2091; // 8 +const static uint64_t SH_FLD_ADR1_HS_PROBE_B_SEL_0_3 = 2092; // 8 +const static uint64_t SH_FLD_ADR1_HS_PROBE_B_SEL_0_3_LEN = 2093; // 8 +const static uint64_t SH_FLD_ADR1_INIT_IO = 2094; // 8 +const static uint64_t SH_FLD_ADR1_INIT_RXDLL_CAL_RESET = 2095; // 8 +const static uint64_t SH_FLD_ADR1_INIT_RXDLL_CAL_UPDATE = 2096; // 8 +const static uint64_t SH_FLD_ADR1_INTERP_SIG_SLEW_0_3 = 2097; // 8 +const static uint64_t SH_FLD_ADR1_INTERP_SIG_SLEW_0_3_LEN = 2098; // 8 +const static uint64_t SH_FLD_ADR1_OVERRIDE = 2099; // 8 +const static uint64_t SH_FLD_ADR1_OVERRIDE_EN = 2100; // 8 +const static uint64_t SH_FLD_ADR1_OVERRIDE_LEN = 2101; // 8 +const static uint64_t SH_FLD_ADR1_PHASE_ALIGN_RESET = 2102; // 8 +const static uint64_t SH_FLD_ADR1_PHASE_DEFAULT_EN = 2103; // 8 +const static uint64_t SH_FLD_ADR1_PHASE_EN = 2104; // 8 +const static uint64_t SH_FLD_ADR1_POS_EDGE_ALIGN = 2105; // 8 +const static uint64_t SH_FLD_ADR1_REGS_RXDLL_CAL_SKIP = 2106; // 8 +const static uint64_t SH_FLD_ADR1_REGS_RXDLL_CAL_SKIP_LEN = 2107; // 8 +const static uint64_t SH_FLD_ADR1_REGS_RXDLL_COARSE_ADJ_BY2 = 2108; // 8 +const static uint64_t SH_FLD_ADR1_REGS_RXDLL_DAC = 2109; // 8 +const static uint64_t SH_FLD_ADR1_REGS_RXDLL_DAC_LEN = 2110; // 8 +const static uint64_t SH_FLD_ADR1_REGS_RXDLL_EN = 2111; // 8 +const static uint64_t SH_FLD_ADR1_REGS_RXDLL_EN_LEN = 2112; // 8 +const static uint64_t SH_FLD_ADR1_REGS_RXDLL_VREG = 2113; // 16 +const static uint64_t SH_FLD_ADR1_REGS_RXDLL_VREG_LEN = 2114; // 16 +const static uint64_t SH_FLD_ADR1_RESERVED_60_63 = 2115; // 8 +const static uint64_t SH_FLD_ADR1_RESERVED_60_63_LEN = 2116; // 8 +const static uint64_t SH_FLD_ADR1_ROT = 2117; // 8 +const static uint64_t SH_FLD_ADR1_ROT_LEN = 2118; // 8 +const static uint64_t SH_FLD_ADR1_ROT_OVERRIDE = 2119; // 8 +const static uint64_t SH_FLD_ADR1_ROT_OVERRIDE_EN = 2120; // 8 +const static uint64_t SH_FLD_ADR1_ROT_OVERRIDE_LEN = 2121; // 8 +const static uint64_t SH_FLD_ADR1_RXREG_COMPCON_DC = 2122; // 8 +const static uint64_t SH_FLD_ADR1_RXREG_COMPCON_DC_LEN = 2123; // 8 +const static uint64_t SH_FLD_ADR1_RXREG_CON_DC = 2124; // 8 +const static uint64_t SH_FLD_ADR1_RXREG_DAC_PULLUP_DC = 2125; // 8 +const static uint64_t SH_FLD_ADR1_RXREG_DRVCON_DC = 2126; // 8 +const static uint64_t SH_FLD_ADR1_RXREG_DRVCON_DC_LEN = 2127; // 8 +const static uint64_t SH_FLD_ADR1_RXREG_FILTER_LENGTH_DC = 2128; // 8 +const static uint64_t SH_FLD_ADR1_RXREG_FILTER_LENGTH_DC_LEN = 2129; // 8 +const static uint64_t SH_FLD_ADR1_RXREG_LEAD_LAG_SEPARATION_DC = 2130; // 8 +const static uint64_t SH_FLD_ADR1_RXREG_LEAD_LAG_SEPARATION_DC_LEN = 2131; // 8 +const static uint64_t SH_FLD_ADR1_RXREG_REF_SEL_DC = 2132; // 8 +const static uint64_t SH_FLD_ADR1_RXREG_REF_SEL_DC_LEN = 2133; // 8 +const static uint64_t SH_FLD_ADR1_SLEW_DONE_STATUS = 2134; // 8 +const static uint64_t SH_FLD_ADR1_SLEW_DONE_STATUS_LEN = 2135; // 8 +const static uint64_t SH_FLD_ADR1_START = 2136; // 8 +const static uint64_t SH_FLD_ADR1_TARGET_PR_OFFSET = 2137; // 8 +const static uint64_t SH_FLD_ADR1_TARGET_PR_OFFSET_LEN = 2138; // 8 +const static uint64_t SH_FLD_ADR1_TSYS = 2139; // 8 +const static uint64_t SH_FLD_ADR1_TSYS_LEN = 2140; // 8 +const static uint64_t SH_FLD_ADR1_VALUE = 2141; // 16 +const static uint64_t SH_FLD_ADR1_VALUE_LEN = 2142; // 16 +const static uint64_t SH_FLD_ADR_LEN = 2143; // 4 +const static uint64_t SH_FLD_ADR_SLAVE_SEL = 2144; // 8 +const static uint64_t SH_FLD_ADS_HANG = 2145; // 1 +const static uint64_t SH_FLD_ADU_MALF_ALERT = 2146; // 1 +const static uint64_t SH_FLD_ADVANCE_RD_VALID = 2147; // 8 +const static uint64_t SH_FLD_AESSHA_LATENCY_CFG = 2148; // 1 +const static uint64_t SH_FLD_AES_LATENCY_CFG = 2149; // 1 +const static uint64_t SH_FLD_AIB_FENCE = 2150; // 9 +const static uint64_t SH_FLD_AIB_FENCE_MASK = 2151; // 9 +const static uint64_t SH_FLD_AIB_PE = 2152; // 9 +const static uint64_t SH_FLD_AIB_PE_MASK = 2153; // 9 +const static uint64_t SH_FLD_ALIGN_ON_EVEN_CYCLES = 2154; // 8 +const static uint64_t SH_FLD_ALINK_NOTPHB_MODE = 2155; // 2 +const static uint64_t SH_FLD_ALLOW_CRYPTO = 2156; // 1 +const static uint64_t SH_FLD_ALLOW_RD_FIFO_AUTO_RESET = 2157; // 8 +const static uint64_t SH_FLD_ALLOW_REG_WAKEUP_C0 = 2158; // 12 +const static uint64_t SH_FLD_ALLOW_REG_WAKEUP_C1 = 2159; // 12 +const static uint64_t SH_FLD_ALTD_DATA_ITAG = 2160; // 1 +const static uint64_t SH_FLD_ALTD_DATA_TX = 2161; // 1 +const static uint64_t SH_FLD_ALTD_DATA_TX_LEN = 2162; // 1 +const static uint64_t SH_FLD_ALTD_DATA_TX_OVERWRITE = 2163; // 1 +const static uint64_t SH_FLD_ALT_SEGSZ_DIS = 2164; // 1 +const static uint64_t SH_FLD_ALU_FLIP_ENDIAN_BIG = 2165; // 3 +const static uint64_t SH_FLD_ALU_FLIP_ENDIAN_LITTLE = 2166; // 3 +const static uint64_t SH_FLD_ALU_SAFE_LATENCY = 2167; // 3 +const static uint64_t SH_FLD_ALWAYS_RTY = 2168; // 8 +const static uint64_t SH_FLD_AMAX_HIGH = 2169; // 6 +const static uint64_t SH_FLD_AMAX_HIGH_LEN = 2170; // 6 +const static uint64_t SH_FLD_AMAX_LOW = 2171; // 6 +const static uint64_t SH_FLD_AMAX_LOW_LEN = 2172; // 6 +const static uint64_t SH_FLD_AMIN_CFG = 2173; // 6 +const static uint64_t SH_FLD_AMIN_CFG_LEN = 2174; // 6 +const static uint64_t SH_FLD_AMIN_TIMEOUT = 2175; // 6 +const static uint64_t SH_FLD_AMIN_TIMEOUT_LEN = 2176; // 6 +const static uint64_t SH_FLD_AMO_DRAM_SIZE_128B = 2177; // 8 +const static uint64_t SH_FLD_AMO_LIMIT = 2178; // 8 +const static uint64_t SH_FLD_AMO_LIMIT_LEN = 2179; // 8 +const static uint64_t SH_FLD_AMP0_FILTER_MASK = 2180; // 6 +const static uint64_t SH_FLD_AMP0_FILTER_MASK_LEN = 2181; // 6 +const static uint64_t SH_FLD_AMP1_FILTER_MASK = 2182; // 6 +const static uint64_t SH_FLD_AMP1_FILTER_MASK_LEN = 2183; // 6 +const static uint64_t SH_FLD_AMP_CFG = 2184; // 6 +const static uint64_t SH_FLD_AMP_CFG_LEN = 2185; // 6 +const static uint64_t SH_FLD_AMP_GAIN_CNT_MAX = 2186; // 6 +const static uint64_t SH_FLD_AMP_GAIN_CNT_MAX_LEN = 2187; // 6 +const static uint64_t SH_FLD_AMP_INIT_CFG = 2188; // 6 +const static uint64_t SH_FLD_AMP_INIT_CFG_LEN = 2189; // 6 +const static uint64_t SH_FLD_AMP_INIT_TIMEOUT = 2190; // 6 +const static uint64_t SH_FLD_AMP_INIT_TIMEOUT_LEN = 2191; // 6 +const static uint64_t SH_FLD_AMP_RECAL_CFG = 2192; // 6 +const static uint64_t SH_FLD_AMP_RECAL_CFG_LEN = 2193; // 6 +const static uint64_t SH_FLD_AMP_RECAL_TIMEOUT = 2194; // 6 +const static uint64_t SH_FLD_AMP_RECAL_TIMEOUT_LEN = 2195; // 6 +const static uint64_t SH_FLD_AMP_START_VAL = 2196; // 6 +const static uint64_t SH_FLD_AMP_START_VAL_LEN = 2197; // 6 +const static uint64_t SH_FLD_AMP_TIMEOUT = 2198; // 6 +const static uint64_t SH_FLD_AMP_TIMEOUT_LEN = 2199; // 6 +const static uint64_t SH_FLD_AMP_VAL = 2200; // 120 +const static uint64_t SH_FLD_AMP_VAL_LEN = 2201; // 120 +const static uint64_t SH_FLD_ANALOGTUNE = 2202; // 20 +const static uint64_t SH_FLD_ANALOGTUNE_LEN = 2203; // 20 +const static uint64_t SH_FLD_ANALOG_INPUT_STAB1 = 2204; // 8 +const static uint64_t SH_FLD_ANALOG_OUTPUT_STAB = 2205; // 8 +const static uint64_t SH_FLD_ANY_ERROR = 2206; // 1 +const static uint64_t SH_FLD_ANY_REQ_ACTIVE = 2207; // 12 +const static uint64_t SH_FLD_AP = 2208; // 8 +const static uint64_t SH_FLD_AP110_AP010_DELTA_MAX = 2209; // 6 +const static uint64_t SH_FLD_AP110_AP010_DELTA_MAX_LEN = 2210; // 6 +const static uint64_t SH_FLD_APB = 2211; // 8 +const static uint64_t SH_FLD_APB_MASK = 2212; // 8 +const static uint64_t SH_FLD_APCARY = 2213; // 4 +const static uint64_t SH_FLD_APCARY_ADDRESS = 2214; // 2 +const static uint64_t SH_FLD_APCARY_ADDRESS_LEN = 2215; // 2 +const static uint64_t SH_FLD_APCARY_LEN = 2216; // 4 +const static uint64_t SH_FLD_APCCTL_ADR_BAR_MODE = 2217; // 2 +const static uint64_t SH_FLD_APCCTL_CFG_BKILL_INC = 2218; // 2 +const static uint64_t SH_FLD_APCCTL_DISABLE_G = 2219; // 2 +const static uint64_t SH_FLD_APCCTL_DISABLE_LN = 2220; // 2 +const static uint64_t SH_FLD_APCCTL_DISABLE_NN_RN = 2221; // 2 +const static uint64_t SH_FLD_APCCTL_DISABLE_PSL_CMDQUEUE = 2222; // 2 +const static uint64_t SH_FLD_APCCTL_DISABLE_VG_NOT_SYS = 2223; // 2 +const static uint64_t SH_FLD_APCCTL_ENABLE_MASTER_RETRY_BACKOFF = 2224; // 2 +const static uint64_t SH_FLD_APCCTL_ENABLE_RD_VG_SCOPE_PREDICT = 2225; // 2 +const static uint64_t SH_FLD_APCCTL_ENB_CRESP_EXAM = 2226; // 2 +const static uint64_t SH_FLD_APCCTL_ENB_FRC_ADDR13 = 2227; // 2 +const static uint64_t SH_FLD_APCCTL_HANG_ARE = 2228; // 2 +const static uint64_t SH_FLD_APCCTL_HANG_DEAD = 2229; // 2 +const static uint64_t SH_FLD_APCCTL_MAX_RETRY = 2230; // 2 +const static uint64_t SH_FLD_APCCTL_MAX_RETRY_LEN = 2231; // 2 +const static uint64_t SH_FLD_APCCTL_MEM_SEL_MODE = 2232; // 2 +const static uint64_t SH_FLD_APCCTL_P9_MODE = 2233; // 2 +const static uint64_t SH_FLD_APCCTL_PHB_SEL = 2234; // 2 +const static uint64_t SH_FLD_APCCTL_PHB_SEL_LEN = 2235; // 2 +const static uint64_t SH_FLD_APCCTL_SKIP_G = 2236; // 2 +const static uint64_t SH_FLD_APCCTL_SYSADDR = 2237; // 2 +const static uint64_t SH_FLD_APCCTL_SYSADDR_LEN = 2238; // 2 +const static uint64_t SH_FLD_APC_ARRAY_CMD_CE_ERPT = 2239; // 4 +const static uint64_t SH_FLD_APC_ARRAY_CMD_UE_ERPT = 2240; // 4 +const static uint64_t SH_FLD_APX111_HIGH = 2241; // 6 +const static uint64_t SH_FLD_APX111_HIGH_LEN = 2242; // 6 +const static uint64_t SH_FLD_APX111_LOW = 2243; // 6 +const static uint64_t SH_FLD_APX111_LOW_LEN = 2244; // 6 +const static uint64_t SH_FLD_AP_LEN = 2245; // 8 +const static uint64_t SH_FLD_ARBITRATION_LOST_ERROR_0 = 2246; // 2 +const static uint64_t SH_FLD_ARBITRATION_LOST_ERROR_1 = 2247; // 2 +const static uint64_t SH_FLD_ARBITRATION_LOST_ERROR_2 = 2248; // 2 +const static uint64_t SH_FLD_ARBITRATION_LOST_ERROR_3 = 2249; // 2 +const static uint64_t SH_FLD_ARB_EN_SEND_ALL_WRITES = 2250; // 1 +const static uint64_t SH_FLD_ARB_STALL = 2251; // 1 +const static uint64_t SH_FLD_ARB_STOP = 2252; // 1 +const static uint64_t SH_FLD_ARRAY_ADDR = 2253; // 6 +const static uint64_t SH_FLD_ARRAY_ADDR_LEN = 2254; // 6 +const static uint64_t SH_FLD_ARRAY_POINTER_SELECT = 2255; // 6 +const static uint64_t SH_FLD_ARRAY_POINTER_SELECT_LEN = 2256; // 6 +const static uint64_t SH_FLD_ARRAY_SELECT = 2257; // 1 +const static uint64_t SH_FLD_ARRAY_SELECT_LEN = 2258; // 1 +const static uint64_t SH_FLD_ARRAY_WRITE_ASSIST_EN = 2259; // 43 +const static uint64_t SH_FLD_ARY_ECC_CE = 2260; // 9 +const static uint64_t SH_FLD_ARY_ECC_CE_MASK = 2261; // 9 +const static uint64_t SH_FLD_ARY_ECC_SUE = 2262; // 9 +const static uint64_t SH_FLD_ARY_ECC_SUE_MASK = 2263; // 9 +const static uint64_t SH_FLD_ARY_ECC_UE = 2264; // 9 +const static uint64_t SH_FLD_ARY_ECC_UE_MASK = 2265; // 9 +const static uint64_t SH_FLD_ASSN_DONE = 2266; // 1 +const static uint64_t SH_FLD_ASYNC_IF_ERROR = 2267; // 16 +const static uint64_t SH_FLD_ASYNC_INJ = 2268; // 16 +const static uint64_t SH_FLD_ASYNC_INJ_LEN = 2269; // 16 +const static uint64_t SH_FLD_ASYNC_MODE = 2270; // 6 +const static uint64_t SH_FLD_AS_INTERRUPT_ENABLE = 2271; // 2 +const static uint64_t SH_FLD_ATAG_0_15 = 2272; // 1 +const static uint64_t SH_FLD_ATAG_0_15_LEN = 2273; // 1 +const static uint64_t SH_FLD_ATOMIC_ALT_CE_INJ = 2274; // 2 +const static uint64_t SH_FLD_ATOMIC_ALT_CHIP_KILL_INJ = 2275; // 2 +const static uint64_t SH_FLD_ATOMIC_ALT_INJ_SYM_SEL = 2276; // 2 +const static uint64_t SH_FLD_ATOMIC_ALT_INJ_SYM_SEL_LEN = 2277; // 2 +const static uint64_t SH_FLD_ATOMIC_ALT_SUE_INJ = 2278; // 2 +const static uint64_t SH_FLD_ATOMIC_ALT_UE_INJ = 2279; // 2 +const static uint64_t SH_FLD_ATSTSEL = 2280; // 17 +const static uint64_t SH_FLD_ATSTSEL_LEN = 2281; // 17 +const static uint64_t SH_FLD_ATS_AT_EA_CE = 2282; // 1 +const static uint64_t SH_FLD_ATS_AT_EA_UE = 2283; // 1 +const static uint64_t SH_FLD_ATS_AT_RSPOUT_CE = 2284; // 1 +const static uint64_t SH_FLD_ATS_AT_RSPOUT_UE = 2285; // 1 +const static uint64_t SH_FLD_ATS_AT_TDRMEM_CE = 2286; // 1 +const static uint64_t SH_FLD_ATS_AT_TDRMEM_UE = 2287; // 1 +const static uint64_t SH_FLD_ATS_INVAL_IODA_TBL_SEL = 2288; // 1 +const static uint64_t SH_FLD_ATS_IODA_ADDR_PERR = 2289; // 1 +const static uint64_t SH_FLD_ATS_NPU_CTRL_PERR = 2290; // 1 +const static uint64_t SH_FLD_ATS_NPU_TOR_PERR = 2291; // 1 +const static uint64_t SH_FLD_ATS_RSPOUT_ADDR_ERR = 2292; // 1 +const static uint64_t SH_FLD_ATS_TCD_PERR = 2293; // 1 +const static uint64_t SH_FLD_ATS_TCE_CACHE_MULT_HIT_ERR = 2294; // 1 +const static uint64_t SH_FLD_ATS_TCE_PAGE_ACCESS_CA_ERR = 2295; // 1 +const static uint64_t SH_FLD_ATS_TCE_PAGE_ACCESS_TW_ERR = 2296; // 1 +const static uint64_t SH_FLD_ATS_TCE_REQ_TO_ERR = 2297; // 1 +const static uint64_t SH_FLD_ATS_TDR_PERR = 2298; // 1 +const static uint64_t SH_FLD_ATS_TVT_ADDR_RANGE_ERR = 2299; // 1 +const static uint64_t SH_FLD_ATS_TVT_ENTRY_INVALID = 2300; // 1 +const static uint64_t SH_FLD_ATS_TVT_PERR = 2301; // 1 +const static uint64_t SH_FLD_ATTENTION = 2302; // 1 +const static uint64_t SH_FLD_ATX_PRIO_FOR_EQC_EOI_EQP = 2303; // 1 +const static uint64_t SH_FLD_ATX_PRIO_FOR_EQC_EOI_EQP_LEN = 2304; // 1 +const static uint64_t SH_FLD_ATX_PRIO_FOR_EQD_DMA = 2305; // 1 +const static uint64_t SH_FLD_ATX_PRIO_FOR_EQD_DMA_LEN = 2306; // 1 +const static uint64_t SH_FLD_ATX_PRIO_FOR_IRQ = 2307; // 1 +const static uint64_t SH_FLD_ATX_PRIO_FOR_IRQ_LEN = 2308; // 1 +const static uint64_t SH_FLD_ATX_PRIO_FOR_IVC = 2309; // 1 +const static uint64_t SH_FLD_ATX_PRIO_FOR_IVC_LEN = 2310; // 1 +const static uint64_t SH_FLD_ATX_PRIO_FOR_LSS_CI_LOAD = 2311; // 1 +const static uint64_t SH_FLD_ATX_PRIO_FOR_LSS_CI_LOAD_LEN = 2312; // 1 +const static uint64_t SH_FLD_ATX_PRIO_FOR_REGS = 2313; // 1 +const static uint64_t SH_FLD_ATX_PRIO_FOR_REGS_LEN = 2314; // 1 +const static uint64_t SH_FLD_ATX_PRIO_FOR_SBC_DMA = 2315; // 1 +const static uint64_t SH_FLD_ATX_PRIO_FOR_SBC_DMA_LEN = 2316; // 1 +const static uint64_t SH_FLD_ATX_PRIO_FOR_SBC_EOI_RESP = 2317; // 1 +const static uint64_t SH_FLD_ATX_PRIO_FOR_SBC_EOI_RESP_LEN = 2318; // 1 +const static uint64_t SH_FLD_ATX_PRIO_FOR_TRIG_FWD = 2319; // 1 +const static uint64_t SH_FLD_ATX_PRIO_FOR_TRIG_FWD_LEN = 2320; // 1 +const static uint64_t SH_FLD_AT_EA_CE_ESR = 2321; // 1 +const static uint64_t SH_FLD_AT_EA_UE_ESR = 2322; // 1 +const static uint64_t SH_FLD_AT_TDRMEM_CE_ESR = 2323; // 1 +const static uint64_t SH_FLD_AT_TDRMEM_UE_ESR = 2324; // 1 +const static uint64_t SH_FLD_AUE = 2325; // 2 +const static uint64_t SH_FLD_AUE_LEN = 2326; // 2 +const static uint64_t SH_FLD_AUTOINC = 2327; // 12 +const static uint64_t SH_FLD_AUTO_INC = 2328; // 7 +const static uint64_t SH_FLD_AUTO_INCREMENT = 2329; // 3 +const static uint64_t SH_FLD_AUTO_INC_TRIG = 2330; // 6 +const static uint64_t SH_FLD_AUTO_INC_TRIG_LEN = 2331; // 6 +const static uint64_t SH_FLD_AUTO_POST_DECREMENT_FACES = 2332; // 1 +const static uint64_t SH_FLD_AUTO_POST_DECREMENT_PIB = 2333; // 1 +const static uint64_t SH_FLD_AUTO_PRE_INCREMENT_FACES = 2334; // 1 +const static uint64_t SH_FLD_AUTO_PRE_INCREMENT_PIB = 2335; // 1 +const static uint64_t SH_FLD_AUTO_RELOAD_N = 2336; // 2 +const static uint64_t SH_FLD_AUTO_STOP1_DISABLE = 2337; // 12 +const static uint64_t SH_FLD_AVA = 2338; // 8 +const static uint64_t SH_FLD_AVAIL_GROUPS = 2339; // 2 +const static uint64_t SH_FLD_AVAIL_GROUPS_LEN = 2340; // 2 +const static uint64_t SH_FLD_AVA_LEN = 2341; // 8 +const static uint64_t SH_FLD_AVG_CYCLE_SAMPLE = 2342; // 12 +const static uint64_t SH_FLD_AVG_CYCLE_SAMPLE_LEN = 2343; // 12 +const static uint64_t SH_FLD_AVG_FREQ_TSEL = 2344; // 12 +const static uint64_t SH_FLD_AVG_FREQ_TSEL_LEN = 2345; // 12 +const static uint64_t SH_FLD_AVS_SLAVE0 = 2346; // 1 +const static uint64_t SH_FLD_AVS_SLAVE1 = 2347; // 1 +const static uint64_t SH_FLD_AXFLOW_ERR = 2348; // 1 +const static uint64_t SH_FLD_AXFLOW_ERR_MASK = 2349; // 1 +const static uint64_t SH_FLD_AXPUSH_WRERR = 2350; // 1 +const static uint64_t SH_FLD_AXPUSH_WRERR_MASK = 2351; // 1 +const static uint64_t SH_FLD_AXRCV_DLO_ERR = 2352; // 1 +const static uint64_t SH_FLD_AXRCV_DLO_ERR_MASK = 2353; // 1 +const static uint64_t SH_FLD_AXRCV_DLO_TO = 2354; // 1 +const static uint64_t SH_FLD_AXRCV_DLO_TO_MASK = 2355; // 1 +const static uint64_t SH_FLD_AXRCV_RSVDATA_TO = 2356; // 1 +const static uint64_t SH_FLD_AXRCV_RSVDATA_TO_MASK = 2357; // 1 +const static uint64_t SH_FLD_AXSND_DHI_RTYTO = 2358; // 1 +const static uint64_t SH_FLD_AXSND_DHI_RTYTO_MASK = 2359; // 1 +const static uint64_t SH_FLD_AXSND_DLO_RTYTO = 2360; // 1 +const static uint64_t SH_FLD_AXSND_DLO_RTYTO_MASK = 2361; // 1 +const static uint64_t SH_FLD_AXSND_RSVERR = 2362; // 1 +const static uint64_t SH_FLD_AXSND_RSVERR_MASK = 2363; // 1 +const static uint64_t SH_FLD_AXSND_RSVTO = 2364; // 1 +const static uint64_t SH_FLD_AXSND_RSVTO_MASK = 2365; // 1 +const static uint64_t SH_FLD_A_AP = 2366; // 144 +const static uint64_t SH_FLD_A_AP_LEN = 2367; // 144 +const static uint64_t SH_FLD_A_BAD_DFE_CONV = 2368; // 144 +const static uint64_t SH_FLD_A_BANK_CONTROLS = 2369; // 120 +const static uint64_t SH_FLD_A_BANK_CONTROLS_LEN = 2370; // 120 +const static uint64_t SH_FLD_A_BIST_EN = 2371; // 6 +const static uint64_t SH_FLD_A_CONTROLS = 2372; // 120 +const static uint64_t SH_FLD_A_CONTROLS_LEN = 2373; // 120 +const static uint64_t SH_FLD_A_CTLE_COARSE = 2374; // 48 +const static uint64_t SH_FLD_A_CTLE_COARSE_LEN = 2375; // 48 +const static uint64_t SH_FLD_A_CTLE_GAIN = 2376; // 120 +const static uint64_t SH_FLD_A_CTLE_GAIN_LEN = 2377; // 120 +const static uint64_t SH_FLD_A_CTLE_PEAK = 2378; // 72 +const static uint64_t SH_FLD_A_CTLE_PEAK_LEN = 2379; // 72 +const static uint64_t SH_FLD_A_EVEN_INTEG_FINE_GAIN = 2380; // 120 +const static uint64_t SH_FLD_A_EVEN_INTEG_FINE_GAIN_LEN = 2381; // 120 +const static uint64_t SH_FLD_A_H10_VAL = 2382; // 72 +const static uint64_t SH_FLD_A_H10_VAL_LEN = 2383; // 72 +const static uint64_t SH_FLD_A_H11_VAL = 2384; // 72 +const static uint64_t SH_FLD_A_H11_VAL_LEN = 2385; // 72 +const static uint64_t SH_FLD_A_H12_VAL = 2386; // 72 +const static uint64_t SH_FLD_A_H12_VAL_LEN = 2387; // 72 +const static uint64_t SH_FLD_A_H1AP_AT_LIMIT = 2388; // 144 +const static uint64_t SH_FLD_A_H1ARATIO_VAL = 2389; // 72 +const static uint64_t SH_FLD_A_H1ARATIO_VAL_LEN = 2390; // 72 +const static uint64_t SH_FLD_A_H1CAL_EN = 2391; // 72 +const static uint64_t SH_FLD_A_H1CAL_VAL = 2392; // 72 +const static uint64_t SH_FLD_A_H1CAL_VAL_LEN = 2393; // 72 +const static uint64_t SH_FLD_A_H1E_VAL = 2394; // 120 +const static uint64_t SH_FLD_A_H1E_VAL_LEN = 2395; // 120 +const static uint64_t SH_FLD_A_H1O_VAL = 2396; // 120 +const static uint64_t SH_FLD_A_H1O_VAL_LEN = 2397; // 120 +const static uint64_t SH_FLD_A_H2E_VAL = 2398; // 72 +const static uint64_t SH_FLD_A_H2E_VAL_LEN = 2399; // 72 +const static uint64_t SH_FLD_A_H2O_VAL = 2400; // 72 +const static uint64_t SH_FLD_A_H2O_VAL_LEN = 2401; // 72 +const static uint64_t SH_FLD_A_H3E_VAL = 2402; // 72 +const static uint64_t SH_FLD_A_H3E_VAL_LEN = 2403; // 72 +const static uint64_t SH_FLD_A_H3O_VAL = 2404; // 72 +const static uint64_t SH_FLD_A_H3O_VAL_LEN = 2405; // 72 +const static uint64_t SH_FLD_A_H4E_VAL = 2406; // 72 +const static uint64_t SH_FLD_A_H4E_VAL_LEN = 2407; // 72 +const static uint64_t SH_FLD_A_H4O_VAL = 2408; // 72 +const static uint64_t SH_FLD_A_H4O_VAL_LEN = 2409; // 72 +const static uint64_t SH_FLD_A_H5E_VAL = 2410; // 72 +const static uint64_t SH_FLD_A_H5E_VAL_LEN = 2411; // 72 +const static uint64_t SH_FLD_A_H5O_VAL = 2412; // 72 +const static uint64_t SH_FLD_A_H5O_VAL_LEN = 2413; // 72 +const static uint64_t SH_FLD_A_H6_VAL = 2414; // 72 +const static uint64_t SH_FLD_A_H6_VAL_LEN = 2415; // 72 +const static uint64_t SH_FLD_A_H7_VAL = 2416; // 72 +const static uint64_t SH_FLD_A_H7_VAL_LEN = 2417; // 72 +const static uint64_t SH_FLD_A_H8_VAL = 2418; // 72 +const static uint64_t SH_FLD_A_H8_VAL_LEN = 2419; // 72 +const static uint64_t SH_FLD_A_H9_VAL = 2420; // 72 +const static uint64_t SH_FLD_A_H9_VAL_LEN = 2421; // 72 +const static uint64_t SH_FLD_A_INTEG_COARSE_GAIN = 2422; // 120 +const static uint64_t SH_FLD_A_INTEG_COARSE_GAIN_LEN = 2423; // 120 +const static uint64_t SH_FLD_A_ODD_INTEG_FINE_GAIN = 2424; // 120 +const static uint64_t SH_FLD_A_ODD_INTEG_FINE_GAIN_LEN = 2425; // 120 +const static uint64_t SH_FLD_A_OFFSET_E0 = 2426; // 120 +const static uint64_t SH_FLD_A_OFFSET_E0_LEN = 2427; // 120 +const static uint64_t SH_FLD_A_OFFSET_E1 = 2428; // 120 +const static uint64_t SH_FLD_A_OFFSET_E1_LEN = 2429; // 120 +const static uint64_t SH_FLD_A_OFFSET_O0 = 2430; // 120 +const static uint64_t SH_FLD_A_OFFSET_O0_LEN = 2431; // 120 +const static uint64_t SH_FLD_A_OFFSET_O1 = 2432; // 120 +const static uint64_t SH_FLD_A_OFFSET_O1_LEN = 2433; // 120 +const static uint64_t SH_FLD_A_PATH_OFF_EVEN = 2434; // 144 +const static uint64_t SH_FLD_A_PATH_OFF_EVEN_LEN = 2435; // 144 +const static uint64_t SH_FLD_A_PATH_OFF_ODD = 2436; // 144 +const static uint64_t SH_FLD_A_PATH_OFF_ODD_LEN = 2437; // 144 +const static uint64_t SH_FLD_A_PR_DFE_CLKADJ = 2438; // 120 +const static uint64_t SH_FLD_A_PR_DFE_CLKADJ_LEN = 2439; // 120 +const static uint64_t SH_FLD_B = 2440; // 8 +const static uint64_t SH_FLD_B0_63 = 2441; // 2 +const static uint64_t SH_FLD_B0_63_LEN = 2442; // 2 +const static uint64_t SH_FLD_B64_87 = 2443; // 2 +const static uint64_t SH_FLD_B64_87_LEN = 2444; // 2 +const static uint64_t SH_FLD_BACKUP_SEEPROM_SELECT = 2445; // 1 +const static uint64_t SH_FLD_BAD_ARRAY_ADDRESS_FACES = 2446; // 1 +const static uint64_t SH_FLD_BAD_ARRAY_ADDR_FACES = 2447; // 1 +const static uint64_t SH_FLD_BAD_ARRAY_ADDR_PIB = 2448; // 1 +const static uint64_t SH_FLD_BAD_BLOCK_LOCK = 2449; // 96 +const static uint64_t SH_FLD_BAD_BUS_LANE_ERR_CNTR_DIS_CLR = 2450; // 4 +const static uint64_t SH_FLD_BAD_DESKEW = 2451; // 96 +const static uint64_t SH_FLD_BAD_EYE_OPT_BER = 2452; // 96 +const static uint64_t SH_FLD_BAD_EYE_OPT_DDC = 2453; // 96 +const static uint64_t SH_FLD_BAD_EYE_OPT_HEIGHT = 2454; // 96 +const static uint64_t SH_FLD_BAD_EYE_OPT_WIDTH = 2455; // 96 +const static uint64_t SH_FLD_BAD_LANE1_GCRMSG = 2456; // 4 +const static uint64_t SH_FLD_BAD_LANE1_GCRMSG_LEN = 2457; // 4 +const static uint64_t SH_FLD_BAD_LANE2_GCRMSG = 2458; // 4 +const static uint64_t SH_FLD_BAD_LANE2_GCRMSG_LEN = 2459; // 4 +const static uint64_t SH_FLD_BAD_LANE_CODE_GCRMSG = 2460; // 4 +const static uint64_t SH_FLD_BAD_LANE_CODE_GCRMSG_LEN = 2461; // 4 +const static uint64_t SH_FLD_BAD_SKEW = 2462; // 96 +const static uint64_t SH_FLD_BANDSEL = 2463; // 20 +const static uint64_t SH_FLD_BANDSEL_LEN = 2464; // 20 +const static uint64_t SH_FLD_BANK = 2465; // 24 +const static uint64_t SH_FLD_BANK0_BIT_MAP = 2466; // 8 +const static uint64_t SH_FLD_BANK0_BIT_MAP_LEN = 2467; // 8 +const static uint64_t SH_FLD_BANK1_BIT_MAP = 2468; // 8 +const static uint64_t SH_FLD_BANK1_BIT_MAP_LEN = 2469; // 8 +const static uint64_t SH_FLD_BANK2_BIT_MAP = 2470; // 8 +const static uint64_t SH_FLD_BANK2_BIT_MAP_LEN = 2471; // 8 +const static uint64_t SH_FLD_BANK_GROUP0_BIT_MAP = 2472; // 8 +const static uint64_t SH_FLD_BANK_GROUP0_BIT_MAP_LEN = 2473; // 8 +const static uint64_t SH_FLD_BANK_GROUP1_BIT_MAP = 2474; // 8 +const static uint64_t SH_FLD_BANK_GROUP1_BIT_MAP_LEN = 2475; // 8 +const static uint64_t SH_FLD_BANK_PDWN = 2476; // 48 +const static uint64_t SH_FLD_BANK_PDWN_LEN = 2477; // 48 +const static uint64_t SH_FLD_BANK_SEL_A = 2478; // 48 +const static uint64_t SH_FLD_BAR = 2479; // 6 +const static uint64_t SH_FLD_BAR1_EN = 2480; // 4 +const static uint64_t SH_FLD_BAR1_MS_GROUP_CHIP = 2481; // 2 +const static uint64_t SH_FLD_BAR1_MS_GROUP_CHIP_LEN = 2482; // 2 +const static uint64_t SH_FLD_BAR1_SIZE = 2483; // 2 +const static uint64_t SH_FLD_BAR1_SIZE_LEN = 2484; // 2 +const static uint64_t SH_FLD_BAR1_STARTING_ADDRESS = 2485; // 4 +const static uint64_t SH_FLD_BAR1_STARTING_ADDRESS_LEN = 2486; // 4 +const static uint64_t SH_FLD_BAR1_SYSTEM = 2487; // 2 +const static uint64_t SH_FLD_BAR1_SYSTEM_LEN = 2488; // 2 +const static uint64_t SH_FLD_BARSEL = 2489; // 12 +const static uint64_t SH_FLD_BAR_LEN = 2490; // 6 +const static uint64_t SH_FLD_BAR_PE = 2491; // 13 +const static uint64_t SH_FLD_BAR_PE_MASK = 2492; // 9 +const static uint64_t SH_FLD_BAR_PIB_ON_ERROR1 = 2493; // 1 +const static uint64_t SH_FLD_BAR_PIB_ON_ERROR2 = 2494; // 1 +const static uint64_t SH_FLD_BAR_PIB_ON_ERROR3 = 2495; // 1 +const static uint64_t SH_FLD_BAR_PIB_ON_ERROR4 = 2496; // 1 +const static uint64_t SH_FLD_BAR_PIB_ON_ERROR5 = 2497; // 1 +const static uint64_t SH_FLD_BAR_PIB_ON_ERROR6 = 2498; // 1 +const static uint64_t SH_FLD_BAR_PIB_ON_ERROR7 = 2499; // 1 +const static uint64_t SH_FLD_BASE = 2500; // 26 +const static uint64_t SH_FLD_BASE_ADDR = 2501; // 2 +const static uint64_t SH_FLD_BASE_ADDR_LEN = 2502; // 2 +const static uint64_t SH_FLD_BASE_IDLE_COUNT = 2503; // 8 +const static uint64_t SH_FLD_BASE_IDLE_COUNT_LEN = 2504; // 8 +const static uint64_t SH_FLD_BASE_LEN = 2505; // 26 +const static uint64_t SH_FLD_BASE_UPPER_BITS = 2506; // 1 +const static uint64_t SH_FLD_BASE_UPPER_BITS_LEN = 2507; // 1 +const static uint64_t SH_FLD_BBWR_MASK = 2508; // 3 +const static uint64_t SH_FLD_BBWR_MASK_LEN = 2509; // 3 +const static uint64_t SH_FLD_BCAST_DONE = 2510; // 1 +const static uint64_t SH_FLD_BCDE_CE = 2511; // 1 +const static uint64_t SH_FLD_BCDE_CE_MASK = 2512; // 1 +const static uint64_t SH_FLD_BCDE_OCITRANS = 2513; // 1 +const static uint64_t SH_FLD_BCDE_OCITRANS_LEN = 2514; // 1 +const static uint64_t SH_FLD_BCDE_OCI_DATERR = 2515; // 1 +const static uint64_t SH_FLD_BCDE_OCI_DATERR_MASK = 2516; // 1 +const static uint64_t SH_FLD_BCDE_PB_ACK_DEAD = 2517; // 1 +const static uint64_t SH_FLD_BCDE_PB_ACK_DEAD_MASK = 2518; // 1 +const static uint64_t SH_FLD_BCDE_PB_ADRERR = 2519; // 1 +const static uint64_t SH_FLD_BCDE_PB_ADRERR_MASK = 2520; // 1 +const static uint64_t SH_FLD_BCDE_RDDATATO_ERR = 2521; // 1 +const static uint64_t SH_FLD_BCDE_RDDATATO_ERR_MASK = 2522; // 1 +const static uint64_t SH_FLD_BCDE_SETUP_ERR = 2523; // 1 +const static uint64_t SH_FLD_BCDE_SETUP_ERR_MASK = 2524; // 1 +const static uint64_t SH_FLD_BCDE_SUE_ERR = 2525; // 1 +const static uint64_t SH_FLD_BCDE_SUE_ERR_MASK = 2526; // 1 +const static uint64_t SH_FLD_BCDE_UE_ERR = 2527; // 1 +const static uint64_t SH_FLD_BCDE_UE_ERR_MASK = 2528; // 1 +const static uint64_t SH_FLD_BCESCR_OVERRIDE_EN = 2529; // 12 +const static uint64_t SH_FLD_BCE_BUSY_HIGH = 2530; // 12 +const static uint64_t SH_FLD_BCE_BUSY_LOW = 2531; // 12 +const static uint64_t SH_FLD_BCE_ERROR = 2532; // 12 +const static uint64_t SH_FLD_BCE_TIMEOUT = 2533; // 24 +const static uint64_t SH_FLD_BCUE_OCITRANS = 2534; // 1 +const static uint64_t SH_FLD_BCUE_OCITRANS_LEN = 2535; // 1 +const static uint64_t SH_FLD_BCUE_OCI_DATERR = 2536; // 1 +const static uint64_t SH_FLD_BCUE_OCI_DATERR_MASK = 2537; // 1 +const static uint64_t SH_FLD_BCUE_PB_ACK_DEAD = 2538; // 1 +const static uint64_t SH_FLD_BCUE_PB_ACK_DEAD_MASK = 2539; // 1 +const static uint64_t SH_FLD_BCUE_PB_ADRERR = 2540; // 1 +const static uint64_t SH_FLD_BCUE_PB_ADRERR_MASK = 2541; // 1 +const static uint64_t SH_FLD_BCUE_SETUP_ERR = 2542; // 1 +const static uint64_t SH_FLD_BCUE_SETUP_ERR_MASK = 2543; // 1 +const static uint64_t SH_FLD_BDF = 2544; // 52 +const static uint64_t SH_FLD_BDF2PE_00 = 2545; // 1 +const static uint64_t SH_FLD_BDF2PE_01 = 2546; // 1 +const static uint64_t SH_FLD_BDF2PE_02 = 2547; // 1 +const static uint64_t SH_FLD_BDF2PE_10 = 2548; // 1 +const static uint64_t SH_FLD_BDF2PE_11 = 2549; // 1 +const static uint64_t SH_FLD_BDF2PE_12 = 2550; // 1 +const static uint64_t SH_FLD_BDF2PE_20 = 2551; // 1 +const static uint64_t SH_FLD_BDF2PE_21 = 2552; // 1 +const static uint64_t SH_FLD_BDF2PE_22 = 2553; // 1 +const static uint64_t SH_FLD_BDF2PE_30 = 2554; // 1 +const static uint64_t SH_FLD_BDF2PE_31 = 2555; // 1 +const static uint64_t SH_FLD_BDF2PE_32 = 2556; // 1 +const static uint64_t SH_FLD_BDF2PE_40 = 2557; // 1 +const static uint64_t SH_FLD_BDF2PE_41 = 2558; // 1 +const static uint64_t SH_FLD_BDF2PE_42 = 2559; // 1 +const static uint64_t SH_FLD_BDF2PE_50 = 2560; // 1 +const static uint64_t SH_FLD_BDF2PE_51 = 2561; // 1 +const static uint64_t SH_FLD_BDF2PE_52 = 2562; // 1 +const static uint64_t SH_FLD_BDF_LEN = 2563; // 52 +const static uint64_t SH_FLD_BEAT_NUM = 2564; // 1 +const static uint64_t SH_FLD_BEAT_NUM_ERR = 2565; // 1 +const static uint64_t SH_FLD_BEAT_REC = 2566; // 1 +const static uint64_t SH_FLD_BEAT_REC_ERR = 2567; // 1 +const static uint64_t SH_FLD_BENIGN_PTR_DATA = 2568; // 2 +const static uint64_t SH_FLD_BER_CFG = 2569; // 120 +const static uint64_t SH_FLD_BER_CFG_LEN = 2570; // 120 +const static uint64_t SH_FLD_BER_CLR_COUNT_ON_READ_EN = 2571; // 6 +const static uint64_t SH_FLD_BER_CLR_TIMER_ON_READ_EN = 2572; // 6 +const static uint64_t SH_FLD_BER_COUNT_FREEZE_EN = 2573; // 6 +const static uint64_t SH_FLD_BER_COUNT_SEL = 2574; // 6 +const static uint64_t SH_FLD_BER_COUNT_SEL_LEN = 2575; // 6 +const static uint64_t SH_FLD_BER_DPIPE_MUX_SEL = 2576; // 120 +const static uint64_t SH_FLD_BER_EN = 2577; // 6 +const static uint64_t SH_FLD_BER_TIMEOUT = 2578; // 6 +const static uint64_t SH_FLD_BER_TIMEOUT_LEN = 2579; // 6 +const static uint64_t SH_FLD_BER_TIMER_FREEZE_EN = 2580; // 6 +const static uint64_t SH_FLD_BER_TIMER_SEL = 2581; // 6 +const static uint64_t SH_FLD_BER_TIMER_SEL_LEN = 2582; // 6 +const static uint64_t SH_FLD_BE_ACC_ERROR_0 = 2583; // 2 +const static uint64_t SH_FLD_BE_ACC_ERROR_1 = 2584; // 2 +const static uint64_t SH_FLD_BE_ACC_ERROR_2 = 2585; // 2 +const static uint64_t SH_FLD_BE_ACC_ERROR_3 = 2586; // 2 +const static uint64_t SH_FLD_BE_OV_ERROR_0 = 2587; // 2 +const static uint64_t SH_FLD_BE_OV_ERROR_1 = 2588; // 2 +const static uint64_t SH_FLD_BE_OV_ERROR_2 = 2589; // 2 +const static uint64_t SH_FLD_BE_OV_ERROR_3 = 2590; // 2 +const static uint64_t SH_FLD_BGOFFSET = 2591; // 14 +const static uint64_t SH_FLD_BGOFFSET_LEN = 2592; // 14 +const static uint64_t SH_FLD_BG_SCAN_RATE = 2593; // 2 +const static uint64_t SH_FLD_BG_SCAN_RATE_LEN = 2594; // 2 +const static uint64_t SH_FLD_BHR_DIR_STATE = 2595; // 2 +const static uint64_t SH_FLD_BHR_DIR_STATE_LEN = 2596; // 2 +const static uint64_t SH_FLD_BIG_RSP = 2597; // 1 +const static uint64_t SH_FLD_BIG_STEP = 2598; // 8 +const static uint64_t SH_FLD_BIG_STEP_LEN = 2599; // 8 +const static uint64_t SH_FLD_BISTCLK_EN = 2600; // 6 +const static uint64_t SH_FLD_BISTCLK_EN_LEN = 2601; // 2 +const static uint64_t SH_FLD_BIST_BIT_FAIL_TH = 2602; // 1 +const static uint64_t SH_FLD_BIST_BIT_FAIL_TH_LEN = 2603; // 1 +const static uint64_t SH_FLD_BIST_BUS_DATA_MODE = 2604; // 6 +const static uint64_t SH_FLD_BIST_COMPLETE = 2605; // 1 +const static uint64_t SH_FLD_BIST_CUPLL_LOCK_CHECK_EN = 2606; // 6 +const static uint64_t SH_FLD_BIST_DONE = 2607; // 6 +const static uint64_t SH_FLD_BIST_EN = 2608; // 13 +const static uint64_t SH_FLD_BIST_ENABLE = 2609; // 1 +const static uint64_t SH_FLD_BIST_ERR = 2610; // 96 +const static uint64_t SH_FLD_BIST_ERROR = 2611; // 1 +const static uint64_t SH_FLD_BIST_ERROR_LEN = 2612; // 1 +const static uint64_t SH_FLD_BIST_ERR_A = 2613; // 48 +const static uint64_t SH_FLD_BIST_ERR_B = 2614; // 48 +const static uint64_t SH_FLD_BIST_ERR_E = 2615; // 48 +const static uint64_t SH_FLD_BIST_EXT_START_MODE = 2616; // 6 +const static uint64_t SH_FLD_BIST_EYE_A_WIDTH = 2617; // 6 +const static uint64_t SH_FLD_BIST_EYE_A_WIDTH_LEN = 2618; // 6 +const static uint64_t SH_FLD_BIST_EYE_B_WIDTH = 2619; // 6 +const static uint64_t SH_FLD_BIST_EYE_B_WIDTH_LEN = 2620; // 6 +const static uint64_t SH_FLD_BIST_INIT_DISABLE = 2621; // 6 +const static uint64_t SH_FLD_BIST_INIT_DISABLE_LEN = 2622; // 6 +const static uint64_t SH_FLD_BIST_INIT_DONE = 2623; // 6 +const static uint64_t SH_FLD_BIST_JITTER_PULSE_SEL = 2624; // 4 +const static uint64_t SH_FLD_BIST_JITTER_PULSE_SEL_LEN = 2625; // 4 +const static uint64_t SH_FLD_BIST_LL_ERR = 2626; // 6 +const static uint64_t SH_FLD_BIST_LL_TEST_EN = 2627; // 6 +const static uint64_t SH_FLD_BIST_MIN_EYE_WIDTH = 2628; // 6 +const static uint64_t SH_FLD_BIST_MIN_EYE_WIDTH_LEN = 2629; // 6 +const static uint64_t SH_FLD_BIST_NO_EDGE_DET = 2630; // 6 +const static uint64_t SH_FLD_BIST_PLL_LOCK_TIMEOUT = 2631; // 4 +const static uint64_t SH_FLD_BIST_PLL_LOCK_TIMEOUT_LEN = 2632; // 4 +const static uint64_t SH_FLD_BIST_PRBS_PROP_TIME = 2633; // 6 +const static uint64_t SH_FLD_BIST_PRBS_PROP_TIME_LEN = 2634; // 6 +const static uint64_t SH_FLD_BIST_PRBS_TEST_TIME = 2635; // 6 +const static uint64_t SH_FLD_BIST_PRBS_TEST_TIME_LEN = 2636; // 6 +const static uint64_t SH_FLD_BIST_STORE_EYES_BANK_SEL = 2637; // 6 +const static uint64_t SH_FLD_BIST_STORE_EYES_BANK_SEL_LEN = 2638; // 6 +const static uint64_t SH_FLD_BIST_STORE_EYES_LANE_SEL = 2639; // 6 +const static uint64_t SH_FLD_BIST_STORE_EYES_LANE_SEL_LEN = 2640; // 6 +const static uint64_t SH_FLD_BITS = 2641; // 27 +const static uint64_t SH_FLD_BITSEL = 2642; // 4 +const static uint64_t SH_FLD_BITSEL_LEN = 2643; // 4 +const static uint64_t SH_FLD_BITS_LEN = 2644; // 27 +const static uint64_t SH_FLD_BIT_RATE_DIVISOR = 2645; // 1 +const static uint64_t SH_FLD_BIT_RATE_DIVISOR_0 = 2646; // 3 +const static uint64_t SH_FLD_BIT_RATE_DIVISOR_0_LEN = 2647; // 3 +const static uint64_t SH_FLD_BIT_RATE_DIVISOR_1 = 2648; // 3 +const static uint64_t SH_FLD_BIT_RATE_DIVISOR_1_LEN = 2649; // 3 +const static uint64_t SH_FLD_BIT_RATE_DIVISOR_2 = 2650; // 3 +const static uint64_t SH_FLD_BIT_RATE_DIVISOR_2_LEN = 2651; // 3 +const static uint64_t SH_FLD_BIT_RATE_DIVISOR_3 = 2652; // 3 +const static uint64_t SH_FLD_BIT_RATE_DIVISOR_3_LEN = 2653; // 3 +const static uint64_t SH_FLD_BIT_RATE_DIVISOR_LEN = 2654; // 1 +const static uint64_t SH_FLD_BIT_RATE_DIVISOR_VALUE = 2655; // 1 +const static uint64_t SH_FLD_BIT_RATE_DIVISOR_VALUE_LEN = 2656; // 1 +const static uint64_t SH_FLD_BKINV_INTERLOCK_DIS = 2657; // 1 +const static uint64_t SH_FLD_BLKU_DONE = 2658; // 1 +const static uint64_t SH_FLD_BLOCKID = 2659; // 10 +const static uint64_t SH_FLD_BLOCKID_LEN = 2660; // 10 +const static uint64_t SH_FLD_BLOCKY0 = 2661; // 15 +const static uint64_t SH_FLD_BLOCKY1 = 2662; // 15 +const static uint64_t SH_FLD_BLOCK_FIR_ERR_INJ = 2663; // 24 +const static uint64_t SH_FLD_BLOCK_GROUP_EN = 2664; // 1 +const static uint64_t SH_FLD_BLOCK_MUX_PORT_SEL = 2665; // 2 +const static uint64_t SH_FLD_BLOCK_MUX_PORT_SEL_LEN = 2666; // 2 +const static uint64_t SH_FLD_BLOCK_SEL = 2667; // 2 +const static uint64_t SH_FLD_BLOCK_SEL_LEN = 2668; // 2 +const static uint64_t SH_FLD_BLOCK_TRACK_EN = 2669; // 1 +const static uint64_t SH_FLD_BLOCK_TRACK_RESET_DELAY = 2670; // 1 +const static uint64_t SH_FLD_BLOCK_TRACK_RESET_DELAY_LEN = 2671; // 1 +const static uint64_t SH_FLD_BNDY = 2672; // 43 +const static uint64_t SH_FLD_BOOT_VECTOR_WORD0 = 2673; // 1 +const static uint64_t SH_FLD_BOOT_VECTOR_WORD0_LEN = 2674; // 1 +const static uint64_t SH_FLD_BOOT_VECTOR_WORD1 = 2675; // 1 +const static uint64_t SH_FLD_BOOT_VECTOR_WORD1_LEN = 2676; // 1 +const static uint64_t SH_FLD_BOOT_VECTOR_WORD2 = 2677; // 1 +const static uint64_t SH_FLD_BOOT_VECTOR_WORD2_LEN = 2678; // 1 +const static uint64_t SH_FLD_BOOT_VECTOR_WORD3 = 2679; // 1 +const static uint64_t SH_FLD_BOOT_VECTOR_WORD3_LEN = 2680; // 1 +const static uint64_t SH_FLD_BRAZOS = 2681; // 1 +const static uint64_t SH_FLD_BRICK = 2682; // 16 +const static uint64_t SH_FLD_BRICK_DEBUG_MODE = 2683; // 6 +const static uint64_t SH_FLD_BRICK_ENABLE = 2684; // 6 +const static uint64_t SH_FLD_BRIDGE_ENABLE = 2685; // 1 +const static uint64_t SH_FLD_BRK0 = 2686; // 1 +const static uint64_t SH_FLD_BRK0_CLUSTER = 2687; // 1 +const static uint64_t SH_FLD_BRK0_CLUSTER_LEN = 2688; // 1 +const static uint64_t SH_FLD_BRK1 = 2689; // 1 +const static uint64_t SH_FLD_BRK1_CLUSTER = 2690; // 1 +const static uint64_t SH_FLD_BRK1_CLUSTER_LEN = 2691; // 1 +const static uint64_t SH_FLD_BRK2 = 2692; // 1 +const static uint64_t SH_FLD_BRK2_CLUSTER = 2693; // 1 +const static uint64_t SH_FLD_BRK2_CLUSTER_LEN = 2694; // 1 +const static uint64_t SH_FLD_BRK3 = 2695; // 1 +const static uint64_t SH_FLD_BRK3_CLUSTER = 2696; // 1 +const static uint64_t SH_FLD_BRK3_CLUSTER_LEN = 2697; // 1 +const static uint64_t SH_FLD_BRK4 = 2698; // 1 +const static uint64_t SH_FLD_BRK4_CLUSTER = 2699; // 1 +const static uint64_t SH_FLD_BRK4_CLUSTER_LEN = 2700; // 1 +const static uint64_t SH_FLD_BRK5 = 2701; // 1 +const static uint64_t SH_FLD_BRK5_CLUSTER = 2702; // 1 +const static uint64_t SH_FLD_BRK5_CLUSTER_LEN = 2703; // 1 +const static uint64_t SH_FLD_BROADCAST_SYNC_EN = 2704; // 2 +const static uint64_t SH_FLD_BROADCAST_SYNC_WAIT = 2705; // 2 +const static uint64_t SH_FLD_BROADCAST_SYNC_WAIT_LEN = 2706; // 2 +const static uint64_t SH_FLD_BUF0_REG_DATA0 = 2707; // 2 +const static uint64_t SH_FLD_BUF0_REG_DATA0_LEN = 2708; // 2 +const static uint64_t SH_FLD_BUF1_REG_DATA0 = 2709; // 1 +const static uint64_t SH_FLD_BUF1_REG_DATA0_LEN = 2710; // 1 +const static uint64_t SH_FLD_BUF1_REG_DATA1 = 2711; // 1 +const static uint64_t SH_FLD_BUF1_REG_DATA1_LEN = 2712; // 1 +const static uint64_t SH_FLD_BUFFER = 2713; // 12 +const static uint64_t SH_FLD_BUFFER_OVERRUN = 2714; // 8 +const static uint64_t SH_FLD_BUFFER_STATUS = 2715; // 6 +const static uint64_t SH_FLD_BUFFER_STATUS_LEN = 2716; // 6 +const static uint64_t SH_FLD_BUF_ALLOC_A = 2717; // 4 +const static uint64_t SH_FLD_BUF_ALLOC_B = 2718; // 4 +const static uint64_t SH_FLD_BUF_ALLOC_C = 2719; // 4 +const static uint64_t SH_FLD_BUF_ALLOC_W = 2720; // 4 +const static uint64_t SH_FLD_BUF_INVALIDATE_CTL = 2721; // 4 +const static uint64_t SH_FLD_BURST_WINDOW = 2722; // 8 +const static uint64_t SH_FLD_BURST_WINDOW_LEN = 2723; // 8 +const static uint64_t SH_FLD_BUSY = 2724; // 43 +const static uint64_t SH_FLD_BUSY_COUNTER_THRESHOLD0 = 2725; // 8 +const static uint64_t SH_FLD_BUSY_COUNTER_THRESHOLD0_LEN = 2726; // 8 +const static uint64_t SH_FLD_BUSY_COUNTER_THRESHOLD1 = 2727; // 8 +const static uint64_t SH_FLD_BUSY_COUNTER_THRESHOLD1_LEN = 2728; // 8 +const static uint64_t SH_FLD_BUSY_COUNTER_THRESHOLD2 = 2729; // 8 +const static uint64_t SH_FLD_BUSY_COUNTER_THRESHOLD2_LEN = 2730; // 8 +const static uint64_t SH_FLD_BUSY_COUNTER_THRESHOLD3 = 2731; // 8 +const static uint64_t SH_FLD_BUSY_COUNTER_THRESHOLD3_LEN = 2732; // 8 +const static uint64_t SH_FLD_BUSY_COUNTER_WINDOW_SELECT = 2733; // 8 +const static uint64_t SH_FLD_BUSY_COUNTER_WINDOW_SELECT_LEN = 2734; // 8 +const static uint64_t SH_FLD_BUSY_ENABLE = 2735; // 3 +const static uint64_t SH_FLD_BUSY_RESPONSE_CODE = 2736; // 1 +const static uint64_t SH_FLD_BUSY_RESPONSE_CODE_LEN = 2737; // 1 +const static uint64_t SH_FLD_BUSY_RESPONSE_CODE_NO_1 = 2738; // 1 +const static uint64_t SH_FLD_BUSY_RESPONSE_CODE_NO_1_LEN = 2739; // 1 +const static uint64_t SH_FLD_BUSY_STATUS = 2740; // 1 +const static uint64_t SH_FLD_BUSY_STATUS_LEN = 2741; // 1 +const static uint64_t SH_FLD_BUS_ADDR_NVLD_0 = 2742; // 1 +const static uint64_t SH_FLD_BUS_ADDR_NVLD_1 = 2743; // 1 +const static uint64_t SH_FLD_BUS_ADDR_NVLD_2 = 2744; // 1 +const static uint64_t SH_FLD_BUS_ADDR_NVLD_3 = 2745; // 1 +const static uint64_t SH_FLD_BUS_ADDR_P_ERR_0 = 2746; // 1 +const static uint64_t SH_FLD_BUS_ADDR_P_ERR_1 = 2747; // 1 +const static uint64_t SH_FLD_BUS_ADDR_P_ERR_2 = 2748; // 1 +const static uint64_t SH_FLD_BUS_ADDR_P_ERR_3 = 2749; // 1 +const static uint64_t SH_FLD_BUS_ARBITRATION_LOST_ERROR_0 = 2750; // 1 +const static uint64_t SH_FLD_BUS_ARBITRATION_LOST_ERROR_1 = 2751; // 1 +const static uint64_t SH_FLD_BUS_ARBITRATION_LOST_ERROR_2 = 2752; // 1 +const static uint64_t SH_FLD_BUS_ARBITRATION_LOST_ERROR_3 = 2753; // 1 +const static uint64_t SH_FLD_BUS_BACK_END_ACCESS_ERROR_0 = 2754; // 1 +const static uint64_t SH_FLD_BUS_BACK_END_ACCESS_ERROR_1 = 2755; // 1 +const static uint64_t SH_FLD_BUS_BACK_END_ACCESS_ERROR_2 = 2756; // 1 +const static uint64_t SH_FLD_BUS_BACK_END_ACCESS_ERROR_3 = 2757; // 1 +const static uint64_t SH_FLD_BUS_BACK_END_OVERRUN_ERROR_0 = 2758; // 1 +const static uint64_t SH_FLD_BUS_BACK_END_OVERRUN_ERROR_1 = 2759; // 1 +const static uint64_t SH_FLD_BUS_BACK_END_OVERRUN_ERROR_2 = 2760; // 1 +const static uint64_t SH_FLD_BUS_BACK_END_OVERRUN_ERROR_3 = 2761; // 1 +const static uint64_t SH_FLD_BUS_BUSY_0 = 2762; // 1 +const static uint64_t SH_FLD_BUS_BUSY_1 = 2763; // 1 +const static uint64_t SH_FLD_BUS_BUSY_2 = 2764; // 1 +const static uint64_t SH_FLD_BUS_BUSY_3 = 2765; // 1 +const static uint64_t SH_FLD_BUS_COMMAND_COMPLETE_0 = 2766; // 1 +const static uint64_t SH_FLD_BUS_COMMAND_COMPLETE_1 = 2767; // 1 +const static uint64_t SH_FLD_BUS_COMMAND_COMPLETE_2 = 2768; // 1 +const static uint64_t SH_FLD_BUS_COMMAND_COMPLETE_3 = 2769; // 1 +const static uint64_t SH_FLD_BUS_DATA_REQUEST_0 = 2770; // 1 +const static uint64_t SH_FLD_BUS_DATA_REQUEST_1 = 2771; // 1 +const static uint64_t SH_FLD_BUS_DATA_REQUEST_2 = 2772; // 1 +const static uint64_t SH_FLD_BUS_DATA_REQUEST_3 = 2773; // 1 +const static uint64_t SH_FLD_BUS_FIFO_ENTRY_COUNT_0 = 2774; // 1 +const static uint64_t SH_FLD_BUS_FIFO_ENTRY_COUNT_0_LEN = 2775; // 1 +const static uint64_t SH_FLD_BUS_FIFO_ENTRY_COUNT_1 = 2776; // 1 +const static uint64_t SH_FLD_BUS_FIFO_ENTRY_COUNT_1_LEN = 2777; // 1 +const static uint64_t SH_FLD_BUS_FIFO_ENTRY_COUNT_2 = 2778; // 1 +const static uint64_t SH_FLD_BUS_FIFO_ENTRY_COUNT_2_LEN = 2779; // 1 +const static uint64_t SH_FLD_BUS_FIFO_ENTRY_COUNT_3 = 2780; // 1 +const static uint64_t SH_FLD_BUS_FIFO_ENTRY_COUNT_3_LEN = 2781; // 1 +const static uint64_t SH_FLD_BUS_I2C_INTERFACE_BUSY_0 = 2782; // 1 +const static uint64_t SH_FLD_BUS_I2C_INTERFACE_BUSY_1 = 2783; // 1 +const static uint64_t SH_FLD_BUS_I2C_INTERFACE_BUSY_2 = 2784; // 1 +const static uint64_t SH_FLD_BUS_I2C_INTERFACE_BUSY_3 = 2785; // 1 +const static uint64_t SH_FLD_BUS_I2C_PORT_BUSY_0 = 2786; // 1 +const static uint64_t SH_FLD_BUS_I2C_PORT_BUSY_1 = 2787; // 1 +const static uint64_t SH_FLD_BUS_I2C_PORT_BUSY_2 = 2788; // 1 +const static uint64_t SH_FLD_BUS_I2C_PORT_BUSY_3 = 2789; // 1 +const static uint64_t SH_FLD_BUS_ID = 2790; // 12 +const static uint64_t SH_FLD_BUS_ID_LEN = 2791; // 12 +const static uint64_t SH_FLD_BUS_INVALID_COMMAND_0 = 2792; // 1 +const static uint64_t SH_FLD_BUS_INVALID_COMMAND_1 = 2793; // 1 +const static uint64_t SH_FLD_BUS_INVALID_COMMAND_2 = 2794; // 1 +const static uint64_t SH_FLD_BUS_INVALID_COMMAND_3 = 2795; // 1 +const static uint64_t SH_FLD_BUS_LB_PARITY_ERROR_0 = 2796; // 1 +const static uint64_t SH_FLD_BUS_LB_PARITY_ERROR_1 = 2797; // 1 +const static uint64_t SH_FLD_BUS_LB_PARITY_ERROR_2 = 2798; // 1 +const static uint64_t SH_FLD_BUS_LB_PARITY_ERROR_3 = 2799; // 1 +const static uint64_t SH_FLD_BUS_NACK_RECEIVED_ERROR_0 = 2800; // 1 +const static uint64_t SH_FLD_BUS_NACK_RECEIVED_ERROR_1 = 2801; // 1 +const static uint64_t SH_FLD_BUS_NACK_RECEIVED_ERROR_2 = 2802; // 1 +const static uint64_t SH_FLD_BUS_NACK_RECEIVED_ERROR_3 = 2803; // 1 +const static uint64_t SH_FLD_BUS_PARITY_ERROR_0 = 2804; // 1 +const static uint64_t SH_FLD_BUS_PARITY_ERROR_1 = 2805; // 1 +const static uint64_t SH_FLD_BUS_PARITY_ERROR_2 = 2806; // 1 +const static uint64_t SH_FLD_BUS_PARITY_ERROR_3 = 2807; // 1 +const static uint64_t SH_FLD_BUS_PAR_ERR_0 = 2808; // 1 +const static uint64_t SH_FLD_BUS_PAR_ERR_1 = 2809; // 1 +const static uint64_t SH_FLD_BUS_PAR_ERR_2 = 2810; // 1 +const static uint64_t SH_FLD_BUS_PAR_ERR_3 = 2811; // 1 +const static uint64_t SH_FLD_BUS_READ_NVLD_0 = 2812; // 1 +const static uint64_t SH_FLD_BUS_READ_NVLD_1 = 2813; // 1 +const static uint64_t SH_FLD_BUS_READ_NVLD_2 = 2814; // 1 +const static uint64_t SH_FLD_BUS_READ_NVLD_3 = 2815; // 1 +const static uint64_t SH_FLD_BUS_STOP_ERROR_0 = 2816; // 1 +const static uint64_t SH_FLD_BUS_STOP_ERROR_1 = 2817; // 1 +const static uint64_t SH_FLD_BUS_STOP_ERROR_2 = 2818; // 1 +const static uint64_t SH_FLD_BUS_STOP_ERROR_3 = 2819; // 1 +const static uint64_t SH_FLD_BUS_WIDTH = 2820; // 4 +const static uint64_t SH_FLD_BUS_WIDTH_LEN = 2821; // 4 +const static uint64_t SH_FLD_BUS_WRITE_NVLD_0 = 2822; // 1 +const static uint64_t SH_FLD_BUS_WRITE_NVLD_1 = 2823; // 1 +const static uint64_t SH_FLD_BUS_WRITE_NVLD_2 = 2824; // 1 +const static uint64_t SH_FLD_BUS_WRITE_NVLD_3 = 2825; // 1 +const static uint64_t SH_FLD_BYPASSCLKOUT = 2826; // 3 +const static uint64_t SH_FLD_BYPASSN = 2827; // 10 +const static uint64_t SH_FLD_BYTE0_SEL = 2828; // 8 +const static uint64_t SH_FLD_BYTE0_SEL_LEN = 2829; // 8 +const static uint64_t SH_FLD_BYTE1_SEL = 2830; // 8 +const static uint64_t SH_FLD_BYTE1_SEL_LEN = 2831; // 8 +const static uint64_t SH_FLD_BYTE2_SEL = 2832; // 8 +const static uint64_t SH_FLD_BYTE2_SEL_LEN = 2833; // 8 +const static uint64_t SH_FLD_BYTE3_SEL = 2834; // 8 +const static uint64_t SH_FLD_BYTE3_SEL_LEN = 2835; // 8 +const static uint64_t SH_FLD_B_BAD_DFE_CONV = 2836; // 144 +const static uint64_t SH_FLD_B_BANK_CONTROLS = 2837; // 48 +const static uint64_t SH_FLD_B_BANK_CONTROLS_LEN = 2838; // 48 +const static uint64_t SH_FLD_B_BIST_EN = 2839; // 2 +const static uint64_t SH_FLD_B_CONTROLS = 2840; // 48 +const static uint64_t SH_FLD_B_CONTROLS_LEN = 2841; // 48 +const static uint64_t SH_FLD_B_CTLE_COARSE = 2842; // 48 +const static uint64_t SH_FLD_B_CTLE_COARSE_LEN = 2843; // 48 +const static uint64_t SH_FLD_B_CTLE_GAIN = 2844; // 48 +const static uint64_t SH_FLD_B_CTLE_GAIN_LEN = 2845; // 48 +const static uint64_t SH_FLD_B_EVEN_INTEG_FINE_GAIN = 2846; // 48 +const static uint64_t SH_FLD_B_EVEN_INTEG_FINE_GAIN_LEN = 2847; // 48 +const static uint64_t SH_FLD_B_H1AP_AT_LIMIT = 2848; // 144 +const static uint64_t SH_FLD_B_H1E_VAL = 2849; // 48 +const static uint64_t SH_FLD_B_H1E_VAL_LEN = 2850; // 48 +const static uint64_t SH_FLD_B_H1O_VAL = 2851; // 48 +const static uint64_t SH_FLD_B_H1O_VAL_LEN = 2852; // 48 +const static uint64_t SH_FLD_B_INTEG_COARSE_GAIN = 2853; // 48 +const static uint64_t SH_FLD_B_INTEG_COARSE_GAIN_LEN = 2854; // 48 +const static uint64_t SH_FLD_B_ODD_INTEG_FINE_GAIN = 2855; // 48 +const static uint64_t SH_FLD_B_ODD_INTEG_FINE_GAIN_LEN = 2856; // 48 +const static uint64_t SH_FLD_B_OFFSET_E0 = 2857; // 48 +const static uint64_t SH_FLD_B_OFFSET_E0_LEN = 2858; // 48 +const static uint64_t SH_FLD_B_OFFSET_E1 = 2859; // 48 +const static uint64_t SH_FLD_B_OFFSET_E1_LEN = 2860; // 48 +const static uint64_t SH_FLD_B_OFFSET_O0 = 2861; // 48 +const static uint64_t SH_FLD_B_OFFSET_O0_LEN = 2862; // 48 +const static uint64_t SH_FLD_B_OFFSET_O1 = 2863; // 48 +const static uint64_t SH_FLD_B_OFFSET_O1_LEN = 2864; // 48 +const static uint64_t SH_FLD_B_PATH_OFF_EVEN = 2865; // 48 +const static uint64_t SH_FLD_B_PATH_OFF_EVEN_LEN = 2866; // 48 +const static uint64_t SH_FLD_B_PATH_OFF_ODD = 2867; // 48 +const static uint64_t SH_FLD_B_PATH_OFF_ODD_LEN = 2868; // 48 +const static uint64_t SH_FLD_B_PR_DFE_CLKADJ = 2869; // 48 +const static uint64_t SH_FLD_B_PR_DFE_CLKADJ_LEN = 2870; // 48 +const static uint64_t SH_FLD_C0_HALTED_STOP_OVERRIDE_DISABLE = 2871; // 12 +const static uint64_t SH_FLD_C1_HALTED_STOP_OVERRIDE_DISABLE = 2872; // 12 +const static uint64_t SH_FLD_CACHE_CTRL_ARY_SELECT = 2873; // 3 +const static uint64_t SH_FLD_CACHE_CTRL_ARY_SELECT_LEN = 2874; // 3 +const static uint64_t SH_FLD_CACHE_INHIBITED_HIT_CACHEABLE_ERROR = 2875; // 12 +const static uint64_t SH_FLD_CACHE_RD_CE = 2876; // 12 +const static uint64_t SH_FLD_CACHE_RD_CE_AND_UE = 2877; // 12 +const static uint64_t SH_FLD_CACHE_RD_SUE = 2878; // 12 +const static uint64_t SH_FLD_CACHE_RD_UE = 2879; // 12 +const static uint64_t SH_FLD_CACHE_UE_SUE_DETECTED_ON_MODIFIED_LINE_BY_CO = 2880; // 12 +const static uint64_t SH_FLD_CACHE_UE_SUE_DETECTED_ON_NON_MODIFIED_LINE_BY_CO = 2881; // 12 +const static uint64_t SH_FLD_CAC_ALLOC_DIS = 2882; // 2 +const static uint64_t SH_FLD_CAL0_INVALID_ACCESS = 2883; // 8 +const static uint64_t SH_FLD_CAL0_PE = 2884; // 8 +const static uint64_t SH_FLD_CAL1_INVALID_ACCESS = 2885; // 8 +const static uint64_t SH_FLD_CAL1_PE = 2886; // 8 +const static uint64_t SH_FLD_CAL2_INVALID_ACCESS = 2887; // 8 +const static uint64_t SH_FLD_CAL2_PE = 2888; // 8 +const static uint64_t SH_FLD_CAL3_INVALID_ACCESS = 2889; // 8 +const static uint64_t SH_FLD_CAL3_PE = 2890; // 8 +const static uint64_t SH_FLD_CALRECAL = 2891; // 10 +const static uint64_t SH_FLD_CALREQ = 2892; // 10 +const static uint64_t SH_FLD_CAL_LANE_GCRMSG = 2893; // 4 +const static uint64_t SH_FLD_CAL_LANE_GCRMSG_LEN = 2894; // 4 +const static uint64_t SH_FLD_CAL_LANE_PHY_GCRMSG = 2895; // 6 +const static uint64_t SH_FLD_CAL_LANE_PHY_GCRMSG_LEN = 2896; // 6 +const static uint64_t SH_FLD_CAL_LANE_SEL = 2897; // 188 +const static uint64_t SH_FLD_CAL_LANE_VAL_GCRMSG = 2898; // 4 +const static uint64_t SH_FLD_CAL_SM_1HOT = 2899; // 8 +const static uint64_t SH_FLD_CAM256_MAX_CNT = 2900; // 6 +const static uint64_t SH_FLD_CAM256_MAX_CNT_LEN = 2901; // 6 +const static uint64_t SH_FLD_CAPP_ERROR = 2902; // 9 +const static uint64_t SH_FLD_CAPP_ERROR_MASK = 2903; // 9 +const static uint64_t SH_FLD_CAPSEL = 2904; // 4 +const static uint64_t SH_FLD_CASCADE = 2905; // 5 +const static uint64_t SH_FLD_CASCADE_LEN = 2906; // 5 +const static uint64_t SH_FLD_CC = 2907; // 10 +const static uint64_t SH_FLD_CCALBANDSEL = 2908; // 10 +const static uint64_t SH_FLD_CCALBANDSEL_LEN = 2909; // 10 +const static uint64_t SH_FLD_CCALCOMP = 2910; // 10 +const static uint64_t SH_FLD_CCALCVHOLD = 2911; // 10 +const static uint64_t SH_FLD_CCALERR = 2912; // 10 +const static uint64_t SH_FLD_CCALFMAX = 2913; // 10 +const static uint64_t SH_FLD_CCALFMIN = 2914; // 10 +const static uint64_t SH_FLD_CCALLOAD = 2915; // 10 +const static uint64_t SH_FLD_CCALMETH = 2916; // 10 +const static uint64_t SH_FLD_CCFG_GPTR = 2917; // 43 +const static uint64_t SH_FLD_CCS_ARRAY_CE_ERR_INJ = 2918; // 2 +const static uint64_t SH_FLD_CCS_ARRAY_CE_ERR_INJ_MODE = 2919; // 2 +const static uint64_t SH_FLD_CCS_ARRAY_UE_ERR_INJ = 2920; // 2 +const static uint64_t SH_FLD_CCS_ARRAY_UE_ERR_INJ_MODE = 2921; // 2 +const static uint64_t SH_FLD_CCS_CNTLQ_PE_HOLD_OUT = 2922; // 2 +const static uint64_t SH_FLD_CCS_FSM_INJ_MODE = 2923; // 2 +const static uint64_t SH_FLD_CCS_FSM_INJ_REG = 2924; // 2 +const static uint64_t SH_FLD_CCS_LOOP_COUNTER_COMPARE0 = 2925; // 2 +const static uint64_t SH_FLD_CCS_LOOP_COUNTER_COMPARE0_LEN = 2926; // 2 +const static uint64_t SH_FLD_CCS_LOOP_COUNTER_COMPARE1 = 2927; // 2 +const static uint64_t SH_FLD_CCS_LOOP_COUNTER_COMPARE1_LEN = 2928; // 2 +const static uint64_t SH_FLD_CCS_LOOP_COUNTER_COMPARE2 = 2929; // 2 +const static uint64_t SH_FLD_CCS_LOOP_COUNTER_COMPARE2_LEN = 2930; // 2 +const static uint64_t SH_FLD_CC_CTRL_CHIPLET_IS_ALIGNED_DC = 2931; // 43 +const static uint64_t SH_FLD_CC_CTRL_OPCG_DONE_DC = 2932; // 43 +const static uint64_t SH_FLD_CC_MASK = 2933; // 8 +const static uint64_t SH_FLD_CD_ALL_DONE_GCRMSG = 2934; // 4 +const static uint64_t SH_FLD_CD_PREV_DONE_GCRMSG = 2935; // 4 +const static uint64_t SH_FLD_CE = 2936; // 43 +const static uint64_t SH_FLD_CE1_0_OUT = 2937; // 4 +const static uint64_t SH_FLD_CE1_1_OUT = 2938; // 4 +const static uint64_t SH_FLD_CE1_2_OUT = 2939; // 4 +const static uint64_t SH_FLD_CE1_3_OUT = 2940; // 4 +const static uint64_t SH_FLD_CE1_4_OUT = 2941; // 4 +const static uint64_t SH_FLD_CE1_5_OUT = 2942; // 4 +const static uint64_t SH_FLD_CE1_6_OUT = 2943; // 4 +const static uint64_t SH_FLD_CE1_7_OUT = 2944; // 4 +const static uint64_t SH_FLD_CE2_0_OUT = 2945; // 4 +const static uint64_t SH_FLD_CE2_1_OUT = 2946; // 4 +const static uint64_t SH_FLD_CE2_2_OUT = 2947; // 4 +const static uint64_t SH_FLD_CE2_3_OUT = 2948; // 4 +const static uint64_t SH_FLD_CE2_4_OUT = 2949; // 4 +const static uint64_t SH_FLD_CE2_5_OUT = 2950; // 4 +const static uint64_t SH_FLD_CE2_6_OUT = 2951; // 4 +const static uint64_t SH_FLD_CE2_7_OUT = 2952; // 4 +const static uint64_t SH_FLD_CEC_PSI_INTERRUPT = 2953; // 1 +const static uint64_t SH_FLD_CENTAURP_ENABLE_64B_READ_OPS = 2954; // 4 +const static uint64_t SH_FLD_CENTAURP_ENABLE_BYPASS_CMD = 2955; // 4 +const static uint64_t SH_FLD_CENTAURP_ENABLE_CENTAURP_CMD = 2956; // 4 +const static uint64_t SH_FLD_CENTAURP_ENABLE_CP_ME = 2957; // 4 +const static uint64_t SH_FLD_CENTAURP_ENABLE_CR_SIDEBAND = 2958; // 4 +const static uint64_t SH_FLD_CENTAURP_ENABLE_DTAG_CR = 2959; // 4 +const static uint64_t SH_FLD_CENTAURP_ENABLE_DYNAMIC_WRBUF_ALLOC = 2960; // 4 +const static uint64_t SH_FLD_CENTAURP_ENABLE_ECRESP = 2961; // 4 +const static uint64_t SH_FLD_CENTAURP_ENABLE_NEW_AMO = 2962; // 4 +const static uint64_t SH_FLD_CENTAURP_INBAND_IS_63 = 2963; // 4 +const static uint64_t SH_FLD_CENTAUR_MODE = 2964; // 4 +const static uint64_t SH_FLD_CENTAUR_SYNC_COMMAND_DETECTED = 2965; // 4 +const static uint64_t SH_FLD_CERR_AXFLOW_ERR = 2966; // 1 +const static uint64_t SH_FLD_CERR_AXFLOW_ERR_LEN = 2967; // 1 +const static uint64_t SH_FLD_CERR_AXPUSH_WRERR = 2968; // 1 +const static uint64_t SH_FLD_CERR_AXPUSH_WRERR_LEN = 2969; // 1 +const static uint64_t SH_FLD_CERR_BAR_PARITY_ERR = 2970; // 1 +const static uint64_t SH_FLD_CERR_BCDE_INTERNAL_ERR = 2971; // 1 +const static uint64_t SH_FLD_CERR_BCDE_INTERNAL_ERR_LEN = 2972; // 1 +const static uint64_t SH_FLD_CERR_BCDE_SETUP_ERR = 2973; // 1 +const static uint64_t SH_FLD_CERR_BCDE_SETUP_ERR_LEN = 2974; // 1 +const static uint64_t SH_FLD_CERR_BCUE_INTERNAL_ERR = 2975; // 1 +const static uint64_t SH_FLD_CERR_BCUE_INTERNAL_ERR_LEN = 2976; // 1 +const static uint64_t SH_FLD_CERR_BCUE_OCI_DATAERR = 2977; // 1 +const static uint64_t SH_FLD_CERR_BCUE_OCI_DATAERR_LEN = 2978; // 1 +const static uint64_t SH_FLD_CERR_BCUE_SETUP_ERR = 2979; // 1 +const static uint64_t SH_FLD_CERR_BCUE_SETUP_ERR_LEN = 2980; // 1 +const static uint64_t SH_FLD_CERR_PBDOUT_PARITY_ERR = 2981; // 1 +const static uint64_t SH_FLD_CERR_PB_ACKDEAD_FW_RD = 2982; // 1 +const static uint64_t SH_FLD_CERR_PB_ACKDEAD_FW_RD_LEN = 2983; // 1 +const static uint64_t SH_FLD_CERR_PB_ACKDEAD_FW_WR = 2984; // 1 +const static uint64_t SH_FLD_CERR_PB_ACKDEAD_FW_WR_LEN = 2985; // 1 +const static uint64_t SH_FLD_CERR_PB_BADCRESP = 2986; // 1 +const static uint64_t SH_FLD_CERR_PB_BADCRESP_LEN = 2987; // 1 +const static uint64_t SH_FLD_CERR_PB_OPERTO = 2988; // 1 +const static uint64_t SH_FLD_CERR_PB_OPERTO_LEN = 2989; // 1 +const static uint64_t SH_FLD_CERR_PB_PARITY_ERR = 2990; // 1 +const static uint64_t SH_FLD_CERR_PB_PARITY_ERR_LEN = 2991; // 1 +const static uint64_t SH_FLD_CERR_PB_RDADRERR_FW = 2992; // 1 +const static uint64_t SH_FLD_CERR_PB_RDADRERR_FW_LEN = 2993; // 1 +const static uint64_t SH_FLD_CERR_PB_RDDATATO_FW = 2994; // 1 +const static uint64_t SH_FLD_CERR_PB_RDDATATO_FW_LEN = 2995; // 1 +const static uint64_t SH_FLD_CERR_PB_UNEXPCRESP = 2996; // 1 +const static uint64_t SH_FLD_CERR_PB_UNEXPCRESP_LEN = 2997; // 1 +const static uint64_t SH_FLD_CERR_PB_UNEXPDATA = 2998; // 1 +const static uint64_t SH_FLD_CERR_PB_UNEXPDATA_LEN = 2999; // 1 +const static uint64_t SH_FLD_CERR_PB_WRADRERR_FW = 3000; // 1 +const static uint64_t SH_FLD_CERR_PB_WRADRERR_FW_LEN = 3001; // 1 +const static uint64_t SH_FLD_CERR_SCOMTB_ERR = 3002; // 1 +const static uint64_t SH_FLD_CERR_SLV_INTERNAL_ERR = 3003; // 1 +const static uint64_t SH_FLD_CERR_SLV_INTERNAL_ERR_LEN = 3004; // 1 +const static uint64_t SH_FLD_CERR_SPARE = 3005; // 1 +const static uint64_t SH_FLD_CERR_SPARE_LEN = 3006; // 1 +const static uint64_t SH_FLD_CFG = 3007; // 43 +const static uint64_t SH_FLD_CFG_2N_ADDR = 3008; // 8 +const static uint64_t SH_FLD_CFG_ACT_TO_DIFF_RANK_DLY = 3009; // 8 +const static uint64_t SH_FLD_CFG_ACT_TO_DIFF_RANK_DLY_LEN = 3010; // 8 +const static uint64_t SH_FLD_CFG_ADDRESS_COUNTER = 3011; // 2 +const static uint64_t SH_FLD_CFG_ADDRESS_COUNTER_LEN = 3012; // 2 +const static uint64_t SH_FLD_CFG_ADDR_COUNTER_MODE = 3013; // 2 +const static uint64_t SH_FLD_CFG_ADDR_COUNTER_MODE_LEN = 3014; // 2 +const static uint64_t SH_FLD_CFG_ALL_PERIODIC_LENGTH = 3015; // 8 +const static uint64_t SH_FLD_CFG_ALL_PERIODIC_LENGTH_LEN = 3016; // 8 +const static uint64_t SH_FLD_CFG_ALL_PERIODIC_TB = 3017; // 8 +const static uint64_t SH_FLD_CFG_ALL_PERIODIC_TB_LEN = 3018; // 8 +const static uint64_t SH_FLD_CFG_ALWAYS_WAIT_ACT_TIME = 3019; // 8 +const static uint64_t SH_FLD_CFG_AMAP_BANK0 = 3020; // 2 +const static uint64_t SH_FLD_CFG_AMAP_BANK0_LEN = 3021; // 2 +const static uint64_t SH_FLD_CFG_AMAP_BANK1 = 3022; // 2 +const static uint64_t SH_FLD_CFG_AMAP_BANK1_LEN = 3023; // 2 +const static uint64_t SH_FLD_CFG_AMAP_BANK2 = 3024; // 2 +const static uint64_t SH_FLD_CFG_AMAP_BANK2_LEN = 3025; // 2 +const static uint64_t SH_FLD_CFG_AMAP_BANK_GROUP0 = 3026; // 2 +const static uint64_t SH_FLD_CFG_AMAP_BANK_GROUP0_LEN = 3027; // 2 +const static uint64_t SH_FLD_CFG_AMAP_BANK_GROUP1 = 3028; // 2 +const static uint64_t SH_FLD_CFG_AMAP_BANK_GROUP1_LEN = 3029; // 2 +const static uint64_t SH_FLD_CFG_AMAP_COL2 = 3030; // 2 +const static uint64_t SH_FLD_CFG_AMAP_COL2_LEN = 3031; // 2 +const static uint64_t SH_FLD_CFG_AMAP_COL3 = 3032; // 2 +const static uint64_t SH_FLD_CFG_AMAP_COL3_LEN = 3033; // 2 +const static uint64_t SH_FLD_CFG_AMAP_COL4 = 3034; // 2 +const static uint64_t SH_FLD_CFG_AMAP_COL4_LEN = 3035; // 2 +const static uint64_t SH_FLD_CFG_AMAP_COL5 = 3036; // 2 +const static uint64_t SH_FLD_CFG_AMAP_COL5_LEN = 3037; // 2 +const static uint64_t SH_FLD_CFG_AMAP_COL6 = 3038; // 2 +const static uint64_t SH_FLD_CFG_AMAP_COL6_LEN = 3039; // 2 +const static uint64_t SH_FLD_CFG_AMAP_COL7 = 3040; // 2 +const static uint64_t SH_FLD_CFG_AMAP_COL7_LEN = 3041; // 2 +const static uint64_t SH_FLD_CFG_AMAP_COL8 = 3042; // 2 +const static uint64_t SH_FLD_CFG_AMAP_COL8_LEN = 3043; // 2 +const static uint64_t SH_FLD_CFG_AMAP_COL9 = 3044; // 2 +const static uint64_t SH_FLD_CFG_AMAP_COL9_LEN = 3045; // 2 +const static uint64_t SH_FLD_CFG_AMAP_DIMM_SELECT = 3046; // 2 +const static uint64_t SH_FLD_CFG_AMAP_DIMM_SELECT_LEN = 3047; // 2 +const static uint64_t SH_FLD_CFG_AMAP_MRANK0 = 3048; // 2 +const static uint64_t SH_FLD_CFG_AMAP_MRANK0_LEN = 3049; // 2 +const static uint64_t SH_FLD_CFG_AMAP_MRANK1 = 3050; // 2 +const static uint64_t SH_FLD_CFG_AMAP_MRANK1_LEN = 3051; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW0 = 3052; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW0_LEN = 3053; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW1 = 3054; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW10 = 3055; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW10_LEN = 3056; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW11 = 3057; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW11_LEN = 3058; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW12 = 3059; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW12_LEN = 3060; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW13 = 3061; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW13_LEN = 3062; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW14 = 3063; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW14_LEN = 3064; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW15 = 3065; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW15_LEN = 3066; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW16 = 3067; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW16_LEN = 3068; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW17 = 3069; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW17_LEN = 3070; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW1_LEN = 3071; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW2 = 3072; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW2_LEN = 3073; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW3 = 3074; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW3_LEN = 3075; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW4 = 3076; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW4_LEN = 3077; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW5 = 3078; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW5_LEN = 3079; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW6 = 3080; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW6_LEN = 3081; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW7 = 3082; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW7_LEN = 3083; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW8 = 3084; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW8_LEN = 3085; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW9 = 3086; // 2 +const static uint64_t SH_FLD_CFG_AMAP_ROW9_LEN = 3087; // 2 +const static uint64_t SH_FLD_CFG_AMAP_SRANK0 = 3088; // 2 +const static uint64_t SH_FLD_CFG_AMAP_SRANK0_LEN = 3089; // 2 +const static uint64_t SH_FLD_CFG_AMAP_SRANK1 = 3090; // 2 +const static uint64_t SH_FLD_CFG_AMAP_SRANK1_LEN = 3091; // 2 +const static uint64_t SH_FLD_CFG_AMAP_SRANK2 = 3092; // 2 +const static uint64_t SH_FLD_CFG_AMAP_SRANK2_LEN = 3093; // 2 +const static uint64_t SH_FLD_CFG_ARB_PRIO_PULL = 3094; // 1 +const static uint64_t SH_FLD_CFG_ARB_PRIO_PULL_LEN = 3095; // 1 +const static uint64_t SH_FLD_CFG_ARB_PRIO_PUSH = 3096; // 1 +const static uint64_t SH_FLD_CFG_ARB_PRIO_PUSH_LEN = 3097; // 1 +const static uint64_t SH_FLD_CFG_ARB_PRIO_QUERY = 3098; // 1 +const static uint64_t SH_FLD_CFG_ARB_PRIO_QUERY_LEN = 3099; // 1 +const static uint64_t SH_FLD_CFG_ARB_PRIO_RR = 3100; // 1 +const static uint64_t SH_FLD_CFG_ARB_PRIO_RR_LEN = 3101; // 1 +const static uint64_t SH_FLD_CFG_ARB_PULL_PRIO_HYP = 3102; // 1 +const static uint64_t SH_FLD_CFG_ARB_PULL_PRIO_HYP_LEN = 3103; // 1 +const static uint64_t SH_FLD_CFG_ARB_PUSH_PRIO_HYP = 3104; // 1 +const static uint64_t SH_FLD_CFG_ARB_PUSH_PRIO_HYP_LEN = 3105; // 1 +const static uint64_t SH_FLD_CFG_AUTOPC_THRESHOLD = 3106; // 8 +const static uint64_t SH_FLD_CFG_AUTOPC_THRESHOLD_LEN = 3107; // 8 +const static uint64_t SH_FLD_CFG_BANK_BUSY_FSM_DIS = 3108; // 8 +const static uint64_t SH_FLD_CFG_BANK_BUSY_FSM_DIS_LEN = 3109; // 8 +const static uint64_t SH_FLD_CFG_BANK_BUSY_OPEN_PAGE_DIS = 3110; // 8 +const static uint64_t SH_FLD_CFG_BANK_BUSY_OPEN_PAGE_DIS_LEN = 3111; // 8 +const static uint64_t SH_FLD_CFG_BC4_EN = 3112; // 2 +const static uint64_t SH_FLD_CFG_BW_SNAPSHOT = 3113; // 8 +const static uint64_t SH_FLD_CFG_BW_SNAPSHOT_LEN = 3114; // 8 +const static uint64_t SH_FLD_CFG_C0 = 3115; // 1 +const static uint64_t SH_FLD_CFG_C0_L2_PB_ARB_RATE_SEL = 3116; // 12 +const static uint64_t SH_FLD_CFG_C0_L2_PB_ARB_RATE_SEL_LEN = 3117; // 12 +const static uint64_t SH_FLD_CFG_C0_LEN = 3118; // 1 +const static uint64_t SH_FLD_CFG_C1 = 3119; // 1 +const static uint64_t SH_FLD_CFG_C10 = 3120; // 1 +const static uint64_t SH_FLD_CFG_C10_LEN = 3121; // 1 +const static uint64_t SH_FLD_CFG_C11 = 3122; // 1 +const static uint64_t SH_FLD_CFG_C11_LEN = 3123; // 1 +const static uint64_t SH_FLD_CFG_C1_L2_PB_ARB_RATE_SEL = 3124; // 12 +const static uint64_t SH_FLD_CFG_C1_L2_PB_ARB_RATE_SEL_LEN = 3125; // 12 +const static uint64_t SH_FLD_CFG_C1_LEN = 3126; // 1 +const static uint64_t SH_FLD_CFG_C2 = 3127; // 1 +const static uint64_t SH_FLD_CFG_C2_LEN = 3128; // 1 +const static uint64_t SH_FLD_CFG_C3 = 3129; // 1 +const static uint64_t SH_FLD_CFG_C3_LEN = 3130; // 1 +const static uint64_t SH_FLD_CFG_C4 = 3131; // 1 +const static uint64_t SH_FLD_CFG_C4_LEN = 3132; // 1 +const static uint64_t SH_FLD_CFG_C5 = 3133; // 1 +const static uint64_t SH_FLD_CFG_C5_LEN = 3134; // 1 +const static uint64_t SH_FLD_CFG_C6 = 3135; // 1 +const static uint64_t SH_FLD_CFG_C6_LEN = 3136; // 1 +const static uint64_t SH_FLD_CFG_C7 = 3137; // 1 +const static uint64_t SH_FLD_CFG_C7_LEN = 3138; // 1 +const static uint64_t SH_FLD_CFG_C8 = 3139; // 1 +const static uint64_t SH_FLD_CFG_C8_LEN = 3140; // 1 +const static uint64_t SH_FLD_CFG_C9 = 3141; // 1 +const static uint64_t SH_FLD_CFG_C9_LEN = 3142; // 1 +const static uint64_t SH_FLD_CFG_CAC_ERR_REPAIR_EN = 3143; // 12 +const static uint64_t SH_FLD_CFG_CAL_INTERVAL_TMR0_ENABLE = 3144; // 8 +const static uint64_t SH_FLD_CFG_CAL_INTERVAL_TMR1_ENABLE = 3145; // 8 +const static uint64_t SH_FLD_CFG_CAL_INTERVAL_TMR2_ENABLE = 3146; // 8 +const static uint64_t SH_FLD_CFG_CAL_RANK_ENABLE = 3147; // 8 +const static uint64_t SH_FLD_CFG_CAL_RANK_ENABLE_LEN = 3148; // 8 +const static uint64_t SH_FLD_CFG_CAL_SINGLE_PORT_MODE = 3149; // 8 +const static uint64_t SH_FLD_CFG_CAL_SINGLE_PORT_MODE_LEN = 3150; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_CAL1_DDR_DONE = 3151; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_CAL1_ENABLE = 3152; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_CAL1_TYPE = 3153; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_CAL1_TYPE_LEN = 3154; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_CAL2_DDR_DONE = 3155; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_CAL2_ENABLE = 3156; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_CAL2_TYPE = 3157; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_CAL2_TYPE_LEN = 3158; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_CAL3_DDR_DONE = 3159; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_CAL3_ENABLE = 3160; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_CAL3_TYPE = 3161; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_CAL3_TYPE_LEN = 3162; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_DDR_RESET_ENABLE = 3163; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_DDR_RESET_TMR = 3164; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_DDR_RESET_TMR_LEN = 3165; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_DDR_RESET_TMR_TB = 3166; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_DDR_RESET_TMR_TB_LEN = 3167; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_SINGLE_RANK = 3168; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_Z_SYNC = 3169; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR0_Z_SYNC_LEN = 3170; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR1_CAL1_DDR_DONE = 3171; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR1_CAL1_ENABLE = 3172; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR1_CAL1_TYPE = 3173; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR1_CAL1_TYPE_LEN = 3174; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR1_CAL2_DDR_DONE = 3175; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR1_CAL2_ENABLE = 3176; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR1_CAL2_TYPE = 3177; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR1_CAL2_TYPE_LEN = 3178; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR1_CAL3_DDR_DONE = 3179; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR1_CAL3_ENABLE = 3180; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR1_CAL3_TYPE = 3181; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR1_CAL3_TYPE_LEN = 3182; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR1_SINGLE_RANK = 3183; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR1_Z_SYNC = 3184; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR1_Z_SYNC_LEN = 3185; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR2_CAL1_DDR_DONE = 3186; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR2_CAL1_ENABLE = 3187; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR2_CAL1_TYPE = 3188; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR2_CAL1_TYPE_LEN = 3189; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR2_CAL2_DDR_DONE = 3190; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR2_CAL2_ENABLE = 3191; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR2_CAL2_TYPE = 3192; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR2_CAL2_TYPE_LEN = 3193; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR2_CAL3_DDR_DONE = 3194; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR2_CAL3_ENABLE = 3195; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR2_CAL3_TYPE = 3196; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR2_CAL3_TYPE_LEN = 3197; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR2_SINGLE_RANK = 3198; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR2_WAT_EVENT_ENABLE = 3199; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR2_Z_SYNC = 3200; // 8 +const static uint64_t SH_FLD_CFG_CAL_TMR2_Z_SYNC_LEN = 3201; // 8 +const static uint64_t SH_FLD_CFG_CCS_ADDR_MUX_SEL = 3202; // 8 +const static uint64_t SH_FLD_CFG_CCS_INST_RESET_ENABLE = 3203; // 8 +const static uint64_t SH_FLD_CFG_CKE_PUP_STATE = 3204; // 8 +const static uint64_t SH_FLD_CFG_CKE_PUP_STATE_LEN = 3205; // 8 +const static uint64_t SH_FLD_CFG_CMD_TIMEOUT_MODE = 3206; // 2 +const static uint64_t SH_FLD_CFG_CMD_TIMEOUT_MODE_LEN = 3207; // 2 +const static uint64_t SH_FLD_CFG_CO_SOFT_PURGE_ALL_LINES_EN = 3208; // 12 +const static uint64_t SH_FLD_CFG_CO_SOFT_PURGE_ME_SX_EN = 3209; // 12 +const static uint64_t SH_FLD_CFG_CURRENT_ADDR_TRAP = 3210; // 2 +const static uint64_t SH_FLD_CFG_CURRENT_ADDR_TRAP_LEN = 3211; // 2 +const static uint64_t SH_FLD_CFG_CURRENT_ADDR_TRAP_UPDATE_DIS = 3212; // 2 +const static uint64_t SH_FLD_CFG_CURRENT_PORT_DIMM_TRAP = 3213; // 2 +const static uint64_t SH_FLD_CFG_CURRENT_PORT_DIMM_TRAP_LEN = 3214; // 2 +const static uint64_t SH_FLD_CFG_DATA_ROT = 3215; // 2 +const static uint64_t SH_FLD_CFG_DATA_ROT_LEN = 3216; // 2 +const static uint64_t SH_FLD_CFG_DATA_ROT_SEED = 3217; // 4 +const static uint64_t SH_FLD_CFG_DATA_ROT_SEED_LEN = 3218; // 4 +const static uint64_t SH_FLD_CFG_DATA_SEED_MODE = 3219; // 2 +const static uint64_t SH_FLD_CFG_DATA_SEED_MODE_LEN = 3220; // 2 +const static uint64_t SH_FLD_CFG_DCACHE_CAPP_LPC_EN = 3221; // 12 +const static uint64_t SH_FLD_CFG_DCBZ_TRASHMODE_EN = 3222; // 12 +const static uint64_t SH_FLD_CFG_DDR4E_BLIND_STEER_MODE = 3223; // 2 +const static uint64_t SH_FLD_CFG_DDR4_PARITY_ON_CID_DIS = 3224; // 8 +const static uint64_t SH_FLD_CFG_DDR_DPHY_NCLK = 3225; // 8 +const static uint64_t SH_FLD_CFG_DDR_DPHY_NCLK_LEN = 3226; // 8 +const static uint64_t SH_FLD_CFG_DDR_DPHY_PCLK = 3227; // 8 +const static uint64_t SH_FLD_CFG_DDR_DPHY_PCLK_LEN = 3228; // 8 +const static uint64_t SH_FLD_CFG_DDR_RESETN = 3229; // 8 +const static uint64_t SH_FLD_CFG_DGEN_FIXED_MODE = 3230; // 2 +const static uint64_t SH_FLD_CFG_DISABLE_CL_ATOMIC_LOCK = 3231; // 43 +const static uint64_t SH_FLD_CFG_DISABLE_FAST_PATH = 3232; // 8 +const static uint64_t SH_FLD_CFG_DISABLE_FORCE_TO_ZERO = 3233; // 43 +const static uint64_t SH_FLD_CFG_DISABLE_HEARTBEAT = 3234; // 43 +const static uint64_t SH_FLD_CFG_DISABLE_MALF_PULSE_GEN = 3235; // 43 +const static uint64_t SH_FLD_CFG_DISABLE_PERV_THOLD_CHECK = 3236; // 43 +const static uint64_t SH_FLD_CFG_DISABLE_RCD_RECOVERY = 3237; // 8 +const static uint64_t SH_FLD_CFG_DISABLE_RD_PG_MODE = 3238; // 8 +const static uint64_t SH_FLD_CFG_DISABLE_REFRESH_DURING_NOISE_WDW = 3239; // 8 +const static uint64_t SH_FLD_CFG_DISABLE_WR_PG_MODE = 3240; // 8 +const static uint64_t SH_FLD_CFG_DIS_CLK_IN_STR = 3241; // 8 +const static uint64_t SH_FLD_CFG_DIS_SMDR = 3242; // 8 +const static uint64_t SH_FLD_CFG_DONE_IACK_PRIO_HYP = 3243; // 1 +const static uint64_t SH_FLD_CFG_DONE_IACK_PRIO_HYP_LEN = 3244; // 1 +const static uint64_t SH_FLD_CFG_DONE_PARSE_IACK_RR_SEL = 3245; // 1 +const static uint64_t SH_FLD_CFG_DONE_PARSE_IACK_RR_SEL_LEN = 3246; // 1 +const static uint64_t SH_FLD_CFG_DONE_PARSE_PULL_RR_SEL = 3247; // 1 +const static uint64_t SH_FLD_CFG_DONE_PARSE_PULL_RR_SEL_LEN = 3248; // 1 +const static uint64_t SH_FLD_CFG_DONE_PRIO_IACK = 3249; // 1 +const static uint64_t SH_FLD_CFG_DONE_PRIO_IACK_LEN = 3250; // 1 +const static uint64_t SH_FLD_CFG_DONE_PULL_PRIO_HYP = 3251; // 1 +const static uint64_t SH_FLD_CFG_DONE_PULL_PRIO_HYP_LEN = 3252; // 1 +const static uint64_t SH_FLD_CFG_DQS_ALIGNMENT_LENGTH = 3253; // 8 +const static uint64_t SH_FLD_CFG_DQS_ALIGNMENT_LENGTH_LEN = 3254; // 8 +const static uint64_t SH_FLD_CFG_DQS_ALIGNMENT_TB = 3255; // 8 +const static uint64_t SH_FLD_CFG_DQS_ALIGNMENT_TB_LEN = 3256; // 8 +const static uint64_t SH_FLD_CFG_ECCCK_CE_UE_SUE_ERR_DET_DIS = 3257; // 12 +const static uint64_t SH_FLD_CFG_ECCCK_UE_SUE_DET_DIS = 3258; // 12 +const static uint64_t SH_FLD_CFG_EMER_MIN_MAX_DOMAIN = 3259; // 8 +const static uint64_t SH_FLD_CFG_EMER_MIN_MAX_DOMAIN_LEN = 3260; // 8 +const static uint64_t SH_FLD_CFG_ENABLE_RCD_RW_RETRY = 3261; // 8 +const static uint64_t SH_FLD_CFG_END_ADDR_0 = 3262; // 2 +const static uint64_t SH_FLD_CFG_END_ADDR_0_LEN = 3263; // 2 +const static uint64_t SH_FLD_CFG_END_ADDR_1 = 3264; // 2 +const static uint64_t SH_FLD_CFG_END_ADDR_1_LEN = 3265; // 2 +const static uint64_t SH_FLD_CFG_END_ADDR_2 = 3266; // 2 +const static uint64_t SH_FLD_CFG_END_ADDR_2_LEN = 3267; // 2 +const static uint64_t SH_FLD_CFG_END_ADDR_3 = 3268; // 2 +const static uint64_t SH_FLD_CFG_END_ADDR_3_LEN = 3269; // 2 +const static uint64_t SH_FLD_CFG_ENTER_STR_TIME = 3270; // 8 +const static uint64_t SH_FLD_CFG_ENTER_STR_TIME_LEN = 3271; // 8 +const static uint64_t SH_FLD_CFG_ENTRY0_MIN_FOR_RRQ_IDLE_WR = 3272; // 8 +const static uint64_t SH_FLD_CFG_ENTRY0_MIN_FOR_RRQ_IDLE_WR_LEN = 3273; // 8 +const static uint64_t SH_FLD_CFG_EN_RANDCMD_GAP = 3274; // 2 +const static uint64_t SH_FLD_CFG_EXTERNAL_ZQ_LENGTH = 3275; // 8 +const static uint64_t SH_FLD_CFG_EXTERNAL_ZQ_LENGTH_LEN = 3276; // 8 +const static uint64_t SH_FLD_CFG_EXTERNAL_ZQ_TB = 3277; // 8 +const static uint64_t SH_FLD_CFG_EXTERNAL_ZQ_TB_LEN = 3278; // 8 +const static uint64_t SH_FLD_CFG_FIXED_SEED = 3279; // 16 +const static uint64_t SH_FLD_CFG_FIXED_SEED1 = 3280; // 2 +const static uint64_t SH_FLD_CFG_FIXED_SEED1_LEN = 3281; // 2 +const static uint64_t SH_FLD_CFG_FIXED_SEED2 = 3282; // 2 +const static uint64_t SH_FLD_CFG_FIXED_SEED2_LEN = 3283; // 2 +const static uint64_t SH_FLD_CFG_FIXED_SEED3 = 3284; // 2 +const static uint64_t SH_FLD_CFG_FIXED_SEED3_LEN = 3285; // 2 +const static uint64_t SH_FLD_CFG_FIXED_SEED4 = 3286; // 2 +const static uint64_t SH_FLD_CFG_FIXED_SEED4_LEN = 3287; // 2 +const static uint64_t SH_FLD_CFG_FIXED_SEED5 = 3288; // 2 +const static uint64_t SH_FLD_CFG_FIXED_SEED5_LEN = 3289; // 2 +const static uint64_t SH_FLD_CFG_FIXED_SEED6 = 3290; // 2 +const static uint64_t SH_FLD_CFG_FIXED_SEED6_LEN = 3291; // 2 +const static uint64_t SH_FLD_CFG_FIXED_SEED7 = 3292; // 2 +const static uint64_t SH_FLD_CFG_FIXED_SEED7_LEN = 3293; // 2 +const static uint64_t SH_FLD_CFG_FIXED_SEED8 = 3294; // 2 +const static uint64_t SH_FLD_CFG_FIXED_SEED8_LEN = 3295; // 2 +const static uint64_t SH_FLD_CFG_FIXED_SEED_LEN = 3296; // 16 +const static uint64_t SH_FLD_CFG_FIXED_WIDTH = 3297; // 2 +const static uint64_t SH_FLD_CFG_FIXED_WIDTH_LEN = 3298; // 2 +const static uint64_t SH_FLD_CFG_FORCE_MCLK_LOW_N = 3299; // 8 +const static uint64_t SH_FLD_CFG_FORCE_SPARE_PUP = 3300; // 8 +const static uint64_t SH_FLD_CFG_FREEZE_ON_PARITY_ERROR_DIS = 3301; // 8 +const static uint64_t SH_FLD_CFG_GP_BIT_3_ENABLE = 3302; // 8 +const static uint64_t SH_FLD_CFG_HASH_L3_ADDR_EN = 3303; // 12 +const static uint64_t SH_FLD_CFG_HW_TRIG_LINEDEL_LDDISP_CE_EN = 3304; // 12 +const static uint64_t SH_FLD_CFG_IGNORE_RCD_PARITY_ERR = 3305; // 8 +const static uint64_t SH_FLD_CFG_INJECT_PARITY_ERR_ADDR5 = 3306; // 8 +const static uint64_t SH_FLD_CFG_INJECT_PARITY_ERR_CONSTANT = 3307; // 8 +const static uint64_t SH_FLD_CFG_INJECT_PARITY_ERR_WEN = 3308; // 8 +const static uint64_t SH_FLD_CFG_INJ_CANCEL_ACK_ERR = 3309; // 8 +const static uint64_t SH_FLD_CFG_INTERNAL_ZQ_LENGTH = 3310; // 8 +const static uint64_t SH_FLD_CFG_INTERNAL_ZQ_LENGTH_LEN = 3311; // 8 +const static uint64_t SH_FLD_CFG_INTERNAL_ZQ_TB = 3312; // 8 +const static uint64_t SH_FLD_CFG_INTERNAL_ZQ_TB_LEN = 3313; // 8 +const static uint64_t SH_FLD_CFG_INTERVAL_COUNTER_TMR0 = 3314; // 8 +const static uint64_t SH_FLD_CFG_INTERVAL_COUNTER_TMR0_LEN = 3315; // 8 +const static uint64_t SH_FLD_CFG_INTERVAL_COUNTER_TMR1 = 3316; // 8 +const static uint64_t SH_FLD_CFG_INTERVAL_COUNTER_TMR1_LEN = 3317; // 8 +const static uint64_t SH_FLD_CFG_INTERVAL_COUNTER_TMR2 = 3318; // 8 +const static uint64_t SH_FLD_CFG_INTERVAL_COUNTER_TMR2_LEN = 3319; // 8 +const static uint64_t SH_FLD_CFG_INVERT_DATA = 3320; // 2 +const static uint64_t SH_FLD_CFG_L3_DIS = 3321; // 12 +const static uint64_t SH_FLD_CFG_LDST_PRIO_RSP_LD = 3322; // 1 +const static uint64_t SH_FLD_CFG_LDST_PRIO_RSP_LD_LEN = 3323; // 1 +const static uint64_t SH_FLD_CFG_LDST_PRIO_SET_LD = 3324; // 1 +const static uint64_t SH_FLD_CFG_LDST_PRIO_SET_LD_LEN = 3325; // 1 +const static uint64_t SH_FLD_CFG_LFSR_MASK_A0 = 3326; // 2 +const static uint64_t SH_FLD_CFG_LFSR_MASK_A0_LEN = 3327; // 2 +const static uint64_t SH_FLD_CFG_LINEDEL_ON_CAC_UE_EN = 3328; // 12 +const static uint64_t SH_FLD_CFG_LOG_COUNTS_IN_TRACE = 3329; // 2 +const static uint64_t SH_FLD_CFG_LP_SUB_CNT = 3330; // 8 +const static uint64_t SH_FLD_CFG_LP_SUB_CNT_LEN = 3331; // 8 +const static uint64_t SH_FLD_CFG_LRU_DIRECT_MAP = 3332; // 12 +const static uint64_t SH_FLD_CFG_MAINT_ADDR_MODE_EN = 3333; // 2 +const static uint64_t SH_FLD_CFG_MAINT_BROADCAST_MODE_EN = 3334; // 2 +const static uint64_t SH_FLD_CFG_MAINT_DETECT_SRANK_BOUNDARIES = 3335; // 2 +const static uint64_t SH_FLD_CFG_MAINT_RCE_WITH_CE = 3336; // 2 +const static uint64_t SH_FLD_CFG_MAX = 3337; // 1 +const static uint64_t SH_FLD_CFG_MAX_LEN = 3338; // 1 +const static uint64_t SH_FLD_CFG_MAX_READS_IN_A_ROW = 3339; // 8 +const static uint64_t SH_FLD_CFG_MAX_READS_IN_A_ROW_LEN = 3340; // 8 +const static uint64_t SH_FLD_CFG_MAX_WRITES_IN_A_ROW = 3341; // 8 +const static uint64_t SH_FLD_CFG_MAX_WRITES_IN_A_ROW_LEN = 3342; // 8 +const static uint64_t SH_FLD_CFG_MCB_LEN64 = 3343; // 2 +const static uint64_t SH_FLD_CFG_MCB_NIB_CNT_PORT_AGNOSTIC_MASK_DIS = 3344; // 2 +const static uint64_t SH_FLD_CFG_MCB_NIB_CNT_PORT_AGNOSTIC_MASK_DIS_LEN = 3345; // 2 +const static uint64_t SH_FLD_CFG_MCE_HARD_SYMBOL_COUNT_ENABLE = 3346; // 2 +const static uint64_t SH_FLD_CFG_MCE_INTER_SYMBOL_COUNT_ENABLE = 3347; // 2 +const static uint64_t SH_FLD_CFG_MCE_SOFT_SYMBOL_COUNT_ENABLE = 3348; // 2 +const static uint64_t SH_FLD_CFG_MIN_CMD_GAP = 3349; // 2 +const static uint64_t SH_FLD_CFG_MIN_CMD_GAP_BLIND_STEER = 3350; // 2 +const static uint64_t SH_FLD_CFG_MIN_CMD_GAP_BLIND_STEER_LEN = 3351; // 2 +const static uint64_t SH_FLD_CFG_MIN_CMD_GAP_LEN = 3352; // 2 +const static uint64_t SH_FLD_CFG_MIN_DOMAIN_REDUCTION_CNT_REFR_INT = 3353; // 8 +const static uint64_t SH_FLD_CFG_MIN_DOMAIN_REDUCTION_ENABLE = 3354; // 8 +const static uint64_t SH_FLD_CFG_MIN_DOMAIN_REDUCTION_TIME = 3355; // 8 +const static uint64_t SH_FLD_CFG_MIN_DOMAIN_REDUCTION_TIME_LEN = 3356; // 8 +const static uint64_t SH_FLD_CFG_MIN_GAP_TIMEBASE = 3357; // 2 +const static uint64_t SH_FLD_CFG_MIN_GAP_TIMEBASE_BLIND_STEER = 3358; // 2 +const static uint64_t SH_FLD_CFG_MIN_MAX_DOMAINS = 3359; // 8 +const static uint64_t SH_FLD_CFG_MIN_MAX_DOMAINS_ENABLE = 3360; // 8 +const static uint64_t SH_FLD_CFG_MIN_MAX_DOMAINS_LEN = 3361; // 8 +const static uint64_t SH_FLD_CFG_MISR_BLOCK = 3362; // 8 +const static uint64_t SH_FLD_CFG_MISR_BLOCK_LEN = 3363; // 8 +const static uint64_t SH_FLD_CFG_MISR_FEEDBACK_ENABLE = 3364; // 8 +const static uint64_t SH_FLD_CFG_MPR_READEYE_LENGTH = 3365; // 8 +const static uint64_t SH_FLD_CFG_MPR_READEYE_LENGTH_LEN = 3366; // 8 +const static uint64_t SH_FLD_CFG_MPR_READEYE_TB = 3367; // 8 +const static uint64_t SH_FLD_CFG_MPR_READEYE_TB_LEN = 3368; // 8 +const static uint64_t SH_FLD_CFG_NCE_HARD_SYMBOL_COUNT_ENABLE = 3369; // 2 +const static uint64_t SH_FLD_CFG_NCE_INTER_SYMBOL_COUNT_ENABLE = 3370; // 2 +const static uint64_t SH_FLD_CFG_NCE_SOFT_SYMBOL_COUNT_ENABLE = 3371; // 2 +const static uint64_t SH_FLD_CFG_NM_CAS_WEIGHT = 3372; // 8 +const static uint64_t SH_FLD_CFG_NM_CAS_WEIGHT_LEN = 3373; // 8 +const static uint64_t SH_FLD_CFG_NM_CHANGE_AFTER_SYNC = 3374; // 8 +const static uint64_t SH_FLD_CFG_NM_M = 3375; // 8 +const static uint64_t SH_FLD_CFG_NM_M_LEN = 3376; // 8 +const static uint64_t SH_FLD_CFG_NM_N_PER_PORT = 3377; // 8 +const static uint64_t SH_FLD_CFG_NM_N_PER_PORT_LEN = 3378; // 8 +const static uint64_t SH_FLD_CFG_NM_N_PER_SLOT = 3379; // 8 +const static uint64_t SH_FLD_CFG_NM_N_PER_SLOT_LEN = 3380; // 8 +const static uint64_t SH_FLD_CFG_NM_RAS_WEIGHT = 3381; // 8 +const static uint64_t SH_FLD_CFG_NM_RAS_WEIGHT_LEN = 3382; // 8 +const static uint64_t SH_FLD_CFG_NOISE_WAIT_TIME = 3383; // 8 +const static uint64_t SH_FLD_CFG_NOISE_WAIT_TIME_LEN = 3384; // 8 +const static uint64_t SH_FLD_CFG_OCC_DEADMAN_TIMER_SEL = 3385; // 8 +const static uint64_t SH_FLD_CFG_OCC_DEADMAN_TIMER_SEL_LEN = 3386; // 8 +const static uint64_t SH_FLD_CFG_OE_ALL_CKE_POWERED_DOWN = 3387; // 8 +const static uint64_t SH_FLD_CFG_OE_ALWAYS_ON = 3388; // 8 +const static uint64_t SH_FLD_CFG_OPT_RD_SIZE = 3389; // 8 +const static uint64_t SH_FLD_CFG_OPT_RD_SIZE_LEN = 3390; // 8 +const static uint64_t SH_FLD_CFG_PARITY_AFTER_CMD = 3391; // 10 +const static uint64_t SH_FLD_CFG_PARITY_DETECT_TIME = 3392; // 8 +const static uint64_t SH_FLD_CFG_PARITY_DETECT_TIME_LEN = 3393; // 8 +const static uint64_t SH_FLD_CFG_PARSE_PULL_RR_SEL = 3394; // 1 +const static uint64_t SH_FLD_CFG_PARSE_PULL_RR_SEL_LEN = 3395; // 1 +const static uint64_t SH_FLD_CFG_PARSE_PUSH_RR_SEL = 3396; // 1 +const static uint64_t SH_FLD_CFG_PARSE_PUSH_RR_SEL_LEN = 3397; // 1 +const static uint64_t SH_FLD_CFG_PARSE_QUERY_RR_SEL = 3398; // 1 +const static uint64_t SH_FLD_CFG_PARSE_QUERY_RR_SEL_LEN = 3399; // 1 +const static uint64_t SH_FLD_CFG_PAUSE_MCB_ERROR = 3400; // 2 +const static uint64_t SH_FLD_CFG_PAUSE_MCB_LOG_FULL = 3401; // 2 +const static uint64_t SH_FLD_CFG_PAUSE_ON_AUE = 3402; // 2 +const static uint64_t SH_FLD_CFG_PAUSE_ON_ERROR_MODE = 3403; // 2 +const static uint64_t SH_FLD_CFG_PAUSE_ON_ERROR_MODE_LEN = 3404; // 2 +const static uint64_t SH_FLD_CFG_PAUSE_ON_MCE = 3405; // 2 +const static uint64_t SH_FLD_CFG_PAUSE_ON_MPE = 3406; // 2 +const static uint64_t SH_FLD_CFG_PAUSE_ON_RCD = 3407; // 2 +const static uint64_t SH_FLD_CFG_PAUSE_ON_SCE = 3408; // 2 +const static uint64_t SH_FLD_CFG_PAUSE_ON_SUE = 3409; // 2 +const static uint64_t SH_FLD_CFG_PAUSE_ON_UE = 3410; // 2 +const static uint64_t SH_FLD_CFG_PCMD_PRIO_DONE = 3411; // 1 +const static uint64_t SH_FLD_CFG_PCMD_PRIO_DONE_LEN = 3412; // 1 +const static uint64_t SH_FLD_CFG_PCMD_PRIO_LDST_RSP = 3413; // 1 +const static uint64_t SH_FLD_CFG_PCMD_PRIO_LDST_RSP_LEN = 3414; // 1 +const static uint64_t SH_FLD_CFG_PCMD_PRIO_LDST_SET = 3415; // 1 +const static uint64_t SH_FLD_CFG_PCMD_PRIO_LDST_SET_LEN = 3416; // 1 +const static uint64_t SH_FLD_CFG_PCMD_PRIO_RR = 3417; // 1 +const static uint64_t SH_FLD_CFG_PCMD_PRIO_RR_LEN = 3418; // 1 +const static uint64_t SH_FLD_CFG_PDN_PUP = 3419; // 8 +const static uint64_t SH_FLD_CFG_PDN_PUP_LEN = 3420; // 8 +const static uint64_t SH_FLD_CFG_PERFMON_INFO_SRC_ED_SEL = 3421; // 12 +const static uint64_t SH_FLD_CFG_PER_BANK_REFRESH = 3422; // 8 +const static uint64_t SH_FLD_CFG_PM_DISABLE = 3423; // 43 +const static uint64_t SH_FLD_CFG_PM_MUX_DISABLE = 3424; // 43 +const static uint64_t SH_FLD_CFG_PRECHARGE_WAIT_TIME = 3425; // 8 +const static uint64_t SH_FLD_CFG_PRECHARGE_WAIT_TIME_LEN = 3426; // 8 +const static uint64_t SH_FLD_CFG_PRIO_LSI = 3427; // 1 +const static uint64_t SH_FLD_CFG_PRIO_LSI_LEN = 3428; // 1 +const static uint64_t SH_FLD_CFG_PRIO_MMIO = 3429; // 1 +const static uint64_t SH_FLD_CFG_PRIO_MMIO_LEN = 3430; // 1 +const static uint64_t SH_FLD_CFG_PRIO_PULL = 3431; // 1 +const static uint64_t SH_FLD_CFG_PRIO_PULL_LEN = 3432; // 1 +const static uint64_t SH_FLD_CFG_PRIO_PUSH_ARX = 3433; // 1 +const static uint64_t SH_FLD_CFG_PRIO_PUSH_ARX_LEN = 3434; // 1 +const static uint64_t SH_FLD_CFG_PRIO_PUSH_LCL = 3435; // 1 +const static uint64_t SH_FLD_CFG_PRIO_PUSH_LCL_LEN = 3436; // 1 +const static uint64_t SH_FLD_CFG_PRIO_RR = 3437; // 2 +const static uint64_t SH_FLD_CFG_PRIO_RR_LEN = 3438; // 2 +const static uint64_t SH_FLD_CFG_PRIO_RSVD = 3439; // 1 +const static uint64_t SH_FLD_CFG_PRIO_RSVD_LEN = 3440; // 1 +const static uint64_t SH_FLD_CFG_PRIO_VRQ_REQ = 3441; // 1 +const static uint64_t SH_FLD_CFG_PRIO_VRQ_REQ_LEN = 3442; // 1 +const static uint64_t SH_FLD_CFG_PRIO_VRQ_RSP = 3443; // 1 +const static uint64_t SH_FLD_CFG_PRIO_VRQ_RSP_LEN = 3444; // 1 +const static uint64_t SH_FLD_CFG_PULL_RSVD = 3445; // 1 +const static uint64_t SH_FLD_CFG_PULL_RSVD_LEN = 3446; // 1 +const static uint64_t SH_FLD_CFG_PUMP = 3447; // 1 +const static uint64_t SH_FLD_CFG_PUMP_MODE = 3448; // 1 +const static uint64_t SH_FLD_CFG_PUP_AFTER_ACTIVATE_WAIT_ENABLE = 3449; // 8 +const static uint64_t SH_FLD_CFG_PUP_AFTER_ACTIVATE_WAIT_TIME = 3450; // 8 +const static uint64_t SH_FLD_CFG_PUP_AFTER_ACTIVATE_WAIT_TIME_LEN = 3451; // 8 +const static uint64_t SH_FLD_CFG_PUP_ALL_WRITES_PENDING = 3452; // 8 +const static uint64_t SH_FLD_CFG_PUP_AVAIL = 3453; // 8 +const static uint64_t SH_FLD_CFG_PUP_AVAIL_LEN = 3454; // 8 +const static uint64_t SH_FLD_CFG_PUP_PDN = 3455; // 8 +const static uint64_t SH_FLD_CFG_PUP_PDN_LEN = 3456; // 8 +const static uint64_t SH_FLD_CFG_PUSH_ARX_RSVD = 3457; // 1 +const static uint64_t SH_FLD_CFG_PUSH_ARX_RSVD_LEN = 3458; // 1 +const static uint64_t SH_FLD_CFG_QUEUE_ECC_CORR_EN = 3459; // 1 +const static uint64_t SH_FLD_CFG_QUEUE_SIZE_PULL = 3460; // 1 +const static uint64_t SH_FLD_CFG_QUEUE_SIZE_PULL_LEN = 3461; // 1 +const static uint64_t SH_FLD_CFG_QUEUE_SIZE_PUSH_LCL = 3462; // 1 +const static uint64_t SH_FLD_CFG_QUEUE_SIZE_PUSH_LCL_LEN = 3463; // 1 +const static uint64_t SH_FLD_CFG_Q_BIT_TID_MASK = 3464; // 12 +const static uint64_t SH_FLD_CFG_Q_BIT_TID_MASK_LEN = 3465; // 12 +const static uint64_t SH_FLD_CFG_RANDCMD_WGT = 3466; // 2 +const static uint64_t SH_FLD_CFG_RANDCMD_WGT_LEN = 3467; // 2 +const static uint64_t SH_FLD_CFG_RANDGAP_WGT = 3468; // 2 +const static uint64_t SH_FLD_CFG_RANDGAP_WGT_LEN = 3469; // 2 +const static uint64_t SH_FLD_CFG_RANDOM_EN = 3470; // 12 +const static uint64_t SH_FLD_CFG_RANK0_RD_ODT = 3471; // 8 +const static uint64_t SH_FLD_CFG_RANK0_RD_ODT_LEN = 3472; // 8 +const static uint64_t SH_FLD_CFG_RANK0_WR_ODT = 3473; // 8 +const static uint64_t SH_FLD_CFG_RANK0_WR_ODT_LEN = 3474; // 8 +const static uint64_t SH_FLD_CFG_RANK1_RD_ODT = 3475; // 8 +const static uint64_t SH_FLD_CFG_RANK1_RD_ODT_LEN = 3476; // 8 +const static uint64_t SH_FLD_CFG_RANK1_WR_ODT = 3477; // 8 +const static uint64_t SH_FLD_CFG_RANK1_WR_ODT_LEN = 3478; // 8 +const static uint64_t SH_FLD_CFG_RANK2_RD_ODT = 3479; // 8 +const static uint64_t SH_FLD_CFG_RANK2_RD_ODT_LEN = 3480; // 8 +const static uint64_t SH_FLD_CFG_RANK2_WR_ODT = 3481; // 8 +const static uint64_t SH_FLD_CFG_RANK2_WR_ODT_LEN = 3482; // 8 +const static uint64_t SH_FLD_CFG_RANK3_RD_ODT = 3483; // 8 +const static uint64_t SH_FLD_CFG_RANK3_RD_ODT_LEN = 3484; // 8 +const static uint64_t SH_FLD_CFG_RANK3_WR_ODT = 3485; // 8 +const static uint64_t SH_FLD_CFG_RANK3_WR_ODT_LEN = 3486; // 8 +const static uint64_t SH_FLD_CFG_RANK4_RD_ODT = 3487; // 8 +const static uint64_t SH_FLD_CFG_RANK4_RD_ODT_LEN = 3488; // 8 +const static uint64_t SH_FLD_CFG_RANK4_WR_ODT = 3489; // 8 +const static uint64_t SH_FLD_CFG_RANK4_WR_ODT_LEN = 3490; // 8 +const static uint64_t SH_FLD_CFG_RANK5_RD_ODT = 3491; // 8 +const static uint64_t SH_FLD_CFG_RANK5_RD_ODT_LEN = 3492; // 8 +const static uint64_t SH_FLD_CFG_RANK5_WR_ODT = 3493; // 8 +const static uint64_t SH_FLD_CFG_RANK5_WR_ODT_LEN = 3494; // 8 +const static uint64_t SH_FLD_CFG_RANK6_RD_ODT = 3495; // 8 +const static uint64_t SH_FLD_CFG_RANK6_RD_ODT_LEN = 3496; // 8 +const static uint64_t SH_FLD_CFG_RANK6_WR_ODT = 3497; // 8 +const static uint64_t SH_FLD_CFG_RANK6_WR_ODT_LEN = 3498; // 8 +const static uint64_t SH_FLD_CFG_RANK7_RD_ODT = 3499; // 8 +const static uint64_t SH_FLD_CFG_RANK7_RD_ODT_LEN = 3500; // 8 +const static uint64_t SH_FLD_CFG_RANK7_WR_ODT = 3501; // 8 +const static uint64_t SH_FLD_CFG_RANK7_WR_ODT_LEN = 3502; // 8 +const static uint64_t SH_FLD_CFG_RCD_PROTECTION_TIME = 3503; // 8 +const static uint64_t SH_FLD_CFG_RCD_PROTECTION_TIME_LEN = 3504; // 8 +const static uint64_t SH_FLD_CFG_RC_FRC_DISP_EQ_NTM_INIG_SI_TO_RCR_EN = 3505; // 12 +const static uint64_t SH_FLD_CFG_RD2PRE = 3506; // 8 +const static uint64_t SH_FLD_CFG_RD2PRE_LEN = 3507; // 8 +const static uint64_t SH_FLD_CFG_RDBUFF_CAPACITY_LIMIT = 3508; // 8 +const static uint64_t SH_FLD_CFG_RDBUFF_CAPACITY_LIMIT_LEN = 3509; // 8 +const static uint64_t SH_FLD_CFG_RDCLK_SYSCLK_LENGTH = 3510; // 8 +const static uint64_t SH_FLD_CFG_RDCLK_SYSCLK_LENGTH_LEN = 3511; // 8 +const static uint64_t SH_FLD_CFG_RDCLK_SYSCLK_TB = 3512; // 8 +const static uint64_t SH_FLD_CFG_RDCLK_SYSCLK_TB_LEN = 3513; // 8 +const static uint64_t SH_FLD_CFG_RDTAG_DLY = 3514; // 8 +const static uint64_t SH_FLD_CFG_RDTAG_DLY_LEN = 3515; // 8 +const static uint64_t SH_FLD_CFG_RDTAG_MBX_CYCLE = 3516; // 8 +const static uint64_t SH_FLD_CFG_RD_IDLE_ALLOW_WR = 3517; // 8 +const static uint64_t SH_FLD_CFG_RD_IDLE_ALLOW_WR_LEN = 3518; // 8 +const static uint64_t SH_FLD_CFG_REFRESH_ENABLE = 3519; // 8 +const static uint64_t SH_FLD_CFG_REFRESH_HP_RANK_BLOCK_ENABLE = 3520; // 8 +const static uint64_t SH_FLD_CFG_REFRESH_INTERVAL = 3521; // 8 +const static uint64_t SH_FLD_CFG_REFRESH_INTERVAL_LEN = 3522; // 8 +const static uint64_t SH_FLD_CFG_REFRESH_INTERVAL_TIMEBASE_SELECT = 3523; // 8 +const static uint64_t SH_FLD_CFG_REFRESH_INTERVAL_TIMEBASE_SELECT_LEN = 3524; // 8 +const static uint64_t SH_FLD_CFG_REFRESH_PRIORITY_THRESHOLD = 3525; // 8 +const static uint64_t SH_FLD_CFG_REFRESH_PRIORITY_THRESHOLD_LEN = 3526; // 8 +const static uint64_t SH_FLD_CFG_REFRESH_RESET_INTERVAL = 3527; // 8 +const static uint64_t SH_FLD_CFG_REFRESH_RESET_INTERVAL_LEN = 3528; // 8 +const static uint64_t SH_FLD_CFG_REFR_CHECK_INTERVAL = 3529; // 8 +const static uint64_t SH_FLD_CFG_REFR_CHECK_INTERVAL_LEN = 3530; // 8 +const static uint64_t SH_FLD_CFG_REFR_TSV_STACK = 3531; // 8 +const static uint64_t SH_FLD_CFG_REFR_TSV_STACK_LEN = 3532; // 8 +const static uint64_t SH_FLD_CFG_REF_BLOCK_STOP_DLY = 3533; // 8 +const static uint64_t SH_FLD_CFG_REF_BLOCK_STOP_DLY_LEN = 3534; // 8 +const static uint64_t SH_FLD_CFG_RESET_CNTS_START_OF_RANK = 3535; // 2 +const static uint64_t SH_FLD_CFG_RMWBUFF_CAPACITY_LIMIT = 3536; // 8 +const static uint64_t SH_FLD_CFG_RMWBUFF_CAPACITY_LIMIT_LEN = 3537; // 8 +const static uint64_t SH_FLD_CFG_RODT_BC4_END_DLY = 3538; // 8 +const static uint64_t SH_FLD_CFG_RODT_BC4_END_DLY_LEN = 3539; // 8 +const static uint64_t SH_FLD_CFG_RODT_END_DLY = 3540; // 8 +const static uint64_t SH_FLD_CFG_RODT_END_DLY_LEN = 3541; // 8 +const static uint64_t SH_FLD_CFG_RODT_START_DLY = 3542; // 8 +const static uint64_t SH_FLD_CFG_RODT_START_DLY_LEN = 3543; // 8 +const static uint64_t SH_FLD_CFG_RQ_HANG_THRESHOLD = 3544; // 8 +const static uint64_t SH_FLD_CFG_RQ_HANG_THRESHOLD_LEN = 3545; // 8 +const static uint64_t SH_FLD_CFG_RRQ_ACT_NUM_READS_PENDING = 3546; // 8 +const static uint64_t SH_FLD_CFG_RRQ_ACT_NUM_READS_PENDING_LEN = 3547; // 8 +const static uint64_t SH_FLD_CFG_RRQ_DEPTH = 3548; // 8 +const static uint64_t SH_FLD_CFG_RRQ_DEPTH_LEN = 3549; // 8 +const static uint64_t SH_FLD_CFG_RRQ_FIFO_MODE = 3550; // 8 +const static uint64_t SH_FLD_CFG_RRQ_SINGLE_THREAD_MODE = 3551; // 8 +const static uint64_t SH_FLD_CFG_RRQ_SKIP_LIMIT = 3552; // 8 +const static uint64_t SH_FLD_CFG_RRQ_SKIP_LIMIT_LEN = 3553; // 8 +const static uint64_t SH_FLD_CFG_RSV0 = 3554; // 8 +const static uint64_t SH_FLD_CFG_RSV0_LEN = 3555; // 8 +const static uint64_t SH_FLD_CFG_RUNTIME_CTR = 3556; // 2 +const static uint64_t SH_FLD_CFG_RUNTIME_CTR_LEN = 3557; // 2 +const static uint64_t SH_FLD_CFG_RUNTIME_MCBALL = 3558; // 2 +const static uint64_t SH_FLD_CFG_RUNTIME_OVERHEAD = 3559; // 2 +const static uint64_t SH_FLD_CFG_RUNTIME_SUBTEST = 3560; // 2 +const static uint64_t SH_FLD_CFG_RUNTIME_SUBTEST_LEN = 3561; // 2 +const static uint64_t SH_FLD_CFG_SAFE_REFRESH_INTERVAL = 3562; // 8 +const static uint64_t SH_FLD_CFG_SAFE_REFRESH_INTERVAL_LEN = 3563; // 8 +const static uint64_t SH_FLD_CFG_SIM_FAST_NOISE_WINDOW = 3564; // 8 +const static uint64_t SH_FLD_CFG_SINGLE_MEM = 3565; // 12 +const static uint64_t SH_FLD_CFG_SINGLE_MEM_EN = 3566; // 12 +const static uint64_t SH_FLD_CFG_SINGLE_MEM_LEN = 3567; // 12 +const static uint64_t SH_FLD_CFG_SLOT0_S0_CID = 3568; // 8 +const static uint64_t SH_FLD_CFG_SLOT0_S0_CID_LEN = 3569; // 8 +const static uint64_t SH_FLD_CFG_SLOT0_S1_CID = 3570; // 8 +const static uint64_t SH_FLD_CFG_SLOT0_S1_CID_LEN = 3571; // 8 +const static uint64_t SH_FLD_CFG_SLOT0_S2_CID = 3572; // 8 +const static uint64_t SH_FLD_CFG_SLOT0_S2_CID_LEN = 3573; // 8 +const static uint64_t SH_FLD_CFG_SLOT0_S3_CID = 3574; // 8 +const static uint64_t SH_FLD_CFG_SLOT0_S3_CID_LEN = 3575; // 8 +const static uint64_t SH_FLD_CFG_SLOT0_S4_CID = 3576; // 8 +const static uint64_t SH_FLD_CFG_SLOT0_S4_CID_LEN = 3577; // 8 +const static uint64_t SH_FLD_CFG_SLOT0_S5_CID = 3578; // 8 +const static uint64_t SH_FLD_CFG_SLOT0_S5_CID_LEN = 3579; // 8 +const static uint64_t SH_FLD_CFG_SLOT0_S6_CID = 3580; // 8 +const static uint64_t SH_FLD_CFG_SLOT0_S6_CID_LEN = 3581; // 8 +const static uint64_t SH_FLD_CFG_SLOT0_S7_CID = 3582; // 8 +const static uint64_t SH_FLD_CFG_SLOT0_S7_CID_LEN = 3583; // 8 +const static uint64_t SH_FLD_CFG_SLOT1_S0_CID = 3584; // 8 +const static uint64_t SH_FLD_CFG_SLOT1_S0_CID_LEN = 3585; // 8 +const static uint64_t SH_FLD_CFG_SLOT1_S1_CID = 3586; // 8 +const static uint64_t SH_FLD_CFG_SLOT1_S1_CID_LEN = 3587; // 8 +const static uint64_t SH_FLD_CFG_SLOT1_S2_CID = 3588; // 8 +const static uint64_t SH_FLD_CFG_SLOT1_S2_CID_LEN = 3589; // 8 +const static uint64_t SH_FLD_CFG_SLOT1_S3_CID = 3590; // 8 +const static uint64_t SH_FLD_CFG_SLOT1_S3_CID_LEN = 3591; // 8 +const static uint64_t SH_FLD_CFG_SLOT1_S4_CID = 3592; // 8 +const static uint64_t SH_FLD_CFG_SLOT1_S4_CID_LEN = 3593; // 8 +const static uint64_t SH_FLD_CFG_SLOT1_S5_CID = 3594; // 8 +const static uint64_t SH_FLD_CFG_SLOT1_S5_CID_LEN = 3595; // 8 +const static uint64_t SH_FLD_CFG_SLOT1_S6_CID = 3596; // 8 +const static uint64_t SH_FLD_CFG_SLOT1_S6_CID_LEN = 3597; // 8 +const static uint64_t SH_FLD_CFG_SLOT1_S7_CID = 3598; // 8 +const static uint64_t SH_FLD_CFG_SLOT1_S7_CID_LEN = 3599; // 8 +const static uint64_t SH_FLD_CFG_STALL = 3600; // 1 +const static uint64_t SH_FLD_CFG_START_ADDR_0 = 3601; // 2 +const static uint64_t SH_FLD_CFG_START_ADDR_0_LEN = 3602; // 2 +const static uint64_t SH_FLD_CFG_START_ADDR_1 = 3603; // 2 +const static uint64_t SH_FLD_CFG_START_ADDR_1_LEN = 3604; // 2 +const static uint64_t SH_FLD_CFG_START_ADDR_2 = 3605; // 2 +const static uint64_t SH_FLD_CFG_START_ADDR_2_LEN = 3606; // 2 +const static uint64_t SH_FLD_CFG_START_ADDR_3 = 3607; // 2 +const static uint64_t SH_FLD_CFG_START_ADDR_3_LEN = 3608; // 2 +const static uint64_t SH_FLD_CFG_STATIC_IDLE_DLY = 3609; // 8 +const static uint64_t SH_FLD_CFG_STATIC_IDLE_DLY_LEN = 3610; // 8 +const static uint64_t SH_FLD_CFG_STOP_HANG_CNT_SYS_XSTP = 3611; // 43 +const static uint64_t SH_FLD_CFG_STQ_PF_EN = 3612; // 12 +const static uint64_t SH_FLD_CFG_STR_ENABLE = 3613; // 8 +const static uint64_t SH_FLD_CFG_STR_STATE = 3614; // 8 +const static uint64_t SH_FLD_CFG_SYMBOL_COUNTER_MODE = 3615; // 2 +const static uint64_t SH_FLD_CFG_SYMBOL_COUNTER_MODE_LEN = 3616; // 2 +const static uint64_t SH_FLD_CFG_SYSMAP_SM_NOT_LG_SEL = 3617; // 12 +const static uint64_t SH_FLD_CFG_TCKESR = 3618; // 8 +const static uint64_t SH_FLD_CFG_TCKESR_LEN = 3619; // 8 +const static uint64_t SH_FLD_CFG_TCKSRE = 3620; // 8 +const static uint64_t SH_FLD_CFG_TCKSRE_LEN = 3621; // 8 +const static uint64_t SH_FLD_CFG_TCKSRX = 3622; // 8 +const static uint64_t SH_FLD_CFG_TCKSRX_LEN = 3623; // 8 +const static uint64_t SH_FLD_CFG_TFAW = 3624; // 8 +const static uint64_t SH_FLD_CFG_TFAW_LEN = 3625; // 8 +const static uint64_t SH_FLD_CFG_THRESH_MAG_ICE = 3626; // 2 +const static uint64_t SH_FLD_CFG_THRESH_MAG_ICE_LEN = 3627; // 2 +const static uint64_t SH_FLD_CFG_THRESH_MAG_MCE_HARD = 3628; // 2 +const static uint64_t SH_FLD_CFG_THRESH_MAG_MCE_HARD_LEN = 3629; // 2 +const static uint64_t SH_FLD_CFG_THRESH_MAG_MCE_INT = 3630; // 2 +const static uint64_t SH_FLD_CFG_THRESH_MAG_MCE_INT_LEN = 3631; // 2 +const static uint64_t SH_FLD_CFG_THRESH_MAG_MCE_SOFT = 3632; // 2 +const static uint64_t SH_FLD_CFG_THRESH_MAG_MCE_SOFT_LEN = 3633; // 2 +const static uint64_t SH_FLD_CFG_THRESH_MAG_NCE_HARD = 3634; // 2 +const static uint64_t SH_FLD_CFG_THRESH_MAG_NCE_HARD_LEN = 3635; // 2 +const static uint64_t SH_FLD_CFG_THRESH_MAG_NCE_INT = 3636; // 2 +const static uint64_t SH_FLD_CFG_THRESH_MAG_NCE_INT_LEN = 3637; // 2 +const static uint64_t SH_FLD_CFG_THRESH_MAG_NCE_SOFT = 3638; // 2 +const static uint64_t SH_FLD_CFG_THRESH_MAG_NCE_SOFT_LEN = 3639; // 2 +const static uint64_t SH_FLD_CFG_THRESH_MAG_RCE = 3640; // 2 +const static uint64_t SH_FLD_CFG_THRESH_MAG_RCE_LEN = 3641; // 2 +const static uint64_t SH_FLD_CFG_TIME_BASE_TMR0 = 3642; // 8 +const static uint64_t SH_FLD_CFG_TIME_BASE_TMR0_LEN = 3643; // 8 +const static uint64_t SH_FLD_CFG_TIME_BASE_TMR1 = 3644; // 8 +const static uint64_t SH_FLD_CFG_TIME_BASE_TMR1_LEN = 3645; // 8 +const static uint64_t SH_FLD_CFG_TIME_BASE_TMR2 = 3646; // 8 +const static uint64_t SH_FLD_CFG_TIME_BASE_TMR2_LEN = 3647; // 8 +const static uint64_t SH_FLD_CFG_TRAS = 3648; // 8 +const static uint64_t SH_FLD_CFG_TRAS_LEN = 3649; // 8 +const static uint64_t SH_FLD_CFG_TRCD = 3650; // 8 +const static uint64_t SH_FLD_CFG_TRCD_LEN = 3651; // 8 +const static uint64_t SH_FLD_CFG_TRFC = 3652; // 8 +const static uint64_t SH_FLD_CFG_TRFC_COUNTER_DIS = 3653; // 8 +const static uint64_t SH_FLD_CFG_TRFC_COUNTER_DIS_LEN = 3654; // 8 +const static uint64_t SH_FLD_CFG_TRFC_LEN = 3655; // 8 +const static uint64_t SH_FLD_CFG_TRFC_STACK_GATE_ALL_REF = 3656; // 8 +const static uint64_t SH_FLD_CFG_TRP = 3657; // 8 +const static uint64_t SH_FLD_CFG_TRP_LEN = 3658; // 8 +const static uint64_t SH_FLD_CFG_TXSDLL = 3659; // 8 +const static uint64_t SH_FLD_CFG_TXSDLL_LEN = 3660; // 8 +const static uint64_t SH_FLD_CFG_VPC_PULL_LMIT = 3661; // 1 +const static uint64_t SH_FLD_CFG_VPC_PULL_LMIT_LEN = 3662; // 1 +const static uint64_t SH_FLD_CFG_VPC_PUSH_ARX_LMIT = 3663; // 1 +const static uint64_t SH_FLD_CFG_VPC_PUSH_ARX_LMIT_LEN = 3664; // 1 +const static uint64_t SH_FLD_CFG_VPC_PUSH_LCL_LMIT = 3665; // 1 +const static uint64_t SH_FLD_CFG_VPC_PUSH_LCL_LMIT_LEN = 3666; // 1 +const static uint64_t SH_FLD_CFG_VPC_PUSH_LCL_RSVD = 3667; // 1 +const static uint64_t SH_FLD_CFG_VPC_PUSH_LCL_RSVD_LEN = 3668; // 1 +const static uint64_t SH_FLD_CFG_WDF_SERIAL_SEQ_MODE = 3669; // 8 +const static uint64_t SH_FLD_CFG_WODT_BC4_END_DLY = 3670; // 8 +const static uint64_t SH_FLD_CFG_WODT_BC4_END_DLY_LEN = 3671; // 8 +const static uint64_t SH_FLD_CFG_WODT_END_DLY = 3672; // 8 +const static uint64_t SH_FLD_CFG_WODT_END_DLY_LEN = 3673; // 8 +const static uint64_t SH_FLD_CFG_WODT_START_DLY = 3674; // 8 +const static uint64_t SH_FLD_CFG_WODT_START_DLY_LEN = 3675; // 8 +const static uint64_t SH_FLD_CFG_WR2PRE = 3676; // 8 +const static uint64_t SH_FLD_CFG_WR2PRE_LEN = 3677; // 8 +const static uint64_t SH_FLD_CFG_WRDATA_DLY = 3678; // 8 +const static uint64_t SH_FLD_CFG_WRDATA_DLY_LEN = 3679; // 8 +const static uint64_t SH_FLD_CFG_WRDONE_DLY = 3680; // 8 +const static uint64_t SH_FLD_CFG_WRDONE_DLY_LEN = 3681; // 8 +const static uint64_t SH_FLD_CFG_WRITE_HW_MARK = 3682; // 8 +const static uint64_t SH_FLD_CFG_WRITE_HW_MARK_LEN = 3683; // 8 +const static uint64_t SH_FLD_CFG_WRITE_LW_MARK = 3684; // 8 +const static uint64_t SH_FLD_CFG_WRITE_LW_MARK_LEN = 3685; // 8 +const static uint64_t SH_FLD_CFG_WRITE_MODE_ECC_CHK_DIS = 3686; // 16 +const static uint64_t SH_FLD_CFG_WRITE_MODE_ECC_COR_DIS = 3687; // 16 +const static uint64_t SH_FLD_CFG_WRQ_ACT_NUM_WRITES_PENDING = 3688; // 8 +const static uint64_t SH_FLD_CFG_WRQ_ACT_NUM_WRITES_PENDING_LEN = 3689; // 8 +const static uint64_t SH_FLD_CFG_WRQ_DEPTH = 3690; // 8 +const static uint64_t SH_FLD_CFG_WRQ_DEPTH_LEN = 3691; // 8 +const static uint64_t SH_FLD_CFG_WRQ_ENABLE_NON_HP_WR = 3692; // 8 +const static uint64_t SH_FLD_CFG_WRQ_ENTRY0_HP_DLY = 3693; // 8 +const static uint64_t SH_FLD_CFG_WRQ_ENTRY0_HP_DLY_LEN = 3694; // 8 +const static uint64_t SH_FLD_CFG_WRQ_FIFO_MODE = 3695; // 8 +const static uint64_t SH_FLD_CFG_WRQ_FLUSH_WR_RANK = 3696; // 8 +const static uint64_t SH_FLD_CFG_WRQ_FRC_ST_RD_HIT_WR = 3697; // 8 +const static uint64_t SH_FLD_CFG_WRQ_SINGLE_THREAD_MODE = 3698; // 8 +const static uint64_t SH_FLD_CFG_WRQ_SKIP_LIMIT = 3699; // 8 +const static uint64_t SH_FLD_CFG_WRQ_SKIP_LIMIT_LEN = 3700; // 8 +const static uint64_t SH_FLD_CGC = 3701; // 24 +const static uint64_t SH_FLD_CGC_LEN = 3702; // 24 +const static uint64_t SH_FLD_CH0 = 3703; // 2 +const static uint64_t SH_FLD_CH0EFT_ACTION = 3704; // 1 +const static uint64_t SH_FLD_CH0EFT_ENA = 3705; // 1 +const static uint64_t SH_FLD_CH0EFT_SELECT = 3706; // 1 +const static uint64_t SH_FLD_CH0EFT_SELECT_LEN = 3707; // 1 +const static uint64_t SH_FLD_CH0EFT_TYPE = 3708; // 1 +const static uint64_t SH_FLD_CH0_842_ECC_CE = 3709; // 1 +const static uint64_t SH_FLD_CH0_842_ECC_UE = 3710; // 1 +const static uint64_t SH_FLD_CH0_CMD_CREDITS_0_5 = 3711; // 1 +const static uint64_t SH_FLD_CH0_CMD_CREDITS_0_5_LEN = 3712; // 1 +const static uint64_t SH_FLD_CH0_EFT = 3713; // 1 +const static uint64_t SH_FLD_CH0_INVALID_STATE = 3714; // 1 +const static uint64_t SH_FLD_CH0_LEN = 3715; // 2 +const static uint64_t SH_FLD_CH0_REF_DIV = 3716; // 1 +const static uint64_t SH_FLD_CH0_REF_DIV_LEN = 3717; // 1 +const static uint64_t SH_FLD_CH0_TIMER_ENBL = 3718; // 1 +const static uint64_t SH_FLD_CH1 = 3719; // 2 +const static uint64_t SH_FLD_CH1EFT_ACTION = 3720; // 1 +const static uint64_t SH_FLD_CH1EFT_ENA = 3721; // 1 +const static uint64_t SH_FLD_CH1EFT_SELECT = 3722; // 1 +const static uint64_t SH_FLD_CH1EFT_SELECT_LEN = 3723; // 1 +const static uint64_t SH_FLD_CH1EFT_TYPE = 3724; // 1 +const static uint64_t SH_FLD_CH1_842_ECC_CE = 3725; // 1 +const static uint64_t SH_FLD_CH1_842_ECC_UE = 3726; // 1 +const static uint64_t SH_FLD_CH1_CMD_CREDITS_0_5 = 3727; // 1 +const static uint64_t SH_FLD_CH1_CMD_CREDITS_0_5_LEN = 3728; // 1 +const static uint64_t SH_FLD_CH1_DAT_CREDITS_0_5 = 3729; // 1 +const static uint64_t SH_FLD_CH1_DAT_CREDITS_0_5_LEN = 3730; // 1 +const static uint64_t SH_FLD_CH1_EFT = 3731; // 1 +const static uint64_t SH_FLD_CH1_INVALID_STATE = 3732; // 1 +const static uint64_t SH_FLD_CH1_LEN = 3733; // 2 +const static uint64_t SH_FLD_CH1_REF_DIV = 3734; // 1 +const static uint64_t SH_FLD_CH1_REF_DIV_LEN = 3735; // 1 +const static uint64_t SH_FLD_CH1_TIMER_ENBL = 3736; // 1 +const static uint64_t SH_FLD_CH2 = 3737; // 2 +const static uint64_t SH_FLD_CH2_CMD_CREDITS_PC_0_5 = 3738; // 1 +const static uint64_t SH_FLD_CH2_CMD_CREDITS_PC_0_5_LEN = 3739; // 1 +const static uint64_t SH_FLD_CH2_CMD_CREDITS_VC_0_5 = 3740; // 1 +const static uint64_t SH_FLD_CH2_CMD_CREDITS_VC_0_5_LEN = 3741; // 1 +const static uint64_t SH_FLD_CH2_INVALID_STATE = 3742; // 1 +const static uint64_t SH_FLD_CH2_LEN = 3743; // 2 +const static uint64_t SH_FLD_CH2_REF_DIV = 3744; // 1 +const static uint64_t SH_FLD_CH2_REF_DIV_LEN = 3745; // 1 +const static uint64_t SH_FLD_CH2_SYM = 3746; // 1 +const static uint64_t SH_FLD_CH2_TIMER_ENBL = 3747; // 1 +const static uint64_t SH_FLD_CH3 = 3748; // 2 +const static uint64_t SH_FLD_CH3_INVALID_STATE = 3749; // 1 +const static uint64_t SH_FLD_CH3_LEN = 3750; // 2 +const static uint64_t SH_FLD_CH3_REF_DIV = 3751; // 1 +const static uint64_t SH_FLD_CH3_REF_DIV_LEN = 3752; // 1 +const static uint64_t SH_FLD_CH3_SYM = 3753; // 1 +const static uint64_t SH_FLD_CH3_TIMER_ENBL = 3754; // 1 +const static uint64_t SH_FLD_CH4GZIP_ACTION = 3755; // 1 +const static uint64_t SH_FLD_CH4GZIP_ENA = 3756; // 1 +const static uint64_t SH_FLD_CH4GZIP_SELECT = 3757; // 1 +const static uint64_t SH_FLD_CH4GZIP_SELECT_LEN = 3758; // 1 +const static uint64_t SH_FLD_CH4GZIP_TYPE = 3759; // 1 +const static uint64_t SH_FLD_CH4_AMF_ECC_CE = 3760; // 1 +const static uint64_t SH_FLD_CH4_AMF_ECC_UE = 3761; // 1 +const static uint64_t SH_FLD_CH4_GZIP = 3762; // 1 +const static uint64_t SH_FLD_CH4_INVALID_STATE = 3763; // 1 +const static uint64_t SH_FLD_CH4_REF_DIV = 3764; // 1 +const static uint64_t SH_FLD_CH4_REF_DIV_LEN = 3765; // 1 +const static uint64_t SH_FLD_CH4_TIMER_ENBL = 3766; // 1 +const static uint64_t SH_FLD_CH5_AMF_ECC_CE = 3767; // 1 +const static uint64_t SH_FLD_CH5_AMF_ECC_UE = 3768; // 1 +const static uint64_t SH_FLD_CH5_INVALID_STATE = 3769; // 1 +const static uint64_t SH_FLD_CH6_AMF_ECC_CE = 3770; // 1 +const static uint64_t SH_FLD_CH6_AMF_ECC_UE = 3771; // 1 +const static uint64_t SH_FLD_CH6_INVALID_STATE = 3772; // 1 +const static uint64_t SH_FLD_CH7_AMF_ECC_CE = 3773; // 1 +const static uint64_t SH_FLD_CH7_AMF_ECC_UE = 3774; // 1 +const static uint64_t SH_FLD_CH7_INVALID_STATE = 3775; // 1 +const static uint64_t SH_FLD_CHANGE_IN_PROGRESS = 3776; // 2 +const static uint64_t SH_FLD_CHANNEL_0_GROUP_MEMBER_IDENTIFICATION = 3777; // 4 +const static uint64_t SH_FLD_CHANNEL_0_GROUP_MEMBER_IDENTIFICATION_LEN = 3778; // 4 +const static uint64_t SH_FLD_CHANNEL_0_TIMEOUT_ERROR = 3779; // 4 +const static uint64_t SH_FLD_CHANNEL_1_GROUP_MEMBER_IDENTIFICATION = 3780; // 4 +const static uint64_t SH_FLD_CHANNEL_1_GROUP_MEMBER_IDENTIFICATION_LEN = 3781; // 4 +const static uint64_t SH_FLD_CHANNEL_1_TIMEOUT_ERROR = 3782; // 4 +const static uint64_t SH_FLD_CHANNEL_SELECT = 3783; // 4 +const static uint64_t SH_FLD_CHANNEL_SELECT_LEN = 3784; // 4 +const static uint64_t SH_FLD_CHECKSTOP = 3785; // 1 +const static uint64_t SH_FLD_CHECK_CMDS = 3786; // 2 +const static uint64_t SH_FLD_CHECK_CMDS_EN = 3787; // 2 +const static uint64_t SH_FLD_CHECK_CMDS_LEN = 3788; // 2 +const static uint64_t SH_FLD_CHECK_STOP_GPE0 = 3789; // 1 +const static uint64_t SH_FLD_CHECK_STOP_GPE1 = 3790; // 1 +const static uint64_t SH_FLD_CHECK_STOP_GPE2 = 3791; // 1 +const static uint64_t SH_FLD_CHECK_STOP_GPE3 = 3792; // 1 +const static uint64_t SH_FLD_CHECK_STOP_PPC405 = 3793; // 1 +const static uint64_t SH_FLD_CHIPID = 3794; // 1 +const static uint64_t SH_FLD_CHIPID_LEN = 3795; // 1 +const static uint64_t SH_FLD_CHIPID_OVERRIDE = 3796; // 1 +const static uint64_t SH_FLD_CHIPLET_ATOMIC_LOCK = 3797; // 43 +const static uint64_t SH_FLD_CHIPLET_ENABLE = 3798; // 43 +const static uint64_t SH_FLD_CHIPLET_ERRORS = 3799; // 43 +const static uint64_t SH_FLD_CHIPLET_ERRORS_LEN = 3800; // 43 +const static uint64_t SH_FLD_CHIPLET_GRID_SKITTER = 3801; // 43 +const static uint64_t SH_FLD_CHIPLET_INTERRUPT_FROM_HOST = 3802; // 1 +const static uint64_t SH_FLD_CHIPLET_IS_ALIGNED = 3803; // 43 +const static uint64_t SH_FLD_CHIPLET_OFFLINE = 3804; // 43 +const static uint64_t SH_FLD_CHIPMARK = 3805; // 72 +const static uint64_t SH_FLD_CHIPMARK_LEN = 3806; // 72 +const static uint64_t SH_FLD_CHIP_INTERFACEMODE = 3807; // 2 +const static uint64_t SH_FLD_CHIP_PERSONALISATION = 3808; // 2 +const static uint64_t SH_FLD_CHIP_RESET = 3809; // 1 +const static uint64_t SH_FLD_CHIP_STATUS = 3810; // 194 +const static uint64_t SH_FLD_CHIP_STATUS_LEN = 3811; // 194 +const static uint64_t SH_FLD_CHIP_TOD_STATUS = 3812; // 98 +const static uint64_t SH_FLD_CHIP_TOD_STATUS_LEN = 3813; // 98 +const static uint64_t SH_FLD_CHKSW_ALLOW1_RD = 3814; // 1 +const static uint64_t SH_FLD_CHKSW_ALLOW1_RDWR = 3815; // 1 +const static uint64_t SH_FLD_CHKSW_ALLOW1_WR = 3816; // 1 +const static uint64_t SH_FLD_CHKSW_I2C_BUSY = 3817; // 1 +const static uint64_t SH_FLD_CHKSW_I2C_BUSY_0 = 3818; // 1 +const static uint64_t SH_FLD_CHKSW_I2C_BUSY_1 = 3819; // 1 +const static uint64_t SH_FLD_CHKSW_I2C_BUSY_2 = 3820; // 1 +const static uint64_t SH_FLD_CHKSW_I2C_BUSY_3 = 3821; // 1 +const static uint64_t SH_FLD_CHKSW_OCI_PARCHK_DIS = 3822; // 1 +const static uint64_t SH_FLD_CHKSW_SO_SPARE = 3823; // 1 +const static uint64_t SH_FLD_CHKSW_SO_SPARE_LEN = 3824; // 1 +const static uint64_t SH_FLD_CHKSW_SPARE_6 = 3825; // 1 +const static uint64_t SH_FLD_CHKSW_TANK_RDDATA_PARCHK_DIS = 3826; // 1 +const static uint64_t SH_FLD_CHKSW_VAL_BE_ADDR_CHK_DIS = 3827; // 1 +const static uint64_t SH_FLD_CHKSW_WRFSM_DLY_DIS = 3828; // 1 +const static uint64_t SH_FLD_CHOP1G = 3829; // 1 +const static uint64_t SH_FLD_CHSW_DIS_DATA_HANG = 3830; // 1 +const static uint64_t SH_FLD_CHSW_DIS_ECC_CHECK = 3831; // 1 +const static uint64_t SH_FLD_CHSW_DIS_GROUP_SCOPE = 3832; // 1 +const static uint64_t SH_FLD_CHSW_DIS_OCIABUSPAR_CHECK = 3833; // 1 +const static uint64_t SH_FLD_CHSW_DIS_OCIBEPAR_CHECK = 3834; // 1 +const static uint64_t SH_FLD_CHSW_DIS_OCIDATAPAR_CHECK = 3835; // 1 +const static uint64_t SH_FLD_CHSW_DIS_OCIDATAPAR_GEN = 3836; // 1 +const static uint64_t SH_FLD_CHSW_DIS_OPER_HANG = 3837; // 1 +const static uint64_t SH_FLD_CHSW_DIS_PB_PARITY_CHK = 3838; // 1 +const static uint64_t SH_FLD_CHSW_DIS_RETRY_BACKOFF = 3839; // 1 +const static uint64_t SH_FLD_CHSW_DIS_RTAG_PARITY_CHK = 3840; // 1 +const static uint64_t SH_FLD_CHSW_DIS_WRITE_MATCH_REARB = 3841; // 1 +const static uint64_t SH_FLD_CHSW_EXIT_ON_INVALID_CRESP = 3842; // 1 +const static uint64_t SH_FLD_CHSW_HANG_ON_ADRERROR = 3843; // 1 +const static uint64_t SH_FLD_CHSW_HANG_ON_DERROR = 3844; // 1 +const static uint64_t SH_FLD_CHSW_SKIP_GROUP_SCOPE = 3845; // 1 +const static uint64_t SH_FLD_CHSW_USE_CL_DMA_INJ = 3846; // 1 +const static uint64_t SH_FLD_CHSW_USE_PR_DMA_INJ = 3847; // 1 +const static uint64_t SH_FLD_CHTM_PURGE_C0 = 3848; // 12 +const static uint64_t SH_FLD_CHTM_PURGE_C1 = 3849; // 12 +const static uint64_t SH_FLD_CHTM_PURGE_DONE_C0 = 3850; // 24 +const static uint64_t SH_FLD_CHTM_PURGE_DONE_C1 = 3851; // 24 +const static uint64_t SH_FLD_CIABR_EN = 3852; // 24 +const static uint64_t SH_FLD_CI_BUFF_AVAIL = 3853; // 2 +const static uint64_t SH_FLD_CI_LOAD = 3854; // 1 +const static uint64_t SH_FLD_CI_LOAD_LEN = 3855; // 1 +const static uint64_t SH_FLD_CI_MACHINE_HANG_ERR = 3856; // 12 +const static uint64_t SH_FLD_CI_READ = 3857; // 1 +const static uint64_t SH_FLD_CI_STORE = 3858; // 1 +const static uint64_t SH_FLD_CI_STORE_BUFFER_THRESHOLD = 3859; // 2 +const static uint64_t SH_FLD_CI_STORE_BUFFER_THRESHOLD_LEN = 3860; // 2 +const static uint64_t SH_FLD_CI_STORE_LEN = 3861; // 1 +const static uint64_t SH_FLD_CI_WRITE = 3862; // 1 +const static uint64_t SH_FLD_CKINSM_DIS = 3863; // 1 +const static uint64_t SH_FLD_CKINSM_DIS_LEN = 3864; // 1 +const static uint64_t SH_FLD_CKIN_PROT_ERR_CHK_DIS = 3865; // 1 +const static uint64_t SH_FLD_CKIN_TIMEOUT_CHK_DIS = 3866; // 1 +const static uint64_t SH_FLD_CLEAR = 3867; // 1 +const static uint64_t SH_FLD_CLEAR_CHIPLET_IS_ALIGNED = 3868; // 43 +const static uint64_t SH_FLD_CLKDIST_PDWN = 3869; // 12 +const static uint64_t SH_FLD_CLKDIST_PDWN_LEN = 3870; // 4 +const static uint64_t SH_FLD_CLKGLM_ASYNC_RESET = 3871; // 30 +const static uint64_t SH_FLD_CLKGLM_SEL = 3872; // 30 +const static uint64_t SH_FLD_CLK_ASYNC_RESET = 3873; // 43 +const static uint64_t SH_FLD_CLK_BIST_ACTIVITY_DET = 3874; // 4 +const static uint64_t SH_FLD_CLK_BIST_ERR = 3875; // 4 +const static uint64_t SH_FLD_CLK_DIV_BYPASS_EN = 3876; // 43 +const static uint64_t SH_FLD_CLK_DLY = 3877; // 1 +const static uint64_t SH_FLD_CLK_DLY_LEN = 3878; // 1 +const static uint64_t SH_FLD_CLK_HALF_WIDTH_MODE = 3879; // 4 +const static uint64_t SH_FLD_CLK_INVERT = 3880; // 6 +const static uint64_t SH_FLD_CLK_PDLY_BYPASS_EN = 3881; // 43 +const static uint64_t SH_FLD_CLK_PULSE_EN = 3882; // 43 +const static uint64_t SH_FLD_CLK_PULSE_MODE = 3883; // 43 +const static uint64_t SH_FLD_CLK_PULSE_MODE_LEN = 3884; // 43 +const static uint64_t SH_FLD_CLK_QUIESCE = 3885; // 4 +const static uint64_t SH_FLD_CLK_QUIESCE_LEN = 3886; // 4 +const static uint64_t SH_FLD_CLK_QUIESCE_N = 3887; // 1 +const static uint64_t SH_FLD_CLK_QUIESCE_N_LEN = 3888; // 1 +const static uint64_t SH_FLD_CLK_QUIESCE_P = 3889; // 1 +const static uint64_t SH_FLD_CLK_QUIESCE_P_LEN = 3890; // 1 +const static uint64_t SH_FLD_CLK_RATE = 3891; // 4 +const static uint64_t SH_FLD_CLK_RATE_LEN = 3892; // 4 +const static uint64_t SH_FLD_CLK_RATE_SEL = 3893; // 1 +const static uint64_t SH_FLD_CLK_RATE_SEL_LEN = 3894; // 1 +const static uint64_t SH_FLD_CLK_RUN_COUNT = 3895; // 4 +const static uint64_t SH_FLD_CLK_SB_PULSE_MODE = 3896; // 24 +const static uint64_t SH_FLD_CLK_SB_PULSE_MODE_EN = 3897; // 24 +const static uint64_t SH_FLD_CLK_SB_PULSE_MODE_LEN = 3898; // 24 +const static uint64_t SH_FLD_CLK_SB_SPARE = 3899; // 24 +const static uint64_t SH_FLD_CLK_SB_STRENGTH = 3900; // 24 +const static uint64_t SH_FLD_CLK_SB_STRENGTH_LEN = 3901; // 24 +const static uint64_t SH_FLD_CLK_SW_RESCLK = 3902; // 24 +const static uint64_t SH_FLD_CLK_SW_RESCLK_LEN = 3903; // 24 +const static uint64_t SH_FLD_CLK_SW_SPARE = 3904; // 24 +const static uint64_t SH_FLD_CLK_SYNC = 3905; // 24 +const static uint64_t SH_FLD_CLK_SYNC_DONE = 3906; // 24 +const static uint64_t SH_FLD_CLK_SYNC_ENABLE = 3907; // 24 +const static uint64_t SH_FLD_CLK_UNLOAD_CLK_DISABLE = 3908; // 4 +const static uint64_t SH_FLD_CLK_UNLOAD_SEL = 3909; // 4 +const static uint64_t SH_FLD_CLK_UNLOAD_SEL_LEN = 3910; // 4 +const static uint64_t SH_FLD_CLOCK_CMD = 3911; // 43 +const static uint64_t SH_FLD_CLOCK_CMD_LEN = 3912; // 43 +const static uint64_t SH_FLD_CLOCK_DIVIDER = 3913; // 1 +const static uint64_t SH_FLD_CLOCK_DIVIDER_LEN = 3914; // 1 +const static uint64_t SH_FLD_CLOCK_DIV_4 = 3915; // 3 +const static uint64_t SH_FLD_CLOCK_PERV = 3916; // 43 +const static uint64_t SH_FLD_CLOCK_PULSE_USE_EVEN = 3917; // 43 +const static uint64_t SH_FLD_CLOCK_RATE_SELECTION = 3918; // 3 +const static uint64_t SH_FLD_CLOCK_RATE_SELECTION_0 = 3919; // 1 +const static uint64_t SH_FLD_CLOCK_RATE_SELECTION_0_LEN = 3920; // 1 +const static uint64_t SH_FLD_CLOCK_RATE_SELECTION_1 = 3921; // 2 +const static uint64_t SH_FLD_CLOCK_RATE_SELECTION_1_LEN = 3922; // 2 +const static uint64_t SH_FLD_CLOCK_RATE_SELECTION_LEN = 3923; // 3 +const static uint64_t SH_FLD_CLOCK_UNIT1 = 3924; // 43 +const static uint64_t SH_FLD_CLOCK_UNIT10 = 3925; // 43 +const static uint64_t SH_FLD_CLOCK_UNIT2 = 3926; // 43 +const static uint64_t SH_FLD_CLOCK_UNIT3 = 3927; // 43 +const static uint64_t SH_FLD_CLOCK_UNIT4 = 3928; // 43 +const static uint64_t SH_FLD_CLOCK_UNIT5 = 3929; // 43 +const static uint64_t SH_FLD_CLOCK_UNIT6 = 3930; // 43 +const static uint64_t SH_FLD_CLOCK_UNIT7 = 3931; // 43 +const static uint64_t SH_FLD_CLOCK_UNIT8 = 3932; // 43 +const static uint64_t SH_FLD_CLOCK_UNIT9 = 3933; // 43 +const static uint64_t SH_FLD_CLONE_CS_MODE = 3934; // 8 +const static uint64_t SH_FLD_CLR_PAR_ERRS = 3935; // 16 +const static uint64_t SH_FLD_CL_DATA = 3936; // 43 +const static uint64_t SH_FLD_CL_FINE_DISABLE = 3937; // 4 +const static uint64_t SH_FLD_CL_FINE_DISABLE_LEN = 3938; // 4 +const static uint64_t SH_FLD_CL_FSM = 3939; // 43 +const static uint64_t SH_FLD_CL_GLOBAL_DISABLE = 3940; // 4 +const static uint64_t SH_FLD_CL_GLOBAL_DISABLE_LEN = 3941; // 4 +const static uint64_t SH_FLD_CL_TIMEOUT_SEL = 3942; // 4 +const static uint64_t SH_FLD_CL_TIMEOUT_SEL_LEN = 3943; // 4 +const static uint64_t SH_FLD_CMD = 3944; // 43 +const static uint64_t SH_FLD_CMDREG_BROADCAST_FLAG = 3945; // 1 +const static uint64_t SH_FLD_CMDREG_SCAN_ADDRESS = 3946; // 1 +const static uint64_t SH_FLD_CMDREG_SCAN_ADDRESS_LEN = 3947; // 1 +const static uint64_t SH_FLD_CMDREG_SCAN_REGION = 3948; // 1 +const static uint64_t SH_FLD_CMDREG_SCAN_REGION_LEN = 3949; // 1 +const static uint64_t SH_FLD_CMDREG_SCAN_TYPE = 3950; // 1 +const static uint64_t SH_FLD_CMDREG_SCAN_TYPE_LEN = 3951; // 1 +const static uint64_t SH_FLD_CMDREG_WRITE_FLAG = 3952; // 1 +const static uint64_t SH_FLD_CMD_BUFFER_PAR_ERR = 3953; // 4 +const static uint64_t SH_FLD_CMD_COUNT_ERR = 3954; // 1 +const static uint64_t SH_FLD_CMD_IN_PROG = 3955; // 1 +const static uint64_t SH_FLD_CMD_LEN = 3956; // 43 +const static uint64_t SH_FLD_CMD_PARITY_ERROR = 3957; // 19 +const static uint64_t SH_FLD_CMD_REG = 3958; // 2 +const static uint64_t SH_FLD_CMD_REG_ADDR_1 = 3959; // 1 +const static uint64_t SH_FLD_CMD_REG_ADDR_1_LEN = 3960; // 1 +const static uint64_t SH_FLD_CMD_REG_ADDR_2 = 3961; // 1 +const static uint64_t SH_FLD_CMD_REG_ADDR_2_LEN = 3962; // 1 +const static uint64_t SH_FLD_CMD_REG_ADDR_3 = 3963; // 1 +const static uint64_t SH_FLD_CMD_REG_ADDR_3_LEN = 3964; // 1 +const static uint64_t SH_FLD_CMD_REG_ADDR_4 = 3965; // 1 +const static uint64_t SH_FLD_CMD_REG_ADDR_4_LEN = 3966; // 1 +const static uint64_t SH_FLD_CMD_REG_BIT_READCONT = 3967; // 1 +const static uint64_t SH_FLD_CMD_REG_BIT_RNW = 3968; // 1 +const static uint64_t SH_FLD_CMD_REG_BIT_WITHADDR = 3969; // 1 +const static uint64_t SH_FLD_CMD_REG_BIT_WITHSTART = 3970; // 1 +const static uint64_t SH_FLD_CMD_REG_BIT_WITHSTOP = 3971; // 1 +const static uint64_t SH_FLD_CMD_REG_LEN = 3972; // 2 +const static uint64_t SH_FLD_CMD_REG_LENGTH = 3973; // 1 +const static uint64_t SH_FLD_CMD_REG_LENGTH_LEN = 3974; // 1 +const static uint64_t SH_FLD_CMD_SCOPE = 3975; // 4 +const static uint64_t SH_FLD_CMD_SCOPE_LEN = 3976; // 4 +const static uint64_t SH_FLD_CMD_STATUS = 3977; // 1 +const static uint64_t SH_FLD_CMD_STATUS_LEN = 3978; // 1 +const static uint64_t SH_FLD_CMD_TO_CMD_COUNT = 3979; // 8 +const static uint64_t SH_FLD_CMD_TO_CMD_COUNT_LEN = 3980; // 8 +const static uint64_t SH_FLD_CME_ERR_NOTIFY_DIS = 3981; // 24 +const static uint64_t SH_FLD_CME_INTERPPM_ACLK_ENABLE = 3982; // 6 +const static uint64_t SH_FLD_CME_INTERPPM_ACLK_SEL = 3983; // 6 +const static uint64_t SH_FLD_CME_INTERPPM_DPLL_ENABLE = 3984; // 6 +const static uint64_t SH_FLD_CME_INTERPPM_DPLL_SEL = 3985; // 6 +const static uint64_t SH_FLD_CME_INTERPPM_IVRM_ENABLE = 3986; // 6 +const static uint64_t SH_FLD_CME_INTERPPM_IVRM_SEL = 3987; // 6 +const static uint64_t SH_FLD_CME_INTERPPM_VDM_ENABLE = 3988; // 6 +const static uint64_t SH_FLD_CME_INTERPPM_VDM_SEL = 3989; // 6 +const static uint64_t SH_FLD_CME_MESSAGE = 3990; // 24 +const static uint64_t SH_FLD_CME_MESSAGE_HI = 3991; // 24 +const static uint64_t SH_FLD_CME_MESSAGE_HI_LEN = 3992; // 24 +const static uint64_t SH_FLD_CME_MESSAGE_LEN = 3993; // 24 +const static uint64_t SH_FLD_CME_MESSAGE_NUMBER0 = 3994; // 24 +const static uint64_t SH_FLD_CME_MESSAGE_NUMBER0_LEN = 3995; // 24 +const static uint64_t SH_FLD_CME_MESSAGE_NUMBER_N = 3996; // 72 +const static uint64_t SH_FLD_CME_MESSAGE_NUMBER_N_LEN = 3997; // 72 +const static uint64_t SH_FLD_CME_REQUEST = 3998; // 96 +const static uint64_t SH_FLD_CME_SPECIAL_WKUP_DONE_DIS = 3999; // 24 +const static uint64_t SH_FLD_CMFSI_ACCESS_PROTCT = 4000; // 1 +const static uint64_t SH_FLD_CMLEN = 4001; // 10 +const static uint64_t SH_FLD_CMSK = 4002; // 43 +const static uint64_t SH_FLD_CM_CFG = 4003; // 6 +const static uint64_t SH_FLD_CM_CFG_LEN = 4004; // 6 +const static uint64_t SH_FLD_CM_CNTL = 4005; // 120 +const static uint64_t SH_FLD_CM_CNTL_LEN = 4006; // 120 +const static uint64_t SH_FLD_CM_OFFSET_VAL = 4007; // 6 +const static uint64_t SH_FLD_CM_OFFSET_VAL_LEN = 4008; // 6 +const static uint64_t SH_FLD_CM_TIMEOUT = 4009; // 6 +const static uint64_t SH_FLD_CM_TIMEOUT_LEN = 4010; // 6 +const static uint64_t SH_FLD_CND_HWD_DOES_DEM_IVE = 4011; // 1 +const static uint64_t SH_FLD_CND_HWD_DOES_DEM_IVE_LEN = 4012; // 1 +const static uint64_t SH_FLD_CNT0 = 4013; // 1 +const static uint64_t SH_FLD_CNT0_BIT_PAIR_SEL = 4014; // 1 +const static uint64_t SH_FLD_CNT0_BIT_PAIR_SELECT = 4015; // 1 +const static uint64_t SH_FLD_CNT0_BIT_PAIR_SELECT_LEN = 4016; // 1 +const static uint64_t SH_FLD_CNT0_BIT_PAIR_SEL_LEN = 4017; // 1 +const static uint64_t SH_FLD_CNT0_EN = 4018; // 1 +const static uint64_t SH_FLD_CNT0_ENABLE = 4019; // 1 +const static uint64_t SH_FLD_CNT0_EVENT_SEL = 4020; // 1 +const static uint64_t SH_FLD_CNT0_EVENT_SELECT = 4021; // 1 +const static uint64_t SH_FLD_CNT0_EVENT_SELECT_LEN = 4022; // 1 +const static uint64_t SH_FLD_CNT0_EVENT_SEL_LEN = 4023; // 1 +const static uint64_t SH_FLD_CNT0_LEN = 4024; // 1 +const static uint64_t SH_FLD_CNT0_MUX_SEL = 4025; // 2 +const static uint64_t SH_FLD_CNT0_MUX_SEL_LEN = 4026; // 2 +const static uint64_t SH_FLD_CNT0_PAIR_OP = 4027; // 2 +const static uint64_t SH_FLD_CNT0_PAIR_OP_LEN = 4028; // 2 +const static uint64_t SH_FLD_CNT0_POSEDGE_SEL = 4029; // 1 +const static uint64_t SH_FLD_CNT0_POS_EDGE_SELECT = 4030; // 1 +const static uint64_t SH_FLD_CNT1 = 4031; // 1 +const static uint64_t SH_FLD_CNT1_BIT_PAIR_SEL = 4032; // 1 +const static uint64_t SH_FLD_CNT1_BIT_PAIR_SELECT = 4033; // 1 +const static uint64_t SH_FLD_CNT1_BIT_PAIR_SELECT_LEN = 4034; // 1 +const static uint64_t SH_FLD_CNT1_BIT_PAIR_SEL_LEN = 4035; // 1 +const static uint64_t SH_FLD_CNT1_EN = 4036; // 1 +const static uint64_t SH_FLD_CNT1_ENABLE = 4037; // 1 +const static uint64_t SH_FLD_CNT1_EVENT_SEL = 4038; // 1 +const static uint64_t SH_FLD_CNT1_EVENT_SELECT = 4039; // 1 +const static uint64_t SH_FLD_CNT1_EVENT_SELECT_LEN = 4040; // 1 +const static uint64_t SH_FLD_CNT1_EVENT_SEL_LEN = 4041; // 1 +const static uint64_t SH_FLD_CNT1_LEN = 4042; // 1 +const static uint64_t SH_FLD_CNT1_MUX_SEL = 4043; // 2 +const static uint64_t SH_FLD_CNT1_MUX_SEL_LEN = 4044; // 2 +const static uint64_t SH_FLD_CNT1_PAIR_OP = 4045; // 2 +const static uint64_t SH_FLD_CNT1_PAIR_OP_LEN = 4046; // 2 +const static uint64_t SH_FLD_CNT1_POSEDGE_SEL = 4047; // 1 +const static uint64_t SH_FLD_CNT1_POS_EDGE_SELECT = 4048; // 1 +const static uint64_t SH_FLD_CNT2 = 4049; // 1 +const static uint64_t SH_FLD_CNT2_BIT_PAIR_SEL = 4050; // 1 +const static uint64_t SH_FLD_CNT2_BIT_PAIR_SELECT = 4051; // 1 +const static uint64_t SH_FLD_CNT2_BIT_PAIR_SELECT_LEN = 4052; // 1 +const static uint64_t SH_FLD_CNT2_BIT_PAIR_SEL_LEN = 4053; // 1 +const static uint64_t SH_FLD_CNT2_EN = 4054; // 1 +const static uint64_t SH_FLD_CNT2_ENABLE = 4055; // 1 +const static uint64_t SH_FLD_CNT2_EVENT_SEL = 4056; // 1 +const static uint64_t SH_FLD_CNT2_EVENT_SELECT = 4057; // 1 +const static uint64_t SH_FLD_CNT2_EVENT_SELECT_LEN = 4058; // 1 +const static uint64_t SH_FLD_CNT2_EVENT_SEL_LEN = 4059; // 1 +const static uint64_t SH_FLD_CNT2_LEN = 4060; // 1 +const static uint64_t SH_FLD_CNT2_MUX_SEL = 4061; // 2 +const static uint64_t SH_FLD_CNT2_MUX_SEL_LEN = 4062; // 2 +const static uint64_t SH_FLD_CNT2_PAIR_OP = 4063; // 2 +const static uint64_t SH_FLD_CNT2_PAIR_OP_LEN = 4064; // 2 +const static uint64_t SH_FLD_CNT2_POSEDGE_SEL = 4065; // 1 +const static uint64_t SH_FLD_CNT2_POS_EDGE_SELECT = 4066; // 1 +const static uint64_t SH_FLD_CNT3 = 4067; // 1 +const static uint64_t SH_FLD_CNT3_BIT_PAIR_SEL = 4068; // 1 +const static uint64_t SH_FLD_CNT3_BIT_PAIR_SELECT = 4069; // 1 +const static uint64_t SH_FLD_CNT3_BIT_PAIR_SELECT_LEN = 4070; // 1 +const static uint64_t SH_FLD_CNT3_BIT_PAIR_SEL_LEN = 4071; // 1 +const static uint64_t SH_FLD_CNT3_EN = 4072; // 1 +const static uint64_t SH_FLD_CNT3_ENABLE = 4073; // 1 +const static uint64_t SH_FLD_CNT3_EVENT_SEL = 4074; // 1 +const static uint64_t SH_FLD_CNT3_EVENT_SELECT = 4075; // 1 +const static uint64_t SH_FLD_CNT3_EVENT_SELECT_LEN = 4076; // 1 +const static uint64_t SH_FLD_CNT3_EVENT_SEL_LEN = 4077; // 1 +const static uint64_t SH_FLD_CNT3_LEN = 4078; // 1 +const static uint64_t SH_FLD_CNT3_MUX_SEL = 4079; // 2 +const static uint64_t SH_FLD_CNT3_MUX_SEL_LEN = 4080; // 2 +const static uint64_t SH_FLD_CNT3_PAIR_OP = 4081; // 2 +const static uint64_t SH_FLD_CNT3_PAIR_OP_LEN = 4082; // 2 +const static uint64_t SH_FLD_CNT3_POSEDGE_SEL = 4083; // 1 +const static uint64_t SH_FLD_CNT3_POS_EDGE_SELECT = 4084; // 1 +const static uint64_t SH_FLD_CNTL = 4085; // 8 +const static uint64_t SH_FLD_CNTLS_PREV_LDED_GCRMSG = 4086; // 4 +const static uint64_t SH_FLD_CNTL_LEN = 4087; // 8 +const static uint64_t SH_FLD_CNT_BROADCAST = 4088; // 1 +const static uint64_t SH_FLD_CNT_BROADCAST_LEN = 4089; // 1 +const static uint64_t SH_FLD_CNT_CI_STORE_REPLAY = 4090; // 1 +const static uint64_t SH_FLD_CNT_CI_STORE_REPLAY_LEN = 4091; // 1 +const static uint64_t SH_FLD_CNT_DEM_CACHE_HIT = 4092; // 1 +const static uint64_t SH_FLD_CNT_DEM_CACHE_HIT_LEN = 4093; // 1 +const static uint64_t SH_FLD_CNT_DMA_RD = 4094; // 6 +const static uint64_t SH_FLD_CNT_DMA_RD_LEN = 4095; // 6 +const static uint64_t SH_FLD_CNT_DMA_WR = 4096; // 6 +const static uint64_t SH_FLD_CNT_DMA_WR_LEN = 4097; // 6 +const static uint64_t SH_FLD_CNT_EOI_CACHE_HIT = 4098; // 1 +const static uint64_t SH_FLD_CNT_EOI_CACHE_HIT_LEN = 4099; // 1 +const static uint64_t SH_FLD_CNT_EOI_RESP_REPLAY = 4100; // 2 +const static uint64_t SH_FLD_CNT_EOI_RESP_REPLAY_LEN = 4101; // 2 +const static uint64_t SH_FLD_CNT_EQC_COMMAND = 4102; // 1 +const static uint64_t SH_FLD_CNT_EQC_COMMAND_LEN = 4103; // 1 +const static uint64_t SH_FLD_CNT_EQD_FETCH = 4104; // 1 +const static uint64_t SH_FLD_CNT_EQD_FETCH_LEN = 4105; // 1 +const static uint64_t SH_FLD_CNT_EQD_FETCH_REPLAY = 4106; // 1 +const static uint64_t SH_FLD_CNT_EQD_FETCH_REPLAY_LEN = 4107; // 1 +const static uint64_t SH_FLD_CNT_EQP = 4108; // 1 +const static uint64_t SH_FLD_CNT_EQP_LEN = 4109; // 1 +const static uint64_t SH_FLD_CNT_EQP_REPLAY = 4110; // 1 +const static uint64_t SH_FLD_CNT_EQP_REPLAY_LEN = 4111; // 1 +const static uint64_t SH_FLD_CNT_EQ_FWD = 4112; // 1 +const static uint64_t SH_FLD_CNT_EQ_FWD_LEN = 4113; // 1 +const static uint64_t SH_FLD_CNT_EQ_TRIGGER_FROM_1ESC = 4114; // 1 +const static uint64_t SH_FLD_CNT_EQ_TRIGGER_FROM_1ESC_LEN = 4115; // 1 +const static uint64_t SH_FLD_CNT_EQ_TRIGGER_FROM_2ESC = 4116; // 1 +const static uint64_t SH_FLD_CNT_EQ_TRIGGER_FROM_2ESC_LEN = 4117; // 1 +const static uint64_t SH_FLD_CNT_EQ_TRIGGER_FROM_HWD = 4118; // 1 +const static uint64_t SH_FLD_CNT_EQ_TRIGGER_FROM_HWD_LEN = 4119; // 1 +const static uint64_t SH_FLD_CNT_EQ_TRIGGER_FROM_IPI = 4120; // 1 +const static uint64_t SH_FLD_CNT_EQ_TRIGGER_FROM_IPI_LEN = 4121; // 1 +const static uint64_t SH_FLD_CNT_EQ_TRIGGER_FROM_REDIS = 4122; // 1 +const static uint64_t SH_FLD_CNT_EQ_TRIGGER_FROM_REDIS_LEN = 4123; // 1 +const static uint64_t SH_FLD_CNT_EQ_TRIG_CACHE_HIT = 4124; // 1 +const static uint64_t SH_FLD_CNT_EQ_TRIG_CACHE_HIT_LEN = 4125; // 1 +const static uint64_t SH_FLD_CNT_ESCALATE = 4126; // 1 +const static uint64_t SH_FLD_CNT_ESCALATE_LEN = 4127; // 1 +const static uint64_t SH_FLD_CNT_FIFO_FULL = 4128; // 6 +const static uint64_t SH_FLD_CNT_FIFO_FULL_LEN = 4129; // 6 +const static uint64_t SH_FLD_CNT_GROUP = 4130; // 1 +const static uint64_t SH_FLD_CNT_GROUP_LEN = 4131; // 1 +const static uint64_t SH_FLD_CNT_HWD_DOES_PRF_IVE = 4132; // 1 +const static uint64_t SH_FLD_CNT_HWD_DOES_PRF_IVE_LEN = 4133; // 1 +const static uint64_t SH_FLD_CNT_IPI_DOES_DEM_IVE = 4134; // 1 +const static uint64_t SH_FLD_CNT_IPI_DOES_DEM_IVE_LEN = 4135; // 1 +const static uint64_t SH_FLD_CNT_IPI_DOES_DEM_IVE_SBC = 4136; // 1 +const static uint64_t SH_FLD_CNT_IPI_DOES_DEM_IVE_SBC_LEN = 4137; // 1 +const static uint64_t SH_FLD_CNT_IPI_DOES_PRF_IVE = 4138; // 1 +const static uint64_t SH_FLD_CNT_IPI_DOES_PRF_IVE_LEN = 4139; // 1 +const static uint64_t SH_FLD_CNT_IPI_DOES_PRF_IVE_SBC = 4140; // 1 +const static uint64_t SH_FLD_CNT_IPI_DOES_PRF_IVE_SBC_LEN = 4141; // 1 +const static uint64_t SH_FLD_CNT_ISB_FETCH = 4142; // 1 +const static uint64_t SH_FLD_CNT_ISB_FETCH_LEN = 4143; // 1 +const static uint64_t SH_FLD_CNT_ISB_FETCH_REPLAY = 4144; // 1 +const static uint64_t SH_FLD_CNT_ISB_FETCH_REPLAY_LEN = 4145; // 1 +const static uint64_t SH_FLD_CNT_ISB_WRITE = 4146; // 1 +const static uint64_t SH_FLD_CNT_ISB_WRITE_LEN = 4147; // 1 +const static uint64_t SH_FLD_CNT_IVC_DEMAND = 4148; // 1 +const static uint64_t SH_FLD_CNT_IVC_DEMAND_LEN = 4149; // 1 +const static uint64_t SH_FLD_CNT_IVC_PRF = 4150; // 1 +const static uint64_t SH_FLD_CNT_IVC_PRF_LEN = 4151; // 1 +const static uint64_t SH_FLD_CNT_IVC_RESP_REPLAY = 4152; // 1 +const static uint64_t SH_FLD_CNT_IVC_RESP_REPLAY_LEN = 4153; // 1 +const static uint64_t SH_FLD_CNT_IVE_FETCH = 4154; // 1 +const static uint64_t SH_FLD_CNT_IVE_FETCH_LEN = 4155; // 1 +const static uint64_t SH_FLD_CNT_IVE_FETCH_REPLAY = 4156; // 1 +const static uint64_t SH_FLD_CNT_IVE_FETCH_REPLAY_LEN = 4157; // 1 +const static uint64_t SH_FLD_CNT_IVVC_RESP = 4158; // 1 +const static uint64_t SH_FLD_CNT_IVVC_RESP_LEN = 4159; // 1 +const static uint64_t SH_FLD_CNT_LOCAL_ESCALATE = 4160; // 1 +const static uint64_t SH_FLD_CNT_LOCAL_ESCALATE_LEN = 4161; // 1 +const static uint64_t SH_FLD_CNT_LOCAL_ESC_CACHE_HIT = 4162; // 1 +const static uint64_t SH_FLD_CNT_LOCAL_ESC_CACHE_HIT_LEN = 4163; // 1 +const static uint64_t SH_FLD_CNT_LOCAL_ESC_REPLAY = 4164; // 1 +const static uint64_t SH_FLD_CNT_LOCAL_ESC_REPLAY_LEN = 4165; // 1 +const static uint64_t SH_FLD_CNT_LOCAL_SBC_REPLAY = 4166; // 1 +const static uint64_t SH_FLD_CNT_LOCAL_SBC_REPLAY_LEN = 4167; // 1 +const static uint64_t SH_FLD_CNT_LOCAL_SBC_UPD = 4168; // 1 +const static uint64_t SH_FLD_CNT_LOCAL_SBC_UPD_LEN = 4169; // 1 +const static uint64_t SH_FLD_CNT_LOCAL_VPC_REPLAY = 4170; // 1 +const static uint64_t SH_FLD_CNT_LOCAL_VPC_REPLAY_LEN = 4171; // 1 +const static uint64_t SH_FLD_CNT_LOCAL_VPC_UPD = 4172; // 1 +const static uint64_t SH_FLD_CNT_LOCAL_VPC_UPD_LEN = 4173; // 1 +const static uint64_t SH_FLD_CNT_LS = 4174; // 1 +const static uint64_t SH_FLD_CNT_LS_LEN = 4175; // 1 +const static uint64_t SH_FLD_CNT_NEW_CMD_STALLED = 4176; // 1 +const static uint64_t SH_FLD_CNT_NEW_CMD_STALLED_LEN = 4177; // 1 +const static uint64_t SH_FLD_CNT_NON_SPEC_EOI = 4178; // 1 +const static uint64_t SH_FLD_CNT_NON_SPEC_EOI_LEN = 4179; // 1 +const static uint64_t SH_FLD_CNT_NON_SPEC_EOI_NOTOWNED = 4180; // 1 +const static uint64_t SH_FLD_CNT_NON_SPEC_EOI_NOTOWNED_LEN = 4181; // 1 +const static uint64_t SH_FLD_CNT_NON_SPEC_EOI_OWNED = 4182; // 1 +const static uint64_t SH_FLD_CNT_NON_SPEC_EOI_OWNED_LEN = 4183; // 1 +const static uint64_t SH_FLD_CNT_OTHER_CACHE_HIT = 4184; // 1 +const static uint64_t SH_FLD_CNT_OTHER_CACHE_HIT_LEN = 4185; // 1 +const static uint64_t SH_FLD_CNT_PRF_CACHE_HIT = 4186; // 2 +const static uint64_t SH_FLD_CNT_PRF_CACHE_HIT_LEN = 4187; // 2 +const static uint64_t SH_FLD_CNT_R0 = 4188; // 3 +const static uint64_t SH_FLD_CNT_R0_LEN = 4189; // 3 +const static uint64_t SH_FLD_CNT_R10R = 4190; // 3 +const static uint64_t SH_FLD_CNT_R10R_LEN = 4191; // 3 +const static uint64_t SH_FLD_CNT_R10W = 4192; // 3 +const static uint64_t SH_FLD_CNT_R10W_LEN = 4193; // 3 +const static uint64_t SH_FLD_CNT_R1R = 4194; // 3 +const static uint64_t SH_FLD_CNT_R1R_LEN = 4195; // 3 +const static uint64_t SH_FLD_CNT_R1W = 4196; // 3 +const static uint64_t SH_FLD_CNT_R1W_LEN = 4197; // 3 +const static uint64_t SH_FLD_CNT_R2 = 4198; // 3 +const static uint64_t SH_FLD_CNT_R2_LEN = 4199; // 3 +const static uint64_t SH_FLD_CNT_R3 = 4200; // 3 +const static uint64_t SH_FLD_CNT_R3_LEN = 4201; // 3 +const static uint64_t SH_FLD_CNT_R4 = 4202; // 3 +const static uint64_t SH_FLD_CNT_R4_LEN = 4203; // 3 +const static uint64_t SH_FLD_CNT_R5R = 4204; // 3 +const static uint64_t SH_FLD_CNT_R5R_LEN = 4205; // 3 +const static uint64_t SH_FLD_CNT_R5W = 4206; // 3 +const static uint64_t SH_FLD_CNT_R5W_LEN = 4207; // 3 +const static uint64_t SH_FLD_CNT_R6 = 4208; // 3 +const static uint64_t SH_FLD_CNT_R6_LEN = 4209; // 3 +const static uint64_t SH_FLD_CNT_R7EQP = 4210; // 3 +const static uint64_t SH_FLD_CNT_R7EQP_LEN = 4211; // 3 +const static uint64_t SH_FLD_CNT_R7INT = 4212; // 3 +const static uint64_t SH_FLD_CNT_R7INT_LEN = 4213; // 3 +const static uint64_t SH_FLD_CNT_R7RSP = 4214; // 3 +const static uint64_t SH_FLD_CNT_R7RSP_LEN = 4215; // 3 +const static uint64_t SH_FLD_CNT_R8 = 4216; // 3 +const static uint64_t SH_FLD_CNT_R8_LEN = 4217; // 3 +const static uint64_t SH_FLD_CNT_R9 = 4218; // 3 +const static uint64_t SH_FLD_CNT_R9_LEN = 4219; // 3 +const static uint64_t SH_FLD_CNT_REMOTE_CI_LOAD_REPLAY = 4220; // 1 +const static uint64_t SH_FLD_CNT_REMOTE_CI_LOAD_REPLAY_LEN = 4221; // 1 +const static uint64_t SH_FLD_CNT_REMOTE_SBC_UPD = 4222; // 1 +const static uint64_t SH_FLD_CNT_REMOTE_SBC_UPD_LEN = 4223; // 1 +const static uint64_t SH_FLD_CNT_REMOTE_VPC_UPD = 4224; // 1 +const static uint64_t SH_FLD_CNT_REMOTE_VPC_UPD_LEN = 4225; // 1 +const static uint64_t SH_FLD_CNT_REPLAY = 4226; // 1 +const static uint64_t SH_FLD_CNT_REPLAY_LEN = 4227; // 1 +const static uint64_t SH_FLD_CNT_RETRY = 4228; // 2 +const static uint64_t SH_FLD_CNT_RETRY_LEN = 4229; // 2 +const static uint64_t SH_FLD_CNT_SBC_LOOKUP = 4230; // 1 +const static uint64_t SH_FLD_CNT_SBC_LOOKUP_LEN = 4231; // 1 +const static uint64_t SH_FLD_CNT_SBC_LOOKUP_REPLAY = 4232; // 1 +const static uint64_t SH_FLD_CNT_SBC_LOOKUP_REPLAY_LEN = 4233; // 1 +const static uint64_t SH_FLD_CNT_SPEC_EOI = 4234; // 1 +const static uint64_t SH_FLD_CNT_SPEC_EOI_CACHE_HIT = 4235; // 1 +const static uint64_t SH_FLD_CNT_SPEC_EOI_CACHE_HIT_LEN = 4236; // 1 +const static uint64_t SH_FLD_CNT_SPEC_EOI_LEN = 4237; // 1 +const static uint64_t SH_FLD_CNT_TOO_MANY_ENTRIES = 4238; // 2 +const static uint64_t SH_FLD_CNT_TOO_MANY_ENTRIES_LEN = 4239; // 2 +const static uint64_t SH_FLD_CNT_TRIG_DROPPED = 4240; // 6 +const static uint64_t SH_FLD_CNT_TRIG_DROPPED_LEN = 4241; // 6 +const static uint64_t SH_FLD_CNT_TRIG_FROM_AIB = 4242; // 6 +const static uint64_t SH_FLD_CNT_TRIG_FROM_AIB_LEN = 4243; // 6 +const static uint64_t SH_FLD_CNT_TRIG_FWD_TO_EQC = 4244; // 6 +const static uint64_t SH_FLD_CNT_TRIG_FWD_TO_EQC_LEN = 4245; // 6 +const static uint64_t SH_FLD_CNT_USE_L2_DIVIDER_EN = 4246; // 12 +const static uint64_t SH_FLD_CNT_VICTIM_IS_1ST_USABLE = 4247; // 2 +const static uint64_t SH_FLD_CNT_VICTIM_IS_1ST_USABLE_LEN = 4248; // 2 +const static uint64_t SH_FLD_CNT_VICTIM_IS_FIRST_USABLE = 4249; // 1 +const static uint64_t SH_FLD_CNT_VICTIM_IS_FIRST_USABLE_LEN = 4250; // 1 +const static uint64_t SH_FLD_CNT_VICTIM_IS_LRU = 4251; // 3 +const static uint64_t SH_FLD_CNT_VICTIM_IS_LRU_LEN = 4252; // 3 +const static uint64_t SH_FLD_CNT_VP = 4253; // 1 +const static uint64_t SH_FLD_CNT_VP_LEN = 4254; // 1 +const static uint64_t SH_FLD_CNT_WAKEUP = 4255; // 1 +const static uint64_t SH_FLD_CNT_WAKEUP_LEN = 4256; // 1 +const static uint64_t SH_FLD_COARSE_CAL_STEP_SIZE = 4257; // 8 +const static uint64_t SH_FLD_COARSE_CAL_STEP_SIZE_LEN = 4258; // 8 +const static uint64_t SH_FLD_COARSE_DIR_ENABLE = 4259; // 2 +const static uint64_t SH_FLD_COARSE_DIR_SECTORS = 4260; // 2 +const static uint64_t SH_FLD_COARSE_RD = 4261; // 8 +const static uint64_t SH_FLD_COFSM_ADDR_ERR = 4262; // 12 +const static uint64_t SH_FLD_COL4_BIT_MAP = 4263; // 8 +const static uint64_t SH_FLD_COL4_BIT_MAP_LEN = 4264; // 8 +const static uint64_t SH_FLD_COL5_BIT_MAP = 4265; // 8 +const static uint64_t SH_FLD_COL5_BIT_MAP_LEN = 4266; // 8 +const static uint64_t SH_FLD_COL6_BIT_MAP = 4267; // 8 +const static uint64_t SH_FLD_COL6_BIT_MAP_LEN = 4268; // 8 +const static uint64_t SH_FLD_COL7_BIT_MAP = 4269; // 8 +const static uint64_t SH_FLD_COL7_BIT_MAP_LEN = 4270; // 8 +const static uint64_t SH_FLD_COL8_BIT_MAP = 4271; // 8 +const static uint64_t SH_FLD_COL8_BIT_MAP_LEN = 4272; // 8 +const static uint64_t SH_FLD_COL9_BIT_MAP = 4273; // 8 +const static uint64_t SH_FLD_COL9_BIT_MAP_LEN = 4274; // 8 +const static uint64_t SH_FLD_COLLISION_MODES = 4275; // 4 +const static uint64_t SH_FLD_COLLISION_MODES_LEN = 4276; // 4 +const static uint64_t SH_FLD_COLLISON = 4277; // 1 +const static uint64_t SH_FLD_COMMAND_ADDRESS_TIMEOUT = 4278; // 10 +const static uint64_t SH_FLD_COMMAND_COMPLETE = 4279; // 1 +const static uint64_t SH_FLD_COMMAND_LIST_TIMEOUT = 4280; // 4 +const static uint64_t SH_FLD_COMMAND_LIST_TIMEOUT_SPEC = 4281; // 4 +const static uint64_t SH_FLD_COMMAND_PATTERN_TO_COUNT = 4282; // 8 +const static uint64_t SH_FLD_COMMAND_PATTERN_TO_COUNT_LEN = 4283; // 8 +const static uint64_t SH_FLD_COMMON_FREEZE_MODE = 4284; // 2 +const static uint64_t SH_FLD_COMM_ACK = 4285; // 12 +const static uint64_t SH_FLD_COMM_NACK = 4286; // 12 +const static uint64_t SH_FLD_COMM_RECV = 4287; // 12 +const static uint64_t SH_FLD_COMM_RECVD = 4288; // 12 +const static uint64_t SH_FLD_COMM_RECV_LEN = 4289; // 12 +const static uint64_t SH_FLD_COMM_SEND = 4290; // 12 +const static uint64_t SH_FLD_COMM_SEND_ACK = 4291; // 12 +const static uint64_t SH_FLD_COMM_SEND_LEN = 4292; // 12 +const static uint64_t SH_FLD_COMM_SEND_NACK = 4293; // 12 +const static uint64_t SH_FLD_COMPLETE = 4294; // 8 +const static uint64_t SH_FLD_COMPLETE_LEN = 4295; // 8 +const static uint64_t SH_FLD_COMPRESSED_RSP_ENA = 4296; // 6 +const static uint64_t SH_FLD_COND_STARTUP_TEST_FAIL = 4297; // 1 +const static uint64_t SH_FLD_CONFIG = 4298; // 1 +const static uint64_t SH_FLD_CONFIG1_RESERVED0 = 4299; // 3 +const static uint64_t SH_FLD_CONFIG1_RESERVED1 = 4300; // 15 +const static uint64_t SH_FLD_CONFIG1_RESERVED1_LEN = 4301; // 3 +const static uint64_t SH_FLD_CONFIG1_RESERVED2 = 4302; // 15 +const static uint64_t SH_FLD_CONFIG1_RESERVED2_LEN = 4303; // 3 +const static uint64_t SH_FLD_CONFIG_ADDR = 4304; // 84 +const static uint64_t SH_FLD_CONFIG_ADDR_LEN = 4305; // 84 +const static uint64_t SH_FLD_CONFIG_ADR_BAR_MODE = 4306; // 15 +const static uint64_t SH_FLD_CONFIG_ARMWF_ADD = 4307; // 12 +const static uint64_t SH_FLD_CONFIG_ARMWF_AND = 4308; // 12 +const static uint64_t SH_FLD_CONFIG_ARMWF_CAS_E = 4309; // 12 +const static uint64_t SH_FLD_CONFIG_ARMWF_CAS_IMAX_S = 4310; // 12 +const static uint64_t SH_FLD_CONFIG_ARMWF_CAS_IMAX_U = 4311; // 12 +const static uint64_t SH_FLD_CONFIG_ARMWF_CAS_IMIN_S = 4312; // 12 +const static uint64_t SH_FLD_CONFIG_ARMWF_CAS_IMIN_U = 4313; // 12 +const static uint64_t SH_FLD_CONFIG_ARMWF_CAS_U = 4314; // 12 +const static uint64_t SH_FLD_CONFIG_ARMWF_OR = 4315; // 12 +const static uint64_t SH_FLD_CONFIG_ARMWF_XOR = 4316; // 12 +const static uint64_t SH_FLD_CONFIG_ARMW_ADD = 4317; // 12 +const static uint64_t SH_FLD_CONFIG_ARMW_AND = 4318; // 12 +const static uint64_t SH_FLD_CONFIG_ARMW_CAS_IMAX_S = 4319; // 12 +const static uint64_t SH_FLD_CONFIG_ARMW_CAS_IMAX_U = 4320; // 12 +const static uint64_t SH_FLD_CONFIG_ARMW_CAS_IMIN_S = 4321; // 12 +const static uint64_t SH_FLD_CONFIG_ARMW_CAS_IMIN_U = 4322; // 12 +const static uint64_t SH_FLD_CONFIG_ARMW_OR = 4323; // 12 +const static uint64_t SH_FLD_CONFIG_ARMW_XOR = 4324; // 12 +const static uint64_t SH_FLD_CONFIG_BRAZOS = 4325; // 1 +const static uint64_t SH_FLD_CONFIG_BRAZOS_MODE = 4326; // 15 +const static uint64_t SH_FLD_CONFIG_CHGRATE_HANG_SLOWDOWN = 4327; // 12 +const static uint64_t SH_FLD_CONFIG_CHGRATE_HANG_SLOWDOWN_LEN = 4328; // 12 +const static uint64_t SH_FLD_CONFIG_CL_DMA_INJ = 4329; // 12 +const static uint64_t SH_FLD_CONFIG_CL_DMA_W = 4330; // 12 +const static uint64_t SH_FLD_CONFIG_CL_DMA_W_HP = 4331; // 12 +const static uint64_t SH_FLD_CONFIG_DCACHE_MODE = 4332; // 12 +const static uint64_t SH_FLD_CONFIG_DCACHE_REPORTS_PHYSICAL = 4333; // 12 +const static uint64_t SH_FLD_CONFIG_DISABLE_G = 4334; // 12 +const static uint64_t SH_FLD_CONFIG_DISABLE_INJECT = 4335; // 12 +const static uint64_t SH_FLD_CONFIG_DISABLE_LN = 4336; // 12 +const static uint64_t SH_FLD_CONFIG_DISABLE_NN_RN = 4337; // 12 +const static uint64_t SH_FLD_CONFIG_DISABLE_VG_NOT_SYS = 4338; // 12 +const static uint64_t SH_FLD_CONFIG_DMA_PR_W = 4339; // 12 +const static uint64_t SH_FLD_CONFIG_ENABLE = 4340; // 84 +const static uint64_t SH_FLD_CONFIG_ENABLE_MACHINE_ALLOC = 4341; // 12 +const static uint64_t SH_FLD_CONFIG_ENABLE_PBUS = 4342; // 12 +const static uint64_t SH_FLD_CONFIG_ENABLE_SNARF_CPM = 4343; // 12 +const static uint64_t SH_FLD_CONFIG_EVAPORATE_BY_LCO = 4344; // 12 +const static uint64_t SH_FLD_CONFIG_GEN_HEAD_DELAY = 4345; // 3 +const static uint64_t SH_FLD_CONFIG_GEN_HEAD_DELAY_LEN = 4346; // 3 +const static uint64_t SH_FLD_CONFIG_GRANULE = 4347; // 24 +const static uint64_t SH_FLD_CONFIG_INC_PRI_MASK = 4348; // 12 +const static uint64_t SH_FLD_CONFIG_INC_PRI_MASK_LEN = 4349; // 12 +const static uint64_t SH_FLD_CONFIG_L2L3NCU = 4350; // 12 +const static uint64_t SH_FLD_CONFIG_LEN = 4351; // 1 +const static uint64_t SH_FLD_CONFIG_MACH_CORRENAB = 4352; // 12 +const static uint64_t SH_FLD_CONFIG_MACH_INJECT_ENABLE1 = 4353; // 12 +const static uint64_t SH_FLD_CONFIG_MACH_INJECT_ENABLE2 = 4354; // 12 +const static uint64_t SH_FLD_CONFIG_MA_DSA_OPT_CLAIM_UR = 4355; // 12 +const static uint64_t SH_FLD_CONFIG_MA_DSA_OPT_DMA_UPG = 4356; // 12 +const static uint64_t SH_FLD_CONFIG_MA_DSA_OPT_FLUSH_UR = 4357; // 12 +const static uint64_t SH_FLD_CONFIG_MA_DSA_OPT_RP_MODE = 4358; // 12 +const static uint64_t SH_FLD_CONFIG_MA_MCRESP_OPT_RTY_DMA = 4359; // 12 +const static uint64_t SH_FLD_CONFIG_MA_MCRESP_OPT_RTY_INJ = 4360; // 12 +const static uint64_t SH_FLD_CONFIG_MA_MCRESP_OPT_WRP = 4361; // 12 +const static uint64_t SH_FLD_CONFIG_MA_RSNOOP_OPT_B = 4362; // 12 +const static uint64_t SH_FLD_CONFIG_MA_RSNOOP_OPT_C = 4363; // 12 +const static uint64_t SH_FLD_CONFIG_MA_RSNOOP_OPT_DCLAIM = 4364; // 12 +const static uint64_t SH_FLD_CONFIG_MA_RSNOOP_OPT_DCLAIM_LEN = 4365; // 12 +const static uint64_t SH_FLD_CONFIG_MA_SCRESP_OPT_A = 4366; // 12 +const static uint64_t SH_FLD_CONFIG_MA_SCRESP_OPT_B = 4367; // 12 +const static uint64_t SH_FLD_CONFIG_MA_SCRESP_OPT_C = 4368; // 12 +const static uint64_t SH_FLD_CONFIG_MEMTYPE = 4369; // 24 +const static uint64_t SH_FLD_CONFIG_MEMTYPE_LEN = 4370; // 24 +const static uint64_t SH_FLD_CONFIG_MODE = 4371; // 24 +const static uint64_t SH_FLD_CONFIG_MODE_LEN = 4372; // 24 +const static uint64_t SH_FLD_CONFIG_MRBGP_DIS_DYN_ADJ = 4373; // 3 +const static uint64_t SH_FLD_CONFIG_MRBGP_DIS_DYN_LVL_ADJ = 4374; // 3 +const static uint64_t SH_FLD_CONFIG_MRBGP_DIV2_COUNT_AT_EXP = 4375; // 3 +const static uint64_t SH_FLD_CONFIG_MRBGP_MAX_LEVEL = 4376; // 3 +const static uint64_t SH_FLD_CONFIG_MRBGP_MAX_LEVEL_LEN = 4377; // 3 +const static uint64_t SH_FLD_CONFIG_MRBGP_THRESH1 = 4378; // 3 +const static uint64_t SH_FLD_CONFIG_MRBGP_THRESH1_LEN = 4379; // 3 +const static uint64_t SH_FLD_CONFIG_MRBGP_THRESH2 = 4380; // 3 +const static uint64_t SH_FLD_CONFIG_MRBGP_THRESH2_LEN = 4381; // 3 +const static uint64_t SH_FLD_CONFIG_MRBGP_TRACK_ALL = 4382; // 12 +const static uint64_t SH_FLD_CONFIG_MRBSP_DIS_DYN_ADJ = 4383; // 3 +const static uint64_t SH_FLD_CONFIG_MRBSP_DIS_DYN_LVL_ADJ = 4384; // 3 +const static uint64_t SH_FLD_CONFIG_MRBSP_DIV2_COUNT_AT_EXP = 4385; // 3 +const static uint64_t SH_FLD_CONFIG_MRBSP_MAX_LEVEL = 4386; // 3 +const static uint64_t SH_FLD_CONFIG_MRBSP_MAX_LEVEL_LEN = 4387; // 3 +const static uint64_t SH_FLD_CONFIG_MRBSP_THRESH1 = 4388; // 3 +const static uint64_t SH_FLD_CONFIG_MRBSP_THRESH1_LEN = 4389; // 3 +const static uint64_t SH_FLD_CONFIG_MRBSP_THRESH2 = 4390; // 3 +const static uint64_t SH_FLD_CONFIG_MRBSP_THRESH2_LEN = 4391; // 3 +const static uint64_t SH_FLD_CONFIG_MRBSP_TRACK_ALL = 4392; // 12 +const static uint64_t SH_FLD_CONFIG_NPU = 4393; // 12 +const static uint64_t SH_FLD_CONFIG_NX = 4394; // 12 +const static uint64_t SH_FLD_CONFIG_PARITY = 4395; // 43 +const static uint64_t SH_FLD_CONFIG_PCIE = 4396; // 12 +const static uint64_t SH_FLD_CONFIG_PCIE_LEN = 4397; // 12 +const static uint64_t SH_FLD_CONFIG_PRB0 = 4398; // 24 +const static uint64_t SH_FLD_CONFIG_PRB0_LEN = 4399; // 24 +const static uint64_t SH_FLD_CONFIG_PRB1 = 4400; // 24 +const static uint64_t SH_FLD_CONFIG_PRB1_LEN = 4401; // 24 +const static uint64_t SH_FLD_CONFIG_PREALLOC2_PRB0 = 4402; // 12 +const static uint64_t SH_FLD_CONFIG_PREALLOC2_PRB1 = 4403; // 12 +const static uint64_t SH_FLD_CONFIG_PREALLOC2_REQ0 = 4404; // 12 +const static uint64_t SH_FLD_CONFIG_PREALLOC2_REQ1 = 4405; // 12 +const static uint64_t SH_FLD_CONFIG_PREALLOC2_XATS = 4406; // 12 +const static uint64_t SH_FLD_CONFIG_PR_DMA_INJ = 4407; // 12 +const static uint64_t SH_FLD_CONFIG_PWR0 = 4408; // 24 +const static uint64_t SH_FLD_CONFIG_PWR0_LEN = 4409; // 24 +const static uint64_t SH_FLD_CONFIG_PWR1 = 4410; // 24 +const static uint64_t SH_FLD_CONFIG_PWR1_LEN = 4411; // 24 +const static uint64_t SH_FLD_CONFIG_RANDOM_BACKOFF_DUR_MASK = 4412; // 12 +const static uint64_t SH_FLD_CONFIG_RANDOM_BACKOFF_DUR_MASK_LEN = 4413; // 12 +const static uint64_t SH_FLD_CONFIG_REQ0 = 4414; // 24 +const static uint64_t SH_FLD_CONFIG_REQ0_LEN = 4415; // 24 +const static uint64_t SH_FLD_CONFIG_REQ1 = 4416; // 24 +const static uint64_t SH_FLD_CONFIG_REQ1_LEN = 4417; // 24 +const static uint64_t SH_FLD_CONFIG_RESERVED4 = 4418; // 12 +const static uint64_t SH_FLD_CONFIG_RSI_CORRENAB = 4419; // 12 +const static uint64_t SH_FLD_CONFIG_RSI_INJECT_ENABLE1 = 4420; // 12 +const static uint64_t SH_FLD_CONFIG_RSI_INJECT_ENABLE2 = 4421; // 12 +const static uint64_t SH_FLD_CONFIG_RXO_CORRENAB = 4422; // 12 +const static uint64_t SH_FLD_CONFIG_RXO_INJECT_ENABLE1 = 4423; // 12 +const static uint64_t SH_FLD_CONFIG_RXO_INJECT_ENABLE2 = 4424; // 12 +const static uint64_t SH_FLD_CONFIG_SIZE = 4425; // 24 +const static uint64_t SH_FLD_CONFIG_SIZE_LEN = 4426; // 24 +const static uint64_t SH_FLD_CONFIG_SKIP_G = 4427; // 12 +const static uint64_t SH_FLD_CONFIG_SYNC_WAIT = 4428; // 1 +const static uint64_t SH_FLD_CONFIG_SYNC_WAIT_LEN = 4429; // 1 +const static uint64_t SH_FLD_CONFIG_VAS = 4430; // 12 +const static uint64_t SH_FLD_CONFIG_XATS = 4431; // 24 +const static uint64_t SH_FLD_CONFIG_XATS_LEN = 4432; // 24 +const static uint64_t SH_FLD_CONFIRMED = 4433; // 64 +const static uint64_t SH_FLD_CONFLICT = 4434; // 1 +const static uint64_t SH_FLD_CONG = 4435; // 1 +const static uint64_t SH_FLD_CONG_LEN = 4436; // 1 +const static uint64_t SH_FLD_CONSEQ_PASS = 4437; // 8 +const static uint64_t SH_FLD_CONSEQ_PASS_LEN = 4438; // 8 +const static uint64_t SH_FLD_CONSUMED_BUF_COUNT = 4439; // 1 +const static uint64_t SH_FLD_CONSUMED_BUF_COUNT_LEN = 4440; // 1 +const static uint64_t SH_FLD_CONTENT = 4441; // 3 +const static uint64_t SH_FLD_CONTENT_LEN = 4442; // 3 +const static uint64_t SH_FLD_CONTINUOUS = 4443; // 2 +const static uint64_t SH_FLD_CONTROL = 4444; // 15 +const static uint64_t SH_FLD_CONTROL_ERR = 4445; // 24 +const static uint64_t SH_FLD_CONTROL_LEN = 4446; // 15 +const static uint64_t SH_FLD_CONTROL_N = 4447; // 2 +const static uint64_t SH_FLD_CONVERGED_END_COUNT = 4448; // 6 +const static uint64_t SH_FLD_CONVERGED_END_COUNT_LEN = 4449; // 6 +const static uint64_t SH_FLD_COPY_CKE_TO_SPARE_CKE = 4450; // 2 +const static uint64_t SH_FLD_COPY_LENGTH = 4451; // 2 +const static uint64_t SH_FLD_COPY_LENGTH_LEN = 4452; // 2 +const static uint64_t SH_FLD_CORE0_REQ_ACTIVE = 4453; // 12 +const static uint64_t SH_FLD_CORE1_REQ_ACTIVE = 4454; // 12 +const static uint64_t SH_FLD_COREID = 4455; // 1 +const static uint64_t SH_FLD_COREID_LEN = 4456; // 1 +const static uint64_t SH_FLD_CORES_ENABLED = 4457; // 1 +const static uint64_t SH_FLD_CORES_ENABLED_LEN = 4458; // 1 +const static uint64_t SH_FLD_CORE_CHECKSTOP = 4459; // 12 +const static uint64_t SH_FLD_CORE_CLK_SB_PULSE_MODE = 4460; // 6 +const static uint64_t SH_FLD_CORE_CLK_SB_PULSE_MODE_EN = 4461; // 6 +const static uint64_t SH_FLD_CORE_CLK_SB_PULSE_MODE_LEN = 4462; // 6 +const static uint64_t SH_FLD_CORE_CLK_SB_SPARE = 4463; // 6 +const static uint64_t SH_FLD_CORE_CLK_SB_STRENGTH = 4464; // 6 +const static uint64_t SH_FLD_CORE_CLK_SB_STRENGTH_LEN = 4465; // 6 +const static uint64_t SH_FLD_CORE_CLK_SW_RESCLK = 4466; // 6 +const static uint64_t SH_FLD_CORE_CLK_SW_RESCLK_LEN = 4467; // 6 +const static uint64_t SH_FLD_CORE_CLK_SW_SPARE = 4468; // 6 +const static uint64_t SH_FLD_CORE_CONFIG = 4469; // 2 +const static uint64_t SH_FLD_CORE_CONFIG_LEN = 4470; // 2 +const static uint64_t SH_FLD_CORE_EXT_INTR = 4471; // 1 +const static uint64_t SH_FLD_CORE_OR_SNP_REQ_ACTIVE = 4472; // 12 +const static uint64_t SH_FLD_CORE_RESET = 4473; // 1 +const static uint64_t SH_FLD_CORE_STEP = 4474; // 1 +const static uint64_t SH_FLD_CORE_STEP_SYNC_TX_ENABLE = 4475; // 1 +const static uint64_t SH_FLD_CORE_STEP_SYNC_TX_SYNC_DISABLE = 4476; // 1 +const static uint64_t SH_FLD_CORE_STEP_SYNC_TX_TRIGGER = 4477; // 1 +const static uint64_t SH_FLD_CORR_DIS_BR = 4478; // 3 +const static uint64_t SH_FLD_CORR_DIS_IR = 4479; // 3 +const static uint64_t SH_FLD_CORR_DIS_OR = 4480; // 3 +const static uint64_t SH_FLD_CORR_DIS_PR = 4481; // 3 +const static uint64_t SH_FLD_CORR_DIS_PT = 4482; // 3 +const static uint64_t SH_FLD_CORR_ERR = 4483; // 1 +const static uint64_t SH_FLD_COUNT = 4484; // 44 +const static uint64_t SH_FLD_COUNTER = 4485; // 43 +const static uint64_t SH_FLD_COUNTER0 = 4486; // 16 +const static uint64_t SH_FLD_COUNTER0_LEN = 4487; // 16 +const static uint64_t SH_FLD_COUNTER1 = 4488; // 16 +const static uint64_t SH_FLD_COUNTER1_LEN = 4489; // 16 +const static uint64_t SH_FLD_COUNTER2 = 4490; // 16 +const static uint64_t SH_FLD_COUNTER2_LEN = 4491; // 16 +const static uint64_t SH_FLD_COUNTER3 = 4492; // 16 +const static uint64_t SH_FLD_COUNTER3_LEN = 4493; // 16 +const static uint64_t SH_FLD_COUNTERA_0 = 4494; // 2 +const static uint64_t SH_FLD_COUNTERA_0_LEN = 4495; // 2 +const static uint64_t SH_FLD_COUNTERA_1 = 4496; // 2 +const static uint64_t SH_FLD_COUNTERA_1_LEN = 4497; // 2 +const static uint64_t SH_FLD_COUNTERA_2 = 4498; // 2 +const static uint64_t SH_FLD_COUNTERA_2_LEN = 4499; // 2 +const static uint64_t SH_FLD_COUNTERA_3 = 4500; // 2 +const static uint64_t SH_FLD_COUNTERA_3_LEN = 4501; // 2 +const static uint64_t SH_FLD_COUNTERB_0 = 4502; // 2 +const static uint64_t SH_FLD_COUNTERB_0_LEN = 4503; // 2 +const static uint64_t SH_FLD_COUNTERB_1 = 4504; // 2 +const static uint64_t SH_FLD_COUNTERB_1_LEN = 4505; // 2 +const static uint64_t SH_FLD_COUNTERB_2 = 4506; // 2 +const static uint64_t SH_FLD_COUNTERB_2_LEN = 4507; // 2 +const static uint64_t SH_FLD_COUNTERB_3 = 4508; // 2 +const static uint64_t SH_FLD_COUNTERB_3_LEN = 4509; // 2 +const static uint64_t SH_FLD_COUNTER_LEN = 4510; // 43 +const static uint64_t SH_FLD_COUNTER_LOAD_FLAG = 4511; // 2 +const static uint64_t SH_FLD_COUNTER_LOAD_VALUE = 4512; // 2 +const static uint64_t SH_FLD_COUNTER_LOAD_VALUE_LEN = 4513; // 2 +const static uint64_t SH_FLD_COUNTER_VALUE = 4514; // 1 +const static uint64_t SH_FLD_COUNTER_VALUE_LEN = 4515; // 1 +const static uint64_t SH_FLD_COUNT_0_47 = 4516; // 7 +const static uint64_t SH_FLD_COUNT_0_47_LEN = 4517; // 7 +const static uint64_t SH_FLD_COUNT_47 = 4518; // 1 +const static uint64_t SH_FLD_COUNT_47_LEN = 4519; // 1 +const static uint64_t SH_FLD_COUNT_LEN = 4520; // 44 +const static uint64_t SH_FLD_COUNT_STATE_MASK = 4521; // 43 +const static uint64_t SH_FLD_COURSE_DIR_FLUSH_FAILED = 4522; // 2 +const static uint64_t SH_FLD_CO_MACHINE_HANG_ERR = 4523; // 12 +const static uint64_t SH_FLD_CO_PROT_ERR_CHK_DIS = 4524; // 1 +const static uint64_t SH_FLD_CO_TIMEOUT_CHK_DIS = 4525; // 1 +const static uint64_t SH_FLD_CO_UNSOLICITED_CRESP_ERR = 4526; // 12 +const static uint64_t SH_FLD_CO_UNSOLICITED_CRESP_ERR_LEN = 4527; // 12 +const static uint64_t SH_FLD_CP = 4528; // 2 +const static uint64_t SH_FLD_CPG = 4529; // 8 +const static uint64_t SH_FLD_CPHA = 4530; // 1 +const static uint64_t SH_FLD_CPISEL = 4531; // 20 +const static uint64_t SH_FLD_CPISEL_LEN = 4532; // 20 +const static uint64_t SH_FLD_CPI_TYPE = 4533; // 12 +const static uint64_t SH_FLD_CPI_TYPE_LEN = 4534; // 12 +const static uint64_t SH_FLD_CPLITE = 4535; // 2 +const static uint64_t SH_FLD_CPLITE_LEN = 4536; // 2 +const static uint64_t SH_FLD_CPLTMASK0 = 4537; // 43 +const static uint64_t SH_FLD_CPLTMASK0_LEN = 4538; // 43 +const static uint64_t SH_FLD_CPM_CAL_SET = 4539; // 43 +const static uint64_t SH_FLD_CPOL = 4540; // 1 +const static uint64_t SH_FLD_CPS = 4541; // 1 +const static uint64_t SH_FLD_CPS_LEN = 4542; // 1 +const static uint64_t SH_FLD_CP_LEN = 4543; // 2 +const static uint64_t SH_FLD_CP_RETRY_THRESH = 4544; // 4 +const static uint64_t SH_FLD_CP_RETRY_THRESH_LEN = 4545; // 4 +const static uint64_t SH_FLD_CQ_CERR_BITS = 4546; // 1 +const static uint64_t SH_FLD_CQ_CERR_BITS_LEN = 4547; // 1 +const static uint64_t SH_FLD_CQ_CERR_RESET = 4548; // 1 +const static uint64_t SH_FLD_CQ_DRAIN_THRESHOLD = 4549; // 1 +const static uint64_t SH_FLD_CQ_DRAIN_THRESHOLD_LEN = 4550; // 1 +const static uint64_t SH_FLD_CQ_ECC_CE_ERROR = 4551; // 2 +const static uint64_t SH_FLD_CQ_ECC_SUE_ERROR = 4552; // 2 +const static uint64_t SH_FLD_CQ_ECC_UE_ERROR = 4553; // 2 +const static uint64_t SH_FLD_CQ_FILL_THRESHOLD = 4554; // 1 +const static uint64_t SH_FLD_CQ_FILL_THRESHOLD_LEN = 4555; // 1 +const static uint64_t SH_FLD_CQ_LFSR_RESEED_EN = 4556; // 1 +const static uint64_t SH_FLD_CQ_LOGIC_HW_ERROR = 4557; // 2 +const static uint64_t SH_FLD_CQ_PB_LINK_ABORT = 4558; // 2 +const static uint64_t SH_FLD_CQ_PB_MASTER_FSM_HANG = 4559; // 2 +const static uint64_t SH_FLD_CQ_PB_OB_CE_ERROR = 4560; // 2 +const static uint64_t SH_FLD_CQ_PB_OB_UE_ERROR = 4561; // 2 +const static uint64_t SH_FLD_CQ_PB_PARITY_ERROR = 4562; // 2 +const static uint64_t SH_FLD_CQ_PB_RD_ADDR_ERROR = 4563; // 2 +const static uint64_t SH_FLD_CQ_PB_RD_LINK_ERROR = 4564; // 2 +const static uint64_t SH_FLD_CQ_PB_WR_ADDR_ERROR = 4565; // 2 +const static uint64_t SH_FLD_CQ_PB_WR_LINK_ERROR = 4566; // 2 +const static uint64_t SH_FLD_CQ_READ_RTY_RATIO = 4567; // 1 +const static uint64_t SH_FLD_CQ_READ_RTY_RATIO_LEN = 4568; // 1 +const static uint64_t SH_FLD_CQ_TRACE_GROUP_SEL_HI = 4569; // 1 +const static uint64_t SH_FLD_CQ_TRACE_GROUP_SEL_HI_LEN = 4570; // 1 +const static uint64_t SH_FLD_CQ_TRACE_GROUP_SEL_LO = 4571; // 1 +const static uint64_t SH_FLD_CQ_TRACE_GROUP_SEL_LO_LEN = 4572; // 1 +const static uint64_t SH_FLD_CQ_TRACE_TRIGGER_SEL_01 = 4573; // 1 +const static uint64_t SH_FLD_CQ_TRACE_TRIGGER_SEL_01_LEN = 4574; // 1 +const static uint64_t SH_FLD_CQ_TRACE_TRIGGER_SEL_23 = 4575; // 1 +const static uint64_t SH_FLD_CQ_TRACE_TRIGGER_SEL_23_LEN = 4576; // 1 +const static uint64_t SH_FLD_CR0_ATAG_PERR = 4577; // 1 +const static uint64_t SH_FLD_CR0_TTAG_PERR = 4578; // 1 +const static uint64_t SH_FLD_CR1_ATAG_PERR = 4579; // 1 +const static uint64_t SH_FLD_CR1_TTAG_PERR = 4580; // 1 +const static uint64_t SH_FLD_CR2_ATAG_PERR = 4581; // 1 +const static uint64_t SH_FLD_CR2_TTAG_PERR = 4582; // 1 +const static uint64_t SH_FLD_CR3_ATAG_PERR = 4583; // 1 +const static uint64_t SH_FLD_CR3_TTAG_PERR = 4584; // 1 +const static uint64_t SH_FLD_CRB_ECC_SUE = 4585; // 1 +const static uint64_t SH_FLD_CRB_ECC_UE = 4586; // 1 +const static uint64_t SH_FLD_CRB_READS_ENBL = 4587; // 1 +const static uint64_t SH_FLD_CRB_READS_HALTED = 4588; // 1 +const static uint64_t SH_FLD_CRC_MODE = 4589; // 2 +const static uint64_t SH_FLD_CRD_REQUEST = 4590; // 1 +const static uint64_t SH_FLD_CREDIT_CUR = 4591; // 36 +const static uint64_t SH_FLD_CREDIT_CUR_LEN = 4592; // 36 +const static uint64_t SH_FLD_CREDIT_MAX = 4593; // 36 +const static uint64_t SH_FLD_CREDIT_MAX_LEN = 4594; // 36 +const static uint64_t SH_FLD_CREDIT_RCV_CUR = 4595; // 12 +const static uint64_t SH_FLD_CREDIT_RCV_CUR_LEN = 4596; // 12 +const static uint64_t SH_FLD_CREDIT_RCV_UPD = 4597; // 12 +const static uint64_t SH_FLD_CREDIT_SEND = 4598; // 36 +const static uint64_t SH_FLD_CREDIT_SEND_LEN = 4599; // 36 +const static uint64_t SH_FLD_CREDIT_UPD = 4600; // 36 +const static uint64_t SH_FLD_CREDIT_UPDATE_PENDING = 4601; // 6 +const static uint64_t SH_FLD_CREQ_AE_ALWAYS = 4602; // 6 +const static uint64_t SH_FLD_CREQ_BE_128 = 4603; // 6 +const static uint64_t SH_FLD_CRESP_0_4 = 4604; // 1 +const static uint64_t SH_FLD_CRESP_0_4_LEN = 4605; // 1 +const static uint64_t SH_FLD_CRESP_ATAG_P_ERR = 4606; // 12 +const static uint64_t SH_FLD_CRESP_ATAG_P_ERR_LEN = 4607; // 12 +const static uint64_t SH_FLD_CRESP_HANG = 4608; // 1 +const static uint64_t SH_FLD_CRESP_TTAG_P_ERR = 4609; // 12 +const static uint64_t SH_FLD_CRESP_TTAG_P_ERR_LEN = 4610; // 12 +const static uint64_t SH_FLD_CRITICAL_INTERRUPT = 4611; // 1 +const static uint64_t SH_FLD_CR_ATAG_PAR = 4612; // 1 +const static uint64_t SH_FLD_CR_TTAG_PAR = 4613; // 1 +const static uint64_t SH_FLD_CS0_INIT_CAL_VALUE = 4614; // 8 +const static uint64_t SH_FLD_CS1_INIT_CAL_VALUE = 4615; // 8 +const static uint64_t SH_FLD_CS2_INIT_CAL_VALUE = 4616; // 8 +const static uint64_t SH_FLD_CS3_INIT_CAL_VALUE = 4617; // 8 +const static uint64_t SH_FLD_CS4_INIT_CAL_VALUE = 4618; // 8 +const static uint64_t SH_FLD_CS5_INIT_CAL_VALUE = 4619; // 8 +const static uint64_t SH_FLD_CS6_INIT_CAL_VALUE = 4620; // 8 +const static uint64_t SH_FLD_CS7_INIT_CAL_VALUE = 4621; // 8 +const static uint64_t SH_FLD_CSEL = 4622; // 10 +const static uint64_t SH_FLD_CSEL_LEN = 4623; // 10 +const static uint64_t SH_FLD_CS_CHIP_ID_2N_MODE = 4624; // 2 +const static uint64_t SH_FLD_CTLE_GAIN_MAX = 4625; // 6 +const static uint64_t SH_FLD_CTLE_GAIN_MAX_LEN = 4626; // 6 +const static uint64_t SH_FLD_CTLE_UPDATE_MODE = 4627; // 6 +const static uint64_t SH_FLD_CTLR_HP_THRESH = 4628; // 3 +const static uint64_t SH_FLD_CTLR_HP_THRESH_LEN = 4629; // 3 +const static uint64_t SH_FLD_CTLW_HP_THRESH = 4630; // 3 +const static uint64_t SH_FLD_CTLW_HP_THRESH_LEN = 4631; // 3 +const static uint64_t SH_FLD_CTL_ADDR_ERR_ESR = 4632; // 1 +const static uint64_t SH_FLD_CTL_ARRAY_CE = 4633; // 1 +const static uint64_t SH_FLD_CTL_ARRAY_UE = 4634; // 1 +const static uint64_t SH_FLD_CTL_FWD_PROGRESS_ERR = 4635; // 1 +const static uint64_t SH_FLD_CTL_LOGIC_ERR = 4636; // 1 +const static uint64_t SH_FLD_CTL_MMIO_ST_DATA_UE = 4637; // 1 +const static uint64_t SH_FLD_CTL_NVL_CFG_ERR = 4638; // 1 +const static uint64_t SH_FLD_CTL_NVL_FATAL_ERR = 4639; // 1 +const static uint64_t SH_FLD_CTL_PBUS_CONFIG_ERR = 4640; // 1 +const static uint64_t SH_FLD_CTL_PBUS_FATAL_ERR = 4641; // 1 +const static uint64_t SH_FLD_CTL_PBUS_PERR = 4642; // 1 +const static uint64_t SH_FLD_CTL_PBUS_RECOV_ERR = 4643; // 1 +const static uint64_t SH_FLD_CTL_PEST_DIS = 4644; // 1 +const static uint64_t SH_FLD_CTL_RING_ERR = 4645; // 1 +const static uint64_t SH_FLD_CTL_SM_0 = 4646; // 6 +const static uint64_t SH_FLD_CTL_SM_1 = 4647; // 6 +const static uint64_t SH_FLD_CTL_SM_2 = 4648; // 6 +const static uint64_t SH_FLD_CTL_SM_3 = 4649; // 6 +const static uint64_t SH_FLD_CTL_SM_4 = 4650; // 6 +const static uint64_t SH_FLD_CTL_SM_5 = 4651; // 6 +const static uint64_t SH_FLD_CTL_SM_6 = 4652; // 6 +const static uint64_t SH_FLD_CTL_SM_7 = 4653; // 6 +const static uint64_t SH_FLD_CTL_TICK = 4654; // 12 +const static uint64_t SH_FLD_CTL_TICK_LEN = 4655; // 12 +const static uint64_t SH_FLD_CTL_TRACE_EN = 4656; // 1 +const static uint64_t SH_FLD_CTL_TRACE_SEL = 4657; // 1 +const static uint64_t SH_FLD_CTRLR_PERR_ESR = 4658; // 1 +const static uint64_t SH_FLD_CTRL_BUSY = 4659; // 1 +const static uint64_t SH_FLD_CTRL_CC_ABIST_RECOV_DISABLE_DC = 4660; // 43 +const static uint64_t SH_FLD_CTRL_CC_ABSTCLK_MUXSEL_DC = 4661; // 43 +const static uint64_t SH_FLD_CTRL_CC_DCTEST_DC = 4662; // 43 +const static uint64_t SH_FLD_CTRL_CC_FLUSHMODE_INH_DC = 4663; // 43 +const static uint64_t SH_FLD_CTRL_CC_FORCE_ALIGN_DC = 4664; // 43 +const static uint64_t SH_FLD_CTRL_CC_MASK_VITL_SCAN_OPCG_ERR_DC = 4665; // 43 +const static uint64_t SH_FLD_CTRL_CC_OFLOW_FEH_SEL_DC = 4666; // 43 +const static uint64_t SH_FLD_CTRL_CC_OTP_PRGMODE_DC = 4667; // 43 +const static uint64_t SH_FLD_CTRL_CC_PIN_LBIST_DC = 4668; // 43 +const static uint64_t SH_FLD_CTRL_CC_SCAN_PROTECT_DC = 4669; // 43 +const static uint64_t SH_FLD_CTRL_CC_SDIS_DC_N = 4670; // 43 +const static uint64_t SH_FLD_CTRL_CC_SSS_CALIBRATE_DC = 4671; // 43 +const static uint64_t SH_FLD_CTRL_EPS_MASK_VITL_PCB_ERR_DC = 4672; // 43 +const static uint64_t SH_FLD_CTRL_MISC_CLKDIV_SEL_DC = 4673; // 43 +const static uint64_t SH_FLD_CTRL_MISC_CLKDIV_SEL_DC_LEN = 4674; // 43 +const static uint64_t SH_FLD_CTRL_MISC_PROBE0_SEL_DC = 4675; // 43 +const static uint64_t SH_FLD_CTRL_MISC_PROBE0_SEL_DC_LEN = 4676; // 43 +const static uint64_t SH_FLD_CTRL_MISC_PROBE1_SEL_DC = 4677; // 43 +const static uint64_t SH_FLD_CTRL_MISC_PROBE1_SEL_DC_LEN = 4678; // 43 +const static uint64_t SH_FLD_CTRL_MISC_PROBE2_SEL_DC = 4679; // 43 +const static uint64_t SH_FLD_CTRL_MISC_PROBE2_SEL_DC_LEN = 4680; // 43 +const static uint64_t SH_FLD_CTRL_MISC_PROBE3_SEL_DC = 4681; // 43 +const static uint64_t SH_FLD_CTRL_MISC_PROBE3_SEL_DC_LEN = 4682; // 43 +const static uint64_t SH_FLD_CTRL_PARITY = 4683; // 43 +const static uint64_t SH_FLD_CT_COMPARE_VECTOR = 4684; // 2 +const static uint64_t SH_FLD_CT_COMPARE_VECTOR_LEN = 4685; // 2 +const static uint64_t SH_FLD_CURRENT_OPCG_MODE = 4686; // 43 +const static uint64_t SH_FLD_CURRENT_OPCG_MODE_LEN = 4687; // 43 +const static uint64_t SH_FLD_CUR_RD_ADDR = 4688; // 6 +const static uint64_t SH_FLD_CUR_RD_ADDR_LEN = 4689; // 6 +const static uint64_t SH_FLD_CUSTOM_INIT_WRITE = 4690; // 8 +const static uint64_t SH_FLD_CUSTOM_RD = 4691; // 8 +const static uint64_t SH_FLD_CUSTOM_WR = 4692; // 8 +const static uint64_t SH_FLD_CW_MIRROR = 4693; // 8 +const static uint64_t SH_FLD_CW_TYPE = 4694; // 12 +const static uint64_t SH_FLD_CW_TYPE_LEN = 4695; // 12 +const static uint64_t SH_FLD_CYCLECNT = 4696; // 3 +const static uint64_t SH_FLD_CYCLECNT_LEN = 4697; // 3 +const static uint64_t SH_FLD_CYCLES = 4698; // 12 +const static uint64_t SH_FLD_CYCLES_LEN = 4699; // 12 +const static uint64_t SH_FLD_CYCLE_COUNT = 4700; // 24 +const static uint64_t SH_FLD_CYCLE_COUNT_LEN = 4701; // 24 +const static uint64_t SH_FLD_C_ERR_RPT_HOLD_DATA = 4702; // 2 +const static uint64_t SH_FLD_C_ERR_RPT_HOLD_DATA_LEN = 4703; // 2 +const static uint64_t SH_FLD_D2K_SPEC_FILTER_COUNTER_LFSR_DEC_SELECT = 4704; // 4 +const static uint64_t SH_FLD_D2K_SPEC_FILTER_COUNTER_LFSR_DEC_SELECT_LEN = 4705; // 4 +const static uint64_t SH_FLD_D2K_SPEC_FILTER_COUNTER_LFSR_INC_SELECT = 4706; // 4 +const static uint64_t SH_FLD_D2K_SPEC_FILTER_COUNTER_LFSR_INC_SELECT_LEN = 4707; // 4 +const static uint64_t SH_FLD_DACTEST_HLMT = 4708; // 6 +const static uint64_t SH_FLD_DACTEST_HLMT_LEN = 4709; // 6 +const static uint64_t SH_FLD_DACTEST_LLMT = 4710; // 6 +const static uint64_t SH_FLD_DACTEST_LLMT_LEN = 4711; // 6 +const static uint64_t SH_FLD_DACTEST_RESET = 4712; // 6 +const static uint64_t SH_FLD_DACTEST_START = 4713; // 6 +const static uint64_t SH_FLD_DAC_BO_CFG = 4714; // 6 +const static uint64_t SH_FLD_DAC_BO_CFG_LEN = 4715; // 6 +const static uint64_t SH_FLD_DAT0 = 4716; // 1 +const static uint64_t SH_FLD_DAT0_LEN = 4717; // 1 +const static uint64_t SH_FLD_DAT1 = 4718; // 1 +const static uint64_t SH_FLD_DAT1_LEN = 4719; // 1 +const static uint64_t SH_FLD_DATA = 4720; // 201 +const static uint64_t SH_FLD_DATA0 = 4721; // 6 +const static uint64_t SH_FLD_DATA0_LEN = 4722; // 6 +const static uint64_t SH_FLD_DATA1 = 4723; // 6 +const static uint64_t SH_FLD_DATA1_LEN = 4724; // 6 +const static uint64_t SH_FLD_DATA2 = 4725; // 6 +const static uint64_t SH_FLD_DATA2_LEN = 4726; // 6 +const static uint64_t SH_FLD_DATA_0_63 = 4727; // 2 +const static uint64_t SH_FLD_DATA_0_63_LEN = 4728; // 2 +const static uint64_t SH_FLD_DATA_64_79 = 4729; // 2 +const static uint64_t SH_FLD_DATA_64_79_LEN = 4730; // 2 +const static uint64_t SH_FLD_DATA_ARB_LFSR_CONFIG = 4731; // 1 +const static uint64_t SH_FLD_DATA_ARB_LFSR_CONFIG_LEN = 4732; // 1 +const static uint64_t SH_FLD_DATA_BUFFER = 4733; // 43 +const static uint64_t SH_FLD_DATA_COMPARE_BURST_SEL = 4734; // 2 +const static uint64_t SH_FLD_DATA_COMPARE_BURST_SEL_LEN = 4735; // 2 +const static uint64_t SH_FLD_DATA_DLY = 4736; // 1 +const static uint64_t SH_FLD_DATA_DLY_LEN = 4737; // 1 +const static uint64_t SH_FLD_DATA_HANG_DETECTED = 4738; // 2 +const static uint64_t SH_FLD_DATA_HANG_POLL_SCALE = 4739; // 2 +const static uint64_t SH_FLD_DATA_HANG_POLL_SCALE_LEN = 4740; // 2 +const static uint64_t SH_FLD_DATA_LEN = 4741; // 201 +const static uint64_t SH_FLD_DATA_MUX4_1MODE = 4742; // 8 +const static uint64_t SH_FLD_DATA_PARITY_ERR = 4743; // 4 +const static uint64_t SH_FLD_DATA_PIPE_CLR_ON_READ_MODE = 4744; // 6 +const static uint64_t SH_FLD_DATA_POISON_SUE_ENA = 4745; // 6 +const static uint64_t SH_FLD_DATA_POLL_PULSE_DIV = 4746; // 12 +const static uint64_t SH_FLD_DATA_POLL_PULSE_DIV_LEN = 4747; // 12 +const static uint64_t SH_FLD_DATA_REG0 = 4748; // 8 +const static uint64_t SH_FLD_DATA_REG0_LEN = 4749; // 8 +const static uint64_t SH_FLD_DATA_REG1 = 4750; // 8 +const static uint64_t SH_FLD_DATA_REG1_LEN = 4751; // 8 +const static uint64_t SH_FLD_DATA_REG_0_31 = 4752; // 1 +const static uint64_t SH_FLD_DATA_REG_0_31_LEN = 4753; // 1 +const static uint64_t SH_FLD_DATA_REQUEST_0 = 4754; // 2 +const static uint64_t SH_FLD_DATA_REQUEST_1 = 4755; // 2 +const static uint64_t SH_FLD_DATA_REQUEST_2 = 4756; // 2 +const static uint64_t SH_FLD_DATA_REQUEST_3 = 4757; // 2 +const static uint64_t SH_FLD_DATA_RTAG_P_ERR = 4758; // 12 +const static uint64_t SH_FLD_DATA_V_LT = 4759; // 43 +const static uint64_t SH_FLD_DAT_ARR_ECC_CORR_ENA = 4760; // 6 +const static uint64_t SH_FLD_DAT_ARR_ECC_SUE_ENA = 4761; // 6 +const static uint64_t SH_FLD_DAT_BUFFER_PAR_ERR = 4762; // 4 +const static uint64_t SH_FLD_DAT_CREG_PERR = 4763; // 1 +const static uint64_t SH_FLD_DAT_DATA_BE_CE = 4764; // 1 +const static uint64_t SH_FLD_DAT_DATA_BE_CE_OVERTHRESH = 4765; // 1 +const static uint64_t SH_FLD_DAT_DATA_BE_PERR = 4766; // 1 +const static uint64_t SH_FLD_DAT_DATA_BE_UE = 4767; // 1 +const static uint64_t SH_FLD_DAT_LOGIC_ERR = 4768; // 1 +const static uint64_t SH_FLD_DAT_RTAG_PERR = 4769; // 1 +const static uint64_t SH_FLD_DAT_STATE_PERR = 4770; // 1 +const static uint64_t SH_FLD_DBG_BUS_BIT = 4771; // 8 +const static uint64_t SH_FLD_DBG_CC_ERROR = 4772; // 1 +const static uint64_t SH_FLD_DBG_CHIPLET_IS_ALIGNED = 4773; // 1 +const static uint64_t SH_FLD_DBG_CMD = 4774; // 1 +const static uint64_t SH_FLD_DBG_CMD_LEN = 4775; // 1 +const static uint64_t SH_FLD_DBG_CURRENT_OPCG_MODE = 4776; // 1 +const static uint64_t SH_FLD_DBG_CURRENT_OPCG_MODE_LEN = 4777; // 1 +const static uint64_t SH_FLD_DBG_HALT = 4778; // 1 +const static uint64_t SH_FLD_DBG_LAST_OPCG_MODE = 4779; // 1 +const static uint64_t SH_FLD_DBG_LAST_OPCG_MODE_LEN = 4780; // 1 +const static uint64_t SH_FLD_DBG_OPCG_IP = 4781; // 1 +const static uint64_t SH_FLD_DBG_PARANOIA_TEST_ENABLE_CHANGE = 4782; // 1 +const static uint64_t SH_FLD_DBG_PARANOIA_VITL_CLKOFF_CHANGE = 4783; // 1 +const static uint64_t SH_FLD_DBG_PARITY_ERROR = 4784; // 1 +const static uint64_t SH_FLD_DBG_PCB_ERROR = 4785; // 1 +const static uint64_t SH_FLD_DBG_PCB_IDLE = 4786; // 1 +const static uint64_t SH_FLD_DBG_PCB_REQUEST_SINCE_RESET = 4787; // 1 +const static uint64_t SH_FLD_DBG_PROTOCOL_ERROR = 4788; // 1 +const static uint64_t SH_FLD_DBG_REQ = 4789; // 1 +const static uint64_t SH_FLD_DBG_RESET_EP = 4790; // 1 +const static uint64_t SH_FLD_DBG_SECURITY_DEBUG_MODE = 4791; // 1 +const static uint64_t SH_FLD_DBG_SEL_IN = 4792; // 8 +const static uint64_t SH_FLD_DBG_SEL_PWCTL_DEBUG = 4793; // 8 +const static uint64_t SH_FLD_DBG_SEL_PWSEQ0_DEBUG_0 = 4794; // 8 +const static uint64_t SH_FLD_DBG_SEL_PWSEQ0_DEBUG_1 = 4795; // 8 +const static uint64_t SH_FLD_DBG_SEL_PWSEQ1_DEBUG_0 = 4796; // 8 +const static uint64_t SH_FLD_DBG_SEL_PWSEQ1_DEBUG_1 = 4797; // 8 +const static uint64_t SH_FLD_DBG_SEL_PWSEQ2_DEBUG_0 = 4798; // 8 +const static uint64_t SH_FLD_DBG_SEL_PWSEQ2_DEBUG_1 = 4799; // 8 +const static uint64_t SH_FLD_DBG_SEL_PWSEQ3_DEBUG_0 = 4800; // 8 +const static uint64_t SH_FLD_DBG_SEL_PWSEQ3_DEBUG_1 = 4801; // 8 +const static uint64_t SH_FLD_DBG_SEL_PWSEQ4_DEBUG_0 = 4802; // 8 +const static uint64_t SH_FLD_DBG_SEL_PWSEQ4_DEBUG_1 = 4803; // 8 +const static uint64_t SH_FLD_DBG_SEL_PWSEQ5_DEBUG_0 = 4804; // 8 +const static uint64_t SH_FLD_DBG_SEL_PWSEQ5_DEBUG_1 = 4805; // 8 +const static uint64_t SH_FLD_DBG_SEL_SEC_WDFRD_DEBUG_0 = 4806; // 8 +const static uint64_t SH_FLD_DBG_SEL_SEC_WDFRD_DEBUG_1 = 4807; // 8 +const static uint64_t SH_FLD_DBG_SEL_WDF = 4808; // 8 +const static uint64_t SH_FLD_DBG_SEL_WDFMGR_DEBUG = 4809; // 8 +const static uint64_t SH_FLD_DBG_SEL_WDFRD_DEBUG_0 = 4810; // 8 +const static uint64_t SH_FLD_DBG_SEL_WDFRD_DEBUG_1 = 4811; // 8 +const static uint64_t SH_FLD_DBG_SEL_WDFWR_DEBUG_0 = 4812; // 8 +const static uint64_t SH_FLD_DBG_SEL_WDFWR_DEBUG_1 = 4813; // 8 +const static uint64_t SH_FLD_DBG_STATE = 4814; // 1 +const static uint64_t SH_FLD_DBG_STATE_LEN = 4815; // 1 +const static uint64_t SH_FLD_DBG_TEST_ENABLE = 4816; // 1 +const static uint64_t SH_FLD_DBG_TP_TPFSI_ACK = 4817; // 1 +const static uint64_t SH_FLD_DBG_UNCONDITIONAL_EVENT = 4818; // 1 +const static uint64_t SH_FLD_DBG_VITL_CLKOFF = 4819; // 1 +const static uint64_t SH_FLD_DCACHE_ERR = 4820; // 4 +const static uint64_t SH_FLD_DCACHE_TAG_ADDR = 4821; // 4 +const static uint64_t SH_FLD_DCACHE_TAG_ADDR_LEN = 4822; // 4 +const static uint64_t SH_FLD_DCLKSEL = 4823; // 6 +const static uint64_t SH_FLD_DCLKSEL_LEN = 4824; // 6 +const static uint64_t SH_FLD_DCOMP_ENABLE = 4825; // 1 +const static uint64_t SH_FLD_DCOMP_ENGINE_BUSY = 4826; // 1 +const static uint64_t SH_FLD_DCOMP_ERR = 4827; // 1 +const static uint64_t SH_FLD_DCO_DECR = 4828; // 6 +const static uint64_t SH_FLD_DCO_INCR = 4829; // 6 +const static uint64_t SH_FLD_DCO_OVERRIDE = 4830; // 6 +const static uint64_t SH_FLD_DCU_RNW = 4831; // 1 +const static uint64_t SH_FLD_DCU_TIMEOUT_ERROR = 4832; // 1 +const static uint64_t SH_FLD_DC_ENABLE_CM_COARSE_CAL = 4833; // 6 +const static uint64_t SH_FLD_DC_ENABLE_CM_FINE_CAL = 4834; // 6 +const static uint64_t SH_FLD_DC_ENABLE_CTLE_1ST_LATCH_OFFSET_CAL = 4835; // 6 +const static uint64_t SH_FLD_DC_ENABLE_CTLE_2ND_LATCH_OFFSET_CAL = 4836; // 6 +const static uint64_t SH_FLD_DC_ENABLE_DAC_H1_CAL = 4837; // 4 +const static uint64_t SH_FLD_DC_ENABLE_DAC_H1_TO_A_CAL = 4838; // 4 +const static uint64_t SH_FLD_DC_ENABLE_INTEG_LATCH_OFFSET_CAL = 4839; // 6 +const static uint64_t SH_FLD_DD2_FIX_DIS = 4840; // 8 +const static uint64_t SH_FLD_DDC_CFG = 4841; // 120 +const static uint64_t SH_FLD_DDC_CFG_LEN = 4842; // 120 +const static uint64_t SH_FLD_DDC_DFE_OFFSET_SWITCH_SM = 4843; // 72 +const static uint64_t SH_FLD_DDC_DFE_OFFSET_SWITCH_SM_LEN = 4844; // 72 +const static uint64_t SH_FLD_DDC_DFE_OFFSET_SWITCH_STOP = 4845; // 72 +const static uint64_t SH_FLD_DDR4_CMD_SIG_REDUCTION = 4846; // 8 +const static uint64_t SH_FLD_DDR4_IPW_LOOP_DIS = 4847; // 8 +const static uint64_t SH_FLD_DDR4_LATENCY_SW = 4848; // 8 +const static uint64_t SH_FLD_DDR4_MRS_CMD_DQ_EN = 4849; // 8 +const static uint64_t SH_FLD_DDR4_VLEVEL_BANK_GROUP = 4850; // 8 +const static uint64_t SH_FLD_DDR_ACTN = 4851; // 64 +const static uint64_t SH_FLD_DDR_ADDRESS = 4852; // 8 +const static uint64_t SH_FLD_DDR_ADDRESS_0 = 4853; // 2 +const static uint64_t SH_FLD_DDR_ADDRESS_0_13 = 4854; // 62 +const static uint64_t SH_FLD_DDR_ADDRESS_0_13_LEN = 4855; // 62 +const static uint64_t SH_FLD_DDR_ADDRESS_0_LEN = 4856; // 2 +const static uint64_t SH_FLD_DDR_ADDRESS_14 = 4857; // 62 +const static uint64_t SH_FLD_DDR_ADDRESS_15 = 4858; // 62 +const static uint64_t SH_FLD_DDR_ADDRESS_16 = 4859; // 62 +const static uint64_t SH_FLD_DDR_ADDRESS_17 = 4860; // 62 +const static uint64_t SH_FLD_DDR_BANK_0_1 = 4861; // 64 +const static uint64_t SH_FLD_DDR_BANK_0_1_LEN = 4862; // 64 +const static uint64_t SH_FLD_DDR_BANK_2 = 4863; // 64 +const static uint64_t SH_FLD_DDR_BANK_GROUP_0 = 4864; // 64 +const static uint64_t SH_FLD_DDR_BANK_GROUP_1 = 4865; // 64 +const static uint64_t SH_FLD_DDR_CALIBRATION_ENABLE = 4866; // 64 +const static uint64_t SH_FLD_DDR_CAL_RANK = 4867; // 64 +const static uint64_t SH_FLD_DDR_CAL_RANK_LEN = 4868; // 64 +const static uint64_t SH_FLD_DDR_CAL_RESET_TIMEOUT = 4869; // 16 +const static uint64_t SH_FLD_DDR_CAL_TIMEOUT_CNT = 4870; // 2 +const static uint64_t SH_FLD_DDR_CAL_TIMEOUT_CNT_LEN = 4871; // 2 +const static uint64_t SH_FLD_DDR_CAL_TIMEOUT_CNT_MULT = 4872; // 2 +const static uint64_t SH_FLD_DDR_CAL_TIMEOUT_CNT_MULT_LEN = 4873; // 2 +const static uint64_t SH_FLD_DDR_CAL_TIMEOUT_ERR = 4874; // 16 +const static uint64_t SH_FLD_DDR_CAL_TYPE = 4875; // 64 +const static uint64_t SH_FLD_DDR_CAL_TYPE_LEN = 4876; // 64 +const static uint64_t SH_FLD_DDR_CID_0_1 = 4877; // 64 +const static uint64_t SH_FLD_DDR_CID_0_1_LEN = 4878; // 64 +const static uint64_t SH_FLD_DDR_CID_2 = 4879; // 64 +const static uint64_t SH_FLD_DDR_CKE = 4880; // 64 +const static uint64_t SH_FLD_DDR_CKE_LEN = 4881; // 64 +const static uint64_t SH_FLD_DDR_CSN_0_1 = 4882; // 64 +const static uint64_t SH_FLD_DDR_CSN_0_1_LEN = 4883; // 64 +const static uint64_t SH_FLD_DDR_CSN_2_3 = 4884; // 64 +const static uint64_t SH_FLD_DDR_CSN_2_3_LEN = 4885; // 64 +const static uint64_t SH_FLD_DDR_IF_SM_1HOT = 4886; // 8 +const static uint64_t SH_FLD_DDR_INVALID_ACCESS = 4887; // 8 +const static uint64_t SH_FLD_DDR_MBA_EVENT_N = 4888; // 16 +const static uint64_t SH_FLD_DDR_ODT = 4889; // 64 +const static uint64_t SH_FLD_DDR_ODT_LEN = 4890; // 64 +const static uint64_t SH_FLD_DDR_PARITY = 4891; // 64 +const static uint64_t SH_FLD_DDR_PARITY_ENABLE = 4892; // 2 +const static uint64_t SH_FLD_DDR_RESETN = 4893; // 64 +const static uint64_t SH_FLD_DEAD = 4894; // 43 +const static uint64_t SH_FLD_DEBUG = 4895; // 2 +const static uint64_t SH_FLD_DEBUG0_CONFIG_P = 4896; // 1 +const static uint64_t SH_FLD_DEBUG1_CONFIG_P = 4897; // 1 +const static uint64_t SH_FLD_DEBUGGER = 4898; // 25 +const static uint64_t SH_FLD_DEBUG_BOLT_ON_CONTROL_BITS = 4899; // 1 +const static uint64_t SH_FLD_DEBUG_BOLT_ON_CONTROL_BITS_LEN = 4900; // 1 +const static uint64_t SH_FLD_DEBUG_BUS_SEL = 4901; // 8 +const static uint64_t SH_FLD_DEBUG_BUS_SEL_LEN = 4902; // 8 +const static uint64_t SH_FLD_DEBUG_LEN = 4903; // 2 +const static uint64_t SH_FLD_DEBUG_OCI_MODE = 4904; // 1 +const static uint64_t SH_FLD_DEBUG_OCI_MODE_LEN = 4905; // 1 +const static uint64_t SH_FLD_DEBUG_PB_NOT_OCI = 4906; // 1 +const static uint64_t SH_FLD_DEBUG_TRIGGER = 4907; // 24 +const static uint64_t SH_FLD_DECONFIGURED_INTR = 4908; // 24 +const static uint64_t SH_FLD_DECOUPLE_EDGE_A = 4909; // 48 +const static uint64_t SH_FLD_DECOUPLE_EDGE_B = 4910; // 48 +const static uint64_t SH_FLD_DEC_EXIT_ENABLE = 4911; // 96 +const static uint64_t SH_FLD_DEEPEST_ACT_STOP_LEVEL_FSP = 4912; // 30 +const static uint64_t SH_FLD_DEEPEST_ACT_STOP_LEVEL_FSP_LEN = 4913; // 30 +const static uint64_t SH_FLD_DEEPEST_ACT_STOP_LEVEL_HYP = 4914; // 30 +const static uint64_t SH_FLD_DEEPEST_ACT_STOP_LEVEL_HYP_LEN = 4915; // 30 +const static uint64_t SH_FLD_DEEPEST_ACT_STOP_LEVEL_OCC = 4916; // 30 +const static uint64_t SH_FLD_DEEPEST_ACT_STOP_LEVEL_OCC_LEN = 4917; // 30 +const static uint64_t SH_FLD_DEEPEST_ACT_STOP_LEVEL_OTR = 4918; // 30 +const static uint64_t SH_FLD_DEEPEST_ACT_STOP_LEVEL_OTR_LEN = 4919; // 30 +const static uint64_t SH_FLD_DEEPEST_REQ_STOP_LEVEL_FSP = 4920; // 30 +const static uint64_t SH_FLD_DEEPEST_REQ_STOP_LEVEL_FSP_LEN = 4921; // 30 +const static uint64_t SH_FLD_DEEPEST_REQ_STOP_LEVEL_HYP = 4922; // 30 +const static uint64_t SH_FLD_DEEPEST_REQ_STOP_LEVEL_HYP_LEN = 4923; // 30 +const static uint64_t SH_FLD_DEEPEST_REQ_STOP_LEVEL_OCC = 4924; // 30 +const static uint64_t SH_FLD_DEEPEST_REQ_STOP_LEVEL_OCC_LEN = 4925; // 30 +const static uint64_t SH_FLD_DEEPEST_REQ_STOP_LEVEL_OTR = 4926; // 30 +const static uint64_t SH_FLD_DEEPEST_REQ_STOP_LEVEL_OTR_LEN = 4927; // 30 +const static uint64_t SH_FLD_DEF_VALUES = 4928; // 8 +const static uint64_t SH_FLD_DEF_VALUES_LEN = 4929; // 8 +const static uint64_t SH_FLD_DEGLITCH_CLK_DLY = 4930; // 1 +const static uint64_t SH_FLD_DEGLITCH_CLK_DLY_LEN = 4931; // 1 +const static uint64_t SH_FLD_DEGLITCH_DATA_DLY = 4932; // 1 +const static uint64_t SH_FLD_DEGLITCH_DATA_DLY_LEN = 4933; // 1 +const static uint64_t SH_FLD_DELAY = 4934; // 1 +const static uint64_t SH_FLD_DELAY1_ID = 4935; // 12 +const static uint64_t SH_FLD_DELAY1_ID_LEN = 4936; // 12 +const static uint64_t SH_FLD_DELAY1_VALID = 4937; // 12 +const static uint64_t SH_FLD_DELAY2_ID = 4938; // 12 +const static uint64_t SH_FLD_DELAY2_ID_LEN = 4939; // 12 +const static uint64_t SH_FLD_DELAY2_VALID = 4940; // 12 +const static uint64_t SH_FLD_DELAY3_ID = 4941; // 12 +const static uint64_t SH_FLD_DELAY3_ID_LEN = 4942; // 12 +const static uint64_t SH_FLD_DELAY3_VALID = 4943; // 12 +const static uint64_t SH_FLD_DELAY4_ID = 4944; // 12 +const static uint64_t SH_FLD_DELAY4_ID_LEN = 4945; // 12 +const static uint64_t SH_FLD_DELAY4_VALID = 4946; // 12 +const static uint64_t SH_FLD_DELAY5_ID = 4947; // 12 +const static uint64_t SH_FLD_DELAY5_ID_LEN = 4948; // 12 +const static uint64_t SH_FLD_DELAY5_VALID = 4949; // 12 +const static uint64_t SH_FLD_DELAY6_ID = 4950; // 12 +const static uint64_t SH_FLD_DELAY6_ID_LEN = 4951; // 12 +const static uint64_t SH_FLD_DELAY6_VALID = 4952; // 12 +const static uint64_t SH_FLD_DELAY7_ID = 4953; // 12 +const static uint64_t SH_FLD_DELAY7_ID_LEN = 4954; // 12 +const static uint64_t SH_FLD_DELAY7_VALID = 4955; // 12 +const static uint64_t SH_FLD_DELAY8_ID = 4956; // 12 +const static uint64_t SH_FLD_DELAY8_ID_LEN = 4957; // 12 +const static uint64_t SH_FLD_DELAY8_VALID = 4958; // 12 +const static uint64_t SH_FLD_DELAYED_PAR = 4959; // 8 +const static uint64_t SH_FLD_DELAYG = 4960; // 32 +const static uint64_t SH_FLD_DELAYG_LEN = 4961; // 32 +const static uint64_t SH_FLD_DELAY_ADJUST_DISABLE = 4962; // 1 +const static uint64_t SH_FLD_DELAY_ADJUST_VALUE = 4963; // 1 +const static uint64_t SH_FLD_DELAY_ADJUST_VALUE_LEN = 4964; // 1 +const static uint64_t SH_FLD_DELAY_DISABLE = 4965; // 1 +const static uint64_t SH_FLD_DELAY_LCLKR = 4966; // 43 +const static uint64_t SH_FLD_DELAY_LEN = 4967; // 1 +const static uint64_t SH_FLD_DELAY_LINE_CTL_OVERRIDE = 4968; // 8 +const static uint64_t SH_FLD_DEQUEUED_EOT_FLAG = 4969; // 1 +const static uint64_t SH_FLD_DESKEW_DONE = 4970; // 4 +const static uint64_t SH_FLD_DESKEW_FAILED = 4971; // 4 +const static uint64_t SH_FLD_DESKEW_MAXSKEW_GRP = 4972; // 4 +const static uint64_t SH_FLD_DESKEW_MAXSKEW_GRP_LEN = 4973; // 4 +const static uint64_t SH_FLD_DESKEW_MAX_LIMIT = 4974; // 4 +const static uint64_t SH_FLD_DESKEW_MAX_LIMIT_LEN = 4975; // 4 +const static uint64_t SH_FLD_DESKEW_MINSKEW_GRP = 4976; // 4 +const static uint64_t SH_FLD_DESKEW_MINSKEW_GRP_LEN = 4977; // 4 +const static uint64_t SH_FLD_DESKEW_RATE = 4978; // 8 +const static uint64_t SH_FLD_DESKEW_SEQ_GCRMSG = 4979; // 4 +const static uint64_t SH_FLD_DESKEW_SEQ_GCRMSG_LEN = 4980; // 4 +const static uint64_t SH_FLD_DESKEW_SKMAX_GCRMSG = 4981; // 4 +const static uint64_t SH_FLD_DESKEW_SKMAX_GCRMSG_LEN = 4982; // 4 +const static uint64_t SH_FLD_DESKEW_SKMIN_GCRMSG = 4983; // 4 +const static uint64_t SH_FLD_DESKEW_SKMIN_GCRMSG_LEN = 4984; // 4 +const static uint64_t SH_FLD_DEST = 4985; // 1 +const static uint64_t SH_FLD_DEST0 = 4986; // 15 +const static uint64_t SH_FLD_DEST0_LEN = 4987; // 15 +const static uint64_t SH_FLD_DEST1 = 4988; // 15 +const static uint64_t SH_FLD_DEST1_LEN = 4989; // 15 +const static uint64_t SH_FLD_DEST_CHIPID = 4990; // 1 +const static uint64_t SH_FLD_DEST_CHIPID_LEN = 4991; // 1 +const static uint64_t SH_FLD_DEST_GROUPID = 4992; // 1 +const static uint64_t SH_FLD_DEST_GROUPID_LEN = 4993; // 1 +const static uint64_t SH_FLD_DEST_LEN = 4994; // 1 +const static uint64_t SH_FLD_DEVICE = 4995; // 1 +const static uint64_t SH_FLD_DEVICE_ADDRESS_0 = 4996; // 1 +const static uint64_t SH_FLD_DEVICE_ADDRESS_0_LEN = 4997; // 1 +const static uint64_t SH_FLD_DEVICE_ADDRESS_1 = 4998; // 1 +const static uint64_t SH_FLD_DEVICE_ADDRESS_1_LEN = 4999; // 1 +const static uint64_t SH_FLD_DEVICE_ADDRESS_2 = 5000; // 1 +const static uint64_t SH_FLD_DEVICE_ADDRESS_2_LEN = 5001; // 1 +const static uint64_t SH_FLD_DEVICE_ADDRESS_3 = 5002; // 1 +const static uint64_t SH_FLD_DEVICE_ADDRESS_3_LEN = 5003; // 1 +const static uint64_t SH_FLD_DEVICE_ID = 5004; // 4 +const static uint64_t SH_FLD_DEVICE_ID_LEN = 5005; // 4 +const static uint64_t SH_FLD_DFE12_EN = 5006; // 4 +const static uint64_t SH_FLD_DFEHISPD_EN = 5007; // 4 +const static uint64_t SH_FLD_DFE_CA_CFG = 5008; // 6 +const static uint64_t SH_FLD_DFE_CA_CFG_LEN = 5009; // 6 +const static uint64_t SH_FLD_DFE_CONVERGED_CNT_MAX = 5010; // 6 +const static uint64_t SH_FLD_DFE_CONVERGED_CNT_MAX_LEN = 5011; // 6 +const static uint64_t SH_FLD_DGD_AE_ALWAYS = 5012; // 6 +const static uint64_t SH_FLD_DGD_BE_128 = 5013; // 6 +const static uint64_t SH_FLD_DGEN_RNDD_DATA_MAPPING = 5014; // 2 +const static uint64_t SH_FLD_DGEN_RNDD_DATA_MAPPING_LEN = 5015; // 2 +const static uint64_t SH_FLD_DGEN_RNDD_SEED0 = 5016; // 2 +const static uint64_t SH_FLD_DGEN_RNDD_SEED0_LEN = 5017; // 2 +const static uint64_t SH_FLD_DGEN_RNDD_SEED1 = 5018; // 2 +const static uint64_t SH_FLD_DGEN_RNDD_SEED1_LEN = 5019; // 2 +const static uint64_t SH_FLD_DGEN_RNDD_SEED2 = 5020; // 2 +const static uint64_t SH_FLD_DGEN_RNDD_SEED2_LEN = 5021; // 2 +const static uint64_t SH_FLD_DI1_N = 5022; // 43 +const static uint64_t SH_FLD_DI2_N = 5023; // 43 +const static uint64_t SH_FLD_DIAG = 5024; // 1 +const static uint64_t SH_FLD_DIAG_0 = 5025; // 1 +const static uint64_t SH_FLD_DIAG_1 = 5026; // 1 +const static uint64_t SH_FLD_DIAG_2 = 5027; // 1 +const static uint64_t SH_FLD_DIAG_3 = 5028; // 1 +const static uint64_t SH_FLD_DIB01_ERR = 5029; // 2 +const static uint64_t SH_FLD_DIB01_SPARE = 5030; // 1 +const static uint64_t SH_FLD_DIB01_SPARE_LEN = 5031; // 1 +const static uint64_t SH_FLD_DIB23_ERR = 5032; // 2 +const static uint64_t SH_FLD_DIB45_ERR = 5033; // 2 +const static uint64_t SH_FLD_DIB67_ERR = 5034; // 1 +const static uint64_t SH_FLD_DIB67_SPARE = 5035; // 1 +const static uint64_t SH_FLD_DIB67_SPARE_LEN = 5036; // 1 +const static uint64_t SH_FLD_DIGITAL_EYE = 5037; // 8 +const static uint64_t SH_FLD_DIRECT_ATTACH_MODE = 5038; // 4 +const static uint64_t SH_FLD_DIRECT_BRIDGE_SOURCE = 5039; // 1 +const static uint64_t SH_FLD_DIR_CE_DETECTED = 5040; // 12 +const static uint64_t SH_FLD_DIR_SBCE_REPAIR_FAILED = 5041; // 12 +const static uint64_t SH_FLD_DIR_STUCK_BIT_CE = 5042; // 12 +const static uint64_t SH_FLD_DIR_UE_DETECTED = 5043; // 12 +const static uint64_t SH_FLD_DISABLE = 5044; // 1 +const static uint64_t SH_FLD_DISABLE_1 = 5045; // 1 +const static uint64_t SH_FLD_DISABLE_1_LEN = 5046; // 1 +const static uint64_t SH_FLD_DISABLE_2 = 5047; // 1 +const static uint64_t SH_FLD_DISABLE_2K_SPEC_FILTER = 5048; // 4 +const static uint64_t SH_FLD_DISABLE_2N_MODE = 5049; // 2 +const static uint64_t SH_FLD_DISABLE_2_LEN = 5050; // 1 +const static uint64_t SH_FLD_DISABLE_ALL_SPEC_OPS = 5051; // 4 +const static uint64_t SH_FLD_DISABLE_BANK_PDWN = 5052; // 2 +const static uint64_t SH_FLD_DISABLE_BYPASS_IN_READ_DATAFLOW = 5053; // 4 +const static uint64_t SH_FLD_DISABLE_CENTAUR_BAD_CRESP = 5054; // 4 +const static uint64_t SH_FLD_DISABLE_CENTAUR_CMD_PREFETCH = 5055; // 4 +const static uint64_t SH_FLD_DISABLE_CENTAUR_CMD_PREFETCH_LEN = 5056; // 4 +const static uint64_t SH_FLD_DISABLE_CHARB_BYPASS = 5057; // 4 +const static uint64_t SH_FLD_DISABLE_CHECKSTOP = 5058; // 1 +const static uint64_t SH_FLD_DISABLE_CI = 5059; // 4 +const static uint64_t SH_FLD_DISABLE_CI_LEN = 5060; // 4 +const static uint64_t SH_FLD_DISABLE_CL_AO_QUEUES = 5061; // 4 +const static uint64_t SH_FLD_DISABLE_COMMAND_BYPASS = 5062; // 4 +const static uint64_t SH_FLD_DISABLE_COMMAND_BYPASS_LEN = 5063; // 4 +const static uint64_t SH_FLD_DISABLE_CRC_ECC_BYPASS = 5064; // 4 +const static uint64_t SH_FLD_DISABLE_CRC_ECC_BYPASS_LEN = 5065; // 4 +const static uint64_t SH_FLD_DISABLE_CRC_ECC_FP_BYPASS = 5066; // 4 +const static uint64_t SH_FLD_DISABLE_DROPABLE = 5067; // 8 +const static uint64_t SH_FLD_DISABLE_ECC = 5068; // 1 +const static uint64_t SH_FLD_DISABLE_ECC_ARRAY_CHK = 5069; // 2 +const static uint64_t SH_FLD_DISABLE_ECC_ARRAY_CORRECTION = 5070; // 2 +const static uint64_t SH_FLD_DISABLE_ECC_CHK = 5071; // 1 +const static uint64_t SH_FLD_DISABLE_ECC_CORRECTION = 5072; // 1 +const static uint64_t SH_FLD_DISABLE_ECC_COR_GXC_PSI = 5073; // 1 +const static uint64_t SH_FLD_DISABLE_ECC_COR_RXRF_PSI = 5074; // 1 +const static uint64_t SH_FLD_DISABLE_ECC_COR_TXRF_PSI = 5075; // 1 +const static uint64_t SH_FLD_DISABLE_ERR_CMD = 5076; // 1 +const static uint64_t SH_FLD_DISABLE_EXTRA_FIFO_ACCESSES = 5077; // 1 +const static uint64_t SH_FLD_DISABLE_EXTRA_HASH_ACCESSES = 5078; // 1 +const static uint64_t SH_FLD_DISABLE_FAR_HISTORY = 5079; // 1 +const static uint64_t SH_FLD_DISABLE_FASTPATH = 5080; // 4 +const static uint64_t SH_FLD_DISABLE_FENCE_RESET = 5081; // 4 +const static uint64_t SH_FLD_DISABLE_FLOW_SCOPE = 5082; // 1 +const static uint64_t SH_FLD_DISABLE_FP_COMMAND_BYPASS = 5083; // 4 +const static uint64_t SH_FLD_DISABLE_FP_M_BIT = 5084; // 4 +const static uint64_t SH_FLD_DISABLE_G = 5085; // 1 +const static uint64_t SH_FLD_DISABLE_G_RD = 5086; // 1 +const static uint64_t SH_FLD_DISABLE_G_WR = 5087; // 1 +const static uint64_t SH_FLD_DISABLE_H1_CLEAR = 5088; // 6 +const static uint64_t SH_FLD_DISABLE_HIGH_PRIORITY = 5089; // 4 +const static uint64_t SH_FLD_DISABLE_HIGH_PRIORITY_LEN = 5090; // 4 +const static uint64_t SH_FLD_DISABLE_HIT_UNDER_BARRIER = 5091; // 1 +const static uint64_t SH_FLD_DISABLE_HTM_CMD = 5092; // 1 +const static uint64_t SH_FLD_DISABLE_INJECT = 5093; // 1 +const static uint64_t SH_FLD_DISABLE_LFSR = 5094; // 1 +const static uint64_t SH_FLD_DISABLE_LN = 5095; // 1 +const static uint64_t SH_FLD_DISABLE_LN_RD = 5096; // 1 +const static uint64_t SH_FLD_DISABLE_LN_WR = 5097; // 1 +const static uint64_t SH_FLD_DISABLE_LPC_CMDS = 5098; // 3 +const static uint64_t SH_FLD_DISABLE_MDI0 = 5099; // 4 +const static uint64_t SH_FLD_DISABLE_MDI0_LEN = 5100; // 4 +const static uint64_t SH_FLD_DISABLE_MEMCTL_CAL = 5101; // 8 +const static uint64_t SH_FLD_DISABLE_NEAR_HISTORY = 5102; // 1 +const static uint64_t SH_FLD_DISABLE_NN_RD = 5103; // 1 +const static uint64_t SH_FLD_DISABLE_NN_RN = 5104; // 1 +const static uint64_t SH_FLD_DISABLE_NN_WR = 5105; // 1 +const static uint64_t SH_FLD_DISABLE_PARITY_CHECKER = 5106; // 8 +const static uint64_t SH_FLD_DISABLE_PCB_ITR = 5107; // 43 +const static uint64_t SH_FLD_DISABLE_PERFMON_RESET_ON_START = 5108; // 4 +const static uint64_t SH_FLD_DISABLE_PMISC = 5109; // 3 +const static uint64_t SH_FLD_DISABLE_PMU_SNOOPING = 5110; // 1 +const static uint64_t SH_FLD_DISABLE_PTAG_IN_AIBTAG = 5111; // 1 +const static uint64_t SH_FLD_DISABLE_RCMD_CLKGATE = 5112; // 3 +const static uint64_t SH_FLD_DISABLE_RESET_2K_COUNT_IF_HINT_BIT_SET = 5113; // 4 +const static uint64_t SH_FLD_DISABLE_RETRY_LOST_CLAIM = 5114; // 4 +const static uint64_t SH_FLD_DISABLE_SHARD_PRESP_ABORT = 5115; // 4 +const static uint64_t SH_FLD_DISABLE_SPEC_DISABLE_HINT_BIT = 5116; // 4 +const static uint64_t SH_FLD_DISABLE_SPEC_OP = 5117; // 4 +const static uint64_t SH_FLD_DISABLE_SPEC_OP_LEN = 5118; // 4 +const static uint64_t SH_FLD_DISABLE_SPEC_SOURCE_SCOPE = 5119; // 4 +const static uint64_t SH_FLD_DISABLE_SPEC_SOURCE_SCOPE_LEN = 5120; // 4 +const static uint64_t SH_FLD_DISABLE_STICKINESS = 5121; // 43 +const static uint64_t SH_FLD_DISABLE_TIMEOUT_AND_RETRY = 5122; // 1 +const static uint64_t SH_FLD_DISABLE_TOD_CMD = 5123; // 1 +const static uint64_t SH_FLD_DISABLE_TRACE_CMD = 5124; // 1 +const static uint64_t SH_FLD_DISABLE_VG_NOT_SYS = 5125; // 1 +const static uint64_t SH_FLD_DISABLE_VG_RD = 5126; // 1 +const static uint64_t SH_FLD_DISABLE_VG_WR = 5127; // 1 +const static uint64_t SH_FLD_DISABLE_WRP = 5128; // 1 +const static uint64_t SH_FLD_DISABLE_XSCOM_CMD = 5129; // 1 +const static uint64_t SH_FLD_DISPATCH_SLOT_KILLED_CNT = 5130; // 1 +const static uint64_t SH_FLD_DISPATCH_SLOT_KILLED_CNT_LEN = 5131; // 1 +const static uint64_t SH_FLD_DISTRIBUTION_BROADCAST_MODE_ENABLE = 5132; // 1 +const static uint64_t SH_FLD_DISTR_STEP_SYNC_TX_DISABLE = 5133; // 1 +const static uint64_t SH_FLD_DISTR_STEP_SYNC_TX_SYNC_DISABLE = 5134; // 1 +const static uint64_t SH_FLD_DISTR_STEP_SYNC_TX_TRIGGER = 5135; // 1 +const static uint64_t SH_FLD_DIS_AIB_IN_ECC_CORRECTION = 5136; // 1 +const static uint64_t SH_FLD_DIS_ARX_ECC_CORRECTION = 5137; // 1 +const static uint64_t SH_FLD_DIS_AT_SRAM_ECC_CORRECTION = 5138; // 1 +const static uint64_t SH_FLD_DIS_BAR_SRAM_ECC_CORRECTION = 5139; // 1 +const static uint64_t SH_FLD_DIS_CHGRATE_COUNT = 5140; // 1 +const static uint64_t SH_FLD_DIS_CPM_BUBBLE_CORR = 5141; // 43 +const static uint64_t SH_FLD_DIS_CTRLBUF_ECC_CORRECTION = 5142; // 1 +const static uint64_t SH_FLD_DIS_DATA_ECC_CORRECTION = 5143; // 3 +const static uint64_t SH_FLD_DIS_DATA_ECC_CORRECTION_LEN = 5144; // 3 +const static uint64_t SH_FLD_DIS_DMA_W = 5145; // 1 +const static uint64_t SH_FLD_DIS_ECCCHK = 5146; // 1 +const static uint64_t SH_FLD_DIS_ECCCHK_CLO = 5147; // 1 +const static uint64_t SH_FLD_DIS_ECCCHK_IN = 5148; // 1 +const static uint64_t SH_FLD_DIS_ECCCHK_LDO = 5149; // 1 +const static uint64_t SH_FLD_DIS_ECCCHK_STO = 5150; // 1 +const static uint64_t SH_FLD_DIS_ECCCHK_WRO = 5151; // 1 +const static uint64_t SH_FLD_DIS_GLOB_SCOM = 5152; // 2 +const static uint64_t SH_FLD_DIS_IRQ_ECC_CORRECTION = 5153; // 1 +const static uint64_t SH_FLD_DIS_MASTER_RD_PIPE = 5154; // 1 +const static uint64_t SH_FLD_DIS_MASTER_WR_PIPE = 5155; // 1 +const static uint64_t SH_FLD_DIS_MSTID_MATCH_PREF_INV = 5156; // 1 +const static uint64_t SH_FLD_DIS_NCNP = 5157; // 1 +const static uint64_t SH_FLD_DIS_REARB = 5158; // 1 +const static uint64_t SH_FLD_DIS_RECOVERY = 5159; // 24 +const static uint64_t SH_FLD_DIS_REREQUEST_TO = 5160; // 1 +const static uint64_t SH_FLD_DIS_SLAVE_RDPIPE = 5161; // 1 +const static uint64_t SH_FLD_DIS_SLAVE_WRPIPE = 5162; // 1 +const static uint64_t SH_FLD_DIS_STATE_ECC_CORRECTION = 5163; // 3 +const static uint64_t SH_FLD_DIS_STATE_ECC_CORRECTION_LEN = 5164; // 1 +const static uint64_t SH_FLD_DIS_TAG_ECC_CORRECTION = 5165; // 3 +const static uint64_t SH_FLD_DIS_TAG_ECC_CORRECTION_LEN = 5166; // 3 +const static uint64_t SH_FLD_DIS_TAG_SRAM_ECC_CORRECTION = 5167; // 1 +const static uint64_t SH_FLD_DIS_TRACE = 5168; // 24 +const static uint64_t SH_FLD_DIS_TRACE_EXTRA = 5169; // 17 +const static uint64_t SH_FLD_DIS_TRACE_STALL = 5170; // 17 +const static uint64_t SH_FLD_DIS_WRITE_GATHER = 5171; // 4 +const static uint64_t SH_FLD_DIVIDER_MODE = 5172; // 12 +const static uint64_t SH_FLD_DIVIDER_MODE_LEN = 5173; // 12 +const static uint64_t SH_FLD_DIVSELB = 5174; // 10 +const static uint64_t SH_FLD_DIVSELB_LEN = 5175; // 10 +const static uint64_t SH_FLD_DIVSELFB = 5176; // 10 +const static uint64_t SH_FLD_DIVSELFB_LEN = 5177; // 10 +const static uint64_t SH_FLD_DIV_PARITY = 5178; // 43 +const static uint64_t SH_FLD_DLL = 5179; // 8 +const static uint64_t SH_FLD_DLL_CLOCK_GATE = 5180; // 8 +const static uint64_t SH_FLD_DMAP_MODE_EN = 5181; // 2 +const static uint64_t SH_FLD_DMA_CH0_IDLE = 5182; // 1 +const static uint64_t SH_FLD_DMA_CH1_IDLE = 5183; // 1 +const static uint64_t SH_FLD_DMA_CH2_IDLE = 5184; // 1 +const static uint64_t SH_FLD_DMA_CH3_IDLE = 5185; // 1 +const static uint64_t SH_FLD_DMA_CH4_IDLE = 5186; // 1 +const static uint64_t SH_FLD_DMA_CRBARRAY_ACTION = 5187; // 1 +const static uint64_t SH_FLD_DMA_CRBARRAY_ENA = 5188; // 1 +const static uint64_t SH_FLD_DMA_CRBARRAY_SELECT = 5189; // 1 +const static uint64_t SH_FLD_DMA_CRBARRAY_TYPE = 5190; // 1 +const static uint64_t SH_FLD_DMA_EGRARRAY_ACTION = 5191; // 1 +const static uint64_t SH_FLD_DMA_EGRARRAY_ENA = 5192; // 1 +const static uint64_t SH_FLD_DMA_EGRARRAY_SELECT = 5193; // 1 +const static uint64_t SH_FLD_DMA_EGRARRAY_SELECT_LEN = 5194; // 1 +const static uint64_t SH_FLD_DMA_EGRARRAY_TYPE = 5195; // 1 +const static uint64_t SH_FLD_DMA_INGARRAY_ACTION = 5196; // 1 +const static uint64_t SH_FLD_DMA_INGARRAY_ENA = 5197; // 1 +const static uint64_t SH_FLD_DMA_INGARRAY_SELECT = 5198; // 1 +const static uint64_t SH_FLD_DMA_INGARRAY_SELECT_LEN = 5199; // 1 +const static uint64_t SH_FLD_DMA_INGARRAY_TYPE = 5200; // 1 +const static uint64_t SH_FLD_DMA_INWR_ACTION = 5201; // 1 +const static uint64_t SH_FLD_DMA_INWR_ENA = 5202; // 1 +const static uint64_t SH_FLD_DMA_INWR_TYPE = 5203; // 1 +const static uint64_t SH_FLD_DMA_MUX_SELECT = 5204; // 1 +const static uint64_t SH_FLD_DMA_MUX_SELECT_LEN = 5205; // 1 +const static uint64_t SH_FLD_DMA_OUTWR_ACTION = 5206; // 1 +const static uint64_t SH_FLD_DMA_OUTWR_ENA = 5207; // 1 +const static uint64_t SH_FLD_DMA_OUTWR_TYPE = 5208; // 1 +const static uint64_t SH_FLD_DMA_PARTIAL_WRT_NOT_INJECT = 5209; // 1 +const static uint64_t SH_FLD_DMA_PART_WR_NOT_INJ = 5210; // 1 +const static uint64_t SH_FLD_DMA_RD_DISABLE_GROUP = 5211; // 1 +const static uint64_t SH_FLD_DMA_RD_DISABLE_LN = 5212; // 1 +const static uint64_t SH_FLD_DMA_RD_DISABLE_NN_RN = 5213; // 1 +const static uint64_t SH_FLD_DMA_RD_DISABLE_VG_NOT_SYS = 5214; // 1 +const static uint64_t SH_FLD_DMA_RD_VG_RESET_TIMER_MASK = 5215; // 1 +const static uint64_t SH_FLD_DMA_RD_VG_RESET_TIMER_MASK_LEN = 5216; // 1 +const static uint64_t SH_FLD_DMA_RD_VG_RST_TMASK = 5217; // 1 +const static uint64_t SH_FLD_DMA_RD_VG_RST_TMASK_LEN = 5218; // 1 +const static uint64_t SH_FLD_DMA_READ = 5219; // 3 +const static uint64_t SH_FLD_DMA_READ_LEN = 5220; // 3 +const static uint64_t SH_FLD_DMA_STOPPED_STATE = 5221; // 32 +const static uint64_t SH_FLD_DMA_STOPPED_STATE_LEN = 5222; // 16 +const static uint64_t SH_FLD_DMA_TIMER_ENBL = 5223; // 1 +const static uint64_t SH_FLD_DMA_TIMER_REF_DIV = 5224; // 1 +const static uint64_t SH_FLD_DMA_TIMER_REF_DIV_LEN = 5225; // 1 +const static uint64_t SH_FLD_DMA_WRITE = 5226; // 3 +const static uint64_t SH_FLD_DMA_WRITE_LEN = 5227; // 2 +const static uint64_t SH_FLD_DMA_WR_DISABLE_GROUP = 5228; // 1 +const static uint64_t SH_FLD_DMA_WR_DISABLE_LN = 5229; // 1 +const static uint64_t SH_FLD_DMA_WR_DISABLE_NN_RN = 5230; // 1 +const static uint64_t SH_FLD_DMA_WR_DISABLE_VG_NOT_SYS = 5231; // 1 +const static uint64_t SH_FLD_DMA_WR_NOT_INJ = 5232; // 1 +const static uint64_t SH_FLD_DMA_WR_NOT_INJECT = 5233; // 1 +const static uint64_t SH_FLD_DMA_WR_VG_RESET_TIMER_MASK = 5234; // 1 +const static uint64_t SH_FLD_DMA_WR_VG_RESET_TIMER_MASK_LEN = 5235; // 1 +const static uint64_t SH_FLD_DMA_WR_VG_RST_TMASK = 5236; // 1 +const static uint64_t SH_FLD_DMA_WR_VG_RST_TMASK_LEN = 5237; // 1 +const static uint64_t SH_FLD_DNFIFO_DEQUEUED_EOT_FLAG = 5238; // 1 +const static uint64_t SH_FLD_DNFIFO_FIFO_EMPTY = 5239; // 1 +const static uint64_t SH_FLD_DNFIFO_FIFO_ENTRY_COUNT = 5240; // 1 +const static uint64_t SH_FLD_DNFIFO_FIFO_ENTRY_COUNT_LEN = 5241; // 1 +const static uint64_t SH_FLD_DNFIFO_FIFO_EOT_FLAGS = 5242; // 1 +const static uint64_t SH_FLD_DNFIFO_FIFO_EOT_FLAGS_LEN = 5243; // 1 +const static uint64_t SH_FLD_DNFIFO_FIFO_FULL = 5244; // 1 +const static uint64_t SH_FLD_DNFIFO_FIFO_VALID_FLAGS = 5245; // 1 +const static uint64_t SH_FLD_DNFIFO_FIFO_VALID_FLAGS_LEN = 5246; // 1 +const static uint64_t SH_FLD_DNFIFO_REQ_RESET_FR_SBE = 5247; // 1 +const static uint64_t SH_FLD_DNFIFO_REQ_RESET_FR_SP = 5248; // 1 +const static uint64_t SH_FLD_DOB01_CE = 5249; // 4 +const static uint64_t SH_FLD_DOB01_ERR = 5250; // 2 +const static uint64_t SH_FLD_DOB01_SUE = 5251; // 4 +const static uint64_t SH_FLD_DOB01_UE = 5252; // 4 +const static uint64_t SH_FLD_DOB23_CE = 5253; // 4 +const static uint64_t SH_FLD_DOB23_ERR = 5254; // 2 +const static uint64_t SH_FLD_DOB23_SUE = 5255; // 4 +const static uint64_t SH_FLD_DOB23_UE = 5256; // 4 +const static uint64_t SH_FLD_DOB45_CE = 5257; // 4 +const static uint64_t SH_FLD_DOB45_ERR = 5258; // 2 +const static uint64_t SH_FLD_DOB45_SUE = 5259; // 4 +const static uint64_t SH_FLD_DOB45_UE = 5260; // 4 +const static uint64_t SH_FLD_DOB67_CE = 5261; // 2 +const static uint64_t SH_FLD_DOB67_ERR = 5262; // 1 +const static uint64_t SH_FLD_DOB67_SUE = 5263; // 2 +const static uint64_t SH_FLD_DOB67_UE = 5264; // 2 +const static uint64_t SH_FLD_DONE = 5265; // 23 +const static uint64_t SH_FLD_DOORBELL = 5266; // 2 +const static uint64_t SH_FLD_DOORBELL0_C0 = 5267; // 12 +const static uint64_t SH_FLD_DOORBELL0_C1 = 5268; // 12 +const static uint64_t SH_FLD_DOORBELL1_C0 = 5269; // 12 +const static uint64_t SH_FLD_DOORBELL1_C1 = 5270; // 12 +const static uint64_t SH_FLD_DOORBELL2_C0 = 5271; // 12 +const static uint64_t SH_FLD_DOORBELL2_C1 = 5272; // 12 +const static uint64_t SH_FLD_DOORBELL3_C0 = 5273; // 12 +const static uint64_t SH_FLD_DOORBELL3_C1 = 5274; // 12 +const static uint64_t SH_FLD_DOUBLE_EPSILON_LENGTH = 5275; // 4 +const static uint64_t SH_FLD_DO_DR = 5276; // 1 +const static uint64_t SH_FLD_DO_IR = 5277; // 1 +const static uint64_t SH_FLD_DO_TAP_RESET = 5278; // 1 +const static uint64_t SH_FLD_DP16_RX_PD = 5279; // 8 +const static uint64_t SH_FLD_DP16_RX_PD_LEN = 5280; // 8 +const static uint64_t SH_FLD_DPLL_DCO_EMPTY = 5281; // 6 +const static uint64_t SH_FLD_DPLL_DCO_FULL = 5282; // 6 +const static uint64_t SH_FLD_DPLL_DYN_FMIN = 5283; // 6 +const static uint64_t SH_FLD_DPLL_INT = 5284; // 6 +const static uint64_t SH_FLD_DP_ERROR = 5285; // 8 +const static uint64_t SH_FLD_DP_ERROR_FINE = 5286; // 8 +const static uint64_t SH_FLD_DP_GOOD = 5287; // 8 +const static uint64_t SH_FLD_DQS_ALIGN = 5288; // 8 +const static uint64_t SH_FLD_DQ_SEL_LANE = 5289; // 8 +const static uint64_t SH_FLD_DQ_SEL_LANE_LEN = 5290; // 8 +const static uint64_t SH_FLD_DQ_SEL_QUAD = 5291; // 8 +const static uint64_t SH_FLD_DQ_SEL_QUAD_LEN = 5292; // 8 +const static uint64_t SH_FLD_DRAM_ABIST_DONE_DC = 5293; // 43 +const static uint64_t SH_FLD_DROP_COUNTER_FULL = 5294; // 4 +const static uint64_t SH_FLD_DROP_MASK_0_5 = 5295; // 1 +const static uint64_t SH_FLD_DROP_MASK_0_5_LEN = 5296; // 1 +const static uint64_t SH_FLD_DROP_PRIORITY_MASK = 5297; // 12 +const static uint64_t SH_FLD_DROP_PRIORITY_MASK_LEN = 5298; // 12 +const static uint64_t SH_FLD_DROP_PRIORITY_MODE = 5299; // 2 +const static uint64_t SH_FLD_DROP_PRI_DMA = 5300; // 1 +const static uint64_t SH_FLD_DROP_PRI_HPC_READ = 5301; // 1 +const static uint64_t SH_FLD_DROP_PRI_INTRP = 5302; // 1 +const static uint64_t SH_FLD_DRTM_REQ = 5303; // 5 +const static uint64_t SH_FLD_DRV_CLK_PATTERN_GCRMSG = 5304; // 4 +const static uint64_t SH_FLD_DRV_CLK_PATTERN_GCRMSG_LEN = 5305; // 4 +const static uint64_t SH_FLD_DRV_DATA_PATTERN_GCRMSG = 5306; // 6 +const static uint64_t SH_FLD_DRV_DATA_PATTERN_GCRMSG_LEN = 5307; // 6 +const static uint64_t SH_FLD_DRV_PATTERN_EN = 5308; // 1 +const static uint64_t SH_FLD_DSC1_ABORT_1 = 5309; // 1 +const static uint64_t SH_FLD_DSC1_DATA_COUNT = 5310; // 1 +const static uint64_t SH_FLD_DSC1_DATA_COUNT_1B = 5311; // 1 +const static uint64_t SH_FLD_DSC1_DATA_COUNT_1B_LEN = 5312; // 1 +const static uint64_t SH_FLD_DSC1_DATA_COUNT_LEN = 5313; // 1 +const static uint64_t SH_FLD_DSC1_HEADER_COUNT = 5314; // 1 +const static uint64_t SH_FLD_DSC1_HEADER_COUNT_1B = 5315; // 1 +const static uint64_t SH_FLD_DSC1_HEADER_COUNT_1B_LEN = 5316; // 1 +const static uint64_t SH_FLD_DSC1_HEADER_COUNT_LEN = 5317; // 1 +const static uint64_t SH_FLD_DSC1_LBUS_SLAVE_1B_PENDING = 5318; // 1 +const static uint64_t SH_FLD_DSC1_PERMISSION_TO_SEND_1 = 5319; // 1 +const static uint64_t SH_FLD_DSC1_PIB_SLAVE_PENDING = 5320; // 1 +const static uint64_t SH_FLD_DSC1_UNUSED_24 = 5321; // 1 +const static uint64_t SH_FLD_DSC1_UNUSED_27 = 5322; // 1 +const static uint64_t SH_FLD_DSC1_XDN_1 = 5323; // 1 +const static uint64_t SH_FLD_DSC1_XUP_1 = 5324; // 1 +const static uint64_t SH_FLD_DSC2_ABORT_2 = 5325; // 1 +const static uint64_t SH_FLD_DSC2_DATA_COUNT = 5326; // 1 +const static uint64_t SH_FLD_DSC2_DATA_COUNT_2B = 5327; // 1 +const static uint64_t SH_FLD_DSC2_DATA_COUNT_2B_LEN = 5328; // 1 +const static uint64_t SH_FLD_DSC2_DATA_COUNT_LEN = 5329; // 1 +const static uint64_t SH_FLD_DSC2_HEADER_COUNT = 5330; // 1 +const static uint64_t SH_FLD_DSC2_HEADER_COUNT_2B = 5331; // 1 +const static uint64_t SH_FLD_DSC2_HEADER_COUNT_2B_LEN = 5332; // 1 +const static uint64_t SH_FLD_DSC2_HEADER_COUNT_LEN = 5333; // 1 +const static uint64_t SH_FLD_DSC2_LBUS_SLAVE_2B_PENDING = 5334; // 1 +const static uint64_t SH_FLD_DSC2_PERMISSION_TO_SEND_2 = 5335; // 1 +const static uint64_t SH_FLD_DSC2_PIB_SLAVE_PENDING = 5336; // 1 +const static uint64_t SH_FLD_DSC2_UNUSED_24 = 5337; // 1 +const static uint64_t SH_FLD_DSC2_UNUSED_27 = 5338; // 1 +const static uint64_t SH_FLD_DSC2_XDN_2 = 5339; // 1 +const static uint64_t SH_FLD_DSC2_XUP_2 = 5340; // 1 +const static uint64_t SH_FLD_DSM_PE = 5341; // 8 +const static uint64_t SH_FLD_DS_SKEW_TIMEOUT_SEL = 5342; // 4 +const static uint64_t SH_FLD_DS_SKEW_TIMEOUT_SEL_LEN = 5343; // 4 +const static uint64_t SH_FLD_DS_TIMEOUT_SEL = 5344; // 4 +const static uint64_t SH_FLD_DS_TIMEOUT_SEL_LEN = 5345; // 4 +const static uint64_t SH_FLD_DTS_ENABLE_L1 = 5346; // 43 +const static uint64_t SH_FLD_DTS_ENABLE_L1_LEN = 5347; // 43 +const static uint64_t SH_FLD_DTS_READ_SEL = 5348; // 43 +const static uint64_t SH_FLD_DTS_READ_SEL_LEN = 5349; // 43 +const static uint64_t SH_FLD_DTS_SAMPLE_ENA = 5350; // 43 +const static uint64_t SH_FLD_DTS_TRIGGER = 5351; // 43 +const static uint64_t SH_FLD_DTS_TRIGGER_SEL = 5352; // 43 +const static uint64_t SH_FLD_DW0_ERR_TYPE = 5353; // 16 +const static uint64_t SH_FLD_DW0_ERR_TYPE_LEN = 5354; // 16 +const static uint64_t SH_FLD_DW0_SYNDROME = 5355; // 16 +const static uint64_t SH_FLD_DW0_SYNDROME_LEN = 5356; // 16 +const static uint64_t SH_FLD_DW1_ERR_TYPE = 5357; // 16 +const static uint64_t SH_FLD_DW1_ERR_TYPE_LEN = 5358; // 16 +const static uint64_t SH_FLD_DW1_SYNDROME = 5359; // 16 +const static uint64_t SH_FLD_DW1_SYNDROME_LEN = 5360; // 16 +const static uint64_t SH_FLD_DW2_ERR_TYPE = 5361; // 16 +const static uint64_t SH_FLD_DW2_ERR_TYPE_LEN = 5362; // 16 +const static uint64_t SH_FLD_DW2_SYNDROME = 5363; // 16 +const static uint64_t SH_FLD_DW2_SYNDROME_LEN = 5364; // 16 +const static uint64_t SH_FLD_DW3_ERR_TYPE = 5365; // 16 +const static uint64_t SH_FLD_DW3_ERR_TYPE_LEN = 5366; // 16 +const static uint64_t SH_FLD_DW3_SYNDROME = 5367; // 16 +const static uint64_t SH_FLD_DW3_SYNDROME_LEN = 5368; // 16 +const static uint64_t SH_FLD_DW_TYPE = 5369; // 12 +const static uint64_t SH_FLD_DW_TYPE_LEN = 5370; // 12 +const static uint64_t SH_FLD_DYNAMIC_FILTER_ENABLE = 5371; // 6 +const static uint64_t SH_FLD_DYNAMIC_MAX_SPARES_EXCEEDED = 5372; // 8 +const static uint64_t SH_FLD_DYNAMIC_REPAIR_ERROR = 5373; // 8 +const static uint64_t SH_FLD_DYNAMIC_SPARE_DEPLOYED = 5374; // 8 +const static uint64_t SH_FLD_DYNAMIC_WINDOW_SELECT = 5375; // 8 +const static uint64_t SH_FLD_DYNAMIC_WINDOW_SELECT_LEN = 5376; // 8 +const static uint64_t SH_FLD_DYN_RECAL_INTERVAL_TIMEOUT_SEL = 5377; // 8 +const static uint64_t SH_FLD_DYN_RECAL_INTERVAL_TIMEOUT_SEL_LEN = 5378; // 8 +const static uint64_t SH_FLD_DYN_RECAL_OVERALL_TIMEOUT_SEL = 5379; // 4 +const static uint64_t SH_FLD_DYN_RECAL_OVERALL_TIMEOUT_SEL_LEN = 5380; // 4 +const static uint64_t SH_FLD_DYN_RECAL_STATUS_RPT_TIMEOUT_SEL = 5381; // 8 +const static uint64_t SH_FLD_DYN_RECAL_STATUS_RPT_TIMEOUT_SEL_LEN = 5382; // 8 +const static uint64_t SH_FLD_DYN_RECAL_SUSPEND = 5383; // 4 +const static uint64_t SH_FLD_DYN_RECAL_TSR_IGNORE_GCRMSG = 5384; // 4 +const static uint64_t SH_FLD_DYN_RPR_BAD_BUS_MAX = 5385; // 4 +const static uint64_t SH_FLD_DYN_RPR_BAD_BUS_MAX_LEN = 5386; // 4 +const static uint64_t SH_FLD_DYN_RPR_BAD_LANE_MAX = 5387; // 4 +const static uint64_t SH_FLD_DYN_RPR_BAD_LANE_MAX_LEN = 5388; // 4 +const static uint64_t SH_FLD_DYN_RPR_CLR_ERR_CNTR1 = 5389; // 4 +const static uint64_t SH_FLD_DYN_RPR_CLR_ERR_CNTR2 = 5390; // 4 +const static uint64_t SH_FLD_DYN_RPR_COMPLETE_GCRMSG = 5391; // 4 +const static uint64_t SH_FLD_DYN_RPR_DISABLE = 5392; // 4 +const static uint64_t SH_FLD_DYN_RPR_DISABLE2 = 5393; // 4 +const static uint64_t SH_FLD_DYN_RPR_ENC_BAD_DATA_LANE_SHFT_AMT = 5394; // 4 +const static uint64_t SH_FLD_DYN_RPR_ENC_BAD_DATA_LANE_SHFT_AMT_LEN = 5395; // 4 +const static uint64_t SH_FLD_DYN_RPR_ENC_BAD_DATA_LANE_WIDTH = 5396; // 4 +const static uint64_t SH_FLD_DYN_RPR_ENC_BAD_DATA_LANE_WIDTH_LEN = 5397; // 4 +const static uint64_t SH_FLD_DYN_RPR_ERR_CNTR1_DURATION = 5398; // 4 +const static uint64_t SH_FLD_DYN_RPR_ERR_CNTR1_DURATION_LEN = 5399; // 4 +const static uint64_t SH_FLD_DYN_RPR_ERR_CNTR2_DURATION = 5400; // 4 +const static uint64_t SH_FLD_DYN_RPR_ERR_CNTR2_DURATION_LEN = 5401; // 4 +const static uint64_t SH_FLD_DYN_RPR_IP_GCRMSG = 5402; // 4 +const static uint64_t SH_FLD_DYN_RPR_LANE2RPR_GCRMSG = 5403; // 4 +const static uint64_t SH_FLD_DYN_RPR_LANE2RPR_GCRMSG_LEN = 5404; // 4 +const static uint64_t SH_FLD_DYN_RPR_REQ_GCRMSG = 5405; // 4 +const static uint64_t SH_FLD_D_BIT_MAP = 5406; // 8 +const static uint64_t SH_FLD_D_BIT_MAP_LEN = 5407; // 8 +const static uint64_t SH_FLD_EARLY_REQ = 5408; // 8 +const static uint64_t SH_FLD_EARLY_REQ_ERR_MASK = 5409; // 8 +const static uint64_t SH_FLD_EARLY_REQ_SOURCE = 5410; // 8 +const static uint64_t SH_FLD_EARLY_REQ_SOURCE_LEN = 5411; // 8 +const static uint64_t SH_FLD_EBUS_ENABLE = 5412; // 1 +const static uint64_t SH_FLD_EBUS_ENABLE_LEN = 5413; // 1 +const static uint64_t SH_FLD_ECC = 5414; // 3 +const static uint64_t SH_FLD_ECCCHK_DISABLE_0 = 5415; // 1 +const static uint64_t SH_FLD_ECCCHK_DISABLE_1 = 5416; // 1 +const static uint64_t SH_FLD_ECCCHK_DISABLE_2 = 5417; // 1 +const static uint64_t SH_FLD_ECCCHK_DISABLE_3 = 5418; // 1 +const static uint64_t SH_FLD_ECCGEN = 5419; // 8 +const static uint64_t SH_FLD_ECC_CE = 5420; // 3 +const static uint64_t SH_FLD_ECC_CHK_DISABLE = 5421; // 1 +const static uint64_t SH_FLD_ECC_CLEAR = 5422; // 2 +const static uint64_t SH_FLD_ECC_CONFIG_ERROR_0 = 5423; // 1 +const static uint64_t SH_FLD_ECC_CONFIG_ERROR_1 = 5424; // 1 +const static uint64_t SH_FLD_ECC_CONFIG_ERROR_2 = 5425; // 1 +const static uint64_t SH_FLD_ECC_CONFIG_ERROR_3 = 5426; // 1 +const static uint64_t SH_FLD_ECC_CORRECTED_ERROR_0 = 5427; // 1 +const static uint64_t SH_FLD_ECC_CORRECTED_ERROR_1 = 5428; // 1 +const static uint64_t SH_FLD_ECC_CORRECTED_ERROR_2 = 5429; // 1 +const static uint64_t SH_FLD_ECC_CORRECTED_ERROR_3 = 5430; // 1 +const static uint64_t SH_FLD_ECC_CORRECTED_ERROR_FACES = 5431; // 1 +const static uint64_t SH_FLD_ECC_CORRECTED_ERROR_PIB = 5432; // 1 +const static uint64_t SH_FLD_ECC_CORRECTOR_INTERNAL_PARITY_ERROR = 5433; // 8 +const static uint64_t SH_FLD_ECC_CORRECT_DIS = 5434; // 15 +const static uint64_t SH_FLD_ECC_DETECT_DIS = 5435; // 15 +const static uint64_t SH_FLD_ECC_ENABLE = 5436; // 6 +const static uint64_t SH_FLD_ECC_ENABLE_0 = 5437; // 1 +const static uint64_t SH_FLD_ECC_ENABLE_1 = 5438; // 1 +const static uint64_t SH_FLD_ECC_ENABLE_2 = 5439; // 1 +const static uint64_t SH_FLD_ECC_ENABLE_3 = 5440; // 1 +const static uint64_t SH_FLD_ECC_ERROR_ADDR = 5441; // 2 +const static uint64_t SH_FLD_ECC_ERROR_ADDR_LEN = 5442; // 2 +const static uint64_t SH_FLD_ECC_ERROR_COUNT = 5443; // 2 +const static uint64_t SH_FLD_ECC_ERROR_COUNT_LEN = 5444; // 2 +const static uint64_t SH_FLD_ECC_ERR_INJ_ARRAY_SEL = 5445; // 3 +const static uint64_t SH_FLD_ECC_ERR_INJ_ARRAY_SEL_LEN = 5446; // 3 +const static uint64_t SH_FLD_ECC_ERR_INJ_NORTH_WC_ENA = 5447; // 1 +const static uint64_t SH_FLD_ECC_ERR_INJ_NORTH_WC_FRQ = 5448; // 1 +const static uint64_t SH_FLD_ECC_ERR_INJ_NORTH_WC_TYP = 5449; // 1 +const static uint64_t SH_FLD_ECC_ERR_INJ_NORTH_WC_UNUSED = 5450; // 1 +const static uint64_t SH_FLD_ECC_ERR_INJ_SELECTION = 5451; // 1 +const static uint64_t SH_FLD_ECC_ERR_INJ_SELECTION_LEN = 5452; // 1 +const static uint64_t SH_FLD_ECC_ERR_INJ_SOUTH_EG_ENA = 5453; // 1 +const static uint64_t SH_FLD_ECC_ERR_INJ_SOUTH_EG_FRQ = 5454; // 1 +const static uint64_t SH_FLD_ECC_ERR_INJ_SOUTH_EG_SEL = 5455; // 1 +const static uint64_t SH_FLD_ECC_ERR_INJ_SOUTH_EG_TYP = 5456; // 1 +const static uint64_t SH_FLD_ECC_ERR_INJ_SOUTH_WC_ENA = 5457; // 1 +const static uint64_t SH_FLD_ECC_ERR_INJ_SOUTH_WC_FRQ = 5458; // 1 +const static uint64_t SH_FLD_ECC_ERR_INJ_SOUTH_WC_SEL = 5459; // 1 +const static uint64_t SH_FLD_ECC_ERR_INJ_SOUTH_WC_SEL_LEN = 5460; // 1 +const static uint64_t SH_FLD_ECC_ERR_INJ_SOUTH_WC_TYP = 5461; // 1 +const static uint64_t SH_FLD_ECC_GENERATOR_INTERNAL_PARITY_ERROR = 5462; // 8 +const static uint64_t SH_FLD_ECC_INJECT_ERR = 5463; // 15 +const static uint64_t SH_FLD_ECC_INJECT_TYPE = 5464; // 15 +const static uint64_t SH_FLD_ECC_LEN = 5465; // 3 +const static uint64_t SH_FLD_ECC_MCBIST_OUT_OF_SYNC_HOLD_OUT = 5466; // 2 +const static uint64_t SH_FLD_ECC_SYNDROME = 5467; // 2 +const static uint64_t SH_FLD_ECC_SYNDROME_LEN = 5468; // 2 +const static uint64_t SH_FLD_ECC_S_BIT_ERROR = 5469; // 1 +const static uint64_t SH_FLD_ECC_UE = 5470; // 3 +const static uint64_t SH_FLD_ECC_UNCORRECTED_ERROR_0 = 5471; // 1 +const static uint64_t SH_FLD_ECC_UNCORRECTED_ERROR_1 = 5472; // 1 +const static uint64_t SH_FLD_ECC_UNCORRECTED_ERROR_2 = 5473; // 1 +const static uint64_t SH_FLD_ECC_UNCORRECTED_ERROR_3 = 5474; // 1 +const static uint64_t SH_FLD_ECC_UNCORRECTED_ERROR_FACES = 5475; // 1 +const static uint64_t SH_FLD_ECC_UNCORRECTED_ERROR_PIB = 5476; // 1 +const static uint64_t SH_FLD_ECC_UNCORRECTED_ERR_FACES = 5477; // 1 +const static uint64_t SH_FLD_ECC_UNCORRECTED_ERR_PIB = 5478; // 1 +const static uint64_t SH_FLD_ECC_WDF_HCA_TIMEBASE = 5479; // 8 +const static uint64_t SH_FLD_ECC_WDF_HCA_TIMEBASE_LEN = 5480; // 8 +const static uint64_t SH_FLD_ECC_WDF_HCA_TIMEBASE_SELECT = 5481; // 8 +const static uint64_t SH_FLD_ECC_WDF_HCA_TIMEBASE_SELECT_LEN = 5482; // 8 +const static uint64_t SH_FLD_ECHO_DELAY_CYCLES = 5483; // 2 +const static uint64_t SH_FLD_ECHO_DELAY_CYCLES_LEN = 5484; // 2 +const static uint64_t SH_FLD_ECRESP_HASH_MODE = 5485; // 4 +const static uint64_t SH_FLD_EDR = 5486; // 21 +const static uint64_t SH_FLD_EDR_LEN = 5487; // 21 +const static uint64_t SH_FLD_EFTCOMP_MAX_INRD = 5488; // 1 +const static uint64_t SH_FLD_EFTCOMP_MAX_INRD_LEN = 5489; // 1 +const static uint64_t SH_FLD_EFTDECOMP_MAX_INRD = 5490; // 1 +const static uint64_t SH_FLD_EFTDECOMP_MAX_INRD_LEN = 5491; // 1 +const static uint64_t SH_FLD_EFT_COMP_PREFETCH_ENABLE = 5492; // 1 +const static uint64_t SH_FLD_EFT_DECOMP_PREFETCH_ENABLE = 5493; // 1 +const static uint64_t SH_FLD_EFT_MUX_SELECT = 5494; // 1 +const static uint64_t SH_FLD_EFT_MUX_SELECT_LEN = 5495; // 1 +const static uint64_t SH_FLD_EFT_SPBC_ENABLE = 5496; // 1 +const static uint64_t SH_FLD_EG_CERR_BITS = 5497; // 1 +const static uint64_t SH_FLD_EG_CERR_BITS_LEN = 5498; // 1 +const static uint64_t SH_FLD_EG_CERR_RESET = 5499; // 1 +const static uint64_t SH_FLD_EG_ECC_CE_ERROR = 5500; // 2 +const static uint64_t SH_FLD_EG_ECC_SUE_ERROR = 5501; // 2 +const static uint64_t SH_FLD_EG_ECC_UE_ERROR = 5502; // 2 +const static uint64_t SH_FLD_EG_LOGIC_HW_ERROR = 5503; // 2 +const static uint64_t SH_FLD_EG_TRACE_GROUP_SEL_HI = 5504; // 1 +const static uint64_t SH_FLD_EG_TRACE_GROUP_SEL_HI_LEN = 5505; // 1 +const static uint64_t SH_FLD_EG_TRACE_GROUP_SEL_LO = 5506; // 1 +const static uint64_t SH_FLD_EG_TRACE_GROUP_SEL_LO_LEN = 5507; // 1 +const static uint64_t SH_FLD_EG_TRACE_TRIGGER_SEL_01 = 5508; // 1 +const static uint64_t SH_FLD_EG_TRACE_TRIGGER_SEL_01_LEN = 5509; // 1 +const static uint64_t SH_FLD_EG_TRACE_TRIGGER_SEL_23 = 5510; // 1 +const static uint64_t SH_FLD_EG_TRACE_TRIGGER_SEL_23_LEN = 5511; // 1 +const static uint64_t SH_FLD_EMERGENCY_M = 5512; // 8 +const static uint64_t SH_FLD_EMERGENCY_M_LEN = 5513; // 8 +const static uint64_t SH_FLD_EMERGENCY_N = 5514; // 8 +const static uint64_t SH_FLD_EMERGENCY_N_LEN = 5515; // 8 +const static uint64_t SH_FLD_EMERGENCY_THROTTLE = 5516; // 16 +const static uint64_t SH_FLD_EMER_THROTTLE_IP = 5517; // 8 +const static uint64_t SH_FLD_EMER_THROTTLE_IP_CLR = 5518; // 8 +const static uint64_t SH_FLD_EN = 5519; // 41 +const static uint64_t SH_FLD_ENABLE = 5520; // 207 +const static uint64_t SH_FLD_ENABLE_0 = 5521; // 1 +const static uint64_t SH_FLD_ENABLE_0_7 = 5522; // 1 +const static uint64_t SH_FLD_ENABLE_0_7_LEN = 5523; // 1 +const static uint64_t SH_FLD_ENABLE_1 = 5524; // 1 +const static uint64_t SH_FLD_ENABLE_2 = 5525; // 1 +const static uint64_t SH_FLD_ENABLE_3 = 5526; // 1 +const static uint64_t SH_FLD_ENABLE_64_128B_READ = 5527; // 4 +const static uint64_t SH_FLD_ENABLE_AUX_PORT_UNUSED = 5528; // 2 +const static uint64_t SH_FLD_ENABLE_BER_TEST = 5529; // 4 +const static uint64_t SH_FLD_ENABLE_BUSY_COUNTERS = 5530; // 8 +const static uint64_t SH_FLD_ENABLE_CENTAUR_CHECKSTOP_COMMAND = 5531; // 4 +const static uint64_t SH_FLD_ENABLE_CENTAUR_PERFMON_START_COMMAND = 5532; // 4 +const static uint64_t SH_FLD_ENABLE_CENTAUR_PERFMON_STOP_COMMAND = 5533; // 4 +const static uint64_t SH_FLD_ENABLE_CENTAUR_SYNC = 5534; // 4 +const static uint64_t SH_FLD_ENABLE_CENTAUR_TRACESTOP_COMMAND = 5535; // 4 +const static uint64_t SH_FLD_ENABLE_CHANNEL_ARB_DISABLE_HP_OP_LFSR = 5536; // 4 +const static uint64_t SH_FLD_ENABLE_CHANNEL_ARB_FORCE_WR_HP_LFSR = 5537; // 4 +const static uint64_t SH_FLD_ENABLE_CLEAN = 5538; // 8 +const static uint64_t SH_FLD_ENABLE_CLR_ERR_CMD = 5539; // 1 +const static uint64_t SH_FLD_ENABLE_CM_COARSE_CAL = 5540; // 6 +const static uint64_t SH_FLD_ENABLE_CM_FINE_CAL = 5541; // 6 +const static uint64_t SH_FLD_ENABLE_CQ_PMU_COUNTING = 5542; // 1 +const static uint64_t SH_FLD_ENABLE_CQ_TRACE = 5543; // 1 +const static uint64_t SH_FLD_ENABLE_CRC_BYPASS_ALWAYS = 5544; // 4 +const static uint64_t SH_FLD_ENABLE_CRC_ECC_BPASS_NODAL_ONLY = 5545; // 4 +const static uint64_t SH_FLD_ENABLE_CTLE_1ST_LATCH_OFFSET_CAL = 5546; // 6 +const static uint64_t SH_FLD_ENABLE_CTLE_2ND_LATCH_OFFSET_CAL = 5547; // 6 +const static uint64_t SH_FLD_ENABLE_CTLE_COARSE_CAL = 5548; // 6 +const static uint64_t SH_FLD_ENABLE_CTLE_EDGE_OFFSET_CAL = 5549; // 2 +const static uint64_t SH_FLD_ENABLE_CTLE_EDGE_TRACK_ONLY = 5550; // 4 +const static uint64_t SH_FLD_ENABLE_DAC_H1_CAL = 5551; // 6 +const static uint64_t SH_FLD_ENABLE_DAC_H1_TO_A_CAL = 5552; // 4 +const static uint64_t SH_FLD_ENABLE_DDC = 5553; // 6 +const static uint64_t SH_FLD_ENABLE_DEBUG_BUS = 5554; // 1 +const static uint64_t SH_FLD_ENABLE_DFE_H1_CAL = 5555; // 6 +const static uint64_t SH_FLD_ENABLE_DFE_H2_H12_CAL = 5556; // 4 +const static uint64_t SH_FLD_ENABLE_DFE_H2_H12_SUBSTEP = 5557; // 4 +const static uint64_t SH_FLD_ENABLE_DFE_H2_H12_SUBSTEP_LEN = 5558; // 4 +const static uint64_t SH_FLD_ENABLE_DFE_VOLTAGE_MODE = 5559; // 4 +const static uint64_t SH_FLD_ENABLE_DISABLE_PREFETCH_FOR_MIRROR_READS = 5560; // 4 +const static uint64_t SH_FLD_ENABLE_DISABLE_SPEC_READ_FOR_NONDMA_GROUP_PUMP_LOCAL_READ = 5561; // 4 +const static uint64_t SH_FLD_ENABLE_DISABLE_SPEC_READ_FOR_NONDMA_SYSTEM_PUMP_LOCAL_READ = 5562; // 4 +const static uint64_t SH_FLD_ENABLE_DONE_SIGNALING = 5563; // 4 +const static uint64_t SH_FLD_ENABLE_DYNAMIC_PF_USAGE = 5564; // 8 +const static uint64_t SH_FLD_ENABLE_DYNAMIC_WR_USAGE = 5565; // 8 +const static uint64_t SH_FLD_ENABLE_EG_PMU_COUNTING = 5566; // 1 +const static uint64_t SH_FLD_ENABLE_EG_TRACE = 5567; // 1 +const static uint64_t SH_FLD_ENABLE_EMER_THROTTLE = 5568; // 4 +const static uint64_t SH_FLD_ENABLE_FINAL_L2U_ADJ = 5569; // 4 +const static uint64_t SH_FLD_ENABLE_FIR_HOST_ATTN = 5570; // 4 +const static uint64_t SH_FLD_ENABLE_FIR_SPEC_ATTN = 5571; // 4 +const static uint64_t SH_FLD_ENABLE_FSAFE_UPON_HEARTBEAT_LOSS = 5572; // 6 +const static uint64_t SH_FLD_ENABLE_GCR_OFL_BUFF = 5573; // 4 +const static uint64_t SH_FLD_ENABLE_GLB_PULSE = 5574; // 1 +const static uint64_t SH_FLD_ENABLE_GLOBAL_RUN = 5575; // 2 +const static uint64_t SH_FLD_ENABLE_H1AP_TWEAK = 5576; // 6 +const static uint64_t SH_FLD_ENABLE_HW_ERROR_RECOVERY = 5577; // 5 +const static uint64_t SH_FLD_ENABLE_INTEG_LATCH_OFFSET_CAL = 5578; // 6 +const static uint64_t SH_FLD_ENABLE_IN_PMU_COUNTING = 5579; // 1 +const static uint64_t SH_FLD_ENABLE_IN_TRACE = 5580; // 1 +const static uint64_t SH_FLD_ENABLE_IPOLL_AND_DMA = 5581; // 3 +const static uint64_t SH_FLD_ENABLE_LEN = 5582; // 3 +const static uint64_t SH_FLD_ENABLE_MEMORY_BACKING = 5583; // 6 +const static uint64_t SH_FLD_ENABLE_PARITY_CHECK = 5584; // 3 +const static uint64_t SH_FLD_ENABLE_PB_PERFMON_COMMAND = 5585; // 4 +const static uint64_t SH_FLD_ENABLE_PB_SWITCH_AB = 5586; // 1 +const static uint64_t SH_FLD_ENABLE_PB_SWITCH_CD = 5587; // 1 +const static uint64_t SH_FLD_ENABLE_PECE = 5588; // 24 +const static uint64_t SH_FLD_ENABLE_PF_DROP = 5589; // 4 +const static uint64_t SH_FLD_ENABLE_PF_DROP_CMDLIST = 5590; // 4 +const static uint64_t SH_FLD_ENABLE_PF_DROP_SRQ = 5591; // 4 +const static uint64_t SH_FLD_ENABLE_PREFETCH_PROMOTE = 5592; // 4 +const static uint64_t SH_FLD_ENABLE_READ_DATA_FROM_AMOC = 5593; // 8 +const static uint64_t SH_FLD_ENABLE_READ_DATA_FROM_AMOC_LEN = 5594; // 8 +const static uint64_t SH_FLD_ENABLE_READ_LFSR_DATA = 5595; // 4 +const static uint64_t SH_FLD_ENABLE_RECEIVE_OWN_TOD = 5596; // 1 +const static uint64_t SH_FLD_ENABLE_RECEIVE_OWN_TRIGGER = 5597; // 1 +const static uint64_t SH_FLD_ENABLE_RECEIVE_OWN_TRIGGER_LEN = 5598; // 1 +const static uint64_t SH_FLD_ENABLE_REFRESH_BLOCK_DISP = 5599; // 8 +const static uint64_t SH_FLD_ENABLE_REFRESH_BLOCK_NSQ = 5600; // 8 +const static uint64_t SH_FLD_ENABLE_REFRESH_BLOCK_SQ = 5601; // 8 +const static uint64_t SH_FLD_ENABLE_RELATIVE_ADDRESS_CMDS = 5602; // 3 +const static uint64_t SH_FLD_ENABLE_REMAP = 5603; // 1 +const static uint64_t SH_FLD_ENABLE_RESULT_CHECK = 5604; // 4 +const static uint64_t SH_FLD_ENABLE_RG_PMU_COUNTING = 5605; // 1 +const static uint64_t SH_FLD_ENABLE_RG_TRACE = 5606; // 1 +const static uint64_t SH_FLD_ENABLE_SCRD_FR_RXRF = 5607; // 1 +const static uint64_t SH_FLD_ENABLE_SCWR_TO_RXRF = 5608; // 1 +const static uint64_t SH_FLD_ENABLE_SCWR_TO_TXRF = 5609; // 1 +const static uint64_t SH_FLD_ENABLE_STREAMING_MODE = 5610; // 2 +const static uint64_t SH_FLD_ENABLE_TRC_GLB_TRIG0 = 5611; // 1 +const static uint64_t SH_FLD_ENABLE_TRC_GLB_TRIG1 = 5612; // 1 +const static uint64_t SH_FLD_ENABLE_TTYPE_DECODE = 5613; // 2 +const static uint64_t SH_FLD_ENABLE_VGA_AMAX_MODE = 5614; // 6 +const static uint64_t SH_FLD_ENABLE_VGA_CAL = 5615; // 6 +const static uint64_t SH_FLD_ENABLE_VGA_EDGE_OFFSET_CAL = 5616; // 2 +const static uint64_t SH_FLD_ENABLE_WC_PMU_COUNTING = 5617; // 1 +const static uint64_t SH_FLD_ENABLE_WC_TRACE = 5618; // 1 +const static uint64_t SH_FLD_ENABLE_ZCAL = 5619; // 8 +const static uint64_t SH_FLD_ENA_COARSE_RD = 5620; // 8 +const static uint64_t SH_FLD_ENA_CUSTOM_RD = 5621; // 8 +const static uint64_t SH_FLD_ENA_CUSTOM_WR = 5622; // 8 +const static uint64_t SH_FLD_ENA_DIGITAL_EYE = 5623; // 8 +const static uint64_t SH_FLD_ENA_DQS_ALIGN = 5624; // 16 +const static uint64_t SH_FLD_ENA_INITIAL_COARSE_WR = 5625; // 8 +const static uint64_t SH_FLD_ENA_INITIAL_PAT_WR = 5626; // 8 +const static uint64_t SH_FLD_ENA_RANK = 5627; // 8 +const static uint64_t SH_FLD_ENA_RANK_LEN = 5628; // 8 +const static uint64_t SH_FLD_ENA_RANK_PAIR = 5629; // 16 +const static uint64_t SH_FLD_ENA_RANK_PAIR_LEN = 5630; // 16 +const static uint64_t SH_FLD_ENA_RDCLK_ALIGN = 5631; // 16 +const static uint64_t SH_FLD_ENA_READ_CTR = 5632; // 16 +const static uint64_t SH_FLD_ENA_SYSCLK_ALIGN = 5633; // 8 +const static uint64_t SH_FLD_ENA_WRITE_CTR = 5634; // 8 +const static uint64_t SH_FLD_ENA_WR_LEVEL = 5635; // 8 +const static uint64_t SH_FLD_ENA_ZCAL = 5636; // 8 +const static uint64_t SH_FLD_END = 5637; // 64 +const static uint64_t SH_FLD_ENDABLE_PMU_CNT_RESET = 5638; // 1 +const static uint64_t SH_FLD_ENDPOINTS = 5639; // 1 +const static uint64_t SH_FLD_END_LANE_ID = 5640; // 8 +const static uint64_t SH_FLD_END_LANE_ID_LEN = 5641; // 8 +const static uint64_t SH_FLD_ENH_MODE_0 = 5642; // 1 +const static uint64_t SH_FLD_ENH_MODE_1 = 5643; // 1 +const static uint64_t SH_FLD_ENH_MODE_2 = 5644; // 1 +const static uint64_t SH_FLD_ENH_MODE_3 = 5645; // 1 +const static uint64_t SH_FLD_ENOP = 5646; // 43 +const static uint64_t SH_FLD_ENOP_FORCE_SG = 5647; // 43 +const static uint64_t SH_FLD_ENOP_LEN = 5648; // 43 +const static uint64_t SH_FLD_ENOP_WAIT = 5649; // 43 +const static uint64_t SH_FLD_ENOP_WAIT_LEN = 5650; // 43 +const static uint64_t SH_FLD_ENTRIES = 5651; // 1 +const static uint64_t SH_FLD_ENTRIES_LEN = 5652; // 1 +const static uint64_t SH_FLD_ENTRY = 5653; // 75 +const static uint64_t SH_FLD_ENTRY_LEN = 5654; // 75 +const static uint64_t SH_FLD_ENTRY_SEL_0_5 = 5655; // 1 +const static uint64_t SH_FLD_ENTRY_SEL_0_5_LEN = 5656; // 1 +const static uint64_t SH_FLD_EN_ATTN = 5657; // 24 +const static uint64_t SH_FLD_EN_CHARB_STALL = 5658; // 4 +const static uint64_t SH_FLD_EN_DBG = 5659; // 4 +const static uint64_t SH_FLD_EN_EVENT_COUNT = 5660; // 1 +const static uint64_t SH_FLD_EN_INSTRUC_TRACE = 5661; // 24 +const static uint64_t SH_FLD_EN_MARKER_ACK = 5662; // 1 +const static uint64_t SH_FLD_EN_OR_DIS_WRITE_PROTECTION = 5663; // 1 +const static uint64_t SH_FLD_EN_OR_DIS_WRITE_PROTECTION_LEN = 5664; // 1 +const static uint64_t SH_FLD_EN_POLL_BACKOFF = 5665; // 1 +const static uint64_t SH_FLD_EN_RANDOM_BACKOFF = 5666; // 1 +const static uint64_t SH_FLD_EN_RESET_DD2_FIX_DIS = 5667; // 8 +const static uint64_t SH_FLD_EN_RESET_WR_DELAY_WL = 5668; // 8 +const static uint64_t SH_FLD_EN_RISCTRACE = 5669; // 17 +const static uint64_t SH_FLD_EN_SECOND_WRBUF = 5670; // 1 +const static uint64_t SH_FLD_EN_SLV_FAIRNESS = 5671; // 1 +const static uint64_t SH_FLD_EN_SPEC_CILD = 5672; // 1 +const static uint64_t SH_FLD_EN_TRACE_FULL_IVA = 5673; // 17 +const static uint64_t SH_FLD_EN_WIDE_TRACE = 5674; // 16 +const static uint64_t SH_FLD_EN_WT4CR_EPS_ON_LCO = 5675; // 12 +const static uint64_t SH_FLD_EN_WT4CR_EXTENDED_MODE = 5676; // 12 +const static uint64_t SH_FLD_EPOCH_TEST_VECTOR = 5677; // 2 +const static uint64_t SH_FLD_EPOCH_TEST_VECTOR_LEN = 5678; // 2 +const static uint64_t SH_FLD_EPOCH_VALUE = 5679; // 2 +const static uint64_t SH_FLD_EPOCH_VALUE_LEN = 5680; // 2 +const static uint64_t SH_FLD_EPS_CNT_USE_DIVIDER_EN = 5681; // 12 +const static uint64_t SH_FLD_EPS_DIVIDER_MODE = 5682; // 12 +const static uint64_t SH_FLD_EPS_DIVIDER_MODE_LEN = 5683; // 12 +const static uint64_t SH_FLD_EPS_MODE_SEL = 5684; // 12 +const static uint64_t SH_FLD_EPS_STEP_MODE = 5685; // 12 +const static uint64_t SH_FLD_EPS_STEP_MODE_LEN = 5686; // 12 +const static uint64_t SH_FLD_EQC_CILOAD = 5687; // 1 +const static uint64_t SH_FLD_EQC_CILOAD_LEN = 5688; // 1 +const static uint64_t SH_FLD_EQC_CISTORE = 5689; // 1 +const static uint64_t SH_FLD_EQC_CISTORE_LEN = 5690; // 1 +const static uint64_t SH_FLD_EQC_DMA = 5691; // 1 +const static uint64_t SH_FLD_EQC_DMA_LEN = 5692; // 1 +const static uint64_t SH_FLD_EQC_EOI_EQP = 5693; // 1 +const static uint64_t SH_FLD_EQC_EOI_EQP_LEN = 5694; // 1 +const static uint64_t SH_FLD_EQD_DMA_READ = 5695; // 1 +const static uint64_t SH_FLD_EQD_DMA_READ_LEN = 5696; // 1 +const static uint64_t SH_FLD_EQD_DMA_WRITE = 5697; // 1 +const static uint64_t SH_FLD_EQD_DMA_WRITE_LEN = 5698; // 1 +const static uint64_t SH_FLD_EQ_POST = 5699; // 1 +const static uint64_t SH_FLD_EQ_POST_LEN = 5700; // 1 +const static uint64_t SH_FLD_ERAT_ARRAY_CE = 5701; // 1 +const static uint64_t SH_FLD_ERAT_ARRAY_PE = 5702; // 1 +const static uint64_t SH_FLD_ERAT_ARRAY_SUE = 5703; // 1 +const static uint64_t SH_FLD_ERAT_ARRAY_UE = 5704; // 1 +const static uint64_t SH_FLD_ERAT_CICO_HANG = 5705; // 1 +const static uint64_t SH_FLD_ERAT_CNTRL_ERR = 5706; // 1 +const static uint64_t SH_FLD_ERAT_LOCAL_CSTOP = 5707; // 1 +const static uint64_t SH_FLD_ERAT_MUX_SELECT = 5708; // 1 +const static uint64_t SH_FLD_ERAT_MUX_SELECT_LEN = 5709; // 1 +const static uint64_t SH_FLD_ERR = 5710; // 24 +const static uint64_t SH_FLD_ERR0 = 5711; // 16 +const static uint64_t SH_FLD_ERR0_LEN = 5712; // 16 +const static uint64_t SH_FLD_ERR501 = 5713; // 43 +const static uint64_t SH_FLD_ERROR = 5714; // 121 +const static uint64_t SH_FLD_ERRORS = 5715; // 43 +const static uint64_t SH_FLD_ERRORS_LEN = 5716; // 43 +const static uint64_t SH_FLD_ERROR_0 = 5717; // 1 +const static uint64_t SH_FLD_ERROR_1 = 5718; // 1 +const static uint64_t SH_FLD_ERROR_2 = 5719; // 1 +const static uint64_t SH_FLD_ERROR_3 = 5720; // 1 +const static uint64_t SH_FLD_ERROR_4 = 5721; // 1 +const static uint64_t SH_FLD_ERROR_5 = 5722; // 1 +const static uint64_t SH_FLD_ERROR_ADDR = 5723; // 4 +const static uint64_t SH_FLD_ERROR_ADDRESS = 5724; // 2 +const static uint64_t SH_FLD_ERROR_ADDRESS_LEN = 5725; // 2 +const static uint64_t SH_FLD_ERROR_ADDR_LEN = 5726; // 4 +const static uint64_t SH_FLD_ERROR_COARSE_RD = 5727; // 8 +const static uint64_t SH_FLD_ERROR_CONFIG = 5728; // 6 +const static uint64_t SH_FLD_ERROR_CONFIG_LEN = 5729; // 6 +const static uint64_t SH_FLD_ERROR_CUSTOM_RD = 5730; // 8 +const static uint64_t SH_FLD_ERROR_CUSTOM_WR = 5731; // 8 +const static uint64_t SH_FLD_ERROR_DIGITAL_EYE = 5732; // 8 +const static uint64_t SH_FLD_ERROR_DQS_ALIGN = 5733; // 8 +const static uint64_t SH_FLD_ERROR_FINE = 5734; // 8 +const static uint64_t SH_FLD_ERROR_INITIAL_COARSE_WR = 5735; // 8 +const static uint64_t SH_FLD_ERROR_INITIAL_PAT_WRITE = 5736; // 8 +const static uint64_t SH_FLD_ERROR_INJECT = 5737; // 1 +const static uint64_t SH_FLD_ERROR_INJECT_ENABLE = 5738; // 1 +const static uint64_t SH_FLD_ERROR_INJECT_LEN = 5739; // 1 +const static uint64_t SH_FLD_ERROR_LEN = 5740; // 15 +const static uint64_t SH_FLD_ERROR_MASK = 5741; // 43 +const static uint64_t SH_FLD_ERROR_MASK_LEN = 5742; // 43 +const static uint64_t SH_FLD_ERROR_RDCLK_ALIGN = 5743; // 8 +const static uint64_t SH_FLD_ERROR_READ_CTR = 5744; // 8 +const static uint64_t SH_FLD_ERROR_RECOVERY_COMPLETE = 5745; // 2 +const static uint64_t SH_FLD_ERROR_RECOVERY_INITIATED = 5746; // 2 +const static uint64_t SH_FLD_ERROR_STATE = 5747; // 4 +const static uint64_t SH_FLD_ERROR_WRITE_CTR = 5748; // 8 +const static uint64_t SH_FLD_ERROR_WR_LEVEL = 5749; // 8 +const static uint64_t SH_FLD_ERRS = 5750; // 260 +const static uint64_t SH_FLD_ERRS_INJ = 5751; // 4 +const static uint64_t SH_FLD_ERRS_INJ_LEN = 5752; // 4 +const static uint64_t SH_FLD_ERRS_LEN = 5753; // 144 +const static uint64_t SH_FLD_ERR_ADDR_BEYOND_RANGE = 5754; // 1 +const static uint64_t SH_FLD_ERR_ADDR_OVERLAP = 5755; // 1 +const static uint64_t SH_FLD_ERR_BRK0 = 5756; // 1 +const static uint64_t SH_FLD_ERR_BRK0_LEN = 5757; // 1 +const static uint64_t SH_FLD_ERR_BRK1 = 5758; // 1 +const static uint64_t SH_FLD_ERR_BRK1_LEN = 5759; // 1 +const static uint64_t SH_FLD_ERR_BRK2 = 5760; // 1 +const static uint64_t SH_FLD_ERR_BRK2_LEN = 5761; // 1 +const static uint64_t SH_FLD_ERR_BRK3 = 5762; // 1 +const static uint64_t SH_FLD_ERR_BRK3_LEN = 5763; // 1 +const static uint64_t SH_FLD_ERR_BRK4 = 5764; // 1 +const static uint64_t SH_FLD_ERR_BRK4_LEN = 5765; // 1 +const static uint64_t SH_FLD_ERR_BRK5 = 5766; // 1 +const static uint64_t SH_FLD_ERR_BRK5_LEN = 5767; // 1 +const static uint64_t SH_FLD_ERR_CMD_OVERRUN = 5768; // 1 +const static uint64_t SH_FLD_ERR_FSM_DP18 = 5769; // 8 +const static uint64_t SH_FLD_ERR_FSM_DP18_LEN = 5770; // 8 +const static uint64_t SH_FLD_ERR_INJ = 5771; // 252 +const static uint64_t SH_FLD_ERR_INJ_ACTION = 5772; // 2 +const static uint64_t SH_FLD_ERR_INJ_ARRAY_SEL = 5773; // 2 +const static uint64_t SH_FLD_ERR_INJ_ARRAY_SEL_LEN = 5774; // 2 +const static uint64_t SH_FLD_ERR_INJ_A_BER_SEL = 5775; // 6 +const static uint64_t SH_FLD_ERR_INJ_A_BER_SEL_LEN = 5776; // 6 +const static uint64_t SH_FLD_ERR_INJ_A_COARSE_SEL = 5777; // 6 +const static uint64_t SH_FLD_ERR_INJ_A_COARSE_SEL_LEN = 5778; // 6 +const static uint64_t SH_FLD_ERR_INJ_A_ENABLE = 5779; // 116 +const static uint64_t SH_FLD_ERR_INJ_A_FINE_SEL = 5780; // 6 +const static uint64_t SH_FLD_ERR_INJ_A_FINE_SEL_LEN = 5781; // 6 +const static uint64_t SH_FLD_ERR_INJ_B_BER_SEL = 5782; // 6 +const static uint64_t SH_FLD_ERR_INJ_B_BER_SEL_LEN = 5783; // 6 +const static uint64_t SH_FLD_ERR_INJ_B_COARSE_SEL = 5784; // 6 +const static uint64_t SH_FLD_ERR_INJ_B_COARSE_SEL_LEN = 5785; // 6 +const static uint64_t SH_FLD_ERR_INJ_B_ENABLE = 5786; // 116 +const static uint64_t SH_FLD_ERR_INJ_B_FINE_SEL = 5787; // 6 +const static uint64_t SH_FLD_ERR_INJ_B_FINE_SEL_LEN = 5788; // 6 +const static uint64_t SH_FLD_ERR_INJ_CLOCK_ENABLE = 5789; // 6 +const static uint64_t SH_FLD_ERR_INJ_ENABLE = 5790; // 8 +const static uint64_t SH_FLD_ERR_INJ_LEN = 5791; // 136 +const static uint64_t SH_FLD_ERR_INJ_SLS_ALL_CMD = 5792; // 4 +const static uint64_t SH_FLD_ERR_INJ_SLS_CMD = 5793; // 4 +const static uint64_t SH_FLD_ERR_INJ_SLS_CMD_LEN = 5794; // 4 +const static uint64_t SH_FLD_ERR_INJ_SLS_MODE = 5795; // 4 +const static uint64_t SH_FLD_ERR_INJ_SLS_RECAL = 5796; // 4 +const static uint64_t SH_FLD_ERR_INJ_STATUS = 5797; // 2 +const static uint64_t SH_FLD_ERR_INJ_TYPE = 5798; // 2 +const static uint64_t SH_FLD_ERR_REG_DP18 = 5799; // 8 +const static uint64_t SH_FLD_ERR_REG_DP18_LEN = 5800; // 8 +const static uint64_t SH_FLD_ERR_SET0 = 5801; // 8 +const static uint64_t SH_FLD_ERR_SET1 = 5802; // 8 +const static uint64_t SH_FLD_ERR_SET2 = 5803; // 8 +const static uint64_t SH_FLD_ERR_SET3 = 5804; // 8 +const static uint64_t SH_FLD_ERR_SET4 = 5805; // 8 +const static uint64_t SH_FLD_ERR_SET5 = 5806; // 8 +const static uint64_t SH_FLD_ESB_OR_LSI_INTERRUPTS = 5807; // 1 +const static uint64_t SH_FLD_ESC1_PRIORITY = 5808; // 1 +const static uint64_t SH_FLD_ESC1_PRIORITY_LEN = 5809; // 1 +const static uint64_t SH_FLD_ESC1_RSD = 5810; // 1 +const static uint64_t SH_FLD_ESC1_RSD_LEN = 5811; // 1 +const static uint64_t SH_FLD_ESC2_PRIORITY = 5812; // 1 +const static uint64_t SH_FLD_ESC2_PRIORITY_LEN = 5813; // 1 +const static uint64_t SH_FLD_ESC2_RSD = 5814; // 1 +const static uint64_t SH_FLD_ESC2_RSD_LEN = 5815; // 1 +const static uint64_t SH_FLD_ESCAPE_ADDRESS = 5816; // 1 +const static uint64_t SH_FLD_ESCAPE_ADDRESS_LEN = 5817; // 1 +const static uint64_t SH_FLD_EVENT = 5818; // 6 +const static uint64_t SH_FLD_EVENT0 = 5819; // 3 +const static uint64_t SH_FLD_EVENT0_LEN = 5820; // 3 +const static uint64_t SH_FLD_EVENT0_SEL = 5821; // 2 +const static uint64_t SH_FLD_EVENT1 = 5822; // 3 +const static uint64_t SH_FLD_EVENT1_LEN = 5823; // 3 +const static uint64_t SH_FLD_EVENT1_SEL = 5824; // 2 +const static uint64_t SH_FLD_EVENT1_SEL_LEN = 5825; // 2 +const static uint64_t SH_FLD_EVENT2 = 5826; // 3 +const static uint64_t SH_FLD_EVENT2HALT_DELAY = 5827; // 1 +const static uint64_t SH_FLD_EVENT2HALT_DELAY_LEN = 5828; // 1 +const static uint64_t SH_FLD_EVENT2HALT_EN = 5829; // 1 +const static uint64_t SH_FLD_EVENT2HALT_EN_LEN = 5830; // 1 +const static uint64_t SH_FLD_EVENT2HALT_GPE0 = 5831; // 1 +const static uint64_t SH_FLD_EVENT2HALT_GPE1 = 5832; // 1 +const static uint64_t SH_FLD_EVENT2HALT_GPE2 = 5833; // 1 +const static uint64_t SH_FLD_EVENT2HALT_GPE3 = 5834; // 1 +const static uint64_t SH_FLD_EVENT2HALT_HALT_STATE = 5835; // 1 +const static uint64_t SH_FLD_EVENT2HALT_MODE = 5836; // 1 +const static uint64_t SH_FLD_EVENT2HALT_MODE_LEN = 5837; // 1 +const static uint64_t SH_FLD_EVENT2HALT_OCC = 5838; // 1 +const static uint64_t SH_FLD_EVENT2_LEN = 5839; // 3 +const static uint64_t SH_FLD_EVENT2_SEL = 5840; // 2 +const static uint64_t SH_FLD_EVENT2_SEL_LEN = 5841; // 2 +const static uint64_t SH_FLD_EVENT3 = 5842; // 3 +const static uint64_t SH_FLD_EVENT3_LEN = 5843; // 3 +const static uint64_t SH_FLD_EVENT3_SEL = 5844; // 2 +const static uint64_t SH_FLD_EVENT3_SEL_LEN = 5845; // 2 +const static uint64_t SH_FLD_EVENTCNT = 5846; // 3 +const static uint64_t SH_FLD_EVENTCNT_LEN = 5847; // 3 +const static uint64_t SH_FLD_EVENT_BUS_EN = 5848; // 4 +const static uint64_t SH_FLD_EVENT_BUS_ENABLE = 5849; // 4 +const static uint64_t SH_FLD_EVENT_BUS_EN_LEN = 5850; // 4 +const static uint64_t SH_FLD_EVENT_BUS_SELECTS = 5851; // 8 +const static uint64_t SH_FLD_EVENT_BUS_SELECTS_LEN = 5852; // 8 +const static uint64_t SH_FLD_EVENT_LEN = 5853; // 6 +const static uint64_t SH_FLD_EVENT_MUX_SELECTS = 5854; // 24 +const static uint64_t SH_FLD_EVENT_MUX_SELECTS_LEN = 5855; // 24 +const static uint64_t SH_FLD_EXBIST_MODE = 5856; // 6 +const static uint64_t SH_FLD_EXIT_1 = 5857; // 64 +const static uint64_t SH_FLD_EXIT_CRITERION_A_N = 5858; // 96 +const static uint64_t SH_FLD_EXTADDR = 5859; // 6 +const static uint64_t SH_FLD_EXTADDR_LEN = 5860; // 6 +const static uint64_t SH_FLD_EXTERNAL_TRAP = 5861; // 1 +const static uint64_t SH_FLD_EXTERNAL_XSTOP = 5862; // 4 +const static uint64_t SH_FLD_EXTRA_CMD_SPACING_0_2 = 5863; // 1 +const static uint64_t SH_FLD_EXTRA_CMD_SPACING_0_2_LEN = 5864; // 1 +const static uint64_t SH_FLD_EXTRA_DAT_SPACING_0_3 = 5865; // 1 +const static uint64_t SH_FLD_EXTRA_DAT_SPACING_0_3_LEN = 5866; // 1 +const static uint64_t SH_FLD_EXT_EBB_EXIT_ENABLE = 5867; // 96 +const static uint64_t SH_FLD_EXT_EXIT_ENABLE = 5868; // 96 +const static uint64_t SH_FLD_EXT_INTERRUPT = 5869; // 1 +const static uint64_t SH_FLD_EXT_RESUME_EXIT_ENABLE = 5870; // 96 +const static uint64_t SH_FLD_EYE_OPT_DONE = 5871; // 4 +const static uint64_t SH_FLD_EYE_OPT_FAILED = 5872; // 4 +const static uint64_t SH_FLD_E_BIST_EN = 5873; // 2 +const static uint64_t SH_FLD_E_CONTROLS = 5874; // 48 +const static uint64_t SH_FLD_E_CONTROLS_LEN = 5875; // 48 +const static uint64_t SH_FLD_E_CTLE_COARSE = 5876; // 48 +const static uint64_t SH_FLD_E_CTLE_COARSE_LEN = 5877; // 48 +const static uint64_t SH_FLD_E_CTLE_GAIN = 5878; // 48 +const static uint64_t SH_FLD_E_CTLE_GAIN_LEN = 5879; // 48 +const static uint64_t SH_FLD_E_EVEN_INTEG_FINE_GAIN = 5880; // 48 +const static uint64_t SH_FLD_E_EVEN_INTEG_FINE_GAIN_LEN = 5881; // 48 +const static uint64_t SH_FLD_E_INTEG_COARSE_GAIN = 5882; // 48 +const static uint64_t SH_FLD_E_INTEG_COARSE_GAIN_LEN = 5883; // 48 +const static uint64_t SH_FLD_E_ODD_INTEG_FINE_GAIN = 5884; // 48 +const static uint64_t SH_FLD_E_ODD_INTEG_FINE_GAIN_LEN = 5885; // 48 +const static uint64_t SH_FLD_E_OFFSET = 5886; // 48 +const static uint64_t SH_FLD_E_OFFSET_E = 5887; // 48 +const static uint64_t SH_FLD_E_OFFSET_E_LEN = 5888; // 48 +const static uint64_t SH_FLD_E_OFFSET_LEN = 5889; // 48 +const static uint64_t SH_FLD_E_TARG_MIN = 5890; // 1 +const static uint64_t SH_FLD_E_TARG_MIN_LEN = 5891; // 1 +const static uint64_t SH_FLD_FACTOR = 5892; // 24 +const static uint64_t SH_FLD_FACTOR_LEN = 5893; // 24 +const static uint64_t SH_FLD_FAIL = 5894; // 4 +const static uint64_t SH_FLD_FAILED_LINK_ON_INTERRUPT = 5895; // 1 +const static uint64_t SH_FLD_FAILING_OPB_MASTER_ACT = 5896; // 3 +const static uint64_t SH_FLD_FAILING_OPB_MASTER_ACT_LEN = 5897; // 3 +const static uint64_t SH_FLD_FAILING_OPB_MASTER_FRST = 5898; // 3 +const static uint64_t SH_FLD_FAILING_OPB_MASTER_FRST_LEN = 5899; // 3 +const static uint64_t SH_FLD_FAIL_REG = 5900; // 1 +const static uint64_t SH_FLD_FAIL_REG_LEN = 5901; // 1 +const static uint64_t SH_FLD_FAIL_TYPE = 5902; // 2 +const static uint64_t SH_FLD_FAIL_TYPE_LEN = 5903; // 2 +const static uint64_t SH_FLD_FARB_CAL_RECVFSM_1HOT = 5904; // 8 +const static uint64_t SH_FLD_FARB_PE = 5905; // 8 +const static uint64_t SH_FLD_FARR = 5906; // 43 +const static uint64_t SH_FLD_FASTPATH_LIMIT = 5907; // 8 +const static uint64_t SH_FLD_FASTPATH_LIMIT_LEN = 5908; // 8 +const static uint64_t SH_FLD_FAST_SIM_CNTR = 5909; // 8 +const static uint64_t SH_FLD_FBC = 5910; // 2 +const static uint64_t SH_FLD_FBC_ADDRESS = 5911; // 1 +const static uint64_t SH_FLD_FBC_ADDRESS_ERROR = 5912; // 1 +const static uint64_t SH_FLD_FBC_ADDRESS_LEN = 5913; // 1 +const static uint64_t SH_FLD_FBC_ADDR_DONE = 5914; // 1 +const static uint64_t SH_FLD_FBC_AFTER_QUIESCE_WAIT_COUNT = 5915; // 1 +const static uint64_t SH_FLD_FBC_AFTER_QUIESCE_WAIT_COUNT_LEN = 5916; // 1 +const static uint64_t SH_FLD_FBC_AUTOINC_ERROR = 5917; // 1 +const static uint64_t SH_FLD_FBC_AUTO_INC = 5918; // 1 +const static uint64_t SH_FLD_FBC_AXTYPE = 5919; // 1 +const static uint64_t SH_FLD_FBC_BEFORE_INIT_WAIT_COUNT = 5920; // 1 +const static uint64_t SH_FLD_FBC_BEFORE_INIT_WAIT_COUNT_LEN = 5921; // 1 +const static uint64_t SH_FLD_FBC_BUS0_STG1_SEL = 5922; // 1 +const static uint64_t SH_FLD_FBC_BUS0_STG2_SEL = 5923; // 1 +const static uint64_t SH_FLD_FBC_BUS1_STG1_SEL = 5924; // 1 +const static uint64_t SH_FLD_FBC_BUS1_STG2_SEL = 5925; // 1 +const static uint64_t SH_FLD_FBC_CLEAR_STATUS = 5926; // 1 +const static uint64_t SH_FLD_FBC_COMMAND_ERROR = 5927; // 1 +const static uint64_t SH_FLD_FBC_CRESP_VALUE = 5928; // 1 +const static uint64_t SH_FLD_FBC_CRESP_VALUE_LEN = 5929; // 1 +const static uint64_t SH_FLD_FBC_DATA_DONE = 5930; // 1 +const static uint64_t SH_FLD_FBC_DATA_ONLY = 5931; // 1 +const static uint64_t SH_FLD_FBC_DIN_ECC_CHK_DIS = 5932; // 1 +const static uint64_t SH_FLD_FBC_DISABLE = 5933; // 1 +const static uint64_t SH_FLD_FBC_DISABLE_LOCAL_SHORTCUT = 5934; // 1 +const static uint64_t SH_FLD_FBC_DROP_PRIORITY = 5935; // 1 +const static uint64_t SH_FLD_FBC_DROP_PRIORITY_MAX = 5936; // 1 +const static uint64_t SH_FLD_FBC_ECC_CE = 5937; // 1 +const static uint64_t SH_FLD_FBC_ECC_SUE = 5938; // 1 +const static uint64_t SH_FLD_FBC_ECC_UE = 5939; // 1 +const static uint64_t SH_FLD_FBC_LEN = 5940; // 2 +const static uint64_t SH_FLD_FBC_LFSR_DIS = 5941; // 1 +const static uint64_t SH_FLD_FBC_LOCKED = 5942; // 1 +const static uint64_t SH_FLD_FBC_LOCK_ID = 5943; // 1 +const static uint64_t SH_FLD_FBC_LOCK_ID_LEN = 5944; // 1 +const static uint64_t SH_FLD_FBC_OVERRUN_ERROR = 5945; // 1 +const static uint64_t SH_FLD_FBC_OVERWRITE_PBINIT = 5946; // 1 +const static uint64_t SH_FLD_FBC_PBINIT_MISSING = 5947; // 1 +const static uint64_t SH_FLD_FBC_PB_DATA_HANG_ERR = 5948; // 1 +const static uint64_t SH_FLD_FBC_PB_OP_HANG_ERR = 5949; // 1 +const static uint64_t SH_FLD_FBC_PB_UNEXPECT_CRESP_ERR = 5950; // 1 +const static uint64_t SH_FLD_FBC_PB_UNEXPECT_DATA_ERR = 5951; // 1 +const static uint64_t SH_FLD_FBC_PIB_DIRECT = 5952; // 1 +const static uint64_t SH_FLD_FBC_PIB_DIRECT_DONE = 5953; // 1 +const static uint64_t SH_FLD_FBC_PIB_ERROR = 5954; // 1 +const static uint64_t SH_FLD_FBC_PIB_ERROR_LEN = 5955; // 1 +const static uint64_t SH_FLD_FBC_RESET = 5956; // 1 +const static uint64_t SH_FLD_FBC_RESET_FSM = 5957; // 1 +const static uint64_t SH_FLD_FBC_RNW = 5958; // 1 +const static uint64_t SH_FLD_FBC_SCOPE = 5959; // 1 +const static uint64_t SH_FLD_FBC_SCOPE_LEN = 5960; // 1 +const static uint64_t SH_FLD_FBC_START_OP = 5961; // 1 +const static uint64_t SH_FLD_FBC_TSIZE = 5962; // 1 +const static uint64_t SH_FLD_FBC_TSIZE_LEN = 5963; // 1 +const static uint64_t SH_FLD_FBC_TTYPE = 5964; // 1 +const static uint64_t SH_FLD_FBC_TTYPE_LEN = 5965; // 1 +const static uint64_t SH_FLD_FBC_WAIT_CMD_ARBIT = 5966; // 1 +const static uint64_t SH_FLD_FBC_WAIT_PIB_DIRECT = 5967; // 1 +const static uint64_t SH_FLD_FBC_WAIT_RESP = 5968; // 1 +const static uint64_t SH_FLD_FBC_WITH_PBINIT_LOW_WAIT = 5969; // 1 +const static uint64_t SH_FLD_FBC_WITH_POST_INIT = 5970; // 1 +const static uint64_t SH_FLD_FBC_WITH_PRE_QUIESCE = 5971; // 1 +const static uint64_t SH_FLD_FBC_WITH_TM_QUIESCE = 5972; // 1 +const static uint64_t SH_FLD_FBC_XLAT_ECC_CHK_DIS = 5973; // 1 +const static uint64_t SH_FLD_FBC_XLAT_PROT_ERR_CHK_DIS = 5974; // 1 +const static uint64_t SH_FLD_FBC_XLAT_TIMEOUT_CHK_DIS = 5975; // 1 +const static uint64_t SH_FLD_FENCE = 5976; // 4 +const static uint64_t SH_FLD_FENCE1_DC = 5977; // 1 +const static uint64_t SH_FLD_FENCE2_DC = 5978; // 1 +const static uint64_t SH_FLD_FENCE3_DC = 5979; // 1 +const static uint64_t SH_FLD_FENCE4_DC = 5980; // 1 +const static uint64_t SH_FLD_FENCE5_DC = 5981; // 1 +const static uint64_t SH_FLD_FENCE6_DC = 5982; // 1 +const static uint64_t SH_FLD_FENCE_EISR = 5983; // 24 +const static uint64_t SH_FLD_FENCE_EN = 5984; // 43 +const static uint64_t SH_FLD_FENCE_GX_INTERFACE = 5985; // 1 +const static uint64_t SH_FLD_FENCE_IO_INTERFACE = 5986; // 1 +const static uint64_t SH_FLD_FENCE_TLBIE = 5987; // 12 +const static uint64_t SH_FLD_FFE_BOOST_EN = 5988; // 6 +const static uint64_t SH_FLD_FF_BYPASS = 5989; // 6 +const static uint64_t SH_FLD_FF_SLEWRATE = 5990; // 6 +const static uint64_t SH_FLD_FF_SLEWRATE_LEN = 5991; // 6 +const static uint64_t SH_FLD_FGAT = 5992; // 1 +const static uint64_t SH_FLD_FGAT_0 = 5993; // 1 +const static uint64_t SH_FLD_FGAT_1 = 5994; // 1 +const static uint64_t SH_FLD_FGAT_2 = 5995; // 1 +const static uint64_t SH_FLD_FGAT_3 = 5996; // 1 +const static uint64_t SH_FLD_FIFO_BITS_READ0_0 = 5997; // 2 +const static uint64_t SH_FLD_FIFO_BITS_READ0_0_LEN = 5998; // 2 +const static uint64_t SH_FLD_FIFO_BITS_READ0_1 = 5999; // 2 +const static uint64_t SH_FLD_FIFO_BITS_READ0_1_LEN = 6000; // 2 +const static uint64_t SH_FLD_FIFO_BITS_READ0_2 = 6001; // 2 +const static uint64_t SH_FLD_FIFO_BITS_READ0_2_LEN = 6002; // 2 +const static uint64_t SH_FLD_FIFO_BITS_READ0_3 = 6003; // 2 +const static uint64_t SH_FLD_FIFO_BITS_READ0_3_LEN = 6004; // 2 +const static uint64_t SH_FLD_FIFO_DLY_CFG = 6005; // 120 +const static uint64_t SH_FLD_FIFO_DLY_CFG_LEN = 6006; // 120 +const static uint64_t SH_FLD_FIFO_EMPTY = 6007; // 1 +const static uint64_t SH_FLD_FIFO_ENTRY_COUNT = 6008; // 1 +const static uint64_t SH_FLD_FIFO_ENTRY_COUNT_0 = 6009; // 1 +const static uint64_t SH_FLD_FIFO_ENTRY_COUNT_0_LEN = 6010; // 1 +const static uint64_t SH_FLD_FIFO_ENTRY_COUNT_1 = 6011; // 1 +const static uint64_t SH_FLD_FIFO_ENTRY_COUNT_1_LEN = 6012; // 1 +const static uint64_t SH_FLD_FIFO_ENTRY_COUNT_2 = 6013; // 1 +const static uint64_t SH_FLD_FIFO_ENTRY_COUNT_2_LEN = 6014; // 1 +const static uint64_t SH_FLD_FIFO_ENTRY_COUNT_3 = 6015; // 1 +const static uint64_t SH_FLD_FIFO_ENTRY_COUNT_3_LEN = 6016; // 1 +const static uint64_t SH_FLD_FIFO_ENTRY_COUNT_LEN = 6017; // 1 +const static uint64_t SH_FLD_FIFO_EOT_FLAGS = 6018; // 1 +const static uint64_t SH_FLD_FIFO_EOT_FLAGS_LEN = 6019; // 1 +const static uint64_t SH_FLD_FIFO_FINAL_L2U_DLY = 6020; // 4 +const static uint64_t SH_FLD_FIFO_FINAL_L2U_DLY_LEN = 6021; // 4 +const static uint64_t SH_FLD_FIFO_FULL = 6022; // 7 +const static uint64_t SH_FLD_FIFO_HALF_DEPTH_MODE = 6023; // 72 +const static uint64_t SH_FLD_FIFO_HALF_WIDTH_MODE = 6024; // 140 +const static uint64_t SH_FLD_FIFO_INITIAL_L2U_DLY = 6025; // 4 +const static uint64_t SH_FLD_FIFO_INITIAL_L2U_DLY_LEN = 6026; // 4 +const static uint64_t SH_FLD_FIFO_L2U_DLY = 6027; // 188 +const static uint64_t SH_FLD_FIFO_L2U_DLY_LEN = 6028; // 188 +const static uint64_t SH_FLD_FIFO_VALID_FLAGS = 6029; // 1 +const static uint64_t SH_FLD_FIFO_VALID_FLAGS_LEN = 6030; // 1 +const static uint64_t SH_FLD_FILTDIVSEL = 6031; // 3 +const static uint64_t SH_FLD_FILTDIVSEL_LEN = 6032; // 3 +const static uint64_t SH_FLD_FILTER_MODE = 6033; // 6 +const static uint64_t SH_FLD_FILTER_MODE_LEN = 6034; // 6 +const static uint64_t SH_FLD_FINE_CAL_STEP_SIZE = 6035; // 8 +const static uint64_t SH_FLD_FINE_CAL_STEP_SIZE_LEN = 6036; // 8 +const static uint64_t SH_FLD_FIR = 6037; // 49 +const static uint64_t SH_FLD_FIR0_CR0_ATAG_PERR = 6038; // 12 +const static uint64_t SH_FLD_FIR0_CR0_TTAG_PERR = 6039; // 12 +const static uint64_t SH_FLD_FIR0_CR1_ATAG_PERR = 6040; // 12 +const static uint64_t SH_FLD_FIR0_CR1_TTAG_PERR = 6041; // 12 +const static uint64_t SH_FLD_FIR0_CR2_ATAG_PERR = 6042; // 12 +const static uint64_t SH_FLD_FIR0_CR2_TTAG_PERR = 6043; // 12 +const static uint64_t SH_FLD_FIR0_CR3_ATAG_PERR = 6044; // 12 +const static uint64_t SH_FLD_FIR0_CR3_TTAG_PERR = 6045; // 12 +const static uint64_t SH_FLD_FIR0_ILLEGAL_STORE_SIZE = 6046; // 12 +const static uint64_t SH_FLD_FIR0_IMA_FSM_TIMEOUT = 6047; // 12 +const static uint64_t SH_FLD_FIR0_LD_AMO_SEQ = 6048; // 12 +const static uint64_t SH_FLD_FIR0_OVERFLOW = 6049; // 12 +const static uint64_t SH_FLD_FIR0_PBARB_TRASHMODE = 6050; // 12 +const static uint64_t SH_FLD_FIR0_PPE_RD_FSM_TIMEOUT = 6051; // 12 +const static uint64_t SH_FLD_FIR0_PPE_WR_FSM_TIMEOUT = 6052; // 12 +const static uint64_t SH_FLD_FIR0_PURGE_ABORT_LVL_ERR1 = 6053; // 12 +const static uint64_t SH_FLD_FIR0_PURGE_ABORT_LVL_ERR2 = 6054; // 12 +const static uint64_t SH_FLD_FIR0_PURGE_DONE_LVL_ERR1 = 6055; // 12 +const static uint64_t SH_FLD_FIR0_PURGE_LVL_ERR1 = 6056; // 12 +const static uint64_t SH_FLD_FIR0_PURGE_LVL_ERR2 = 6057; // 12 +const static uint64_t SH_FLD_FIR0_SNP0_ADDR_PERR = 6058; // 12 +const static uint64_t SH_FLD_FIR0_SNP0_TTAG_PERR = 6059; // 12 +const static uint64_t SH_FLD_FIR0_SNP1_ADDR_PERR = 6060; // 12 +const static uint64_t SH_FLD_FIR0_SNP1_TTAG_PERR = 6061; // 12 +const static uint64_t SH_FLD_FIR0_TLB_DATA_PAR = 6062; // 12 +const static uint64_t SH_FLD_FIR11_LRU_MEM_INVALID_ABCD = 6063; // 12 +const static uint64_t SH_FLD_FIR11_LRU_MEM_INVALID_EFGH = 6064; // 12 +const static uint64_t SH_FLD_FIR14_B01_BOTH_ACTIVE = 6065; // 12 +const static uint64_t SH_FLD_FIR14_B0_SD_DIR_MULT_HIT = 6066; // 12 +const static uint64_t SH_FLD_FIR14_B1_SD_DIR_MULT_HIT = 6067; // 12 +const static uint64_t SH_FLD_FIR14_B2_SD_DIR_MULT_HIT = 6068; // 12 +const static uint64_t SH_FLD_FIR14_B3_SD_DIR_MULT_HIT = 6069; // 12 +const static uint64_t SH_FLD_FIR14_BAD_FP_MATE = 6070; // 12 +const static uint64_t SH_FLD_FIR14_COX_UNEXP_IDLE_PB_CRESP = 6071; // 12 +const static uint64_t SH_FLD_FIR14_CR0_ATAG_PERR = 6072; // 12 +const static uint64_t SH_FLD_FIR14_CR0_TTAG_PERR = 6073; // 12 +const static uint64_t SH_FLD_FIR14_CR1_ATAG_PERR = 6074; // 12 +const static uint64_t SH_FLD_FIR14_CR1_TTAG_PERR = 6075; // 12 +const static uint64_t SH_FLD_FIR14_CR2_ATAG_PERR = 6076; // 12 +const static uint64_t SH_FLD_FIR14_CR2_TTAG_PERR = 6077; // 12 +const static uint64_t SH_FLD_FIR14_CR3_ATAG_PERR = 6078; // 12 +const static uint64_t SH_FLD_FIR14_CR3_TTAG_PERR = 6079; // 12 +const static uint64_t SH_FLD_FIR14_DW_SET_REF_WITH_FLAG_IDLE = 6080; // 12 +const static uint64_t SH_FLD_FIR14_DW_SET_SI_BY_MACH = 6081; // 12 +const static uint64_t SH_FLD_FIR14_HANG_WAITING_FOR_FP_MATE = 6082; // 12 +const static uint64_t SH_FLD_FIR14_IFU_MULT_REQ = 6083; // 12 +const static uint64_t SH_FLD_FIR14_INVALID_SNP_CPS_STATU_RTN = 6084; // 12 +const static uint64_t SH_FLD_FIR14_KILL_REF_WITH_FLAG_IDLE = 6085; // 12 +const static uint64_t SH_FLD_FIR14_L3PF_MACH_DONE = 6086; // 12 +const static uint64_t SH_FLD_FIR14_L3PF_REQ = 6087; // 12 +const static uint64_t SH_FLD_FIR14_LSU_TAG_REUSE = 6088; // 12 +const static uint64_t SH_FLD_FIR14_NCCTL_RLD_BARRIER = 6089; // 12 +const static uint64_t SH_FLD_FIR14_NCCTL_SNP = 6090; // 12 +const static uint64_t SH_FLD_FIR14_NCCTL_SYNC = 6091; // 12 +const static uint64_t SH_FLD_FIR14_NCCTL_TLBIE_ACK = 6092; // 12 +const static uint64_t SH_FLD_FIR14_NCCTL_VSYNC = 6093; // 12 +const static uint64_t SH_FLD_FIR14_NCU_TID_DONE = 6094; // 12 +const static uint64_t SH_FLD_FIR14_PBARB_FSM_REQ_OVERFLOW = 6095; // 12 +const static uint64_t SH_FLD_FIR14_PBARB_TRASHMODE_PB_REQ = 6096; // 12 +const static uint64_t SH_FLD_FIR14_PD_DIR_MULT_HIT = 6097; // 12 +const static uint64_t SH_FLD_FIR14_PHANTOM_B01_REQ = 6098; // 12 +const static uint64_t SH_FLD_FIR14_RCMD0_ADDR_PERR = 6099; // 12 +const static uint64_t SH_FLD_FIR14_RCMD0_TTAG_PERR = 6100; // 12 +const static uint64_t SH_FLD_FIR14_RCMD1_ADDR_PERR = 6101; // 12 +const static uint64_t SH_FLD_FIR14_RCMD1_TTAG_PERR = 6102; // 12 +const static uint64_t SH_FLD_FIR14_RCMD2_ADDR_PERR = 6103; // 12 +const static uint64_t SH_FLD_FIR14_RCMD2_TTAG_PERR = 6104; // 12 +const static uint64_t SH_FLD_FIR14_RCMD3_ADDR_PERR = 6105; // 12 +const static uint64_t SH_FLD_FIR14_RCMD3_TTAG_PERR = 6106; // 12 +const static uint64_t SH_FLD_FIR14_RCX_UNEXP_IDLE_L3_CRESP = 6107; // 12 +const static uint64_t SH_FLD_FIR14_RCX_UNEXP_IDLE_L3_DWDONE = 6108; // 12 +const static uint64_t SH_FLD_FIR14_RCX_UNEXP_IDLE_PBL3_DATA = 6109; // 12 +const static uint64_t SH_FLD_FIR14_RCX_UNEXP_IDLE_PB_CRESP = 6110; // 12 +const static uint64_t SH_FLD_FIR14_RCX_UNEXP_PB_RC_DTAG_PCHK = 6111; // 12 +const static uint64_t SH_FLD_FIR14_RC_PBBUS_SFSTAT = 6112; // 12 +const static uint64_t SH_FLD_FIR14_RC_UNEXP_DIRSTAT_VS_DSECT_CHK = 6113; // 12 +const static uint64_t SH_FLD_FIR14_RC_UNEXP_F2_DATA = 6114; // 12 +const static uint64_t SH_FLD_FIR14_RC_UNEXP_PURG_HIT = 6115; // 12 +const static uint64_t SH_FLD_FIR14_RVCTL = 6116; // 12 +const static uint64_t SH_FLD_FIR14_SRCTL0_BAD_HPC = 6117; // 12 +const static uint64_t SH_FLD_FIR14_SRCTL1_BAD_HPC = 6118; // 12 +const static uint64_t SH_FLD_FIR14_SRCTL2_BAD_HPC = 6119; // 12 +const static uint64_t SH_FLD_FIR14_SRCTL3_BAD_HPC = 6120; // 12 +const static uint64_t SH_FLD_FIR14_STQ_COMING = 6121; // 12 +const static uint64_t SH_FLD_FIR14_STQ_OVERFLOW = 6122; // 12 +const static uint64_t SH_FLD_FIR14_TMA_LARXA_VS_FRCMISS_SV = 6123; // 12 +const static uint64_t SH_FLD_FIR14_TMCTL_TIDX_TEND_LDST_SEQ = 6124; // 12 +const static uint64_t SH_FLD_FIR14_XLT_QUEUE_OVRFLW = 6125; // 12 +const static uint64_t SH_FLD_FIR14_XPF_MULT_REQ = 6126; // 12 +const static uint64_t SH_FLD_FIR19_LD_TGT_NODAL_DINC = 6127; // 12 +const static uint64_t SH_FLD_FIR19_ST_TGT_NODAL_DINC = 6128; // 12 +const static uint64_t SH_FLD_FIR1_MASTER_SEQ_ID_PAR = 6129; // 12 +const static uint64_t SH_FLD_FIR1_SNOOP_TLBIE_SEQ_PARITY = 6130; // 12 +const static uint64_t SH_FLD_FIR1_TLBIE_BAD_OP = 6131; // 12 +const static uint64_t SH_FLD_FIR37_RC_TGT_NODAL_REQ_CRESP_DINC = 6132; // 12 +const static uint64_t SH_FLD_FIR37_SN_TGT_NODAL_REQ_CRESP_DINC = 6133; // 12 +const static uint64_t SH_FLD_FIR9_PEC_PHASE3_TIMEOUT = 6134; // 12 +const static uint64_t SH_FLD_FIR9_PEC_PHASE4_RCCO_DISP_FAIL = 6135; // 12 +const static uint64_t SH_FLD_FIR9_PEC_PHASE4_SAME = 6136; // 12 +const static uint64_t SH_FLD_FIR9_PEC_PHASE5_TIMEOUT = 6137; // 12 +const static uint64_t SH_FLD_FIRST_ERROR = 6138; // 3 +const static uint64_t SH_FLD_FIRST_ERROR_CAPTURED = 6139; // 1 +const static uint64_t SH_FLD_FIRST_ERROR_DECODE = 6140; // 1 +const static uint64_t SH_FLD_FIRST_ERROR_DECODE_LEN = 6141; // 1 +const static uint64_t SH_FLD_FIRST_ERROR_INFO = 6142; // 1 +const static uint64_t SH_FLD_FIRST_ERROR_INFO_LEN = 6143; // 1 +const static uint64_t SH_FLD_FIRST_ERROR_LEN = 6144; // 3 +const static uint64_t SH_FLD_FIRST_ERROR_SPARE = 6145; // 1 +const static uint64_t SH_FLD_FIRST_ERROR_SPARE_LEN = 6146; // 1 +const static uint64_t SH_FLD_FIR_ACTION0 = 6147; // 13 +const static uint64_t SH_FLD_FIR_ACTION0_LEN = 6148; // 13 +const static uint64_t SH_FLD_FIR_ACTION1 = 6149; // 13 +const static uint64_t SH_FLD_FIR_ACTION1_LEN = 6150; // 13 +const static uint64_t SH_FLD_FIR_LEN = 6151; // 49 +const static uint64_t SH_FLD_FIR_MASK = 6152; // 16 +const static uint64_t SH_FLD_FIR_MASK_LEN = 6153; // 16 +const static uint64_t SH_FLD_FIR_PARITY_ERR = 6154; // 13 +const static uint64_t SH_FLD_FIR_PARITY_ERR2 = 6155; // 1 +const static uint64_t SH_FLD_FIR_PARITY_ERR2_MASK = 6156; // 1 +const static uint64_t SH_FLD_FIR_PARITY_ERR_DUP = 6157; // 12 +const static uint64_t SH_FLD_FIR_PARITY_ERR_MASK = 6158; // 1 +const static uint64_t SH_FLD_FIR_RESET = 6159; // 6 +const static uint64_t SH_FLD_FIR_TRIGGER = 6160; // 17 +const static uint64_t SH_FLD_FIT_SEL = 6161; // 17 +const static uint64_t SH_FLD_FIT_SEL_LEN = 6162; // 17 +const static uint64_t SH_FLD_FLAG = 6163; // 2 +const static uint64_t SH_FLD_FLUSH_ALIGN_OVR = 6164; // 43 +const static uint64_t SH_FLD_FLUSH_CP_IG_STATE_MAP = 6165; // 2 +const static uint64_t SH_FLD_FLUSH_CP_IG_STATE_MAP_LEN = 6166; // 2 +const static uint64_t SH_FLD_FLUSH_IC = 6167; // 24 +const static uint64_t SH_FLD_FLUSH_SCAN_N = 6168; // 43 +const static uint64_t SH_FLD_FLUSH_SUE_STATE_MAP = 6169; // 2 +const static uint64_t SH_FLD_FLUSH_SUE_STATE_MAP_LEN = 6170; // 2 +const static uint64_t SH_FLD_FMAX = 6171; // 6 +const static uint64_t SH_FLD_FMAX_LEN = 6172; // 6 +const static uint64_t SH_FLD_FMIN = 6173; // 6 +const static uint64_t SH_FLD_FMIN_LEN = 6174; // 6 +const static uint64_t SH_FLD_FMR00_TRAINED = 6175; // 4 +const static uint64_t SH_FLD_FMR01_TRAINED = 6176; // 4 +const static uint64_t SH_FLD_FMR02_TRAINED = 6177; // 4 +const static uint64_t SH_FLD_FMR03_TRAINED = 6178; // 4 +const static uint64_t SH_FLD_FMR04_TRAINED = 6179; // 4 +const static uint64_t SH_FLD_FMR05_TRAINED = 6180; // 4 +const static uint64_t SH_FLD_FMR06_TRAINED = 6181; // 2 +const static uint64_t SH_FLD_FMR07_TRAINED = 6182; // 2 +const static uint64_t SH_FLD_FORCE_BYPASS = 6183; // 1 +const static uint64_t SH_FLD_FORCE_CL_INJECT = 6184; // 1 +const static uint64_t SH_FLD_FORCE_DOUBLE_BIT_ECC_ERR = 6185; // 4 +const static uint64_t SH_FLD_FORCE_ECC_CE = 6186; // 2 +const static uint64_t SH_FLD_FORCE_ECC_SEL = 6187; // 1 +const static uint64_t SH_FLD_FORCE_ECC_SEL_0_1 = 6188; // 1 +const static uint64_t SH_FLD_FORCE_ECC_SEL_0_1_LEN = 6189; // 1 +const static uint64_t SH_FLD_FORCE_ECC_UE = 6190; // 2 +const static uint64_t SH_FLD_FORCE_MAX_SCOPE_INTRP = 6191; // 1 +const static uint64_t SH_FLD_FORCE_MPR = 6192; // 8 +const static uint64_t SH_FLD_FORCE_NON_INBAND_CL_FULL = 6193; // 4 +const static uint64_t SH_FLD_FORCE_ON_CLK_GATE = 6194; // 8 +const static uint64_t SH_FLD_FORCE_PR_INJECT = 6195; // 1 +const static uint64_t SH_FLD_FORCE_RESERVED = 6196; // 8 +const static uint64_t SH_FLD_FORCE_RESET = 6197; // 1 +const static uint64_t SH_FLD_FORCE_SFSTAT_ACTIVE = 6198; // 4 +const static uint64_t SH_FLD_FORCE_SINGLE_BIT_ECC_ERR = 6199; // 4 +const static uint64_t SH_FLD_FORCE_THRES_ACT = 6200; // 43 +const static uint64_t SH_FLD_FORCE_VG_SYS_INTRP = 6201; // 1 +const static uint64_t SH_FLD_FOREIGN_LINK_HANG_ERROR = 6202; // 4 +const static uint64_t SH_FLD_FP0_CREDIT_PRIORITY_4_NOT_8 = 6203; // 2 +const static uint64_t SH_FLD_FP0_DISABLE_CMD_COMPRESSION = 6204; // 2 +const static uint64_t SH_FLD_FP0_DISABLE_GATHERING = 6205; // 2 +const static uint64_t SH_FLD_FP0_DISABLE_PRSP_COMPRESSION = 6206; // 2 +const static uint64_t SH_FLD_FP0_FMR_DISABLE = 6207; // 2 +const static uint64_t SH_FLD_FP0_FMR_SPARE = 6208; // 2 +const static uint64_t SH_FLD_FP0_FMR_SPARE_LEN = 6209; // 2 +const static uint64_t SH_FLD_FP0_LL_CREDIT_HI_LIMIT = 6210; // 2 +const static uint64_t SH_FLD_FP0_LL_CREDIT_HI_LIMIT_LEN = 6211; // 2 +const static uint64_t SH_FLD_FP0_LL_CREDIT_LO_LIMIT = 6212; // 2 +const static uint64_t SH_FLD_FP0_LL_CREDIT_LO_LIMIT_LEN = 6213; // 2 +const static uint64_t SH_FLD_FP0_PRS_DISABLE = 6214; // 2 +const static uint64_t SH_FLD_FP0_PRS_SPARE = 6215; // 2 +const static uint64_t SH_FLD_FP0_PRS_SPARE_LEN = 6216; // 2 +const static uint64_t SH_FLD_FP0_RUN_AFTER_FRAME_ERROR = 6217; // 2 +const static uint64_t SH_FLD_FP1_CREDIT_PRIORITY_4_NOT_8 = 6218; // 2 +const static uint64_t SH_FLD_FP1_DISABLE_CMD_COMPRESSION = 6219; // 2 +const static uint64_t SH_FLD_FP1_DISABLE_GATHERING = 6220; // 2 +const static uint64_t SH_FLD_FP1_DISABLE_PRSP_COMPRESSION = 6221; // 2 +const static uint64_t SH_FLD_FP1_FMR_DISABLE = 6222; // 2 +const static uint64_t SH_FLD_FP1_FMR_SPARE = 6223; // 2 +const static uint64_t SH_FLD_FP1_FMR_SPARE_LEN = 6224; // 2 +const static uint64_t SH_FLD_FP1_LL_CREDIT_HI_LIMIT = 6225; // 2 +const static uint64_t SH_FLD_FP1_LL_CREDIT_HI_LIMIT_LEN = 6226; // 2 +const static uint64_t SH_FLD_FP1_LL_CREDIT_LO_LIMIT = 6227; // 2 +const static uint64_t SH_FLD_FP1_LL_CREDIT_LO_LIMIT_LEN = 6228; // 2 +const static uint64_t SH_FLD_FP1_PRS_DISABLE = 6229; // 2 +const static uint64_t SH_FLD_FP1_PRS_SPARE = 6230; // 2 +const static uint64_t SH_FLD_FP1_PRS_SPARE_LEN = 6231; // 2 +const static uint64_t SH_FLD_FP1_RUN_AFTER_FRAME_ERROR = 6232; // 2 +const static uint64_t SH_FLD_FP2_CREDIT_PRIORITY_4_NOT_8 = 6233; // 2 +const static uint64_t SH_FLD_FP2_DISABLE_CMD_COMPRESSION = 6234; // 2 +const static uint64_t SH_FLD_FP2_DISABLE_GATHERING = 6235; // 2 +const static uint64_t SH_FLD_FP2_DISABLE_PRSP_COMPRESSION = 6236; // 2 +const static uint64_t SH_FLD_FP2_FMR_DISABLE = 6237; // 2 +const static uint64_t SH_FLD_FP2_FMR_SPARE = 6238; // 2 +const static uint64_t SH_FLD_FP2_FMR_SPARE_LEN = 6239; // 2 +const static uint64_t SH_FLD_FP2_LL_CREDIT_HI_LIMIT = 6240; // 2 +const static uint64_t SH_FLD_FP2_LL_CREDIT_HI_LIMIT_LEN = 6241; // 2 +const static uint64_t SH_FLD_FP2_LL_CREDIT_LO_LIMIT = 6242; // 2 +const static uint64_t SH_FLD_FP2_LL_CREDIT_LO_LIMIT_LEN = 6243; // 2 +const static uint64_t SH_FLD_FP2_PRS_DISABLE = 6244; // 2 +const static uint64_t SH_FLD_FP2_PRS_SPARE = 6245; // 2 +const static uint64_t SH_FLD_FP2_PRS_SPARE_LEN = 6246; // 2 +const static uint64_t SH_FLD_FP2_RUN_AFTER_FRAME_ERROR = 6247; // 2 +const static uint64_t SH_FLD_FP3_CREDIT_PRIORITY_4_NOT_8 = 6248; // 2 +const static uint64_t SH_FLD_FP3_DISABLE_CMD_COMPRESSION = 6249; // 2 +const static uint64_t SH_FLD_FP3_DISABLE_GATHERING = 6250; // 2 +const static uint64_t SH_FLD_FP3_DISABLE_PRSP_COMPRESSION = 6251; // 2 +const static uint64_t SH_FLD_FP3_FMR_DISABLE = 6252; // 2 +const static uint64_t SH_FLD_FP3_FMR_SPARE = 6253; // 2 +const static uint64_t SH_FLD_FP3_FMR_SPARE_LEN = 6254; // 2 +const static uint64_t SH_FLD_FP3_LL_CREDIT_HI_LIMIT = 6255; // 2 +const static uint64_t SH_FLD_FP3_LL_CREDIT_HI_LIMIT_LEN = 6256; // 2 +const static uint64_t SH_FLD_FP3_LL_CREDIT_LO_LIMIT = 6257; // 2 +const static uint64_t SH_FLD_FP3_LL_CREDIT_LO_LIMIT_LEN = 6258; // 2 +const static uint64_t SH_FLD_FP3_PRS_DISABLE = 6259; // 2 +const static uint64_t SH_FLD_FP3_PRS_SPARE = 6260; // 2 +const static uint64_t SH_FLD_FP3_PRS_SPARE_LEN = 6261; // 2 +const static uint64_t SH_FLD_FP3_RUN_AFTER_FRAME_ERROR = 6262; // 2 +const static uint64_t SH_FLD_FP4_CREDIT_PRIORITY_4_NOT_8 = 6263; // 2 +const static uint64_t SH_FLD_FP4_DISABLE_CMD_COMPRESSION = 6264; // 2 +const static uint64_t SH_FLD_FP4_DISABLE_GATHERING = 6265; // 2 +const static uint64_t SH_FLD_FP4_DISABLE_PRSP_COMPRESSION = 6266; // 2 +const static uint64_t SH_FLD_FP4_FMR_DISABLE = 6267; // 2 +const static uint64_t SH_FLD_FP4_FMR_SPARE = 6268; // 2 +const static uint64_t SH_FLD_FP4_FMR_SPARE_LEN = 6269; // 2 +const static uint64_t SH_FLD_FP4_LL_CREDIT_HI_LIMIT = 6270; // 2 +const static uint64_t SH_FLD_FP4_LL_CREDIT_HI_LIMIT_LEN = 6271; // 2 +const static uint64_t SH_FLD_FP4_LL_CREDIT_LO_LIMIT = 6272; // 2 +const static uint64_t SH_FLD_FP4_LL_CREDIT_LO_LIMIT_LEN = 6273; // 2 +const static uint64_t SH_FLD_FP4_PRS_DISABLE = 6274; // 2 +const static uint64_t SH_FLD_FP4_PRS_SPARE = 6275; // 2 +const static uint64_t SH_FLD_FP4_PRS_SPARE_LEN = 6276; // 2 +const static uint64_t SH_FLD_FP4_RUN_AFTER_FRAME_ERROR = 6277; // 2 +const static uint64_t SH_FLD_FP5_CREDIT_PRIORITY_4_NOT_8 = 6278; // 2 +const static uint64_t SH_FLD_FP5_DISABLE_CMD_COMPRESSION = 6279; // 2 +const static uint64_t SH_FLD_FP5_DISABLE_GATHERING = 6280; // 2 +const static uint64_t SH_FLD_FP5_DISABLE_PRSP_COMPRESSION = 6281; // 2 +const static uint64_t SH_FLD_FP5_FMR_DISABLE = 6282; // 2 +const static uint64_t SH_FLD_FP5_FMR_SPARE = 6283; // 2 +const static uint64_t SH_FLD_FP5_FMR_SPARE_LEN = 6284; // 2 +const static uint64_t SH_FLD_FP5_LL_CREDIT_HI_LIMIT = 6285; // 2 +const static uint64_t SH_FLD_FP5_LL_CREDIT_HI_LIMIT_LEN = 6286; // 2 +const static uint64_t SH_FLD_FP5_LL_CREDIT_LO_LIMIT = 6287; // 2 +const static uint64_t SH_FLD_FP5_LL_CREDIT_LO_LIMIT_LEN = 6288; // 2 +const static uint64_t SH_FLD_FP5_PRS_DISABLE = 6289; // 2 +const static uint64_t SH_FLD_FP5_PRS_SPARE = 6290; // 2 +const static uint64_t SH_FLD_FP5_PRS_SPARE_LEN = 6291; // 2 +const static uint64_t SH_FLD_FP5_RUN_AFTER_FRAME_ERROR = 6292; // 2 +const static uint64_t SH_FLD_FP6_CREDIT_PRIORITY_4_NOT_8 = 6293; // 1 +const static uint64_t SH_FLD_FP6_DISABLE_CMD_COMPRESSION = 6294; // 1 +const static uint64_t SH_FLD_FP6_DISABLE_GATHERING = 6295; // 1 +const static uint64_t SH_FLD_FP6_DISABLE_PRSP_COMPRESSION = 6296; // 1 +const static uint64_t SH_FLD_FP6_FMR_DISABLE = 6297; // 1 +const static uint64_t SH_FLD_FP6_FMR_SPARE = 6298; // 1 +const static uint64_t SH_FLD_FP6_FMR_SPARE_LEN = 6299; // 1 +const static uint64_t SH_FLD_FP6_LL_CREDIT_HI_LIMIT = 6300; // 1 +const static uint64_t SH_FLD_FP6_LL_CREDIT_HI_LIMIT_LEN = 6301; // 1 +const static uint64_t SH_FLD_FP6_LL_CREDIT_LO_LIMIT = 6302; // 1 +const static uint64_t SH_FLD_FP6_LL_CREDIT_LO_LIMIT_LEN = 6303; // 1 +const static uint64_t SH_FLD_FP6_PRS_DISABLE = 6304; // 1 +const static uint64_t SH_FLD_FP6_PRS_SPARE = 6305; // 1 +const static uint64_t SH_FLD_FP6_PRS_SPARE_LEN = 6306; // 1 +const static uint64_t SH_FLD_FP6_RUN_AFTER_FRAME_ERROR = 6307; // 1 +const static uint64_t SH_FLD_FP7_CREDIT_PRIORITY_4_NOT_8 = 6308; // 1 +const static uint64_t SH_FLD_FP7_DISABLE_CMD_COMPRESSION = 6309; // 1 +const static uint64_t SH_FLD_FP7_DISABLE_GATHERING = 6310; // 1 +const static uint64_t SH_FLD_FP7_DISABLE_PRSP_COMPRESSION = 6311; // 1 +const static uint64_t SH_FLD_FP7_FMR_DISABLE = 6312; // 1 +const static uint64_t SH_FLD_FP7_FMR_SPARE = 6313; // 1 +const static uint64_t SH_FLD_FP7_FMR_SPARE_LEN = 6314; // 1 +const static uint64_t SH_FLD_FP7_LL_CREDIT_HI_LIMIT = 6315; // 1 +const static uint64_t SH_FLD_FP7_LL_CREDIT_HI_LIMIT_LEN = 6316; // 1 +const static uint64_t SH_FLD_FP7_LL_CREDIT_LO_LIMIT = 6317; // 1 +const static uint64_t SH_FLD_FP7_LL_CREDIT_LO_LIMIT_LEN = 6318; // 1 +const static uint64_t SH_FLD_FP7_PRS_DISABLE = 6319; // 1 +const static uint64_t SH_FLD_FP7_PRS_SPARE = 6320; // 1 +const static uint64_t SH_FLD_FP7_PRS_SPARE_LEN = 6321; // 1 +const static uint64_t SH_FLD_FP7_RUN_AFTER_FRAME_ERROR = 6322; // 1 +const static uint64_t SH_FLD_FRAC1 = 6323; // 3 +const static uint64_t SH_FLD_FRAC1_LEN = 6324; // 3 +const static uint64_t SH_FLD_FRAC2 = 6325; // 3 +const static uint64_t SH_FLD_FRAC2_LEN = 6326; // 3 +const static uint64_t SH_FLD_FRAMER00_ATTN = 6327; // 4 +const static uint64_t SH_FLD_FRAMER01_ATTN = 6328; // 4 +const static uint64_t SH_FLD_FRAMER02_ATTN = 6329; // 4 +const static uint64_t SH_FLD_FRAMER03_ATTN = 6330; // 4 +const static uint64_t SH_FLD_FRAMER04_ATTN = 6331; // 4 +const static uint64_t SH_FLD_FRAMER05_ATTN = 6332; // 4 +const static uint64_t SH_FLD_FRAMER06_ATTN = 6333; // 2 +const static uint64_t SH_FLD_FRAMER07_ATTN = 6334; // 2 +const static uint64_t SH_FLD_FRAME_COUNT = 6335; // 8 +const static uint64_t SH_FLD_FRAME_COUNT_LEN = 6336; // 8 +const static uint64_t SH_FLD_FRAME_SIZE = 6337; // 1 +const static uint64_t SH_FLD_FRAME_SIZE_LEN = 6338; // 1 +const static uint64_t SH_FLD_FREEZE = 6339; // 3 +const static uint64_t SH_FLD_FREEZEMODE = 6340; // 3 +const static uint64_t SH_FLD_FREEZE_LOG_ON_ERROR1 = 6341; // 1 +const static uint64_t SH_FLD_FREEZE_LOG_ON_ERROR2 = 6342; // 1 +const static uint64_t SH_FLD_FREEZE_LOG_ON_ERROR3 = 6343; // 1 +const static uint64_t SH_FLD_FREEZE_LOG_ON_ERROR4 = 6344; // 1 +const static uint64_t SH_FLD_FREEZE_LOG_ON_ERROR5 = 6345; // 1 +const static uint64_t SH_FLD_FREEZE_LOG_ON_ERROR6 = 6346; // 1 +const static uint64_t SH_FLD_FREEZE_LOG_ON_ERROR7 = 6347; // 1 +const static uint64_t SH_FLD_FREEZE_ON_OVERFLOW = 6348; // 2 +const static uint64_t SH_FLD_FREE_USAGE_10E = 6349; // 19 +const static uint64_t SH_FLD_FREE_USAGE_11E = 6350; // 19 +const static uint64_t SH_FLD_FREE_USAGE_12D = 6351; // 31 +const static uint64_t SH_FLD_FREE_USAGE_12E = 6352; // 41 +const static uint64_t SH_FLD_FREE_USAGE_13D = 6353; // 32 +const static uint64_t SH_FLD_FREE_USAGE_13E = 6354; // 41 +const static uint64_t SH_FLD_FREE_USAGE_14D = 6355; // 34 +const static uint64_t SH_FLD_FREE_USAGE_14E = 6356; // 41 +const static uint64_t SH_FLD_FREE_USAGE_15D = 6357; // 34 +const static uint64_t SH_FLD_FREE_USAGE_15E = 6358; // 41 +const static uint64_t SH_FLD_FREE_USAGE_16D = 6359; // 38 +const static uint64_t SH_FLD_FREE_USAGE_16E = 6360; // 41 +const static uint64_t SH_FLD_FREE_USAGE_17D = 6361; // 38 +const static uint64_t SH_FLD_FREE_USAGE_17E = 6362; // 41 +const static uint64_t SH_FLD_FREE_USAGE_18D = 6363; // 40 +const static uint64_t SH_FLD_FREE_USAGE_18E = 6364; // 41 +const static uint64_t SH_FLD_FREE_USAGE_19D = 6365; // 41 +const static uint64_t SH_FLD_FREE_USAGE_19E = 6366; // 41 +const static uint64_t SH_FLD_FREE_USAGE_20D = 6367; // 41 +const static uint64_t SH_FLD_FREE_USAGE_20E = 6368; // 43 +const static uint64_t SH_FLD_FREE_USAGE_21D = 6369; // 41 +const static uint64_t SH_FLD_FREE_USAGE_21E = 6370; // 43 +const static uint64_t SH_FLD_FREE_USAGE_22D = 6371; // 41 +const static uint64_t SH_FLD_FREE_USAGE_22E = 6372; // 43 +const static uint64_t SH_FLD_FREE_USAGE_23D = 6373; // 41 +const static uint64_t SH_FLD_FREE_USAGE_23E = 6374; // 43 +const static uint64_t SH_FLD_FREE_USAGE_24D = 6375; // 41 +const static uint64_t SH_FLD_FREE_USAGE_25D = 6376; // 41 +const static uint64_t SH_FLD_FREE_USAGE_26D = 6377; // 42 +const static uint64_t SH_FLD_FREE_USAGE_27D = 6378; // 42 +const static uint64_t SH_FLD_FREE_USAGE_28D = 6379; // 40 +const static uint64_t SH_FLD_FREE_USAGE_29D = 6380; // 40 +const static uint64_t SH_FLD_FREE_USAGE_30D = 6381; // 40 +const static uint64_t SH_FLD_FREE_USAGE_31D = 6382; // 40 +const static uint64_t SH_FLD_FREE_USAGE_44C = 6383; // 43 +const static uint64_t SH_FLD_FREE_USAGE_45C = 6384; // 43 +const static uint64_t SH_FLD_FREE_USAGE_46C = 6385; // 43 +const static uint64_t SH_FLD_FREE_USAGE_47C = 6386; // 43 +const static uint64_t SH_FLD_FREE_USAGE_48A = 6387; // 43 +const static uint64_t SH_FLD_FREE_USAGE_49A = 6388; // 43 +const static uint64_t SH_FLD_FREE_USAGE_50A = 6389; // 43 +const static uint64_t SH_FLD_FREE_USAGE_51A = 6390; // 43 +const static uint64_t SH_FLD_FREE_USAGE_52A = 6391; // 43 +const static uint64_t SH_FLD_FREE_USAGE_53A = 6392; // 43 +const static uint64_t SH_FLD_FREE_USAGE_54A = 6393; // 43 +const static uint64_t SH_FLD_FREE_USAGE_55A = 6394; // 43 +const static uint64_t SH_FLD_FREE_USAGE_56A = 6395; // 43 +const static uint64_t SH_FLD_FREE_USAGE_57A = 6396; // 43 +const static uint64_t SH_FLD_FREE_USAGE_58A = 6397; // 43 +const static uint64_t SH_FLD_FREE_USAGE_59A = 6398; // 43 +const static uint64_t SH_FLD_FREE_USAGE_60A = 6399; // 43 +const static uint64_t SH_FLD_FREE_USAGE_61A = 6400; // 43 +const static uint64_t SH_FLD_FREE_USAGE_62A = 6401; // 43 +const static uint64_t SH_FLD_FREE_USAGE_63A = 6402; // 43 +const static uint64_t SH_FLD_FREE_USAGE_6A = 6403; // 43 +const static uint64_t SH_FLD_FREE_USAGE_7A = 6404; // 43 +const static uint64_t SH_FLD_FREE_USAGE_9A = 6405; // 43 +const static uint64_t SH_FLD_FREQIN_AVG = 6406; // 6 +const static uint64_t SH_FLD_FREQIN_AVG_LEN = 6407; // 6 +const static uint64_t SH_FLD_FREQIN_MAX = 6408; // 6 +const static uint64_t SH_FLD_FREQIN_MAX_LEN = 6409; // 6 +const static uint64_t SH_FLD_FREQIN_MIN = 6410; // 6 +const static uint64_t SH_FLD_FREQIN_MIN_LEN = 6411; // 6 +const static uint64_t SH_FLD_FREQOUT = 6412; // 6 +const static uint64_t SH_FLD_FREQOUT_AVG = 6413; // 6 +const static uint64_t SH_FLD_FREQOUT_AVG_LEN = 6414; // 6 +const static uint64_t SH_FLD_FREQOUT_LEN = 6415; // 6 +const static uint64_t SH_FLD_FREQOUT_MAX = 6416; // 6 +const static uint64_t SH_FLD_FREQOUT_MAX_LEN = 6417; // 6 +const static uint64_t SH_FLD_FREQOUT_MIN = 6418; // 6 +const static uint64_t SH_FLD_FREQOUT_MIN_LEN = 6419; // 6 +const static uint64_t SH_FLD_FREQUENCY_REFERENCE = 6420; // 24 +const static uint64_t SH_FLD_FREQUENCY_REFERENCE_LEN = 6421; // 24 +const static uint64_t SH_FLD_FREQ_CHANGE = 6422; // 6 +const static uint64_t SH_FLD_FREQ_LCL_SAMPLE_EN = 6423; // 12 +const static uint64_t SH_FLD_FREQ_MULT = 6424; // 6 +const static uint64_t SH_FLD_FREQ_MULT_LEN = 6425; // 6 +const static uint64_t SH_FLD_FREQ_SCALE_A_THRESHOLD = 6426; // 24 +const static uint64_t SH_FLD_FREQ_SCALE_A_THRESHOLD_LEN = 6427; // 24 +const static uint64_t SH_FLD_FREQ_SCALE_B_THRESHOLD = 6428; // 24 +const static uint64_t SH_FLD_FREQ_SCALE_B_THRESHOLD_LEN = 6429; // 24 +const static uint64_t SH_FLD_FSAFE = 6430; // 6 +const static uint64_t SH_FLD_FSAFE_ACTIVE = 6431; // 6 +const static uint64_t SH_FLD_FSAFE_LEN = 6432; // 6 +const static uint64_t SH_FLD_FSI_A_MST_0_ACTUAL_ERROR = 6433; // 1 +const static uint64_t SH_FLD_FSI_A_MST_0_ACTUAL_ERROR_LEN = 6434; // 1 +const static uint64_t SH_FLD_FSI_A_MST_0_PORT_0_ENABLE = 6435; // 1 +const static uint64_t SH_FLD_FSI_A_MST_0_PORT_1_ENABLE = 6436; // 1 +const static uint64_t SH_FLD_FSI_A_MST_0_PORT_2_ENABLE = 6437; // 1 +const static uint64_t SH_FLD_FSI_A_MST_0_PORT_3_ENABLE = 6438; // 1 +const static uint64_t SH_FLD_FSI_A_MST_0_PORT_4_ENABLE = 6439; // 1 +const static uint64_t SH_FLD_FSI_A_MST_0_PORT_5_ENABLE = 6440; // 1 +const static uint64_t SH_FLD_FSI_A_MST_0_PORT_6_ENABLE = 6441; // 1 +const static uint64_t SH_FLD_FSI_A_MST_0_PORT_7_ENABLE = 6442; // 1 +const static uint64_t SH_FLD_FSI_A_MST_1_ACTUAL_ERROR = 6443; // 1 +const static uint64_t SH_FLD_FSI_A_MST_1_ACTUAL_ERROR_LEN = 6444; // 1 +const static uint64_t SH_FLD_FSI_A_MST_1_PORT_0_ENABLE = 6445; // 1 +const static uint64_t SH_FLD_FSI_A_MST_1_PORT_1_ENABLE = 6446; // 1 +const static uint64_t SH_FLD_FSI_A_MST_1_PORT_2_ENABLE = 6447; // 1 +const static uint64_t SH_FLD_FSI_A_MST_1_PORT_3_ENABLE = 6448; // 1 +const static uint64_t SH_FLD_FSI_A_MST_1_PORT_4_ENABLE = 6449; // 1 +const static uint64_t SH_FLD_FSI_B_MST_0_ACTUAL_ERROR = 6450; // 1 +const static uint64_t SH_FLD_FSI_B_MST_0_ACTUAL_ERROR_LEN = 6451; // 1 +const static uint64_t SH_FLD_FSI_B_MST_0_PORT_0_ENABLE = 6452; // 1 +const static uint64_t SH_FLD_FSI_B_MST_0_PORT_1_ENABLE = 6453; // 1 +const static uint64_t SH_FLD_FSI_B_MST_0_PORT_2_ENABLE = 6454; // 1 +const static uint64_t SH_FLD_FSI_B_MST_0_PORT_3_ENABLE = 6455; // 1 +const static uint64_t SH_FLD_FSI_B_MST_0_PORT_4_ENABLE = 6456; // 1 +const static uint64_t SH_FLD_FSI_B_MST_0_PORT_5_ENABLE = 6457; // 1 +const static uint64_t SH_FLD_FSI_B_MST_0_PORT_6_ENABLE = 6458; // 1 +const static uint64_t SH_FLD_FSI_B_MST_0_PORT_7_ENABLE = 6459; // 1 +const static uint64_t SH_FLD_FSI_CC_VSB_CBS_CMD = 6460; // 1 +const static uint64_t SH_FLD_FSI_CC_VSB_CBS_CMD_LEN = 6461; // 1 +const static uint64_t SH_FLD_FSI_CC_VSB_CBS_REQ = 6462; // 1 +const static uint64_t SH_FLD_FSI_SCRATCH_PAD1 = 6463; // 1 +const static uint64_t SH_FLD_FSI_SCRATCH_PAD1_LEN = 6464; // 1 +const static uint64_t SH_FLD_FSI_SCRATCH_PAD2 = 6465; // 1 +const static uint64_t SH_FLD_FSI_SCRATCH_PAD2_LEN = 6466; // 1 +const static uint64_t SH_FLD_FSI_SCRATCH_PAD3 = 6467; // 1 +const static uint64_t SH_FLD_FSI_SCRATCH_PAD3_LEN = 6468; // 1 +const static uint64_t SH_FLD_FSMJ_EVENT = 6469; // 2 +const static uint64_t SH_FLD_FSMJ_EVENT_LEN = 6470; // 2 +const static uint64_t SH_FLD_FSMJ_EVENT_SEL = 6471; // 2 +const static uint64_t SH_FLD_FSMJ_EVENT_SEL_LEN = 6472; // 2 +const static uint64_t SH_FLD_FSMJ_FSM = 6473; // 2 +const static uint64_t SH_FLD_FSMJ_FSM_LEN = 6474; // 2 +const static uint64_t SH_FLD_FSMJ_FSM_SEL = 6475; // 2 +const static uint64_t SH_FLD_FSMJ_FSM_SEL_LEN = 6476; // 2 +const static uint64_t SH_FLD_FSM_DATA02 = 6477; // 1 +const static uint64_t SH_FLD_FSM_ERR = 6478; // 5 +const static uint64_t SH_FLD_FSM_ERROR = 6479; // 1 +const static uint64_t SH_FLD_FSM_PARITY_ERROR = 6480; // 3 +const static uint64_t SH_FLD_FSM_PERR = 6481; // 1 +const static uint64_t SH_FLD_FSM_PRESENT_STATE = 6482; // 1 +const static uint64_t SH_FLD_FSM_PRESENT_STATE_LEN = 6483; // 1 +const static uint64_t SH_FLD_FSM_SYNC_ENABLE = 6484; // 1 +const static uint64_t SH_FLD_FSM_TRIGGER = 6485; // 2 +const static uint64_t SH_FLD_FSP_ACCESS_TRUSTED_SPACE = 6486; // 4 +const static uint64_t SH_FLD_FSP_CMD_ENABLE = 6487; // 1 +const static uint64_t SH_FLD_FSP_ECC_ERR_CE = 6488; // 4 +const static uint64_t SH_FLD_FSP_ECC_ERR_UE = 6489; // 4 +const static uint64_t SH_FLD_FSP_ERR_RSP_ENABLE = 6490; // 1 +const static uint64_t SH_FLD_FSP_INBOUND_ACTIVE = 6491; // 1 +const static uint64_t SH_FLD_FSP_INTERRUPT = 6492; // 1 +const static uint64_t SH_FLD_FSP_INT_ENABLE = 6493; // 1 +const static uint64_t SH_FLD_FSP_INV_READ = 6494; // 1 +const static uint64_t SH_FLD_FSP_LINK_ACTIVE = 6495; // 1 +const static uint64_t SH_FLD_FSP_MMIO_ENABLE = 6496; // 1 +const static uint64_t SH_FLD_FSP_MMIO_MASK = 6497; // 1 +const static uint64_t SH_FLD_FSP_MMIO_MASK_LEN = 6498; // 1 +const static uint64_t SH_FLD_FSP_OUTBOUND_ACTIVE = 6499; // 1 +const static uint64_t SH_FLD_FSP_RESET = 6500; // 1 +const static uint64_t SH_FLD_FSP_SPECIAL_WKUP = 6501; // 30 +const static uint64_t SH_FLD_FSP_TCE_ENABLE = 6502; // 1 +const static uint64_t SH_FLD_FULL = 6503; // 1 +const static uint64_t SH_FLD_FULLMASK = 6504; // 1 +const static uint64_t SH_FLD_FULLMASK_LEN = 6505; // 1 +const static uint64_t SH_FLD_FULL_WRITEBACK_ENABLE = 6506; // 6 +const static uint64_t SH_FLD_FUNC = 6507; // 43 +const static uint64_t SH_FLD_FUNCTION = 6508; // 6 +const static uint64_t SH_FLD_FUNCTION_LEN = 6509; // 6 +const static uint64_t SH_FLD_FUNC_MODE_DONE = 6510; // 4 +const static uint64_t SH_FLD_FWD_PROG_RATE2 = 6511; // 12 +const static uint64_t SH_FLD_FWD_PROG_RATE2_LEN = 6512; // 12 +const static uint64_t SH_FLD_FW_RD_WR = 6513; // 8 +const static uint64_t SH_FLD_FW_RD_WR_LEN = 6514; // 8 +const static uint64_t SH_FLD_FW_WR_RD = 6515; // 8 +const static uint64_t SH_FLD_FW_WR_RD_LEN = 6516; // 8 +const static uint64_t SH_FLD_F_READ = 6517; // 43 +const static uint64_t SH_FLD_F_SKITTER_READ_MASK = 6518; // 43 +const static uint64_t SH_FLD_GAP_LENGTH_ADDER = 6519; // 8 +const static uint64_t SH_FLD_GAP_LENGTH_ADDER_LEN = 6520; // 8 +const static uint64_t SH_FLD_GCR_BUFFER_ENABLED_RO_SIGNAL = 6521; // 4 +const static uint64_t SH_FLD_GCR_HANG_DET_SEL = 6522; // 4 +const static uint64_t SH_FLD_GCR_HANG_DET_SEL_LEN = 6523; // 4 +const static uint64_t SH_FLD_GCR_HANG_ERROR_INJ = 6524; // 4 +const static uint64_t SH_FLD_GCR_HANG_ERROR_MASK = 6525; // 4 +const static uint64_t SH_FLD_GCR_TEST = 6526; // 4 +const static uint64_t SH_FLD_GENERATE_MPIPL_SEQUENCE = 6527; // 4 +const static uint64_t SH_FLD_GLOBAL_EP_RESET_DC = 6528; // 1 +const static uint64_t SH_FLD_GLOBAL_PHY_OFFSET = 6529; // 8 +const static uint64_t SH_FLD_GLOBAL_PHY_OFFSET_LEN = 6530; // 8 +const static uint64_t SH_FLD_GLOBAL_RUN_MODE = 6531; // 2 +const static uint64_t SH_FLD_GO = 6532; // 43 +const static uint64_t SH_FLD_GO2 = 6533; // 43 +const static uint64_t SH_FLD_GOOD = 6534; // 8 +const static uint64_t SH_FLD_GOTO_CMD = 6535; // 64 +const static uint64_t SH_FLD_GOTO_CMD_LEN = 6536; // 64 +const static uint64_t SH_FLD_GP = 6537; // 2 +const static uint64_t SH_FLD_GPE0_ERROR = 6538; // 1 +const static uint64_t SH_FLD_GPE1_ERROR = 6539; // 1 +const static uint64_t SH_FLD_GPE2_ERROR = 6540; // 1 +const static uint64_t SH_FLD_GPE3_ERROR = 6541; // 1 +const static uint64_t SH_FLD_GP_TP_GLBCK_VSB_NEST_MESH_SEL_DC = 6542; // 1 +const static uint64_t SH_FLD_GRANTED_PACKET = 6543; // 30 +const static uint64_t SH_FLD_GRANTED_PACKET_LEN = 6544; // 30 +const static uint64_t SH_FLD_GRANTED_SOURCE = 6545; // 30 +const static uint64_t SH_FLD_GRANTED_SOURCE_LEN = 6546; // 30 +const static uint64_t SH_FLD_GROUP = 6547; // 9 +const static uint64_t SH_FLD_GROUPING = 6548; // 8 +const static uint64_t SH_FLD_GROUPING_LEN = 6549; // 8 +const static uint64_t SH_FLD_GROUP_BASE_ADDRESS = 6550; // 8 +const static uint64_t SH_FLD_GROUP_BASE_ADDRESS_LEN = 6551; // 8 +const static uint64_t SH_FLD_GROUP_EPSILON = 6552; // 8 +const static uint64_t SH_FLD_GROUP_EPSILON_LEN = 6553; // 8 +const static uint64_t SH_FLD_GROUP_LEN = 6554; // 9 +const static uint64_t SH_FLD_GROUP_SELECT = 6555; // 1 +const static uint64_t SH_FLD_GROUP_SELECT_LEN = 6556; // 1 +const static uint64_t SH_FLD_GROUP_SEL_0_4 = 6557; // 1 +const static uint64_t SH_FLD_GROUP_SEL_0_4_LEN = 6558; // 1 +const static uint64_t SH_FLD_GROUP_SIZE = 6559; // 8 +const static uint64_t SH_FLD_GROUP_SIZE_LEN = 6560; // 8 +const static uint64_t SH_FLD_GRPSEL = 6561; // 2 +const static uint64_t SH_FLD_GRPSEL_LEN = 6562; // 2 +const static uint64_t SH_FLD_GRP_BASE = 6563; // 8 +const static uint64_t SH_FLD_GRP_BASE_LEN = 6564; // 8 +const static uint64_t SH_FLD_GRP_MBR_ID = 6565; // 8 +const static uint64_t SH_FLD_GRP_SIZE = 6566; // 8 +const static uint64_t SH_FLD_GRP_SIZE_LEN = 6567; // 8 +const static uint64_t SH_FLD_GX = 6568; // 2 +const static uint64_t SH_FLD_GXSTP0_XSTOP_IN = 6569; // 43 +const static uint64_t SH_FLD_GXSTP0_XSTOP_IN_LEN = 6570; // 43 +const static uint64_t SH_FLD_GXSTP1_XSTOP_IN = 6571; // 43 +const static uint64_t SH_FLD_GXSTP1_XSTOP_IN_LEN = 6572; // 43 +const static uint64_t SH_FLD_GXSTP2_XSTOP_IN = 6573; // 43 +const static uint64_t SH_FLD_GXSTP2_XSTOP_IN_LEN = 6574; // 43 +const static uint64_t SH_FLD_GXSTP_IN = 6575; // 43 +const static uint64_t SH_FLD_GXSTP_IN_LEN = 6576; // 43 +const static uint64_t SH_FLD_GX_ENABLE_OVERWRITE = 6577; // 1 +const static uint64_t SH_FLD_GX_LEN = 6578; // 2 +const static uint64_t SH_FLD_GZIPCOMP_MAX_INRD = 6579; // 1 +const static uint64_t SH_FLD_GZIPCOMP_MAX_INRD_LEN = 6580; // 1 +const static uint64_t SH_FLD_GZIPDECOMP_MAX_INRD = 6581; // 1 +const static uint64_t SH_FLD_GZIPDECOMP_MAX_INRD_LEN = 6582; // 1 +const static uint64_t SH_FLD_GZIP_COMP_PREFETCH_ENABLE = 6583; // 1 +const static uint64_t SH_FLD_GZIP_DECOMP_PREFETCH_ENABLE = 6584; // 1 +const static uint64_t SH_FLD_GZIP_FC_SELECT = 6585; // 1 +const static uint64_t SH_FLD_GZIP_FC_SELECT_LEN = 6586; // 1 +const static uint64_t SH_FLD_GZIP_LATENCY_CFG = 6587; // 1 +const static uint64_t SH_FLD_GZIP_MUX_SELECT = 6588; // 1 +const static uint64_t SH_FLD_GZIP_MUX_SELECT_LEN = 6589; // 1 +const static uint64_t SH_FLD_H1AP_CFG = 6590; // 6 +const static uint64_t SH_FLD_H1AP_CFG_LEN = 6591; // 6 +const static uint64_t SH_FLD_HALT_INPUT = 6592; // 13 +const static uint64_t SH_FLD_HALT_ON_TRIG = 6593; // 17 +const static uint64_t SH_FLD_HALT_ON_XSTOP = 6594; // 17 +const static uint64_t SH_FLD_HALT_ROTATION = 6595; // 8 +const static uint64_t SH_FLD_HANG_DATA_SCALE = 6596; // 5 +const static uint64_t SH_FLD_HANG_DATA_SCALE_LEN = 6597; // 5 +const static uint64_t SH_FLD_HANG_ON_ACK_DEAD = 6598; // 1 +const static uint64_t SH_FLD_HANG_ON_ADDR_ERROR = 6599; // 1 +const static uint64_t SH_FLD_HANG_PE_SCALE = 6600; // 3 +const static uint64_t SH_FLD_HANG_PE_SCALE_LEN = 6601; // 3 +const static uint64_t SH_FLD_HANG_PIB_RESET = 6602; // 1 +const static uint64_t SH_FLD_HANG_POLL_ENABLE = 6603; // 2 +const static uint64_t SH_FLD_HANG_POLL_PULSE_DIV = 6604; // 24 +const static uint64_t SH_FLD_HANG_POLL_PULSE_DIV_LEN = 6605; // 24 +const static uint64_t SH_FLD_HANG_POLL_SCALE = 6606; // 7 +const static uint64_t SH_FLD_HANG_POLL_SCALE_LEN = 6607; // 7 +const static uint64_t SH_FLD_HANG_RESET = 6608; // 1 +const static uint64_t SH_FLD_HANG_SHM_SCALE = 6609; // 2 +const static uint64_t SH_FLD_HANG_SHM_SCALE_LEN = 6610; // 2 +const static uint64_t SH_FLD_HANG_SM_ON_ARE = 6611; // 2 +const static uint64_t SH_FLD_HANG_SM_ON_LINK_FAIL = 6612; // 2 +const static uint64_t SH_FLD_HARD_CE_COUNT = 6613; // 2 +const static uint64_t SH_FLD_HARD_CE_COUNT_LEN = 6614; // 2 +const static uint64_t SH_FLD_HARD_CHIPID_IN_BLOCK_EN = 6615; // 1 +const static uint64_t SH_FLD_HARD_MCE_COUNT = 6616; // 2 +const static uint64_t SH_FLD_HARD_MCE_COUNT_LEN = 6617; // 2 +const static uint64_t SH_FLD_HARD_NCE_ETE_ATTN = 6618; // 10 +const static uint64_t SH_FLD_HASH_LPID_DIS = 6619; // 1 +const static uint64_t SH_FLD_HASH_PID_DIS = 6620; // 1 +const static uint64_t SH_FLD_HASH_SIZE_MASK = 6621; // 1 +const static uint64_t SH_FLD_HASH_SIZE_MASK_LEN = 6622; // 1 +const static uint64_t SH_FLD_HA_ILLEGAL_CONSUMER_ACCESS = 6623; // 4 +const static uint64_t SH_FLD_HA_ILLEGAL_PRODUCER_ACCESS = 6624; // 4 +const static uint64_t SH_FLD_HDICE = 6625; // 96 +const static uint64_t SH_FLD_HDR_ARR_ECC_CORR_ENA = 6626; // 6 +const static uint64_t SH_FLD_HDR_ARR_ECC_SUE_ENA = 6627; // 6 +const static uint64_t SH_FLD_HI = 6628; // 1 +const static uint64_t SH_FLD_HIGH = 6629; // 1 +const static uint64_t SH_FLD_HIGH_IDLE_COUNT = 6630; // 8 +const static uint64_t SH_FLD_HIGH_IDLE_COUNT_LEN = 6631; // 8 +const static uint64_t SH_FLD_HIGH_IDLE_THRESHOLD = 6632; // 8 +const static uint64_t SH_FLD_HIGH_IDLE_THRESHOLD_LEN = 6633; // 8 +const static uint64_t SH_FLD_HIGH_LEN = 6634; // 1 +const static uint64_t SH_FLD_HILE = 6635; // 24 +const static uint64_t SH_FLD_HIRES_FMAX = 6636; // 6 +const static uint64_t SH_FLD_HIRES_FMAX_LEN = 6637; // 6 +const static uint64_t SH_FLD_HIRES_FMIN = 6638; // 6 +const static uint64_t SH_FLD_HIRES_FMIN_LEN = 6639; // 6 +const static uint64_t SH_FLD_HIRES_FREQIN_AVG = 6640; // 6 +const static uint64_t SH_FLD_HIRES_FREQIN_AVG_LEN = 6641; // 6 +const static uint64_t SH_FLD_HIRES_FREQIN_MAX = 6642; // 6 +const static uint64_t SH_FLD_HIRES_FREQIN_MAX_LEN = 6643; // 6 +const static uint64_t SH_FLD_HIRES_FREQIN_MIN = 6644; // 6 +const static uint64_t SH_FLD_HIRES_FREQIN_MIN_LEN = 6645; // 6 +const static uint64_t SH_FLD_HIRES_FREQOUT = 6646; // 6 +const static uint64_t SH_FLD_HIRES_FREQOUT_AVG = 6647; // 6 +const static uint64_t SH_FLD_HIRES_FREQOUT_AVG_LEN = 6648; // 6 +const static uint64_t SH_FLD_HIRES_FREQOUT_LEN = 6649; // 6 +const static uint64_t SH_FLD_HIRES_FREQOUT_MAX = 6650; // 6 +const static uint64_t SH_FLD_HIRES_FREQOUT_MAX_LEN = 6651; // 6 +const static uint64_t SH_FLD_HIRES_FREQOUT_MIN = 6652; // 6 +const static uint64_t SH_FLD_HIRES_FREQOUT_MIN_LEN = 6653; // 6 +const static uint64_t SH_FLD_HIRES_MULT = 6654; // 6 +const static uint64_t SH_FLD_HIRES_MULT_LEN = 6655; // 6 +const static uint64_t SH_FLD_HIST = 6656; // 6 +const static uint64_t SH_FLD_HIST_ADDRESS = 6657; // 1 +const static uint64_t SH_FLD_HIST_ADDRESS_LEN = 6658; // 1 +const static uint64_t SH_FLD_HIST_DONE = 6659; // 1 +const static uint64_t SH_FLD_HIST_FREEZE_HISTORY = 6660; // 1 +const static uint64_t SH_FLD_HIST_LEN = 6661; // 6 +const static uint64_t SH_FLD_HIST_MANUAL_MODE_EN = 6662; // 1 +const static uint64_t SH_FLD_HIST_MASK = 6663; // 1 +const static uint64_t SH_FLD_HIST_MASK_LEN = 6664; // 1 +const static uint64_t SH_FLD_HIST_MIN_EYE_HEIGHT = 6665; // 6 +const static uint64_t SH_FLD_HIST_MIN_EYE_HEIGHT_LANE = 6666; // 6 +const static uint64_t SH_FLD_HIST_MIN_EYE_HEIGHT_LANE_LEN = 6667; // 6 +const static uint64_t SH_FLD_HIST_MIN_EYE_HEIGHT_LEN = 6668; // 6 +const static uint64_t SH_FLD_HIST_MIN_EYE_HEIGHT_MODE = 6669; // 6 +const static uint64_t SH_FLD_HIST_MIN_EYE_HEIGHT_MODE_LEN = 6670; // 6 +const static uint64_t SH_FLD_HIST_MIN_EYE_HEIGHT_VALID = 6671; // 6 +const static uint64_t SH_FLD_HIST_MIN_EYE_WIDTH = 6672; // 6 +const static uint64_t SH_FLD_HIST_MIN_EYE_WIDTH_LANE = 6673; // 6 +const static uint64_t SH_FLD_HIST_MIN_EYE_WIDTH_LANE_LEN = 6674; // 6 +const static uint64_t SH_FLD_HIST_MIN_EYE_WIDTH_LEN = 6675; // 6 +const static uint64_t SH_FLD_HIST_MIN_EYE_WIDTH_MODE = 6676; // 6 +const static uint64_t SH_FLD_HIST_MIN_EYE_WIDTH_MODE_LEN = 6677; // 6 +const static uint64_t SH_FLD_HIST_MIN_EYE_WIDTH_VALID = 6678; // 6 +const static uint64_t SH_FLD_HIST_RESERVED = 6679; // 1 +const static uint64_t SH_FLD_HIST_RESERVED_LEN = 6680; // 1 +const static uint64_t SH_FLD_HIST_RESET_HISTORY = 6681; // 1 +const static uint64_t SH_FLD_HIST_START_NOT_STOP = 6682; // 1 +const static uint64_t SH_FLD_HIST_STOP_ON_ERROR_GT = 6683; // 1 +const static uint64_t SH_FLD_HIST_STOP_ON_ERROR_GT_LEN = 6684; // 1 +const static uint64_t SH_FLD_HIST_TRACE_TRAFFIC = 6685; // 1 +const static uint64_t SH_FLD_HMI_ACTIVE = 6686; // 1 +const static uint64_t SH_FLD_HMI_EXIT_ENABLE = 6687; // 96 +const static uint64_t SH_FLD_HMI_REQUEST_C0 = 6688; // 12 +const static uint64_t SH_FLD_HMI_REQUEST_C1 = 6689; // 12 +const static uint64_t SH_FLD_HOLD = 6690; // 2 +const static uint64_t SH_FLD_HOLD_0_51 = 6691; // 1 +const static uint64_t SH_FLD_HOLD_0_51_LEN = 6692; // 1 +const static uint64_t SH_FLD_HOLD_DBGTRIG_SEL = 6693; // 43 +const static uint64_t SH_FLD_HOLD_DBGTRIG_SEL_LEN = 6694; // 43 +const static uint64_t SH_FLD_HOLD_LEN = 6695; // 2 +const static uint64_t SH_FLD_HOLD_SAMPLE = 6696; // 43 +const static uint64_t SH_FLD_HOLD_SAMPLE_WITH_TRIGGER = 6697; // 43 +const static uint64_t SH_FLD_HOLE0_LOWER_ADDRESS = 6698; // 8 +const static uint64_t SH_FLD_HOLE0_LOWER_ADDRESS_LEN = 6699; // 8 +const static uint64_t SH_FLD_HOLE0_UPPER_ADDRESS = 6700; // 8 +const static uint64_t SH_FLD_HOLE0_UPPER_ADDRESS_LEN = 6701; // 8 +const static uint64_t SH_FLD_HOLE0_VALID = 6702; // 8 +const static uint64_t SH_FLD_HOLE1_LOWER_ADDRESS = 6703; // 8 +const static uint64_t SH_FLD_HOLE1_LOWER_ADDRESS_LEN = 6704; // 8 +const static uint64_t SH_FLD_HOLE1_UPPER_ADDRESS = 6705; // 8 +const static uint64_t SH_FLD_HOLE1_UPPER_ADDRESS_LEN = 6706; // 8 +const static uint64_t SH_FLD_HOLE1_VALID = 6707; // 8 +const static uint64_t SH_FLD_HRMOR = 6708; // 1 +const static uint64_t SH_FLD_HRMOR_LEN = 6709; // 1 +const static uint64_t SH_FLD_HSSCALERR = 6710; // 6 +const static uint64_t SH_FLD_HSSPLLAERR = 6711; // 6 +const static uint64_t SH_FLD_HSSPLLBERR = 6712; // 6 +const static uint64_t SH_FLD_HSSPLLCAL = 6713; // 3 +const static uint64_t SH_FLD_HSSPLLFASTCAL = 6714; // 6 +const static uint64_t SH_FLD_HSSRECAL = 6715; // 6 +const static uint64_t SH_FLD_HSSRESYNC = 6716; // 6 +const static uint64_t SH_FLD_HTB_EXTEST = 6717; // 43 +const static uint64_t SH_FLD_HTB_INTEST = 6718; // 43 +const static uint64_t SH_FLD_HTMCO_STATUS_ADDR_ERROR = 6719; // 26 +const static uint64_t SH_FLD_HTMCO_STATUS_BUF_WAIT = 6720; // 26 +const static uint64_t SH_FLD_HTMCO_STATUS_COMPLETE = 6721; // 26 +const static uint64_t SH_FLD_HTMCO_STATUS_CRESP_OV = 6722; // 26 +const static uint64_t SH_FLD_HTMCO_STATUS_ENABLE = 6723; // 26 +const static uint64_t SH_FLD_HTMCO_STATUS_FLUSH = 6724; // 26 +const static uint64_t SH_FLD_HTMCO_STATUS_INIT = 6725; // 26 +const static uint64_t SH_FLD_HTMCO_STATUS_PAUSED = 6726; // 26 +const static uint64_t SH_FLD_HTMCO_STATUS_PREREQ = 6727; // 26 +const static uint64_t SH_FLD_HTMCO_STATUS_PURGE_DONE = 6728; // 24 +const static uint64_t SH_FLD_HTMCO_STATUS_PURGE_IN_PROG = 6729; // 24 +const static uint64_t SH_FLD_HTMCO_STATUS_READY = 6730; // 26 +const static uint64_t SH_FLD_HTMCO_STATUS_REPAIR = 6731; // 26 +const static uint64_t SH_FLD_HTMCO_STATUS_SPARE = 6732; // 2 +const static uint64_t SH_FLD_HTMCO_STATUS_SPARE_LEN = 6733; // 2 +const static uint64_t SH_FLD_HTMCO_STATUS_STAMP = 6734; // 26 +const static uint64_t SH_FLD_HTMCO_STATUS_TRACING = 6735; // 26 +const static uint64_t SH_FLD_HTMSC = 6736; // 24 +const static uint64_t SH_FLD_HTMSC_ALLOC = 6737; // 26 +const static uint64_t SH_FLD_HTMSC_BASE = 6738; // 26 +const static uint64_t SH_FLD_HTMSC_BASE_LEN = 6739; // 26 +const static uint64_t SH_FLD_HTMSC_CAPTURE = 6740; // 26 +const static uint64_t SH_FLD_HTMSC_CAPTURE_LEN = 6741; // 26 +const static uint64_t SH_FLD_HTMSC_CHIP0_STOP = 6742; // 24 +const static uint64_t SH_FLD_HTMSC_CHIP1_STOP = 6743; // 24 +const static uint64_t SH_FLD_HTMSC_CONTENT_SEL = 6744; // 26 +const static uint64_t SH_FLD_HTMSC_CONTENT_SEL_LEN = 6745; // 26 +const static uint64_t SH_FLD_HTMSC_COUNT = 6746; // 24 +const static uint64_t SH_FLD_HTMSC_COUNT_LEN = 6747; // 24 +const static uint64_t SH_FLD_HTMSC_CRESPFILT_INVERT = 6748; // 2 +const static uint64_t SH_FLD_HTMSC_CRESP_MASK = 6749; // 2 +const static uint64_t SH_FLD_HTMSC_CRESP_MASK_LEN = 6750; // 2 +const static uint64_t SH_FLD_HTMSC_CRESP_PAT = 6751; // 2 +const static uint64_t SH_FLD_HTMSC_CRESP_PAT_LEN = 6752; // 2 +const static uint64_t SH_FLD_HTMSC_DBG0_STOP = 6753; // 26 +const static uint64_t SH_FLD_HTMSC_DBG1_STOP = 6754; // 26 +const static uint64_t SH_FLD_HTMSC_DD1EQUIV = 6755; // 24 +const static uint64_t SH_FLD_HTMSC_DIS_DRP_PRIORITY_INCR = 6756; // 2 +const static uint64_t SH_FLD_HTMSC_DIS_FORCE_GROUP_SCOPE = 6757; // 2 +const static uint64_t SH_FLD_HTMSC_DIS_GROUP = 6758; // 24 +const static uint64_t SH_FLD_HTMSC_DIS_OPER_HANG = 6759; // 2 +const static uint64_t SH_FLD_HTMSC_DIS_RETRY_BACKOFF = 6760; // 2 +const static uint64_t SH_FLD_HTMSC_DIS_STALL = 6761; // 24 +const static uint64_t SH_FLD_HTMSC_DIS_TSTAMP = 6762; // 26 +const static uint64_t SH_FLD_HTMSC_ENABLE = 6763; // 26 +const static uint64_t SH_FLD_HTMSC_ENABLE_SPLIT_CORE = 6764; // 24 +const static uint64_t SH_FLD_HTMSC_ERROR = 6765; // 24 +const static uint64_t SH_FLD_HTMSC_FMUX_CGRPSEL0 = 6766; // 2 +const static uint64_t SH_FLD_HTMSC_FMUX_CGRPSEL0_LEN = 6767; // 2 +const static uint64_t SH_FLD_HTMSC_FMUX_CGRPSEL1 = 6768; // 2 +const static uint64_t SH_FLD_HTMSC_FMUX_CGRPSEL1_LEN = 6769; // 2 +const static uint64_t SH_FLD_HTMSC_FMUX_CGRPSEL2 = 6770; // 2 +const static uint64_t SH_FLD_HTMSC_FMUX_CGRPSEL2_LEN = 6771; // 2 +const static uint64_t SH_FLD_HTMSC_FMUX_RGRPSEL0 = 6772; // 2 +const static uint64_t SH_FLD_HTMSC_FMUX_RGRPSEL0_LEN = 6773; // 2 +const static uint64_t SH_FLD_HTMSC_FMUX_RGRPSEL1 = 6774; // 2 +const static uint64_t SH_FLD_HTMSC_FMUX_RGRPSEL1_LEN = 6775; // 2 +const static uint64_t SH_FLD_HTMSC_FMUX_RGRPSEL2 = 6776; // 2 +const static uint64_t SH_FLD_HTMSC_FMUX_RGRPSEL2_LEN = 6777; // 2 +const static uint64_t SH_FLD_HTMSC_FMUX_RGRPSEL3 = 6778; // 2 +const static uint64_t SH_FLD_HTMSC_FMUX_RGRPSEL3_LEN = 6779; // 2 +const static uint64_t SH_FLD_HTMSC_FMUX_RGRPSEL4 = 6780; // 2 +const static uint64_t SH_FLD_HTMSC_FMUX_RGRPSEL4_LEN = 6781; // 2 +const static uint64_t SH_FLD_HTMSC_FMUX_RGRPSEL5 = 6782; // 2 +const static uint64_t SH_FLD_HTMSC_FMUX_RGRPSEL5_LEN = 6783; // 2 +const static uint64_t SH_FLD_HTMSC_FSM = 6784; // 24 +const static uint64_t SH_FLD_HTMSC_FSM_LEN = 6785; // 24 +const static uint64_t SH_FLD_HTMSC_INVERT = 6786; // 2 +const static uint64_t SH_FLD_HTMSC_LEN = 6787; // 24 +const static uint64_t SH_FLD_HTMSC_MARK = 6788; // 26 +const static uint64_t SH_FLD_HTMSC_MARKERS_ONLY = 6789; // 26 +const static uint64_t SH_FLD_HTMSC_MARK_LEN = 6790; // 26 +const static uint64_t SH_FLD_HTMSC_MARK_TYPE = 6791; // 26 +const static uint64_t SH_FLD_HTMSC_MARK_TYPE_LEN = 6792; // 26 +const static uint64_t SH_FLD_HTMSC_MARK_VALID = 6793; // 26 +const static uint64_t SH_FLD_HTMSC_MASK = 6794; // 4 +const static uint64_t SH_FLD_HTMSC_MASK_LEN = 6795; // 4 +const static uint64_t SH_FLD_HTMSC_MTSPR_MARK = 6796; // 24 +const static uint64_t SH_FLD_HTMSC_MTSPR_TRIG = 6797; // 24 +const static uint64_t SH_FLD_HTMSC_OPER_HANG_DIV_RATIO = 6798; // 2 +const static uint64_t SH_FLD_HTMSC_OPER_HANG_DIV_RATIO_LEN = 6799; // 2 +const static uint64_t SH_FLD_HTMSC_OTHER_DBG0_STOP = 6800; // 2 +const static uint64_t SH_FLD_HTMSC_PAT = 6801; // 4 +const static uint64_t SH_FLD_HTMSC_PAT_LEN = 6802; // 4 +const static uint64_t SH_FLD_HTMSC_PAUSE = 6803; // 26 +const static uint64_t SH_FLD_HTMSC_PDBAR_ERROR = 6804; // 24 +const static uint64_t SH_FLD_HTMSC_PRIORITY = 6805; // 26 +const static uint64_t SH_FLD_HTMSC_RESERVED = 6806; // 24 +const static uint64_t SH_FLD_HTMSC_RESERVED_LEN = 6807; // 24 +const static uint64_t SH_FLD_HTMSC_RESET = 6808; // 26 +const static uint64_t SH_FLD_HTMSC_RTY_DRP_COUNT = 6809; // 2 +const static uint64_t SH_FLD_HTMSC_RTY_DRP_COUNT_LEN = 6810; // 2 +const static uint64_t SH_FLD_HTMSC_RUN_STOP = 6811; // 26 +const static uint64_t SH_FLD_HTMSC_SCOPE = 6812; // 50 +const static uint64_t SH_FLD_HTMSC_SCOPE_LEN = 6813; // 50 +const static uint64_t SH_FLD_HTMSC_SINGLE_TSTAMP = 6814; // 26 +const static uint64_t SH_FLD_HTMSC_SIZE = 6815; // 26 +const static uint64_t SH_FLD_HTMSC_SIZE_LEN = 6816; // 26 +const static uint64_t SH_FLD_HTMSC_SIZE_SMALL = 6817; // 26 +const static uint64_t SH_FLD_HTMSC_SPARE = 6818; // 24 +const static uint64_t SH_FLD_HTMSC_SPARE0 = 6819; // 24 +const static uint64_t SH_FLD_HTMSC_SPARE1012 = 6820; // 2 +const static uint64_t SH_FLD_HTMSC_SPARE1012_LEN = 6821; // 2 +const static uint64_t SH_FLD_HTMSC_SPARE1112 = 6822; // 24 +const static uint64_t SH_FLD_HTMSC_SPARE1112_LEN = 6823; // 24 +const static uint64_t SH_FLD_HTMSC_SPARE1415 = 6824; // 26 +const static uint64_t SH_FLD_HTMSC_SPARE1415_LEN = 6825; // 26 +const static uint64_t SH_FLD_HTMSC_SPARE16 = 6826; // 2 +const static uint64_t SH_FLD_HTMSC_SPARE23 = 6827; // 2 +const static uint64_t SH_FLD_HTMSC_SPARE2TO4 = 6828; // 24 +const static uint64_t SH_FLD_HTMSC_SPARE2TO4_LEN = 6829; // 24 +const static uint64_t SH_FLD_HTMSC_SPARE3 = 6830; // 2 +const static uint64_t SH_FLD_HTMSC_SPARE4043 = 6831; // 2 +const static uint64_t SH_FLD_HTMSC_SPARE4043_LEN = 6832; // 2 +const static uint64_t SH_FLD_HTMSC_SPARE67 = 6833; // 2 +const static uint64_t SH_FLD_HTMSC_SPARE67_LEN = 6834; // 2 +const static uint64_t SH_FLD_HTMSC_SPARES = 6835; // 24 +const static uint64_t SH_FLD_HTMSC_SPARES_LEN = 6836; // 24 +const static uint64_t SH_FLD_HTMSC_SPARE_1TO2 = 6837; // 24 +const static uint64_t SH_FLD_HTMSC_SPARE_1TO2_LEN = 6838; // 24 +const static uint64_t SH_FLD_HTMSC_SPARE_LEN = 6839; // 24 +const static uint64_t SH_FLD_HTMSC_START = 6840; // 26 +const static uint64_t SH_FLD_HTMSC_STOP = 6841; // 26 +const static uint64_t SH_FLD_HTMSC_STOP_ALT = 6842; // 26 +const static uint64_t SH_FLD_HTMSC_SYNC_STAMP_FORCE = 6843; // 2 +const static uint64_t SH_FLD_HTMSC_SYNC_STAMP_FORCE_LEN = 6844; // 2 +const static uint64_t SH_FLD_HTMSC_TRACE_ACTIVE = 6845; // 24 +const static uint64_t SH_FLD_HTMSC_TRIG = 6846; // 26 +const static uint64_t SH_FLD_HTMSC_TRIG_LEN = 6847; // 26 +const static uint64_t SH_FLD_HTMSC_TSIZEFILT_MASK = 6848; // 2 +const static uint64_t SH_FLD_HTMSC_TSIZEFILT_MASK_LEN = 6849; // 2 +const static uint64_t SH_FLD_HTMSC_TSIZEFILT_PAT = 6850; // 2 +const static uint64_t SH_FLD_HTMSC_TSIZEFILT_PAT_LEN = 6851; // 2 +const static uint64_t SH_FLD_HTMSC_VGTARGET = 6852; // 26 +const static uint64_t SH_FLD_HTMSC_VGTARGET_LEN = 6853; // 26 +const static uint64_t SH_FLD_HTMSC_WRAP = 6854; // 26 +const static uint64_t SH_FLD_HTMSC_WRITETOIO = 6855; // 2 +const static uint64_t SH_FLD_HTMSC_XSTOP_STOP = 6856; // 26 +const static uint64_t SH_FLD_HTM_CMD_OVERRUN = 6857; // 1 +const static uint64_t SH_FLD_HTM_IMA_TIMEOUT = 6858; // 12 +const static uint64_t SH_FLD_HTM_MARKER_SLAVE_ADRS = 6859; // 1 +const static uint64_t SH_FLD_HTM_MARKER_SLAVE_ADRS_LEN = 6860; // 1 +const static uint64_t SH_FLD_HTM_QUEUE_LIMIT = 6861; // 12 +const static uint64_t SH_FLD_HTM_QUEUE_LIMIT_LEN = 6862; // 12 +const static uint64_t SH_FLD_HTM_SRC_SEL = 6863; // 1 +const static uint64_t SH_FLD_HTM_SRC_SEL_LEN = 6864; // 1 +const static uint64_t SH_FLD_HTM_STOP = 6865; // 1 +const static uint64_t SH_FLD_HTM_TRACE_MODE = 6866; // 1 +const static uint64_t SH_FLD_HUC = 6867; // 1 +const static uint64_t SH_FLD_HUC_LEN = 6868; // 1 +const static uint64_t SH_FLD_HUT = 6869; // 1 +const static uint64_t SH_FLD_HUT_LEN = 6870; // 1 +const static uint64_t SH_FLD_HWCTRL = 6871; // 2 +const static uint64_t SH_FLD_HWCTRL_CLOCK_DIVIDER = 6872; // 1 +const static uint64_t SH_FLD_HWCTRL_CLOCK_DIVIDER_LEN = 6873; // 1 +const static uint64_t SH_FLD_HWCTRL_CPHA = 6874; // 1 +const static uint64_t SH_FLD_HWCTRL_CPOL = 6875; // 1 +const static uint64_t SH_FLD_HWCTRL_DEVICE = 6876; // 1 +const static uint64_t SH_FLD_HWCTRL_FRAME_SIZE = 6877; // 1 +const static uint64_t SH_FLD_HWCTRL_FRAME_SIZE_LEN = 6878; // 1 +const static uint64_t SH_FLD_HWCTRL_FSM_ENABLE = 6879; // 1 +const static uint64_t SH_FLD_HWCTRL_FSM_ERR = 6880; // 1 +const static uint64_t SH_FLD_HWCTRL_INTER_FRAME_DELAY = 6881; // 1 +const static uint64_t SH_FLD_HWCTRL_INTER_FRAME_DELAY_LEN = 6882; // 1 +const static uint64_t SH_FLD_HWCTRL_INVALID_NUMBER_OF_FRAMES = 6883; // 1 +const static uint64_t SH_FLD_HWCTRL_IN_COUNT = 6884; // 1 +const static uint64_t SH_FLD_HWCTRL_IN_COUNT_LEN = 6885; // 1 +const static uint64_t SH_FLD_HWCTRL_IN_DELAY = 6886; // 1 +const static uint64_t SH_FLD_HWCTRL_IN_DELAY_LEN = 6887; // 1 +const static uint64_t SH_FLD_HWCTRL_LEN = 6888; // 2 +const static uint64_t SH_FLD_HWCTRL_NR_OF_FRAMES = 6889; // 1 +const static uint64_t SH_FLD_HWCTRL_NR_OF_FRAMES_LEN = 6890; // 1 +const static uint64_t SH_FLD_HWCTRL_ONGOING = 6891; // 1 +const static uint64_t SH_FLD_HWCTRL_OUT_COUNT = 6892; // 1 +const static uint64_t SH_FLD_HWCTRL_OUT_COUNT_LEN = 6893; // 1 +const static uint64_t SH_FLD_HWCTRL_RDATA0 = 6894; // 1 +const static uint64_t SH_FLD_HWCTRL_RDATA0_LEN = 6895; // 1 +const static uint64_t SH_FLD_HWCTRL_RDATA1 = 6896; // 1 +const static uint64_t SH_FLD_HWCTRL_RDATA1_LEN = 6897; // 1 +const static uint64_t SH_FLD_HWCTRL_RDATA2 = 6898; // 1 +const static uint64_t SH_FLD_HWCTRL_RDATA2_LEN = 6899; // 1 +const static uint64_t SH_FLD_HWCTRL_RDATA3 = 6900; // 1 +const static uint64_t SH_FLD_HWCTRL_RDATA3_LEN = 6901; // 1 +const static uint64_t SH_FLD_HWCTRL_START_SAMPLING = 6902; // 1 +const static uint64_t SH_FLD_HWCTRL_WRITE_WHILE_BRIDGE_BUSY_SCRESP_EN = 6903; // 1 +const static uint64_t SH_FLD_HWCTRL_WRITE_WHILE_FSM_BUSY_ERR = 6904; // 1 +const static uint64_t SH_FLD_HWD = 6905; // 1 +const static uint64_t SH_FLD_HWD_0 = 6906; // 1 +const static uint64_t SH_FLD_HWD_0_LEN = 6907; // 1 +const static uint64_t SH_FLD_HWD_10 = 6908; // 1 +const static uint64_t SH_FLD_HWD_10_LEN = 6909; // 1 +const static uint64_t SH_FLD_HWD_11 = 6910; // 1 +const static uint64_t SH_FLD_HWD_11_LEN = 6911; // 1 +const static uint64_t SH_FLD_HWD_12 = 6912; // 1 +const static uint64_t SH_FLD_HWD_12_LEN = 6913; // 1 +const static uint64_t SH_FLD_HWD_13 = 6914; // 1 +const static uint64_t SH_FLD_HWD_13_LEN = 6915; // 1 +const static uint64_t SH_FLD_HWD_14 = 6916; // 1 +const static uint64_t SH_FLD_HWD_14_LEN = 6917; // 1 +const static uint64_t SH_FLD_HWD_15 = 6918; // 1 +const static uint64_t SH_FLD_HWD_15_LEN = 6919; // 1 +const static uint64_t SH_FLD_HWD_2 = 6920; // 1 +const static uint64_t SH_FLD_HWD_2_LEN = 6921; // 1 +const static uint64_t SH_FLD_HWD_3 = 6922; // 1 +const static uint64_t SH_FLD_HWD_3_LEN = 6923; // 1 +const static uint64_t SH_FLD_HWD_4 = 6924; // 1 +const static uint64_t SH_FLD_HWD_4_LEN = 6925; // 1 +const static uint64_t SH_FLD_HWD_5 = 6926; // 1 +const static uint64_t SH_FLD_HWD_5_LEN = 6927; // 1 +const static uint64_t SH_FLD_HWD_6 = 6928; // 1 +const static uint64_t SH_FLD_HWD_6_LEN = 6929; // 1 +const static uint64_t SH_FLD_HWD_7 = 6930; // 1 +const static uint64_t SH_FLD_HWD_7_LEN = 6931; // 1 +const static uint64_t SH_FLD_HWD_8 = 6932; // 1 +const static uint64_t SH_FLD_HWD_8_LEN = 6933; // 1 +const static uint64_t SH_FLD_HWD_9 = 6934; // 1 +const static uint64_t SH_FLD_HWD_9_LEN = 6935; // 1 +const static uint64_t SH_FLD_HWD_LEN = 6936; // 1 +const static uint64_t SH_FLD_HWD_PRIORITY = 6937; // 1 +const static uint64_t SH_FLD_HWD_PRIORITY_LEN = 6938; // 1 +const static uint64_t SH_FLD_HWD_RSD = 6939; // 1 +const static uint64_t SH_FLD_HWD_RSD_LEN = 6940; // 1 +const static uint64_t SH_FLD_HW_CONTROL_ERROR = 6941; // 12 +const static uint64_t SH_FLD_HW_DIR_INTIATED_LINE_DELETE_OCCURRED = 6942; // 12 +const static uint64_t SH_FLD_HW_ERRORS = 6943; // 9 +const static uint64_t SH_FLD_HW_ERRORS_MASK = 6944; // 9 +const static uint64_t SH_FLD_HYPERVISOR = 6945; // 2 +const static uint64_t SH_FLD_HYP_RECOURCE_ERR = 6946; // 96 +const static uint64_t SH_FLD_HYP_SPECIAL_WKUP = 6947; // 30 +const static uint64_t SH_FLD_HYP_VIRT_EXIT_ENABLE = 6948; // 96 +const static uint64_t SH_FLD_I2CM_ECC_ERRORS = 6949; // 1 +const static uint64_t SH_FLD_I2CM_ECC_ERRORS_LEN = 6950; // 1 +const static uint64_t SH_FLD_I2CM_I2C_ERRORS = 6951; // 1 +const static uint64_t SH_FLD_I2CM_I2C_ERRORS_LEN = 6952; // 1 +const static uint64_t SH_FLD_I2CM_INTER = 6953; // 1 +const static uint64_t SH_FLD_I2CM_INTR_STATUS = 6954; // 1 +const static uint64_t SH_FLD_I2CM_INTR_STATUS_LEN = 6955; // 1 +const static uint64_t SH_FLD_I2CM_PIB_ERRORS = 6956; // 1 +const static uint64_t SH_FLD_I2CM_PIB_ERRORS_LEN = 6957; // 1 +const static uint64_t SH_FLD_I2C_BUS_HELD_MODE_ENABLE = 6958; // 1 +const static uint64_t SH_FLD_I2C_EXTENDER = 6959; // 1 +const static uint64_t SH_FLD_I2C_SPEED_MUX = 6960; // 1 +const static uint64_t SH_FLD_I2C_SPEED_MUX_LEN = 6961; // 1 +const static uint64_t SH_FLD_I2C_TIMEOUT = 6962; // 1 +const static uint64_t SH_FLD_I2C_TIMEOUT_LEN = 6963; // 1 +const static uint64_t SH_FLD_IBWR_MASK = 6964; // 3 +const static uint64_t SH_FLD_IBWR_MASK_LEN = 6965; // 3 +const static uint64_t SH_FLD_ICACHE_ERR = 6966; // 21 +const static uint64_t SH_FLD_ICACHE_TAG_ADDR = 6967; // 21 +const static uint64_t SH_FLD_ICACHE_TAG_ADDR_LEN = 6968; // 21 +const static uint64_t SH_FLD_ICACHE_VALID = 6969; // 21 +const static uint64_t SH_FLD_ICACHE_VALID_LEN = 6970; // 21 +const static uint64_t SH_FLD_ICE_COUNT = 6971; // 2 +const static uint64_t SH_FLD_ICE_COUNT_LEN = 6972; // 2 +const static uint64_t SH_FLD_ICE_ETE_ATTN = 6973; // 10 +const static uint64_t SH_FLD_ICS_INVALID_STATE = 6974; // 1 +const static uint64_t SH_FLD_ICU_RNW = 6975; // 1 +const static uint64_t SH_FLD_ICU_TIMEOUT_ERROR = 6976; // 1 +const static uint64_t SH_FLD_ID = 6977; // 131 +const static uint64_t SH_FLD_IDIAL = 6978; // 58 +const static uint64_t SH_FLD_IDIAL_AMO_ADDR = 6979; // 3 +const static uint64_t SH_FLD_IDIAL_ATS = 6980; // 1 +const static uint64_t SH_FLD_IDIAL_ATS_ESR_MSK = 6981; // 1 +const static uint64_t SH_FLD_IDIAL_ATS_ESR_MSK_LEN = 6982; // 1 +const static uint64_t SH_FLD_IDIAL_ATS_FER_MSK = 6983; // 1 +const static uint64_t SH_FLD_IDIAL_ATS_FER_MSK_LEN = 6984; // 1 +const static uint64_t SH_FLD_IDIAL_ATS_LEN = 6985; // 1 +const static uint64_t SH_FLD_IDIAL_BBRD = 6986; // 3 +const static uint64_t SH_FLD_IDIAL_BBRD_LEN = 6987; // 3 +const static uint64_t SH_FLD_IDIAL_BR_CE = 6988; // 3 +const static uint64_t SH_FLD_IDIAL_BR_CE_LEN = 6989; // 3 +const static uint64_t SH_FLD_IDIAL_BR_SUE = 6990; // 3 +const static uint64_t SH_FLD_IDIAL_BR_SUE_LEN = 6991; // 3 +const static uint64_t SH_FLD_IDIAL_BR_UE = 6992; // 3 +const static uint64_t SH_FLD_IDIAL_BR_UE_LEN = 6993; // 3 +const static uint64_t SH_FLD_IDIAL_CONFIG1 = 6994; // 3 +const static uint64_t SH_FLD_IDIAL_COUNT0 = 6995; // 3 +const static uint64_t SH_FLD_IDIAL_COUNT0_LEN = 6996; // 3 +const static uint64_t SH_FLD_IDIAL_COUNT1 = 6997; // 3 +const static uint64_t SH_FLD_IDIAL_COUNT1_LEN = 6998; // 3 +const static uint64_t SH_FLD_IDIAL_COUNT2 = 6999; // 3 +const static uint64_t SH_FLD_IDIAL_COUNT2_LEN = 7000; // 3 +const static uint64_t SH_FLD_IDIAL_COUNT3 = 7001; // 3 +const static uint64_t SH_FLD_IDIAL_COUNT3_LEN = 7002; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_ASBE_0 = 7003; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_ASBE_1 = 7004; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_ASBE_2 = 7005; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_ASBE_3 = 7006; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_ASBE_4 = 7007; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_ASBE_5 = 7008; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_ASBE_6 = 7009; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_ASBE_7 = 7010; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_AUE_0 = 7011; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_AUE_1 = 7012; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_AUE_2 = 7013; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_AUE_3 = 7014; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_AUE_4 = 7015; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_AUE_5 = 7016; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_AUE_6 = 7017; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_AUE_7 = 7018; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_DUE_0 = 7019; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_DUE_1 = 7020; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_DUE_2 = 7021; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_DUE_3 = 7022; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_FWD_0 = 7023; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_FWD_1 = 7024; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_FWD_2 = 7025; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_FWD_3 = 7026; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_FWD_4 = 7027; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_FWD_5 = 7028; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_FWD_6 = 7029; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_FWD_7 = 7030; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NCF_0 = 7031; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NCF_1 = 7032; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NCF_2 = 7033; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NCF_3 = 7034; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NCF_4 = 7035; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NCF_5 = 7036; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NCF_6 = 7037; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NCF_7 = 7038; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NLG_0 = 7039; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NLG_1 = 7040; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NLG_10 = 7041; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NLG_11 = 7042; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NLG_12 = 7043; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NLG_13 = 7044; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NLG_14 = 7045; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NLG_15 = 7046; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NLG_2 = 7047; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NLG_3 = 7048; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NLG_4 = 7049; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NLG_5 = 7050; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NLG_6 = 7051; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NLG_7 = 7052; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NLG_8 = 7053; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NLG_9 = 7054; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_0 = 7055; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_1 = 7056; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_10 = 7057; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_11 = 7058; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_12 = 7059; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_13 = 7060; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_14 = 7061; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_15 = 7062; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_16 = 7063; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_17 = 7064; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_18 = 7065; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_19 = 7066; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_2 = 7067; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_20 = 7068; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_21 = 7069; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_22 = 7070; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_23 = 7071; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_3 = 7072; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_4 = 7073; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_5 = 7074; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_6 = 7075; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_7 = 7076; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_8 = 7077; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_NVF_9 = 7078; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBC_0 = 7079; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBC_1 = 7080; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBC_2 = 7081; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBC_3 = 7082; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBC_4 = 7083; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBC_5 = 7084; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBC_6 = 7085; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBC_7 = 7086; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBF_0 = 7087; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBF_1 = 7088; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBF_2 = 7089; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBF_3 = 7090; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBF_4 = 7091; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBF_5 = 7092; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBF_6 = 7093; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBF_7 = 7094; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBP_0 = 7095; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBP_1 = 7096; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBP_2 = 7097; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBP_3 = 7098; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBP_4 = 7099; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBP_5 = 7100; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBP_6 = 7101; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBP_7 = 7102; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBR_0 = 7103; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBR_1 = 7104; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBR_2 = 7105; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBR_3 = 7106; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBR_4 = 7107; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBR_5 = 7108; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBR_6 = 7109; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_PBR_7 = 7110; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_REG_0 = 7111; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_REG_1 = 7112; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_REG_2 = 7113; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_REG_3 = 7114; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_RSV1_0 = 7115; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_RSV1_1 = 7116; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_RSV1_2 = 7117; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_RSV1_3 = 7118; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_RSV2_0 = 7119; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_RSV2_1 = 7120; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_RSV2_2 = 7121; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_RSV2_3 = 7122; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_RSV3_0 = 7123; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_RSV3_1 = 7124; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_RSV3_2 = 7125; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_RSV3_3 = 7126; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_RSV4_0 = 7127; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_RSV4_1 = 7128; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_RSV4_2 = 7129; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_FIRST_RSV4_3 = 7130; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_ASBE_0 = 7131; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_ASBE_1 = 7132; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_ASBE_2 = 7133; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_ASBE_3 = 7134; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_ASBE_4 = 7135; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_ASBE_5 = 7136; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_ASBE_6 = 7137; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_ASBE_7 = 7138; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_AUE_0 = 7139; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_AUE_1 = 7140; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_AUE_2 = 7141; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_AUE_3 = 7142; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_AUE_4 = 7143; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_AUE_5 = 7144; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_AUE_6 = 7145; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_AUE_7 = 7146; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_DUE_0 = 7147; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_DUE_1 = 7148; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_DUE_2 = 7149; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_DUE_3 = 7150; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_FWD_0 = 7151; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_FWD_1 = 7152; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_FWD_2 = 7153; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_FWD_3 = 7154; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_FWD_4 = 7155; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_FWD_5 = 7156; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_FWD_6 = 7157; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_FWD_7 = 7158; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NCF_0 = 7159; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NCF_1 = 7160; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NCF_2 = 7161; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NCF_3 = 7162; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NCF_4 = 7163; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NCF_5 = 7164; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NCF_6 = 7165; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NCF_7 = 7166; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NLG_0 = 7167; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NLG_1 = 7168; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NLG_10 = 7169; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NLG_11 = 7170; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NLG_12 = 7171; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NLG_13 = 7172; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NLG_14 = 7173; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NLG_15 = 7174; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NLG_2 = 7175; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NLG_3 = 7176; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NLG_4 = 7177; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NLG_5 = 7178; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NLG_6 = 7179; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NLG_7 = 7180; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NLG_8 = 7181; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NLG_9 = 7182; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_0 = 7183; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_1 = 7184; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_10 = 7185; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_11 = 7186; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_12 = 7187; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_13 = 7188; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_14 = 7189; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_15 = 7190; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_16 = 7191; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_17 = 7192; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_18 = 7193; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_19 = 7194; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_2 = 7195; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_20 = 7196; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_21 = 7197; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_22 = 7198; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_23 = 7199; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_3 = 7200; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_4 = 7201; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_5 = 7202; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_6 = 7203; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_7 = 7204; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_8 = 7205; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_NVF_9 = 7206; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBC_0 = 7207; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBC_1 = 7208; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBC_2 = 7209; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBC_3 = 7210; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBC_4 = 7211; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBC_5 = 7212; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBC_6 = 7213; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBC_7 = 7214; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBF_0 = 7215; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBF_1 = 7216; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBF_2 = 7217; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBF_3 = 7218; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBF_4 = 7219; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBF_5 = 7220; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBF_6 = 7221; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBF_7 = 7222; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBP_0 = 7223; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBP_1 = 7224; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBP_2 = 7225; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBP_3 = 7226; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBP_4 = 7227; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBP_5 = 7228; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBP_6 = 7229; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBP_7 = 7230; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBR_0 = 7231; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBR_1 = 7232; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBR_2 = 7233; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBR_3 = 7234; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBR_4 = 7235; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBR_5 = 7236; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBR_6 = 7237; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_PBR_7 = 7238; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_REG_0 = 7239; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_REG_1 = 7240; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_REG_2 = 7241; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_REG_3 = 7242; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_RSV1_0 = 7243; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_RSV1_1 = 7244; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_RSV1_2 = 7245; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_RSV1_3 = 7246; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_RSV2_0 = 7247; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_RSV2_1 = 7248; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_RSV2_2 = 7249; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_RSV2_3 = 7250; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_RSV3_0 = 7251; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_RSV3_1 = 7252; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_RSV3_2 = 7253; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_RSV3_3 = 7254; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_RSV4_0 = 7255; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_RSV4_1 = 7256; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_RSV4_2 = 7257; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_HOLD_RSV4_3 = 7258; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_ASBE_0 = 7259; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_ASBE_1 = 7260; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_ASBE_2 = 7261; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_ASBE_3 = 7262; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_ASBE_4 = 7263; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_ASBE_5 = 7264; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_ASBE_6 = 7265; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_ASBE_7 = 7266; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_AUE_0 = 7267; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_AUE_1 = 7268; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_AUE_2 = 7269; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_AUE_3 = 7270; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_AUE_4 = 7271; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_AUE_5 = 7272; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_AUE_6 = 7273; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_AUE_7 = 7274; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_DUE_0 = 7275; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_DUE_1 = 7276; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_DUE_2 = 7277; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_DUE_3 = 7278; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_FWD_0 = 7279; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_FWD_1 = 7280; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_FWD_2 = 7281; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_FWD_3 = 7282; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_FWD_4 = 7283; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_FWD_5 = 7284; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_FWD_6 = 7285; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_FWD_7 = 7286; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NCF_0 = 7287; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NCF_1 = 7288; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NCF_2 = 7289; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NCF_3 = 7290; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NCF_4 = 7291; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NCF_5 = 7292; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NCF_6 = 7293; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NCF_7 = 7294; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NLG_0 = 7295; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NLG_1 = 7296; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NLG_10 = 7297; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NLG_11 = 7298; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NLG_12 = 7299; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NLG_13 = 7300; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NLG_14 = 7301; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NLG_15 = 7302; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NLG_2 = 7303; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NLG_3 = 7304; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NLG_4 = 7305; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NLG_5 = 7306; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NLG_6 = 7307; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NLG_7 = 7308; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NLG_8 = 7309; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NLG_9 = 7310; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_0 = 7311; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_1 = 7312; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_10 = 7313; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_11 = 7314; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_12 = 7315; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_13 = 7316; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_14 = 7317; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_15 = 7318; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_16 = 7319; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_17 = 7320; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_18 = 7321; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_19 = 7322; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_2 = 7323; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_20 = 7324; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_21 = 7325; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_22 = 7326; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_23 = 7327; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_3 = 7328; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_4 = 7329; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_5 = 7330; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_6 = 7331; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_7 = 7332; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_8 = 7333; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_NVF_9 = 7334; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBC_0 = 7335; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBC_1 = 7336; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBC_2 = 7337; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBC_3 = 7338; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBC_4 = 7339; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBC_5 = 7340; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBC_6 = 7341; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBC_7 = 7342; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBF_0 = 7343; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBF_1 = 7344; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBF_2 = 7345; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBF_3 = 7346; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBF_4 = 7347; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBF_5 = 7348; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBF_6 = 7349; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBF_7 = 7350; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBP_0 = 7351; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBP_1 = 7352; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBP_2 = 7353; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBP_3 = 7354; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBP_4 = 7355; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBP_5 = 7356; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBP_6 = 7357; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBP_7 = 7358; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBR_0 = 7359; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBR_1 = 7360; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBR_2 = 7361; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBR_3 = 7362; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBR_4 = 7363; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBR_5 = 7364; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBR_6 = 7365; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_PBR_7 = 7366; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_REG_0 = 7367; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_REG_1 = 7368; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_REG_2 = 7369; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_REG_3 = 7370; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_RSV1_0 = 7371; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_RSV1_1 = 7372; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_RSV1_2 = 7373; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_RSV1_3 = 7374; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_RSV2_0 = 7375; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_RSV2_1 = 7376; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_RSV2_2 = 7377; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_RSV2_3 = 7378; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_RSV3_0 = 7379; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_RSV3_1 = 7380; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_RSV3_2 = 7381; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_RSV3_3 = 7382; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_RSV4_0 = 7383; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_RSV4_1 = 7384; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_RSV4_2 = 7385; // 3 +const static uint64_t SH_FLD_IDIAL_CTL_MASK_RSV4_3 = 7386; // 3 +const static uint64_t SH_FLD_IDIAL_DEBUG0_CONFIG = 7387; // 3 +const static uint64_t SH_FLD_IDIAL_DEBUG1_CONFIG = 7388; // 3 +const static uint64_t SH_FLD_IDIAL_EA = 7389; // 2 +const static uint64_t SH_FLD_IDIAL_EA_LEN = 7390; // 2 +const static uint64_t SH_FLD_IDIAL_ECC_CONFIG = 7391; // 3 +const static uint64_t SH_FLD_IDIAL_ERRINJ = 7392; // 3 +const static uint64_t SH_FLD_IDIAL_IBRD = 7393; // 3 +const static uint64_t SH_FLD_IDIAL_IBRD_LEN = 7394; // 3 +const static uint64_t SH_FLD_IDIAL_IBUF_STATE = 7395; // 3 +const static uint64_t SH_FLD_IDIAL_IBUF_WRITE = 7396; // 3 +const static uint64_t SH_FLD_IDIAL_IR_CE = 7397; // 3 +const static uint64_t SH_FLD_IDIAL_IR_CE_LEN = 7398; // 3 +const static uint64_t SH_FLD_IDIAL_IR_SUE = 7399; // 3 +const static uint64_t SH_FLD_IDIAL_IR_SUE_LEN = 7400; // 3 +const static uint64_t SH_FLD_IDIAL_IR_UE = 7401; // 3 +const static uint64_t SH_FLD_IDIAL_IR_UE_LEN = 7402; // 3 +const static uint64_t SH_FLD_IDIAL_ISSYNC = 7403; // 1 +const static uint64_t SH_FLD_IDIAL_ISSYNC_LEN = 7404; // 1 +const static uint64_t SH_FLD_IDIAL_LEN = 7405; // 58 +const static uint64_t SH_FLD_IDIAL_MASK0 = 7406; // 1 +const static uint64_t SH_FLD_IDIAL_MASK0_LEN = 7407; // 1 +const static uint64_t SH_FLD_IDIAL_MISC_STATE = 7408; // 3 +const static uint64_t SH_FLD_IDIAL_MRG_STATE = 7409; // 3 +const static uint64_t SH_FLD_IDIAL_OBRD = 7410; // 3 +const static uint64_t SH_FLD_IDIAL_OBRD_LEN = 7411; // 3 +const static uint64_t SH_FLD_IDIAL_OBUF_STATE = 7412; // 3 +const static uint64_t SH_FLD_IDIAL_OR_CE = 7413; // 3 +const static uint64_t SH_FLD_IDIAL_OR_CE_LEN = 7414; // 3 +const static uint64_t SH_FLD_IDIAL_OR_SUE = 7415; // 3 +const static uint64_t SH_FLD_IDIAL_OR_SUE_LEN = 7416; // 3 +const static uint64_t SH_FLD_IDIAL_OR_UE = 7417; // 3 +const static uint64_t SH_FLD_IDIAL_OR_UE_LEN = 7418; // 3 +const static uint64_t SH_FLD_IDIAL_PAR = 7419; // 1 +const static uint64_t SH_FLD_IDIAL_PAR_LEN = 7420; // 1 +const static uint64_t SH_FLD_IDIAL_PBRX_RTAG = 7421; // 6 +const static uint64_t SH_FLD_IDIAL_PBTX_AMO = 7422; // 3 +const static uint64_t SH_FLD_IDIAL_PBTX_AMO_LEN = 7423; // 3 +const static uint64_t SH_FLD_IDIAL_PBTX_STATE = 7424; // 3 +const static uint64_t SH_FLD_IDIAL_PC = 7425; // 2 +const static uint64_t SH_FLD_IDIAL_PC_LEN = 7426; // 2 +const static uint64_t SH_FLD_IDIAL_PE = 7427; // 2 +const static uint64_t SH_FLD_IDIAL_PE_LEN = 7428; // 2 +const static uint64_t SH_FLD_IDIAL_PR_CE = 7429; // 3 +const static uint64_t SH_FLD_IDIAL_PR_CE_LEN = 7430; // 3 +const static uint64_t SH_FLD_IDIAL_PR_SUE = 7431; // 3 +const static uint64_t SH_FLD_IDIAL_PR_SUE_LEN = 7432; // 3 +const static uint64_t SH_FLD_IDIAL_PR_UE = 7433; // 3 +const static uint64_t SH_FLD_IDIAL_PR_UE_LEN = 7434; // 3 +const static uint64_t SH_FLD_IDIAL_PT_CE = 7435; // 3 +const static uint64_t SH_FLD_IDIAL_PT_CE_LEN = 7436; // 3 +const static uint64_t SH_FLD_IDIAL_PT_SUE = 7437; // 3 +const static uint64_t SH_FLD_IDIAL_PT_SUE_LEN = 7438; // 3 +const static uint64_t SH_FLD_IDIAL_PT_UE = 7439; // 3 +const static uint64_t SH_FLD_IDIAL_PT_UE_LEN = 7440; // 3 +const static uint64_t SH_FLD_IDIAL_RA = 7441; // 2 +const static uint64_t SH_FLD_IDIAL_RA_LEN = 7442; // 2 +const static uint64_t SH_FLD_IDIAL_REG0_RSVD0 = 7443; // 1 +const static uint64_t SH_FLD_IDIAL_REG0_RSVD0_LEN = 7444; // 1 +const static uint64_t SH_FLD_IDIAL_REG1_RSVD0 = 7445; // 1 +const static uint64_t SH_FLD_IDIAL_REG1_RSVD0_LEN = 7446; // 1 +const static uint64_t SH_FLD_IDIAL_RESERVED = 7447; // 3 +const static uint64_t SH_FLD_IDIAL_RNW = 7448; // 1 +const static uint64_t SH_FLD_IDIAL_RQIN_STATE = 7449; // 3 +const static uint64_t SH_FLD_IDIAL_RSVD0 = 7450; // 4 +const static uint64_t SH_FLD_IDIAL_RSVD0_LEN = 7451; // 4 +const static uint64_t SH_FLD_IDIAL_RSVD1 = 7452; // 2 +const static uint64_t SH_FLD_IDIAL_RSVD1_LEN = 7453; // 2 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_ASBE_0 = 7454; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_ASBE_1 = 7455; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_ASBE_2 = 7456; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_ASBE_3 = 7457; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_AUE_0 = 7458; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_AUE_1 = 7459; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_AUE_2 = 7460; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_AUE_3 = 7461; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_FWD_0 = 7462; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_FWD_1 = 7463; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_FWD_2 = 7464; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_FWD_3 = 7465; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NCF_0 = 7466; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NCF_1 = 7467; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NCF_2 = 7468; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NCF_3 = 7469; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_0 = 7470; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_1 = 7471; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_10 = 7472; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_11 = 7473; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_12 = 7474; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_13 = 7475; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_14 = 7476; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_15 = 7477; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_16 = 7478; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_17 = 7479; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_18 = 7480; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_19 = 7481; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_2 = 7482; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_20 = 7483; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_21 = 7484; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_22 = 7485; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_23 = 7486; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_24 = 7487; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_25 = 7488; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_26 = 7489; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_27 = 7490; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_28 = 7491; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_29 = 7492; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_3 = 7493; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_30 = 7494; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_31 = 7495; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_32 = 7496; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_33 = 7497; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_34 = 7498; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_35 = 7499; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_36 = 7500; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_37 = 7501; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_38 = 7502; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_39 = 7503; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_4 = 7504; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_40 = 7505; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_41 = 7506; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_42 = 7507; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_43 = 7508; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_44 = 7509; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_45 = 7510; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_46 = 7511; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_47 = 7512; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_48 = 7513; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_49 = 7514; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_5 = 7515; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_50 = 7516; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_51 = 7517; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_52 = 7518; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_53 = 7519; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_54 = 7520; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_55 = 7521; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_6 = 7522; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_7 = 7523; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_8 = 7524; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NLG_9 = 7525; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_0 = 7526; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_1 = 7527; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_10 = 7528; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_11 = 7529; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_12 = 7530; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_13 = 7531; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_14 = 7532; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_15 = 7533; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_16 = 7534; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_17 = 7535; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_18 = 7536; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_19 = 7537; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_2 = 7538; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_20 = 7539; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_21 = 7540; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_22 = 7541; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_23 = 7542; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_3 = 7543; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_4 = 7544; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_5 = 7545; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_6 = 7546; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_7 = 7547; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_8 = 7548; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_NVF_9 = 7549; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBC_0 = 7550; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBC_1 = 7551; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBC_2 = 7552; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBC_3 = 7553; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBC_4 = 7554; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBC_5 = 7555; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBC_6 = 7556; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBC_7 = 7557; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBF_0 = 7558; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBF_1 = 7559; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBF_10 = 7560; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBF_11 = 7561; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBF_2 = 7562; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBF_3 = 7563; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBF_4 = 7564; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBF_5 = 7565; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBF_6 = 7566; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBF_7 = 7567; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBF_8 = 7568; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBF_9 = 7569; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBP_0 = 7570; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBP_1 = 7571; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBP_2 = 7572; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBP_3 = 7573; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBP_4 = 7574; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBP_5 = 7575; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBP_6 = 7576; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBP_7 = 7577; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBR_0 = 7578; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBR_1 = 7579; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBR_2 = 7580; // 12 +const static uint64_t SH_FLD_IDIAL_SM_FIRST_PBR_3 = 7581; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_ASBE_0 = 7582; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_ASBE_1 = 7583; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_ASBE_2 = 7584; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_ASBE_3 = 7585; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_AUE_0 = 7586; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_AUE_1 = 7587; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_AUE_2 = 7588; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_AUE_3 = 7589; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_FWD_0 = 7590; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_FWD_1 = 7591; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_FWD_2 = 7592; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_FWD_3 = 7593; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NCF_0 = 7594; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NCF_1 = 7595; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NCF_2 = 7596; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NCF_3 = 7597; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_0 = 7598; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_1 = 7599; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_10 = 7600; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_11 = 7601; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_12 = 7602; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_13 = 7603; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_14 = 7604; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_15 = 7605; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_16 = 7606; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_17 = 7607; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_18 = 7608; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_19 = 7609; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_2 = 7610; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_20 = 7611; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_21 = 7612; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_22 = 7613; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_23 = 7614; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_24 = 7615; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_25 = 7616; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_26 = 7617; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_27 = 7618; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_28 = 7619; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_29 = 7620; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_3 = 7621; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_30 = 7622; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_31 = 7623; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_32 = 7624; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_33 = 7625; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_34 = 7626; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_35 = 7627; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_36 = 7628; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_37 = 7629; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_38 = 7630; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_39 = 7631; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_4 = 7632; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_40 = 7633; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_41 = 7634; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_42 = 7635; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_43 = 7636; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_44 = 7637; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_45 = 7638; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_46 = 7639; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_47 = 7640; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_48 = 7641; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_49 = 7642; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_5 = 7643; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_50 = 7644; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_51 = 7645; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_52 = 7646; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_53 = 7647; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_54 = 7648; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_55 = 7649; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_6 = 7650; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_7 = 7651; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_8 = 7652; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NLG_9 = 7653; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_0 = 7654; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_1 = 7655; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_10 = 7656; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_11 = 7657; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_12 = 7658; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_13 = 7659; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_14 = 7660; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_15 = 7661; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_16 = 7662; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_17 = 7663; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_18 = 7664; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_19 = 7665; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_2 = 7666; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_20 = 7667; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_21 = 7668; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_22 = 7669; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_23 = 7670; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_3 = 7671; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_4 = 7672; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_5 = 7673; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_6 = 7674; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_7 = 7675; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_8 = 7676; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_NVF_9 = 7677; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBC_0 = 7678; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBC_1 = 7679; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBC_2 = 7680; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBC_3 = 7681; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBC_4 = 7682; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBC_5 = 7683; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBC_6 = 7684; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBC_7 = 7685; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBF_0 = 7686; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBF_1 = 7687; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBF_10 = 7688; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBF_11 = 7689; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBF_2 = 7690; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBF_3 = 7691; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBF_4 = 7692; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBF_5 = 7693; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBF_6 = 7694; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBF_7 = 7695; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBF_8 = 7696; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBF_9 = 7697; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBP_0 = 7698; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBP_1 = 7699; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBP_2 = 7700; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBP_3 = 7701; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBP_4 = 7702; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBP_5 = 7703; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBP_6 = 7704; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBP_7 = 7705; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBR_0 = 7706; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBR_1 = 7707; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBR_2 = 7708; // 12 +const static uint64_t SH_FLD_IDIAL_SM_HOLD_PBR_3 = 7709; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_ASBE_0 = 7710; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_ASBE_1 = 7711; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_ASBE_2 = 7712; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_ASBE_3 = 7713; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_AUE_0 = 7714; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_AUE_1 = 7715; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_AUE_2 = 7716; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_AUE_3 = 7717; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_FWD_0 = 7718; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_FWD_1 = 7719; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_FWD_2 = 7720; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_FWD_3 = 7721; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NCF_0 = 7722; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NCF_1 = 7723; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NCF_2 = 7724; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NCF_3 = 7725; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_0 = 7726; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_1 = 7727; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_10 = 7728; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_11 = 7729; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_12 = 7730; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_13 = 7731; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_14 = 7732; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_15 = 7733; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_16 = 7734; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_17 = 7735; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_18 = 7736; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_19 = 7737; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_2 = 7738; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_20 = 7739; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_21 = 7740; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_22 = 7741; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_23 = 7742; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_24 = 7743; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_25 = 7744; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_26 = 7745; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_27 = 7746; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_28 = 7747; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_29 = 7748; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_3 = 7749; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_30 = 7750; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_31 = 7751; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_32 = 7752; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_33 = 7753; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_34 = 7754; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_35 = 7755; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_36 = 7756; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_37 = 7757; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_38 = 7758; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_39 = 7759; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_4 = 7760; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_40 = 7761; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_41 = 7762; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_42 = 7763; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_43 = 7764; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_44 = 7765; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_45 = 7766; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_46 = 7767; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_47 = 7768; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_48 = 7769; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_49 = 7770; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_5 = 7771; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_50 = 7772; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_51 = 7773; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_52 = 7774; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_53 = 7775; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_54 = 7776; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_55 = 7777; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_6 = 7778; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_7 = 7779; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_8 = 7780; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NLG_9 = 7781; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_0 = 7782; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_1 = 7783; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_10 = 7784; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_11 = 7785; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_12 = 7786; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_13 = 7787; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_14 = 7788; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_15 = 7789; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_16 = 7790; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_17 = 7791; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_18 = 7792; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_19 = 7793; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_2 = 7794; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_20 = 7795; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_21 = 7796; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_22 = 7797; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_23 = 7798; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_3 = 7799; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_4 = 7800; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_5 = 7801; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_6 = 7802; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_7 = 7803; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_8 = 7804; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_NVF_9 = 7805; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBC_0 = 7806; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBC_1 = 7807; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBC_2 = 7808; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBC_3 = 7809; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBC_4 = 7810; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBC_5 = 7811; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBC_6 = 7812; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBC_7 = 7813; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBF_0 = 7814; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBF_1 = 7815; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBF_10 = 7816; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBF_11 = 7817; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBF_2 = 7818; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBF_3 = 7819; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBF_4 = 7820; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBF_5 = 7821; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBF_6 = 7822; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBF_7 = 7823; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBF_8 = 7824; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBF_9 = 7825; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBP_0 = 7826; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBP_1 = 7827; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBP_2 = 7828; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBP_3 = 7829; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBP_4 = 7830; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBP_5 = 7831; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBP_6 = 7832; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBP_7 = 7833; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBR_0 = 7834; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBR_1 = 7835; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBR_2 = 7836; // 12 +const static uint64_t SH_FLD_IDIAL_SM_MASK_PBR_3 = 7837; // 12 +const static uint64_t SH_FLD_IDIAL_TAG = 7838; // 1 +const static uint64_t SH_FLD_IDIAL_TAG_LEN = 7839; // 1 +const static uint64_t SH_FLD_IDIAL_VLD = 7840; // 1 +const static uint64_t SH_FLD_IDLE = 7841; // 2 +const static uint64_t SH_FLD_IDLES = 7842; // 64 +const static uint64_t SH_FLD_IDLES_LEN = 7843; // 64 +const static uint64_t SH_FLD_IDLE_PAT_ACTN = 7844; // 2 +const static uint64_t SH_FLD_IDLE_PAT_ADDRESS_0_13 = 7845; // 2 +const static uint64_t SH_FLD_IDLE_PAT_ADDRESS_0_13_LEN = 7846; // 2 +const static uint64_t SH_FLD_IDLE_PAT_ADDRESS_14 = 7847; // 2 +const static uint64_t SH_FLD_IDLE_PAT_ADDRESS_15 = 7848; // 2 +const static uint64_t SH_FLD_IDLE_PAT_ADDRESS_16 = 7849; // 2 +const static uint64_t SH_FLD_IDLE_PAT_ADDRESS_17 = 7850; // 2 +const static uint64_t SH_FLD_IDLE_PAT_BANK_0_1 = 7851; // 2 +const static uint64_t SH_FLD_IDLE_PAT_BANK_0_1_LEN = 7852; // 2 +const static uint64_t SH_FLD_IDLE_PAT_BANK_2 = 7853; // 2 +const static uint64_t SH_FLD_IDLE_PAT_BANK_GROUP_0 = 7854; // 2 +const static uint64_t SH_FLD_IDLE_PAT_BANK_GROUP_1 = 7855; // 2 +const static uint64_t SH_FLD_IDLE_PAT_PARITY = 7856; // 2 +const static uint64_t SH_FLD_ID_0 = 7857; // 1 +const static uint64_t SH_FLD_ID_0_LEN = 7858; // 1 +const static uint64_t SH_FLD_ID_1 = 7859; // 1 +const static uint64_t SH_FLD_ID_1_LEN = 7860; // 1 +const static uint64_t SH_FLD_ID_2 = 7861; // 1 +const static uint64_t SH_FLD_ID_2_LEN = 7862; // 1 +const static uint64_t SH_FLD_ID_3 = 7863; // 1 +const static uint64_t SH_FLD_ID_3_LEN = 7864; // 1 +const static uint64_t SH_FLD_ID_LEN = 7865; // 129 +const static uint64_t SH_FLD_IFC_REG_CERR0 = 7866; // 1 +const static uint64_t SH_FLD_IFC_REG_CERR1 = 7867; // 1 +const static uint64_t SH_FLD_IFC_REG_CERR2 = 7868; // 1 +const static uint64_t SH_FLD_IFC_REG_ERR0 = 7869; // 1 +const static uint64_t SH_FLD_IFC_REG_ERR1 = 7870; // 1 +const static uint64_t SH_FLD_IFC_REG_ERR2 = 7871; // 1 +const static uint64_t SH_FLD_IFC_REG_ERR3 = 7872; // 1 +const static uint64_t SH_FLD_IFC_REG_ERR4 = 7873; // 1 +const static uint64_t SH_FLD_IFC_REG_ERR5 = 7874; // 1 +const static uint64_t SH_FLD_IFC_REG_ERR6 = 7875; // 1 +const static uint64_t SH_FLD_IFC_REG_ERR7 = 7876; // 1 +const static uint64_t SH_FLD_IFC_REG_ERR8 = 7877; // 1 +const static uint64_t SH_FLD_IFREQ = 7878; // 1 +const static uint64_t SH_FLD_IGNORE_PECE = 7879; // 12 +const static uint64_t SH_FLD_ILLEGAL_CACHE_OP = 7880; // 1 +const static uint64_t SH_FLD_ILLEGAL_CACHE_OP_MASK = 7881; // 1 +const static uint64_t SH_FLD_ILLEGAL_LPC_BAR_ACCESS = 7882; // 4 +const static uint64_t SH_FLD_ILL_CRESP = 7883; // 1 +const static uint64_t SH_FLD_IMA_ACK_DEAD = 7884; // 12 +const static uint64_t SH_FLD_IMA_CRESP_ADDR_ERR = 7885; // 24 +const static uint64_t SH_FLD_IMA_FOREIGN0_ACK_DEAD = 7886; // 12 +const static uint64_t SH_FLD_IMA_FOREIGN1_ACK_DEAD = 7887; // 12 +const static uint64_t SH_FLD_IN = 7888; // 131 +const static uint64_t SH_FLD_IN0 = 7889; // 48 +const static uint64_t SH_FLD_IN1 = 7890; // 47 +const static uint64_t SH_FLD_IN10 = 7891; // 47 +const static uint64_t SH_FLD_IN11 = 7892; // 47 +const static uint64_t SH_FLD_IN12 = 7893; // 4 +const static uint64_t SH_FLD_IN12_LEN = 7894; // 1 +const static uint64_t SH_FLD_IN13 = 7895; // 3 +const static uint64_t SH_FLD_IN14 = 7896; // 4 +const static uint64_t SH_FLD_IN15 = 7897; // 4 +const static uint64_t SH_FLD_IN16 = 7898; // 4 +const static uint64_t SH_FLD_IN16_LEN = 7899; // 1 +const static uint64_t SH_FLD_IN17 = 7900; // 3 +const static uint64_t SH_FLD_IN18 = 7901; // 3 +const static uint64_t SH_FLD_IN19 = 7902; // 4 +const static uint64_t SH_FLD_IN2 = 7903; // 47 +const static uint64_t SH_FLD_IN20 = 7904; // 4 +const static uint64_t SH_FLD_IN21 = 7905; // 4 +const static uint64_t SH_FLD_IN21_LEN = 7906; // 3 +const static uint64_t SH_FLD_IN22 = 7907; // 1 +const static uint64_t SH_FLD_IN22_LEN = 7908; // 1 +const static uint64_t SH_FLD_IN24 = 7909; // 1 +const static uint64_t SH_FLD_IN25 = 7910; // 1 +const static uint64_t SH_FLD_IN26 = 7911; // 3 +const static uint64_t SH_FLD_IN27 = 7912; // 1 +const static uint64_t SH_FLD_IN28 = 7913; // 1 +const static uint64_t SH_FLD_IN29 = 7914; // 1 +const static uint64_t SH_FLD_IN29_LEN = 7915; // 1 +const static uint64_t SH_FLD_IN3 = 7916; // 47 +const static uint64_t SH_FLD_IN31 = 7917; // 1 +const static uint64_t SH_FLD_IN31_LEN = 7918; // 1 +const static uint64_t SH_FLD_IN33 = 7919; // 1 +const static uint64_t SH_FLD_IN33_LEN = 7920; // 1 +const static uint64_t SH_FLD_IN35 = 7921; // 1 +const static uint64_t SH_FLD_IN36 = 7922; // 1 +const static uint64_t SH_FLD_IN36_LEN = 7923; // 1 +const static uint64_t SH_FLD_IN4 = 7924; // 48 +const static uint64_t SH_FLD_IN40 = 7925; // 1 +const static uint64_t SH_FLD_IN5 = 7926; // 48 +const static uint64_t SH_FLD_IN6 = 7927; // 48 +const static uint64_t SH_FLD_IN7 = 7928; // 48 +const static uint64_t SH_FLD_IN8 = 7929; // 48 +const static uint64_t SH_FLD_IN9 = 7930; // 48 +const static uint64_t SH_FLD_INBAND_BAR_HIT_WITH_INCORRECT_TTYPE = 7931; // 4 +const static uint64_t SH_FLD_INBD_ARRAY_ECC_CE = 7932; // 2 +const static uint64_t SH_FLD_INBD_ARRAY_ECC_UE = 7933; // 2 +const static uint64_t SH_FLD_INBD_LCO_ARRAY_ECC_CE = 7934; // 1 +const static uint64_t SH_FLD_INBD_LCO_ARRAY_ECC_SUE = 7935; // 1 +const static uint64_t SH_FLD_INBD_LCO_ARRAY_ECC_UE = 7936; // 1 +const static uint64_t SH_FLD_INCLUDE_TRAFFIC = 7937; // 1 +const static uint64_t SH_FLD_INCOMING_PB_PARITY_ERR = 7938; // 2 +const static uint64_t SH_FLD_INDEX = 7939; // 1 +const static uint64_t SH_FLD_INDEX_LEN = 7940; // 1 +const static uint64_t SH_FLD_INDIRECT_BRIDGE_0_SOURCE = 7941; // 1 +const static uint64_t SH_FLD_INDIRECT_BRIDGE_1_SOURCE = 7942; // 1 +const static uint64_t SH_FLD_INDIRECT_BRIDGE_2_SOURCE = 7943; // 1 +const static uint64_t SH_FLD_INDIRECT_BRIDGE_3_SOURCE = 7944; // 1 +const static uint64_t SH_FLD_INDIRECT_MODE = 7945; // 2 +const static uint64_t SH_FLD_INEX = 7946; // 43 +const static uint64_t SH_FLD_INFINITE_MODE = 7947; // 43 +const static uint64_t SH_FLD_INFO = 7948; // 43 +const static uint64_t SH_FLD_INFORMATION = 7949; // 8 +const static uint64_t SH_FLD_INFORMATION_LEN = 7950; // 8 +const static uint64_t SH_FLD_INFO_CAPTURED = 7951; // 4 +const static uint64_t SH_FLD_INH0_TICK = 7952; // 12 +const static uint64_t SH_FLD_INH0_TICK_LEN = 7953; // 12 +const static uint64_t SH_FLD_INH1_TICK = 7954; // 12 +const static uint64_t SH_FLD_INH1_TICK_LEN = 7955; // 12 +const static uint64_t SH_FLD_INIT = 7956; // 1 +const static uint64_t SH_FLD_INITIAL_COARSE_WR = 7957; // 8 +const static uint64_t SH_FLD_INITIAL_PAT_WRITE = 7958; // 8 +const static uint64_t SH_FLD_INIT_DONE_DL_MASK = 7959; // 2 +const static uint64_t SH_FLD_INIT_TMR_CFG = 7960; // 72 +const static uint64_t SH_FLD_INIT_TMR_CFG_LEN = 7961; // 72 +const static uint64_t SH_FLD_INJ = 7962; // 1 +const static uint64_t SH_FLD_INJECT_1HOT_SM_ERROR = 7963; // 8 +const static uint64_t SH_FLD_INJECT_CAL0_PAR_ERROR = 7964; // 8 +const static uint64_t SH_FLD_INJECT_ENABLE = 7965; // 1 +const static uint64_t SH_FLD_INJECT_ERR = 7966; // 12 +const static uint64_t SH_FLD_INJECT_FIR_ERR0 = 7967; // 8 +const static uint64_t SH_FLD_INJECT_FIR_ERR1 = 7968; // 8 +const static uint64_t SH_FLD_INJECT_FIR_ERR2 = 7969; // 8 +const static uint64_t SH_FLD_INJECT_FIR_ERR3 = 7970; // 8 +const static uint64_t SH_FLD_INJECT_FIR_ERR4 = 7971; // 8 +const static uint64_t SH_FLD_INJECT_MODE = 7972; // 2 +const static uint64_t SH_FLD_INJECT_MODE_LEN = 7973; // 2 +const static uint64_t SH_FLD_INJECT_TYPE = 7974; // 2 +const static uint64_t SH_FLD_INJECT_TYPE_LEN = 7975; // 2 +const static uint64_t SH_FLD_INJ_LEN = 7976; // 1 +const static uint64_t SH_FLD_INOP = 7977; // 43 +const static uint64_t SH_FLD_INOP_FORCE_SG = 7978; // 43 +const static uint64_t SH_FLD_INOP_LEN = 7979; // 43 +const static uint64_t SH_FLD_INOP_WAIT = 7980; // 43 +const static uint64_t SH_FLD_INOP_WAIT_LEN = 7981; // 43 +const static uint64_t SH_FLD_INPROG_WR_ERR = 7982; // 1 +const static uint64_t SH_FLD_INRD_DONE_ERR = 7983; // 1 +const static uint64_t SH_FLD_INSTANT_CACHE_VDM_DATA = 7984; // 12 +const static uint64_t SH_FLD_INSTANT_CACHE_VDM_DATA_LEN = 7985; // 12 +const static uint64_t SH_FLD_INSTANT_CORE0_VDM_DATA = 7986; // 12 +const static uint64_t SH_FLD_INSTANT_CORE0_VDM_DATA_LEN = 7987; // 12 +const static uint64_t SH_FLD_INSTANT_CORE1_VDM_DATA = 7988; // 12 +const static uint64_t SH_FLD_INSTANT_CORE1_VDM_DATA_LEN = 7989; // 12 +const static uint64_t SH_FLD_INSTANT_CORE2_VDM_DATA = 7990; // 12 +const static uint64_t SH_FLD_INSTANT_CORE2_VDM_DATA_LEN = 7991; // 12 +const static uint64_t SH_FLD_INSTANT_CORE3_VDM_DATA = 7992; // 12 +const static uint64_t SH_FLD_INSTANT_CORE3_VDM_DATA_LEN = 7993; // 12 +const static uint64_t SH_FLD_INSTANT_VDM_CONTROL_SUMMARY = 7994; // 12 +const static uint64_t SH_FLD_INSTANT_VDM_CONTROL_SUMMARY_LEN = 7995; // 12 +const static uint64_t SH_FLD_INSTR0_BUSYCNT_RUNNING = 7996; // 1 +const static uint64_t SH_FLD_INSTR0_CYCLECNT_RUNNING = 7997; // 1 +const static uint64_t SH_FLD_INSTR0_MODE = 7998; // 1 +const static uint64_t SH_FLD_INSTR0_MODE_LEN = 7999; // 1 +const static uint64_t SH_FLD_INSTR0_RESET = 8000; // 1 +const static uint64_t SH_FLD_INSTR0_START = 8001; // 1 +const static uint64_t SH_FLD_INSTR0_STOP = 8002; // 1 +const static uint64_t SH_FLD_INSTR0_STOPPED_ON_ERROR = 8003; // 1 +const static uint64_t SH_FLD_INSTR0_STOP_ON_ERROR_GT = 8004; // 1 +const static uint64_t SH_FLD_INSTR0_STOP_ON_ERROR_GT_LEN = 8005; // 1 +const static uint64_t SH_FLD_INSTR0_STOP_TIMER_EN = 8006; // 1 +const static uint64_t SH_FLD_INSTR1_BUSYCNT_RUNNING = 8007; // 1 +const static uint64_t SH_FLD_INSTR1_CYCLECNT_RUNNING = 8008; // 1 +const static uint64_t SH_FLD_INSTR1_MODE = 8009; // 1 +const static uint64_t SH_FLD_INSTR1_MODE_LEN = 8010; // 1 +const static uint64_t SH_FLD_INSTR1_RESET = 8011; // 1 +const static uint64_t SH_FLD_INSTR1_START = 8012; // 1 +const static uint64_t SH_FLD_INSTR1_STOP = 8013; // 1 +const static uint64_t SH_FLD_INSTR1_STOPPED_ON_ERROR = 8014; // 1 +const static uint64_t SH_FLD_INSTR1_STOP_ON_ERROR_GT = 8015; // 1 +const static uint64_t SH_FLD_INSTR1_STOP_ON_ERROR_GT_LEN = 8016; // 1 +const static uint64_t SH_FLD_INSTR1_STOP_TIMER_EN = 8017; // 1 +const static uint64_t SH_FLD_INSTR2_BUSYCNT_RUNNING = 8018; // 1 +const static uint64_t SH_FLD_INSTR2_CYCLECNT_RUNNING = 8019; // 1 +const static uint64_t SH_FLD_INSTR2_MODE = 8020; // 1 +const static uint64_t SH_FLD_INSTR2_MODE_LEN = 8021; // 1 +const static uint64_t SH_FLD_INSTR2_RESET = 8022; // 1 +const static uint64_t SH_FLD_INSTR2_START = 8023; // 1 +const static uint64_t SH_FLD_INSTR2_STOP = 8024; // 1 +const static uint64_t SH_FLD_INSTR2_STOPPED_ON_ERROR = 8025; // 1 +const static uint64_t SH_FLD_INSTR2_STOP_ON_ERROR_GT = 8026; // 1 +const static uint64_t SH_FLD_INSTR2_STOP_ON_ERROR_GT_LEN = 8027; // 1 +const static uint64_t SH_FLD_INSTR2_STOP_TIMER_EN = 8028; // 1 +const static uint64_t SH_FLD_INST_CYCLE_SAMPLE = 8029; // 12 +const static uint64_t SH_FLD_INST_CYCLE_SAMPLE_LEN = 8030; // 12 +const static uint64_t SH_FLD_INT = 8031; // 1 +const static uint64_t SH_FLD_INTERMITTENT_CE_COUNT = 8032; // 2 +const static uint64_t SH_FLD_INTERMITTENT_CE_COUNT_LEN = 8033; // 2 +const static uint64_t SH_FLD_INTERMITTENT_MCE_COUNT = 8034; // 2 +const static uint64_t SH_FLD_INTERMITTENT_MCE_COUNT_LEN = 8035; // 2 +const static uint64_t SH_FLD_INTERNAL_ERR = 8036; // 1 +const static uint64_t SH_FLD_INTERNAL_ERROR = 8037; // 4 +const static uint64_t SH_FLD_INTERNAL_ERR_MASK = 8038; // 1 +const static uint64_t SH_FLD_INTERNAL_FSM_ERROR = 8039; // 10 +const static uint64_t SH_FLD_INTERNAL_SCOM_ERROR = 8040; // 40 +const static uint64_t SH_FLD_INTERNAL_SCOM_ERROR_CLONE = 8041; // 16 +const static uint64_t SH_FLD_INTERNAL_SCOM_ERROR_COPY = 8042; // 24 +const static uint64_t SH_FLD_INTERNAL_STATE_VECTOR = 8043; // 1 +const static uint64_t SH_FLD_INTERNAL_STATE_VECTOR_LEN = 8044; // 1 +const static uint64_t SH_FLD_INTERRUPT0_ADDRESS_ERROR = 8045; // 4 +const static uint64_t SH_FLD_INTERRUPT1 = 8046; // 1 +const static uint64_t SH_FLD_INTERRUPT1_ADDRESS_ERROR = 8047; // 4 +const static uint64_t SH_FLD_INTERRUPT1_LEN = 8048; // 1 +const static uint64_t SH_FLD_INTERRUPT2 = 8049; // 2 +const static uint64_t SH_FLD_INTERRUPT2_ADDRESS_ERROR = 8050; // 4 +const static uint64_t SH_FLD_INTERRUPT2_LEN = 8051; // 2 +const static uint64_t SH_FLD_INTERRUPT3 = 8052; // 2 +const static uint64_t SH_FLD_INTERRUPT3_ADDRESS_ERROR = 8053; // 4 +const static uint64_t SH_FLD_INTERRUPT3_LEN = 8054; // 2 +const static uint64_t SH_FLD_INTERRUPT4 = 8055; // 2 +const static uint64_t SH_FLD_INTERRUPT4_ADDRESS_ERROR = 8056; // 4 +const static uint64_t SH_FLD_INTERRUPT4_LEN = 8057; // 2 +const static uint64_t SH_FLD_INTERRUPT5_ADDRESS_ERROR = 8058; // 4 +const static uint64_t SH_FLD_INTERRUPT_00 = 8059; // 1 +const static uint64_t SH_FLD_INTERRUPT_01 = 8060; // 1 +const static uint64_t SH_FLD_INTERRUPT_02 = 8061; // 1 +const static uint64_t SH_FLD_INTERRUPT_03 = 8062; // 1 +const static uint64_t SH_FLD_INTERRUPT_04 = 8063; // 1 +const static uint64_t SH_FLD_INTERRUPT_05 = 8064; // 1 +const static uint64_t SH_FLD_INTERRUPT_06 = 8065; // 1 +const static uint64_t SH_FLD_INTERRUPT_07 = 8066; // 1 +const static uint64_t SH_FLD_INTERRUPT_08 = 8067; // 1 +const static uint64_t SH_FLD_INTERRUPT_09 = 8068; // 1 +const static uint64_t SH_FLD_INTERRUPT_10 = 8069; // 1 +const static uint64_t SH_FLD_INTERRUPT_11 = 8070; // 1 +const static uint64_t SH_FLD_INTERRUPT_12 = 8071; // 1 +const static uint64_t SH_FLD_INTERRUPT_CHANGE_WHILE_ACTIVE = 8072; // 4 +const static uint64_t SH_FLD_INTERRUPT_CONDITION_PENDING = 8073; // 1 +const static uint64_t SH_FLD_INTERRUPT_DISABLE = 8074; // 1 +const static uint64_t SH_FLD_INTERRUPT_DISABLE_LEN = 8075; // 1 +const static uint64_t SH_FLD_INTERRUPT_EDGE_POL_N = 8076; // 2 +const static uint64_t SH_FLD_INTERRUPT_EDGE_POL_N_LEN = 8077; // 2 +const static uint64_t SH_FLD_INTERRUPT_ENABLE = 8078; // 2 +const static uint64_t SH_FLD_INTERRUPT_ENABLED = 8079; // 1 +const static uint64_t SH_FLD_INTERRUPT_FROM_ERROR = 8080; // 4 +const static uint64_t SH_FLD_INTERRUPT_FROM_FSP = 8081; // 4 +const static uint64_t SH_FLD_INTERRUPT_INPUT = 8082; // 12 +const static uint64_t SH_FLD_INTERRUPT_INPUT_LEN = 8083; // 12 +const static uint64_t SH_FLD_INTERRUPT_MASK = 8084; // 12 +const static uint64_t SH_FLD_INTERRUPT_MASK_LEN = 8085; // 12 +const static uint64_t SH_FLD_INTERRUPT_MASK_N = 8086; // 2 +const static uint64_t SH_FLD_INTERRUPT_MASK_N_LEN = 8087; // 2 +const static uint64_t SH_FLD_INTERRUPT_POLARITY = 8088; // 12 +const static uint64_t SH_FLD_INTERRUPT_POLARITY_LEN = 8089; // 12 +const static uint64_t SH_FLD_INTERRUPT_ROUTE_A_N = 8090; // 6 +const static uint64_t SH_FLD_INTERRUPT_ROUTE_A_N_LEN = 8091; // 6 +const static uint64_t SH_FLD_INTERRUPT_S0 = 8092; // 1 +const static uint64_t SH_FLD_INTERRUPT_S1 = 8093; // 1 +const static uint64_t SH_FLD_INTERRUPT_SENT = 8094; // 1 +const static uint64_t SH_FLD_INTERRUPT_TYPE = 8095; // 12 +const static uint64_t SH_FLD_INTERRUPT_TYPE_LEN = 8096; // 12 +const static uint64_t SH_FLD_INTERRUPT_TYPE_N = 8097; // 2 +const static uint64_t SH_FLD_INTERRUPT_TYPE_N_LEN = 8098; // 2 +const static uint64_t SH_FLD_INTER_FRAME_DELAY = 8099; // 1 +const static uint64_t SH_FLD_INTER_FRAME_DELAY_LEN = 8100; // 1 +const static uint64_t SH_FLD_INTQ_FSM_PERR = 8101; // 1 +const static uint64_t SH_FLD_INTQ_OVERFLOW = 8102; // 1 +const static uint64_t SH_FLD_INTR0 = 8103; // 5 +const static uint64_t SH_FLD_INTR1 = 8104; // 5 +const static uint64_t SH_FLD_INTR_GRANTED = 8105; // 30 +const static uint64_t SH_FLD_INT_0 = 8106; // 2 +const static uint64_t SH_FLD_INT_0_LEN = 8107; // 2 +const static uint64_t SH_FLD_INT_1 = 8108; // 2 +const static uint64_t SH_FLD_INT_1_LEN = 8109; // 2 +const static uint64_t SH_FLD_INT_2 = 8110; // 2 +const static uint64_t SH_FLD_INT_2_LEN = 8111; // 2 +const static uint64_t SH_FLD_INT_3 = 8112; // 2 +const static uint64_t SH_FLD_INT_3_LEN = 8113; // 2 +const static uint64_t SH_FLD_INT_CNTR_REF = 8114; // 1 +const static uint64_t SH_FLD_INT_CNTR_REF_LEN = 8115; // 1 +const static uint64_t SH_FLD_INT_CURRENT_STATE = 8116; // 6 +const static uint64_t SH_FLD_INT_CURRENT_STATE_LEN = 8117; // 6 +const static uint64_t SH_FLD_INT_ENA = 8118; // 1 +const static uint64_t SH_FLD_INT_ENABLE_ENC = 8119; // 6 +const static uint64_t SH_FLD_INT_ENABLE_ENC_LEN = 8120; // 6 +const static uint64_t SH_FLD_INT_GOTO_STATE = 8121; // 6 +const static uint64_t SH_FLD_INT_GOTO_STATE_LEN = 8122; // 6 +const static uint64_t SH_FLD_INT_LEN = 8123; // 1 +const static uint64_t SH_FLD_INT_MODE = 8124; // 6 +const static uint64_t SH_FLD_INT_MODE_LEN = 8125; // 6 +const static uint64_t SH_FLD_INT_NCE_ETE_ATTN = 8126; // 10 +const static uint64_t SH_FLD_INT_NEXT_STATE = 8127; // 6 +const static uint64_t SH_FLD_INT_NEXT_STATE_LEN = 8128; // 6 +const static uint64_t SH_FLD_INT_RETURN_STATE = 8129; // 6 +const static uint64_t SH_FLD_INT_RETURN_STATE_LEN = 8130; // 6 +const static uint64_t SH_FLD_INT_RX_FSM = 8131; // 43 +const static uint64_t SH_FLD_INT_STATE_ERR = 8132; // 1 +const static uint64_t SH_FLD_INT_TX_FSM = 8133; // 43 +const static uint64_t SH_FLD_INT_TYPE = 8134; // 43 +const static uint64_t SH_FLD_INVALIDATE_ADDRESS = 8135; // 1 +const static uint64_t SH_FLD_INVALIDATE_ADDRESS_LEN = 8136; // 1 +const static uint64_t SH_FLD_INVALIDATE_ALL = 8137; // 1 +const static uint64_t SH_FLD_INVALIDATE_ONE = 8138; // 1 +const static uint64_t SH_FLD_INVALIDATE_PE_NUMBER = 8139; // 1 +const static uint64_t SH_FLD_INVALIDATE_PE_NUMBER_LEN = 8140; // 1 +const static uint64_t SH_FLD_INVALIDCRESP = 8141; // 9 +const static uint64_t SH_FLD_INVALIDCRESP_MASK = 8142; // 9 +const static uint64_t SH_FLD_INVALID_ADDRESS = 8143; // 12 +const static uint64_t SH_FLD_INVALID_ADDRESS_ALIGNMENT = 8144; // 4 +const static uint64_t SH_FLD_INVALID_ADDRESS_MASK = 8145; // 8 +const static uint64_t SH_FLD_INVALID_CMD_0 = 8146; // 2 +const static uint64_t SH_FLD_INVALID_CMD_1 = 8147; // 2 +const static uint64_t SH_FLD_INVALID_CMD_2 = 8148; // 2 +const static uint64_t SH_FLD_INVALID_CMD_3 = 8149; // 2 +const static uint64_t SH_FLD_INVALID_COMMAND = 8150; // 4 +const static uint64_t SH_FLD_INVALID_CRESP = 8151; // 4 +const static uint64_t SH_FLD_INVALID_CRESP_ERR = 8152; // 1 +const static uint64_t SH_FLD_INVALID_CRESP_ERROR = 8153; // 2 +const static uint64_t SH_FLD_INVALID_MAINT_ADDRESS = 8154; // 10 +const static uint64_t SH_FLD_INVALID_REQTYPE = 8155; // 16 +const static uint64_t SH_FLD_INVALID_REQTYPE_ERR_MASK = 8156; // 8 +const static uint64_t SH_FLD_INVALID_REQTYPE_LEN = 8157; // 8 +const static uint64_t SH_FLD_INVALID_REQ_SOURCE = 8158; // 8 +const static uint64_t SH_FLD_INVALID_REQ_SOURCE_LEN = 8159; // 8 +const static uint64_t SH_FLD_INVALID_STATE_RECOV = 8160; // 1 +const static uint64_t SH_FLD_INVALID_STATE_UNRECOV = 8161; // 1 +const static uint64_t SH_FLD_INVALID_TRANSFER_SIZE = 8162; // 4 +const static uint64_t SH_FLD_INVALID_TTYPE = 8163; // 4 +const static uint64_t SH_FLD_INVAL_IODA_TBL_SEL_ESR = 8164; // 1 +const static uint64_t SH_FLD_INVLD_CMD_ERR = 8165; // 1 +const static uint64_t SH_FLD_INVLD_PRGM_ERR = 8166; // 1 +const static uint64_t SH_FLD_INV_PROT_ERR_CHK_DIS = 8167; // 1 +const static uint64_t SH_FLD_INV_SINGLE_THREAD_EN = 8168; // 1 +const static uint64_t SH_FLD_INV_TIMEOUT_CHK_DIS = 8169; // 1 +const static uint64_t SH_FLD_IN_BAD_OP_ERR = 8170; // 2 +const static uint64_t SH_FLD_IN_CERR_BITS = 8171; // 1 +const static uint64_t SH_FLD_IN_CERR_BITS_LEN = 8172; // 1 +const static uint64_t SH_FLD_IN_CERR_RESET = 8173; // 1 +const static uint64_t SH_FLD_IN_COUNT1 = 8174; // 1 +const static uint64_t SH_FLD_IN_COUNT1_LEN = 8175; // 1 +const static uint64_t SH_FLD_IN_COUNT2 = 8176; // 1 +const static uint64_t SH_FLD_IN_COUNT2_LEN = 8177; // 1 +const static uint64_t SH_FLD_IN_DELAY1 = 8178; // 1 +const static uint64_t SH_FLD_IN_DELAY1_LEN = 8179; // 1 +const static uint64_t SH_FLD_IN_DELAY2 = 8180; // 1 +const static uint64_t SH_FLD_IN_DELAY2_LEN = 8181; // 1 +const static uint64_t SH_FLD_IN_ECC_CE_ERROR = 8182; // 2 +const static uint64_t SH_FLD_IN_ECC_SUE_ERROR = 8183; // 2 +const static uint64_t SH_FLD_IN_ECC_UE_ERROR = 8184; // 2 +const static uint64_t SH_FLD_IN_LEN = 8185; // 131 +const static uint64_t SH_FLD_IN_LOGIC_HW_ERROR = 8186; // 2 +const static uint64_t SH_FLD_IN_MASTER_MODE = 8187; // 43 +const static uint64_t SH_FLD_IN_PARITY_ERROR = 8188; // 2 +const static uint64_t SH_FLD_IN_PROG = 8189; // 1 +const static uint64_t SH_FLD_IN_PROG_LEN = 8190; // 1 +const static uint64_t SH_FLD_IN_SEQ_ERR = 8191; // 2 +const static uint64_t SH_FLD_IN_SEQ_PERR = 8192; // 2 +const static uint64_t SH_FLD_IN_SLAVE_MODE = 8193; // 43 +const static uint64_t SH_FLD_IN_SNP_ADDR_PERR = 8194; // 2 +const static uint64_t SH_FLD_IN_SNP_TTAG_PERR = 8195; // 2 +const static uint64_t SH_FLD_IN_SW_CAST_ERROR = 8196; // 2 +const static uint64_t SH_FLD_IN_TIMEOUT = 8197; // 2 +const static uint64_t SH_FLD_IN_TRACE_GROUP_SEL_HI = 8198; // 1 +const static uint64_t SH_FLD_IN_TRACE_GROUP_SEL_HI_LEN = 8199; // 1 +const static uint64_t SH_FLD_IN_TRACE_GROUP_SEL_LO = 8200; // 1 +const static uint64_t SH_FLD_IN_TRACE_GROUP_SEL_LO_LEN = 8201; // 1 +const static uint64_t SH_FLD_IN_TRACE_TRIGGER_SEL_01 = 8202; // 1 +const static uint64_t SH_FLD_IN_TRACE_TRIGGER_SEL_01_LEN = 8203; // 1 +const static uint64_t SH_FLD_IN_TRACE_TRIGGER_SEL_23 = 8204; // 1 +const static uint64_t SH_FLD_IN_TRACE_TRIGGER_SEL_23_LEN = 8205; // 1 +const static uint64_t SH_FLD_IODA_ADDR_PERR_ESR = 8206; // 1 +const static uint64_t SH_FLD_IOE01_IS_LOGICAL_PAIR = 8207; // 1 +const static uint64_t SH_FLD_IOE23_IS_LOGICAL_PAIR = 8208; // 1 +const static uint64_t SH_FLD_IOE45_IS_LOGICAL_PAIR = 8209; // 1 +const static uint64_t SH_FLD_IOO01_IS_LOGICAL_PAIR = 8210; // 1 +const static uint64_t SH_FLD_IOO23_IS_LOGICAL_PAIR = 8211; // 1 +const static uint64_t SH_FLD_IOO45_IS_LOGICAL_PAIR = 8212; // 1 +const static uint64_t SH_FLD_IOO67_IS_LOGICAL_PAIR = 8213; // 1 +const static uint64_t SH_FLD_IORESET = 8214; // 96 +const static uint64_t SH_FLD_IORESET_HARD_BUS0 = 8215; // 4 +const static uint64_t SH_FLD_IORESET_HARD_BUS0_LEN = 8216; // 4 +const static uint64_t SH_FLD_IOVALID = 8217; // 1 +const static uint64_t SH_FLD_IOVALID_10D = 8218; // 35 +const static uint64_t SH_FLD_IOVALID_11D = 8219; // 35 +const static uint64_t SH_FLD_IOVALID_4D = 8220; // 31 +const static uint64_t SH_FLD_IOVALID_5D = 8221; // 32 +const static uint64_t SH_FLD_IOVALID_6D = 8222; // 35 +const static uint64_t SH_FLD_IOVALID_7D = 8223; // 35 +const static uint64_t SH_FLD_IOVALID_8D = 8224; // 35 +const static uint64_t SH_FLD_IOVALID_9D = 8225; // 35 +const static uint64_t SH_FLD_IP = 8226; // 4 +const static uint64_t SH_FLD_IPI = 8227; // 1 +const static uint64_t SH_FLD_IPI0_HI_PRIORITY = 8228; // 1 +const static uint64_t SH_FLD_IPI0_LO_PRIORITY = 8229; // 1 +const static uint64_t SH_FLD_IPI1_HI_PRIORITY = 8230; // 1 +const static uint64_t SH_FLD_IPI1_LO_PRIORITY = 8231; // 1 +const static uint64_t SH_FLD_IPI2_HI_PRIORITY = 8232; // 1 +const static uint64_t SH_FLD_IPI2_LO_PRIORITY = 8233; // 1 +const static uint64_t SH_FLD_IPI3_HI_PRIORITY = 8234; // 1 +const static uint64_t SH_FLD_IPI3_LO_PRIORITY = 8235; // 1 +const static uint64_t SH_FLD_IPI4_HI_PRIORITY = 8236; // 1 +const static uint64_t SH_FLD_IPI4_LO_PRIORITY = 8237; // 1 +const static uint64_t SH_FLD_IPI_LEN = 8238; // 1 +const static uint64_t SH_FLD_IPI_PRIORITY = 8239; // 1 +const static uint64_t SH_FLD_IPI_PRIORITY_LEN = 8240; // 1 +const static uint64_t SH_FLD_IPI_RSD = 8241; // 1 +const static uint64_t SH_FLD_IPI_RSD_LEN = 8242; // 1 +const static uint64_t SH_FLD_IPOLL_0 = 8243; // 1 +const static uint64_t SH_FLD_IPOLL_1 = 8244; // 1 +const static uint64_t SH_FLD_IPOLL_2 = 8245; // 1 +const static uint64_t SH_FLD_IPOLL_3 = 8246; // 1 +const static uint64_t SH_FLD_IPOLL_4 = 8247; // 1 +const static uint64_t SH_FLD_IPOLL_5 = 8248; // 1 +const static uint64_t SH_FLD_IPW_SIDEAB_SEL = 8249; // 8 +const static uint64_t SH_FLD_IPW_WR_WR = 8250; // 8 +const static uint64_t SH_FLD_IPW_WR_WR_LEN = 8251; // 8 +const static uint64_t SH_FLD_IQHISPD_EN = 8252; // 4 +const static uint64_t SH_FLD_IR = 8253; // 21 +const static uint64_t SH_FLD_IREF_BYPASS = 8254; // 2 +const static uint64_t SH_FLD_IREF_PDWN_B = 8255; // 2 +const static uint64_t SH_FLD_IREF_RES_DAC = 8256; // 2 +const static uint64_t SH_FLD_IREF_RES_DAC_LEN = 8257; // 2 +const static uint64_t SH_FLD_IRQ = 8258; // 1 +const static uint64_t SH_FLD_IRQ_LEN = 8259; // 1 +const static uint64_t SH_FLD_IRQ_TRACE_ENABLE = 8260; // 1 +const static uint64_t SH_FLD_IR_DR_EQ0_ERR = 8261; // 1 +const static uint64_t SH_FLD_IR_LEN = 8262; // 21 +const static uint64_t SH_FLD_IS = 8263; // 8 +const static uint64_t SH_FLD_IS_ACTIVE_MASTER = 8264; // 1 +const static uint64_t SH_FLD_IS_BACKUP_MASTER = 8265; // 1 +const static uint64_t SH_FLD_IS_LEN = 8266; // 8 +const static uint64_t SH_FLD_IS_PRIMARY = 8267; // 1 +const static uint64_t SH_FLD_IS_RUNNING = 8268; // 2 +const static uint64_t SH_FLD_IS_SECONDARY = 8269; // 1 +const static uint64_t SH_FLD_IS_SLAVE = 8270; // 1 +const static uint64_t SH_FLD_IS_SPECIAL = 8271; // 1 +const static uint64_t SH_FLD_ITUNE = 8272; // 4 +const static uint64_t SH_FLD_ITUNE_LEN = 8273; // 4 +const static uint64_t SH_FLD_IVC = 8274; // 1 +const static uint64_t SH_FLD_IVC_INTF_DISABLE = 8275; // 6 +const static uint64_t SH_FLD_IVC_LEN = 8276; // 1 +const static uint64_t SH_FLD_IVPR = 8277; // 5 +const static uint64_t SH_FLD_IVPR_LEN = 8278; // 5 +const static uint64_t SH_FLD_IVRM_BYPASS_B = 8279; // 30 +const static uint64_t SH_FLD_IVRM_IVID = 8280; // 30 +const static uint64_t SH_FLD_IVRM_IVID_LEN = 8281; // 30 +const static uint64_t SH_FLD_IVRM_LOCAL_CONTROL = 8282; // 24 +const static uint64_t SH_FLD_IVRM_PFET_STRENGTH_CACHE = 8283; // 30 +const static uint64_t SH_FLD_IVRM_PFET_STRENGTH_CACHE_LEN = 8284; // 30 +const static uint64_t SH_FLD_IVRM_PFET_STRENGTH_CORE = 8285; // 30 +const static uint64_t SH_FLD_IVRM_PFET_STRENGTH_CORE_LEN = 8286; // 30 +const static uint64_t SH_FLD_IVRM_POWERON = 8287; // 30 +const static uint64_t SH_FLD_IVRM_PVREF_ERROR = 8288; // 1 +const static uint64_t SH_FLD_IVRM_UREG_TEST_EN = 8289; // 24 +const static uint64_t SH_FLD_IVRM_UREG_TEST_ID = 8290; // 24 +const static uint64_t SH_FLD_IVRM_UREG_TEST_ID_LEN = 8291; // 24 +const static uint64_t SH_FLD_IVRM_VID_DONE = 8292; // 30 +const static uint64_t SH_FLD_IVRM_VID_VALID = 8293; // 30 +const static uint64_t SH_FLD_IVRM_VREG_SLOW_DC = 8294; // 30 +const static uint64_t SH_FLD_I_DELAY_ADJUST_RATIO = 8295; // 1 +const static uint64_t SH_FLD_I_DELAY_ADJUST_RATIO_LEN = 8296; // 1 +const static uint64_t SH_FLD_I_PATH_CORE_SYNC_PERIOD_SELECT = 8297; // 1 +const static uint64_t SH_FLD_I_PATH_CORE_SYNC_PERIOD_SELECT_LEN = 8298; // 1 +const static uint64_t SH_FLD_I_PATH_DELAY_ADJUST = 8299; // 1 +const static uint64_t SH_FLD_I_PATH_DELAY_STEP_CHECK_PARITY = 8300; // 4 +const static uint64_t SH_FLD_I_PATH_DELAY_TWOS_COMPL_LOAD = 8301; // 1 +const static uint64_t SH_FLD_I_PATH_DELAY_TWOS_COMPL_LOAD_VALUE = 8302; // 1 +const static uint64_t SH_FLD_I_PATH_DELAY_TWOS_COMPL_LOAD_VALUE_LEN = 8303; // 1 +const static uint64_t SH_FLD_I_PATH_DELAY_VALUE = 8304; // 2 +const static uint64_t SH_FLD_I_PATH_DELAY_VALUE_LEN = 8305; // 2 +const static uint64_t SH_FLD_I_PATH_FSM_STATE_PARITY = 8306; // 4 +const static uint64_t SH_FLD_I_PATH_STATE = 8307; // 1 +const static uint64_t SH_FLD_I_PATH_STATE_LEN = 8308; // 1 +const static uint64_t SH_FLD_I_PATH_STEP_CHECK = 8309; // 4 +const static uint64_t SH_FLD_I_PATH_STEP_CHECK_CPS_DEVIATION_X_DISABLE = 8310; // 1 +const static uint64_t SH_FLD_I_PATH_STEP_CHECK_VALID = 8311; // 1 +const static uint64_t SH_FLD_I_PATH_SYNC_CHECK = 8312; // 4 +const static uint64_t SH_FLD_I_PATH_SYNC_CHECK_DISABLE = 8313; // 1 +const static uint64_t SH_FLD_I_PATH_TIME_OVERFLOW = 8314; // 3 +const static uint64_t SH_FLD_I_PATH_TIME_OVERFLOW_CORE_INTERRUPT = 8315; // 1 +const static uint64_t SH_FLD_I_PATH_TIME_PARITY = 8316; // 4 +const static uint64_t SH_FLD_JITTER_EPSILON = 8317; // 8 +const static uint64_t SH_FLD_JITTER_EPSILON_LEN = 8318; // 8 +const static uint64_t SH_FLD_JTAG_INPROG = 8319; // 1 +const static uint64_t SH_FLD_JTAG_INSTR = 8320; // 1 +const static uint64_t SH_FLD_JTAG_INSTR_LEN = 8321; // 1 +const static uint64_t SH_FLD_JTAG_SRC_SEL = 8322; // 1 +const static uint64_t SH_FLD_JTAG_TDI = 8323; // 1 +const static uint64_t SH_FLD_JTAG_TDI_LEN = 8324; // 1 +const static uint64_t SH_FLD_JTAG_TDO = 8325; // 1 +const static uint64_t SH_FLD_JTAG_TDO_LEN = 8326; // 1 +const static uint64_t SH_FLD_JTAG_TRST_B = 8327; // 1 +const static uint64_t SH_FLD_KEEP_EDRAM_ENABLED_ON = 8328; // 129 +const static uint64_t SH_FLD_KEEP_MS_MODE = 8329; // 43 +const static uint64_t SH_FLD_L = 8330; // 8 +const static uint64_t SH_FLD_L2 = 8331; // 12 +const static uint64_t SH_FLD_L2_CORE_INTF_QUIESCE_C0 = 8332; // 12 +const static uint64_t SH_FLD_L2_CORE_INTF_QUIESCE_C1 = 8333; // 12 +const static uint64_t SH_FLD_L2_EX0_CLKGLM_ASYNC_RESET = 8334; // 6 +const static uint64_t SH_FLD_L2_EX0_CLKGLM_SEL = 8335; // 6 +const static uint64_t SH_FLD_L2_EX0_CLK_SB_PULSE_MODE = 8336; // 6 +const static uint64_t SH_FLD_L2_EX0_CLK_SB_PULSE_MODE_EN = 8337; // 6 +const static uint64_t SH_FLD_L2_EX0_CLK_SB_PULSE_MODE_LEN = 8338; // 6 +const static uint64_t SH_FLD_L2_EX0_CLK_SB_SPARE0 = 8339; // 6 +const static uint64_t SH_FLD_L2_EX0_CLK_SB_STRENGTH = 8340; // 6 +const static uint64_t SH_FLD_L2_EX0_CLK_SB_STRENGTH_LEN = 8341; // 6 +const static uint64_t SH_FLD_L2_EX0_CLK_SW_RESCLK = 8342; // 6 +const static uint64_t SH_FLD_L2_EX0_CLK_SW_RESCLK_LEN = 8343; // 6 +const static uint64_t SH_FLD_L2_EX0_CLK_SW_SPARE1 = 8344; // 6 +const static uint64_t SH_FLD_L2_EX0_CLK_SYNC = 8345; // 6 +const static uint64_t SH_FLD_L2_EX0_CLK_SYNC_DONE = 8346; // 6 +const static uint64_t SH_FLD_L2_EX0_CLK_SYNC_ENABLE = 8347; // 6 +const static uint64_t SH_FLD_L2_EX1_CLKGLM_ASYNC_RESET = 8348; // 6 +const static uint64_t SH_FLD_L2_EX1_CLKGLM_SEL = 8349; // 6 +const static uint64_t SH_FLD_L2_EX1_CLK_SB_PULSE_MODE = 8350; // 6 +const static uint64_t SH_FLD_L2_EX1_CLK_SB_PULSE_MODE_EN = 8351; // 6 +const static uint64_t SH_FLD_L2_EX1_CLK_SB_PULSE_MODE_LEN = 8352; // 6 +const static uint64_t SH_FLD_L2_EX1_CLK_SB_SPARE0 = 8353; // 6 +const static uint64_t SH_FLD_L2_EX1_CLK_SB_STRENGTH = 8354; // 6 +const static uint64_t SH_FLD_L2_EX1_CLK_SB_STRENGTH_LEN = 8355; // 6 +const static uint64_t SH_FLD_L2_EX1_CLK_SW_RESCLK = 8356; // 6 +const static uint64_t SH_FLD_L2_EX1_CLK_SW_RESCLK_LEN = 8357; // 6 +const static uint64_t SH_FLD_L2_EX1_CLK_SW_SPARE1 = 8358; // 6 +const static uint64_t SH_FLD_L2_EX1_CLK_SYNC = 8359; // 6 +const static uint64_t SH_FLD_L2_EX1_CLK_SYNC_DONE = 8360; // 6 +const static uint64_t SH_FLD_L2_EX1_CLK_SYNC_ENABLE = 8361; // 6 +const static uint64_t SH_FLD_L2_LEN = 8362; // 12 +const static uint64_t SH_FLD_L2_PURGE = 8363; // 12 +const static uint64_t SH_FLD_L2_PURGE_ABORT = 8364; // 12 +const static uint64_t SH_FLD_L2_PURGE_DONE = 8365; // 24 +const static uint64_t SH_FLD_L2_STEP_MODE = 8366; // 12 +const static uint64_t SH_FLD_L2_STEP_MODE_LEN = 8367; // 12 +const static uint64_t SH_FLD_L2_STOPPED = 8368; // 1 +const static uint64_t SH_FLD_L2_STOPPED_LEN = 8369; // 1 +const static uint64_t SH_FLD_L3 = 8370; // 36 +const static uint64_t SH_FLD_L3CERRS_CFG_DCACHE_CAPP = 8371; // 12 +const static uint64_t SH_FLD_L3CERRS_LCO_RETRY_THROTL_DIS = 8372; // 12 +const static uint64_t SH_FLD_L3CICTL_CI_OVERRUN_CK_ERR = 8373; // 12 +const static uint64_t SH_FLD_L3CORTR_NO_LCO_TGTS_ERR = 8374; // 12 +const static uint64_t SH_FLD_L3L2CTL_PF_OVERRUN_CK_ERR = 8375; // 12 +const static uint64_t SH_FLD_L3L2CTL_RD_OVERRUN_CK_ERR = 8376; // 12 +const static uint64_t SH_FLD_L3PBEXCA0_OVERFLOW_ERR = 8377; // 12 +const static uint64_t SH_FLD_L3PBEXCA0_UNDERFLOW_ERR = 8378; // 12 +const static uint64_t SH_FLD_L3PBEXCA1_OVERFLOW_ERR = 8379; // 12 +const static uint64_t SH_FLD_L3PBEXCA1_UNDERFLOW_ERR = 8380; // 12 +const static uint64_t SH_FLD_L3SDRTL0_CACHE_INHIBIT_ERR = 8381; // 12 +const static uint64_t SH_FLD_L3SDRTL0_CHECKSTOP_ERR = 8382; // 12 +const static uint64_t SH_FLD_L3SDRTL1_CACHE_INHIBIT_ERR = 8383; // 12 +const static uint64_t SH_FLD_L3SDRTL1_CHECKSTOP_ERR = 8384; // 12 +const static uint64_t SH_FLD_L3XMEMA0_CRW_DIR_HIT_ERR = 8385; // 12 +const static uint64_t SH_FLD_L3XMEMA0_DW_DIR_HIT_ERR = 8386; // 12 +const static uint64_t SH_FLD_L3XMEMA1_CRW_DIR_HIT_ERR = 8387; // 12 +const static uint64_t SH_FLD_L3XMEMA1_DW_DIR_HIT_ERR = 8388; // 12 +const static uint64_t SH_FLD_L3_1ST_BEAT_SYNDROME = 8389; // 12 +const static uint64_t SH_FLD_L3_1ST_BEAT_SYNDROME_LEN = 8390; // 12 +const static uint64_t SH_FLD_L3_1ST_BEAT_UE = 8391; // 12 +const static uint64_t SH_FLD_L3_2ND_BEAT_SYNDROME = 8392; // 12 +const static uint64_t SH_FLD_L3_2ND_BEAT_SYNDROME_LEN = 8393; // 12 +const static uint64_t SH_FLD_L3_2ND_BEAT_UE = 8394; // 12 +const static uint64_t SH_FLD_L3_ABORT = 8395; // 12 +const static uint64_t SH_FLD_L3_ADDR_HANG_DETECTED = 8396; // 12 +const static uint64_t SH_FLD_L3_ADDR_HASH_EN_CFG = 8397; // 12 +const static uint64_t SH_FLD_L3_ALL_MEMBERS_DELETED_ERROR = 8398; // 12 +const static uint64_t SH_FLD_L3_BANK = 8399; // 12 +const static uint64_t SH_FLD_L3_BANK_LEN = 8400; // 12 +const static uint64_t SH_FLD_L3_BUSY_ERR = 8401; // 36 +const static uint64_t SH_FLD_L3_CAC_RD_CE_DET_NOT_LINDEL_REQ = 8402; // 12 +const static uint64_t SH_FLD_L3_CAC_RD_SUE_DET = 8403; // 12 +const static uint64_t SH_FLD_L3_CAC_RD_UE_DET = 8404; // 12 +const static uint64_t SH_FLD_L3_CAC_TYPE = 8405; // 12 +const static uint64_t SH_FLD_L3_CAC_TYPE_LEN = 8406; // 12 +const static uint64_t SH_FLD_L3_CAC_WR_DATA_CE_FROM_L2 = 8407; // 12 +const static uint64_t SH_FLD_L3_CAC_WR_DATA_CE_FROM_PB = 8408; // 12 +const static uint64_t SH_FLD_L3_CAC_WR_DATA_SUE_FROM_L2_OR_WIHPC = 8409; // 12 +const static uint64_t SH_FLD_L3_CAC_WR_DATA_SUE_FROM_PB = 8410; // 12 +const static uint64_t SH_FLD_L3_CAC_WR_DATA_UE_FROM_L2 = 8411; // 12 +const static uint64_t SH_FLD_L3_CAC_WR_DATA_UE_FROM_PB = 8412; // 12 +const static uint64_t SH_FLD_L3_CFG = 8413; // 24 +const static uint64_t SH_FLD_L3_CFG_LEN = 8414; // 12 +const static uint64_t SH_FLD_L3_CLK_SB_PULSE_MODE = 8415; // 6 +const static uint64_t SH_FLD_L3_CLK_SB_PULSE_MODE_EN = 8416; // 6 +const static uint64_t SH_FLD_L3_CLK_SB_PULSE_MODE_LEN = 8417; // 6 +const static uint64_t SH_FLD_L3_CLK_SB_SPARE0 = 8418; // 6 +const static uint64_t SH_FLD_L3_CLK_SB_STRENGTH = 8419; // 6 +const static uint64_t SH_FLD_L3_CLK_SB_STRENGTH_LEN = 8420; // 6 +const static uint64_t SH_FLD_L3_COLUMN_MD_CFG = 8421; // 12 +const static uint64_t SH_FLD_L3_COLUMN_MD_CFG_LEN = 8422; // 12 +const static uint64_t SH_FLD_L3_COLUMN_SEGR_LCO_COLUMN_L2_CFG = 8423; // 12 +const static uint64_t SH_FLD_L3_COLUMN_SEGR_LCO_COLUMN_L2_CFG_LEN = 8424; // 12 +const static uint64_t SH_FLD_L3_CO_SN_CRESP_ACK_DEAD_CACR4 = 8425; // 12 +const static uint64_t SH_FLD_L3_CO_SN_CRESP_ADDR_ERR = 8426; // 12 +const static uint64_t SH_FLD_L3_CP_UTIL_EN_DC = 8427; // 12 +const static uint64_t SH_FLD_L3_CP_UTIL_EXT_SEL = 8428; // 12 +const static uint64_t SH_FLD_L3_CP_UTIL_EXT_SEL_LEN = 8429; // 12 +const static uint64_t SH_FLD_L3_CP_UTIL_SEL_DC = 8430; // 12 +const static uint64_t SH_FLD_L3_CP_UTIL_SEL_DC_LEN = 8431; // 12 +const static uint64_t SH_FLD_L3_DATA_POLL_PULSE_DIV = 8432; // 12 +const static uint64_t SH_FLD_L3_DATA_POLL_PULSE_DIV_LEN = 8433; // 12 +const static uint64_t SH_FLD_L3_DIR_ADDR = 8434; // 24 +const static uint64_t SH_FLD_L3_DIR_ADDR_LEN = 8435; // 24 +const static uint64_t SH_FLD_L3_DIR_RD_CE_DET = 8436; // 12 +const static uint64_t SH_FLD_L3_DIR_RD_PHANTOM_ERROR = 8437; // 12 +const static uint64_t SH_FLD_L3_DIR_RD_UE_DET = 8438; // 12 +const static uint64_t SH_FLD_L3_DIR_TYPE = 8439; // 12 +const static uint64_t SH_FLD_L3_DISABLED_CFG = 8440; // 12 +const static uint64_t SH_FLD_L3_DMAP_CI_EN_CFG = 8441; // 12 +const static uint64_t SH_FLD_L3_DRAM_ERROR = 8442; // 12 +const static uint64_t SH_FLD_L3_DRAM_POS_WORDLINE_FAIL = 8443; // 12 +const static uint64_t SH_FLD_L3_DW = 8444; // 12 +const static uint64_t SH_FLD_L3_DW_LEN = 8445; // 12 +const static uint64_t SH_FLD_L3_DYN_LCO_BLK_DIS_CFG = 8446; // 12 +const static uint64_t SH_FLD_L3_EDRAM_ENABLE = 8447; // 43 +const static uint64_t SH_FLD_L3_EX0_ENABLE = 8448; // 6 +const static uint64_t SH_FLD_L3_EX0_VPP_ENABLE = 8449; // 6 +const static uint64_t SH_FLD_L3_EX0_VROW_VBLH_ENABLE = 8450; // 6 +const static uint64_t SH_FLD_L3_EX0_VWL_ENABLE = 8451; // 6 +const static uint64_t SH_FLD_L3_EX1_ENABLE = 8452; // 6 +const static uint64_t SH_FLD_L3_EX1_VPP_ENABLE = 8453; // 6 +const static uint64_t SH_FLD_L3_EX1_VROW_VBLH_ENABLE = 8454; // 6 +const static uint64_t SH_FLD_L3_EX1_VWL_ENABLE = 8455; // 6 +const static uint64_t SH_FLD_L3_HANG_POLL_PULSE_DIV = 8456; // 12 +const static uint64_t SH_FLD_L3_HANG_POLL_PULSE_DIV_LEN = 8457; // 12 +const static uint64_t SH_FLD_L3_HW_CONTROL_ERR = 8458; // 12 +const static uint64_t SH_FLD_L3_IS_ECO_CFG = 8459; // 12 +const static uint64_t SH_FLD_L3_LCO_ADDR_TGT_ENABLE = 8460; // 12 +const static uint64_t SH_FLD_L3_LCO_ENABLE_CFG = 8461; // 12 +const static uint64_t SH_FLD_L3_LCO_RTY_LIMIT_DISABLE = 8462; // 12 +const static uint64_t SH_FLD_L3_LCO_TARGET_GROUP = 8463; // 12 +const static uint64_t SH_FLD_L3_LCO_TARGET_ID = 8464; // 12 +const static uint64_t SH_FLD_L3_LCO_TARGET_ID_LEN = 8465; // 12 +const static uint64_t SH_FLD_L3_LCO_TARGET_VICTIMS = 8466; // 12 +const static uint64_t SH_FLD_L3_LCO_TARGET_VICTIMS_LEN = 8467; // 12 +const static uint64_t SH_FLD_L3_LEN = 8468; // 36 +const static uint64_t SH_FLD_L3_LINE_DEL_CE_DONE = 8469; // 12 +const static uint64_t SH_FLD_L3_LINE_DEL_ON_ALL_CE = 8470; // 24 +const static uint64_t SH_FLD_L3_LINE_DEL_ON_NEXT_CE = 8471; // 24 +const static uint64_t SH_FLD_L3_LRU_ERROR = 8472; // 12 +const static uint64_t SH_FLD_L3_LRU_INVAL_CNT = 8473; // 12 +const static uint64_t SH_FLD_L3_MACH_HANG_DETECTED = 8474; // 12 +const static uint64_t SH_FLD_L3_MEMBER = 8475; // 24 +const static uint64_t SH_FLD_L3_MEMBER_LEN = 8476; // 24 +const static uint64_t SH_FLD_L3_NO_ALLOCATE_ACTIVE = 8477; // 12 +const static uint64_t SH_FLD_L3_NO_ALLOCATE_EN = 8478; // 12 +const static uint64_t SH_FLD_L3_PF_CRESP_ACK_DEAD_CACR4 = 8479; // 12 +const static uint64_t SH_FLD_L3_PF_CRESP_ADDR_ERR = 8480; // 12 +const static uint64_t SH_FLD_L3_PPE_RD_CE_DET = 8481; // 12 +const static uint64_t SH_FLD_L3_PPE_RD_SUE_DET = 8482; // 12 +const static uint64_t SH_FLD_L3_PPE_RD_UE_DET = 8483; // 12 +const static uint64_t SH_FLD_L3_RA = 8484; // 12 +const static uint64_t SH_FLD_L3_RA_LEN = 8485; // 12 +const static uint64_t SH_FLD_L3_RDSN_LINEDEL_UE_EN = 8486; // 12 +const static uint64_t SH_FLD_L3_REFRESH_TIMER_ERROR = 8487; // 12 +const static uint64_t SH_FLD_L3_REQ = 8488; // 36 +const static uint64_t SH_FLD_L3_SCOM_FENCE_LVL = 8489; // 12 +const static uint64_t SH_FLD_L3_SCOM_INIT = 8490; // 12 +const static uint64_t SH_FLD_L3_SCOM_QUIESCE_CACHE = 8491; // 12 +const static uint64_t SH_FLD_L3_SCOM_QUIESCE_CACHE_LFSR = 8492; // 12 +const static uint64_t SH_FLD_L3_SCOM_QUIESCE_REFRESH = 8493; // 12 +const static uint64_t SH_FLD_L3_SINGLE_CAC = 8494; // 12 +const static uint64_t SH_FLD_L3_SINGLE_DIR = 8495; // 12 +const static uint64_t SH_FLD_L3_SINGLE_LRU = 8496; // 12 +const static uint64_t SH_FLD_L3_SNOOP_SW_ERR_DETECTED = 8497; // 12 +const static uint64_t SH_FLD_L3_SOLID_CAC = 8498; // 12 +const static uint64_t SH_FLD_L3_SOLID_DIR = 8499; // 12 +const static uint64_t SH_FLD_L3_SOLID_LRU = 8500; // 12 +const static uint64_t SH_FLD_L3_SPARE3 = 8501; // 12 +const static uint64_t SH_FLD_L3_SPARE5 = 8502; // 12 +const static uint64_t SH_FLD_L3_SPARE7 = 8503; // 12 +const static uint64_t SH_FLD_L3_STOPPED = 8504; // 1 +const static uint64_t SH_FLD_L3_STOPPED_LEN = 8505; // 1 +const static uint64_t SH_FLD_L3_SYSMAP_SM_NOT_LG_SEL = 8506; // 12 +const static uint64_t SH_FLD_L3_TIMER_DIVIDE_MAJOR = 8507; // 12 +const static uint64_t SH_FLD_L3_TIMER_DIVIDE_MAJOR_LEN = 8508; // 12 +const static uint64_t SH_FLD_L3_TIMER_DIVIDE_MINOR = 8509; // 12 +const static uint64_t SH_FLD_L3_TIMER_DIVIDE_MINOR_LEN = 8510; // 12 +const static uint64_t SH_FLD_L3_TTYPE = 8511; // 24 +const static uint64_t SH_FLD_L3_TTYPE_LEN = 8512; // 24 +const static uint64_t SH_FLD_L3_UTIL_MON_BITS = 8513; // 12 +const static uint64_t SH_FLD_L3_UTIL_MON_BITS_LEN = 8514; // 12 +const static uint64_t SH_FLD_L3_VAL = 8515; // 12 +const static uint64_t SH_FLD_LANE0_DISABLED = 8516; // 4 +const static uint64_t SH_FLD_LANE_ANA_PDWN = 8517; // 120 +const static uint64_t SH_FLD_LANE_BAD_VEC_0_15 = 8518; // 4 +const static uint64_t SH_FLD_LANE_BAD_VEC_0_15_LEN = 8519; // 4 +const static uint64_t SH_FLD_LANE_BAD_VEC_16_23 = 8520; // 4 +const static uint64_t SH_FLD_LANE_BAD_VEC_16_23_LEN = 8521; // 4 +const static uint64_t SH_FLD_LANE_BIST_ACTVITY_DET = 8522; // 116 +const static uint64_t SH_FLD_LANE_BIST_ERR = 8523; // 116 +const static uint64_t SH_FLD_LANE_DIG_PDWN = 8524; // 120 +const static uint64_t SH_FLD_LANE_DISABLED = 8525; // 48 +const static uint64_t SH_FLD_LANE_DISABLED_VEC_0_15 = 8526; // 4 +const static uint64_t SH_FLD_LANE_DISABLED_VEC_0_15_LEN = 8527; // 4 +const static uint64_t SH_FLD_LANE_DISABLED_VEC_16_23 = 8528; // 4 +const static uint64_t SH_FLD_LANE_DISABLED_VEC_16_23_LEN = 8529; // 4 +const static uint64_t SH_FLD_LANE_INVALID = 8530; // 72 +const static uint64_t SH_FLD_LANE_INVERT = 8531; // 190 +const static uint64_t SH_FLD_LANE_PDWN = 8532; // 116 +const static uint64_t SH_FLD_LANE_QUIESCE = 8533; // 117 +const static uint64_t SH_FLD_LANE_QUIESCE_LEN = 8534; // 117 +const static uint64_t SH_FLD_LANE_SCRAMBLE_DISABLE = 8535; // 140 +const static uint64_t SH_FLD_LAST_OPCG_MODE = 8536; // 43 +const static uint64_t SH_FLD_LAST_OPCG_MODE_LEN = 8537; // 43 +const static uint64_t SH_FLD_LATE_LAUNCH_PRIMARY = 8538; // 1 +const static uint64_t SH_FLD_LATE_LAUNCH_SECONDARY = 8539; // 1 +const static uint64_t SH_FLD_LAT_THRESHA = 8540; // 8 +const static uint64_t SH_FLD_LAT_THRESHA_LEN = 8541; // 8 +const static uint64_t SH_FLD_LAT_THRESHB = 8542; // 8 +const static uint64_t SH_FLD_LAT_THRESHB_LEN = 8543; // 8 +const static uint64_t SH_FLD_LAT_THRESHC = 8544; // 8 +const static uint64_t SH_FLD_LAT_THRESHC_LEN = 8545; // 8 +const static uint64_t SH_FLD_LBIST = 8546; // 43 +const static uint64_t SH_FLD_LBIST_SKITTER_CTL = 8547; // 43 +const static uint64_t SH_FLD_LBS_IDX0_SEL = 8548; // 1 +const static uint64_t SH_FLD_LBUS_CLOCK_DIVIDER = 8549; // 2 +const static uint64_t SH_FLD_LBUS_CLOCK_DIVIDER_LEN = 8550; // 2 +const static uint64_t SH_FLD_LBUS_PARITY_ERR1_0 = 8551; // 12 +const static uint64_t SH_FLD_LBUS_PARITY_ERR1_1 = 8552; // 12 +const static uint64_t SH_FLD_LBUS_PARITY_ERR1_2 = 8553; // 12 +const static uint64_t SH_FLD_LBUS_PARITY_ERR1_3 = 8554; // 12 +const static uint64_t SH_FLD_LBUS_PARITY_ERROR_0 = 8555; // 2 +const static uint64_t SH_FLD_LBUS_PARITY_ERROR_1 = 8556; // 2 +const static uint64_t SH_FLD_LBUS_PARITY_ERROR_2 = 8557; // 2 +const static uint64_t SH_FLD_LBUS_PARITY_ERROR_3 = 8558; // 2 +const static uint64_t SH_FLD_LCK_STATUS_PARITY_ERROR = 8559; // 3 +const static uint64_t SH_FLD_LD = 8560; // 96 +const static uint64_t SH_FLD_LDQ_EQD_MAX_0_4 = 8561; // 1 +const static uint64_t SH_FLD_LDQ_EQD_MAX_0_4_LEN = 8562; // 1 +const static uint64_t SH_FLD_LDQ_EQD_MIN_0_4 = 8563; // 1 +const static uint64_t SH_FLD_LDQ_EQD_MIN_0_4_LEN = 8564; // 1 +const static uint64_t SH_FLD_LDQ_FSM_PERR = 8565; // 1 +const static uint64_t SH_FLD_LDQ_IVE_MAX_0_4 = 8566; // 1 +const static uint64_t SH_FLD_LDQ_IVE_MAX_0_4_LEN = 8567; // 1 +const static uint64_t SH_FLD_LDQ_IVE_MIN_0_4 = 8568; // 1 +const static uint64_t SH_FLD_LDQ_IVE_MIN_0_4_LEN = 8569; // 1 +const static uint64_t SH_FLD_LDQ_REG_MAX_0_4 = 8570; // 1 +const static uint64_t SH_FLD_LDQ_REG_MAX_0_4_LEN = 8571; // 1 +const static uint64_t SH_FLD_LDQ_REG_MIN_0_4 = 8572; // 1 +const static uint64_t SH_FLD_LDQ_REG_MIN_0_4_LEN = 8573; // 1 +const static uint64_t SH_FLD_LDQ_REG_ORDER_ALL = 8574; // 1 +const static uint64_t SH_FLD_LDQ_THR_MAX_0_4 = 8575; // 1 +const static uint64_t SH_FLD_LDQ_THR_MAX_0_4_LEN = 8576; // 1 +const static uint64_t SH_FLD_LDQ_THR_MIN_0_4 = 8577; // 1 +const static uint64_t SH_FLD_LDQ_THR_MIN_0_4_LEN = 8578; // 1 +const static uint64_t SH_FLD_LDQ_VPC_MAX_0_4 = 8579; // 1 +const static uint64_t SH_FLD_LDQ_VPC_MAX_0_4_LEN = 8580; // 1 +const static uint64_t SH_FLD_LDQ_VPC_MIN_0_4 = 8581; // 1 +const static uint64_t SH_FLD_LDQ_VPC_MIN_0_4_LEN = 8582; // 1 +const static uint64_t SH_FLD_LD_ACK_DEAD = 8583; // 12 +const static uint64_t SH_FLD_LD_ADDR_ERR = 8584; // 24 +const static uint64_t SH_FLD_LD_CLASS_CMD_ADDR_ERR = 8585; // 4 +const static uint64_t SH_FLD_LD_CLASS_CMD_FOREIGN_LINK_FAIL = 8586; // 4 +const static uint64_t SH_FLD_LD_FOREIGN0_ACK_DEAD = 8587; // 12 +const static uint64_t SH_FLD_LD_FOREIGN1_ACK_DEAD = 8588; // 12 +const static uint64_t SH_FLD_LD_UNLD_DLY = 8589; // 1 +const static uint64_t SH_FLD_LD_UNLD_DLY_LEN = 8590; // 1 +const static uint64_t SH_FLD_LENGTH_IN_BYTES_0 = 8591; // 1 +const static uint64_t SH_FLD_LENGTH_IN_BYTES_0_LEN = 8592; // 1 +const static uint64_t SH_FLD_LENGTH_IN_BYTES_1 = 8593; // 1 +const static uint64_t SH_FLD_LENGTH_IN_BYTES_1_LEN = 8594; // 1 +const static uint64_t SH_FLD_LENGTH_IN_BYTES_2 = 8595; // 1 +const static uint64_t SH_FLD_LENGTH_IN_BYTES_2_LEN = 8596; // 1 +const static uint64_t SH_FLD_LENGTH_IN_BYTES_3 = 8597; // 1 +const static uint64_t SH_FLD_LENGTH_IN_BYTES_3_LEN = 8598; // 1 +const static uint64_t SH_FLD_LEVEL_TRANSITION_RATE_A_N = 8599; // 96 +const static uint64_t SH_FLD_LEVEL_TRANSITION_RATE_A_N_LEN = 8600; // 96 +const static uint64_t SH_FLD_LFIR_IN = 8601; // 43 +const static uint64_t SH_FLD_LFIR_IN_LEN = 8602; // 43 +const static uint64_t SH_FLD_LFIR_RECOV_ERR = 8603; // 1 +const static uint64_t SH_FLD_LFREQ = 8604; // 1 +const static uint64_t SH_FLD_LFREQ0 = 8605; // 15 +const static uint64_t SH_FLD_LFREQ0_LEN = 8606; // 15 +const static uint64_t SH_FLD_LFREQ1 = 8607; // 15 +const static uint64_t SH_FLD_LFREQ1_LEN = 8608; // 15 +const static uint64_t SH_FLD_LFREQ_LEN = 8609; // 1 +const static uint64_t SH_FLD_LFSR_ARB_MODE = 8610; // 3 +const static uint64_t SH_FLD_LFSR_DIS = 8611; // 1 +const static uint64_t SH_FLD_LFSR_FAIRNESS_MASK = 8612; // 1 +const static uint64_t SH_FLD_LFSR_FAIRNESS_MASK_LEN = 8613; // 1 +const static uint64_t SH_FLD_LIMIT = 8614; // 2 +const static uint64_t SH_FLD_LIMIT_LEN = 8615; // 2 +const static uint64_t SH_FLD_LIM_PS = 8616; // 1 +const static uint64_t SH_FLD_LINEAR_WINDOW_BAR = 8617; // 4 +const static uint64_t SH_FLD_LINEAR_WINDOW_BAR_LEN = 8618; // 4 +const static uint64_t SH_FLD_LINEAR_WINDOW_BASE = 8619; // 4 +const static uint64_t SH_FLD_LINEAR_WINDOW_BASE_LEN = 8620; // 4 +const static uint64_t SH_FLD_LINEAR_WINDOW_ENABLE = 8621; // 4 +const static uint64_t SH_FLD_LINEAR_WINDOW_MASK = 8622; // 4 +const static uint64_t SH_FLD_LINEAR_WINDOW_MASK_LEN = 8623; // 4 +const static uint64_t SH_FLD_LINEAR_WINDOW_REGION = 8624; // 4 +const static uint64_t SH_FLD_LINEAR_WINDOW_REGION_LEN = 8625; // 4 +const static uint64_t SH_FLD_LINEAR_WINDOW_SCRESP = 8626; // 4 +const static uint64_t SH_FLD_LINEAR_WINDOW_SCRESP_LEN = 8627; // 4 +const static uint64_t SH_FLD_LINK00_HI = 8628; // 2 +const static uint64_t SH_FLD_LINK00_HI_LEN = 8629; // 2 +const static uint64_t SH_FLD_LINK00_LO = 8630; // 2 +const static uint64_t SH_FLD_LINK00_LO_LEN = 8631; // 2 +const static uint64_t SH_FLD_LINK01_CAPP_MODE = 8632; // 1 +const static uint64_t SH_FLD_LINK01_DIB_VC_LIMIT = 8633; // 2 +const static uint64_t SH_FLD_LINK01_DIB_VC_LIMIT_LEN = 8634; // 2 +const static uint64_t SH_FLD_LINK01_HI = 8635; // 2 +const static uint64_t SH_FLD_LINK01_HI_LEN = 8636; // 2 +const static uint64_t SH_FLD_LINK01_HRB_INIT_STATE = 8637; // 1 +const static uint64_t SH_FLD_LINK01_LO = 8638; // 2 +const static uint64_t SH_FLD_LINK01_LO_LEN = 8639; // 2 +const static uint64_t SH_FLD_LINK02_HI = 8640; // 2 +const static uint64_t SH_FLD_LINK02_HI_LEN = 8641; // 2 +const static uint64_t SH_FLD_LINK02_LO = 8642; // 2 +const static uint64_t SH_FLD_LINK02_LO_LEN = 8643; // 2 +const static uint64_t SH_FLD_LINK03_HI = 8644; // 2 +const static uint64_t SH_FLD_LINK03_HI_LEN = 8645; // 2 +const static uint64_t SH_FLD_LINK03_LO = 8646; // 2 +const static uint64_t SH_FLD_LINK03_LO_LEN = 8647; // 2 +const static uint64_t SH_FLD_LINK04_HI = 8648; // 2 +const static uint64_t SH_FLD_LINK04_HI_LEN = 8649; // 2 +const static uint64_t SH_FLD_LINK04_LO = 8650; // 2 +const static uint64_t SH_FLD_LINK04_LO_LEN = 8651; // 2 +const static uint64_t SH_FLD_LINK05_HI = 8652; // 2 +const static uint64_t SH_FLD_LINK05_HI_LEN = 8653; // 2 +const static uint64_t SH_FLD_LINK05_LO = 8654; // 2 +const static uint64_t SH_FLD_LINK05_LO_LEN = 8655; // 2 +const static uint64_t SH_FLD_LINK06_HI = 8656; // 1 +const static uint64_t SH_FLD_LINK06_HI_LEN = 8657; // 1 +const static uint64_t SH_FLD_LINK06_LO = 8658; // 1 +const static uint64_t SH_FLD_LINK06_LO_LEN = 8659; // 1 +const static uint64_t SH_FLD_LINK07_HI = 8660; // 1 +const static uint64_t SH_FLD_LINK07_HI_LEN = 8661; // 1 +const static uint64_t SH_FLD_LINK07_LO = 8662; // 1 +const static uint64_t SH_FLD_LINK07_LO_LEN = 8663; // 1 +const static uint64_t SH_FLD_LINK0_DOB_LIMIT = 8664; // 1 +const static uint64_t SH_FLD_LINK0_DOB_LIMIT_LEN = 8665; // 1 +const static uint64_t SH_FLD_LINK0_DOB_VC0_LIMIT = 8666; // 2 +const static uint64_t SH_FLD_LINK0_DOB_VC0_LIMIT_LEN = 8667; // 2 +const static uint64_t SH_FLD_LINK0_DOB_VC1_LIMIT = 8668; // 2 +const static uint64_t SH_FLD_LINK0_DOB_VC1_LIMIT_LEN = 8669; // 2 +const static uint64_t SH_FLD_LINK0_SPARE = 8670; // 1 +const static uint64_t SH_FLD_LINK0_SPARE_LEN = 8671; // 1 +const static uint64_t SH_FLD_LINK1_DOB_LIMIT = 8672; // 1 +const static uint64_t SH_FLD_LINK1_DOB_LIMIT_LEN = 8673; // 1 +const static uint64_t SH_FLD_LINK1_DOB_VC0_LIMIT = 8674; // 2 +const static uint64_t SH_FLD_LINK1_DOB_VC0_LIMIT_LEN = 8675; // 2 +const static uint64_t SH_FLD_LINK1_DOB_VC1_LIMIT = 8676; // 2 +const static uint64_t SH_FLD_LINK1_DOB_VC1_LIMIT_LEN = 8677; // 2 +const static uint64_t SH_FLD_LINK1_SPARE = 8678; // 1 +const static uint64_t SH_FLD_LINK1_SPARE_LEN = 8679; // 1 +const static uint64_t SH_FLD_LINK23_DIB_VC_LIMIT = 8680; // 2 +const static uint64_t SH_FLD_LINK23_DIB_VC_LIMIT_LEN = 8681; // 2 +const static uint64_t SH_FLD_LINK2_DOB_LIMIT = 8682; // 2 +const static uint64_t SH_FLD_LINK2_DOB_LIMIT_LEN = 8683; // 2 +const static uint64_t SH_FLD_LINK2_DOB_VC0_LIMIT = 8684; // 2 +const static uint64_t SH_FLD_LINK2_DOB_VC0_LIMIT_LEN = 8685; // 2 +const static uint64_t SH_FLD_LINK2_DOB_VC1_LIMIT = 8686; // 2 +const static uint64_t SH_FLD_LINK2_DOB_VC1_LIMIT_LEN = 8687; // 2 +const static uint64_t SH_FLD_LINK3_DOB_LIMIT = 8688; // 2 +const static uint64_t SH_FLD_LINK3_DOB_LIMIT_LEN = 8689; // 2 +const static uint64_t SH_FLD_LINK3_DOB_VC0_LIMIT = 8690; // 2 +const static uint64_t SH_FLD_LINK3_DOB_VC0_LIMIT_LEN = 8691; // 2 +const static uint64_t SH_FLD_LINK3_DOB_VC1_LIMIT = 8692; // 2 +const static uint64_t SH_FLD_LINK3_DOB_VC1_LIMIT_LEN = 8693; // 2 +const static uint64_t SH_FLD_LINK45_DIB_VC_LIMIT = 8694; // 2 +const static uint64_t SH_FLD_LINK45_DIB_VC_LIMIT_LEN = 8695; // 2 +const static uint64_t SH_FLD_LINK4_DOB_LIMIT = 8696; // 2 +const static uint64_t SH_FLD_LINK4_DOB_LIMIT_LEN = 8697; // 2 +const static uint64_t SH_FLD_LINK4_DOB_VC0_LIMIT = 8698; // 2 +const static uint64_t SH_FLD_LINK4_DOB_VC0_LIMIT_LEN = 8699; // 2 +const static uint64_t SH_FLD_LINK4_DOB_VC1_LIMIT = 8700; // 2 +const static uint64_t SH_FLD_LINK4_DOB_VC1_LIMIT_LEN = 8701; // 2 +const static uint64_t SH_FLD_LINK5_DOB_LIMIT = 8702; // 2 +const static uint64_t SH_FLD_LINK5_DOB_LIMIT_LEN = 8703; // 2 +const static uint64_t SH_FLD_LINK5_DOB_VC0_LIMIT = 8704; // 2 +const static uint64_t SH_FLD_LINK5_DOB_VC0_LIMIT_LEN = 8705; // 2 +const static uint64_t SH_FLD_LINK5_DOB_VC1_LIMIT = 8706; // 2 +const static uint64_t SH_FLD_LINK5_DOB_VC1_LIMIT_LEN = 8707; // 2 +const static uint64_t SH_FLD_LINK67_CAPP_MODE = 8708; // 1 +const static uint64_t SH_FLD_LINK67_DIB_VC_LIMIT = 8709; // 1 +const static uint64_t SH_FLD_LINK67_DIB_VC_LIMIT_LEN = 8710; // 1 +const static uint64_t SH_FLD_LINK67_HRB_INIT_STATE = 8711; // 1 +const static uint64_t SH_FLD_LINK6_DOB_VC0_LIMIT = 8712; // 1 +const static uint64_t SH_FLD_LINK6_DOB_VC0_LIMIT_LEN = 8713; // 1 +const static uint64_t SH_FLD_LINK6_DOB_VC1_LIMIT = 8714; // 1 +const static uint64_t SH_FLD_LINK6_DOB_VC1_LIMIT_LEN = 8715; // 1 +const static uint64_t SH_FLD_LINK6_SPARE = 8716; // 1 +const static uint64_t SH_FLD_LINK6_SPARE_LEN = 8717; // 1 +const static uint64_t SH_FLD_LINK7_DOB_VC0_LIMIT = 8718; // 1 +const static uint64_t SH_FLD_LINK7_DOB_VC0_LIMIT_LEN = 8719; // 1 +const static uint64_t SH_FLD_LINK7_DOB_VC1_LIMIT = 8720; // 1 +const static uint64_t SH_FLD_LINK7_DOB_VC1_LIMIT_LEN = 8721; // 1 +const static uint64_t SH_FLD_LINK7_SPARE = 8722; // 1 +const static uint64_t SH_FLD_LINK7_SPARE_LEN = 8723; // 1 +const static uint64_t SH_FLD_LINKS01_TOD_ENABLE = 8724; // 1 +const static uint64_t SH_FLD_LINKS23_TOD_ENABLE = 8725; // 1 +const static uint64_t SH_FLD_LINKS45_TOD_ENABLE = 8726; // 1 +const static uint64_t SH_FLD_LINKS67_TOD_ENABLE = 8727; // 1 +const static uint64_t SH_FLD_LINK_AVP_MODE = 8728; // 2 +const static uint64_t SH_FLD_LINUX_TRIG_MODE = 8729; // 1 +const static uint64_t SH_FLD_LISTEN_TO_PULSE_DIS = 8730; // 43 +const static uint64_t SH_FLD_LO = 8731; // 1 +const static uint64_t SH_FLD_LOCALITY_4_ACCESS = 8732; // 1 +const static uint64_t SH_FLD_LOCAL_HIGH_PRIORITY = 8733; // 4 +const static uint64_t SH_FLD_LOCAL_HIGH_PRIORITY_LEN = 8734; // 4 +const static uint64_t SH_FLD_LOCAL_LOW_PRIORITY = 8735; // 4 +const static uint64_t SH_FLD_LOCAL_LOW_PRIORITY_LEN = 8736; // 4 +const static uint64_t SH_FLD_LOCAL_NODE_EPSILON = 8737; // 8 +const static uint64_t SH_FLD_LOCAL_NODE_EPSILON_LEN = 8738; // 8 +const static uint64_t SH_FLD_LOCAL_QUIESCE_ACHIEVED = 8739; // 1 +const static uint64_t SH_FLD_LOCK = 8740; // 16 +const static uint64_t SH_FLD_LOCKED_FSM_STATE = 8741; // 1 +const static uint64_t SH_FLD_LOCKED_FSM_STATE_LEN = 8742; // 1 +const static uint64_t SH_FLD_LOCKED_PIBM_ADDR = 8743; // 1 +const static uint64_t SH_FLD_LOCKED_PIBM_ADDR_LEN = 8744; // 1 +const static uint64_t SH_FLD_LOCKED_SEEPROM_ADDRESS = 8745; // 1 +const static uint64_t SH_FLD_LOCKED_SEEPROM_ADDRESS_LEN = 8746; // 1 +const static uint64_t SH_FLD_LOCK_PCB_ON_ERR = 8747; // 12 +const static uint64_t SH_FLD_LOCK_SEL = 8748; // 6 +const static uint64_t SH_FLD_LOFF_AMP_EN = 8749; // 6 +const static uint64_t SH_FLD_LOG = 8750; // 1 +const static uint64_t SH_FLD_LOG_LEN = 8751; // 1 +const static uint64_t SH_FLD_LOOP_BREAK_MODE = 8752; // 64 +const static uint64_t SH_FLD_LOOP_BREAK_MODE_LEN = 8753; // 64 +const static uint64_t SH_FLD_LOOP_COUNT = 8754; // 43 +const static uint64_t SH_FLD_LOOP_COUNT_LEN = 8755; // 43 +const static uint64_t SH_FLD_LOW = 8756; // 1 +const static uint64_t SH_FLD_LOW_IDLE_COUNT = 8757; // 8 +const static uint64_t SH_FLD_LOW_IDLE_COUNT_LEN = 8758; // 8 +const static uint64_t SH_FLD_LOW_IDLE_THRESHOLD = 8759; // 8 +const static uint64_t SH_FLD_LOW_IDLE_THRESHOLD_LEN = 8760; // 8 +const static uint64_t SH_FLD_LOW_LATENCY = 8761; // 8 +const static uint64_t SH_FLD_LOW_LEN = 8762; // 1 +const static uint64_t SH_FLD_LOW_ORDER_STEP_VALUE = 8763; // 1 +const static uint64_t SH_FLD_LOW_ORDER_STEP_VALUE_LEN = 8764; // 1 +const static uint64_t SH_FLD_LP = 8765; // 8 +const static uint64_t SH_FLD_LPARID = 8766; // 24 +const static uint64_t SH_FLD_LPARID_LEN = 8767; // 24 +const static uint64_t SH_FLD_LPARSHORT = 8768; // 272 +const static uint64_t SH_FLD_LPARSHORT_LEN = 8769; // 272 +const static uint64_t SH_FLD_LPCR_BOT = 8770; // 16 +const static uint64_t SH_FLD_LPCR_ISL = 8771; // 16 +const static uint64_t SH_FLD_LPCR_PS = 8772; // 16 +const static uint64_t SH_FLD_LPCR_PS_LEN = 8773; // 16 +const static uint64_t SH_FLD_LPCR_SC = 8774; // 16 +const static uint64_t SH_FLD_LPCR_TC = 8775; // 16 +const static uint64_t SH_FLD_LPC_MODE = 8776; // 2 +const static uint64_t SH_FLD_LPC_MODE_LEN = 8777; // 2 +const static uint64_t SH_FLD_LPID = 8778; // 9 +const static uint64_t SH_FLD_LPID_LEN = 8779; // 9 +const static uint64_t SH_FLD_LPID_MASK = 8780; // 1 +const static uint64_t SH_FLD_LPID_MASK_LEN = 8781; // 1 +const static uint64_t SH_FLD_LP_CNT_THRESH = 8782; // 6 +const static uint64_t SH_FLD_LP_CNT_THRESH_LEN = 8783; // 6 +const static uint64_t SH_FLD_LP_LEN = 8784; // 8 +const static uint64_t SH_FLD_LP_MAX_CRED_THRESH = 8785; // 6 +const static uint64_t SH_FLD_LP_MAX_CRED_THRESH_LEN = 8786; // 6 +const static uint64_t SH_FLD_LP_MIN_CRED_THRESH = 8787; // 6 +const static uint64_t SH_FLD_LP_MIN_CRED_THRESH_LEN = 8788; // 6 +const static uint64_t SH_FLD_LP_MODE_ENABLE = 8789; // 6 +const static uint64_t SH_FLD_LP_ONLY_MODE = 8790; // 6 +const static uint64_t SH_FLD_LP_TIMER_TICK_CONFIG = 8791; // 6 +const static uint64_t SH_FLD_LP_TIMER_TICK_CONFIG_LEN = 8792; // 6 +const static uint64_t SH_FLD_LRDIMM = 8793; // 2 +const static uint64_t SH_FLD_LRDIMM_CONTEXT = 8794; // 8 +const static uint64_t SH_FLD_LRDIMM_LEN = 8795; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD1 = 8796; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD10 = 8797; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD10_LEN = 8798; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD11 = 8799; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD11_LEN = 8800; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD12 = 8801; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD12_LEN = 8802; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD13 = 8803; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD13_LEN = 8804; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD14 = 8805; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD14_LEN = 8806; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD15 = 8807; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD15_LEN = 8808; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD1_LEN = 8809; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD2 = 8810; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD2_LEN = 8811; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD3 = 8812; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD3_LEN = 8813; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD4 = 8814; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD4_LEN = 8815; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD5 = 8816; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD5_LEN = 8817; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD6 = 8818; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD6_LEN = 8819; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD7 = 8820; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD7_LEN = 8821; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD8 = 8822; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD8_LEN = 8823; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD9 = 8824; // 2 +const static uint64_t SH_FLD_LRDIMM_WORD9_LEN = 8825; // 2 +const static uint64_t SH_FLD_LRU_ALL_MEMBERS_IN_CGC_ARE_LINE_DELETED = 8826; // 12 +const static uint64_t SH_FLD_LRU_READ_ERROR_DETECTED = 8827; // 12 +const static uint64_t SH_FLD_LTE_EN = 8828; // 4 +const static uint64_t SH_FLD_LUC = 8829; // 1 +const static uint64_t SH_FLD_LUC_LEN = 8830; // 1 +const static uint64_t SH_FLD_LUT = 8831; // 1 +const static uint64_t SH_FLD_LUT_LEN = 8832; // 1 +const static uint64_t SH_FLD_LVDIR_EN = 8833; // 12 +const static uint64_t SH_FLD_LVDIR_PERR = 8834; // 12 +const static uint64_t SH_FLD_LVLTRANS_FENCE = 8835; // 43 +const static uint64_t SH_FLD_M = 8836; // 1 +const static uint64_t SH_FLD_M0_BIT_MAP = 8837; // 8 +const static uint64_t SH_FLD_M0_BIT_MAP_LEN = 8838; // 8 +const static uint64_t SH_FLD_M0_PRIORITY = 8839; // 1 +const static uint64_t SH_FLD_M0_PRIORITY_LEN = 8840; // 1 +const static uint64_t SH_FLD_M0_PRIORITY_SEL = 8841; // 1 +const static uint64_t SH_FLD_M1HC0A = 8842; // 1 +const static uint64_t SH_FLD_M1HC0A_LEN = 8843; // 1 +const static uint64_t SH_FLD_M1HC0B = 8844; // 1 +const static uint64_t SH_FLD_M1HC0B_LEN = 8845; // 1 +const static uint64_t SH_FLD_M1HC1A = 8846; // 1 +const static uint64_t SH_FLD_M1HC1A_LEN = 8847; // 1 +const static uint64_t SH_FLD_M1HC1B = 8848; // 1 +const static uint64_t SH_FLD_M1HC1B_LEN = 8849; // 1 +const static uint64_t SH_FLD_M1HC2A = 8850; // 1 +const static uint64_t SH_FLD_M1HC2A_LEN = 8851; // 1 +const static uint64_t SH_FLD_M1HC2B = 8852; // 1 +const static uint64_t SH_FLD_M1HC2B_LEN = 8853; // 1 +const static uint64_t SH_FLD_M1SASIM1_ENABLE_PIB_ERROR = 8854; // 1 +const static uint64_t SH_FLD_M1SASIM1_ENABLE_PIB_PENDING = 8855; // 1 +const static uint64_t SH_FLD_M1SASIM1_ENABLE_XUP = 8856; // 1 +const static uint64_t SH_FLD_M1_BIT_MAP = 8857; // 8 +const static uint64_t SH_FLD_M1_BIT_MAP_LEN = 8858; // 8 +const static uint64_t SH_FLD_M1_PRIORITY = 8859; // 1 +const static uint64_t SH_FLD_M1_PRIORITY_LEN = 8860; // 1 +const static uint64_t SH_FLD_M1_PRIORITY_SEL = 8861; // 1 +const static uint64_t SH_FLD_M2HC0A = 8862; // 1 +const static uint64_t SH_FLD_M2HC0A_LEN = 8863; // 1 +const static uint64_t SH_FLD_M2HC0B = 8864; // 1 +const static uint64_t SH_FLD_M2HC0B_LEN = 8865; // 1 +const static uint64_t SH_FLD_M2HC1A = 8866; // 1 +const static uint64_t SH_FLD_M2HC1A_LEN = 8867; // 1 +const static uint64_t SH_FLD_M2HC1B = 8868; // 1 +const static uint64_t SH_FLD_M2HC1B_LEN = 8869; // 1 +const static uint64_t SH_FLD_M2HC2A = 8870; // 1 +const static uint64_t SH_FLD_M2HC2A_LEN = 8871; // 1 +const static uint64_t SH_FLD_M2HC2B = 8872; // 1 +const static uint64_t SH_FLD_M2HC2B_LEN = 8873; // 1 +const static uint64_t SH_FLD_M2_PRIORITY = 8874; // 1 +const static uint64_t SH_FLD_M2_PRIORITY_LEN = 8875; // 1 +const static uint64_t SH_FLD_M2_PRIORITY_SEL = 8876; // 1 +const static uint64_t SH_FLD_M3_PRIORITY = 8877; // 1 +const static uint64_t SH_FLD_M3_PRIORITY_LEN = 8878; // 1 +const static uint64_t SH_FLD_M3_PRIORITY_SEL = 8879; // 1 +const static uint64_t SH_FLD_M4_PRIORITY = 8880; // 1 +const static uint64_t SH_FLD_M4_PRIORITY_LEN = 8881; // 1 +const static uint64_t SH_FLD_M5_PRIORITY = 8882; // 1 +const static uint64_t SH_FLD_M5_PRIORITY_LEN = 8883; // 1 +const static uint64_t SH_FLD_M5_PRIORITY_SEL = 8884; // 1 +const static uint64_t SH_FLD_M6_PRIORITY = 8885; // 1 +const static uint64_t SH_FLD_M6_PRIORITY_LEN = 8886; // 1 +const static uint64_t SH_FLD_M7_PRIORITY = 8887; // 1 +const static uint64_t SH_FLD_M7_PRIORITY_LEN = 8888; // 1 +const static uint64_t SH_FLD_M7_PRIORITY_SEL = 8889; // 1 +const static uint64_t SH_FLD_MAGIC_COOKIE = 8890; // 1 +const static uint64_t SH_FLD_MAGIC_COOKIE_LEN = 8891; // 1 +const static uint64_t SH_FLD_MAINLINE_AUE = 8892; // 8 +const static uint64_t SH_FLD_MAINLINE_IAUE = 8893; // 8 +const static uint64_t SH_FLD_MAINLINE_IMPE = 8894; // 8 +const static uint64_t SH_FLD_MAINLINE_IRCD = 8895; // 8 +const static uint64_t SH_FLD_MAINLINE_IUE = 8896; // 8 +const static uint64_t SH_FLD_MAINLINE_MCE = 8897; // 8 +const static uint64_t SH_FLD_MAINLINE_MPE_RANK_0_TO_7 = 8898; // 8 +const static uint64_t SH_FLD_MAINLINE_MPE_RANK_0_TO_7_LEN = 8899; // 8 +const static uint64_t SH_FLD_MAINLINE_NCE = 8900; // 8 +const static uint64_t SH_FLD_MAINLINE_RCD = 8901; // 8 +const static uint64_t SH_FLD_MAINLINE_SCE = 8902; // 8 +const static uint64_t SH_FLD_MAINLINE_SUE = 8903; // 8 +const static uint64_t SH_FLD_MAINLINE_TCE = 8904; // 8 +const static uint64_t SH_FLD_MAINLINE_UE = 8905; // 8 +const static uint64_t SH_FLD_MAINTENANCE_AUE = 8906; // 8 +const static uint64_t SH_FLD_MAINTENANCE_IAUE = 8907; // 8 +const static uint64_t SH_FLD_MAINTENANCE_IMPE = 8908; // 8 +const static uint64_t SH_FLD_MAINTENANCE_IRCD = 8909; // 8 +const static uint64_t SH_FLD_MAINTENANCE_IUE = 8910; // 8 +const static uint64_t SH_FLD_MAINTENANCE_MCE = 8911; // 8 +const static uint64_t SH_FLD_MAINTENANCE_MPE_RANK_0_TO_7 = 8912; // 8 +const static uint64_t SH_FLD_MAINTENANCE_MPE_RANK_0_TO_7_LEN = 8913; // 8 +const static uint64_t SH_FLD_MAINTENANCE_NCE = 8914; // 8 +const static uint64_t SH_FLD_MAINTENANCE_RCD = 8915; // 8 +const static uint64_t SH_FLD_MAINTENANCE_SCE = 8916; // 8 +const static uint64_t SH_FLD_MAINTENANCE_SUE = 8917; // 8 +const static uint64_t SH_FLD_MAINTENANCE_TCE = 8918; // 8 +const static uint64_t SH_FLD_MAINTENANCE_UE = 8919; // 8 +const static uint64_t SH_FLD_MAINT_CCS_PE_HOLD_OUT = 8920; // 2 +const static uint64_t SH_FLD_MAIN_SLICE_EN_ENC = 8921; // 1 +const static uint64_t SH_FLD_MAIN_SLICE_EN_ENC_LEN = 8922; // 1 +const static uint64_t SH_FLD_MALFUNCTION_ALERT = 8923; // 96 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP0 = 8924; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP0_LEN = 8925; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP1 = 8926; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP10 = 8927; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP10_LEN = 8928; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP11 = 8929; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP11_LEN = 8930; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP12 = 8931; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP12_LEN = 8932; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP13 = 8933; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP13_LEN = 8934; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP14 = 8935; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP14_LEN = 8936; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP15 = 8937; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP15_LEN = 8938; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP1_LEN = 8939; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP2 = 8940; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP2_LEN = 8941; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP3 = 8942; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP3_LEN = 8943; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP4 = 8944; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP4_LEN = 8945; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP5 = 8946; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP5_LEN = 8947; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP6 = 8948; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP6_LEN = 8949; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP7 = 8950; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP7_LEN = 8951; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP8 = 8952; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP8_LEN = 8953; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP9 = 8954; // 1 +const static uint64_t SH_FLD_MALF_ERR_FROM_GROUP9_LEN = 8955; // 1 +const static uint64_t SH_FLD_MANUAL_CLR_PB_STOP = 8956; // 1 +const static uint64_t SH_FLD_MANUAL_PB_SWITCH_ABCD = 8957; // 1 +const static uint64_t SH_FLD_MANUAL_SET_PB_STOP = 8958; // 1 +const static uint64_t SH_FLD_MAP_REG_CERR0 = 8959; // 1 +const static uint64_t SH_FLD_MAP_REG_CERR1 = 8960; // 1 +const static uint64_t SH_FLD_MAP_REG_ERR0 = 8961; // 1 +const static uint64_t SH_FLD_MAP_REG_ERR1 = 8962; // 1 +const static uint64_t SH_FLD_MARGINPD_SEL = 8963; // 6 +const static uint64_t SH_FLD_MARGINPD_SEL_LEN = 8964; // 6 +const static uint64_t SH_FLD_MARGINPU_SEL = 8965; // 6 +const static uint64_t SH_FLD_MARGINPU_SEL_LEN = 8966; // 6 +const static uint64_t SH_FLD_MARK = 8967; // 64 +const static uint64_t SH_FLD_MARK_LEN = 8968; // 64 +const static uint64_t SH_FLD_MASK = 8969; // 13 +const static uint64_t SH_FLD_MASK_AGV_DISABLE_MODE = 8970; // 2 +const static uint64_t SH_FLD_MASK_B = 8971; // 129 +const static uint64_t SH_FLD_MASK_LEN = 8972; // 5 +const static uint64_t SH_FLD_MASK_PURGE_INTERFACE = 8973; // 12 +const static uint64_t SH_FLD_MASK_TOGGLE_ENABLE = 8974; // 1 +const static uint64_t SH_FLD_MASTER = 8975; // 8 +const static uint64_t SH_FLD_MASTERID = 8976; // 6 +const static uint64_t SH_FLD_MASTERID_LEN = 8977; // 6 +const static uint64_t SH_FLD_MASTER_ARRAY_CE = 8978; // 4 +const static uint64_t SH_FLD_MASTER_ARRAY_UE = 8979; // 4 +const static uint64_t SH_FLD_MASTER_CP_DATA_POLL_PULSE_DIV = 8980; // 12 +const static uint64_t SH_FLD_MASTER_CP_DATA_POLL_PULSE_DIV_LEN = 8981; // 12 +const static uint64_t SH_FLD_MASTER_ERROR_CODE = 8982; // 1 +const static uint64_t SH_FLD_MASTER_ERROR_CODE_LEN = 8983; // 1 +const static uint64_t SH_FLD_MASTER_IDLE = 8984; // 1 +const static uint64_t SH_FLD_MASTER_MODE = 8985; // 47 +const static uint64_t SH_FLD_MASTER_RECOVERABLE_ERROR = 8986; // 4 +const static uint64_t SH_FLD_MASTER_RESPONSE_BIT = 8987; // 1 +const static uint64_t SH_FLD_MASTER_SYS_XSTOP_ERROR = 8988; // 4 +const static uint64_t SH_FLD_MASTER_TLB_DATA_POLL_PULSE_DIV = 8989; // 12 +const static uint64_t SH_FLD_MASTER_TLB_DATA_POLL_PULSE_DIV_LEN = 8990; // 12 +const static uint64_t SH_FLD_MAXCYCLECNT = 8991; // 3 +const static uint64_t SH_FLD_MAXCYCLECNT_LEN = 8992; // 3 +const static uint64_t SH_FLD_MAX_ALL_POLL_BCST_0_4 = 8993; // 1 +const static uint64_t SH_FLD_MAX_ALL_POLL_BCST_0_4_LEN = 8994; // 1 +const static uint64_t SH_FLD_MAX_BAD_LANES = 8995; // 4 +const static uint64_t SH_FLD_MAX_BAD_LANES_LEN = 8996; // 4 +const static uint64_t SH_FLD_MAX_BER_CHECK_COUNT = 8997; // 4 +const static uint64_t SH_FLD_MAX_BER_CHECK_COUNT_LEN = 8998; // 4 +const static uint64_t SH_FLD_MAX_CRD_TO_CQ = 8999; // 6 +const static uint64_t SH_FLD_MAX_CRD_TO_CQ_LEN = 9000; // 6 +const static uint64_t SH_FLD_MAX_CRD_TO_PC = 9001; // 6 +const static uint64_t SH_FLD_MAX_CRD_TO_PC_LEN = 9002; // 6 +const static uint64_t SH_FLD_MAX_CYCLE_SAMPLE = 9003; // 12 +const static uint64_t SH_FLD_MAX_CYCLE_SAMPLE_LEN = 9004; // 12 +const static uint64_t SH_FLD_MAX_ENTRIES_IN_MODIFIED = 9005; // 2 +const static uint64_t SH_FLD_MAX_ENTRIES_IN_MODIFIED_LEN = 9006; // 2 +const static uint64_t SH_FLD_MAX_GRP_POLL_BCST_0_4 = 9007; // 1 +const static uint64_t SH_FLD_MAX_GRP_POLL_BCST_0_4_LEN = 9008; // 1 +const static uint64_t SH_FLD_MAX_LPC_DATA_PBH0_CI_STORE_BUFFERS = 9009; // 2 +const static uint64_t SH_FLD_MAX_LPC_DATA_PBH0_CI_STORE_BUFFERS_LEN = 9010; // 2 +const static uint64_t SH_FLD_MAX_OUTSTANDING = 9011; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_CI_LOAD = 9012; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_CI_LOAD_LEN = 9013; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_CI_STORE = 9014; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_CI_STORE_LEN = 9015; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_EOI = 9016; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_EOI_LEN = 9017; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_EQD_FETCH = 9018; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_EQD_FETCH_LEN = 9019; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_EQD_WRITE = 9020; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_EQD_WRITE_LEN = 9021; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_EQP = 9022; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_EQP_LEN = 9023; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_ISB_FETCH = 9024; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_ISB_FETCH_LEN = 9025; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_ISB_WRITE = 9026; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_ISB_WRITE_LEN = 9027; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_IVE_FETCH = 9028; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_IVE_FETCH_LEN = 9029; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_LEN = 9030; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_SBC_LOOKUP = 9031; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_SBC_LOOKUP_LEN = 9032; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_SOFT_EOI = 9033; // 1 +const static uint64_t SH_FLD_MAX_OUTSTANDING_SOFT_EOI_LEN = 9034; // 1 +const static uint64_t SH_FLD_MAX_PROMOTE_LEVEL_A_N = 9035; // 96 +const static uint64_t SH_FLD_MAX_PROMOTE_LEVEL_A_N_LEN = 9036; // 96 +const static uint64_t SH_FLD_MAX_PTAG_IN_USE = 9037; // 3 +const static uint64_t SH_FLD_MAX_PTAG_IN_USE_LEN = 9038; // 3 +const static uint64_t SH_FLD_MAX_UNLOCK_IN_FIFO = 9039; // 3 +const static uint64_t SH_FLD_MAX_UNLOCK_IN_FIFO_LEN = 9040; // 3 +const static uint64_t SH_FLD_MB00_SPATTN = 9041; // 4 +const static uint64_t SH_FLD_MB01_SPATTN = 9042; // 4 +const static uint64_t SH_FLD_MB10_SPATTN = 9043; // 4 +const static uint64_t SH_FLD_MB11_SPATTN = 9044; // 4 +const static uint64_t SH_FLD_MB20_SPATTN = 9045; // 4 +const static uint64_t SH_FLD_MB21_SPATTN = 9046; // 4 +const static uint64_t SH_FLD_MB30_SPATTN = 9047; // 4 +const static uint64_t SH_FLD_MB31_SPATTN = 9048; // 4 +const static uint64_t SH_FLD_MB40_SPATTN = 9049; // 4 +const static uint64_t SH_FLD_MB41_SPATTN = 9050; // 4 +const static uint64_t SH_FLD_MB50_SPATTN = 9051; // 4 +const static uint64_t SH_FLD_MB51_SPATTN = 9052; // 4 +const static uint64_t SH_FLD_MB60_SPATTN = 9053; // 2 +const static uint64_t SH_FLD_MB61_SPATTN = 9054; // 2 +const static uint64_t SH_FLD_MB70_SPATTN = 9055; // 2 +const static uint64_t SH_FLD_MB71_SPATTN = 9056; // 2 +const static uint64_t SH_FLD_MBASE = 9057; // 12 +const static uint64_t SH_FLD_MBASE_LEN = 9058; // 12 +const static uint64_t SH_FLD_MBA_NONRECOVERABLE_ERROR = 9059; // 16 +const static uint64_t SH_FLD_MBA_RECOVERABLE_ERROR = 9060; // 16 +const static uint64_t SH_FLD_MBA_WRD_MODE_CFG_CAW2_CE_UE_ERR_DETECT_EN = 9061; // 8 +const static uint64_t SH_FLD_MBA_WRD_MODE_CFG_CRC_MODE_EN = 9062; // 8 +const static uint64_t SH_FLD_MBA_WRD_MODE_CFG_CRC_MODE_X8 = 9063; // 8 +const static uint64_t SH_FLD_MBA_WRD_MODE_CFG_WRD_ECC_CHK_DISABLE = 9064; // 8 +const static uint64_t SH_FLD_MBA_WRD_MODE_CFG_WRD_ECC_COR_DISABLE = 9065; // 8 +const static uint64_t SH_FLD_MBA_WRD_MODE_RESERVED_4 = 9066; // 8 +const static uint64_t SH_FLD_MBOX0 = 9067; // 1 +const static uint64_t SH_FLD_MBOX0_LEN = 9068; // 1 +const static uint64_t SH_FLD_MBOX1 = 9069; // 1 +const static uint64_t SH_FLD_MBOX1_LEN = 9070; // 1 +const static uint64_t SH_FLD_MBOX2 = 9071; // 1 +const static uint64_t SH_FLD_MBOX2_LEN = 9072; // 1 +const static uint64_t SH_FLD_MBOX3 = 9073; // 1 +const static uint64_t SH_FLD_MBOX3_LEN = 9074; // 1 +const static uint64_t SH_FLD_MBOX4 = 9075; // 1 +const static uint64_t SH_FLD_MBOX4_LEN = 9076; // 1 +const static uint64_t SH_FLD_MBOX5 = 9077; // 1 +const static uint64_t SH_FLD_MBOX5_LEN = 9078; // 1 +const static uint64_t SH_FLD_MBOX6 = 9079; // 1 +const static uint64_t SH_FLD_MBOX6_LEN = 9080; // 1 +const static uint64_t SH_FLD_MBOX7 = 9081; // 1 +const static uint64_t SH_FLD_MBOX7_LEN = 9082; // 1 +const static uint64_t SH_FLD_MBR_DIS = 9083; // 2 +const static uint64_t SH_FLD_MBR_DIS_LEN = 9084; // 2 +const static uint64_t SH_FLD_MBSECCQ_DATA_GENERATOR_META_ENABLE = 9085; // 8 +const static uint64_t SH_FLD_MBSECCQ_DATA_GENERATOR_OVERRIDE = 9086; // 8 +const static uint64_t SH_FLD_MBSECCQ_DATA_INVERSION = 9087; // 8 +const static uint64_t SH_FLD_MBSECCQ_DATA_INVERSION_LEN = 9088; // 8 +const static uint64_t SH_FLD_MBSECCQ_DELAY_NONBYPASS = 9089; // 8 +const static uint64_t SH_FLD_MBSECCQ_DELAY_VALID_1X = 9090; // 8 +const static uint64_t SH_FLD_MBSECCQ_DISABLE_MARK_STORE_WRITE = 9091; // 8 +const static uint64_t SH_FLD_MBSECCQ_DISABLE_MEMORY_ECC_CHECK_CORRECT = 9092; // 8 +const static uint64_t SH_FLD_MBSECCQ_DISABLE_MEMORY_ECC_CORRECT = 9093; // 8 +const static uint64_t SH_FLD_MBSECCQ_DISABLE_UE_RETRY = 9094; // 8 +const static uint64_t SH_FLD_MBSECCQ_ECC_SCHEDULER_DELAY = 9095; // 8 +const static uint64_t SH_FLD_MBSECCQ_ECC_SCHEDULER_DELAY_LEN = 9096; // 8 +const static uint64_t SH_FLD_MBSECCQ_ENABLE_HOST_ATTENTION = 9097; // 8 +const static uint64_t SH_FLD_MBSECCQ_ENABLE_SPECIAL_ATTENTION = 9098; // 8 +const static uint64_t SH_FLD_MBSECCQ_EXIT_OVERRIDE = 9099; // 8 +const static uint64_t SH_FLD_MBSECCQ_EXIT_OVERRIDE_LEN = 9100; // 8 +const static uint64_t SH_FLD_MBSECCQ_INT_RESET_KEEPER = 9101; // 8 +const static uint64_t SH_FLD_MBSECCQ_ITAG_METADATA_ENABLE = 9102; // 8 +const static uint64_t SH_FLD_MBSECCQ_NEST_VAL_TO_DATA_DELAY = 9103; // 8 +const static uint64_t SH_FLD_MBSECCQ_NEST_VAL_TO_DATA_DELAY_LEN = 9104; // 8 +const static uint64_t SH_FLD_MBSECCQ_READ_POINTER_DELAY = 9105; // 8 +const static uint64_t SH_FLD_MBSECCQ_READ_POINTER_DELAY_LEN = 9106; // 8 +const static uint64_t SH_FLD_MBSECCQ_RESERVED_10 = 9107; // 8 +const static uint64_t SH_FLD_MBSECCQ_RESERVED_12_16 = 9108; // 8 +const static uint64_t SH_FLD_MBSECCQ_RESERVED_12_16_LEN = 9109; // 8 +const static uint64_t SH_FLD_MBSECCQ_RESERVED_2 = 9110; // 8 +const static uint64_t SH_FLD_MBSECCQ_RESERVED_22_25 = 9111; // 8 +const static uint64_t SH_FLD_MBSECCQ_RESERVED_22_25_LEN = 9112; // 8 +const static uint64_t SH_FLD_MBSECCQ_RESERVED_3 = 9113; // 8 +const static uint64_t SH_FLD_MBSECCQ_RESERVED_4 = 9114; // 8 +const static uint64_t SH_FLD_MBSECCQ_RESERVED_40_47 = 9115; // 8 +const static uint64_t SH_FLD_MBSECCQ_RESERVED_40_47_LEN = 9116; // 8 +const static uint64_t SH_FLD_MBSECCQ_RESERVED_51 = 9117; // 8 +const static uint64_t SH_FLD_MBSECCQ_RESERVED_7_8 = 9118; // 8 +const static uint64_t SH_FLD_MBSECCQ_RESERVED_7_8_LEN = 9119; // 8 +const static uint64_t SH_FLD_MBSECCQ_USE_ADDRESS_HASH = 9120; // 8 +const static uint64_t SH_FLD_MBSECCQ_VAL_TO_DATA_DELAY = 9121; // 8 +const static uint64_t SH_FLD_MBSECCQ_VAL_TO_DATA_DELAY_LEN = 9122; // 8 +const static uint64_t SH_FLD_MB_BAD_ADDR = 9123; // 2 +const static uint64_t SH_FLD_MB_BAD_WRITE = 9124; // 2 +const static uint64_t SH_FLD_MB_CORRUPT = 9125; // 2 +const static uint64_t SH_FLD_MB_LINK_DOWN = 9126; // 2 +const static uint64_t SH_FLD_MB_LINK_ID = 9127; // 2 +const static uint64_t SH_FLD_MB_LINK_ID_LEN = 9128; // 2 +const static uint64_t SH_FLD_MB_RESET = 9129; // 2 +const static uint64_t SH_FLD_MB_SENT = 9130; // 2 +const static uint64_t SH_FLD_MB_SPARE = 9131; // 2 +const static uint64_t SH_FLD_MB_SPARE_LEN = 9132; // 2 +const static uint64_t SH_FLD_MB_VALID = 9133; // 2 +const static uint64_t SH_FLD_MB_WR_NOT_RD = 9134; // 2 +const static uint64_t SH_FLD_MCA_DBG_SEL_IN = 9135; // 8 +const static uint64_t SH_FLD_MCA_DBG_SEL_WRT = 9136; // 8 +const static uint64_t SH_FLD_MCBAGEN_PE_HOLD_OUT = 9137; // 2 +const static uint64_t SH_FLD_MCBCNTL_PE_HOLD_OUT = 9138; // 2 +const static uint64_t SH_FLD_MCBCNTL_PORT_SEL = 9139; // 2 +const static uint64_t SH_FLD_MCBCNTL_PORT_SEL_LEN = 9140; // 2 +const static uint64_t SH_FLD_MCBDGEN_PE_HOLD_OUT = 9141; // 2 +const static uint64_t SH_FLD_MCBERR_SCOM_PE_HOLD_OUT = 9142; // 2 +const static uint64_t SH_FLD_MCBIST_BRODCAST_OUT_OF_SYNC = 9143; // 10 +const static uint64_t SH_FLD_MCBIST_CCS_SUBTEST_DONE = 9144; // 10 +const static uint64_t SH_FLD_MCBIST_CFG_FORCE_PAUSE_AFTER_ADDR = 9145; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_FORCE_PAUSE_AFTER_SUBTEST = 9146; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_PAUSE_AFTER_CCS_SUBTEST = 9147; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_REF_WAIT_TIME = 9148; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_REF_WAIT_TIME_LEN = 9149; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST00_ADDR_RAND_MODE = 9150; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST00_ADDR_REV_MODE = 9151; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST00_ADDR_SEL = 9152; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST00_ADDR_SEL_LEN = 9153; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST00_COMPL_1ST_CMD = 9154; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST00_COMPL_2ND_CMD = 9155; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST00_COMPL_3RD_CMD = 9156; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST00_DATA_MODE = 9157; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST00_DATA_MODE_LEN = 9158; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST00_DONE = 9159; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST00_ECC_MODE = 9160; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST00_OP_TYPE = 9161; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST00_OP_TYPE_LEN = 9162; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST01_ADDR_RAND_MODE = 9163; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST01_ADDR_REV_MODE = 9164; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST01_ADDR_SEL = 9165; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST01_ADDR_SEL_LEN = 9166; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST01_COMPL_1ST_CMD = 9167; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST01_COMPL_2ND_CMD = 9168; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST01_COMPL_3RD_CMD = 9169; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST01_DATA_MODE = 9170; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST01_DATA_MODE_LEN = 9171; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST01_DONE = 9172; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST01_ECC_MODE = 9173; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST01_OP_TYPE = 9174; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST01_OP_TYPE_LEN = 9175; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST02_ADDR_RAND_MODE = 9176; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST02_ADDR_REV_MODE = 9177; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST02_ADDR_SEL = 9178; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST02_ADDR_SEL_LEN = 9179; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST02_COMPL_1ST_CMD = 9180; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST02_COMPL_2ND_CMD = 9181; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST02_COMPL_3RD_CMD = 9182; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST02_DATA_MODE = 9183; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST02_DATA_MODE_LEN = 9184; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST02_DONE = 9185; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST02_ECC_MODE = 9186; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST02_OP_TYPE = 9187; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST02_OP_TYPE_LEN = 9188; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST03_ADDR_RAND_MODE = 9189; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST03_ADDR_REV_MODE = 9190; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST03_ADDR_SEL = 9191; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST03_ADDR_SEL_LEN = 9192; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST03_COMPL_1ST_CMD = 9193; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST03_COMPL_2ND_CMD = 9194; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST03_COMPL_3RD_CMD = 9195; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST03_DATA_MODE = 9196; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST03_DATA_MODE_LEN = 9197; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST03_DONE = 9198; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST03_ECC_MODE = 9199; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST03_OP_TYPE = 9200; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST03_OP_TYPE_LEN = 9201; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST04_ADDR_RAND_MODE = 9202; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST04_ADDR_REV_MODE = 9203; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST04_ADDR_SEL = 9204; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST04_ADDR_SEL_LEN = 9205; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST04_COMPL_1ST_CMD = 9206; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST04_COMPL_2ND_CMD = 9207; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST04_COMPL_3RD_CMD = 9208; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST04_DATA_MODE = 9209; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST04_DATA_MODE_LEN = 9210; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST04_DONE = 9211; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST04_ECC_MODE = 9212; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST04_OP_TYPE = 9213; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST04_OP_TYPE_LEN = 9214; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST05_ADDR_RAND_MODE = 9215; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST05_ADDR_REV_MODE = 9216; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST05_ADDR_SEL = 9217; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST05_ADDR_SEL_LEN = 9218; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST05_COMPL_1ST_CMD = 9219; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST05_COMPL_2ND_CMD = 9220; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST05_COMPL_3RD_CMD = 9221; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST05_DATA_MODE = 9222; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST05_DATA_MODE_LEN = 9223; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST05_DONE = 9224; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST05_ECC_MODE = 9225; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST05_OP_TYPE = 9226; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST05_OP_TYPE_LEN = 9227; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST06_ADDR_RAND_MODE = 9228; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST06_ADDR_REV_MODE = 9229; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST06_ADDR_SEL = 9230; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST06_ADDR_SEL_LEN = 9231; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST06_COMPL_1ST_CMD = 9232; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST06_COMPL_2ND_CMD = 9233; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST06_COMPL_3RD_CMD = 9234; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST06_DATA_MODE = 9235; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST06_DATA_MODE_LEN = 9236; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST06_DONE = 9237; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST06_ECC_MODE = 9238; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST06_OP_TYPE = 9239; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST06_OP_TYPE_LEN = 9240; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST07_ADDR_RAND_MODE = 9241; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST07_ADDR_REV_MODE = 9242; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST07_ADDR_SEL = 9243; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST07_ADDR_SEL_LEN = 9244; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST07_COMPL_1ST_CMD = 9245; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST07_COMPL_2ND_CMD = 9246; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST07_COMPL_3RD_CMD = 9247; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST07_DATA_MODE = 9248; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST07_DATA_MODE_LEN = 9249; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST07_DONE = 9250; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST07_ECC_MODE = 9251; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST07_OP_TYPE = 9252; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST07_OP_TYPE_LEN = 9253; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST08_ADDR_RAND_MODE = 9254; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST08_ADDR_REV_MODE = 9255; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST08_ADDR_SEL = 9256; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST08_ADDR_SEL_LEN = 9257; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST08_COMPL_1ST_CMD = 9258; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST08_COMPL_2ND_CMD = 9259; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST08_COMPL_3RD_CMD = 9260; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST08_DATA_MODE = 9261; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST08_DATA_MODE_LEN = 9262; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST08_DONE = 9263; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST08_ECC_MODE = 9264; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST08_OP_TYPE = 9265; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST08_OP_TYPE_LEN = 9266; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST09_ADDR_RAND_MODE = 9267; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST09_ADDR_REV_MODE = 9268; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST09_ADDR_SEL = 9269; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST09_ADDR_SEL_LEN = 9270; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST09_COMPL_1ST_CMD = 9271; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST09_COMPL_2ND_CMD = 9272; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST09_COMPL_3RD_CMD = 9273; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST09_DATA_MODE = 9274; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST09_DATA_MODE_LEN = 9275; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST09_DONE = 9276; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST09_ECC_MODE = 9277; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST09_OP_TYPE = 9278; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST09_OP_TYPE_LEN = 9279; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST10_ADDR_RAND_MODE = 9280; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST10_ADDR_REV_MODE = 9281; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST10_ADDR_SEL = 9282; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST10_ADDR_SEL_LEN = 9283; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST10_COMPL_1ST_CMD = 9284; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST10_COMPL_2ND_CMD = 9285; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST10_COMPL_3RD_CMD = 9286; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST10_DATA_MODE = 9287; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST10_DATA_MODE_LEN = 9288; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST10_DONE = 9289; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST10_ECC_MODE = 9290; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST10_OP_TYPE = 9291; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST10_OP_TYPE_LEN = 9292; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST11_ADDR_RAND_MODE = 9293; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST11_ADDR_REV_MODE = 9294; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST11_ADDR_SEL = 9295; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST11_ADDR_SEL_LEN = 9296; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST11_COMPL_1ST_CMD = 9297; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST11_COMPL_2ND_CMD = 9298; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST11_COMPL_3RD_CMD = 9299; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST11_DATA_MODE = 9300; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST11_DATA_MODE_LEN = 9301; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST11_DONE = 9302; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST11_ECC_MODE = 9303; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST11_OP_TYPE = 9304; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST11_OP_TYPE_LEN = 9305; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST12_ADDR_RAND_MODE = 9306; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST12_ADDR_REV_MODE = 9307; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST12_ADDR_SEL = 9308; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST12_ADDR_SEL_LEN = 9309; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST12_COMPL_1ST_CMD = 9310; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST12_COMPL_2ND_CMD = 9311; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST12_COMPL_3RD_CMD = 9312; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST12_DATA_MODE = 9313; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST12_DATA_MODE_LEN = 9314; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST12_DONE = 9315; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST12_ECC_MODE = 9316; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST12_OP_TYPE = 9317; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST12_OP_TYPE_LEN = 9318; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST13_ADDR_RAND_MODE = 9319; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST13_ADDR_REV_MODE = 9320; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST13_ADDR_SEL = 9321; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST13_ADDR_SEL_LEN = 9322; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST13_COMPL_1ST_CMD = 9323; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST13_COMPL_2ND_CMD = 9324; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST13_COMPL_3RD_CMD = 9325; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST13_DATA_MODE = 9326; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST13_DATA_MODE_LEN = 9327; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST13_DONE = 9328; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST13_ECC_MODE = 9329; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST13_OP_TYPE = 9330; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST13_OP_TYPE_LEN = 9331; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST14_ADDR_RAND_MODE = 9332; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST14_ADDR_REV_MODE = 9333; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST14_ADDR_SEL = 9334; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST14_ADDR_SEL_LEN = 9335; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST14_COMPL_1ST_CMD = 9336; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST14_COMPL_2ND_CMD = 9337; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST14_COMPL_3RD_CMD = 9338; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST14_DATA_MODE = 9339; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST14_DATA_MODE_LEN = 9340; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST14_DONE = 9341; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST14_ECC_MODE = 9342; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST14_OP_TYPE = 9343; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST14_OP_TYPE_LEN = 9344; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST15_ADDR_RAND_MODE = 9345; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST15_ADDR_REV_MODE = 9346; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST15_ADDR_SEL = 9347; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST15_ADDR_SEL_LEN = 9348; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST15_COMPL_1ST_CMD = 9349; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST15_COMPL_2ND_CMD = 9350; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST15_COMPL_3RD_CMD = 9351; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST15_DATA_MODE = 9352; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST15_DATA_MODE_LEN = 9353; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST15_DONE = 9354; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST15_ECC_MODE = 9355; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST15_OP_TYPE = 9356; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST15_OP_TYPE_LEN = 9357; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST16_ADDR_RAND_MODE = 9358; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST16_ADDR_REV_MODE = 9359; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST16_ADDR_SEL = 9360; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST16_ADDR_SEL_LEN = 9361; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST16_COMPL_1ST_CMD = 9362; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST16_COMPL_2ND_CMD = 9363; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST16_COMPL_3RD_CMD = 9364; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST16_DATA_MODE = 9365; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST16_DATA_MODE_LEN = 9366; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST16_DONE = 9367; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST16_ECC_MODE = 9368; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST16_OP_TYPE = 9369; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST16_OP_TYPE_LEN = 9370; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST17_ADDR_RAND_MODE = 9371; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST17_ADDR_REV_MODE = 9372; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST17_ADDR_SEL = 9373; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST17_ADDR_SEL_LEN = 9374; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST17_COMPL_1ST_CMD = 9375; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST17_COMPL_2ND_CMD = 9376; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST17_COMPL_3RD_CMD = 9377; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST17_DATA_MODE = 9378; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST17_DATA_MODE_LEN = 9379; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST17_DONE = 9380; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST17_ECC_MODE = 9381; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST17_OP_TYPE = 9382; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST17_OP_TYPE_LEN = 9383; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST18_ADDR_RAND_MODE = 9384; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST18_ADDR_REV_MODE = 9385; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST18_ADDR_SEL = 9386; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST18_ADDR_SEL_LEN = 9387; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST18_COMPL_1ST_CMD = 9388; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST18_COMPL_2ND_CMD = 9389; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST18_COMPL_3RD_CMD = 9390; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST18_DATA_MODE = 9391; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST18_DATA_MODE_LEN = 9392; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST18_DONE = 9393; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST18_ECC_MODE = 9394; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST18_OP_TYPE = 9395; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST18_OP_TYPE_LEN = 9396; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST19_ADDR_RAND_MODE = 9397; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST19_ADDR_REV_MODE = 9398; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST19_ADDR_SEL = 9399; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST19_ADDR_SEL_LEN = 9400; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST19_COMPL_1ST_CMD = 9401; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST19_COMPL_2ND_CMD = 9402; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST19_COMPL_3RD_CMD = 9403; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST19_DATA_MODE = 9404; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST19_DATA_MODE_LEN = 9405; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST19_DONE = 9406; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST19_ECC_MODE = 9407; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST19_OP_TYPE = 9408; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST19_OP_TYPE_LEN = 9409; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST20_ADDR_RAND_MODE = 9410; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST20_ADDR_REV_MODE = 9411; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST20_ADDR_SEL = 9412; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST20_ADDR_SEL_LEN = 9413; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST20_COMPL_1ST_CMD = 9414; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST20_COMPL_2ND_CMD = 9415; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST20_COMPL_3RD_CMD = 9416; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST20_DATA_MODE = 9417; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST20_DATA_MODE_LEN = 9418; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST20_DONE = 9419; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST20_ECC_MODE = 9420; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST20_OP_TYPE = 9421; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST20_OP_TYPE_LEN = 9422; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST21_ADDR_RAND_MODE = 9423; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST21_ADDR_REV_MODE = 9424; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST21_ADDR_SEL = 9425; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST21_ADDR_SEL_LEN = 9426; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST21_COMPL_1ST_CMD = 9427; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST21_COMPL_2ND_CMD = 9428; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST21_COMPL_3RD_CMD = 9429; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST21_DATA_MODE = 9430; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST21_DATA_MODE_LEN = 9431; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST21_DONE = 9432; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST21_ECC_MODE = 9433; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST21_OP_TYPE = 9434; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST21_OP_TYPE_LEN = 9435; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST22_ADDR_RAND_MODE = 9436; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST22_ADDR_REV_MODE = 9437; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST22_ADDR_SEL = 9438; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST22_ADDR_SEL_LEN = 9439; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST22_COMPL_1ST_CMD = 9440; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST22_COMPL_2ND_CMD = 9441; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST22_COMPL_3RD_CMD = 9442; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST22_DATA_MODE = 9443; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST22_DATA_MODE_LEN = 9444; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST22_DONE = 9445; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST22_ECC_MODE = 9446; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST22_OP_TYPE = 9447; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST22_OP_TYPE_LEN = 9448; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST23_ADDR_RAND_MODE = 9449; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST23_ADDR_REV_MODE = 9450; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST23_ADDR_SEL = 9451; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST23_ADDR_SEL_LEN = 9452; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST23_COMPL_1ST_CMD = 9453; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST23_COMPL_2ND_CMD = 9454; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST23_COMPL_3RD_CMD = 9455; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST23_DATA_MODE = 9456; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST23_DATA_MODE_LEN = 9457; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST23_DONE = 9458; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST23_ECC_MODE = 9459; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST23_OP_TYPE = 9460; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST23_OP_TYPE_LEN = 9461; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST24_ADDR_RAND_MODE = 9462; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST24_ADDR_REV_MODE = 9463; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST24_ADDR_SEL = 9464; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST24_ADDR_SEL_LEN = 9465; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST24_COMPL_1ST_CMD = 9466; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST24_COMPL_2ND_CMD = 9467; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST24_COMPL_3RD_CMD = 9468; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST24_DATA_MODE = 9469; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST24_DATA_MODE_LEN = 9470; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST24_DONE = 9471; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST24_ECC_MODE = 9472; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST24_OP_TYPE = 9473; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST24_OP_TYPE_LEN = 9474; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST25_ADDR_RAND_MODE = 9475; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST25_ADDR_REV_MODE = 9476; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST25_ADDR_SEL = 9477; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST25_ADDR_SEL_LEN = 9478; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST25_COMPL_1ST_CMD = 9479; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST25_COMPL_2ND_CMD = 9480; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST25_COMPL_3RD_CMD = 9481; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST25_DATA_MODE = 9482; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST25_DATA_MODE_LEN = 9483; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST25_DONE = 9484; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST25_ECC_MODE = 9485; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST25_OP_TYPE = 9486; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST25_OP_TYPE_LEN = 9487; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST26_ADDR_RAND_MODE = 9488; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST26_ADDR_REV_MODE = 9489; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST26_ADDR_SEL = 9490; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST26_ADDR_SEL_LEN = 9491; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST26_COMPL_1ST_CMD = 9492; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST26_COMPL_2ND_CMD = 9493; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST26_COMPL_3RD_CMD = 9494; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST26_DATA_MODE = 9495; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST26_DATA_MODE_LEN = 9496; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST26_DONE = 9497; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST26_ECC_MODE = 9498; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST26_OP_TYPE = 9499; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST26_OP_TYPE_LEN = 9500; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST27_ADDR_RAND_MODE = 9501; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST27_ADDR_REV_MODE = 9502; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST27_ADDR_SEL = 9503; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST27_ADDR_SEL_LEN = 9504; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST27_COMPL_1ST_CMD = 9505; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST27_COMPL_2ND_CMD = 9506; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST27_COMPL_3RD_CMD = 9507; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST27_DATA_MODE = 9508; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST27_DATA_MODE_LEN = 9509; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST27_DONE = 9510; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST27_ECC_MODE = 9511; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST27_OP_TYPE = 9512; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST27_OP_TYPE_LEN = 9513; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST28_ADDR_RAND_MODE = 9514; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST28_ADDR_REV_MODE = 9515; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST28_ADDR_SEL = 9516; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST28_ADDR_SEL_LEN = 9517; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST28_COMPL_1ST_CMD = 9518; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST28_COMPL_2ND_CMD = 9519; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST28_COMPL_3RD_CMD = 9520; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST28_DATA_MODE = 9521; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST28_DATA_MODE_LEN = 9522; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST28_DONE = 9523; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST28_ECC_MODE = 9524; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST28_OP_TYPE = 9525; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST28_OP_TYPE_LEN = 9526; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST29_ADDR_RAND_MODE = 9527; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST29_ADDR_REV_MODE = 9528; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST29_ADDR_SEL = 9529; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST29_ADDR_SEL_LEN = 9530; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST29_COMPL_1ST_CMD = 9531; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST29_COMPL_2ND_CMD = 9532; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST29_COMPL_3RD_CMD = 9533; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST29_DATA_MODE = 9534; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST29_DATA_MODE_LEN = 9535; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST29_DONE = 9536; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST29_ECC_MODE = 9537; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST29_OP_TYPE = 9538; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST29_OP_TYPE_LEN = 9539; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST30_ADDR_RAND_MODE = 9540; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST30_ADDR_REV_MODE = 9541; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST30_ADDR_SEL = 9542; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST30_ADDR_SEL_LEN = 9543; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST30_COMPL_1ST_CMD = 9544; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST30_COMPL_2ND_CMD = 9545; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST30_COMPL_3RD_CMD = 9546; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST30_DATA_MODE = 9547; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST30_DATA_MODE_LEN = 9548; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST30_DONE = 9549; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST30_ECC_MODE = 9550; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST30_OP_TYPE = 9551; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST30_OP_TYPE_LEN = 9552; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST31_ADDR_RAND_MODE = 9553; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST31_ADDR_REV_MODE = 9554; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST31_ADDR_SEL = 9555; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST31_ADDR_SEL_LEN = 9556; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST31_COMPL_1ST_CMD = 9557; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST31_COMPL_2ND_CMD = 9558; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST31_COMPL_3RD_CMD = 9559; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST31_DATA_MODE = 9560; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST31_DATA_MODE_LEN = 9561; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST31_DONE = 9562; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST31_ECC_MODE = 9563; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST31_OP_TYPE = 9564; // 2 +const static uint64_t SH_FLD_MCBIST_CFG_TEST31_OP_TYPE_LEN = 9565; // 2 +const static uint64_t SH_FLD_MCBIST_DATA_ERROR = 9566; // 10 +const static uint64_t SH_FLD_MCBIST_FSM_INJ_MODE = 9567; // 2 +const static uint64_t SH_FLD_MCBIST_FSM_INJ_REG = 9568; // 2 +const static uint64_t SH_FLD_MCBIST_HALF_COMPARE_MASK = 9569; // 8 +const static uint64_t SH_FLD_MCBIST_HALF_COMPARE_MASK_LEN = 9570; // 8 +const static uint64_t SH_FLD_MCBIST_LOGGED_ERROR_ON_PORT_INDICATOR = 9571; // 2 +const static uint64_t SH_FLD_MCBIST_LOGGED_ERROR_ON_PORT_INDICATOR_LEN = 9572; // 2 +const static uint64_t SH_FLD_MCBIST_MASK_COVERAGE_SELECTOR = 9573; // 8 +const static uint64_t SH_FLD_MCBIST_PROGRAM_COMPLETE = 9574; // 10 +const static uint64_t SH_FLD_MCBIST_SUBTEST_IP = 9575; // 2 +const static uint64_t SH_FLD_MCBIST_SUBTEST_NUM_INDICATOR = 9576; // 2 +const static uint64_t SH_FLD_MCBIST_SUBTEST_NUM_INDICATOR_LEN = 9577; // 2 +const static uint64_t SH_FLD_MCBIST_TRAP_CE_ENABLE = 9578; // 8 +const static uint64_t SH_FLD_MCBIST_TRAP_MPE_ENABLE = 9579; // 8 +const static uint64_t SH_FLD_MCBIST_TRAP_NONSTOP = 9580; // 8 +const static uint64_t SH_FLD_MCBIST_TRAP_UE_ENABLE = 9581; // 8 +const static uint64_t SH_FLD_MCB_CNTLQ_PE_HOLD_OUT = 9582; // 2 +const static uint64_t SH_FLD_MCB_FIR_CCS_ERR_HOLD_OUT = 9583; // 2 +const static uint64_t SH_FLD_MCB_FIR_MCBFSM_ERR_HOLD_OUT = 9584; // 2 +const static uint64_t SH_FLD_MCD_CHICKEN_SWITCH = 9585; // 2 +const static uint64_t SH_FLD_MCEBUSEN0_EVENT_BUS_SELECTS = 9586; // 4 +const static uint64_t SH_FLD_MCEBUSEN0_EVENT_BUS_SELECTS_LEN = 9587; // 4 +const static uint64_t SH_FLD_MCE_SYMBOL0_COUNT = 9588; // 2 +const static uint64_t SH_FLD_MCE_SYMBOL0_COUNT_LEN = 9589; // 2 +const static uint64_t SH_FLD_MCE_SYMBOL1_COUNT = 9590; // 2 +const static uint64_t SH_FLD_MCE_SYMBOL1_COUNT_LEN = 9591; // 2 +const static uint64_t SH_FLD_MCE_SYMBOL2_COUNT = 9592; // 2 +const static uint64_t SH_FLD_MCE_SYMBOL2_COUNT_LEN = 9593; // 2 +const static uint64_t SH_FLD_MCE_SYMBOL3_COUNT = 9594; // 2 +const static uint64_t SH_FLD_MCE_SYMBOL3_COUNT_LEN = 9595; // 2 +const static uint64_t SH_FLD_MCMODE0_64B_WR_IS_PWRT = 9596; // 4 +const static uint64_t SH_FLD_MCPERF1_DISABLE_FASTPATH_QOS = 9597; // 4 +const static uint64_t SH_FLD_MCS_RESET_KEEPER = 9598; // 4 +const static uint64_t SH_FLD_MCS_WAT = 9599; // 4 +const static uint64_t SH_FLD_MC_CHANNELS_PER_GROUP = 9600; // 4 +const static uint64_t SH_FLD_MC_CHANNELS_PER_GROUP_LEN = 9601; // 4 +const static uint64_t SH_FLD_MC_FP_MATE_CMD_ERR0 = 9602; // 12 +const static uint64_t SH_FLD_MC_FP_MATE_CMD_ERR1 = 9603; // 12 +const static uint64_t SH_FLD_MC_INTERNAL_NONRECOVERABLE_ERROR = 9604; // 4 +const static uint64_t SH_FLD_MC_INTERNAL_RECOVERABLE_ERROR = 9605; // 4 +const static uint64_t SH_FLD_MC_TC_0_FIR_HOST_ATTN = 9606; // 2 +const static uint64_t SH_FLD_MC_TC_1_FIR_HOST_ATTN = 9607; // 2 +const static uint64_t SH_FLD_MC_TC_2_FIR_HOST_ATTN = 9608; // 2 +const static uint64_t SH_FLD_MC_TC_3_FIR_HOST_ATTN = 9609; // 2 +const static uint64_t SH_FLD_MC_TC_4_FIR_HOST_ATTN = 9610; // 2 +const static uint64_t SH_FLD_MC_TC_5_FIR_HOST_ATTN = 9611; // 2 +const static uint64_t SH_FLD_MC_TC_6_FIR_HOST_ATTN = 9612; // 2 +const static uint64_t SH_FLD_MC_TC_7_FIR_HOST_ATTN = 9613; // 2 +const static uint64_t SH_FLD_MD5_LATENCY_CFG = 9614; // 1 +const static uint64_t SH_FLD_MDI_0 = 9615; // 8 +const static uint64_t SH_FLD_MDI_1 = 9616; // 8 +const static uint64_t SH_FLD_MED_IDLE_COUNT = 9617; // 8 +const static uint64_t SH_FLD_MED_IDLE_COUNT_LEN = 9618; // 8 +const static uint64_t SH_FLD_MED_IDLE_THRESHOLD = 9619; // 8 +const static uint64_t SH_FLD_MED_IDLE_THRESHOLD_LEN = 9620; // 8 +const static uint64_t SH_FLD_MEM = 9621; // 26 +const static uint64_t SH_FLD_MEMCTL_CIC_FAST = 9622; // 8 +const static uint64_t SH_FLD_MEMCTL_CTRN_IGNORE = 9623; // 8 +const static uint64_t SH_FLD_MEMORY_SIZE_IN_PPE_ADDR_MAP = 9624; // 4 +const static uint64_t SH_FLD_MEMORY_SIZE_IN_PPE_ADDR_MAP_LEN = 9625; // 4 +const static uint64_t SH_FLD_MEMORY_TYPE = 9626; // 8 +const static uint64_t SH_FLD_MEMORY_TYPE_LEN = 9627; // 8 +const static uint64_t SH_FLD_MEM_ADDR = 9628; // 21 +const static uint64_t SH_FLD_MEM_ADDR_LEN = 9629; // 21 +const static uint64_t SH_FLD_MEM_BUSY = 9630; // 21 +const static uint64_t SH_FLD_MEM_BYTE_ENABLE = 9631; // 21 +const static uint64_t SH_FLD_MEM_BYTE_ENABLE_LEN = 9632; // 21 +const static uint64_t SH_FLD_MEM_DATAOP_PENDING = 9633; // 21 +const static uint64_t SH_FLD_MEM_ERROR = 9634; // 21 +const static uint64_t SH_FLD_MEM_ERROR_LEN = 9635; // 21 +const static uint64_t SH_FLD_MEM_HIGH_PRIORITY = 9636; // 4 +const static uint64_t SH_FLD_MEM_HIGH_PRIORITY_LEN = 9637; // 4 +const static uint64_t SH_FLD_MEM_IFETCH_PENDING = 9638; // 21 +const static uint64_t SH_FLD_MEM_IMPRECISE_ERROR_PENDING = 9639; // 21 +const static uint64_t SH_FLD_MEM_LEN = 9640; // 26 +const static uint64_t SH_FLD_MEM_LINE_MODE = 9641; // 21 +const static uint64_t SH_FLD_MEM_LOW_PRIORITY = 9642; // 4 +const static uint64_t SH_FLD_MEM_LOW_PRIORITY_LEN = 9643; // 4 +const static uint64_t SH_FLD_MEM_R_NW = 9644; // 21 +const static uint64_t SH_FLD_MEM_SIZE = 9645; // 6 +const static uint64_t SH_FLD_MEM_SIZE_LEN = 9646; // 6 +const static uint64_t SH_FLD_MERGE_CAPACITY_LIMIT = 9647; // 8 +const static uint64_t SH_FLD_MERGE_CAPACITY_LIMIT_LEN = 9648; // 8 +const static uint64_t SH_FLD_MGR_CREDIT = 9649; // 3 +const static uint64_t SH_FLD_MGR_CREDIT_LEN = 9650; // 3 +const static uint64_t SH_FLD_MIB_GPIO = 9651; // 13 +const static uint64_t SH_FLD_MIB_GPIO_LEN = 9652; // 13 +const static uint64_t SH_FLD_MID_CARE_MASK = 9653; // 4 +const static uint64_t SH_FLD_MID_CARE_MASK_LEN = 9654; // 4 +const static uint64_t SH_FLD_MID_MATCH_VALUE = 9655; // 4 +const static uint64_t SH_FLD_MID_MATCH_VALUE_LEN = 9656; // 4 +const static uint64_t SH_FLD_MINCYCLECNT = 9657; // 3 +const static uint64_t SH_FLD_MINCYCLECNT_LEN = 9658; // 3 +const static uint64_t SH_FLD_MINIKERF = 9659; // 2 +const static uint64_t SH_FLD_MINIKERF_LEN = 9660; // 2 +const static uint64_t SH_FLD_MIN_CYCLE_SAMPLE = 9661; // 12 +const static uint64_t SH_FLD_MIN_CYCLE_SAMPLE_LEN = 9662; // 12 +const static uint64_t SH_FLD_MIN_EYE_HEIGHT = 9663; // 6 +const static uint64_t SH_FLD_MIN_EYE_HEIGHT_LEN = 9664; // 6 +const static uint64_t SH_FLD_MIN_EYE_WIDTH = 9665; // 6 +const static uint64_t SH_FLD_MIN_EYE_WIDTH_LEN = 9666; // 6 +const static uint64_t SH_FLD_MIRROR_ACTION_OCCURRED = 9667; // 4 +const static uint64_t SH_FLD_MISC = 9668; // 10 +const static uint64_t SH_FLD_MISC_CFG = 9669; // 6 +const static uint64_t SH_FLD_MISC_CFG_LEN = 9670; // 6 +const static uint64_t SH_FLD_MISC_CTL_4VS64 = 9671; // 1 +const static uint64_t SH_FLD_MISC_CTL_ACCEPT_PASTE = 9672; // 1 +const static uint64_t SH_FLD_MISC_CTL_CAM_LOCATION = 9673; // 1 +const static uint64_t SH_FLD_MISC_CTL_CAM_LOCATION_LEN = 9674; // 1 +const static uint64_t SH_FLD_MISC_CTL_CQ_IS_IDLE = 9675; // 1 +const static uint64_t SH_FLD_MISC_CTL_EG_IS_IDLE = 9676; // 1 +const static uint64_t SH_FLD_MISC_CTL_ENABLE_WRMON = 9677; // 1 +const static uint64_t SH_FLD_MISC_CTL_INVALIDATE_CAM_ALL = 9678; // 1 +const static uint64_t SH_FLD_MISC_CTL_INVALIDATE_CAM_LOC = 9679; // 1 +const static uint64_t SH_FLD_MISC_CTL_IN_IS_IDLE = 9680; // 1 +const static uint64_t SH_FLD_MISC_CTL_RG_IS_IDLE = 9681; // 1 +const static uint64_t SH_FLD_MISC_CTL_WC_IS_IDLE = 9682; // 1 +const static uint64_t SH_FLD_MISC_CTRL_PERR = 9683; // 1 +const static uint64_t SH_FLD_MISC_DA_ADDR_PERR = 9684; // 1 +const static uint64_t SH_FLD_MISC_INT_RA_PERR = 9685; // 1 +const static uint64_t SH_FLD_MISC_LEN = 9686; // 10 +const static uint64_t SH_FLD_MISC_NMMU_ERR = 9687; // 1 +const static uint64_t SH_FLD_MISC_RESYNC_OSC_FROM = 9688; // 1 +const static uint64_t SH_FLD_MISC_RING_ERR = 9689; // 1 +const static uint64_t SH_FLD_MISC_SCOMSAT00_ERR = 9690; // 1 +const static uint64_t SH_FLD_MISC_SCOMSAT01_ERR = 9691; // 1 +const static uint64_t SH_FLD_MISR_A_VAL = 9692; // 43 +const static uint64_t SH_FLD_MISR_A_VAL_LEN = 9693; // 43 +const static uint64_t SH_FLD_MISR_B_VAL = 9694; // 43 +const static uint64_t SH_FLD_MISR_B_VAL_LEN = 9695; // 43 +const static uint64_t SH_FLD_MISR_INIT_WAIT = 9696; // 43 +const static uint64_t SH_FLD_MISR_INIT_WAIT_LEN = 9697; // 43 +const static uint64_t SH_FLD_MISR_MODE = 9698; // 43 +const static uint64_t SH_FLD_MLC_ACCESS_ERR_ESR = 9699; // 1 +const static uint64_t SH_FLD_MMIOSD = 9700; // 1 +const static uint64_t SH_FLD_MMIO_BAR_PE = 9701; // 1 +const static uint64_t SH_FLD_MMIO_CTL_ACTYPE = 9702; // 1 +const static uint64_t SH_FLD_MMIO_CTL_COMP = 9703; // 1 +const static uint64_t SH_FLD_MMIO_CTL_INIT = 9704; // 1 +const static uint64_t SH_FLD_MMIO_CTL_OFFSET = 9705; // 1 +const static uint64_t SH_FLD_MMIO_CTL_OFFSET_LEN = 9706; // 1 +const static uint64_t SH_FLD_MMIO_CTL_OPTYPE = 9707; // 1 +const static uint64_t SH_FLD_MMIO_CTL_UNUSED = 9708; // 1 +const static uint64_t SH_FLD_MMIO_CTL_UNUSED_LEN = 9709; // 1 +const static uint64_t SH_FLD_MMIO_CTL_WINID = 9710; // 1 +const static uint64_t SH_FLD_MMIO_CTL_WINID_LEN = 9711; // 1 +const static uint64_t SH_FLD_MMIO_HYP_RD_ADDR_ERR = 9712; // 2 +const static uint64_t SH_FLD_MMIO_HYP_WR_ADDR_ERR = 9713; // 2 +const static uint64_t SH_FLD_MMIO_NON8B_HYP_ERR = 9714; // 2 +const static uint64_t SH_FLD_MMIO_NON8B_OS_ERR = 9715; // 2 +const static uint64_t SH_FLD_MMIO_OS_RD_ADDR_ERR = 9716; // 2 +const static uint64_t SH_FLD_MMIO_OS_WR_ADDR_ERR = 9717; // 2 +const static uint64_t SH_FLD_MMR = 9718; // 1 +const static uint64_t SH_FLD_MMR_LEN = 9719; // 1 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_00 = 9720; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_00_LEN = 9721; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_01 = 9722; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_01_LEN = 9723; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_02 = 9724; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_02_LEN = 9725; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_03 = 9726; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_03_LEN = 9727; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_04 = 9728; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_04_LEN = 9729; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_05 = 9730; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_05_LEN = 9731; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_06 = 9732; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_06_LEN = 9733; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_07 = 9734; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_07_LEN = 9735; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_08 = 9736; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_08_LEN = 9737; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_09 = 9738; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_09_LEN = 9739; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_10 = 9740; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_10_LEN = 9741; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_11 = 9742; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_11_LEN = 9743; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_12 = 9744; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_12_LEN = 9745; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_13 = 9746; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_13_LEN = 9747; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_14 = 9748; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_14_LEN = 9749; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_15 = 9750; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_15_LEN = 9751; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_16 = 9752; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_16_LEN = 9753; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_17 = 9754; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_17_LEN = 9755; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_18 = 9756; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_18_LEN = 9757; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_19 = 9758; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_19_LEN = 9759; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_20 = 9760; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_20_LEN = 9761; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_21 = 9762; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_21_LEN = 9763; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_22 = 9764; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_22_LEN = 9765; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_23 = 9766; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_23_LEN = 9767; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_24 = 9768; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_24_LEN = 9769; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_25 = 9770; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_25_LEN = 9771; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_26 = 9772; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_26_LEN = 9773; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_27 = 9774; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_27_LEN = 9775; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_28 = 9776; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_28_LEN = 9777; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_29 = 9778; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_29_LEN = 9779; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_30 = 9780; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_30_LEN = 9781; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_31 = 9782; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_31_LEN = 9783; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_32 = 9784; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_32_LEN = 9785; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_33 = 9786; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_33_LEN = 9787; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_34 = 9788; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_34_LEN = 9789; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_35 = 9790; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_35_LEN = 9791; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_36 = 9792; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_36_LEN = 9793; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_37 = 9794; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_37_LEN = 9795; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_38 = 9796; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_38_LEN = 9797; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_39 = 9798; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_39_LEN = 9799; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_40 = 9800; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_40_LEN = 9801; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_41 = 9802; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_41_LEN = 9803; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_42 = 9804; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_42_LEN = 9805; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_43 = 9806; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_43_LEN = 9807; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_44 = 9808; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_44_LEN = 9809; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_45 = 9810; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_45_LEN = 9811; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_46 = 9812; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_46_LEN = 9813; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_47 = 9814; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_47_LEN = 9815; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_48 = 9816; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_48_LEN = 9817; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_49 = 9818; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_49_LEN = 9819; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_50 = 9820; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_50_LEN = 9821; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_51 = 9822; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_51_LEN = 9823; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_52 = 9824; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_52_LEN = 9825; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_53 = 9826; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_53_LEN = 9827; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_54 = 9828; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_54_LEN = 9829; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_55 = 9830; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_55_LEN = 9831; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_56 = 9832; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_56_LEN = 9833; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_57 = 9834; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_57_LEN = 9835; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_58 = 9836; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_58_LEN = 9837; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_59 = 9838; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_59_LEN = 9839; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_60 = 9840; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_60_LEN = 9841; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_61 = 9842; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_61_LEN = 9843; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_62 = 9844; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_62_LEN = 9845; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_63 = 9846; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_63_LEN = 9847; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_64 = 9848; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_64_LEN = 9849; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_65 = 9850; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_65_LEN = 9851; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_66 = 9852; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_66_LEN = 9853; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_67 = 9854; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_67_LEN = 9855; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_68 = 9856; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_68_LEN = 9857; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_69 = 9858; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_69_LEN = 9859; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_70 = 9860; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_70_LEN = 9861; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_71 = 9862; // 2 +const static uint64_t SH_FLD_MODAL_SYMBOL_COUNTER_71_LEN = 9863; // 2 +const static uint64_t SH_FLD_MODE = 9864; // 150 +const static uint64_t SH_FLD_MODE_128K_VP = 9865; // 1 +const static uint64_t SH_FLD_MODE_LEN = 9866; // 148 +const static uint64_t SH_FLD_MODE_REGISTER_0_VALUE = 9867; // 64 +const static uint64_t SH_FLD_MODE_REGISTER_0_VALUE_LEN = 9868; // 64 +const static uint64_t SH_FLD_MODE_REGISTER_1_VALUE = 9869; // 64 +const static uint64_t SH_FLD_MODE_REGISTER_1_VALUE_LEN = 9870; // 64 +const static uint64_t SH_FLD_MODE_REGISTER_2_VALUE = 9871; // 64 +const static uint64_t SH_FLD_MODE_REGISTER_2_VALUE_LEN = 9872; // 64 +const static uint64_t SH_FLD_MODE_REGISTER_3_VALUE = 9873; // 64 +const static uint64_t SH_FLD_MODE_REGISTER_3_VALUE_LEN = 9874; // 64 +const static uint64_t SH_FLD_MODE_SEL = 9875; // 12 +const static uint64_t SH_FLD_MON = 9876; // 12 +const static uint64_t SH_FLD_MON_LEN = 9877; // 12 +const static uint64_t SH_FLD_MOVE_TO_TB_CORE_ADDRESS = 9878; // 1 +const static uint64_t SH_FLD_MOVE_TO_TB_CORE_ADDRESS_ENABLE = 9879; // 1 +const static uint64_t SH_FLD_MOVE_TO_TB_CORE_ADDRESS_LEN = 9880; // 1 +const static uint64_t SH_FLD_MOVE_TO_TB_CORE_ID = 9881; // 1 +const static uint64_t SH_FLD_MOVE_TO_TB_CORE_ID_LEN = 9882; // 1 +const static uint64_t SH_FLD_MOVE_TO_TB_ON_2X_SYNC_ENABLE = 9883; // 1 +const static uint64_t SH_FLD_MPR_PATTERN_BIT = 9884; // 8 +const static uint64_t SH_FLD_MPSS_DIS = 9885; // 1 +const static uint64_t SH_FLD_MPW1 = 9886; // 43 +const static uint64_t SH_FLD_MPW2 = 9887; // 43 +const static uint64_t SH_FLD_MPW3 = 9888; // 43 +const static uint64_t SH_FLD_MRG_BBRD_NBUF = 9889; // 3 +const static uint64_t SH_FLD_MRG_BBRD_NBUF_LEN = 9890; // 3 +const static uint64_t SH_FLD_MRG_CR_DIS = 9891; // 3 +const static uint64_t SH_FLD_MRG_CTLW_CR_DIS = 9892; // 3 +const static uint64_t SH_FLD_MRG_IBRD_NBUF = 9893; // 3 +const static uint64_t SH_FLD_MRG_IBRD_NBUF_LEN = 9894; // 3 +const static uint64_t SH_FLD_MRG_IBWR_NBUF = 9895; // 3 +const static uint64_t SH_FLD_MRG_IBWR_NBUF_LEN = 9896; // 3 +const static uint64_t SH_FLD_MRG_OBRD_NBUF = 9897; // 3 +const static uint64_t SH_FLD_MRG_OBRD_NBUF_LEN = 9898; // 3 +const static uint64_t SH_FLD_MRG_PBTX_NBUF = 9899; // 3 +const static uint64_t SH_FLD_MRG_PBTX_NBUF_LEN = 9900; // 3 +const static uint64_t SH_FLD_MRG_RDBF_NBUF = 9901; // 3 +const static uint64_t SH_FLD_MRG_RDBF_NBUF_LEN = 9902; // 3 +const static uint64_t SH_FLD_MRS_CMD_DQ_OFF = 9903; // 8 +const static uint64_t SH_FLD_MRS_CMD_DQ_OFF_LEN = 9904; // 8 +const static uint64_t SH_FLD_MRS_CMD_DQ_ON = 9905; // 8 +const static uint64_t SH_FLD_MRS_CMD_DQ_ON_LEN = 9906; // 8 +const static uint64_t SH_FLD_MR_MASK_EN = 9907; // 8 +const static uint64_t SH_FLD_MR_MASK_EN_LEN = 9908; // 8 +const static uint64_t SH_FLD_MSADES_ADDRESS_OF_LBUS_PARITY_1 = 9909; // 1 +const static uint64_t SH_FLD_MSADES_ADDRESS_OF_LBUS_PARITY_1_LEN = 9910; // 1 +const static uint64_t SH_FLD_MSADES_ADDRESS_OF_LBUS_PARITY_2 = 9911; // 1 +const static uint64_t SH_FLD_MSADES_ADDRESS_OF_LBUS_PARITY_2_LEN = 9912; // 1 +const static uint64_t SH_FLD_MSADES_ILLEGAL_OPERATION_ATTEMPTED_1 = 9913; // 1 +const static uint64_t SH_FLD_MSADES_ILLEGAL_OPERATION_ATTEMPTED_2 = 9914; // 1 +const static uint64_t SH_FLD_MSADES_LBUS_B_RAM_PARITY_DETECTED_1 = 9915; // 1 +const static uint64_t SH_FLD_MSADES_LBUS_B_RAM_PARITY_DETECTED_2 = 9916; // 1 +const static uint64_t SH_FLD_MSADES_READ_EMPTY_PIB_1 = 9917; // 1 +const static uint64_t SH_FLD_MSADES_READ_EMPTY_PIB_2 = 9918; // 1 +const static uint64_t SH_FLD_MSADES_UNUSED_15_12 = 9919; // 1 +const static uint64_t SH_FLD_MSADES_UNUSED_15_12_LEN = 9920; // 1 +const static uint64_t SH_FLD_MSADES_UNUSED_31_28 = 9921; // 1 +const static uint64_t SH_FLD_MSADES_UNUSED_31_28_LEN = 9922; // 1 +const static uint64_t SH_FLD_MSADES_WRITE_FULL_PIB_1 = 9923; // 1 +const static uint64_t SH_FLD_MSADES_WRITE_FULL_PIB_2 = 9924; // 1 +const static uint64_t SH_FLD_MSADI_PIB_ERROR_1 = 9925; // 1 +const static uint64_t SH_FLD_MSADI_PIB_ERROR_2 = 9926; // 1 +const static uint64_t SH_FLD_MSADI_PIB_PENDING_1 = 9927; // 1 +const static uint64_t SH_FLD_MSADI_PIB_PENDING_2 = 9928; // 1 +const static uint64_t SH_FLD_MSADI_UNUSED_31_11 = 9929; // 4 +const static uint64_t SH_FLD_MSADI_UNUSED_31_11_LEN = 9930; // 4 +const static uint64_t SH_FLD_MSADI_UNUSED_7_3 = 9931; // 1 +const static uint64_t SH_FLD_MSADI_UNUSED_7_3_LEN = 9932; // 1 +const static uint64_t SH_FLD_MSADI_XUP_1 = 9933; // 1 +const static uint64_t SH_FLD_MSADI_XUP_2 = 9934; // 1 +const static uint64_t SH_FLD_MSBDES_ADDRESS_OF_PIB_PARITY_1 = 9935; // 1 +const static uint64_t SH_FLD_MSBDES_ADDRESS_OF_PIB_PARITY_1_LEN = 9936; // 1 +const static uint64_t SH_FLD_MSBDES_ADDRESS_OF_PIB_PARITY_2 = 9937; // 1 +const static uint64_t SH_FLD_MSBDES_ADDRESS_OF_PIB_PARITY_2_LEN = 9938; // 1 +const static uint64_t SH_FLD_MSBDES_ILLEGAL_OPERATION_ATTEMPTED_1 = 9939; // 1 +const static uint64_t SH_FLD_MSBDES_ILLEGAL_OPERATION_ATTEMPTED_2 = 9940; // 1 +const static uint64_t SH_FLD_MSBDES_PIB_A_RAM_PARITY_DETECTED_1 = 9941; // 1 +const static uint64_t SH_FLD_MSBDES_PIB_A_RAM_PARITY_DETECTED_2 = 9942; // 1 +const static uint64_t SH_FLD_MSBDES_READ_EMPTY_PIB_A_1 = 9943; // 1 +const static uint64_t SH_FLD_MSBDES_READ_EMPTY_PIB_A_2 = 9944; // 1 +const static uint64_t SH_FLD_MSBDES_UNUSED_17_12 = 9945; // 1 +const static uint64_t SH_FLD_MSBDES_UNUSED_17_12_LEN = 9946; // 1 +const static uint64_t SH_FLD_MSBDES_UNUSED_1_0 = 9947; // 2 +const static uint64_t SH_FLD_MSBDES_UNUSED_1_0_LEN = 9948; // 2 +const static uint64_t SH_FLD_MSBDES_UNUSED_31_28 = 9949; // 1 +const static uint64_t SH_FLD_MSBDES_UNUSED_31_28_LEN = 9950; // 1 +const static uint64_t SH_FLD_MSBDES_WRITE_FULL_PIB_A_1 = 9951; // 1 +const static uint64_t SH_FLD_MSBDES_WRITE_FULL_PIB_A_2 = 9952; // 1 +const static uint64_t SH_FLD_MSBDIM1_ENABLE_ABORT = 9953; // 1 +const static uint64_t SH_FLD_MSBDIM1_ENABLE_ABORT_2 = 9954; // 1 +const static uint64_t SH_FLD_MSBDIM1_ENABLE_LBUS_ERROR = 9955; // 1 +const static uint64_t SH_FLD_MSBDIM1_ENABLE_LBUS_ERROR_2 = 9956; // 1 +const static uint64_t SH_FLD_MSBDIM1_ENABLE_LBUS_PENDING = 9957; // 1 +const static uint64_t SH_FLD_MSBDIM1_ENABLE_LBUS_PENDING_2 = 9958; // 1 +const static uint64_t SH_FLD_MSBDIM1_ENABLE_XDN = 9959; // 1 +const static uint64_t SH_FLD_MSBDIM1_ENABLE_XDN_2 = 9960; // 1 +const static uint64_t SH_FLD_MSBDI_LBUS_ERROR_1 = 9961; // 1 +const static uint64_t SH_FLD_MSBDI_LBUS_ERROR_2 = 9962; // 1 +const static uint64_t SH_FLD_MSBDI_LBUS_PENDING_1 = 9963; // 1 +const static uint64_t SH_FLD_MSBDI_LBUS_PENDING_2 = 9964; // 1 +const static uint64_t SH_FLD_MSBDI_XDN_1 = 9965; // 1 +const static uint64_t SH_FLD_MSBDI_XDN_2 = 9966; // 1 +const static uint64_t SH_FLD_MSBSWAP = 9967; // 4 +const static uint64_t SH_FLD_MSC_BUS0_STG1_SEL = 9968; // 1 +const static uint64_t SH_FLD_MSC_BUS0_STG2_SEL = 9969; // 1 +const static uint64_t SH_FLD_MSC_BUS1_STG1_SEL = 9970; // 1 +const static uint64_t SH_FLD_MSC_BUS1_STG2_SEL = 9971; // 1 +const static uint64_t SH_FLD_MSG_ADDR_ERR = 9972; // 12 +const static uint64_t SH_FLD_MSK = 9973; // 5 +const static uint64_t SH_FLD_MSK_LEN = 9974; // 5 +const static uint64_t SH_FLD_MSM_CURR_STATE_0 = 9975; // 1 +const static uint64_t SH_FLD_MSM_CURR_STATE_0_LEN = 9976; // 1 +const static uint64_t SH_FLD_MSM_CURR_STATE_1 = 9977; // 1 +const static uint64_t SH_FLD_MSM_CURR_STATE_1_LEN = 9978; // 1 +const static uint64_t SH_FLD_MSM_CURR_STATE_2 = 9979; // 1 +const static uint64_t SH_FLD_MSM_CURR_STATE_2_LEN = 9980; // 1 +const static uint64_t SH_FLD_MSM_CURR_STATE_3 = 9981; // 1 +const static uint64_t SH_FLD_MSM_CURR_STATE_3_LEN = 9982; // 1 +const static uint64_t SH_FLD_MSR_DR = 9983; // 256 +const static uint64_t SH_FLD_MSR_HV = 9984; // 256 +const static uint64_t SH_FLD_MSR_PR = 9985; // 256 +const static uint64_t SH_FLD_MSR_SF = 9986; // 256 +const static uint64_t SH_FLD_MSR_TA = 9987; // 256 +const static uint64_t SH_FLD_MSR_US = 9988; // 256 +const static uint64_t SH_FLD_MSR_UV = 9989; // 256 +const static uint64_t SH_FLD_MST_DIS_ABUSPAREN = 9990; // 1 +const static uint64_t SH_FLD_MST_DIS_BEPAREN = 9991; // 1 +const static uint64_t SH_FLD_MST_DIS_RDDBUSPAR = 9992; // 1 +const static uint64_t SH_FLD_MST_DIS_WRDBUSPAREN = 9993; // 1 +const static uint64_t SH_FLD_MST_SPARE = 9994; // 1 +const static uint64_t SH_FLD_MS_GROUP_CHIP = 9995; // 2 +const static uint64_t SH_FLD_MS_GROUP_CHIP_LEN = 9996; // 2 +const static uint64_t SH_FLD_MULTICAST1 = 9997; // 43 +const static uint64_t SH_FLD_MULTICAST1_LEN = 9998; // 43 +const static uint64_t SH_FLD_MULTICAST2 = 9999; // 43 +const static uint64_t SH_FLD_MULTICAST2_LEN = 10000; // 43 +const static uint64_t SH_FLD_MULTICAST3 = 10001; // 43 +const static uint64_t SH_FLD_MULTICAST3_LEN = 10002; // 43 +const static uint64_t SH_FLD_MULTICAST4 = 10003; // 43 +const static uint64_t SH_FLD_MULTICAST4_LEN = 10004; // 43 +const static uint64_t SH_FLD_MULTICAST_COMPARE_REGISTER = 10005; // 2 +const static uint64_t SH_FLD_MULTICAST_COMPARE_REGISTER_LEN = 10006; // 2 +const static uint64_t SH_FLD_MULTICAST_COMPARE_VALUE_REGISTER = 10007; // 1 +const static uint64_t SH_FLD_MULTICAST_COMPARE_VALUE_REGISTER_LEN = 10008; // 1 +const static uint64_t SH_FLD_MULTIPLE_BAR = 10009; // 4 +const static uint64_t SH_FLD_MULTIPLE_DIR_ERRORS_DETECTED = 10010; // 12 +const static uint64_t SH_FLD_MULTIPLE_REQ = 10011; // 8 +const static uint64_t SH_FLD_MULTIPLE_REQ_SOURCE = 10012; // 8 +const static uint64_t SH_FLD_MULTIPLE_REQ_SOURCE_LEN = 10013; // 8 +const static uint64_t SH_FLD_MULT_REQ_ERR_MASK = 10014; // 8 +const static uint64_t SH_FLD_MUOP_ERROR_1 = 10015; // 4 +const static uint64_t SH_FLD_MUOP_ERROR_2 = 10016; // 4 +const static uint64_t SH_FLD_MUOP_ERROR_3 = 10017; // 4 +const static uint64_t SH_FLD_MUXEN = 10018; // 4 +const static uint64_t SH_FLD_MUXSEL = 10019; // 4 +const static uint64_t SH_FLD_MUXSEL_LEN = 10020; // 4 +const static uint64_t SH_FLD_M_0_STEP_ALIGN_FSM_STATE = 10021; // 1 +const static uint64_t SH_FLD_M_0_STEP_ALIGN_FSM_STATE_LEN = 10022; // 1 +const static uint64_t SH_FLD_M_1_STEP_ALIGN_FSM_STATE = 10023; // 1 +const static uint64_t SH_FLD_M_1_STEP_ALIGN_FSM_STATE_LEN = 10024; // 1 +const static uint64_t SH_FLD_M_CPS_ENABLE = 10025; // 1 +const static uint64_t SH_FLD_M_PATH_0_OSC_NOT_VALID = 10026; // 1 +const static uint64_t SH_FLD_M_PATH_0_PARITY = 10027; // 4 +const static uint64_t SH_FLD_M_PATH_0_STEP_ALIGN_THRESHOLD_ENABLE = 10028; // 1 +const static uint64_t SH_FLD_M_PATH_0_STEP_ALIGN_VALID_SWITCH = 10029; // 1 +const static uint64_t SH_FLD_M_PATH_0_STEP_CHECK = 10030; // 4 +const static uint64_t SH_FLD_M_PATH_0_STEP_CHECK_VALID = 10031; // 1 +const static uint64_t SH_FLD_M_PATH_0_STEP_CREATE_THRESHOLD_ENABLE = 10032; // 1 +const static uint64_t SH_FLD_M_PATH_0_SYNC_CREATE_COUNTER_ENABLE = 10033; // 1 +const static uint64_t SH_FLD_M_PATH_1_OSC_NOT_VALID = 10034; // 1 +const static uint64_t SH_FLD_M_PATH_1_PARITY = 10035; // 4 +const static uint64_t SH_FLD_M_PATH_1_STEP_ALIGN_THRESHOLD_ENABLE = 10036; // 1 +const static uint64_t SH_FLD_M_PATH_1_STEP_ALIGN_VALID_SWITCH = 10037; // 1 +const static uint64_t SH_FLD_M_PATH_1_STEP_CHECK = 10038; // 4 +const static uint64_t SH_FLD_M_PATH_1_STEP_CHECK_VALID = 10039; // 1 +const static uint64_t SH_FLD_M_PATH_1_STEP_CREATE_THRESHOLD_ENABLE = 10040; // 1 +const static uint64_t SH_FLD_M_PATH_1_SYNC_CREATE_COUNTER_ENABLE = 10041; // 1 +const static uint64_t SH_FLD_M_PATH_CLOCK_OFF_ENABLE = 10042; // 1 +const static uint64_t SH_FLD_M_PATH_SELECT = 10043; // 1 +const static uint64_t SH_FLD_M_PATH_SWITCH_TRIGGER = 10044; // 1 +const static uint64_t SH_FLD_NACK_RECEIVED_ERROR_0 = 10045; // 2 +const static uint64_t SH_FLD_NACK_RECEIVED_ERROR_1 = 10046; // 2 +const static uint64_t SH_FLD_NACK_RECEIVED_ERROR_2 = 10047; // 2 +const static uint64_t SH_FLD_NACK_RECEIVED_ERROR_3 = 10048; // 2 +const static uint64_t SH_FLD_NB_CLEAN_SLOT = 10049; // 6 +const static uint64_t SH_FLD_NB_CLEAN_SLOT_LEN = 10050; // 6 +const static uint64_t SH_FLD_NB_WRITE_SLOT = 10051; // 6 +const static uint64_t SH_FLD_NB_WRITE_SLOT_LEN = 10052; // 6 +const static uint64_t SH_FLD_NCU_POWERBUS_DATA_TIMEOUT = 10053; // 12 +const static uint64_t SH_FLD_NCU_PURGE = 10054; // 12 +const static uint64_t SH_FLD_NCU_PURGE_ABORT = 10055; // 12 +const static uint64_t SH_FLD_NCU_PURGE_DONE = 10056; // 24 +const static uint64_t SH_FLD_NCU_TLBIE_QUIESCE = 10057; // 12 +const static uint64_t SH_FLD_NDLMUX_BRK0TO2 = 10058; // 1 +const static uint64_t SH_FLD_NDLMUX_BRK0TO2_LEN = 10059; // 1 +const static uint64_t SH_FLD_NDL_BRK0_NOSTALL = 10060; // 1 +const static uint64_t SH_FLD_NDL_BRK0_STALL = 10061; // 1 +const static uint64_t SH_FLD_NDL_BRK1_NOSTALL = 10062; // 1 +const static uint64_t SH_FLD_NDL_BRK1_STALL = 10063; // 1 +const static uint64_t SH_FLD_NDL_BRK2_NOSTALL = 10064; // 1 +const static uint64_t SH_FLD_NDL_BRK2_STALL = 10065; // 1 +const static uint64_t SH_FLD_NDL_BRK3_NOSTALL = 10066; // 1 +const static uint64_t SH_FLD_NDL_BRK3_STALL = 10067; // 1 +const static uint64_t SH_FLD_NDL_BRK4_NOSTALL = 10068; // 1 +const static uint64_t SH_FLD_NDL_BRK4_STALL = 10069; // 1 +const static uint64_t SH_FLD_NDL_BRK5_NOSTALL = 10070; // 1 +const static uint64_t SH_FLD_NDL_BRK5_STALL = 10071; // 1 +const static uint64_t SH_FLD_NDL_PRI_PARITY_ENA = 10072; // 6 +const static uint64_t SH_FLD_NDL_RX_PARITY_ENA = 10073; // 6 +const static uint64_t SH_FLD_NDL_TX_PARITY_ENA = 10074; // 6 +const static uint64_t SH_FLD_NEAR_NODAL_EPSILON = 10075; // 8 +const static uint64_t SH_FLD_NEAR_NODAL_EPSILON_LEN = 10076; // 8 +const static uint64_t SH_FLD_NEST_DBG_SEL_IN = 10077; // 8 +const static uint64_t SH_FLD_NEST_DBG_SEL_WRT = 10078; // 8 +const static uint64_t SH_FLD_NEXT_RANK = 10079; // 8 +const static uint64_t SH_FLD_NEXT_RANK_LEN = 10080; // 8 +const static uint64_t SH_FLD_NEXT_RANK_PAIR = 10081; // 8 +const static uint64_t SH_FLD_NEXT_RANK_PAIR_LEN = 10082; // 8 +const static uint64_t SH_FLD_NFIRACTION0 = 10083; // 9 +const static uint64_t SH_FLD_NFIRACTION0_LEN = 10084; // 9 +const static uint64_t SH_FLD_NFIRACTION1 = 10085; // 9 +const static uint64_t SH_FLD_NFIRACTION1_LEN = 10086; // 9 +const static uint64_t SH_FLD_NMMU_LOCAL_XSTOP = 10087; // 1 +const static uint64_t SH_FLD_NONBAR_PE = 10088; // 9 +const static uint64_t SH_FLD_NONBAR_PE_MASK = 10089; // 9 +const static uint64_t SH_FLD_NONRD_ARE_ERRORS = 10090; // 9 +const static uint64_t SH_FLD_NONRD_ARE_ERRORS_MASK = 10091; // 9 +const static uint64_t SH_FLD_NONSLS_CNTR_TAP_PTS = 10092; // 4 +const static uint64_t SH_FLD_NONSLS_CNTR_TAP_PTS_LEN = 10093; // 4 +const static uint64_t SH_FLD_NONZERO_CSB_CC = 10094; // 1 +const static uint64_t SH_FLD_NOTIFY_FAILED_ERR = 10095; // 2 +const static uint64_t SH_FLD_NOT_USED_0 = 10096; // 1 +const static uint64_t SH_FLD_NOT_USED_0_LEN = 10097; // 1 +const static uint64_t SH_FLD_NOT_USED_1 = 10098; // 1 +const static uint64_t SH_FLD_NOT_USED_1_LEN = 10099; // 1 +const static uint64_t SH_FLD_NOT_USED_2 = 10100; // 1 +const static uint64_t SH_FLD_NOT_USED_2_LEN = 10101; // 1 +const static uint64_t SH_FLD_NOT_USED_3 = 10102; // 1 +const static uint64_t SH_FLD_NOT_USED_3_LEN = 10103; // 1 +const static uint64_t SH_FLD_NO_WAIT_ON_CLK_CMD = 10104; // 43 +const static uint64_t SH_FLD_NR_OF_FRAMES = 10105; // 1 +const static uint64_t SH_FLD_NSEG_MAIN_EN = 10106; // 6 +const static uint64_t SH_FLD_NSEG_MAIN_EN_LEN = 10107; // 6 +const static uint64_t SH_FLD_NSEG_MARGINPD_EN = 10108; // 6 +const static uint64_t SH_FLD_NSEG_MARGINPD_EN_LEN = 10109; // 6 +const static uint64_t SH_FLD_NSEG_MARGINPU_EN = 10110; // 6 +const static uint64_t SH_FLD_NSEG_MARGINPU_EN_LEN = 10111; // 6 +const static uint64_t SH_FLD_NSEG_POST_EN = 10112; // 2 +const static uint64_t SH_FLD_NSEG_POST_EN_LEN = 10113; // 2 +const static uint64_t SH_FLD_NSEG_POST_SEL = 10114; // 2 +const static uint64_t SH_FLD_NSEG_POST_SEL_LEN = 10115; // 2 +const static uint64_t SH_FLD_NSEG_PRE_EN = 10116; // 6 +const static uint64_t SH_FLD_NSEG_PRE_EN_LEN = 10117; // 6 +const static uint64_t SH_FLD_NSEG_PRE_SEL = 10118; // 6 +const static uint64_t SH_FLD_NSEG_PRE_SEL_LEN = 10119; // 6 +const static uint64_t SH_FLD_NSL_FILL_COUNT = 10120; // 43 +const static uint64_t SH_FLD_NSL_FILL_COUNT_LEN = 10121; // 43 +const static uint64_t SH_FLD_NTLR_PAUSE_THRESH = 10122; // 3 +const static uint64_t SH_FLD_NTLR_PAUSE_THRESH_LEN = 10123; // 3 +const static uint64_t SH_FLD_NTLW_PAUSE_THRESH = 10124; // 3 +const static uint64_t SH_FLD_NTLW_PAUSE_THRESH_LEN = 10125; // 3 +const static uint64_t SH_FLD_NTL_0 = 10126; // 36 +const static uint64_t SH_FLD_NTL_1 = 10127; // 36 +const static uint64_t SH_FLD_NTL_10 = 10128; // 36 +const static uint64_t SH_FLD_NTL_11 = 10129; // 36 +const static uint64_t SH_FLD_NTL_12 = 10130; // 36 +const static uint64_t SH_FLD_NTL_13 = 10131; // 36 +const static uint64_t SH_FLD_NTL_14 = 10132; // 36 +const static uint64_t SH_FLD_NTL_15 = 10133; // 36 +const static uint64_t SH_FLD_NTL_16 = 10134; // 36 +const static uint64_t SH_FLD_NTL_17 = 10135; // 36 +const static uint64_t SH_FLD_NTL_18 = 10136; // 36 +const static uint64_t SH_FLD_NTL_19 = 10137; // 36 +const static uint64_t SH_FLD_NTL_2 = 10138; // 36 +const static uint64_t SH_FLD_NTL_20 = 10139; // 36 +const static uint64_t SH_FLD_NTL_21 = 10140; // 36 +const static uint64_t SH_FLD_NTL_22 = 10141; // 36 +const static uint64_t SH_FLD_NTL_23 = 10142; // 36 +const static uint64_t SH_FLD_NTL_24 = 10143; // 36 +const static uint64_t SH_FLD_NTL_25 = 10144; // 36 +const static uint64_t SH_FLD_NTL_26 = 10145; // 36 +const static uint64_t SH_FLD_NTL_27 = 10146; // 36 +const static uint64_t SH_FLD_NTL_28 = 10147; // 36 +const static uint64_t SH_FLD_NTL_29 = 10148; // 36 +const static uint64_t SH_FLD_NTL_3 = 10149; // 36 +const static uint64_t SH_FLD_NTL_30 = 10150; // 36 +const static uint64_t SH_FLD_NTL_31 = 10151; // 36 +const static uint64_t SH_FLD_NTL_32 = 10152; // 36 +const static uint64_t SH_FLD_NTL_33 = 10153; // 36 +const static uint64_t SH_FLD_NTL_34 = 10154; // 36 +const static uint64_t SH_FLD_NTL_35 = 10155; // 36 +const static uint64_t SH_FLD_NTL_36 = 10156; // 36 +const static uint64_t SH_FLD_NTL_37 = 10157; // 36 +const static uint64_t SH_FLD_NTL_38 = 10158; // 36 +const static uint64_t SH_FLD_NTL_39 = 10159; // 36 +const static uint64_t SH_FLD_NTL_4 = 10160; // 36 +const static uint64_t SH_FLD_NTL_40 = 10161; // 36 +const static uint64_t SH_FLD_NTL_41 = 10162; // 36 +const static uint64_t SH_FLD_NTL_42 = 10163; // 36 +const static uint64_t SH_FLD_NTL_43 = 10164; // 36 +const static uint64_t SH_FLD_NTL_44 = 10165; // 36 +const static uint64_t SH_FLD_NTL_45 = 10166; // 36 +const static uint64_t SH_FLD_NTL_46 = 10167; // 36 +const static uint64_t SH_FLD_NTL_47 = 10168; // 36 +const static uint64_t SH_FLD_NTL_48 = 10169; // 36 +const static uint64_t SH_FLD_NTL_49 = 10170; // 36 +const static uint64_t SH_FLD_NTL_5 = 10171; // 36 +const static uint64_t SH_FLD_NTL_50 = 10172; // 36 +const static uint64_t SH_FLD_NTL_51 = 10173; // 36 +const static uint64_t SH_FLD_NTL_52 = 10174; // 36 +const static uint64_t SH_FLD_NTL_53 = 10175; // 36 +const static uint64_t SH_FLD_NTL_54 = 10176; // 36 +const static uint64_t SH_FLD_NTL_55 = 10177; // 36 +const static uint64_t SH_FLD_NTL_56 = 10178; // 36 +const static uint64_t SH_FLD_NTL_57 = 10179; // 36 +const static uint64_t SH_FLD_NTL_58 = 10180; // 36 +const static uint64_t SH_FLD_NTL_59 = 10181; // 36 +const static uint64_t SH_FLD_NTL_6 = 10182; // 36 +const static uint64_t SH_FLD_NTL_60 = 10183; // 36 +const static uint64_t SH_FLD_NTL_61 = 10184; // 36 +const static uint64_t SH_FLD_NTL_62 = 10185; // 36 +const static uint64_t SH_FLD_NTL_63 = 10186; // 36 +const static uint64_t SH_FLD_NTL_7 = 10187; // 36 +const static uint64_t SH_FLD_NTL_8 = 10188; // 36 +const static uint64_t SH_FLD_NTL_9 = 10189; // 36 +const static uint64_t SH_FLD_NTL_ARRAY_CE = 10190; // 1 +const static uint64_t SH_FLD_NTL_ARRAY_DATA_UE = 10191; // 1 +const static uint64_t SH_FLD_NTL_ARRAY_HDR_UE = 10192; // 1 +const static uint64_t SH_FLD_NTL_LOGIC_ERR = 10193; // 1 +const static uint64_t SH_FLD_NTL_NVL_CONFIG_ERR = 10194; // 1 +const static uint64_t SH_FLD_NTL_NVL_CRC_ERR = 10195; // 1 +const static uint64_t SH_FLD_NTL_NVL_DATA_PERR = 10196; // 1 +const static uint64_t SH_FLD_NTL_NVL_FLIT_PERR = 10197; // 1 +const static uint64_t SH_FLD_NTL_NVL_PKT_MALFOR = 10198; // 1 +const static uint64_t SH_FLD_NTL_NVL_PKT_UNSUPPORTED = 10199; // 1 +const static uint64_t SH_FLD_NTL_PRI_ERR = 10200; // 1 +const static uint64_t SH_FLD_NTTM_MODE = 10201; // 2 +const static uint64_t SH_FLD_NTTM_RW_DATA_DLY = 10202; // 2 +const static uint64_t SH_FLD_NTTM_RW_DATA_DLY_LEN = 10203; // 2 +const static uint64_t SH_FLD_NULL_MSR_LP = 10204; // 46 +const static uint64_t SH_FLD_NULL_MSR_SIBRC = 10205; // 46 +const static uint64_t SH_FLD_NULL_MSR_SIBRC_LEN = 10206; // 46 +const static uint64_t SH_FLD_NULL_MSR_WE = 10207; // 46 +const static uint64_t SH_FLD_NUM_BLOCKS = 10208; // 12 +const static uint64_t SH_FLD_NUM_BLOCKS_LEN = 10209; // 12 +const static uint64_t SH_FLD_NUM_CL_ACTIVE = 10210; // 8 +const static uint64_t SH_FLD_NUM_CL_ACTIVE_LEN = 10211; // 8 +const static uint64_t SH_FLD_NUM_HA_RSVD = 10212; // 8 +const static uint64_t SH_FLD_NUM_HA_RSVD_LEN = 10213; // 8 +const static uint64_t SH_FLD_NUM_HA_RSVD_SEL = 10214; // 8 +const static uint64_t SH_FLD_NUM_HA_RSVD_SEL_LEN = 10215; // 8 +const static uint64_t SH_FLD_NUM_HPC_RD_RSVD = 10216; // 8 +const static uint64_t SH_FLD_NUM_HPC_RD_RSVD_LEN = 10217; // 8 +const static uint64_t SH_FLD_NUM_HTM_RSVD = 10218; // 8 +const static uint64_t SH_FLD_NUM_HTM_RSVD_LEN = 10219; // 8 +const static uint64_t SH_FLD_NUM_HTM_RSVD_SEL = 10220; // 8 +const static uint64_t SH_FLD_NUM_HTM_RSVD_SEL_LEN = 10221; // 8 +const static uint64_t SH_FLD_NUM_SEC_MIRROR_RSVD = 10222; // 8 +const static uint64_t SH_FLD_NUM_SEC_MIRROR_RSVD_LEN = 10223; // 8 +const static uint64_t SH_FLD_NUM_SEC_MIRROR_RSVD_SEL = 10224; // 8 +const static uint64_t SH_FLD_NUM_SEC_MIRROR_RSVD_SEL_LEN = 10225; // 8 +const static uint64_t SH_FLD_NUM_VALID_SAMPLES = 10226; // 8 +const static uint64_t SH_FLD_NUM_VALID_SAMPLES_LEN = 10227; // 8 +const static uint64_t SH_FLD_NXCQ_ERAT_ARRAY_ACTION = 10228; // 1 +const static uint64_t SH_FLD_NXCQ_ERAT_ARRAY_ENABLE = 10229; // 1 +const static uint64_t SH_FLD_NXCQ_ERAT_ARRAY_SELECT = 10230; // 1 +const static uint64_t SH_FLD_NXCQ_ERAT_ARRAY_SELECT_LEN = 10231; // 1 +const static uint64_t SH_FLD_NXCQ_ERAT_ARRAY_TYPE = 10232; // 1 +const static uint64_t SH_FLD_NXCQ_INJECT_MODE = 10233; // 2 +const static uint64_t SH_FLD_NXCQ_INJECT_MODE_LEN = 10234; // 2 +const static uint64_t SH_FLD_NXCQ_INJECT_TYPE = 10235; // 2 +const static uint64_t SH_FLD_NXCQ_INJECT_TYPE_LEN = 10236; // 2 +const static uint64_t SH_FLD_NXCQ_PBCQ_ARRAY = 10237; // 2 +const static uint64_t SH_FLD_NXCQ_PBCQ_ARRAY_LEN = 10238; // 2 +const static uint64_t SH_FLD_NXCQ_PBCQ_INJECT_ENABLE = 10239; // 2 +const static uint64_t SH_FLD_NXCQ_RNG_INJECT_ACTION = 10240; // 1 +const static uint64_t SH_FLD_NXCQ_RNG_INJECT_ENABLE = 10241; // 1 +const static uint64_t SH_FLD_NXCQ_TRACE_CNTL = 10242; // 2 +const static uint64_t SH_FLD_NXCQ_TRACE_CNTL_LEN = 10243; // 2 +const static uint64_t SH_FLD_NXWR_CFG = 10244; // 1 +const static uint64_t SH_FLD_NXWR_CFG_LEN = 10245; // 1 +const static uint64_t SH_FLD_NXWR_DISABLE_CP = 10246; // 1 +const static uint64_t SH_FLD_NX_FREEZE_MODES = 10247; // 1 +const static uint64_t SH_FLD_NX_FREEZE_MODES_LEN = 10248; // 1 +const static uint64_t SH_FLD_NX_LOCAL_XSTOP = 10249; // 2 +const static uint64_t SH_FLD_O = 10250; // 1 +const static uint64_t SH_FLD_O2SCMD_A_N_RESERVED_0 = 10251; // 4 +const static uint64_t SH_FLD_O2SCTRL1_A_N_RESERVED_1 = 10252; // 4 +const static uint64_t SH_FLD_O2SCTRL1_A_N_RESERVED_14_16 = 10253; // 4 +const static uint64_t SH_FLD_O2SCTRL1_A_N_RESERVED_14_16_LEN = 10254; // 4 +const static uint64_t SH_FLD_O2SST_A_N_RESERVED_1_4 = 10255; // 4 +const static uint64_t SH_FLD_O2SST_A_N_RESERVED_1_4_LEN = 10256; // 4 +const static uint64_t SH_FLD_O2SST_A_N_RESERVED_6 = 10257; // 4 +const static uint64_t SH_FLD_O2S_BRIDGE_ENABLE_A_N = 10258; // 4 +const static uint64_t SH_FLD_O2S_CLEAR_STICKY_BITS_A_N = 10259; // 4 +const static uint64_t SH_FLD_O2S_CLOCK_DIVIDER_A_N = 10260; // 4 +const static uint64_t SH_FLD_O2S_CLOCK_DIVIDER_A_N_LEN = 10261; // 4 +const static uint64_t SH_FLD_O2S_CPHA_A_N = 10262; // 4 +const static uint64_t SH_FLD_O2S_CPOL_A_N = 10263; // 4 +const static uint64_t SH_FLD_O2S_FRAME_SIZE_A_N = 10264; // 4 +const static uint64_t SH_FLD_O2S_FRAME_SIZE_A_N_LEN = 10265; // 4 +const static uint64_t SH_FLD_O2S_FSM_ERR_A_N = 10266; // 4 +const static uint64_t SH_FLD_O2S_INTER_FRAME_DELAY_A_N = 10267; // 4 +const static uint64_t SH_FLD_O2S_INTER_FRAME_DELAY_A_N_LEN = 10268; // 4 +const static uint64_t SH_FLD_O2S_IN_COUNT1_A_N = 10269; // 4 +const static uint64_t SH_FLD_O2S_IN_COUNT1_A_N_LEN = 10270; // 4 +const static uint64_t SH_FLD_O2S_IN_COUNT2_A_N = 10271; // 4 +const static uint64_t SH_FLD_O2S_IN_COUNT2_A_N_LEN = 10272; // 4 +const static uint64_t SH_FLD_O2S_IN_DELAY1_A_N = 10273; // 4 +const static uint64_t SH_FLD_O2S_IN_DELAY1_A_N_LEN = 10274; // 4 +const static uint64_t SH_FLD_O2S_IN_DELAY2_A_N = 10275; // 4 +const static uint64_t SH_FLD_O2S_IN_DELAY2_A_N_LEN = 10276; // 4 +const static uint64_t SH_FLD_O2S_NR_OF_FRAMES_A_N = 10277; // 4 +const static uint64_t SH_FLD_O2S_ONGOING_A_N = 10278; // 4 +const static uint64_t SH_FLD_O2S_OUT_COUNT1_A_N = 10279; // 4 +const static uint64_t SH_FLD_O2S_OUT_COUNT1_A_N_LEN = 10280; // 4 +const static uint64_t SH_FLD_O2S_OUT_COUNT2_A_N = 10281; // 4 +const static uint64_t SH_FLD_O2S_OUT_COUNT2_A_N_LEN = 10282; // 4 +const static uint64_t SH_FLD_O2S_RDATA_A_N = 10283; // 4 +const static uint64_t SH_FLD_O2S_RDATA_A_N_LEN = 10284; // 4 +const static uint64_t SH_FLD_O2S_WDATA_A_N = 10285; // 4 +const static uint64_t SH_FLD_O2S_WDATA_A_N_LEN = 10286; // 4 +const static uint64_t SH_FLD_O2S_WRITE_WHILE_BRIDGE_BUSY_ERR_A_N = 10287; // 4 +const static uint64_t SH_FLD_OBWR_MASK = 10288; // 3 +const static uint64_t SH_FLD_OBWR_MASK_LEN = 10289; // 3 +const static uint64_t SH_FLD_OCC_ACTION_SET = 10290; // 1 +const static uint64_t SH_FLD_OCC_ACTION_SET_LEN = 10291; // 1 +const static uint64_t SH_FLD_OCC_ERROR = 10292; // 1 +const static uint64_t SH_FLD_OCC_FLAGS = 10293; // 1 +const static uint64_t SH_FLD_OCC_FLAGS_LEN = 10294; // 1 +const static uint64_t SH_FLD_OCC_HEARTBEAT_COUNT = 10295; // 7 +const static uint64_t SH_FLD_OCC_HEARTBEAT_COUNT_LEN = 10296; // 7 +const static uint64_t SH_FLD_OCC_HEARTBEAT_EN = 10297; // 1 +const static uint64_t SH_FLD_OCC_HEARTBEAT_ENABLE = 10298; // 6 +const static uint64_t SH_FLD_OCC_HEARTBEAT_LOSS = 10299; // 6 +const static uint64_t SH_FLD_OCC_HEARTBEAT_LOST = 10300; // 12 +const static uint64_t SH_FLD_OCC_MALF_ALERT = 10301; // 1 +const static uint64_t SH_FLD_OCC_SCRATCH_N = 10302; // 3 +const static uint64_t SH_FLD_OCC_SCRATCH_N_LEN = 10303; // 3 +const static uint64_t SH_FLD_OCC_SPCL_TIMEOUT_ADDR = 10304; // 1 +const static uint64_t SH_FLD_OCC_SPCL_TIMEOUT_ADDR_LEN = 10305; // 1 +const static uint64_t SH_FLD_OCC_SPECIAL_WKUP = 10306; // 30 +const static uint64_t SH_FLD_OCC_STRM0_PULL = 10307; // 1 +const static uint64_t SH_FLD_OCC_STRM0_PUSH = 10308; // 1 +const static uint64_t SH_FLD_OCC_STRM1_PULL = 10309; // 1 +const static uint64_t SH_FLD_OCC_STRM1_PUSH = 10310; // 1 +const static uint64_t SH_FLD_OCC_STRM2_PULL = 10311; // 1 +const static uint64_t SH_FLD_OCC_STRM2_PUSH = 10312; // 1 +const static uint64_t SH_FLD_OCC_STRM3_PULL = 10313; // 1 +const static uint64_t SH_FLD_OCC_STRM3_PUSH = 10314; // 1 +const static uint64_t SH_FLD_OCC_TIMER0 = 10315; // 1 +const static uint64_t SH_FLD_OCC_TIMER1 = 10316; // 1 +const static uint64_t SH_FLD_OCC_TRACE_MUX_SEL = 10317; // 1 +const static uint64_t SH_FLD_OCC_TRACE_MUX_SEL_LEN = 10318; // 1 +const static uint64_t SH_FLD_OCICFG_RESERVED_20 = 10319; // 1 +const static uint64_t SH_FLD_OCICFG_RESERVED_23 = 10320; // 1 +const static uint64_t SH_FLD_OCISLV_FAIRNESS_MASK = 10321; // 1 +const static uint64_t SH_FLD_OCISLV_FAIRNESS_MASK_LEN = 10322; // 1 +const static uint64_t SH_FLD_OCISLV_REREQ_HANG_DIV = 10323; // 1 +const static uint64_t SH_FLD_OCISLV_REREQ_HANG_DIV_LEN = 10324; // 1 +const static uint64_t SH_FLD_OCI_APAR_ERR = 10325; // 1 +const static uint64_t SH_FLD_OCI_APAR_ERR_MASK = 10326; // 1 +const static uint64_t SH_FLD_OCI_ARB_RESET = 10327; // 1 +const static uint64_t SH_FLD_OCI_BAD_REG_ADDR = 10328; // 1 +const static uint64_t SH_FLD_OCI_BAD_REG_ADDR_MASK = 10329; // 1 +const static uint64_t SH_FLD_OCI_ERR_INJ_CE_UE = 10330; // 1 +const static uint64_t SH_FLD_OCI_ERR_INJ_DCU = 10331; // 1 +const static uint64_t SH_FLD_OCI_ERR_INJ_ICU = 10332; // 1 +const static uint64_t SH_FLD_OCI_ERR_INJ_SINGL_CONT = 10333; // 1 +const static uint64_t SH_FLD_OCI_HI_BUS_MODE = 10334; // 1 +const static uint64_t SH_FLD_OCI_M0_FLCK = 10335; // 1 +const static uint64_t SH_FLD_OCI_M0_OEAR_LOCK = 10336; // 1 +const static uint64_t SH_FLD_OCI_M0_RW_STATUS = 10337; // 1 +const static uint64_t SH_FLD_OCI_M0_TIMEOUT_ERROR = 10338; // 1 +const static uint64_t SH_FLD_OCI_M1_FLCK = 10339; // 1 +const static uint64_t SH_FLD_OCI_M1_OEAR_LOCK = 10340; // 1 +const static uint64_t SH_FLD_OCI_M1_RW_STATUS = 10341; // 1 +const static uint64_t SH_FLD_OCI_M1_TIMEOUT_ERROR = 10342; // 1 +const static uint64_t SH_FLD_OCI_M2_FLCK = 10343; // 1 +const static uint64_t SH_FLD_OCI_M2_OEAR_LOCK = 10344; // 1 +const static uint64_t SH_FLD_OCI_M2_RW_STATUS = 10345; // 1 +const static uint64_t SH_FLD_OCI_M2_TIMEOUT_ERROR = 10346; // 1 +const static uint64_t SH_FLD_OCI_M3_FLCK = 10347; // 1 +const static uint64_t SH_FLD_OCI_M3_OEAR_LOCK = 10348; // 1 +const static uint64_t SH_FLD_OCI_M3_RW_STATUS = 10349; // 1 +const static uint64_t SH_FLD_OCI_M3_TIMEOUT_ERROR = 10350; // 1 +const static uint64_t SH_FLD_OCI_M4_FLCK = 10351; // 1 +const static uint64_t SH_FLD_OCI_M4_OEAR_LOCK = 10352; // 1 +const static uint64_t SH_FLD_OCI_M4_RW_STATUS = 10353; // 1 +const static uint64_t SH_FLD_OCI_M4_TIMEOUT_ERROR = 10354; // 1 +const static uint64_t SH_FLD_OCI_M5_FLCK = 10355; // 1 +const static uint64_t SH_FLD_OCI_M5_OEAR_LOCK = 10356; // 1 +const static uint64_t SH_FLD_OCI_M5_RW_STATUS = 10357; // 1 +const static uint64_t SH_FLD_OCI_M5_TIMEOUT_ERROR = 10358; // 1 +const static uint64_t SH_FLD_OCI_M6_FLCK = 10359; // 1 +const static uint64_t SH_FLD_OCI_M6_OEAR_LOCK = 10360; // 1 +const static uint64_t SH_FLD_OCI_M6_RW_STATUS = 10361; // 1 +const static uint64_t SH_FLD_OCI_M6_TIMEOUT_ERROR = 10362; // 1 +const static uint64_t SH_FLD_OCI_M7_FLCK = 10363; // 1 +const static uint64_t SH_FLD_OCI_M7_OEAR_LOCK = 10364; // 1 +const static uint64_t SH_FLD_OCI_M7_RW_STATUS = 10365; // 1 +const static uint64_t SH_FLD_OCI_M7_TIMEOUT_ERROR = 10366; // 1 +const static uint64_t SH_FLD_OCI_MARKER_SPACE = 10367; // 1 +const static uint64_t SH_FLD_OCI_MARKER_SPACE_LEN = 10368; // 1 +const static uint64_t SH_FLD_OCI_PRIORITY_MODE = 10369; // 1 +const static uint64_t SH_FLD_OCI_PRIORITY_ORDER = 10370; // 1 +const static uint64_t SH_FLD_OCI_PRIORITY_ORDER_LEN = 10371; // 1 +const static uint64_t SH_FLD_OCI_READ_DATA_PARITY = 10372; // 4 +const static uint64_t SH_FLD_OCI_READ_PIPELINE_CONTROL = 10373; // 1 +const static uint64_t SH_FLD_OCI_READ_PIPELINE_CONTROL_LEN = 10374; // 1 +const static uint64_t SH_FLD_OCI_REGION = 10375; // 4 +const static uint64_t SH_FLD_OCI_REGION_LEN = 10376; // 4 +const static uint64_t SH_FLD_OCI_SLAVE_ERROR = 10377; // 4 +const static uint64_t SH_FLD_OCI_SLAVE_INIT = 10378; // 1 +const static uint64_t SH_FLD_OCI_SLAVE_INIT_MASK = 10379; // 1 +const static uint64_t SH_FLD_OCI_TIMEOUT = 10380; // 4 +const static uint64_t SH_FLD_OCI_TIMEOUT_ADDR = 10381; // 1 +const static uint64_t SH_FLD_OCI_TIMEOUT_ADDR_LEN = 10382; // 1 +const static uint64_t SH_FLD_OCI_TRACE_MUX_SEL = 10383; // 1 +const static uint64_t SH_FLD_OCI_TRACE_MUX_SEL_LEN = 10384; // 1 +const static uint64_t SH_FLD_OCI_WRITE_PIPELINE_CONTROL = 10385; // 1 +const static uint64_t SH_FLD_OCI_WRPAR_ERR = 10386; // 1 +const static uint64_t SH_FLD_OCI_WRPAR_ERR_MASK = 10387; // 1 +const static uint64_t SH_FLD_OCR_DBG_HALT = 10388; // 1 +const static uint64_t SH_FLD_OFFSET = 10389; // 10 +const static uint64_t SH_FLD_OFFSET_LEN = 10390; // 10 +const static uint64_t SH_FLD_OFF_INIT_CFG = 10391; // 6 +const static uint64_t SH_FLD_OFF_INIT_CFG_LEN = 10392; // 6 +const static uint64_t SH_FLD_OFF_INIT_TIMEOUT = 10393; // 6 +const static uint64_t SH_FLD_OFF_INIT_TIMEOUT_LEN = 10394; // 6 +const static uint64_t SH_FLD_OFF_RECAL_CFG = 10395; // 6 +const static uint64_t SH_FLD_OFF_RECAL_CFG_LEN = 10396; // 6 +const static uint64_t SH_FLD_OFF_RECAL_TIMEOUT = 10397; // 6 +const static uint64_t SH_FLD_OFF_RECAL_TIMEOUT_LEN = 10398; // 6 +const static uint64_t SH_FLD_OJCFG_DBG_HALT = 10399; // 1 +const static uint64_t SH_FLD_OJCFG_JTAG_SRC_SEL = 10400; // 1 +const static uint64_t SH_FLD_OJCFG_JTAG_TRST_B = 10401; // 1 +const static uint64_t SH_FLD_OJCFG_RUN_TCK = 10402; // 1 +const static uint64_t SH_FLD_OJCFG_TCK_WIDTH = 10403; // 1 +const static uint64_t SH_FLD_OJCFG_TCK_WIDTH_LEN = 10404; // 1 +const static uint64_t SH_FLD_OJIC_DO_DR = 10405; // 1 +const static uint64_t SH_FLD_OJIC_DO_IR = 10406; // 1 +const static uint64_t SH_FLD_OJIC_DO_TAP_RESET = 10407; // 1 +const static uint64_t SH_FLD_OJIC_JTAG_INSTR = 10408; // 1 +const static uint64_t SH_FLD_OJIC_JTAG_INSTR_LEN = 10409; // 1 +const static uint64_t SH_FLD_OJIC_WR_VALID = 10410; // 1 +const static uint64_t SH_FLD_OJSTAT_FSM_ERROR = 10411; // 1 +const static uint64_t SH_FLD_OJSTAT_INPROG_WR_ERR = 10412; // 1 +const static uint64_t SH_FLD_OJSTAT_IR_DR_EQ0_ERR = 10413; // 1 +const static uint64_t SH_FLD_OJSTAT_JTAG_INPROG = 10414; // 1 +const static uint64_t SH_FLD_OJSTAT_RUN_TCK_EQ0_ERR = 10415; // 1 +const static uint64_t SH_FLD_OJSTAT_SRC_SEL_EQ1_ERR = 10416; // 1 +const static uint64_t SH_FLD_OJSTAT_TRST_B_EQ0_ERR = 10417; // 1 +const static uint64_t SH_FLD_ONESHOT0 = 10418; // 15 +const static uint64_t SH_FLD_ONESHOT1 = 10419; // 15 +const static uint64_t SH_FLD_ONE_PPC = 10420; // 24 +const static uint64_t SH_FLD_ONGOING = 10421; // 1 +const static uint64_t SH_FLD_ONL = 10422; // 96 +const static uint64_t SH_FLD_OOB_MUX = 10423; // 1 +const static uint64_t SH_FLD_OPB_ERROR = 10424; // 4 +const static uint64_t SH_FLD_OPB_MASTER_HANG_TIMEOUT = 10425; // 4 +const static uint64_t SH_FLD_OPB_PARITY_ERROR = 10426; // 3 +const static uint64_t SH_FLD_OPB_TIMEOUT = 10427; // 4 +const static uint64_t SH_FLD_OPCG_IP = 10428; // 43 +const static uint64_t SH_FLD_OPCODE = 10429; // 1 +const static uint64_t SH_FLD_OPCODE_LEN = 10430; // 1 +const static uint64_t SH_FLD_OPER = 10431; // 1 +const static uint64_t SH_FLD_OPER_LEN = 10432; // 1 +const static uint64_t SH_FLD_OPTION_PIB_RESET = 10433; // 1 +const static uint64_t SH_FLD_OSCILLATOR = 10434; // 1 +const static uint64_t SH_FLD_OSCILLATOR_LEN = 10435; // 1 +const static uint64_t SH_FLD_OSCSWITCH_CNTL0_DC = 10436; // 1 +const static uint64_t SH_FLD_OSCSWITCH_CNTL0_DC_LEN = 10437; // 1 +const static uint64_t SH_FLD_OSCSWITCH_CNTL1_DC = 10438; // 1 +const static uint64_t SH_FLD_OSCSWITCH_CNTL1_DC_LEN = 10439; // 1 +const static uint64_t SH_FLD_OSCSWITCH_INTERRUPT = 10440; // 4 +const static uint64_t SH_FLD_OS_STATUS_DISABLE_A_N = 10441; // 96 +const static uint64_t SH_FLD_OTHER_SCOM_SAT = 10442; // 1 +const static uint64_t SH_FLD_OTP = 10443; // 1 +const static uint64_t SH_FLD_OTP_LEN = 10444; // 1 +const static uint64_t SH_FLD_OTR_SPECIAL_WKUP = 10445; // 30 +const static uint64_t SH_FLD_OUT = 10446; // 1 +const static uint64_t SH_FLD_OUTER_LOOP_CNT = 10447; // 8 +const static uint64_t SH_FLD_OUTER_LOOP_CNT_LEN = 10448; // 8 +const static uint64_t SH_FLD_OUTWR_INRD_ECC_CE = 10449; // 1 +const static uint64_t SH_FLD_OUTWR_INRD_ECC_SUE = 10450; // 1 +const static uint64_t SH_FLD_OUTWR_INRD_ECC_UE = 10451; // 1 +const static uint64_t SH_FLD_OUT_COUNT1 = 10452; // 1 +const static uint64_t SH_FLD_OUT_COUNT1_LEN = 10453; // 1 +const static uint64_t SH_FLD_OUT_COUNT2 = 10454; // 1 +const static uint64_t SH_FLD_OUT_COUNT2_LEN = 10455; // 1 +const static uint64_t SH_FLD_OUT_LEN = 10456; // 1 +const static uint64_t SH_FLD_OVERFLOW_ERR = 10457; // 43 +const static uint64_t SH_FLD_OVERFLOW_MASK = 10458; // 43 +const static uint64_t SH_FLD_OVERRIDE = 10459; // 8 +const static uint64_t SH_FLD_OVERRIDE_EN = 10460; // 24 +const static uint64_t SH_FLD_OVERRIDE_PBINIT_ERR_CMD = 10461; // 1 +const static uint64_t SH_FLD_OVERRIDE_PBINIT_HTM_CMD = 10462; // 1 +const static uint64_t SH_FLD_OVERRIDE_PBINIT_TOD_CMD = 10463; // 1 +const static uint64_t SH_FLD_OVERRIDE_PBINIT_TRACE_CMD = 10464; // 1 +const static uint64_t SH_FLD_OVERRIDE_PBINIT_XSCOM_CMD = 10465; // 1 +const static uint64_t SH_FLD_OVERRUN = 10466; // 8 +const static uint64_t SH_FLD_OVER_OR_UNDERRUN_ERR = 10467; // 1 +const static uint64_t SH_FLD_OVR_PM = 10468; // 1 +const static uint64_t SH_FLD_OWN_ID_THIS_SLAVE = 10469; // 2 +const static uint64_t SH_FLD_OWN_ID_THIS_SLAVE_LEN = 10470; // 2 +const static uint64_t SH_FLD_P0_IS_IDLE = 10471; // 3 +const static uint64_t SH_FLD_P1_IS_IDLE = 10472; // 3 +const static uint64_t SH_FLD_PACE = 10473; // 2 +const static uint64_t SH_FLD_PACE_LEN = 10474; // 2 +const static uint64_t SH_FLD_PACE_RATE = 10475; // 1 +const static uint64_t SH_FLD_PACE_RATE_LEN = 10476; // 1 +const static uint64_t SH_FLD_PACING_ALLOW = 10477; // 1 +const static uint64_t SH_FLD_PACING_ALLOW_0 = 10478; // 1 +const static uint64_t SH_FLD_PACING_ALLOW_1 = 10479; // 1 +const static uint64_t SH_FLD_PACING_ALLOW_2 = 10480; // 1 +const static uint64_t SH_FLD_PACING_ALLOW_3 = 10481; // 1 +const static uint64_t SH_FLD_PAGE_OFFSET_CFG = 10482; // 1 +const static uint64_t SH_FLD_PAGE_OFFSET_CFG_LEN = 10483; // 1 +const static uint64_t SH_FLD_PAGE_SIZE_64K = 10484; // 1 +const static uint64_t SH_FLD_PAGE_SIZE_64K_IC = 10485; // 1 +const static uint64_t SH_FLD_PAGE_SIZE_64K_PC = 10486; // 1 +const static uint64_t SH_FLD_PAGE_SIZE_64K_TM = 10487; // 1 +const static uint64_t SH_FLD_PAGE_SIZE_64K_VC = 10488; // 1 +const static uint64_t SH_FLD_PAIR0_QUA = 10489; // 8 +const static uint64_t SH_FLD_PAIR0_QUA_LEN = 10490; // 8 +const static uint64_t SH_FLD_PAIR0_QUA_V = 10491; // 8 +const static uint64_t SH_FLD_PAIR0_TER = 10492; // 8 +const static uint64_t SH_FLD_PAIR0_TER_LEN = 10493; // 8 +const static uint64_t SH_FLD_PAIR0_TER_V = 10494; // 8 +const static uint64_t SH_FLD_PAIR1_PRI = 10495; // 8 +const static uint64_t SH_FLD_PAIR1_PRI_LEN = 10496; // 8 +const static uint64_t SH_FLD_PAIR1_PRI_V = 10497; // 8 +const static uint64_t SH_FLD_PAIR1_QUA = 10498; // 8 +const static uint64_t SH_FLD_PAIR1_QUA_LEN = 10499; // 8 +const static uint64_t SH_FLD_PAIR1_QUA_V = 10500; // 8 +const static uint64_t SH_FLD_PAIR1_SEC = 10501; // 8 +const static uint64_t SH_FLD_PAIR1_SEC_LEN = 10502; // 8 +const static uint64_t SH_FLD_PAIR1_SEC_V = 10503; // 8 +const static uint64_t SH_FLD_PAIR1_TER = 10504; // 8 +const static uint64_t SH_FLD_PAIR1_TER_LEN = 10505; // 8 +const static uint64_t SH_FLD_PAIR1_TER_V = 10506; // 8 +const static uint64_t SH_FLD_PAIR2_PRI = 10507; // 8 +const static uint64_t SH_FLD_PAIR2_PRI_LEN = 10508; // 8 +const static uint64_t SH_FLD_PAIR2_PRI_V = 10509; // 8 +const static uint64_t SH_FLD_PAIR2_QUA = 10510; // 8 +const static uint64_t SH_FLD_PAIR2_QUA_LEN = 10511; // 8 +const static uint64_t SH_FLD_PAIR2_QUA_V = 10512; // 8 +const static uint64_t SH_FLD_PAIR2_SEC = 10513; // 8 +const static uint64_t SH_FLD_PAIR2_SEC_LEN = 10514; // 8 +const static uint64_t SH_FLD_PAIR2_SEC_V = 10515; // 8 +const static uint64_t SH_FLD_PAIR2_TER = 10516; // 8 +const static uint64_t SH_FLD_PAIR2_TER_LEN = 10517; // 8 +const static uint64_t SH_FLD_PAIR2_TER_V = 10518; // 8 +const static uint64_t SH_FLD_PAIR3_PRI = 10519; // 8 +const static uint64_t SH_FLD_PAIR3_PRI_LEN = 10520; // 8 +const static uint64_t SH_FLD_PAIR3_PRI_V = 10521; // 8 +const static uint64_t SH_FLD_PAIR3_SEC = 10522; // 8 +const static uint64_t SH_FLD_PAIR3_SEC_LEN = 10523; // 8 +const static uint64_t SH_FLD_PAIR3_SEC_V = 10524; // 8 +const static uint64_t SH_FLD_PARANOIA_TEST_ENABLE_CHANGE = 10525; // 43 +const static uint64_t SH_FLD_PARANOIA_VITL_CLKOFF_CHANGE = 10526; // 43 +const static uint64_t SH_FLD_PARITY = 10527; // 45 +const static uint64_t SH_FLD_PARITY_CHECK = 10528; // 1 +const static uint64_t SH_FLD_PARITY_ERR = 10529; // 4 +const static uint64_t SH_FLD_PARITY_ERR2 = 10530; // 3 +const static uint64_t SH_FLD_PARITY_ERROR = 10531; // 51 +const static uint64_t SH_FLD_PARITY_ERROR_SUE_ENA = 10532; // 6 +const static uint64_t SH_FLD_PARSER00_ATTN = 10533; // 4 +const static uint64_t SH_FLD_PARSER01_ATTN = 10534; // 4 +const static uint64_t SH_FLD_PARSER02_ATTN = 10535; // 4 +const static uint64_t SH_FLD_PARSER03_ATTN = 10536; // 4 +const static uint64_t SH_FLD_PARSER04_ATTN = 10537; // 4 +const static uint64_t SH_FLD_PARSER05_ATTN = 10538; // 4 +const static uint64_t SH_FLD_PARSER06_ATTN = 10539; // 2 +const static uint64_t SH_FLD_PARSER07_ATTN = 10540; // 2 +const static uint64_t SH_FLD_PART_0 = 10541; // 2 +const static uint64_t SH_FLD_PART_0_LEN = 10542; // 2 +const static uint64_t SH_FLD_PART_1 = 10543; // 2 +const static uint64_t SH_FLD_PART_10 = 10544; // 2 +const static uint64_t SH_FLD_PART_10_LEN = 10545; // 2 +const static uint64_t SH_FLD_PART_11 = 10546; // 2 +const static uint64_t SH_FLD_PART_11_LEN = 10547; // 2 +const static uint64_t SH_FLD_PART_12 = 10548; // 2 +const static uint64_t SH_FLD_PART_12_LEN = 10549; // 2 +const static uint64_t SH_FLD_PART_13 = 10550; // 2 +const static uint64_t SH_FLD_PART_13_LEN = 10551; // 2 +const static uint64_t SH_FLD_PART_14 = 10552; // 2 +const static uint64_t SH_FLD_PART_14_LEN = 10553; // 2 +const static uint64_t SH_FLD_PART_15 = 10554; // 2 +const static uint64_t SH_FLD_PART_15_LEN = 10555; // 2 +const static uint64_t SH_FLD_PART_16 = 10556; // 2 +const static uint64_t SH_FLD_PART_16_LEN = 10557; // 2 +const static uint64_t SH_FLD_PART_17 = 10558; // 2 +const static uint64_t SH_FLD_PART_17_LEN = 10559; // 2 +const static uint64_t SH_FLD_PART_18 = 10560; // 2 +const static uint64_t SH_FLD_PART_18_LEN = 10561; // 2 +const static uint64_t SH_FLD_PART_19 = 10562; // 2 +const static uint64_t SH_FLD_PART_19_LEN = 10563; // 2 +const static uint64_t SH_FLD_PART_1_LEN = 10564; // 2 +const static uint64_t SH_FLD_PART_2 = 10565; // 2 +const static uint64_t SH_FLD_PART_20 = 10566; // 2 +const static uint64_t SH_FLD_PART_20_LEN = 10567; // 2 +const static uint64_t SH_FLD_PART_21 = 10568; // 2 +const static uint64_t SH_FLD_PART_21_LEN = 10569; // 2 +const static uint64_t SH_FLD_PART_22 = 10570; // 2 +const static uint64_t SH_FLD_PART_22_LEN = 10571; // 2 +const static uint64_t SH_FLD_PART_23 = 10572; // 2 +const static uint64_t SH_FLD_PART_23_LEN = 10573; // 2 +const static uint64_t SH_FLD_PART_24 = 10574; // 2 +const static uint64_t SH_FLD_PART_24_LEN = 10575; // 2 +const static uint64_t SH_FLD_PART_25 = 10576; // 2 +const static uint64_t SH_FLD_PART_25_LEN = 10577; // 2 +const static uint64_t SH_FLD_PART_26 = 10578; // 2 +const static uint64_t SH_FLD_PART_26_LEN = 10579; // 2 +const static uint64_t SH_FLD_PART_27 = 10580; // 2 +const static uint64_t SH_FLD_PART_27_LEN = 10581; // 2 +const static uint64_t SH_FLD_PART_28 = 10582; // 2 +const static uint64_t SH_FLD_PART_28_LEN = 10583; // 2 +const static uint64_t SH_FLD_PART_29 = 10584; // 2 +const static uint64_t SH_FLD_PART_29_LEN = 10585; // 2 +const static uint64_t SH_FLD_PART_2_LEN = 10586; // 2 +const static uint64_t SH_FLD_PART_3 = 10587; // 2 +const static uint64_t SH_FLD_PART_30 = 10588; // 2 +const static uint64_t SH_FLD_PART_30_LEN = 10589; // 2 +const static uint64_t SH_FLD_PART_31 = 10590; // 2 +const static uint64_t SH_FLD_PART_31_LEN = 10591; // 2 +const static uint64_t SH_FLD_PART_32 = 10592; // 2 +const static uint64_t SH_FLD_PART_32_LEN = 10593; // 2 +const static uint64_t SH_FLD_PART_33 = 10594; // 2 +const static uint64_t SH_FLD_PART_33_LEN = 10595; // 2 +const static uint64_t SH_FLD_PART_34 = 10596; // 2 +const static uint64_t SH_FLD_PART_34_LEN = 10597; // 2 +const static uint64_t SH_FLD_PART_35 = 10598; // 2 +const static uint64_t SH_FLD_PART_35_LEN = 10599; // 2 +const static uint64_t SH_FLD_PART_36 = 10600; // 2 +const static uint64_t SH_FLD_PART_36_LEN = 10601; // 2 +const static uint64_t SH_FLD_PART_37 = 10602; // 2 +const static uint64_t SH_FLD_PART_37_LEN = 10603; // 2 +const static uint64_t SH_FLD_PART_38 = 10604; // 2 +const static uint64_t SH_FLD_PART_38_LEN = 10605; // 2 +const static uint64_t SH_FLD_PART_39 = 10606; // 2 +const static uint64_t SH_FLD_PART_39_LEN = 10607; // 2 +const static uint64_t SH_FLD_PART_3_LEN = 10608; // 2 +const static uint64_t SH_FLD_PART_4 = 10609; // 2 +const static uint64_t SH_FLD_PART_40 = 10610; // 2 +const static uint64_t SH_FLD_PART_40_LEN = 10611; // 2 +const static uint64_t SH_FLD_PART_41 = 10612; // 2 +const static uint64_t SH_FLD_PART_41_LEN = 10613; // 2 +const static uint64_t SH_FLD_PART_42 = 10614; // 2 +const static uint64_t SH_FLD_PART_42_LEN = 10615; // 2 +const static uint64_t SH_FLD_PART_43 = 10616; // 2 +const static uint64_t SH_FLD_PART_43_LEN = 10617; // 2 +const static uint64_t SH_FLD_PART_44 = 10618; // 2 +const static uint64_t SH_FLD_PART_44_LEN = 10619; // 2 +const static uint64_t SH_FLD_PART_45 = 10620; // 2 +const static uint64_t SH_FLD_PART_45_LEN = 10621; // 2 +const static uint64_t SH_FLD_PART_46 = 10622; // 2 +const static uint64_t SH_FLD_PART_46_LEN = 10623; // 2 +const static uint64_t SH_FLD_PART_47 = 10624; // 2 +const static uint64_t SH_FLD_PART_47_LEN = 10625; // 2 +const static uint64_t SH_FLD_PART_48 = 10626; // 2 +const static uint64_t SH_FLD_PART_48_LEN = 10627; // 2 +const static uint64_t SH_FLD_PART_49 = 10628; // 2 +const static uint64_t SH_FLD_PART_49_LEN = 10629; // 2 +const static uint64_t SH_FLD_PART_4_LEN = 10630; // 2 +const static uint64_t SH_FLD_PART_5 = 10631; // 2 +const static uint64_t SH_FLD_PART_50 = 10632; // 2 +const static uint64_t SH_FLD_PART_50_LEN = 10633; // 2 +const static uint64_t SH_FLD_PART_51 = 10634; // 2 +const static uint64_t SH_FLD_PART_51_LEN = 10635; // 2 +const static uint64_t SH_FLD_PART_52 = 10636; // 2 +const static uint64_t SH_FLD_PART_52_LEN = 10637; // 2 +const static uint64_t SH_FLD_PART_53 = 10638; // 2 +const static uint64_t SH_FLD_PART_53_LEN = 10639; // 2 +const static uint64_t SH_FLD_PART_54 = 10640; // 2 +const static uint64_t SH_FLD_PART_54_LEN = 10641; // 2 +const static uint64_t SH_FLD_PART_55 = 10642; // 2 +const static uint64_t SH_FLD_PART_55_LEN = 10643; // 2 +const static uint64_t SH_FLD_PART_56 = 10644; // 2 +const static uint64_t SH_FLD_PART_56_LEN = 10645; // 2 +const static uint64_t SH_FLD_PART_57 = 10646; // 2 +const static uint64_t SH_FLD_PART_57_LEN = 10647; // 2 +const static uint64_t SH_FLD_PART_58 = 10648; // 2 +const static uint64_t SH_FLD_PART_58_LEN = 10649; // 2 +const static uint64_t SH_FLD_PART_59 = 10650; // 2 +const static uint64_t SH_FLD_PART_59_LEN = 10651; // 2 +const static uint64_t SH_FLD_PART_5_LEN = 10652; // 2 +const static uint64_t SH_FLD_PART_6 = 10653; // 2 +const static uint64_t SH_FLD_PART_60 = 10654; // 2 +const static uint64_t SH_FLD_PART_60_LEN = 10655; // 2 +const static uint64_t SH_FLD_PART_61 = 10656; // 2 +const static uint64_t SH_FLD_PART_61_LEN = 10657; // 2 +const static uint64_t SH_FLD_PART_62 = 10658; // 2 +const static uint64_t SH_FLD_PART_62_LEN = 10659; // 2 +const static uint64_t SH_FLD_PART_63 = 10660; // 2 +const static uint64_t SH_FLD_PART_63_LEN = 10661; // 2 +const static uint64_t SH_FLD_PART_6_LEN = 10662; // 2 +const static uint64_t SH_FLD_PART_7 = 10663; // 2 +const static uint64_t SH_FLD_PART_7_LEN = 10664; // 2 +const static uint64_t SH_FLD_PART_8 = 10665; // 2 +const static uint64_t SH_FLD_PART_8_LEN = 10666; // 2 +const static uint64_t SH_FLD_PART_9 = 10667; // 2 +const static uint64_t SH_FLD_PART_9_LEN = 10668; // 2 +const static uint64_t SH_FLD_PAR_17_MASK = 10669; // 8 +const static uint64_t SH_FLD_PAR_INVERT = 10670; // 8 +const static uint64_t SH_FLD_PASS_CQ_INT_PMU_DATA_HI = 10671; // 1 +const static uint64_t SH_FLD_PASS_CQ_INT_PMU_DATA_LO = 10672; // 1 +const static uint64_t SH_FLD_PASS_CQ_INT_TRACE_DATA_HI = 10673; // 1 +const static uint64_t SH_FLD_PASS_CQ_INT_TRACE_DATA_LO = 10674; // 1 +const static uint64_t SH_FLD_PASS_CQ_INT_TRACE_TRIG_01 = 10675; // 1 +const static uint64_t SH_FLD_PASS_CQ_INT_TRACE_TRIG_23 = 10676; // 1 +const static uint64_t SH_FLD_PASS_WC_INT_PMU_DATA_HI = 10677; // 1 +const static uint64_t SH_FLD_PASS_WC_INT_PMU_DATA_LO = 10678; // 1 +const static uint64_t SH_FLD_PASS_WC_INT_TRACE_DATA_HI = 10679; // 1 +const static uint64_t SH_FLD_PASS_WC_INT_TRACE_DATA_LO = 10680; // 1 +const static uint64_t SH_FLD_PASS_WC_INT_TRACE_TRIG_01 = 10681; // 1 +const static uint64_t SH_FLD_PASS_WC_INT_TRACE_TRIG_23 = 10682; // 1 +const static uint64_t SH_FLD_PASTE_ADDR_ALIGN = 10683; // 1 +const static uint64_t SH_FLD_PASTE_REJECT = 10684; // 1 +const static uint64_t SH_FLD_PATTERN_CHECK_EN = 10685; // 1 +const static uint64_t SH_FLD_PATTERN_SEL = 10686; // 2 +const static uint64_t SH_FLD_PATTERN_SEL_LEN = 10687; // 2 +const static uint64_t SH_FLD_PAYLOAD = 10688; // 1 +const static uint64_t SH_FLD_PAYLOAD_LEN = 10689; // 1 +const static uint64_t SH_FLD_PBASE = 10690; // 4 +const static uint64_t SH_FLD_PBASE_LEN = 10691; // 4 +const static uint64_t SH_FLD_PBAX_EN = 10692; // 1 +const static uint64_t SH_FLD_PBAX_OCC_PUSH0 = 10693; // 1 +const static uint64_t SH_FLD_PBAX_OCC_PUSH1 = 10694; // 1 +const static uint64_t SH_FLD_PBAX_OCC_SEND_ATTN = 10695; // 1 +const static uint64_t SH_FLD_PBA_BCDE_ATTN = 10696; // 1 +const static uint64_t SH_FLD_PBA_BCUE_ATTN = 10697; // 1 +const static uint64_t SH_FLD_PBA_ERROR = 10698; // 1 +const static uint64_t SH_FLD_PBA_REGION = 10699; // 1 +const static uint64_t SH_FLD_PBA_REGION_LEN = 10700; // 1 +const static uint64_t SH_FLD_PBCFG_0_EPSILON = 10701; // 1 +const static uint64_t SH_FLD_PBCFG_0_EPSILON_LEN = 10702; // 1 +const static uint64_t SH_FLD_PBCFG_0_HANG_NX_MAX_CNT = 10703; // 1 +const static uint64_t SH_FLD_PBCFG_0_HANG_NX_MAX_CNT_LEN = 10704; // 1 +const static uint64_t SH_FLD_PBCFG_0_HANG_POLL_MAX_CNT = 10705; // 1 +const static uint64_t SH_FLD_PBCFG_0_HANG_POLL_MAX_CNT_LEN = 10706; // 1 +const static uint64_t SH_FLD_PBCFG_0_UNUSED1 = 10707; // 1 +const static uint64_t SH_FLD_PBCFG_0_UNUSED1_LEN = 10708; // 1 +const static uint64_t SH_FLD_PBCFG_0_UNUSED2 = 10709; // 1 +const static uint64_t SH_FLD_PBCFG_0_UNUSED2_LEN = 10710; // 1 +const static uint64_t SH_FLD_PBCFG_0_UNUSED3 = 10711; // 1 +const static uint64_t SH_FLD_PBCFG_0_UNUSED3_LEN = 10712; // 1 +const static uint64_t SH_FLD_PBCFG_1_UNUSED1 = 10713; // 1 +const static uint64_t SH_FLD_PBCFG_1_UNUSED1_LEN = 10714; // 1 +const static uint64_t SH_FLD_PBCFG_1_UNUSED2 = 10715; // 1 +const static uint64_t SH_FLD_PBCFG_1_UNUSED2_LEN = 10716; // 1 +const static uint64_t SH_FLD_PBCQ_CNTRL_LOGIC_ERR = 10717; // 1 +const static uint64_t SH_FLD_PBDATA_HANG = 10718; // 1 +const static uint64_t SH_FLD_PBEXCA0_CMD_REQ_ERR0 = 10719; // 12 +const static uint64_t SH_FLD_PBEXCA0_CMD_REQ_ERR1 = 10720; // 12 +const static uint64_t SH_FLD_PBEXCA0_CMD_REQ_ERR2 = 10721; // 12 +const static uint64_t SH_FLD_PBEXCA1_CMD_REQ_ERR0 = 10722; // 12 +const static uint64_t SH_FLD_PBEXCA1_CMD_REQ_ERR1 = 10723; // 12 +const static uint64_t SH_FLD_PBEXCA1_CMD_REQ_ERR2 = 10724; // 12 +const static uint64_t SH_FLD_PBI_IDLE = 10725; // 1 +const static uint64_t SH_FLD_PBI_INTERNAL_HANG = 10726; // 1 +const static uint64_t SH_FLD_PBI_MUX_SELECT = 10727; // 1 +const static uint64_t SH_FLD_PBI_MUX_SELECT_LEN = 10728; // 1 +const static uint64_t SH_FLD_PBI_PE = 10729; // 2 +const static uint64_t SH_FLD_PBI_WRITE_IDLE = 10730; // 2 +const static uint64_t SH_FLD_PBREQ_BCE_MAX_PRIORITY = 10731; // 1 +const static uint64_t SH_FLD_PBREQ_DATA_HANG_DIV = 10732; // 1 +const static uint64_t SH_FLD_PBREQ_DATA_HANG_DIV_LEN = 10733; // 1 +const static uint64_t SH_FLD_PBREQ_DROP_PRIORITY_MASK = 10734; // 1 +const static uint64_t SH_FLD_PBREQ_DROP_PRIORITY_MASK_LEN = 10735; // 1 +const static uint64_t SH_FLD_PBREQ_EVENT_MUX = 10736; // 1 +const static uint64_t SH_FLD_PBREQ_EVENT_MUX_LEN = 10737; // 1 +const static uint64_t SH_FLD_PBREQ_EXIT_HANG_DIV = 10738; // 1 +const static uint64_t SH_FLD_PBREQ_EXIT_HANG_DIV_LEN = 10739; // 1 +const static uint64_t SH_FLD_PBREQ_EXIT_ON_HANG = 10740; // 1 +const static uint64_t SH_FLD_PBREQ_EXIT_ON_HANG_PBAX = 10741; // 1 +const static uint64_t SH_FLD_PBREQ_OPER_HANG_DIV = 10742; // 1 +const static uint64_t SH_FLD_PBREQ_OPER_HANG_DIV_LEN = 10743; // 1 +const static uint64_t SH_FLD_PBREQ_SLVFW_MAX_PRIORITY = 10744; // 1 +const static uint64_t SH_FLD_PBRX_MASK = 10745; // 3 +const static uint64_t SH_FLD_PBRX_MASK_LEN = 10746; // 3 +const static uint64_t SH_FLD_PBTX_AMO_IGNORE_XUE = 10747; // 3 +const static uint64_t SH_FLD_PBTX_DELAY_BDONE = 10748; // 3 +const static uint64_t SH_FLD_PBTX_FLIP_IMIN_BIG = 10749; // 3 +const static uint64_t SH_FLD_PBTX_FLIP_IMIN_LITTLE = 10750; // 3 +const static uint64_t SH_FLD_PBTX_REDUCE_RTAG = 10751; // 3 +const static uint64_t SH_FLD_PBUNSUPPORTEDCMD = 10752; // 9 +const static uint64_t SH_FLD_PBUNSUPPORTEDCMD_MASK = 10753; // 9 +const static uint64_t SH_FLD_PBUNSUPPORTEDSIZE = 10754; // 9 +const static uint64_t SH_FLD_PBUNSUPPORTEDSIZE_MASK = 10755; // 9 +const static uint64_t SH_FLD_PBUS_CMD_HANG = 10756; // 2 +const static uint64_t SH_FLD_PBUS_ECC_CE = 10757; // 2 +const static uint64_t SH_FLD_PBUS_ECC_SUE = 10758; // 2 +const static uint64_t SH_FLD_PBUS_ECC_UE = 10759; // 2 +const static uint64_t SH_FLD_PBUS_LINK_ABORT = 10760; // 2 +const static uint64_t SH_FLD_PBUS_LOAD_LINK_ERR = 10761; // 2 +const static uint64_t SH_FLD_PBUS_MISC_HW = 10762; // 2 +const static uint64_t SH_FLD_PBUS_READ_ARE = 10763; // 2 +const static uint64_t SH_FLD_PBUS_STORE_LINK_ERR = 10764; // 2 +const static uint64_t SH_FLD_PBUS_WRITE_ARE = 10765; // 2 +const static uint64_t SH_FLD_PBUS_XLAT_ECC_SUE = 10766; // 1 +const static uint64_t SH_FLD_PBUS_XLAT_ECC_UE = 10767; // 1 +const static uint64_t SH_FLD_PB_ACKDEAD_FW_RD = 10768; // 1 +const static uint64_t SH_FLD_PB_ACKDEAD_FW_RD_MASK = 10769; // 1 +const static uint64_t SH_FLD_PB_ACKDEAD_FW_WR = 10770; // 1 +const static uint64_t SH_FLD_PB_ACKDEAD_FW_WR_MASK = 10771; // 1 +const static uint64_t SH_FLD_PB_BADCRESP = 10772; // 1 +const static uint64_t SH_FLD_PB_BADCRESP_MASK = 10773; // 1 +const static uint64_t SH_FLD_PB_CE_FW = 10774; // 1 +const static uint64_t SH_FLD_PB_CE_FW_MASK = 10775; // 1 +const static uint64_t SH_FLD_PB_CMD_ERR = 10776; // 12 +const static uint64_t SH_FLD_PB_DATA_ERR = 10777; // 12 +const static uint64_t SH_FLD_PB_DATA_HANG_ERRORS = 10778; // 9 +const static uint64_t SH_FLD_PB_DATA_HANG_ERRORS_MASK = 10779; // 9 +const static uint64_t SH_FLD_PB_DATA_TIME_OUT = 10780; // 4 +const static uint64_t SH_FLD_PB_ECC_CE = 10781; // 1 +const static uint64_t SH_FLD_PB_ECC_ERR_CE = 10782; // 4 +const static uint64_t SH_FLD_PB_ECC_ERR_SUE = 10783; // 4 +const static uint64_t SH_FLD_PB_ECC_ERR_UE = 10784; // 4 +const static uint64_t SH_FLD_PB_ECC_SUE = 10785; // 1 +const static uint64_t SH_FLD_PB_ECC_UE = 10786; // 1 +const static uint64_t SH_FLD_PB_HANG_ERRORS = 10787; // 9 +const static uint64_t SH_FLD_PB_HANG_ERRORS_MASK = 10788; // 9 +const static uint64_t SH_FLD_PB_INTERFACE_PE = 10789; // 9 +const static uint64_t SH_FLD_PB_INTERFACE_PE_MASK = 10790; // 9 +const static uint64_t SH_FLD_PB_NOCI_EVENT_SEL = 10791; // 1 +const static uint64_t SH_FLD_PB_OFFSET = 10792; // 2 +const static uint64_t SH_FLD_PB_OFFSET_LEN = 10793; // 2 +const static uint64_t SH_FLD_PB_OPERTO = 10794; // 1 +const static uint64_t SH_FLD_PB_OPERTO_MASK = 10795; // 1 +const static uint64_t SH_FLD_PB_OP_HANG_ERR = 10796; // 1 +const static uint64_t SH_FLD_PB_PARITY_ERR = 10797; // 1 +const static uint64_t SH_FLD_PB_PARITY_ERROR = 10798; // 4 +const static uint64_t SH_FLD_PB_PARITY_ERR_MASK = 10799; // 1 +const static uint64_t SH_FLD_PB_PURGE_DONE_LVL = 10800; // 6 +const static uint64_t SH_FLD_PB_PURGE_PLS = 10801; // 6 +const static uint64_t SH_FLD_PB_RDADRERR_FW = 10802; // 1 +const static uint64_t SH_FLD_PB_RDADRERR_FW_MASK = 10803; // 1 +const static uint64_t SH_FLD_PB_RDDATATO_FW = 10804; // 1 +const static uint64_t SH_FLD_PB_RDDATATO_FW_MASK = 10805; // 1 +const static uint64_t SH_FLD_PB_STOP = 10806; // 1 +const static uint64_t SH_FLD_PB_SUE_FW = 10807; // 1 +const static uint64_t SH_FLD_PB_SUE_FW_MASK = 10808; // 1 +const static uint64_t SH_FLD_PB_TO_PEC_CE = 10809; // 9 +const static uint64_t SH_FLD_PB_TO_PEC_CE_MASK = 10810; // 9 +const static uint64_t SH_FLD_PB_TO_PEC_SUE = 10811; // 9 +const static uint64_t SH_FLD_PB_TO_PEC_SUE_MASK = 10812; // 9 +const static uint64_t SH_FLD_PB_TO_PEC_UE = 10813; // 9 +const static uint64_t SH_FLD_PB_TO_PEC_UE_MASK = 10814; // 9 +const static uint64_t SH_FLD_PB_UE_FW = 10815; // 1 +const static uint64_t SH_FLD_PB_UE_FW_MASK = 10816; // 1 +const static uint64_t SH_FLD_PB_UNEXPCRESP = 10817; // 1 +const static uint64_t SH_FLD_PB_UNEXPCRESP_MASK = 10818; // 1 +const static uint64_t SH_FLD_PB_UNEXPDATA = 10819; // 1 +const static uint64_t SH_FLD_PB_UNEXPDATA_MASK = 10820; // 1 +const static uint64_t SH_FLD_PB_WRADRERR_FW = 10821; // 1 +const static uint64_t SH_FLD_PB_WRADRERR_FW_MASK = 10822; // 1 +const static uint64_t SH_FLD_PB_XLAT_DATA_SUE = 10823; // 1 +const static uint64_t SH_FLD_PB_XLAT_DATA_UE = 10824; // 1 +const static uint64_t SH_FLD_PCB = 10825; // 3 +const static uint64_t SH_FLD_PCBMUX_GRANT_C0 = 10826; // 12 +const static uint64_t SH_FLD_PCBMUX_GRANT_C1 = 10827; // 12 +const static uint64_t SH_FLD_PCBMUX_REQ_C0 = 10828; // 12 +const static uint64_t SH_FLD_PCBMUX_REQ_C1 = 10829; // 12 +const static uint64_t SH_FLD_PCBQ_N_INFO = 10830; // 24 +const static uint64_t SH_FLD_PCBQ_N_INFO_LEN = 10831; // 24 +const static uint64_t SH_FLD_PCB_EP_RESET = 10832; // 43 +const static uint64_t SH_FLD_PCB_ERROR = 10833; // 43 +const static uint64_t SH_FLD_PCB_FSM = 10834; // 43 +const static uint64_t SH_FLD_PCB_IDLE = 10835; // 43 +const static uint64_t SH_FLD_PCB_INTERFACE = 10836; // 43 +const static uint64_t SH_FLD_PCB_INTERRUPT_PROTOCOL = 10837; // 30 +const static uint64_t SH_FLD_PCB_INTR_TYPE_A_CORE_N = 10838; // 144 +const static uint64_t SH_FLD_PCB_INTR_TYPE_A_CORE_N_LEN = 10839; // 144 +const static uint64_t SH_FLD_PCB_INTR_TYPE_A_QUAD_N = 10840; // 12 +const static uint64_t SH_FLD_PCB_INTR_TYPE_A_QUAD_N_LEN = 10841; // 6 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_0 = 10842; // 8 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_1 = 10843; // 8 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_10 = 10844; // 6 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_11 = 10845; // 6 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_12 = 10846; // 6 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_13 = 10847; // 6 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_14 = 10848; // 6 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_15 = 10849; // 6 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_16 = 10850; // 6 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_17 = 10851; // 6 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_18 = 10852; // 6 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_19 = 10853; // 6 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_2 = 10854; // 8 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_20 = 10855; // 6 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_21 = 10856; // 6 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_22 = 10857; // 6 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_23 = 10858; // 6 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_3 = 10859; // 8 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_4 = 10860; // 8 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_5 = 10861; // 8 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_6 = 10862; // 6 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_7 = 10863; // 6 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_8 = 10864; // 6 +const static uint64_t SH_FLD_PCB_INTR_TYPE_N_PENDING_9 = 10865; // 6 +const static uint64_t SH_FLD_PCB_LEN = 10866; // 2 +const static uint64_t SH_FLD_PCB_MASK = 10867; // 43 +const static uint64_t SH_FLD_PCB_REQUEST_SINCE_RESET = 10868; // 43 +const static uint64_t SH_FLD_PCB_RESET_DC = 10869; // 1 +const static uint64_t SH_FLD_PCB_TMP = 10870; // 1 +const static uint64_t SH_FLD_PCB_TMP_LEN = 10871; // 1 +const static uint64_t SH_FLD_PCC_CORE_INTF_QUIESCE_C0 = 10872; // 12 +const static uint64_t SH_FLD_PCC_CORE_INTF_QUIESCE_C1 = 10873; // 12 +const static uint64_t SH_FLD_PCI_CLOCK_ERROR = 10874; // 9 +const static uint64_t SH_FLD_PCI_CLOCK_ERROR_MASK = 10875; // 9 +const static uint64_t SH_FLD_PCI_HANG_ERROR = 10876; // 9 +const static uint64_t SH_FLD_PCI_HANG_ERROR_MASK = 10877; // 9 +const static uint64_t SH_FLD_PCLKDIFSEL = 10878; // 10 +const static uint64_t SH_FLD_PCLKOUTEN = 10879; // 3 +const static uint64_t SH_FLD_PCLKSEL = 10880; // 14 +const static uint64_t SH_FLD_PCLKSEL_LEN = 10881; // 14 +const static uint64_t SH_FLD_PC_BLOCK_INTERRUPTS_C0 = 10882; // 12 +const static uint64_t SH_FLD_PC_BLOCK_INTERRUPTS_C1 = 10883; // 12 +const static uint64_t SH_FLD_PC_CAL_PCFSM_1HOT = 10884; // 8 +const static uint64_t SH_FLD_PC_CAL_REFFSM_1HOT = 10885; // 8 +const static uint64_t SH_FLD_PC_ENTRY_ACK_C0 = 10886; // 12 +const static uint64_t SH_FLD_PC_ENTRY_ACK_C1 = 10887; // 12 +const static uint64_t SH_FLD_PC_ERR_STATUS0 = 10888; // 8 +const static uint64_t SH_FLD_PC_ERR_STATUS0_LEN = 10889; // 8 +const static uint64_t SH_FLD_PC_FUSED_CORE_MODE = 10890; // 24 +const static uint64_t SH_FLD_PC_INIT_CAL_ERR = 10891; // 8 +const static uint64_t SH_FLD_PC_INIT_CAL_ERR_LEN = 10892; // 8 +const static uint64_t SH_FLD_PC_INSTR_RUNNING_C0 = 10893; // 12 +const static uint64_t SH_FLD_PC_INSTR_RUNNING_C1 = 10894; // 12 +const static uint64_t SH_FLD_PC_INTR_PENDING_C0 = 10895; // 24 +const static uint64_t SH_FLD_PC_INTR_PENDING_C1 = 10896; // 24 +const static uint64_t SH_FLD_PC_NON_HV_RUNNING_C0 = 10897; // 12 +const static uint64_t SH_FLD_PC_NON_HV_RUNNING_C0_LEN = 10898; // 12 +const static uint64_t SH_FLD_PC_NON_HV_RUNNING_C1 = 10899; // 12 +const static uint64_t SH_FLD_PC_NON_HV_RUNNING_C1_LEN = 10900; // 12 +const static uint64_t SH_FLD_PC_PE = 10901; // 8 +const static uint64_t SH_FLD_PC_PM_STATE_ACTIVE_C0 = 10902; // 24 +const static uint64_t SH_FLD_PC_PM_STATE_ACTIVE_C1 = 10903; // 24 +const static uint64_t SH_FLD_PC_PRIORITY_LIMIT_0_3 = 10904; // 1 +const static uint64_t SH_FLD_PC_PRIORITY_LIMIT_0_3_LEN = 10905; // 1 +const static uint64_t SH_FLD_PC_SLICE_EN_ENC = 10906; // 1 +const static uint64_t SH_FLD_PC_SLICE_EN_ENC_LEN = 10907; // 1 +const static uint64_t SH_FLD_PC_TC_AVP_OUT = 10908; // 24 +const static uint64_t SH_FLD_PC_TC_VALID_NOT_HV_MODE = 10909; // 24 +const static uint64_t SH_FLD_PC_TEST = 10910; // 1 +const static uint64_t SH_FLD_PC_UNMASKED_ATTN_C0 = 10911; // 12 +const static uint64_t SH_FLD_PC_UNMASKED_ATTN_C1 = 10912; // 12 +const static uint64_t SH_FLD_PC_WAKEUP_C0 = 10913; // 12 +const static uint64_t SH_FLD_PC_WAKEUP_C1 = 10914; // 12 +const static uint64_t SH_FLD_PDWN = 10915; // 2 +const static uint64_t SH_FLD_PDWNPLL = 10916; // 6 +const static uint64_t SH_FLD_PDWNT = 10917; // 3 +const static uint64_t SH_FLD_PDWN_LITE = 10918; // 140 +const static uint64_t SH_FLD_PDWN_LITE_DISABLE = 10919; // 8 +const static uint64_t SH_FLD_PE = 10920; // 39 +const static uint64_t SH_FLD_PEAK_INIT_CFG = 10921; // 6 +const static uint64_t SH_FLD_PEAK_INIT_CFG_LEN = 10922; // 6 +const static uint64_t SH_FLD_PEAK_INIT_TIMEOUT = 10923; // 6 +const static uint64_t SH_FLD_PEAK_INIT_TIMEOUT_LEN = 10924; // 6 +const static uint64_t SH_FLD_PEAK_RECAL_CFG = 10925; // 6 +const static uint64_t SH_FLD_PEAK_RECAL_CFG_LEN = 10926; // 6 +const static uint64_t SH_FLD_PEAK_RECAL_TIMEOUT = 10927; // 6 +const static uint64_t SH_FLD_PEAK_RECAL_TIMEOUT_LEN = 10928; // 6 +const static uint64_t SH_FLD_PEAK_TUNE = 10929; // 4 +const static uint64_t SH_FLD_PECE_C_N_T0 = 10930; // 24 +const static uint64_t SH_FLD_PECE_C_N_T0_LEN = 10931; // 24 +const static uint64_t SH_FLD_PECE_C_N_T1 = 10932; // 24 +const static uint64_t SH_FLD_PECE_C_N_T1_LEN = 10933; // 24 +const static uint64_t SH_FLD_PECE_C_N_T2 = 10934; // 24 +const static uint64_t SH_FLD_PECE_C_N_T2_LEN = 10935; // 24 +const static uint64_t SH_FLD_PECE_C_N_T3 = 10936; // 24 +const static uint64_t SH_FLD_PECE_C_N_T3_LEN = 10937; // 24 +const static uint64_t SH_FLD_PECE_DECR = 10938; // 96 +const static uint64_t SH_FLD_PECE_DHDES = 10939; // 96 +const static uint64_t SH_FLD_PECE_DPDES = 10940; // 96 +const static uint64_t SH_FLD_PECE_HMAINT = 10941; // 96 +const static uint64_t SH_FLD_PECE_HYPV = 10942; // 96 +const static uint64_t SH_FLD_PECE_INTR_DISABLED = 10943; // 24 +const static uint64_t SH_FLD_PECE_OS_EXT = 10944; // 96 +const static uint64_t SH_FLD_PEC_SCOM_ERR = 10945; // 9 +const static uint64_t SH_FLD_PEC_SCOM_ERR_MASK = 10946; // 9 +const static uint64_t SH_FLD_PEEK_DATA1_0 = 10947; // 12 +const static uint64_t SH_FLD_PEEK_DATA1_0_LEN = 10948; // 12 +const static uint64_t SH_FLD_PEEK_DATA1_1 = 10949; // 12 +const static uint64_t SH_FLD_PEEK_DATA1_1_LEN = 10950; // 12 +const static uint64_t SH_FLD_PEEK_DATA1_2 = 10951; // 12 +const static uint64_t SH_FLD_PEEK_DATA1_2_LEN = 10952; // 12 +const static uint64_t SH_FLD_PEEK_DATA1_3 = 10953; // 12 +const static uint64_t SH_FLD_PEEK_DATA1_3_LEN = 10954; // 12 +const static uint64_t SH_FLD_PEND = 10955; // 8 +const static uint64_t SH_FLD_PENDING_SOURCE = 10956; // 30 +const static uint64_t SH_FLD_PENDING_SOURCE_LEN = 10957; // 30 +const static uint64_t SH_FLD_PERFORM_RDCLK_ALIGN = 10958; // 8 +const static uint64_t SH_FLD_PERIODIC = 10959; // 56 +const static uint64_t SH_FLD_PERIODIC_CAL_REQ_EN = 10960; // 8 +const static uint64_t SH_FLD_PERIODIC_LEN = 10961; // 56 +const static uint64_t SH_FLD_PERSIST = 10962; // 8 +const static uint64_t SH_FLD_PERSIST_LEN = 10963; // 8 +const static uint64_t SH_FLD_PERV = 10964; // 215 +const static uint64_t SH_FLD_PERVASIVE_CAPT = 10965; // 6 +const static uint64_t SH_FLD_PER_ABORT = 10966; // 8 +const static uint64_t SH_FLD_PER_DUTY_CYCLE_SW = 10967; // 8 +const static uint64_t SH_FLD_PER_REPEAT_COUNT = 10968; // 8 +const static uint64_t SH_FLD_PER_REPEAT_COUNT_LEN = 10969; // 8 +const static uint64_t SH_FLD_PE_ADR_BAR_MODE = 10970; // 3 +const static uint64_t SH_FLD_PE_BLOCK_CQPB_PB_INIT = 10971; // 3 +const static uint64_t SH_FLD_PE_CAPP = 10972; // 3 +const static uint64_t SH_FLD_PE_CAPP_256 = 10973; // 3 +const static uint64_t SH_FLD_PE_CAPP_DMA = 10974; // 3 +const static uint64_t SH_FLD_PE_CAPP_EN = 10975; // 3 +const static uint64_t SH_FLD_PE_CAPP_LEN = 10976; // 3 +const static uint64_t SH_FLD_PE_CAPP_P8_MODE = 10977; // 3 +const static uint64_t SH_FLD_PE_CHANNEL_STREAMING_EN = 10978; // 3 +const static uint64_t SH_FLD_PE_CQ_ECC_INJECT_ENABLE = 10979; // 3 +const static uint64_t SH_FLD_PE_CQ_PAR_INJECT_ENABLE = 10980; // 3 +const static uint64_t SH_FLD_PE_CQ_REGISTER_ARRAY = 10981; // 3 +const static uint64_t SH_FLD_PE_CQ_REGISTER_ARRAY_LEN = 10982; // 3 +const static uint64_t SH_FLD_PE_CQ_SRAM_ARRAY = 10983; // 3 +const static uint64_t SH_FLD_PE_CQ_SRAM_ARRAY_LEN = 10984; // 3 +const static uint64_t SH_FLD_PE_DISABLE_CQ_TCE_ARBITRATION = 10985; // 3 +const static uint64_t SH_FLD_PE_DISABLE_INJ_ON_RESEND = 10986; // 3 +const static uint64_t SH_FLD_PE_DISABLE_INTWR_SCOPE_GROUP = 10987; // 3 +const static uint64_t SH_FLD_PE_DISABLE_INTWR_SCOPE_NODE = 10988; // 3 +const static uint64_t SH_FLD_PE_DISABLE_INTWR_VG = 10989; // 3 +const static uint64_t SH_FLD_PE_DISABLE_MC_PREFETCH = 10990; // 3 +const static uint64_t SH_FLD_PE_DISABLE_OOO_MODE = 10991; // 3 +const static uint64_t SH_FLD_PE_DISABLE_PCI_CLK_CHECK = 10992; // 3 +const static uint64_t SH_FLD_PE_DISABLE_RD_SCOPE_GROUP = 10993; // 3 +const static uint64_t SH_FLD_PE_DISABLE_RD_SCOPE_NODAL = 10994; // 3 +const static uint64_t SH_FLD_PE_DISABLE_RD_SCOPE_RNNN = 10995; // 3 +const static uint64_t SH_FLD_PE_DISABLE_RD_VG = 10996; // 3 +const static uint64_t SH_FLD_PE_DISABLE_TCE_ARBITRATION = 10997; // 3 +const static uint64_t SH_FLD_PE_DISABLE_TCE_SCOPE_GROUP = 10998; // 3 +const static uint64_t SH_FLD_PE_DISABLE_TCE_SCOPE_NODAL = 10999; // 3 +const static uint64_t SH_FLD_PE_DISABLE_TCE_SCOPE_RNNN = 11000; // 3 +const static uint64_t SH_FLD_PE_DISABLE_TCE_VG = 11001; // 3 +const static uint64_t SH_FLD_PE_DISABLE_WR_SCOPE_GROUP = 11002; // 3 +const static uint64_t SH_FLD_PE_DISABLE_WR_VG = 11003; // 3 +const static uint64_t SH_FLD_PE_DROPPACECOUNT = 11004; // 3 +const static uint64_t SH_FLD_PE_DROPPACECOUNT_LEN = 11005; // 3 +const static uint64_t SH_FLD_PE_DROPPACEINC = 11006; // 3 +const static uint64_t SH_FLD_PE_DROPPACEINC_LEN = 11007; // 3 +const static uint64_t SH_FLD_PE_DROPPRIORITYMASK = 11008; // 3 +const static uint64_t SH_FLD_PE_DROPPRIORITYMASK_LEN = 11009; // 3 +const static uint64_t SH_FLD_PE_ECC_INJECT_TYPE = 11010; // 3 +const static uint64_t SH_FLD_PE_ECC_INJECT_TYPE_LEN = 11011; // 3 +const static uint64_t SH_FLD_PE_EINJ_STACK = 11012; // 3 +const static uint64_t SH_FLD_PE_EINJ_STACK_LEN = 11013; // 3 +const static uint64_t SH_FLD_PE_ENABLENESTTRACE = 11014; // 3 +const static uint64_t SH_FLD_PE_ENABLE_CTAG_DROP_PRIORITY = 11015; // 3 +const static uint64_t SH_FLD_PE_ENABLE_DMAR_IOPACING = 11016; // 3 +const static uint64_t SH_FLD_PE_ENABLE_DMAW_IOPACING = 11017; // 3 +const static uint64_t SH_FLD_PE_ENABLE_ENH_FLOW = 11018; // 3 +const static uint64_t SH_FLD_PE_ENABLE_IO_CMD_PACING = 11019; // 3 +const static uint64_t SH_FLD_PE_ENABLE_NEW_FLOW_CACHE_INJECT = 11020; // 3 +const static uint64_t SH_FLD_PE_ENABLE_RD_SKIP_GROUP = 11021; // 3 +const static uint64_t SH_FLD_PE_ENABLE_TCE_SKIP_GROUP = 11022; // 3 +const static uint64_t SH_FLD_PE_ENHANCED_PEER2PEER_MODDE = 11023; // 9 +const static uint64_t SH_FLD_PE_ETU_RESET = 11024; // 9 +const static uint64_t SH_FLD_PE_FORCE_DISABLED_CTAG_TO_FOLLOW_FLOW = 11025; // 3 +const static uint64_t SH_FLD_PE_HANG_SM_ON_ARE = 11026; // 3 +const static uint64_t SH_FLD_PE_IGNORE_SFSTAT = 11027; // 3 +const static uint64_t SH_FLD_PE_INBOUND_ACTIVE = 11028; // 9 +const static uint64_t SH_FLD_PE_ISMB_ERROR_INJECT = 11029; // 3 +const static uint64_t SH_FLD_PE_ISMB_ERROR_INJECT_LEN = 11030; // 3 +const static uint64_t SH_FLD_PE_LEN = 11031; // 39 +const static uint64_t SH_FLD_PE_LSI_BAR = 11032; // 9 +const static uint64_t SH_FLD_PE_LSI_BAR_EN = 11033; // 9 +const static uint64_t SH_FLD_PE_LSI_BAR_LEN = 11034; // 9 +const static uint64_t SH_FLD_PE_MASK0 = 11035; // 1 +const static uint64_t SH_FLD_PE_MASK1 = 11036; // 1 +const static uint64_t SH_FLD_PE_MATCH0 = 11037; // 1 +const static uint64_t SH_FLD_PE_MATCH0_LEN = 11038; // 1 +const static uint64_t SH_FLD_PE_MATCH1 = 11039; // 1 +const static uint64_t SH_FLD_PE_MATCH1_LEN = 11040; // 1 +const static uint64_t SH_FLD_PE_MMIO_BAR0 = 11041; // 9 +const static uint64_t SH_FLD_PE_MMIO_BAR0_EN = 11042; // 9 +const static uint64_t SH_FLD_PE_MMIO_BAR0_LEN = 11043; // 9 +const static uint64_t SH_FLD_PE_MMIO_BAR1 = 11044; // 9 +const static uint64_t SH_FLD_PE_MMIO_BAR1_EN = 11045; // 9 +const static uint64_t SH_FLD_PE_MMIO_BAR1_LEN = 11046; // 9 +const static uint64_t SH_FLD_PE_MMIO_MASK0 = 11047; // 9 +const static uint64_t SH_FLD_PE_MMIO_MASK0_LEN = 11048; // 9 +const static uint64_t SH_FLD_PE_MMIO_MASK1 = 11049; // 9 +const static uint64_t SH_FLD_PE_MMIO_MASK1_LEN = 11050; // 9 +const static uint64_t SH_FLD_PE_MSI_BAR = 11051; // 9 +const static uint64_t SH_FLD_PE_MSI_BAR_EN = 11052; // 9 +const static uint64_t SH_FLD_PE_MSI_BAR_LEN = 11053; // 9 +const static uint64_t SH_FLD_PE_NESTTRACESEL = 11054; // 3 +const static uint64_t SH_FLD_PE_NESTTRACESEL_LEN = 11055; // 3 +const static uint64_t SH_FLD_PE_OSMB_DATASTART_MODE = 11056; // 3 +const static uint64_t SH_FLD_PE_OSMB_DATASTART_MODE_LEN = 11057; // 3 +const static uint64_t SH_FLD_PE_OSMB_EARLYEMPTY_MODE = 11058; // 3 +const static uint64_t SH_FLD_PE_OSMB_EARLYEMPTY_MODE_LEN = 11059; // 3 +const static uint64_t SH_FLD_PE_OSMB_EARLY_START = 11060; // 3 +const static uint64_t SH_FLD_PE_OSMB_EARLY_START_LEN = 11061; // 3 +const static uint64_t SH_FLD_PE_OSMB_HOL_BLK_CNT = 11062; // 3 +const static uint64_t SH_FLD_PE_OSMB_HOL_BLK_CNT_LEN = 11063; // 3 +const static uint64_t SH_FLD_PE_OUTBOUND_ACTIVE = 11064; // 9 +const static uint64_t SH_FLD_PE_PCIE_CLK_TRACE_EN = 11065; // 3 +const static uint64_t SH_FLD_PE_PCI_CLK_TRACE_SEL = 11066; // 3 +const static uint64_t SH_FLD_PE_PCI_CLK_TRACE_SEL_LEN = 11067; // 3 +const static uint64_t SH_FLD_PE_PEER2PEER_MODDE = 11068; // 9 +const static uint64_t SH_FLD_PE_PERFMON_EN = 11069; // 3 +const static uint64_t SH_FLD_PE_PERFMON_EN_LEN = 11070; // 3 +const static uint64_t SH_FLD_PE_PERFMON_READ_TYPE = 11071; // 3 +const static uint64_t SH_FLD_PE_PERFMON_READ_TYPE_LEN = 11072; // 3 +const static uint64_t SH_FLD_PE_PHB_BAR = 11073; // 9 +const static uint64_t SH_FLD_PE_PHB_BAR_EN = 11074; // 9 +const static uint64_t SH_FLD_PE_PHB_BAR_LEN = 11075; // 9 +const static uint64_t SH_FLD_PE_PMON_MUX_BYTE0 = 11076; // 3 +const static uint64_t SH_FLD_PE_PMON_MUX_BYTE0_LEN = 11077; // 3 +const static uint64_t SH_FLD_PE_PMON_MUX_BYTE1 = 11078; // 3 +const static uint64_t SH_FLD_PE_PMON_MUX_BYTE1_LEN = 11079; // 3 +const static uint64_t SH_FLD_PE_PMON_MUX_BYTE2 = 11080; // 3 +const static uint64_t SH_FLD_PE_PMON_MUX_BYTE2_LEN = 11081; // 3 +const static uint64_t SH_FLD_PE_PMON_MUX_BYTE3 = 11082; // 3 +const static uint64_t SH_FLD_PE_PMON_MUX_BYTE3_LEN = 11083; // 3 +const static uint64_t SH_FLD_PE_QFIFO_HOLD_MODE = 11084; // 3 +const static uint64_t SH_FLD_PE_QFIFO_HOLD_MODE_LEN = 11085; // 3 +const static uint64_t SH_FLD_PE_RD_TIMEOUT_MASK = 11086; // 3 +const static uint64_t SH_FLD_PE_RD_TIMEOUT_MASK_LEN = 11087; // 3 +const static uint64_t SH_FLD_PE_RD_WRITE_ORDERING = 11088; // 3 +const static uint64_t SH_FLD_PE_RD_WRITE_ORDERING_LEN = 11089; // 3 +const static uint64_t SH_FLD_PE_RTYDROPDIVIDER = 11090; // 3 +const static uint64_t SH_FLD_PE_RTYDROPDIVIDER_LEN = 11091; // 3 +const static uint64_t SH_FLD_PE_SELECT_ETU_TRACE = 11092; // 3 +const static uint64_t SH_FLD_PE_STQ_ALLOCATION = 11093; // 3 +const static uint64_t SH_FLD_PE_TX_RESP_HWM = 11094; // 3 +const static uint64_t SH_FLD_PE_TX_RESP_HWM_LEN = 11095; // 3 +const static uint64_t SH_FLD_PE_TX_RESP_LWM = 11096; // 3 +const static uint64_t SH_FLD_PE_TX_RESP_LWM_LEN = 11097; // 3 +const static uint64_t SH_FLD_PE_WR_CACHE_INJECT_MODE = 11098; // 3 +const static uint64_t SH_FLD_PE_WR_CACHE_INJECT_MODE_LEN = 11099; // 3 +const static uint64_t SH_FLD_PE_WR_STRICT_ORDER_MODE = 11100; // 3 +const static uint64_t SH_FLD_PE_WR_TIMEOUT_MASK = 11101; // 3 +const static uint64_t SH_FLD_PE_WR_TIMEOUT_MASK_LEN = 11102; // 3 +const static uint64_t SH_FLD_PFD360SEL = 11103; // 4 +const static uint64_t SH_FLD_PFET_SEQ_PROGRAM = 11104; // 30 +const static uint64_t SH_FLD_PFREQ0 = 11105; // 15 +const static uint64_t SH_FLD_PFREQ0_LEN = 11106; // 15 +const static uint64_t SH_FLD_PFREQ1 = 11107; // 15 +const static uint64_t SH_FLD_PFREQ1_LEN = 11108; // 15 +const static uint64_t SH_FLD_PF_DROP_CNT_THRESH = 11109; // 4 +const static uint64_t SH_FLD_PF_DROP_CNT_THRESH_LEN = 11110; // 4 +const static uint64_t SH_FLD_PF_DROP_VALUE0 = 11111; // 8 +const static uint64_t SH_FLD_PF_DROP_VALUE0_LEN = 11112; // 8 +const static uint64_t SH_FLD_PF_DROP_VALUE1 = 11113; // 8 +const static uint64_t SH_FLD_PF_DROP_VALUE1_LEN = 11114; // 8 +const static uint64_t SH_FLD_PF_DROP_VALUE2 = 11115; // 8 +const static uint64_t SH_FLD_PF_DROP_VALUE2_LEN = 11116; // 8 +const static uint64_t SH_FLD_PF_DROP_VALUE3 = 11117; // 8 +const static uint64_t SH_FLD_PF_DROP_VALUE3_LEN = 11118; // 8 +const static uint64_t SH_FLD_PF_MACHINE_HANG_ERR = 11119; // 12 +const static uint64_t SH_FLD_PF_MACHINE_W4DT_HANG_ERR = 11120; // 12 +const static uint64_t SH_FLD_PF_PROMOTE_ERR_INJ = 11121; // 8 +const static uint64_t SH_FLD_PF_UNSOLICITED_CRESP_ERR = 11122; // 12 +const static uint64_t SH_FLD_PF_UNSOLICITED_CRESP_ERR_LEN = 11123; // 12 +const static uint64_t SH_FLD_PF_UNSOLICITED_DATA_ERR = 11124; // 12 +const static uint64_t SH_FLD_PGMIGR1_BAR = 11125; // 1 +const static uint64_t SH_FLD_PGMIGR1_BAR_LEN = 11126; // 1 +const static uint64_t SH_FLD_PGMIGR1_PGSZ = 11127; // 1 +const static uint64_t SH_FLD_PGMIGR1_PGSZ_LEN = 11128; // 1 +const static uint64_t SH_FLD_PGMIGR1_VAL = 11129; // 1 +const static uint64_t SH_FLD_PGMIGR2_BAR = 11130; // 1 +const static uint64_t SH_FLD_PGMIGR2_BAR_LEN = 11131; // 1 +const static uint64_t SH_FLD_PGMIGR2_PGSZ = 11132; // 1 +const static uint64_t SH_FLD_PGMIGR2_PGSZ_LEN = 11133; // 1 +const static uint64_t SH_FLD_PGMIGR2_VAL = 11134; // 1 +const static uint64_t SH_FLD_PGMIGR3_BAR = 11135; // 1 +const static uint64_t SH_FLD_PGMIGR3_BAR_LEN = 11136; // 1 +const static uint64_t SH_FLD_PGMIGR3_PGSZ = 11137; // 1 +const static uint64_t SH_FLD_PGMIGR3_PGSZ_LEN = 11138; // 1 +const static uint64_t SH_FLD_PGMIGR3_VAL = 11139; // 1 +const static uint64_t SH_FLD_PGMIGR4_BAR = 11140; // 1 +const static uint64_t SH_FLD_PGMIGR4_BAR_LEN = 11141; // 1 +const static uint64_t SH_FLD_PGMIGR4_PGSZ = 11142; // 1 +const static uint64_t SH_FLD_PGMIGR4_PGSZ_LEN = 11143; // 1 +const static uint64_t SH_FLD_PGMIGR4_VAL = 11144; // 1 +const static uint64_t SH_FLD_PGMIGR5_BAR = 11145; // 1 +const static uint64_t SH_FLD_PGMIGR5_BAR_LEN = 11146; // 1 +const static uint64_t SH_FLD_PGMIGR5_PGSZ = 11147; // 1 +const static uint64_t SH_FLD_PGMIGR5_PGSZ_LEN = 11148; // 1 +const static uint64_t SH_FLD_PGMIGR5_VAL = 11149; // 1 +const static uint64_t SH_FLD_PGMIGR6_BAR = 11150; // 1 +const static uint64_t SH_FLD_PGMIGR6_BAR_LEN = 11151; // 1 +const static uint64_t SH_FLD_PGMIGR6_PGSZ = 11152; // 1 +const static uint64_t SH_FLD_PGMIGR6_PGSZ_LEN = 11153; // 1 +const static uint64_t SH_FLD_PGMIGR6_VAL = 11154; // 1 +const static uint64_t SH_FLD_PGMIGR7_BAR = 11155; // 1 +const static uint64_t SH_FLD_PGMIGR7_BAR_LEN = 11156; // 1 +const static uint64_t SH_FLD_PGMIGR7_PGSZ = 11157; // 1 +const static uint64_t SH_FLD_PGMIGR7_PGSZ_LEN = 11158; // 1 +const static uint64_t SH_FLD_PGMIGR7_VAL = 11159; // 1 +const static uint64_t SH_FLD_PGOOD_TIMEOUT_SEL = 11160; // 4 +const static uint64_t SH_FLD_PGOOD_TIMEOUT_SEL_LEN = 11161; // 4 +const static uint64_t SH_FLD_PG_MIG_DISABLED_ERR = 11162; // 2 +const static uint64_t SH_FLD_PG_MIG_SIZE_MISMATCH_ERR = 11163; // 2 +const static uint64_t SH_FLD_PHASEFB = 11164; // 4 +const static uint64_t SH_FLD_PHASEFB_LEN = 11165; // 4 +const static uint64_t SH_FLD_PHBCSR_SPARE = 11166; // 1 +const static uint64_t SH_FLD_PHB_FILTER_CNTL = 11167; // 2 +const static uint64_t SH_FLD_PHB_FILTER_CNTL_LEN = 11168; // 2 +const static uint64_t SH_FLD_PHB_LINK_DOWN = 11169; // 4 +const static uint64_t SH_FLD_PHYP_SCOPE = 11170; // 1 +const static uint64_t SH_FLD_PIB2PCB_DC = 11171; // 1 +const static uint64_t SH_FLD_PIBI2CM_PIB_SLAVE_ID = 11172; // 1 +const static uint64_t SH_FLD_PIBI2CM_PIB_SLAVE_ID_LEN = 11173; // 1 +const static uint64_t SH_FLD_PIB_0 = 11174; // 2 +const static uint64_t SH_FLD_PIB_0_LEN = 11175; // 2 +const static uint64_t SH_FLD_PIB_1 = 11176; // 2 +const static uint64_t SH_FLD_PIB_1_LEN = 11177; // 2 +const static uint64_t SH_FLD_PIB_2 = 11178; // 2 +const static uint64_t SH_FLD_PIB_2_LEN = 11179; // 2 +const static uint64_t SH_FLD_PIB_3 = 11180; // 2 +const static uint64_t SH_FLD_PIB_3_LEN = 11181; // 2 +const static uint64_t SH_FLD_PIB_ABORT = 11182; // 2 +const static uint64_t SH_FLD_PIB_ADDR = 11183; // 22 +const static uint64_t SH_FLD_PIB_ADDR_LEN = 11184; // 22 +const static uint64_t SH_FLD_PIB_ADDR_P = 11185; // 1 +const static uint64_t SH_FLD_PIB_ADDR_P_ERR = 11186; // 1 +const static uint64_t SH_FLD_PIB_BUSY = 11187; // 21 +const static uint64_t SH_FLD_PIB_CNTR_REG_ADDR_0 = 11188; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_ADDR_0_LEN = 11189; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_ADDR_1 = 11190; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_ADDR_1_LEN = 11191; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_ADDR_2 = 11192; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_ADDR_2_LEN = 11193; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_ADDR_3 = 11194; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_ADDR_3_LEN = 11195; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_READCONT_0 = 11196; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_READCONT_1 = 11197; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_READCONT_2 = 11198; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_READCONT_3 = 11199; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_RNW_0 = 11200; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_RNW_1 = 11201; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_RNW_2 = 11202; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_RNW_3 = 11203; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_WITHADDR_0 = 11204; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_WITHADDR_1 = 11205; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_WITHADDR_2 = 11206; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_WITHADDR_3 = 11207; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_WITHSTART_0 = 11208; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_WITHSTART_1 = 11209; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_WITHSTART_2 = 11210; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_WITHSTART_3 = 11211; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_WITHSTOP_0 = 11212; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_WITHSTOP_1 = 11213; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_WITHSTOP_2 = 11214; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_BIT_WITHSTOP_3 = 11215; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_1_0 = 11216; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_1_0_LEN = 11217; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_1_1 = 11218; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_1_1_LEN = 11219; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_1_2 = 11220; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_1_2_LEN = 11221; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_1_3 = 11222; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_1_3_LEN = 11223; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_2_0 = 11224; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_2_0_LEN = 11225; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_2_1 = 11226; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_2_1_LEN = 11227; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_2_2 = 11228; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_2_2_LEN = 11229; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_2_3 = 11230; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_2_3_LEN = 11231; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_3_0 = 11232; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_3_0_LEN = 11233; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_3_1 = 11234; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_3_1_LEN = 11235; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_3_2 = 11236; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_3_2_LEN = 11237; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_3_3 = 11238; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_3_3_LEN = 11239; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_4_0 = 11240; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_4_0_LEN = 11241; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_4_1 = 11242; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_4_1_LEN = 11243; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_4_2 = 11244; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_4_2_LEN = 11245; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_4_3 = 11246; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_DATA_4_3_LEN = 11247; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_LENGTH_0 = 11248; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_LENGTH_0_LEN = 11249; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_LENGTH_1 = 11250; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_LENGTH_1_LEN = 11251; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_LENGTH_2 = 11252; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_LENGTH_2_LEN = 11253; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_LENGTH_3 = 11254; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_LENGTH_3_LEN = 11255; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_PORT_NUMBER_0 = 11256; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_PORT_NUMBER_0_LEN = 11257; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_PORT_NUMBER_1 = 11258; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_PORT_NUMBER_1_LEN = 11259; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_PORT_NUMBER_2 = 11260; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_PORT_NUMBER_2_LEN = 11261; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_PORT_NUMBER_3 = 11262; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_PORT_NUMBER_3_LEN = 11263; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_SPEED_0 = 11264; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_SPEED_0_LEN = 11265; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_SPEED_1 = 11266; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_SPEED_1_LEN = 11267; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_SPEED_2 = 11268; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_SPEED_2_LEN = 11269; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_SPEED_3 = 11270; // 1 +const static uint64_t SH_FLD_PIB_CNTR_REG_SPEED_3_LEN = 11271; // 1 +const static uint64_t SH_FLD_PIB_COMPONENT_BUSY = 11272; // 1 +const static uint64_t SH_FLD_PIB_DATA0TO7_0 = 11273; // 1 +const static uint64_t SH_FLD_PIB_DATA0TO7_0_LEN = 11274; // 1 +const static uint64_t SH_FLD_PIB_DATA0TO7_1 = 11275; // 1 +const static uint64_t SH_FLD_PIB_DATA0TO7_1_LEN = 11276; // 1 +const static uint64_t SH_FLD_PIB_DATA0TO7_2 = 11277; // 1 +const static uint64_t SH_FLD_PIB_DATA0TO7_2_LEN = 11278; // 1 +const static uint64_t SH_FLD_PIB_DATA0TO7_3 = 11279; // 1 +const static uint64_t SH_FLD_PIB_DATA0TO7_3_LEN = 11280; // 1 +const static uint64_t SH_FLD_PIB_DATAOP_PENDING = 11281; // 21 +const static uint64_t SH_FLD_PIB_DATA_P = 11282; // 1 +const static uint64_t SH_FLD_PIB_DATA_P_ERR = 11283; // 1 +const static uint64_t SH_FLD_PIB_ERROR_CODE = 11284; // 1 +const static uint64_t SH_FLD_PIB_ERROR_CODE_LEN = 11285; // 1 +const static uint64_t SH_FLD_PIB_FSM_STATE = 11286; // 1 +const static uint64_t SH_FLD_PIB_FSM_STATE_LEN = 11287; // 1 +const static uint64_t SH_FLD_PIB_HANG = 11288; // 1 +const static uint64_t SH_FLD_PIB_IFETCH_PENDING = 11289; // 21 +const static uint64_t SH_FLD_PIB_IMPRECISE_ERROR_PENDING = 11290; // 21 +const static uint64_t SH_FLD_PIB_MASTER_REQUEST = 11291; // 4 +const static uint64_t SH_FLD_PIB_MASTER_RSP_INFO = 11292; // 4 +const static uint64_t SH_FLD_PIB_MASTER_RSP_INFO_LEN = 11293; // 4 +const static uint64_t SH_FLD_PIB_RESET = 11294; // 1 +const static uint64_t SH_FLD_PIB_RESET_DURING_PIB_ACCESS = 11295; // 4 +const static uint64_t SH_FLD_PIB_RESPONSE_INFO = 11296; // 1 +const static uint64_t SH_FLD_PIB_RESPONSE_INFO_LEN = 11297; // 1 +const static uint64_t SH_FLD_PIB_RSP_INFO = 11298; // 21 +const static uint64_t SH_FLD_PIB_RSP_INFO_LEN = 11299; // 21 +const static uint64_t SH_FLD_PIB_R_NW = 11300; // 21 +const static uint64_t SH_FLD_PIB_SLAVE_ADDR_INVALID = 11301; // 4 +const static uint64_t SH_FLD_PIB_SLAVE_ADDR_PARITY = 11302; // 4 +const static uint64_t SH_FLD_PIB_SLAVE_DATA_PARITY = 11303; // 4 +const static uint64_t SH_FLD_PIB_SLAVE_READ_INVALID = 11304; // 4 +const static uint64_t SH_FLD_PIB_SLAVE_WRITE_INVALID = 11305; // 4 +const static uint64_t SH_FLD_PID = 11306; // 273 +const static uint64_t SH_FLD_PID_LEN = 11307; // 273 +const static uint64_t SH_FLD_PID_MASK = 11308; // 1 +const static uint64_t SH_FLD_PID_MASK_LEN = 11309; // 1 +const static uint64_t SH_FLD_PIPELINE_ENABLE = 11310; // 1 +const static uint64_t SH_FLD_PIPE_COUNTER = 11311; // 1 +const static uint64_t SH_FLD_PIPE_COUNTER_LEN = 11312; // 1 +const static uint64_t SH_FLD_PIPE_MARGIN = 11313; // 48 +const static uint64_t SH_FLD_PIPE_SEL = 11314; // 120 +const static uint64_t SH_FLD_PIPE_SEL_LEN = 11315; // 48 +const static uint64_t SH_FLD_PLBARB_LOCKERR = 11316; // 1 +const static uint64_t SH_FLD_PLLCVHOLD = 11317; // 6 +const static uint64_t SH_FLD_PLLFMAX = 11318; // 6 +const static uint64_t SH_FLD_PLLFMIN = 11319; // 6 +const static uint64_t SH_FLD_PLLLOCK = 11320; // 4 +const static uint64_t SH_FLD_PLLLOCK_0_FILTER_PLL_NEST = 11321; // 1 +const static uint64_t SH_FLD_PLLLOCK_1_FILTER_PLL_MC = 11322; // 1 +const static uint64_t SH_FLD_PLLLOCK_2_XBUS = 11323; // 1 +const static uint64_t SH_FLD_PLLLOCK_3_NEST = 11324; // 1 +const static uint64_t SH_FLD_PLLREFSEL = 11325; // 3 +const static uint64_t SH_FLD_PLLREFSEL_LEN = 11326; // 3 +const static uint64_t SH_FLD_PLLRESET = 11327; // 6 +const static uint64_t SH_FLD_PLL_BYPASS = 11328; // 43 +const static uint64_t SH_FLD_PLL_CLKIN_SEL = 11329; // 43 +const static uint64_t SH_FLD_PLL_DESTOUT = 11330; // 43 +const static uint64_t SH_FLD_PLL_LOCK_TIMEOUT_SEL = 11331; // 4 +const static uint64_t SH_FLD_PLL_LOCK_TIMEOUT_SEL_LEN = 11332; // 4 +const static uint64_t SH_FLD_PLL_REFCLKSEL_SCOM_EN = 11333; // 4 +const static uint64_t SH_FLD_PLL_RESET = 11334; // 43 +const static uint64_t SH_FLD_PLL_TEST_EN = 11335; // 43 +const static uint64_t SH_FLD_PLL_UNLOCK = 11336; // 43 +const static uint64_t SH_FLD_PLL_UNLOCK_LEN = 11337; // 43 +const static uint64_t SH_FLD_PL_ERR = 11338; // 6 +const static uint64_t SH_FLD_PL_FIR_ERR = 11339; // 6 +const static uint64_t SH_FLD_PM03_L23_EVENT_TID_SEL_EN = 11340; // 12 +const static uint64_t SH_FLD_PM03_L23_EVENT_TID_SEL_NUM = 11341; // 12 +const static uint64_t SH_FLD_PM03_L23_EVENT_TID_SEL_NUM_LEN = 11342; // 12 +const static uint64_t SH_FLD_PM03_SMT_ROTATION_DIS = 11343; // 12 +const static uint64_t SH_FLD_PM07_TID_ROTATE_PLSS_RATE = 11344; // 12 +const static uint64_t SH_FLD_PM07_TID_ROTATE_PLSS_RATE_LEN = 11345; // 12 +const static uint64_t SH_FLD_PM47_L23_EVENT_TID_SEL_EN = 11346; // 12 +const static uint64_t SH_FLD_PM47_L23_EVENT_TID_SEL_NUM = 11347; // 12 +const static uint64_t SH_FLD_PM47_L23_EVENT_TID_SEL_NUM_LEN = 11348; // 12 +const static uint64_t SH_FLD_PM47_SMT_ROTATION_DIS = 11349; // 12 +const static uint64_t SH_FLD_PMCM_THRESHOLD = 11350; // 24 +const static uint64_t SH_FLD_PMCM_THRESHOLD_LEN = 11351; // 24 +const static uint64_t SH_FLD_PMCR_OVERRIDE_EN = 11352; // 12 +const static uint64_t SH_FLD_PMCR_UPDATE_C0 = 11353; // 12 +const static uint64_t SH_FLD_PMCR_UPDATE_C1 = 11354; // 12 +const static uint64_t SH_FLD_PMC_O2S_0A_ONGOING = 11355; // 1 +const static uint64_t SH_FLD_PMC_O2S_0B_ONGOING = 11356; // 1 +const static uint64_t SH_FLD_PMC_O2S_1A_ONGOING = 11357; // 1 +const static uint64_t SH_FLD_PMC_O2S_1B_ONGOING = 11358; // 1 +const static uint64_t SH_FLD_PMC_PCB_INTR_TYPE0_PENDING = 11359; // 1 +const static uint64_t SH_FLD_PMC_PCB_INTR_TYPE1_PENDING = 11360; // 1 +const static uint64_t SH_FLD_PMC_PCB_INTR_TYPE2_PENDING = 11361; // 1 +const static uint64_t SH_FLD_PMC_PCB_INTR_TYPE3_PENDING = 11362; // 1 +const static uint64_t SH_FLD_PMC_PCB_INTR_TYPE4_PENDING = 11363; // 1 +const static uint64_t SH_FLD_PMC_PCB_INTR_TYPE5_PENDING = 11364; // 1 +const static uint64_t SH_FLD_PMC_PCB_INTR_TYPE6_PENDING = 11365; // 1 +const static uint64_t SH_FLD_PMC_PCB_INTR_TYPE7_PENDING = 11366; // 1 +const static uint64_t SH_FLD_PMISC_CRESP_ADDR_ERR = 11367; // 24 +const static uint64_t SH_FLD_PMISC_MODE = 11368; // 3 +const static uint64_t SH_FLD_PMON_GROUP_SELECT = 11369; // 2 +const static uint64_t SH_FLD_PMON_GROUP_SELECT_LEN = 11370; // 2 +const static uint64_t SH_FLD_PMON_MUX_BYTE0 = 11371; // 1 +const static uint64_t SH_FLD_PMON_MUX_BYTE0_LEN = 11372; // 1 +const static uint64_t SH_FLD_PMON_MUX_BYTE1 = 11373; // 1 +const static uint64_t SH_FLD_PMON_MUX_BYTE1_LEN = 11374; // 1 +const static uint64_t SH_FLD_PMON_MUX_BYTE2 = 11375; // 1 +const static uint64_t SH_FLD_PMON_MUX_BYTE2_LEN = 11376; // 1 +const static uint64_t SH_FLD_PMON_MUX_BYTE3 = 11377; // 1 +const static uint64_t SH_FLD_PMON_MUX_BYTE3_LEN = 11378; // 1 +const static uint64_t SH_FLD_PMSR_OVERRIDE_EN = 11379; // 12 +const static uint64_t SH_FLD_PMU0145_EVENT0_MODE = 11380; // 2 +const static uint64_t SH_FLD_PMU0145_EVENT0_MODE_LEN = 11381; // 2 +const static uint64_t SH_FLD_PMU0145_EVENT1_MODE = 11382; // 2 +const static uint64_t SH_FLD_PMU0145_EVENT1_MODE_LEN = 11383; // 2 +const static uint64_t SH_FLD_PMU0145_EVENT2_MODE = 11384; // 2 +const static uint64_t SH_FLD_PMU0145_EVENT2_MODE_LEN = 11385; // 2 +const static uint64_t SH_FLD_PMU0145_EVENT3_MODE = 11386; // 2 +const static uint64_t SH_FLD_PMU0145_EVENT3_MODE_LEN = 11387; // 2 +const static uint64_t SH_FLD_PMU01_LINK_SELECT = 11388; // 2 +const static uint64_t SH_FLD_PMU0_ENABLE = 11389; // 2 +const static uint64_t SH_FLD_PMU0_SIZE = 11390; // 2 +const static uint64_t SH_FLD_PMU0_SIZE_LEN = 11391; // 2 +const static uint64_t SH_FLD_PMU1_ENABLE = 11392; // 2 +const static uint64_t SH_FLD_PMU1_SIZE = 11393; // 2 +const static uint64_t SH_FLD_PMU1_SIZE_LEN = 11394; // 2 +const static uint64_t SH_FLD_PMU2367_EVENT0_MODE = 11395; // 2 +const static uint64_t SH_FLD_PMU2367_EVENT0_MODE_LEN = 11396; // 2 +const static uint64_t SH_FLD_PMU2367_EVENT1_MODE = 11397; // 2 +const static uint64_t SH_FLD_PMU2367_EVENT1_MODE_LEN = 11398; // 2 +const static uint64_t SH_FLD_PMU2367_EVENT2_MODE = 11399; // 2 +const static uint64_t SH_FLD_PMU2367_EVENT2_MODE_LEN = 11400; // 2 +const static uint64_t SH_FLD_PMU2367_EVENT3_MODE = 11401; // 2 +const static uint64_t SH_FLD_PMU2367_EVENT3_MODE_LEN = 11402; // 2 +const static uint64_t SH_FLD_PMU23_LINK_SELECT = 11403; // 2 +const static uint64_t SH_FLD_PMU2_ENABLE = 11404; // 2 +const static uint64_t SH_FLD_PMU2_SIZE = 11405; // 2 +const static uint64_t SH_FLD_PMU2_SIZE_LEN = 11406; // 2 +const static uint64_t SH_FLD_PMU3_ENABLE = 11407; // 2 +const static uint64_t SH_FLD_PMU3_SIZE = 11408; // 2 +const static uint64_t SH_FLD_PMU3_SIZE_LEN = 11409; // 2 +const static uint64_t SH_FLD_PMU45_LINK_SELECT = 11410; // 2 +const static uint64_t SH_FLD_PMU4_ENABLE = 11411; // 2 +const static uint64_t SH_FLD_PMU5_ENABLE = 11412; // 2 +const static uint64_t SH_FLD_PMU67_LINK_SELECT = 11413; // 2 +const static uint64_t SH_FLD_PMU6_ENABLE = 11414; // 2 +const static uint64_t SH_FLD_PMU7_ENABLE = 11415; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER0_BIT_PAIR_SELECT = 11416; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER0_BIT_PAIR_SELECT_LEN = 11417; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER0_ENABLE = 11418; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER0_EVENT_SELECT = 11419; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER0_EVENT_SELECT_LEN = 11420; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER0_POSEDGE_SELECT = 11421; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER1_BIT_PAIR_SELECT = 11422; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER1_BIT_PAIR_SELECT_LEN = 11423; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER1_ENABLE = 11424; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER1_EVENT_SELECT = 11425; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER1_EVENT_SELECT_LEN = 11426; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER1_POSEDGE_SELECT = 11427; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER2_BIT_PAIR_SELECT = 11428; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER2_BIT_PAIR_SELECT_LEN = 11429; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER2_ENABLE = 11430; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER2_EVENT_SELECT = 11431; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER2_EVENT_SELECT_LEN = 11432; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER2_POSEDGE_SELECT = 11433; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER3_BIT_PAIR_SELECT = 11434; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER3_BIT_PAIR_SELECT_LEN = 11435; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER3_ENABLE = 11436; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER3_EVENT_SELECT = 11437; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER3_EVENT_SELECT_LEN = 11438; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER3_POSEDGE_SELECT = 11439; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER_FREEZE_MODE = 11440; // 2 +const static uint64_t SH_FLD_PMUA_COUNTER_RESET_MODE = 11441; // 2 +const static uint64_t SH_FLD_PMUA_PORT_SELECT = 11442; // 2 +const static uint64_t SH_FLD_PMUA_PORT_SELECT_LEN = 11443; // 2 +const static uint64_t SH_FLD_PMUA_PRESCALER_SELECT = 11444; // 2 +const static uint64_t SH_FLD_PMUA_PRESCALER_SELECT_LEN = 11445; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER0_BIT_PAIR_SELECT = 11446; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER0_BIT_PAIR_SELECT_LEN = 11447; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER0_ENABLE = 11448; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER0_EVENT_SELECT = 11449; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER0_EVENT_SELECT_LEN = 11450; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER0_POSEDGE_SELECT = 11451; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER1_BIT_PAIR_SELECT = 11452; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER1_BIT_PAIR_SELECT_LEN = 11453; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER1_ENABLE = 11454; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER1_EVENT_SELECT = 11455; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER1_EVENT_SELECT_LEN = 11456; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER1_POSEDGE_SELECT = 11457; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER2_BIT_PAIR_SELECT = 11458; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER2_BIT_PAIR_SELECT_LEN = 11459; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER2_ENABLE = 11460; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER2_EVENT_SELECT = 11461; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER2_EVENT_SELECT_LEN = 11462; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER2_POSEDGE_SELECT = 11463; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER3_BIT_PAIR_SELECT = 11464; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER3_BIT_PAIR_SELECT_LEN = 11465; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER3_ENABLE = 11466; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER3_EVENT_SELECT = 11467; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER3_EVENT_SELECT_LEN = 11468; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER3_POSEDGE_SELECT = 11469; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER_FREEZE_MODE = 11470; // 2 +const static uint64_t SH_FLD_PMUB_COUNTER_RESET_MODE = 11471; // 2 +const static uint64_t SH_FLD_PMUB_PORT_SELECT = 11472; // 2 +const static uint64_t SH_FLD_PMUB_PORT_SELECT_LEN = 11473; // 2 +const static uint64_t SH_FLD_PMUB_PRESCALER_SELECT = 11474; // 2 +const static uint64_t SH_FLD_PMUB_PRESCALER_SELECT_LEN = 11475; // 2 +const static uint64_t SH_FLD_PMULET_FREEZE_MODE = 11476; // 2 +const static uint64_t SH_FLD_PMULET_RESET_MODE = 11477; // 2 +const static uint64_t SH_FLD_PMU_BUS_ENABLE = 11478; // 2 +const static uint64_t SH_FLD_PMU_BUS_ENABLE_LEN = 11479; // 2 +const static uint64_t SH_FLD_PMU_ENABLE = 11480; // 2 +const static uint64_t SH_FLD_PMU_SELECT_HIGH = 11481; // 2 +const static uint64_t SH_FLD_PMU_SELECT_HIGH_LEN = 11482; // 2 +const static uint64_t SH_FLD_PMU_SELECT_LOW = 11483; // 2 +const static uint64_t SH_FLD_PMU_SELECT_LOW_LEN = 11484; // 2 +const static uint64_t SH_FLD_PM_ERROR = 11485; // 6 +const static uint64_t SH_FLD_PM_STATE_ACTIVE_C0 = 11486; // 12 +const static uint64_t SH_FLD_PM_STATE_ACTIVE_C1 = 11487; // 12 +const static uint64_t SH_FLD_PM_STATE_ALL_HV_C0 = 11488; // 12 +const static uint64_t SH_FLD_PM_STATE_ALL_HV_C1 = 11489; // 12 +const static uint64_t SH_FLD_PM_STATE_C0 = 11490; // 12 +const static uint64_t SH_FLD_PM_STATE_C0_LEN = 11491; // 12 +const static uint64_t SH_FLD_PM_STATE_C1 = 11492; // 12 +const static uint64_t SH_FLD_PM_STATE_C1_LEN = 11493; // 12 +const static uint64_t SH_FLD_POCKET_RATE1 = 11494; // 12 +const static uint64_t SH_FLD_POCKET_RATE1_LEN = 11495; // 12 +const static uint64_t SH_FLD_POCKET_RATE2 = 11496; // 12 +const static uint64_t SH_FLD_POCKET_RATE2_LEN = 11497; // 12 +const static uint64_t SH_FLD_POCKET_RATE3 = 11498; // 12 +const static uint64_t SH_FLD_POCKET_RATE3_LEN = 11499; // 12 +const static uint64_t SH_FLD_POD0 = 11500; // 50 +const static uint64_t SH_FLD_POD0_LEN = 11501; // 50 +const static uint64_t SH_FLD_POD1 = 11502; // 50 +const static uint64_t SH_FLD_POD10 = 11503; // 50 +const static uint64_t SH_FLD_POD10_LEN = 11504; // 50 +const static uint64_t SH_FLD_POD1_LEN = 11505; // 50 +const static uint64_t SH_FLD_POD2 = 11506; // 50 +const static uint64_t SH_FLD_POD2_LEN = 11507; // 50 +const static uint64_t SH_FLD_POD3 = 11508; // 50 +const static uint64_t SH_FLD_POD3_LEN = 11509; // 50 +const static uint64_t SH_FLD_POD4 = 11510; // 50 +const static uint64_t SH_FLD_POD4_LEN = 11511; // 50 +const static uint64_t SH_FLD_POD5 = 11512; // 50 +const static uint64_t SH_FLD_POD5_LEN = 11513; // 50 +const static uint64_t SH_FLD_POD6 = 11514; // 50 +const static uint64_t SH_FLD_POD6_LEN = 11515; // 50 +const static uint64_t SH_FLD_POD7 = 11516; // 50 +const static uint64_t SH_FLD_POD7_LEN = 11517; // 50 +const static uint64_t SH_FLD_POD8 = 11518; // 50 +const static uint64_t SH_FLD_POD8_LEN = 11519; // 50 +const static uint64_t SH_FLD_POD9 = 11520; // 50 +const static uint64_t SH_FLD_POD9_LEN = 11521; // 50 +const static uint64_t SH_FLD_POINTER = 11522; // 2 +const static uint64_t SH_FLD_POINTER_LEN = 11523; // 2 +const static uint64_t SH_FLD_POLLING_TIMEOUT_SEL = 11524; // 6 +const static uint64_t SH_FLD_POLLING_TIMEOUT_SEL_LEN = 11525; // 6 +const static uint64_t SH_FLD_POLL_BCST_RTY_MON = 11526; // 1 +const static uint64_t SH_FLD_POLL_DONE = 11527; // 1 +const static uint64_t SH_FLD_POOL = 11528; // 1 +const static uint64_t SH_FLD_POOL_LEN = 11529; // 1 +const static uint64_t SH_FLD_PORT0_ERROR_CODE = 11530; // 3 +const static uint64_t SH_FLD_PORT0_ERROR_CODE_0 = 11531; // 1 +const static uint64_t SH_FLD_PORT0_ERROR_CODE_0_LEN = 11532; // 1 +const static uint64_t SH_FLD_PORT0_ERROR_CODE_1 = 11533; // 2 +const static uint64_t SH_FLD_PORT0_ERROR_CODE_1_LEN = 11534; // 2 +const static uint64_t SH_FLD_PORT0_ERROR_CODE_2 = 11535; // 3 +const static uint64_t SH_FLD_PORT0_ERROR_CODE_2_LEN = 11536; // 3 +const static uint64_t SH_FLD_PORT0_ERROR_CODE_LEN = 11537; // 3 +const static uint64_t SH_FLD_PORT1_ERROR_CODE = 11538; // 3 +const static uint64_t SH_FLD_PORT1_ERROR_CODE_0 = 11539; // 1 +const static uint64_t SH_FLD_PORT1_ERROR_CODE_0_LEN = 11540; // 1 +const static uint64_t SH_FLD_PORT1_ERROR_CODE_1 = 11541; // 2 +const static uint64_t SH_FLD_PORT1_ERROR_CODE_1_LEN = 11542; // 2 +const static uint64_t SH_FLD_PORT1_ERROR_CODE_2 = 11543; // 3 +const static uint64_t SH_FLD_PORT1_ERROR_CODE_2_LEN = 11544; // 3 +const static uint64_t SH_FLD_PORT1_ERROR_CODE_LEN = 11545; // 3 +const static uint64_t SH_FLD_PORT2_ERROR_CODE = 11546; // 3 +const static uint64_t SH_FLD_PORT2_ERROR_CODE_0 = 11547; // 1 +const static uint64_t SH_FLD_PORT2_ERROR_CODE_0_LEN = 11548; // 1 +const static uint64_t SH_FLD_PORT2_ERROR_CODE_1 = 11549; // 2 +const static uint64_t SH_FLD_PORT2_ERROR_CODE_1_LEN = 11550; // 2 +const static uint64_t SH_FLD_PORT2_ERROR_CODE_2 = 11551; // 3 +const static uint64_t SH_FLD_PORT2_ERROR_CODE_2_LEN = 11552; // 3 +const static uint64_t SH_FLD_PORT2_ERROR_CODE_LEN = 11553; // 3 +const static uint64_t SH_FLD_PORT3_ERROR_CODE = 11554; // 3 +const static uint64_t SH_FLD_PORT3_ERROR_CODE_0 = 11555; // 1 +const static uint64_t SH_FLD_PORT3_ERROR_CODE_0_LEN = 11556; // 1 +const static uint64_t SH_FLD_PORT3_ERROR_CODE_1 = 11557; // 2 +const static uint64_t SH_FLD_PORT3_ERROR_CODE_1_LEN = 11558; // 2 +const static uint64_t SH_FLD_PORT3_ERROR_CODE_2 = 11559; // 3 +const static uint64_t SH_FLD_PORT3_ERROR_CODE_2_LEN = 11560; // 3 +const static uint64_t SH_FLD_PORT3_ERROR_CODE_LEN = 11561; // 3 +const static uint64_t SH_FLD_PORT4_ERROR_CODE = 11562; // 3 +const static uint64_t SH_FLD_PORT4_ERROR_CODE_0 = 11563; // 1 +const static uint64_t SH_FLD_PORT4_ERROR_CODE_0_LEN = 11564; // 1 +const static uint64_t SH_FLD_PORT4_ERROR_CODE_1 = 11565; // 2 +const static uint64_t SH_FLD_PORT4_ERROR_CODE_1_LEN = 11566; // 2 +const static uint64_t SH_FLD_PORT4_ERROR_CODE_2 = 11567; // 3 +const static uint64_t SH_FLD_PORT4_ERROR_CODE_2_LEN = 11568; // 3 +const static uint64_t SH_FLD_PORT4_ERROR_CODE_LEN = 11569; // 3 +const static uint64_t SH_FLD_PORT5_ERROR_CODE = 11570; // 3 +const static uint64_t SH_FLD_PORT5_ERROR_CODE_0 = 11571; // 1 +const static uint64_t SH_FLD_PORT5_ERROR_CODE_0_LEN = 11572; // 1 +const static uint64_t SH_FLD_PORT5_ERROR_CODE_1 = 11573; // 2 +const static uint64_t SH_FLD_PORT5_ERROR_CODE_1_LEN = 11574; // 2 +const static uint64_t SH_FLD_PORT5_ERROR_CODE_2 = 11575; // 3 +const static uint64_t SH_FLD_PORT5_ERROR_CODE_2_LEN = 11576; // 3 +const static uint64_t SH_FLD_PORT5_ERROR_CODE_LEN = 11577; // 3 +const static uint64_t SH_FLD_PORT6_ERROR_CODE = 11578; // 3 +const static uint64_t SH_FLD_PORT6_ERROR_CODE_0 = 11579; // 1 +const static uint64_t SH_FLD_PORT6_ERROR_CODE_0_LEN = 11580; // 1 +const static uint64_t SH_FLD_PORT6_ERROR_CODE_1 = 11581; // 2 +const static uint64_t SH_FLD_PORT6_ERROR_CODE_1_LEN = 11582; // 2 +const static uint64_t SH_FLD_PORT6_ERROR_CODE_2 = 11583; // 3 +const static uint64_t SH_FLD_PORT6_ERROR_CODE_2_LEN = 11584; // 3 +const static uint64_t SH_FLD_PORT6_ERROR_CODE_LEN = 11585; // 3 +const static uint64_t SH_FLD_PORT7_ERROR_CODE = 11586; // 3 +const static uint64_t SH_FLD_PORT7_ERROR_CODE_0 = 11587; // 1 +const static uint64_t SH_FLD_PORT7_ERROR_CODE_0_LEN = 11588; // 1 +const static uint64_t SH_FLD_PORT7_ERROR_CODE_1 = 11589; // 2 +const static uint64_t SH_FLD_PORT7_ERROR_CODE_1_LEN = 11590; // 2 +const static uint64_t SH_FLD_PORT7_ERROR_CODE_2 = 11591; // 3 +const static uint64_t SH_FLD_PORT7_ERROR_CODE_2_LEN = 11592; // 3 +const static uint64_t SH_FLD_PORT7_ERROR_CODE_LEN = 11593; // 3 +const static uint64_t SH_FLD_PORT_0_ENABLE = 11594; // 1 +const static uint64_t SH_FLD_PORT_0_MAINLINE_AUE_ADDR_TRAP = 11595; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_AUE_ADDR_TRAP_LEN = 11596; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_MPE_ADDR_TRAP = 11597; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_MPE_ADDR_TRAP_LEN = 11598; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_MPE_ON_RCE = 11599; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_NCE_ADDR_TRAP = 11600; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_NCE_ADDR_TRAP_LEN = 11601; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_NCE_GALOIS_FIELD = 11602; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_NCE_GALOIS_FIELD_LEN = 11603; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_NCE_IS_TCE = 11604; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_NCE_MAGNITUDE_FIELD = 11605; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_NCE_MAGNITUDE_FIELD_LEN = 11606; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_NCE_ON_RCE = 11607; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_RCE_ADDR_TRAP = 11608; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_RCE_ADDR_TRAP_LEN = 11609; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_TCE_GALOIS_FIELD = 11610; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_TCE_GALOIS_FIELD_LEN = 11611; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_TCE_MAGNITUDE_FIELD = 11612; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_TCE_MAGNITUDE_FIELD_LEN = 11613; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_UE_ADDR_TRAP = 11614; // 2 +const static uint64_t SH_FLD_PORT_0_MAINLINE_UE_ADDR_TRAP_LEN = 11615; // 2 +const static uint64_t SH_FLD_PORT_1_ENABLE = 11616; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_AUE_ADDR_TRAP = 11617; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_AUE_ADDR_TRAP_LEN = 11618; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_MPE_ADDR_TRAP = 11619; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_MPE_ADDR_TRAP_LEN = 11620; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_MPE_ON_RCE = 11621; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_NCE_ADDR_TRAP = 11622; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_NCE_ADDR_TRAP_LEN = 11623; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_NCE_GALOIS_FIELD = 11624; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_NCE_GALOIS_FIELD_LEN = 11625; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_NCE_IS_TCE = 11626; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_NCE_MAGNITUDE_FIELD = 11627; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_NCE_MAGNITUDE_FIELD_LEN = 11628; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_NCE_ON_RCE = 11629; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_RCE_ADDR_TRAP = 11630; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_RCE_ADDR_TRAP_LEN = 11631; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_TCE_GALOIS_FIELD = 11632; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_TCE_GALOIS_FIELD_LEN = 11633; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_TCE_MAGNITUDE_FIELD = 11634; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_TCE_MAGNITUDE_FIELD_LEN = 11635; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_UE_ADDR_TRAP = 11636; // 2 +const static uint64_t SH_FLD_PORT_1_MAINLINE_UE_ADDR_TRAP_LEN = 11637; // 2 +const static uint64_t SH_FLD_PORT_2_ENABLE = 11638; // 3 +const static uint64_t SH_FLD_PORT_2_MAINLINE_AUE_ADDR_TRAP = 11639; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_AUE_ADDR_TRAP_LEN = 11640; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_MPE_ADDR_TRAP = 11641; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_MPE_ADDR_TRAP_LEN = 11642; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_MPE_ON_RCE = 11643; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_NCE_ADDR_TRAP = 11644; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_NCE_ADDR_TRAP_LEN = 11645; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_NCE_GALOIS_FIELD = 11646; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_NCE_GALOIS_FIELD_LEN = 11647; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_NCE_IS_TCE = 11648; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_NCE_MAGNITUDE_FIELD = 11649; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_NCE_MAGNITUDE_FIELD_LEN = 11650; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_NCE_ON_RCE = 11651; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_RCE_ADDR_TRAP = 11652; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_RCE_ADDR_TRAP_LEN = 11653; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_TCE_GALOIS_FIELD = 11654; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_TCE_GALOIS_FIELD_LEN = 11655; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_TCE_MAGNITUDE_FIELD = 11656; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_TCE_MAGNITUDE_FIELD_LEN = 11657; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_UE_ADDR_TRAP = 11658; // 2 +const static uint64_t SH_FLD_PORT_2_MAINLINE_UE_ADDR_TRAP_LEN = 11659; // 2 +const static uint64_t SH_FLD_PORT_3_ENABLE = 11660; // 3 +const static uint64_t SH_FLD_PORT_3_MAINLINE_AUE_ADDR_TRAP = 11661; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_AUE_ADDR_TRAP_LEN = 11662; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_MPE_ADDR_TRAP = 11663; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_MPE_ADDR_TRAP_LEN = 11664; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_MPE_ON_RCE = 11665; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_NCE_ADDR_TRAP = 11666; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_NCE_ADDR_TRAP_LEN = 11667; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_NCE_GALOIS_FIELD = 11668; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_NCE_GALOIS_FIELD_LEN = 11669; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_NCE_IS_TCE = 11670; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_NCE_MAGNITUDE_FIELD = 11671; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_NCE_MAGNITUDE_FIELD_LEN = 11672; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_NCE_ON_RCE = 11673; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_RCE_ADDR_TRAP = 11674; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_RCE_ADDR_TRAP_LEN = 11675; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_TCE_GALOIS_FIELD = 11676; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_TCE_GALOIS_FIELD_LEN = 11677; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_TCE_MAGNITUDE_FIELD = 11678; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_TCE_MAGNITUDE_FIELD_LEN = 11679; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_UE_ADDR_TRAP = 11680; // 2 +const static uint64_t SH_FLD_PORT_3_MAINLINE_UE_ADDR_TRAP_LEN = 11681; // 2 +const static uint64_t SH_FLD_PORT_4_ENABLE = 11682; // 3 +const static uint64_t SH_FLD_PORT_5_ENABLE = 11683; // 3 +const static uint64_t SH_FLD_PORT_6_ENABLE = 11684; // 3 +const static uint64_t SH_FLD_PORT_7_ENABLE = 11685; // 3 +const static uint64_t SH_FLD_PORT_ENABLE = 11686; // 3 +const static uint64_t SH_FLD_PORT_ERROR_RESET = 11687; // 1 +const static uint64_t SH_FLD_PORT_ERROR_RESET_1 = 11688; // 2 +const static uint64_t SH_FLD_PORT_ERROR_RESET_2 = 11689; // 3 +const static uint64_t SH_FLD_PORT_ERROR_RESET_3 = 11690; // 3 +const static uint64_t SH_FLD_PORT_ERROR_RESET_4 = 11691; // 3 +const static uint64_t SH_FLD_PORT_ERROR_RESET_5 = 11692; // 3 +const static uint64_t SH_FLD_PORT_ERROR_RESET_6 = 11693; // 3 +const static uint64_t SH_FLD_PORT_ERROR_RESET_7 = 11694; // 3 +const static uint64_t SH_FLD_PORT_GENERAL_RESET = 11695; // 1 +const static uint64_t SH_FLD_PORT_GENERAL_RESET_1 = 11696; // 2 +const static uint64_t SH_FLD_PORT_GENERAL_RESET_2 = 11697; // 3 +const static uint64_t SH_FLD_PORT_GENERAL_RESET_3 = 11698; // 3 +const static uint64_t SH_FLD_PORT_GENERAL_RESET_4 = 11699; // 3 +const static uint64_t SH_FLD_PORT_GENERAL_RESET_5 = 11700; // 3 +const static uint64_t SH_FLD_PORT_GENERAL_RESET_6 = 11701; // 3 +const static uint64_t SH_FLD_PORT_GENERAL_RESET_7 = 11702; // 3 +const static uint64_t SH_FLD_PORT_NUMBER = 11703; // 1 +const static uint64_t SH_FLD_PORT_NUMBER_0 = 11704; // 1 +const static uint64_t SH_FLD_PORT_NUMBER_0_LEN = 11705; // 1 +const static uint64_t SH_FLD_PORT_NUMBER_1 = 11706; // 1 +const static uint64_t SH_FLD_PORT_NUMBER_1_LEN = 11707; // 1 +const static uint64_t SH_FLD_PORT_NUMBER_2 = 11708; // 1 +const static uint64_t SH_FLD_PORT_NUMBER_2_LEN = 11709; // 1 +const static uint64_t SH_FLD_PORT_NUMBER_3 = 11710; // 1 +const static uint64_t SH_FLD_PORT_NUMBER_3_LEN = 11711; // 1 +const static uint64_t SH_FLD_PORT_NUMBER_LEN = 11712; // 1 +const static uint64_t SH_FLD_PORT_SEL = 11713; // 1 +const static uint64_t SH_FLD_PORT_SEL_LEN = 11714; // 1 +const static uint64_t SH_FLD_POWDN_DLY = 11715; // 30 +const static uint64_t SH_FLD_POWDN_DLY_LEN = 11716; // 30 +const static uint64_t SH_FLD_POWERBUS_DATA_HANG_ERROR = 11717; // 4 +const static uint64_t SH_FLD_POWERBUS_HANG_ERROR = 11718; // 4 +const static uint64_t SH_FLD_POWERBUS_INTERFACE_PE = 11719; // 4 +const static uint64_t SH_FLD_POWERBUS_MISC_ERROR = 11720; // 4 +const static uint64_t SH_FLD_POWERBUS_PROTOCOL_ERROR = 11721; // 4 +const static uint64_t SH_FLD_POWER_MANAGEMENT_INTERRUPT = 11722; // 1 +const static uint64_t SH_FLD_POWER_SAVING_LIMIT_A_N = 11723; // 96 +const static uint64_t SH_FLD_POWER_SAVING_LIMIT_A_N_LEN = 11724; // 96 +const static uint64_t SH_FLD_POWER_UP_CNTR_REF = 11725; // 1 +const static uint64_t SH_FLD_POWER_UP_CNTR_REF_LEN = 11726; // 1 +const static uint64_t SH_FLD_POWUP_DLY = 11727; // 30 +const static uint64_t SH_FLD_POWUP_DLY_LEN = 11728; // 30 +const static uint64_t SH_FLD_PPC405_HALT = 11729; // 1 +const static uint64_t SH_FLD_PPE_BREAKPOINT_ERROR = 11730; // 12 +const static uint64_t SH_FLD_PPE_DEBUG_TRIGGER = 11731; // 12 +const static uint64_t SH_FLD_PPE_EXTERNAL_ERROR = 11732; // 12 +const static uint64_t SH_FLD_PPE_HALTED = 11733; // 12 +const static uint64_t SH_FLD_PPE_INTERNAL_ERROR = 11734; // 12 +const static uint64_t SH_FLD_PPE_PROGRESS_ERROR = 11735; // 12 +const static uint64_t SH_FLD_PPE_RD_ACK_DEAD = 11736; // 12 +const static uint64_t SH_FLD_PPE_RD_CRESP_ADDR_ERR = 11737; // 24 +const static uint64_t SH_FLD_PPE_RD_FOREIGN0_ACK_DEAD = 11738; // 12 +const static uint64_t SH_FLD_PPE_RD_FOREIGN1_ACK_DEAD = 11739; // 12 +const static uint64_t SH_FLD_PPE_WATCHDOG = 11740; // 12 +const static uint64_t SH_FLD_PPE_WR_ACK_DEAD = 11741; // 12 +const static uint64_t SH_FLD_PPE_WR_CRESP_ADDR_ERR = 11742; // 24 +const static uint64_t SH_FLD_PPE_WR_FOREIGN0_ACK_DEAD = 11743; // 12 +const static uint64_t SH_FLD_PPE_WR_FOREIGN1_ACK_DEAD = 11744; // 12 +const static uint64_t SH_FLD_PPE_XIRAMEDR_EDR = 11745; // 4 +const static uint64_t SH_FLD_PPE_XIRAMEDR_EDR_LEN = 11746; // 4 +const static uint64_t SH_FLD_PPE_XIRAMGA_IR = 11747; // 4 +const static uint64_t SH_FLD_PPE_XIRAMGA_IR_LEN = 11748; // 4 +const static uint64_t SH_FLD_PPE_XIRAMRA_SPRG0 = 11749; // 4 +const static uint64_t SH_FLD_PPE_XIRAMRA_SPRG0_LEN = 11750; // 4 +const static uint64_t SH_FLD_PPE_XIXCR_XCR = 11751; // 4 +const static uint64_t SH_FLD_PPE_XIXCR_XCR_LEN = 11752; // 4 +const static uint64_t SH_FLD_PPM_SPARE_OUT_C0 = 11753; // 12 +const static uint64_t SH_FLD_PPM_SPARE_OUT_C1 = 11754; // 12 +const static uint64_t SH_FLD_PPM_WRITE_DISABLE = 11755; // 24 +const static uint64_t SH_FLD_PPM_WRITE_OVERRIDE = 11756; // 24 +const static uint64_t SH_FLD_PQ_STATE = 11757; // 1 +const static uint64_t SH_FLD_PQ_STATE_LEN = 11758; // 1 +const static uint64_t SH_FLD_PRBS_CHECK_SYNC = 11759; // 72 +const static uint64_t SH_FLD_PRBS_SCRAMBLE_MODE = 11760; // 144 +const static uint64_t SH_FLD_PRBS_SCRAMBLE_MODE_LEN = 11761; // 144 +const static uint64_t SH_FLD_PRBS_SEED_DDC = 11762; // 72 +const static uint64_t SH_FLD_PRBS_SEED_MODE = 11763; // 76 +const static uint64_t SH_FLD_PRBS_SEED_VALUE_0_15 = 11764; // 140 +const static uint64_t SH_FLD_PRBS_SEED_VALUE_0_15_LEN = 11765; // 140 +const static uint64_t SH_FLD_PRBS_SEED_VALUE_16_22 = 11766; // 140 +const static uint64_t SH_FLD_PRBS_SEED_VALUE_16_22_LEN = 11767; // 140 +const static uint64_t SH_FLD_PRBS_SLS_EXPECT = 11768; // 4 +const static uint64_t SH_FLD_PRBS_SLS_EXPECT_LEN = 11769; // 4 +const static uint64_t SH_FLD_PRBS_SYNC_MODE = 11770; // 72 +const static uint64_t SH_FLD_PRBS_TEST_DATA = 11771; // 120 +const static uint64_t SH_FLD_PRBS_TEST_DATA_LEN = 11772; // 120 +const static uint64_t SH_FLD_PRECISE_DIR_FLUSH_FAILED = 11773; // 2 +const static uint64_t SH_FLD_PRECISE_DIR_SIZE = 11774; // 2 +const static uint64_t SH_FLD_PRECISE_DIR_SIZE_LEN = 11775; // 2 +const static uint64_t SH_FLD_PRECLUDE = 11776; // 1 +const static uint64_t SH_FLD_PREFETCH = 11777; // 6 +const static uint64_t SH_FLD_PREFETCH_CHANNEL_CNT = 11778; // 1 +const static uint64_t SH_FLD_PREFETCH_CHANNEL_CNT_LEN = 11779; // 1 +const static uint64_t SH_FLD_PREFETCH_DISABLE = 11780; // 6 +const static uint64_t SH_FLD_PREFETCH_DISTANCE = 11781; // 6 +const static uint64_t SH_FLD_PREFETCH_DISTANCE_LEN = 11782; // 6 +const static uint64_t SH_FLD_PREFETCH_LIMIT = 11783; // 8 +const static uint64_t SH_FLD_PREFETCH_LIMIT_LEN = 11784; // 8 +const static uint64_t SH_FLD_PREF_DEPTH = 11785; // 1 +const static uint64_t SH_FLD_PREF_DEPTH_LEN = 11786; // 1 +const static uint64_t SH_FLD_PREF_THRSH0 = 11787; // 1 +const static uint64_t SH_FLD_PREF_THRSH0_LEN = 11788; // 1 +const static uint64_t SH_FLD_PREF_THRSH1 = 11789; // 1 +const static uint64_t SH_FLD_PREF_THRSH1_LEN = 11790; // 1 +const static uint64_t SH_FLD_PREF_THRSH2 = 11791; // 1 +const static uint64_t SH_FLD_PREF_THRSH2_LEN = 11792; // 1 +const static uint64_t SH_FLD_PREF_THRSH3 = 11793; // 1 +const static uint64_t SH_FLD_PREF_THRSH3_LEN = 11794; // 1 +const static uint64_t SH_FLD_PREF_TIMEOUT = 11795; // 1 +const static uint64_t SH_FLD_PREF_TIMEOUT_LEN = 11796; // 1 +const static uint64_t SH_FLD_PRESCALAR_SEL0 = 11797; // 2 +const static uint64_t SH_FLD_PRESCALAR_SEL0_LEN = 11798; // 2 +const static uint64_t SH_FLD_PRESCALAR_SEL1 = 11799; // 2 +const static uint64_t SH_FLD_PRESCALAR_SEL1_LEN = 11800; // 2 +const static uint64_t SH_FLD_PRESCALAR_SEL2 = 11801; // 2 +const static uint64_t SH_FLD_PRESCALAR_SEL2_LEN = 11802; // 2 +const static uint64_t SH_FLD_PRESCALAR_SEL3 = 11803; // 2 +const static uint64_t SH_FLD_PRESCALAR_SEL3_LEN = 11804; // 2 +const static uint64_t SH_FLD_PRESCALER_SEL = 11805; // 1 +const static uint64_t SH_FLD_PRESCALER_SELECT = 11806; // 1 +const static uint64_t SH_FLD_PRESCALER_SELECT_LEN = 11807; // 1 +const static uint64_t SH_FLD_PRESCALER_SEL_LEN = 11808; // 1 +const static uint64_t SH_FLD_PRESCALE_C0 = 11809; // 3 +const static uint64_t SH_FLD_PRESCALE_C0_LEN = 11810; // 3 +const static uint64_t SH_FLD_PRESCALE_C1 = 11811; // 3 +const static uint64_t SH_FLD_PRESCALE_C1_LEN = 11812; // 3 +const static uint64_t SH_FLD_PRESCALE_C2 = 11813; // 3 +const static uint64_t SH_FLD_PRESCALE_C2_LEN = 11814; // 3 +const static uint64_t SH_FLD_PRESCALE_C3 = 11815; // 3 +const static uint64_t SH_FLD_PRESCALE_C3_LEN = 11816; // 3 +const static uint64_t SH_FLD_PRESP_RTY_OTHER = 11817; // 2 +const static uint64_t SH_FLD_PREVENT_SBE_START = 11818; // 1 +const static uint64_t SH_FLD_PRGM_ADDR = 11819; // 1 +const static uint64_t SH_FLD_PRGM_ADDR_LEN = 11820; // 1 +const static uint64_t SH_FLD_PRGSM_BUSY = 11821; // 24 +const static uint64_t SH_FLD_PRGSM_BUSY_ON_THIS = 11822; // 24 +const static uint64_t SH_FLD_PRG_BIT_LOCATION = 11823; // 1 +const static uint64_t SH_FLD_PRG_BIT_LOCATION_LEN = 11824; // 1 +const static uint64_t SH_FLD_PRI = 11825; // 8 +const static uint64_t SH_FLD_PRIORITY = 11826; // 18 +const static uint64_t SH_FLD_PRIORITY_ENABLE = 11827; // 6 +const static uint64_t SH_FLD_PRIORITY_LEN = 11828; // 6 +const static uint64_t SH_FLD_PRIORITY_LIMIT_0_3 = 11829; // 1 +const static uint64_t SH_FLD_PRIORITY_LIMIT_0_3_LEN = 11830; // 1 +const static uint64_t SH_FLD_PRIORITY_LPID = 11831; // 6 +const static uint64_t SH_FLD_PRIORITY_LPID_LEN = 11832; // 6 +const static uint64_t SH_FLD_PRIORITY_PID = 11833; // 6 +const static uint64_t SH_FLD_PRIORITY_PID_LEN = 11834; // 6 +const static uint64_t SH_FLD_PRIORITY_PRIMAX = 11835; // 3 +const static uint64_t SH_FLD_PRIORITY_PRIMAX_LEN = 11836; // 3 +const static uint64_t SH_FLD_PRIORITY_QUEUED = 11837; // 6 +const static uint64_t SH_FLD_PRIORITY_QUEUED_LEN = 11838; // 6 +const static uint64_t SH_FLD_PRIORITY_READ_OFFSET = 11839; // 6 +const static uint64_t SH_FLD_PRIORITY_READ_OFFSET_LEN = 11840; // 6 +const static uint64_t SH_FLD_PRIORITY_SIZE = 11841; // 6 +const static uint64_t SH_FLD_PRIORITY_SIZE_LEN = 11842; // 6 +const static uint64_t SH_FLD_PRIORITY_TID = 11843; // 6 +const static uint64_t SH_FLD_PRIORITY_TID_LEN = 11844; // 6 +const static uint64_t SH_FLD_PRI_I_PATH_STEP_CHECK_ENABLE = 11845; // 1 +const static uint64_t SH_FLD_PRI_LEN = 11846; // 8 +const static uint64_t SH_FLD_PRI_M_PATH_0_STEP_CHECK_ENABLE = 11847; // 1 +const static uint64_t SH_FLD_PRI_M_PATH_1_STEP_CHECK_ENABLE = 11848; // 1 +const static uint64_t SH_FLD_PRI_M_PATH_SELECT = 11849; // 2 +const static uint64_t SH_FLD_PRI_M_S_DRAWER_SELECT = 11850; // 2 +const static uint64_t SH_FLD_PRI_M_S_SELECT = 11851; // 2 +const static uint64_t SH_FLD_PRI_SEC_SELECT = 11852; // 1 +const static uint64_t SH_FLD_PRI_SEC_SELECT_LEN = 11853; // 1 +const static uint64_t SH_FLD_PRI_SELECT = 11854; // 1 +const static uint64_t SH_FLD_PRI_S_PATH_0_STEP_CHECK_ENABLE = 11855; // 1 +const static uint64_t SH_FLD_PRI_S_PATH_1_STEP_CHECK_ENABLE = 11856; // 1 +const static uint64_t SH_FLD_PRI_S_PATH_SELECT = 11857; // 1 +const static uint64_t SH_FLD_PRI_V = 11858; // 8 +const static uint64_t SH_FLD_PROBE_0_TOGGLE_ENABLE = 11859; // 1 +const static uint64_t SH_FLD_PROBE_1_TOGGLE_ENABLE = 11860; // 1 +const static uint64_t SH_FLD_PROBE_2_TOGGLE_ENABLE = 11861; // 1 +const static uint64_t SH_FLD_PROBE_3_TOGGLE_ENABLE = 11862; // 1 +const static uint64_t SH_FLD_PROC_RCVY_AGAIN = 11863; // 96 +const static uint64_t SH_FLD_PROC_RCVY_DONE = 11864; // 96 +const static uint64_t SH_FLD_PROGRAM_ENABLE = 11865; // 1 +const static uint64_t SH_FLD_PROG_REQ_DELAY = 11866; // 1 +const static uint64_t SH_FLD_PROG_REQ_DELAY_LEN = 11867; // 1 +const static uint64_t SH_FLD_PROTECTION_CHECK = 11868; // 1 +const static uint64_t SH_FLD_PROTOCOL = 11869; // 8 +const static uint64_t SH_FLD_PROTOCOL_ERROR = 11870; // 43 +const static uint64_t SH_FLD_PROTOCOL_LEN = 11871; // 8 +const static uint64_t SH_FLD_PROT_EX_SPARE0 = 11872; // 1 +const static uint64_t SH_FLD_PROT_EX_SPARE1 = 11873; // 1 +const static uint64_t SH_FLD_PROT_TP_SPARE0 = 11874; // 1 +const static uint64_t SH_FLD_PROT_TP_SPARE1 = 11875; // 1 +const static uint64_t SH_FLD_PROT_TP_SPARE2 = 11876; // 1 +const static uint64_t SH_FLD_PRPG_A_VAL = 11877; // 43 +const static uint64_t SH_FLD_PRPG_A_VAL_LEN = 11878; // 43 +const static uint64_t SH_FLD_PRPG_B_VAL = 11879; // 43 +const static uint64_t SH_FLD_PRPG_B_VAL_LEN = 11880; // 43 +const static uint64_t SH_FLD_PRPG_MODE = 11881; // 43 +const static uint64_t SH_FLD_PRPG_VALUE = 11882; // 43 +const static uint64_t SH_FLD_PRPG_VALUE_LEN = 11883; // 43 +const static uint64_t SH_FLD_PRPG_WEIGHTING = 11884; // 43 +const static uint64_t SH_FLD_PRPG_WEIGHTING_LEN = 11885; // 43 +const static uint64_t SH_FLD_PRS = 11886; // 8 +const static uint64_t SH_FLD_PRV_BUS0_STG2_SEL = 11887; // 1 +const static uint64_t SH_FLD_PRV_BUS1_STG2_SEL = 11888; // 1 +const static uint64_t SH_FLD_PR_BUMP_SL_1UI = 11889; // 120 +const static uint64_t SH_FLD_PR_BUMP_SR_1UI = 11890; // 120 +const static uint64_t SH_FLD_PR_BUMP_TO_CENTER = 11891; // 72 +const static uint64_t SH_FLD_PR_BUMP_TO_EDGE_A = 11892; // 120 +const static uint64_t SH_FLD_PR_BUMP_TO_EDGE_B = 11893; // 48 +const static uint64_t SH_FLD_PR_DATA_A_OFFSET = 11894; // 120 +const static uint64_t SH_FLD_PR_DATA_A_OFFSET_LEN = 11895; // 120 +const static uint64_t SH_FLD_PR_DATA_B_OFFSET = 11896; // 120 +const static uint64_t SH_FLD_PR_DATA_B_OFFSET_LEN = 11897; // 120 +const static uint64_t SH_FLD_PR_DDC_A = 11898; // 120 +const static uint64_t SH_FLD_PR_DDC_B = 11899; // 48 +const static uint64_t SH_FLD_PR_EDGE_TRACK_CNTL = 11900; // 120 +const static uint64_t SH_FLD_PR_EDGE_TRACK_CNTL_LEN = 11901; // 120 +const static uint64_t SH_FLD_PR_FW_INERTIA_AMT = 11902; // 48 +const static uint64_t SH_FLD_PR_FW_INERTIA_AMT_LEN = 11903; // 48 +const static uint64_t SH_FLD_PR_FW_OFF = 11904; // 48 +const static uint64_t SH_FLD_PR_HALFRATE_MODE = 11905; // 120 +const static uint64_t SH_FLD_PR_INVALID_LOCK_BUMP_SIZE = 11906; // 120 +const static uint64_t SH_FLD_PR_INVALID_LOCK_BUMP_SIZE_LEN = 11907; // 120 +const static uint64_t SH_FLD_PR_INVALID_LOCK_FILTER_EN = 11908; // 120 +const static uint64_t SH_FLD_PR_IQ_RES_SEL = 11909; // 120 +const static uint64_t SH_FLD_PR_IQ_RES_SEL_LEN = 11910; // 120 +const static uint64_t SH_FLD_PR_LOCK_DONE = 11911; // 120 +const static uint64_t SH_FLD_PR_PHASE_STEP = 11912; // 120 +const static uint64_t SH_FLD_PR_PHASE_STEP_LEN = 11913; // 120 +const static uint64_t SH_FLD_PR_RESET = 11914; // 48 +const static uint64_t SH_FLD_PR_TRACE_DDC_SM = 11915; // 120 +const static uint64_t SH_FLD_PR_TRACE_DDC_SM_LEN = 11916; // 120 +const static uint64_t SH_FLD_PR_TRACE_DDC_STOP = 11917; // 120 +const static uint64_t SH_FLD_PR_TRACE_WOBBLE_SM = 11918; // 120 +const static uint64_t SH_FLD_PR_TRACE_WOBBLE_SM_LEN = 11919; // 120 +const static uint64_t SH_FLD_PR_TRACE_WOBBLE_STOP = 11920; // 120 +const static uint64_t SH_FLD_PR_USE_DFE_CLOCK_A = 11921; // 120 +const static uint64_t SH_FLD_PR_USE_DFE_CLOCK_B = 11922; // 48 +const static uint64_t SH_FLD_PR_WOBBLE_A = 11923; // 120 +const static uint64_t SH_FLD_PR_WOBBLE_B = 11924; // 48 +const static uint64_t SH_FLD_PR_WOBBLE_EDGE = 11925; // 48 +const static uint64_t SH_FLD_PSAVE_ANA_REQ_DIS = 11926; // 48 +const static uint64_t SH_FLD_PSAVE_DIG_REQ_DIS = 11927; // 48 +const static uint64_t SH_FLD_PSAVE_REQ_DIS = 11928; // 48 +const static uint64_t SH_FLD_PSCR_OVERRIDE_EN = 11929; // 12 +const static uint64_t SH_FLD_PSEG_MAIN_EN = 11930; // 6 +const static uint64_t SH_FLD_PSEG_MAIN_EN_LEN = 11931; // 6 +const static uint64_t SH_FLD_PSEG_MARGINPD_EN = 11932; // 6 +const static uint64_t SH_FLD_PSEG_MARGINPD_EN_LEN = 11933; // 6 +const static uint64_t SH_FLD_PSEG_MARGINPU_EN = 11934; // 6 +const static uint64_t SH_FLD_PSEG_MARGINPU_EN_LEN = 11935; // 6 +const static uint64_t SH_FLD_PSEG_POST_EN = 11936; // 2 +const static uint64_t SH_FLD_PSEG_POST_EN_LEN = 11937; // 2 +const static uint64_t SH_FLD_PSEG_POST_SEL = 11938; // 2 +const static uint64_t SH_FLD_PSEG_POST_SEL_LEN = 11939; // 2 +const static uint64_t SH_FLD_PSEG_PRE_EN = 11940; // 6 +const static uint64_t SH_FLD_PSEG_PRE_EN_LEN = 11941; // 6 +const static uint64_t SH_FLD_PSEG_PRE_SEL = 11942; // 6 +const static uint64_t SH_FLD_PSEG_PRE_SEL_LEN = 11943; // 6 +const static uint64_t SH_FLD_PSIFSP_ACK_TIMEOUT = 11944; // 1 +const static uint64_t SH_FLD_PSIFSP_DMAR_OUTSTANDING = 11945; // 1 +const static uint64_t SH_FLD_PSIFSP_DMA_ADDR_ERR = 11946; // 1 +const static uint64_t SH_FLD_PSIFSP_DMA_ERR = 11947; // 1 +const static uint64_t SH_FLD_PSIFSP_INT_BUSY = 11948; // 1 +const static uint64_t SH_FLD_PSIFSP_INV_OP = 11949; // 1 +const static uint64_t SH_FLD_PSIFSP_LOAD_OUTSTANDING = 11950; // 1 +const static uint64_t SH_FLD_PSIFSP_MMIO_ADDR_ERR = 11951; // 1 +const static uint64_t SH_FLD_PSIFSP_MMIO_LENGTH_ERR = 11952; // 1 +const static uint64_t SH_FLD_PSIFSP_MMIO_LOAD_TIMEOUT = 11953; // 1 +const static uint64_t SH_FLD_PSIFSP_MMIO_TYPE_ERR = 11954; // 1 +const static uint64_t SH_FLD_PSIFSP_PAGE_FAULT = 11955; // 1 +const static uint64_t SH_FLD_PSIFSP_PERR = 11956; // 1 +const static uint64_t SH_FLD_PSIFSP_TCE_EXTENT_ERR = 11957; // 1 +const static uint64_t SH_FLD_PSIHB2FSP_INJ_CONST = 11958; // 1 +const static uint64_t SH_FLD_PSIHB2FSP_INJ_ERR_BITS = 11959; // 1 +const static uint64_t SH_FLD_PSIHB2FSP_INJ_ERR_BITS_LEN = 11960; // 1 +const static uint64_t SH_FLD_PSIHB2FSP_INJ_ONCE = 11961; // 1 +const static uint64_t SH_FLD_PSIHB2PB_INJ_CONST = 11962; // 1 +const static uint64_t SH_FLD_PSIHB2PB_INJ_ERR_BITS = 11963; // 1 +const static uint64_t SH_FLD_PSIHB2PB_INJ_ERR_BITS_LEN = 11964; // 1 +const static uint64_t SH_FLD_PSIHB2PB_INJ_ONCE = 11965; // 1 +const static uint64_t SH_FLD_PSIHBC_RESET = 11966; // 1 +const static uint64_t SH_FLD_PSIRFACC_C_RXDATA_RDY_ERR = 11967; // 1 +const static uint64_t SH_FLD_PSIRFACC_RADDR_PCK = 11968; // 1 +const static uint64_t SH_FLD_PSIRFACC_RCTRL_PCK = 11969; // 1 +const static uint64_t SH_FLD_PSIRFACC_RDL_FSM_PCK = 11970; // 1 +const static uint64_t SH_FLD_PSIRFACC_RFSM_PCK = 11971; // 1 +const static uint64_t SH_FLD_PSIRFACC_RLINK_STATE_LT_02 = 11972; // 1 +const static uint64_t SH_FLD_PSIRFACC_RXSC_PCK = 11973; // 1 +const static uint64_t SH_FLD_PSIRFACC_TADDR_PCK = 11974; // 1 +const static uint64_t SH_FLD_PSIRFACC_TCTRL_PCK = 11975; // 1 +const static uint64_t SH_FLD_PSIRFACC_TDL_CMD_CTRL_PCK = 11976; // 1 +const static uint64_t SH_FLD_PSIRFACC_TDL_FSM_PCK = 11977; // 1 +const static uint64_t SH_FLD_PSIRFACC_TDL_RETRY_ERR = 11978; // 1 +const static uint64_t SH_FLD_PSIRFACC_TDL_RSP_CTRL_PCK = 11979; // 1 +const static uint64_t SH_FLD_PSIRFACC_TFSM_PCK = 11980; // 1 +const static uint64_t SH_FLD_PSIRFACC_TXSC_PCK = 11981; // 1 +const static uint64_t SH_FLD_PSIRXBFF_DATAO_PCK = 11982; // 1 +const static uint64_t SH_FLD_PSIRXBFF_DATA_PCK = 11983; // 1 +const static uint64_t SH_FLD_PSIRXBFF_RFC_PCK = 11984; // 1 +const static uint64_t SH_FLD_PSIRXEI_SHIFT_PCK = 11985; // 1 +const static uint64_t SH_FLD_PSIRXEI_TRANSMIT_PCK = 11986; // 1 +const static uint64_t SH_FLD_PSIRXINS_DATA_PCK = 11987; // 1 +const static uint64_t SH_FLD_PSIRXINS_OVERRUN = 11988; // 1 +const static uint64_t SH_FLD_PSIRXINS_RFGSHIFT_PCK = 11989; // 1 +const static uint64_t SH_FLD_PSIRXINS_RZRTMP_PCK = 11990; // 1 +const static uint64_t SH_FLD_PSIRXLC_CE_RF = 11991; // 1 +const static uint64_t SH_FLD_PSIRXLC_DATA_BUFF_PCK = 11992; // 1 +const static uint64_t SH_FLD_PSIRXLC_DATA_GXST1_PCK_2N = 11993; // 1 +const static uint64_t SH_FLD_PSIRXLC_DATA_PCK = 11994; // 1 +const static uint64_t SH_FLD_PSIRXLC_FSM_PCK = 11995; // 1 +const static uint64_t SH_FLD_PSIRXLC_RADDR_PCK = 11996; // 1 +const static uint64_t SH_FLD_PSIRXLC_RCTRL_PCK = 11997; // 1 +const static uint64_t SH_FLD_PSIRXLC_UE_RF = 11998; // 1 +const static uint64_t SH_FLD_PSITXBFF_DATA_PCK = 11999; // 1 +const static uint64_t SH_FLD_PSITXBFF_TDO_PCK = 12000; // 1 +const static uint64_t SH_FLD_PSITXBFF_TFC_PCK = 12001; // 1 +const static uint64_t SH_FLD_PSITXEI_SHIFT_PCK = 12002; // 1 +const static uint64_t SH_FLD_PSITXEI_TRANSMIT_PCK = 12003; // 1 +const static uint64_t SH_FLD_PSITXINS_DATA_PCK = 12004; // 1 +const static uint64_t SH_FLD_PSITXINS_PARITY = 12005; // 1 +const static uint64_t SH_FLD_PSITXINS_TZRTMP_PCK = 12006; // 1 +const static uint64_t SH_FLD_PSITXINS_UNDERRUN = 12007; // 1 +const static uint64_t SH_FLD_PSITXLC_CE_GX_2N = 12008; // 1 +const static uint64_t SH_FLD_PSITXLC_CE_RF = 12009; // 1 +const static uint64_t SH_FLD_PSITXLC_DATA_BUFF_PCK = 12010; // 1 +const static uint64_t SH_FLD_PSITXLC_DATA_GXST2_PCK_2N = 12011; // 1 +const static uint64_t SH_FLD_PSITXLC_DATA_GXST3_PCK_2N = 12012; // 1 +const static uint64_t SH_FLD_PSITXLC_FSM_PCK = 12013; // 1 +const static uint64_t SH_FLD_PSITXLC_TADDR_PCK = 12014; // 1 +const static uint64_t SH_FLD_PSITXLC_TCTRL_PCK = 12015; // 1 +const static uint64_t SH_FLD_PSITXLC_TDO_PCK = 12016; // 1 +const static uint64_t SH_FLD_PSITXLC_UE_GX_2N = 12017; // 1 +const static uint64_t SH_FLD_PSITXLC_UE_RF = 12018; // 1 +const static uint64_t SH_FLD_PSI_ALERT1 = 12019; // 1 +const static uint64_t SH_FLD_PSI_ALERT2 = 12020; // 1 +const static uint64_t SH_FLD_PSI_LINK_ENABLE = 12021; // 1 +const static uint64_t SH_FLD_PSI_LINK_INACTIVE_TRANS = 12022; // 1 +const static uint64_t SH_FLD_PSI_RESERVED0 = 12023; // 2 +const static uint64_t SH_FLD_PSI_RESERVED1 = 12024; // 2 +const static uint64_t SH_FLD_PSI_RESERVED2 = 12025; // 2 +const static uint64_t SH_FLD_PSI_RESERVED3 = 12026; // 2 +const static uint64_t SH_FLD_PSI_RESERVED4 = 12027; // 2 +const static uint64_t SH_FLD_PSI_UE = 12028; // 1 +const static uint64_t SH_FLD_PSI_XMIT_ERROR = 12029; // 1 +const static uint64_t SH_FLD_PSL_CMD_SUE = 12030; // 4 +const static uint64_t SH_FLD_PSL_CMD_UE = 12031; // 4 +const static uint64_t SH_FLD_PSL_CREDIT_TIMEOUT_ERR = 12032; // 2 +const static uint64_t SH_FLD_PSSBRIDGE_ONGOING = 12033; // 1 +const static uint64_t SH_FLD_PSS_HAM = 12034; // 3 +const static uint64_t SH_FLD_PSS_HAM_CORE_INTERRUPT_MASK = 12035; // 1 +const static uint64_t SH_FLD_PSTATE_A_THRESHOLD = 12036; // 24 +const static uint64_t SH_FLD_PSTATE_A_THRESHOLD_LEN = 12037; // 24 +const static uint64_t SH_FLD_PSTATE_B_THRESHOLD = 12038; // 24 +const static uint64_t SH_FLD_PSTATE_B_THRESHOLD_LEN = 12039; // 24 +const static uint64_t SH_FLD_PS_SPARE1 = 12040; // 1 +const static uint64_t SH_FLD_PTCR = 12041; // 1 +const static uint64_t SH_FLD_PTCR_LEN = 12042; // 1 +const static uint64_t SH_FLD_PULL_EMPTY = 12043; // 4 +const static uint64_t SH_FLD_PULL_ENABLE = 12044; // 4 +const static uint64_t SH_FLD_PULL_FULL = 12045; // 4 +const static uint64_t SH_FLD_PULL_INTR_ACTION_0_1 = 12046; // 4 +const static uint64_t SH_FLD_PULL_INTR_ACTION_0_1_LEN = 12047; // 4 +const static uint64_t SH_FLD_PULL_LENGTH = 12048; // 4 +const static uint64_t SH_FLD_PULL_LENGTH_LEN = 12049; // 4 +const static uint64_t SH_FLD_PULL_READ_PTR = 12050; // 4 +const static uint64_t SH_FLD_PULL_READ_PTR_LEN = 12051; // 4 +const static uint64_t SH_FLD_PULL_READ_UNDERFLOW = 12052; // 4 +const static uint64_t SH_FLD_PULL_READ_UNDERFLOW_EN = 12053; // 4 +const static uint64_t SH_FLD_PULL_REGION = 12054; // 4 +const static uint64_t SH_FLD_PULL_REGION_LEN = 12055; // 4 +const static uint64_t SH_FLD_PULL_START = 12056; // 4 +const static uint64_t SH_FLD_PULL_START_LEN = 12057; // 4 +const static uint64_t SH_FLD_PULL_WRITE_OVERFLOW = 12058; // 4 +const static uint64_t SH_FLD_PULL_WRITE_PTR = 12059; // 4 +const static uint64_t SH_FLD_PULL_WRITE_PTR_LEN = 12060; // 4 +const static uint64_t SH_FLD_PULSE1_CNTR = 12061; // 1 +const static uint64_t SH_FLD_PULSE1_CNTR_LEN = 12062; // 1 +const static uint64_t SH_FLD_PULSE2_CNTR = 12063; // 1 +const static uint64_t SH_FLD_PULSE2_CNTR_LEN = 12064; // 1 +const static uint64_t SH_FLD_PULSE_DELAY = 12065; // 43 +const static uint64_t SH_FLD_PULSE_DELAY_LEN = 12066; // 43 +const static uint64_t SH_FLD_PUMP_MODE = 12067; // 1 +const static uint64_t SH_FLD_PUP_LITE_WAIT_SEL = 12068; // 4 +const static uint64_t SH_FLD_PUP_LITE_WAIT_SEL_LEN = 12069; // 4 +const static uint64_t SH_FLD_PUSH_EMPTY = 12070; // 6 +const static uint64_t SH_FLD_PUSH_ENABLE = 12071; // 6 +const static uint64_t SH_FLD_PUSH_FULL = 12072; // 6 +const static uint64_t SH_FLD_PUSH_INTR_ACTION_0_1 = 12073; // 6 +const static uint64_t SH_FLD_PUSH_INTR_ACTION_0_1_LEN = 12074; // 6 +const static uint64_t SH_FLD_PUSH_LENGTH = 12075; // 6 +const static uint64_t SH_FLD_PUSH_LENGTH_LEN = 12076; // 6 +const static uint64_t SH_FLD_PUSH_READ_PTR = 12077; // 6 +const static uint64_t SH_FLD_PUSH_READ_PTR_LEN = 12078; // 6 +const static uint64_t SH_FLD_PUSH_READ_UNDERFLOW = 12079; // 4 +const static uint64_t SH_FLD_PUSH_REGION = 12080; // 4 +const static uint64_t SH_FLD_PUSH_REGION_LEN = 12081; // 4 +const static uint64_t SH_FLD_PUSH_START = 12082; // 6 +const static uint64_t SH_FLD_PUSH_START_LEN = 12083; // 6 +const static uint64_t SH_FLD_PUSH_WRITE_OVERFLOW = 12084; // 4 +const static uint64_t SH_FLD_PUSH_WRITE_OVERFLOW_EN = 12085; // 4 +const static uint64_t SH_FLD_PUSH_WRITE_PTR = 12086; // 6 +const static uint64_t SH_FLD_PUSH_WRITE_PTR_LEN = 12087; // 6 +const static uint64_t SH_FLD_PU_BIT_ENABLES = 12088; // 1 +const static uint64_t SH_FLD_PU_BIT_ENABLES_LEN = 12089; // 1 +const static uint64_t SH_FLD_PU_COUNTS = 12090; // 8 +const static uint64_t SH_FLD_PU_COUNTS_LEN = 12091; // 8 +const static uint64_t SH_FLD_PVREF_ERROR_EN = 12092; // 1 +const static uint64_t SH_FLD_PVREF_ERROR_EN_LEN = 12093; // 1 +const static uint64_t SH_FLD_PVREF_ERROR_FINE = 12094; // 1 +const static uint64_t SH_FLD_PVREF_ERROR_GROSS = 12095; // 1 +const static uint64_t SH_FLD_PVREF_FAIL = 12096; // 12 +const static uint64_t SH_FLD_PVTN = 12097; // 16 +const static uint64_t SH_FLD_PVTNL_ENC = 12098; // 1 +const static uint64_t SH_FLD_PVTNL_ENC_LEN = 12099; // 1 +const static uint64_t SH_FLD_PVTN_LEN = 12100; // 16 +const static uint64_t SH_FLD_PVTP = 12101; // 16 +const static uint64_t SH_FLD_PVTPL_ENC = 12102; // 1 +const static uint64_t SH_FLD_PVTPL_ENC_LEN = 12103; // 1 +const static uint64_t SH_FLD_PVTP_LEN = 12104; // 16 +const static uint64_t SH_FLD_QPPM_ONGOING = 12105; // 24 +const static uint64_t SH_FLD_QPPM_RDATA = 12106; // 24 +const static uint64_t SH_FLD_QPPM_RDATA_LEN = 12107; // 24 +const static uint64_t SH_FLD_QPPM_REG = 12108; // 24 +const static uint64_t SH_FLD_QPPM_REG_LEN = 12109; // 24 +const static uint64_t SH_FLD_QPPM_RNW = 12110; // 24 +const static uint64_t SH_FLD_QPPM_STATUS = 12111; // 24 +const static uint64_t SH_FLD_QPPM_STATUS_LEN = 12112; // 24 +const static uint64_t SH_FLD_QPPM_WDATA = 12113; // 24 +const static uint64_t SH_FLD_QPPM_WDATA_LEN = 12114; // 24 +const static uint64_t SH_FLD_QUA = 12115; // 8 +const static uint64_t SH_FLD_QUAD_CHECKSTOP = 12116; // 12 +const static uint64_t SH_FLD_QUAD_CLK_SB_OVERRIDE = 12117; // 24 +const static uint64_t SH_FLD_QUAD_CLK_SW_OVERRIDE = 12118; // 24 +const static uint64_t SH_FLD_QUAD_SEL = 12119; // 6 +const static uint64_t SH_FLD_QUAD_SEL_LEN = 12120; // 6 +const static uint64_t SH_FLD_QUAD_STOPPED = 12121; // 1 +const static uint64_t SH_FLD_QUAD_STOPPED_LEN = 12122; // 1 +const static uint64_t SH_FLD_QUA_LEN = 12123; // 8 +const static uint64_t SH_FLD_QUA_V = 12124; // 8 +const static uint64_t SH_FLD_QUEUED_RD_EN = 12125; // 12 +const static uint64_t SH_FLD_QUEUED_WR_EN = 12126; // 12 +const static uint64_t SH_FLD_QUEUE_DISABLE = 12127; // 6 +const static uint64_t SH_FLD_QUEUE_NOT_EMPTY = 12128; // 6 +const static uint64_t SH_FLD_QUIESCE = 12129; // 1 +const static uint64_t SH_FLD_QUIESCED = 12130; // 1 +const static uint64_t SH_FLD_QUIESCE_ACHEIVED = 12131; // 1 +const static uint64_t SH_FLD_QUIESCE_AUTO_RESET = 12132; // 1 +const static uint64_t SH_FLD_QUIESCE_FAILED = 12133; // 1 +const static uint64_t SH_FLD_QUIESCE_PB = 12134; // 1 +const static uint64_t SH_FLD_QUIESCE_REQUEST = 12135; // 1 +const static uint64_t SH_FLD_R = 12136; // 8 +const static uint64_t SH_FLD_R0_COUNT = 12137; // 12 +const static uint64_t SH_FLD_R0_COUNT_LEN = 12138; // 12 +const static uint64_t SH_FLD_R15_BIT_MAP = 12139; // 8 +const static uint64_t SH_FLD_R15_BIT_MAP_LEN = 12140; // 8 +const static uint64_t SH_FLD_R16_BIT_MAP = 12141; // 8 +const static uint64_t SH_FLD_R16_BIT_MAP_LEN = 12142; // 8 +const static uint64_t SH_FLD_R17_BIT_MAP = 12143; // 8 +const static uint64_t SH_FLD_R17_BIT_MAP_LEN = 12144; // 8 +const static uint64_t SH_FLD_R1_COUNT = 12145; // 12 +const static uint64_t SH_FLD_R1_COUNT_LEN = 12146; // 12 +const static uint64_t SH_FLD_R2_COUNT = 12147; // 12 +const static uint64_t SH_FLD_R2_COUNT_LEN = 12148; // 12 +const static uint64_t SH_FLD_RAM_OVERRIDE = 12149; // 24 +const static uint64_t SH_FLD_RAND_ADDR_ALL_ADDR_MODE_EN = 12150; // 2 +const static uint64_t SH_FLD_RAND_EVENT = 12151; // 1 +const static uint64_t SH_FLD_RAND_EVENT_LEN = 12152; // 1 +const static uint64_t SH_FLD_RANGE = 12153; // 1 +const static uint64_t SH_FLD_RANGE_LEN = 12154; // 1 +const static uint64_t SH_FLD_RANK = 12155; // 8 +const static uint64_t SH_FLD_RANK_LEN = 12156; // 8 +const static uint64_t SH_FLD_RANK_OVERRIDE = 12157; // 8 +const static uint64_t SH_FLD_RANK_OVERRIDE_VALUE = 12158; // 8 +const static uint64_t SH_FLD_RANK_OVERRIDE_VALUE_LEN = 12159; // 8 +const static uint64_t SH_FLD_RANK_PAIR = 12160; // 8 +const static uint64_t SH_FLD_RANK_PAIR_LEN = 12161; // 8 +const static uint64_t SH_FLD_RANK_SM_1HOT = 12162; // 8 +const static uint64_t SH_FLD_RATE = 12163; // 14 +const static uint64_t SH_FLD_RATE_LEN = 12164; // 14 +const static uint64_t SH_FLD_RC = 12165; // 8 +const static uint64_t SH_FLD_RCDAT_RD_PARITY_ERR = 12166; // 12 +const static uint64_t SH_FLD_RCD_PARITY_ERROR = 12167; // 16 +const static uint64_t SH_FLD_RCE_COUNT = 12168; // 2 +const static uint64_t SH_FLD_RCE_COUNT_LEN = 12169; // 2 +const static uint64_t SH_FLD_RCE_ETE_ATTN = 12170; // 10 +const static uint64_t SH_FLD_RCMD0_ADDR_PARITY_ERROR = 12171; // 2 +const static uint64_t SH_FLD_RCMD0_ADDR_PERR = 12172; // 1 +const static uint64_t SH_FLD_RCMD0_TTAG_PERR = 12173; // 1 +const static uint64_t SH_FLD_RCMD1_ADDR_PARITY_ERROR = 12174; // 2 +const static uint64_t SH_FLD_RCMD1_ADDR_PERR = 12175; // 1 +const static uint64_t SH_FLD_RCMD1_TTAG_PERR = 12176; // 1 +const static uint64_t SH_FLD_RCMD2_ADDR_PARITY_ERROR = 12177; // 2 +const static uint64_t SH_FLD_RCMD2_ADDR_PERR = 12178; // 1 +const static uint64_t SH_FLD_RCMD2_TTAG_PERR = 12179; // 1 +const static uint64_t SH_FLD_RCMD3_ADDR_PARITY_ERROR = 12180; // 2 +const static uint64_t SH_FLD_RCMD3_ADDR_PERR = 12181; // 1 +const static uint64_t SH_FLD_RCMD3_TTAG_PERR = 12182; // 1 +const static uint64_t SH_FLD_RCMD_ADDR_P_ERR = 12183; // 12 +const static uint64_t SH_FLD_RCMD_ADDR_P_ERR_LEN = 12184; // 12 +const static uint64_t SH_FLD_RCMD_ERR_INJ = 12185; // 8 +const static uint64_t SH_FLD_RCMD_TTAG_P_ERR = 12186; // 12 +const static uint64_t SH_FLD_RCMD_TTAG_P_ERR_LEN = 12187; // 12 +const static uint64_t SH_FLD_RCV_BRDCST_GROUP = 12188; // 1 +const static uint64_t SH_FLD_RCV_BRDCST_GROUP_LEN = 12189; // 1 +const static uint64_t SH_FLD_RCV_CAPTURE = 12190; // 1 +const static uint64_t SH_FLD_RCV_CAPTURE_LEN = 12191; // 1 +const static uint64_t SH_FLD_RCV_CHIPID = 12192; // 1 +const static uint64_t SH_FLD_RCV_CHIPID_LEN = 12193; // 1 +const static uint64_t SH_FLD_RCV_CREDIT_OVERFLOW_ENA = 12194; // 6 +const static uint64_t SH_FLD_RCV_DATATO_DIV = 12195; // 1 +const static uint64_t SH_FLD_RCV_DATATO_DIV_LEN = 12196; // 1 +const static uint64_t SH_FLD_RCV_ERROR = 12197; // 1 +const static uint64_t SH_FLD_RCV_GROUPID = 12198; // 1 +const static uint64_t SH_FLD_RCV_GROUPID_LEN = 12199; // 1 +const static uint64_t SH_FLD_RCV_IN_PROGRESS = 12200; // 1 +const static uint64_t SH_FLD_RCV_PB_OP_HANG_ERR = 12201; // 1 +const static uint64_t SH_FLD_RCV_RESERVATION_SET = 12202; // 1 +const static uint64_t SH_FLD_RCV_RESET = 12203; // 1 +const static uint64_t SH_FLD_RCV_TOD_STATE = 12204; // 1 +const static uint64_t SH_FLD_RCV_TOD_STATE_LEN = 12205; // 1 +const static uint64_t SH_FLD_RCV_TTAG_PARITY_ERR = 12206; // 1 +const static uint64_t SH_FLD_RCV_WRITE_IN_PROGRESS = 12207; // 1 +const static uint64_t SH_FLD_RC_ADDR_PAR = 12208; // 1 +const static uint64_t SH_FLD_RC_ENABLE_AUTO_RECAL = 12209; // 2 +const static uint64_t SH_FLD_RC_ENABLE_BER_TEST = 12210; // 4 +const static uint64_t SH_FLD_RC_ENABLE_CM_COARSE_CAL = 12211; // 6 +const static uint64_t SH_FLD_RC_ENABLE_CM_FINE_CAL = 12212; // 6 +const static uint64_t SH_FLD_RC_ENABLE_CTLE_1ST_LATCH_OFFSET_CAL = 12213; // 6 +const static uint64_t SH_FLD_RC_ENABLE_CTLE_2ND_LATCH_OFFSET_CAL = 12214; // 6 +const static uint64_t SH_FLD_RC_ENABLE_CTLE_COARSE_CAL = 12215; // 6 +const static uint64_t SH_FLD_RC_ENABLE_CTLE_EDGE_OFFSET_CAL = 12216; // 2 +const static uint64_t SH_FLD_RC_ENABLE_CTLE_EDGE_TRACK_ONLY = 12217; // 4 +const static uint64_t SH_FLD_RC_ENABLE_DAC_H1_CAL = 12218; // 6 +const static uint64_t SH_FLD_RC_ENABLE_DAC_H1_TO_A_CAL = 12219; // 4 +const static uint64_t SH_FLD_RC_ENABLE_DDC = 12220; // 6 +const static uint64_t SH_FLD_RC_ENABLE_DFE_H1_CAL = 12221; // 6 +const static uint64_t SH_FLD_RC_ENABLE_DFE_H2_H12_CAL = 12222; // 4 +const static uint64_t SH_FLD_RC_ENABLE_DFE_H2_H12_SUBSTEP = 12223; // 4 +const static uint64_t SH_FLD_RC_ENABLE_DFE_H2_H12_SUBSTEP_LEN = 12224; // 4 +const static uint64_t SH_FLD_RC_ENABLE_DFE_VOLTAGE_MODE = 12225; // 4 +const static uint64_t SH_FLD_RC_ENABLE_H1AP_TWEAK = 12226; // 6 +const static uint64_t SH_FLD_RC_ENABLE_INTEG_LATCH_OFFSET_CAL = 12227; // 6 +const static uint64_t SH_FLD_RC_ENABLE_RESULT_CHECK = 12228; // 4 +const static uint64_t SH_FLD_RC_ENABLE_VGA_AMAX_MODE = 12229; // 6 +const static uint64_t SH_FLD_RC_ENABLE_VGA_CAL = 12230; // 6 +const static uint64_t SH_FLD_RC_ENABLE_VGA_EDGE_OFFSET_CAL = 12231; // 2 +const static uint64_t SH_FLD_RC_LOAD_RECEIVED_PB_ACK_DEAD_FROM_ALINKRECOV = 12232; // 12 +const static uint64_t SH_FLD_RC_LOAD_RECIVED_PB_CRESP_ADR_ERR = 12233; // 12 +const static uint64_t SH_FLD_RC_LOAD_RECIVED_PB_CRESP_ADR_ERR_FOR_HYP = 12234; // 12 +const static uint64_t SH_FLD_RC_MASK = 12235; // 8 +const static uint64_t SH_FLD_RC_POWBUS_DATA_CE_ERR_FROM_F2CHK = 12236; // 12 +const static uint64_t SH_FLD_RC_POWBUS_DATA_SUE_ERR_FROM_F2CHK = 12237; // 12 +const static uint64_t SH_FLD_RC_POWBUS_DATA_UE_ERR_FROM_F2CHK = 12238; // 12 +const static uint64_t SH_FLD_RC_POWERBUS_DATA_TIMEOUT = 12239; // 12 +const static uint64_t SH_FLD_RC_SLOWDOWN_TIMEOUT_SEL = 12240; // 6 +const static uint64_t SH_FLD_RC_SLOWDOWN_TIMEOUT_SEL_LEN = 12241; // 6 +const static uint64_t SH_FLD_RC_STORE_RECEIVED_PB_ACK_DEAD_FROM_ALINKRECOV = 12242; // 12 +const static uint64_t SH_FLD_RC_STORE_RECIVED_PB_CRESP_ADR_ERR = 12243; // 12 +const static uint64_t SH_FLD_RC_TTAG_PAR = 12244; // 1 +const static uint64_t SH_FLD_RDADDR_ARB_BAD_HAND = 12245; // 2 +const static uint64_t SH_FLD_RDATA = 12246; // 1 +const static uint64_t SH_FLD_RDATA_LEN = 12247; // 1 +const static uint64_t SH_FLD_RDBUFF_ALLOC = 12248; // 2 +const static uint64_t SH_FLD_RDBUFF_ALLOC_LEN = 12249; // 2 +const static uint64_t SH_FLD_RDCLK_ALIGN = 12250; // 8 +const static uint64_t SH_FLD_RDCMP = 12251; // 2 +const static uint64_t SH_FLD_RDCMP_LEN = 12252; // 2 +const static uint64_t SH_FLD_RDIV = 12253; // 14 +const static uint64_t SH_FLD_RDIV_LEN = 12254; // 10 +const static uint64_t SH_FLD_RDQ_FSM_PERR = 12255; // 1 +const static uint64_t SH_FLD_RDQ_OVERFLOW = 12256; // 1 +const static uint64_t SH_FLD_RDWR_ACCESS_EN = 12257; // 2 +const static uint64_t SH_FLD_RDWR_ADDR = 12258; // 2 +const static uint64_t SH_FLD_RDWR_ADDR_LEN = 12259; // 2 +const static uint64_t SH_FLD_RDWR_OP_BUSY = 12260; // 1 +const static uint64_t SH_FLD_RDWR_RDWR_DATA = 12261; // 2 +const static uint64_t SH_FLD_RDWR_RDWR_DATA_LEN = 12262; // 2 +const static uint64_t SH_FLD_RDWR_READ_STATUS = 12263; // 2 +const static uint64_t SH_FLD_RDWR_REQ_PEND = 12264; // 2 +const static uint64_t SH_FLD_RDWR_UPDATE_ERROR = 12265; // 2 +const static uint64_t SH_FLD_RDWR_WRITE_MODE = 12266; // 2 +const static uint64_t SH_FLD_RDWR_WRITE_STATUS = 12267; // 2 +const static uint64_t SH_FLD_RDWR_WR_ENABLE = 12268; // 2 +const static uint64_t SH_FLD_RDX_BUS0_STG1_SEL = 12269; // 1 +const static uint64_t SH_FLD_RDX_BUS0_STG2_SEL = 12270; // 1 +const static uint64_t SH_FLD_RDX_BUS1_STG1_SEL = 12271; // 1 +const static uint64_t SH_FLD_RDX_BUS1_STG2_SEL = 12272; // 1 +const static uint64_t SH_FLD_RD_ADDR_0_7 = 12273; // 1 +const static uint64_t SH_FLD_RD_ADDR_0_7_LEN = 12274; // 1 +const static uint64_t SH_FLD_RD_ARE_ERRORS = 12275; // 9 +const static uint64_t SH_FLD_RD_ARE_ERRORS_MASK = 12276; // 9 +const static uint64_t SH_FLD_RD_CNTL = 12277; // 8 +const static uint64_t SH_FLD_RD_CNTL_MASK = 12278; // 8 +const static uint64_t SH_FLD_RD_DATA_COUNT = 12279; // 1 +const static uint64_t SH_FLD_RD_DATA_COUNT_LEN = 12280; // 1 +const static uint64_t SH_FLD_RD_DATA_PARITY_ERROR = 12281; // 3 +const static uint64_t SH_FLD_RD_GO_M_QOS = 12282; // 2 +const static uint64_t SH_FLD_RD_MACHINE_HANG_ERR = 12283; // 12 +const static uint64_t SH_FLD_RD_RST_INTRPT_FACES = 12284; // 1 +const static uint64_t SH_FLD_RD_RST_INTRPT_PIB = 12285; // 1 +const static uint64_t SH_FLD_RD_SCOPE = 12286; // 24 +const static uint64_t SH_FLD_RD_SCOPE_LEN = 12287; // 24 +const static uint64_t SH_FLD_RD_SLVNUM = 12288; // 6 +const static uint64_t SH_FLD_RD_SLVNUM_LEN = 12289; // 6 +const static uint64_t SH_FLD_READ_ASYNC_INTERFACE_PARITY_ERROR = 12290; // 8 +const static uint64_t SH_FLD_READ_ASYNC_INTERFACE_SEQUENCE_ERROR = 12291; // 8 +const static uint64_t SH_FLD_READ_BUFFER_OVERFLOW_ERROR = 12292; // 8 +const static uint64_t SH_FLD_READ_COMPARE_REQUIRED = 12293; // 64 +const static uint64_t SH_FLD_READ_COMPLETE = 12294; // 1 +const static uint64_t SH_FLD_READ_CONTINUE_0 = 12295; // 1 +const static uint64_t SH_FLD_READ_CONTINUE_1 = 12296; // 1 +const static uint64_t SH_FLD_READ_CONTINUE_2 = 12297; // 1 +const static uint64_t SH_FLD_READ_CONTINUE_3 = 12298; // 1 +const static uint64_t SH_FLD_READ_COUNT = 12299; // 8 +const static uint64_t SH_FLD_READ_COUNT_LEN = 12300; // 8 +const static uint64_t SH_FLD_READ_CRD_POOL = 12301; // 1 +const static uint64_t SH_FLD_READ_CRD_POOL_LEN = 12302; // 1 +const static uint64_t SH_FLD_READ_CTR = 12303; // 8 +const static uint64_t SH_FLD_READ_ENABLE = 12304; // 129 +const static uint64_t SH_FLD_READ_ENABLE_0 = 12305; // 1 +const static uint64_t SH_FLD_READ_ENABLE_1 = 12306; // 1 +const static uint64_t SH_FLD_READ_ENABLE_2 = 12307; // 1 +const static uint64_t SH_FLD_READ_ENABLE_3 = 12308; // 1 +const static uint64_t SH_FLD_READ_EPSILON_MODE = 12309; // 2 +const static uint64_t SH_FLD_READ_EPSILON_TIER0 = 12310; // 2 +const static uint64_t SH_FLD_READ_EPSILON_TIER0_LEN = 12311; // 2 +const static uint64_t SH_FLD_READ_EPSILON_TIER1 = 12312; // 2 +const static uint64_t SH_FLD_READ_EPSILON_TIER1_LEN = 12313; // 2 +const static uint64_t SH_FLD_READ_EPSILON_TIER2 = 12314; // 2 +const static uint64_t SH_FLD_READ_EPSILON_TIER2_LEN = 12315; // 2 +const static uint64_t SH_FLD_READ_ERR_INJECT0 = 12316; // 8 +const static uint64_t SH_FLD_READ_ERR_INJECT0_LEN = 12317; // 8 +const static uint64_t SH_FLD_READ_INVALID_FACES = 12318; // 1 +const static uint64_t SH_FLD_READ_INVALID_PIB = 12319; // 1 +const static uint64_t SH_FLD_READ_LATENCY_OFFSET = 12320; // 8 +const static uint64_t SH_FLD_READ_LATENCY_OFFSET_LEN = 12321; // 8 +const static uint64_t SH_FLD_READ_NOT_WRITE_0 = 12322; // 1 +const static uint64_t SH_FLD_READ_NOT_WRITE_1 = 12323; // 1 +const static uint64_t SH_FLD_READ_NOT_WRITE_2 = 12324; // 1 +const static uint64_t SH_FLD_READ_NOT_WRITE_3 = 12325; // 1 +const static uint64_t SH_FLD_READ_NVLD = 12326; // 1 +const static uint64_t SH_FLD_READ_OR_WRITE_DATA = 12327; // 64 +const static uint64_t SH_FLD_READ_OR_WRITE_DATA_LEN = 12328; // 64 +const static uint64_t SH_FLD_READ_PAR_NOT_SEQ = 12329; // 8 +const static uint64_t SH_FLD_READ_PREFETCH_CTL = 12330; // 4 +const static uint64_t SH_FLD_READ_PREFETCH_CTL_LEN = 12331; // 4 +const static uint64_t SH_FLD_READ_RAMP_PERF_TRESHOLD = 12332; // 4 +const static uint64_t SH_FLD_READ_RAMP_PERF_TRESHOLD_LEN = 12333; // 4 +const static uint64_t SH_FLD_READ_RESPONSE_DELAY_ENABLE = 12334; // 2 +const static uint64_t SH_FLD_READ_RST_INTERRUPT_FACES = 12335; // 1 +const static uint64_t SH_FLD_READ_RST_INTERRUPT_PIB = 12336; // 1 +const static uint64_t SH_FLD_READ_SPECULATION_DISABLE_THRESHOLD = 12337; // 4 +const static uint64_t SH_FLD_READ_SPECULATION_DISABLE_THRESHOLD_LEN = 12338; // 4 +const static uint64_t SH_FLD_READ_TTYPE = 12339; // 4 +const static uint64_t SH_FLD_RECAL_ABORT = 12340; // 48 +const static uint64_t SH_FLD_RECAL_ABORT_DL_MASK = 12341; // 2 +const static uint64_t SH_FLD_RECAL_DONE_DL_MASK = 12342; // 2 +const static uint64_t SH_FLD_RECAL_ERROR = 12343; // 8 +const static uint64_t SH_FLD_RECAL_MAX_SPARES_EXCEEDED = 12344; // 8 +const static uint64_t SH_FLD_RECAL_REQ = 12345; // 48 +const static uint64_t SH_FLD_RECAL_REQ_DL_MASK = 12346; // 2 +const static uint64_t SH_FLD_RECAL_SPARE_DEPLOYED = 12347; // 8 +const static uint64_t SH_FLD_RECEIVED = 12348; // 1 +const static uint64_t SH_FLD_RECEIVED_ERROR = 12349; // 1 +const static uint64_t SH_FLD_RECEIVER_MODE = 12350; // 3 +const static uint64_t SH_FLD_RECEIVER_MODE_LEN = 12351; // 3 +const static uint64_t SH_FLD_RECEIVE_ACKNOWLEDGE_REGISTER = 12352; // 1 +const static uint64_t SH_FLD_RECEIVE_ACKNOWLEDGE_REGISTER_LEN = 12353; // 1 +const static uint64_t SH_FLD_RECOVERABLE_ERROR = 12354; // 2 +const static uint64_t SH_FLD_RECOVERY_FAILED = 12355; // 6 +const static uint64_t SH_FLD_RECOVERY_HANG_DETECTED = 12356; // 2 +const static uint64_t SH_FLD_REC_PB_SM_ERROR_ERR = 12357; // 2 +const static uint64_t SH_FLD_REC_SM_ERROR_ERR = 12358; // 2 +const static uint64_t SH_FLD_REC_UPDATE_ERROR = 12359; // 2 +const static uint64_t SH_FLD_REDIS_PRIORITY = 12360; // 1 +const static uint64_t SH_FLD_REDIS_PRIORITY_LEN = 12361; // 1 +const static uint64_t SH_FLD_REDIS_RSD = 12362; // 1 +const static uint64_t SH_FLD_REDIS_RSD_LEN = 12363; // 1 +const static uint64_t SH_FLD_REFCLKSEL = 12364; // 4 +const static uint64_t SH_FLD_REFCLK_0_TERM_DIS_DC = 12365; // 1 +const static uint64_t SH_FLD_REFCLK_1_TERM_DIS_DC = 12366; // 1 +const static uint64_t SH_FLD_REFISINK = 12367; // 3 +const static uint64_t SH_FLD_REFISINK_LEN = 12368; // 3 +const static uint64_t SH_FLD_REFISRC = 12369; // 3 +const static uint64_t SH_FLD_REFISRC_LEN = 12370; // 3 +const static uint64_t SH_FLD_REFRESH_ALL_RANKS = 12371; // 8 +const static uint64_t SH_FLD_REFRESH_BLOCK_CONFIG = 12372; // 8 +const static uint64_t SH_FLD_REFRESH_BLOCK_CONFIG_LEN = 12373; // 8 +const static uint64_t SH_FLD_REFRESH_CONTROL = 12374; // 8 +const static uint64_t SH_FLD_REFRESH_CONTROL_LEN = 12375; // 8 +const static uint64_t SH_FLD_REFRESH_COUNT = 12376; // 8 +const static uint64_t SH_FLD_REFRESH_COUNT_LEN = 12377; // 8 +const static uint64_t SH_FLD_REFRESH_INTERVAL = 12378; // 8 +const static uint64_t SH_FLD_REFRESH_INTERVAL_LEN = 12379; // 8 +const static uint64_t SH_FLD_REFRESH_ONLY_SUBTEST_EN = 12380; // 2 +const static uint64_t SH_FLD_REFRESH_ONLY_SUBTEST_TIMEBASE_SEL = 12381; // 2 +const static uint64_t SH_FLD_REFRESH_ONLY_SUBTEST_TIMEBASE_SEL_LEN = 12382; // 2 +const static uint64_t SH_FLD_REFRESH_OVERRUN = 12383; // 16 +const static uint64_t SH_FLD_REFVREG = 12384; // 3 +const static uint64_t SH_FLD_REFVREG_LEN = 12385; // 3 +const static uint64_t SH_FLD_REG = 12386; // 19 +const static uint64_t SH_FLD_REGF = 12387; // 43 +const static uint64_t SH_FLD_REGION = 12388; // 72 +const static uint64_t SH_FLD_REGION_LEN = 12389; // 72 +const static uint64_t SH_FLD_REGISTER = 12390; // 3 +const static uint64_t SH_FLD_REGISTER_ARRAY_PE = 12391; // 9 +const static uint64_t SH_FLD_REGISTER_ARRAY_PE_MASK = 12392; // 9 +const static uint64_t SH_FLD_REGISTER_LEN = 12393; // 3 +const static uint64_t SH_FLD_REGISTER_PE = 12394; // 4 +const static uint64_t SH_FLD_REGISTER_VALID = 12395; // 4 +const static uint64_t SH_FLD_REGS = 12396; // 1 +const static uint64_t SH_FLD_REGSEL = 12397; // 4 +const static uint64_t SH_FLD_REGSEL_LEN = 12398; // 4 +const static uint64_t SH_FLD_REGS_LEN = 12399; // 1 +const static uint64_t SH_FLD_REG_ADDR_LEN = 12400; // 1 +const static uint64_t SH_FLD_REG_ADDR_LEN_0 = 12401; // 1 +const static uint64_t SH_FLD_REG_ADDR_LEN_0_LEN = 12402; // 1 +const static uint64_t SH_FLD_REG_ADDR_LEN_1 = 12403; // 1 +const static uint64_t SH_FLD_REG_ADDR_LEN_1_LEN = 12404; // 1 +const static uint64_t SH_FLD_REG_ADDR_LEN_2 = 12405; // 1 +const static uint64_t SH_FLD_REG_ADDR_LEN_2_LEN = 12406; // 1 +const static uint64_t SH_FLD_REG_ADDR_LEN_3 = 12407; // 1 +const static uint64_t SH_FLD_REG_ADDR_LEN_3_LEN = 12408; // 1 +const static uint64_t SH_FLD_REG_ADDR_LEN_LEN = 12409; // 1 +const static uint64_t SH_FLD_REG_ENABLE = 12410; // 1 +const static uint64_t SH_FLD_REG_FIFO_SIZE_EQ_1 = 12411; // 1 +const static uint64_t SH_FLD_REG_LEN = 12412; // 19 +const static uint64_t SH_FLD_REG_UNUSED = 12413; // 1 +const static uint64_t SH_FLD_REG_UNUSED_LEN = 12414; // 1 +const static uint64_t SH_FLD_REG_WAKEUP_C0 = 12415; // 24 +const static uint64_t SH_FLD_REG_WAKEUP_C1 = 12416; // 24 +const static uint64_t SH_FLD_REINIT_CREDITS = 12417; // 1 +const static uint64_t SH_FLD_REJECTED_PASTE_CMD = 12418; // 2 +const static uint64_t SH_FLD_REL_ASYNC_PARITY_ERROR = 12419; // 8 +const static uint64_t SH_FLD_REL_ASYNC_SEQUENCE_ERROR = 12420; // 8 +const static uint64_t SH_FLD_REL_MERGE_ASYNC_PARITY_ERROR = 12421; // 8 +const static uint64_t SH_FLD_REL_MERGE_ASYNC_SEQUENCE_ERROR = 12422; // 8 +const static uint64_t SH_FLD_REMAINING_WORDS = 12423; // 1 +const static uint64_t SH_FLD_REMAINING_WORDS_LEN = 12424; // 1 +const static uint64_t SH_FLD_REMAP_DEST = 12425; // 1 +const static uint64_t SH_FLD_REMAP_DEST_LEN = 12426; // 1 +const static uint64_t SH_FLD_REMAP_SOURCE = 12427; // 1 +const static uint64_t SH_FLD_REMAP_SOURCE_LEN = 12428; // 1 +const static uint64_t SH_FLD_REMOTE_NODAL_EPSILON = 12429; // 8 +const static uint64_t SH_FLD_REMOTE_NODAL_EPSILON_LEN = 12430; // 8 +const static uint64_t SH_FLD_REMOTE_SYNC_CHECK_CPS_DEVIATION = 12431; // 1 +const static uint64_t SH_FLD_REMOTE_SYNC_CHECK_CPS_DEVIATION_FACTOR = 12432; // 1 +const static uint64_t SH_FLD_REMOTE_SYNC_CHECK_CPS_DEVIATION_FACTOR_LEN = 12433; // 1 +const static uint64_t SH_FLD_REMOTE_SYNC_CHECK_CPS_DEVIATION_LEN = 12434; // 1 +const static uint64_t SH_FLD_REMOTE_SYNC_CHECK_M_CPS_DISABLE = 12435; // 1 +const static uint64_t SH_FLD_REMOTE_SYNC_DISABLE = 12436; // 1 +const static uint64_t SH_FLD_REMOTE_SYNC_ERROR_DISABLE = 12437; // 1 +const static uint64_t SH_FLD_REMOTE_SYNC_MISS_COUNT_MAX = 12438; // 1 +const static uint64_t SH_FLD_REMOTE_SYNC_MISS_COUNT_MAX_LEN = 12439; // 1 +const static uint64_t SH_FLD_REM_0 = 12440; // 6 +const static uint64_t SH_FLD_REM_0_LEN = 12441; // 6 +const static uint64_t SH_FLD_REM_1 = 12442; // 6 +const static uint64_t SH_FLD_REM_1_LEN = 12443; // 6 +const static uint64_t SH_FLD_REM_2 = 12444; // 6 +const static uint64_t SH_FLD_REM_2_LEN = 12445; // 6 +const static uint64_t SH_FLD_REM_3 = 12446; // 6 +const static uint64_t SH_FLD_REM_3_LEN = 12447; // 6 +const static uint64_t SH_FLD_REPAIR_DONE = 12448; // 4 +const static uint64_t SH_FLD_REPAIR_FAILED = 12449; // 4 +const static uint64_t SH_FLD_REPEAT_CMD_CNT = 12450; // 64 +const static uint64_t SH_FLD_REPEAT_CMD_CNT_LEN = 12451; // 64 +const static uint64_t SH_FLD_REPR = 12452; // 43 +const static uint64_t SH_FLD_REPTEST_ENABLE = 12453; // 1 +const static uint64_t SH_FLD_REPTEST_MATCH_TH = 12454; // 1 +const static uint64_t SH_FLD_REPTEST_MATCH_TH_LEN = 12455; // 1 +const static uint64_t SH_FLD_REPTEST_SOFT_FAIL_COUNT_RNG0 = 12456; // 1 +const static uint64_t SH_FLD_REPTEST_SOFT_FAIL_COUNT_RNG0_LEN = 12457; // 1 +const static uint64_t SH_FLD_REPTEST_SOFT_FAIL_COUNT_RNG1 = 12458; // 1 +const static uint64_t SH_FLD_REPTEST_SOFT_FAIL_COUNT_RNG1_LEN = 12459; // 1 +const static uint64_t SH_FLD_REPTEST_SOFT_FAIL_TH = 12460; // 1 +const static uint64_t SH_FLD_REPTEST_SOFT_FAIL_TH_LEN = 12461; // 1 +const static uint64_t SH_FLD_REQ = 12462; // 43 +const static uint64_t SH_FLD_REQUEST = 12463; // 1 +const static uint64_t SH_FLD_REQUEST_LEN = 12464; // 1 +const static uint64_t SH_FLD_REQ_INTR_PAYLOAD = 12465; // 30 +const static uint64_t SH_FLD_REQ_INTR_PAYLOAD_LEN = 12466; // 30 +const static uint64_t SH_FLD_REQ_INTR_TYPE = 12467; // 30 +const static uint64_t SH_FLD_REQ_INTR_TYPE_LEN = 12468; // 30 +const static uint64_t SH_FLD_REQ_RESET_FR_SBE = 12469; // 1 +const static uint64_t SH_FLD_REQ_RESET_FR_SP = 12470; // 1 +const static uint64_t SH_FLD_REQ_STOP_LEVEL = 12471; // 30 +const static uint64_t SH_FLD_REQ_STOP_LEVEL_FSP = 12472; // 30 +const static uint64_t SH_FLD_REQ_STOP_LEVEL_FSP_LEN = 12473; // 30 +const static uint64_t SH_FLD_REQ_STOP_LEVEL_HYP = 12474; // 30 +const static uint64_t SH_FLD_REQ_STOP_LEVEL_HYP_LEN = 12475; // 30 +const static uint64_t SH_FLD_REQ_STOP_LEVEL_LEN = 12476; // 30 +const static uint64_t SH_FLD_REQ_STOP_LEVEL_OCC = 12477; // 30 +const static uint64_t SH_FLD_REQ_STOP_LEVEL_OCC_LEN = 12478; // 30 +const static uint64_t SH_FLD_REQ_STOP_LEVEL_OTR = 12479; // 30 +const static uint64_t SH_FLD_REQ_STOP_LEVEL_OTR_LEN = 12480; // 30 +const static uint64_t SH_FLD_RESCLK_DIS = 12481; // 43 +const static uint64_t SH_FLD_RESERVATION_EN = 12482; // 1 +const static uint64_t SH_FLD_RESERVED = 12483; // 120 +const static uint64_t SH_FLD_RESERVED1 = 12484; // 248 +const static uint64_t SH_FLD_RESERVED12 = 12485; // 4 +const static uint64_t SH_FLD_RESERVED13 = 12486; // 4 +const static uint64_t SH_FLD_RESERVED13_15 = 12487; // 6 +const static uint64_t SH_FLD_RESERVED13_15_LEN = 12488; // 6 +const static uint64_t SH_FLD_RESERVED17 = 12489; // 4 +const static uint64_t SH_FLD_RESERVED18 = 12490; // 4 +const static uint64_t SH_FLD_RESERVED19 = 12491; // 4 +const static uint64_t SH_FLD_RESERVED19_23 = 12492; // 4 +const static uint64_t SH_FLD_RESERVED19_23_LEN = 12493; // 4 +const static uint64_t SH_FLD_RESERVED1_2 = 12494; // 4 +const static uint64_t SH_FLD_RESERVED1_2_LEN = 12495; // 4 +const static uint64_t SH_FLD_RESERVED1_LEN = 12496; // 164 +const static uint64_t SH_FLD_RESERVED2 = 12497; // 63 +const static uint64_t SH_FLD_RESERVED20 = 12498; // 4 +const static uint64_t SH_FLD_RESERVED21 = 12499; // 4 +const static uint64_t SH_FLD_RESERVED22 = 12500; // 4 +const static uint64_t SH_FLD_RESERVED23 = 12501; // 4 +const static uint64_t SH_FLD_RESERVED24 = 12502; // 4 +const static uint64_t SH_FLD_RESERVED25 = 12503; // 8 +const static uint64_t SH_FLD_RESERVED26 = 12504; // 12 +const static uint64_t SH_FLD_RESERVED27 = 12505; // 4 +const static uint64_t SH_FLD_RESERVED28_29 = 12506; // 6 +const static uint64_t SH_FLD_RESERVED28_29_LEN = 12507; // 6 +const static uint64_t SH_FLD_RESERVED2_LEN = 12508; // 15 +const static uint64_t SH_FLD_RESERVED3 = 12509; // 21 +const static uint64_t SH_FLD_RESERVED3_LEN = 12510; // 15 +const static uint64_t SH_FLD_RESERVED4 = 12511; // 6 +const static uint64_t SH_FLD_RESERVED46_48 = 12512; // 4 +const static uint64_t SH_FLD_RESERVED46_48_LEN = 12513; // 4 +const static uint64_t SH_FLD_RESERVED4_LEN = 12514; // 6 +const static uint64_t SH_FLD_RESERVED515 = 12515; // 4 +const static uint64_t SH_FLD_RESERVED515_LEN = 12516; // 4 +const static uint64_t SH_FLD_RESERVED54 = 12517; // 4 +const static uint64_t SH_FLD_RESERVED55 = 12518; // 4 +const static uint64_t SH_FLD_RESERVED57_63 = 12519; // 4 +const static uint64_t SH_FLD_RESERVED57_63_LEN = 12520; // 4 +const static uint64_t SH_FLD_RESERVED6 = 12521; // 1 +const static uint64_t SH_FLD_RESERVED61_63 = 12522; // 4 +const static uint64_t SH_FLD_RESERVED61_63_LEN = 12523; // 4 +const static uint64_t SH_FLD_RESERVED_0 = 12524; // 4 +const static uint64_t SH_FLD_RESERVED_00 = 12525; // 1 +const static uint64_t SH_FLD_RESERVED_02 = 12526; // 1 +const static uint64_t SH_FLD_RESERVED_03 = 12527; // 1 +const static uint64_t SH_FLD_RESERVED_0_1 = 12528; // 20 +const static uint64_t SH_FLD_RESERVED_0_11 = 12529; // 6 +const static uint64_t SH_FLD_RESERVED_0_11_LEN = 12530; // 6 +const static uint64_t SH_FLD_RESERVED_0_17 = 12531; // 2 +const static uint64_t SH_FLD_RESERVED_0_17_LEN = 12532; // 2 +const static uint64_t SH_FLD_RESERVED_0_1_LEN = 12533; // 20 +const static uint64_t SH_FLD_RESERVED_0_20 = 12534; // 5 +const static uint64_t SH_FLD_RESERVED_0_20_LEN = 12535; // 5 +const static uint64_t SH_FLD_RESERVED_0_3 = 12536; // 1 +const static uint64_t SH_FLD_RESERVED_0_31 = 12537; // 2 +const static uint64_t SH_FLD_RESERVED_0_31_LEN = 12538; // 2 +const static uint64_t SH_FLD_RESERVED_0_32 = 12539; // 1 +const static uint64_t SH_FLD_RESERVED_0_32_LEN = 12540; // 1 +const static uint64_t SH_FLD_RESERVED_0_3_LEN = 12541; // 1 +const static uint64_t SH_FLD_RESERVED_0_7 = 12542; // 24 +const static uint64_t SH_FLD_RESERVED_0_7_LEN = 12543; // 24 +const static uint64_t SH_FLD_RESERVED_1 = 12544; // 11 +const static uint64_t SH_FLD_RESERVED_10 = 12545; // 2 +const static uint64_t SH_FLD_RESERVED_10_11 = 12546; // 30 +const static uint64_t SH_FLD_RESERVED_10_11_LEN = 12547; // 30 +const static uint64_t SH_FLD_RESERVED_10_LEN = 12548; // 1 +const static uint64_t SH_FLD_RESERVED_11 = 12549; // 2 +const static uint64_t SH_FLD_RESERVED_11A = 12550; // 43 +const static uint64_t SH_FLD_RESERVED_11_12 = 12551; // 4 +const static uint64_t SH_FLD_RESERVED_11_12_LEN = 12552; // 4 +const static uint64_t SH_FLD_RESERVED_11_14 = 12553; // 4 +const static uint64_t SH_FLD_RESERVED_11_14_LEN = 12554; // 4 +const static uint64_t SH_FLD_RESERVED_11_LEN = 12555; // 1 +const static uint64_t SH_FLD_RESERVED_12 = 12556; // 1 +const static uint64_t SH_FLD_RESERVED_12_13 = 12557; // 8 +const static uint64_t SH_FLD_RESERVED_12_13_LEN = 12558; // 8 +const static uint64_t SH_FLD_RESERVED_12_15 = 12559; // 1 +const static uint64_t SH_FLD_RESERVED_12_15_LEN = 12560; // 1 +const static uint64_t SH_FLD_RESERVED_12_23 = 12561; // 1 +const static uint64_t SH_FLD_RESERVED_12_23_LEN = 12562; // 1 +const static uint64_t SH_FLD_RESERVED_12_31 = 12563; // 2 +const static uint64_t SH_FLD_RESERVED_12_31_LEN = 12564; // 2 +const static uint64_t SH_FLD_RESERVED_12_34 = 12565; // 2 +const static uint64_t SH_FLD_RESERVED_12_34_LEN = 12566; // 2 +const static uint64_t SH_FLD_RESERVED_13 = 12567; // 17 +const static uint64_t SH_FLD_RESERVED_13_31 = 12568; // 2 +const static uint64_t SH_FLD_RESERVED_13_31_LEN = 12569; // 2 +const static uint64_t SH_FLD_RESERVED_13_LEN = 12570; // 1 +const static uint64_t SH_FLD_RESERVED_14 = 12571; // 1 +const static uint64_t SH_FLD_RESERVED_14C = 12572; // 43 +const static uint64_t SH_FLD_RESERVED_14_15 = 12573; // 6 +const static uint64_t SH_FLD_RESERVED_14_15_LEN = 12574; // 6 +const static uint64_t SH_FLD_RESERVED_14_LEN = 12575; // 1 +const static uint64_t SH_FLD_RESERVED_15 = 12576; // 12 +const static uint64_t SH_FLD_RESERVED_15C = 12577; // 43 +const static uint64_t SH_FLD_RESERVED_16 = 12578; // 13 +const static uint64_t SH_FLD_RESERVED_16_17 = 12579; // 12 +const static uint64_t SH_FLD_RESERVED_16_17_LEN = 12580; // 12 +const static uint64_t SH_FLD_RESERVED_16_18 = 12581; // 30 +const static uint64_t SH_FLD_RESERVED_16_18_LEN = 12582; // 30 +const static uint64_t SH_FLD_RESERVED_16_26 = 12583; // 2 +const static uint64_t SH_FLD_RESERVED_16_26_LEN = 12584; // 2 +const static uint64_t SH_FLD_RESERVED_16_LEN = 12585; // 1 +const static uint64_t SH_FLD_RESERVED_17 = 12586; // 11 +const static uint64_t SH_FLD_RESERVED_17_18 = 12587; // 6 +const static uint64_t SH_FLD_RESERVED_17_18_LEN = 12588; // 6 +const static uint64_t SH_FLD_RESERVED_17_19 = 12589; // 6 +const static uint64_t SH_FLD_RESERVED_17_19_LEN = 12590; // 6 +const static uint64_t SH_FLD_RESERVED_17_LEN = 12591; // 1 +const static uint64_t SH_FLD_RESERVED_18A = 12592; // 43 +const static uint64_t SH_FLD_RESERVED_18_23 = 12593; // 10 +const static uint64_t SH_FLD_RESERVED_18_23_LEN = 12594; // 10 +const static uint64_t SH_FLD_RESERVED_18_31 = 12595; // 3 +const static uint64_t SH_FLD_RESERVED_18_31_LEN = 12596; // 3 +const static uint64_t SH_FLD_RESERVED_19 = 12597; // 1 +const static uint64_t SH_FLD_RESERVED_19A = 12598; // 43 +const static uint64_t SH_FLD_RESERVED_19_31 = 12599; // 8 +const static uint64_t SH_FLD_RESERVED_19_31_LEN = 12600; // 8 +const static uint64_t SH_FLD_RESERVED_1_12 = 12601; // 4 +const static uint64_t SH_FLD_RESERVED_1_12_LEN = 12602; // 4 +const static uint64_t SH_FLD_RESERVED_1_2 = 12603; // 54 +const static uint64_t SH_FLD_RESERVED_1_2_LEN = 12604; // 54 +const static uint64_t SH_FLD_RESERVED_1_5 = 12605; // 1 +const static uint64_t SH_FLD_RESERVED_1_5_LEN = 12606; // 1 +const static uint64_t SH_FLD_RESERVED_1_7 = 12607; // 1 +const static uint64_t SH_FLD_RESERVED_1_7_LEN = 12608; // 1 +const static uint64_t SH_FLD_RESERVED_2 = 12609; // 2 +const static uint64_t SH_FLD_RESERVED_20 = 12610; // 1 +const static uint64_t SH_FLD_RESERVED_20_22 = 12611; // 1 +const static uint64_t SH_FLD_RESERVED_20_22_LEN = 12612; // 1 +const static uint64_t SH_FLD_RESERVED_20_23 = 12613; // 12 +const static uint64_t SH_FLD_RESERVED_20_23_LEN = 12614; // 12 +const static uint64_t SH_FLD_RESERVED_20_31 = 12615; // 2 +const static uint64_t SH_FLD_RESERVED_20_31_LEN = 12616; // 2 +const static uint64_t SH_FLD_RESERVED_20_LEN = 12617; // 1 +const static uint64_t SH_FLD_RESERVED_21 = 12618; // 8 +const static uint64_t SH_FLD_RESERVED_22C = 12619; // 43 +const static uint64_t SH_FLD_RESERVED_23 = 12620; // 4 +const static uint64_t SH_FLD_RESERVED_23C = 12621; // 43 +const static uint64_t SH_FLD_RESERVED_23_26 = 12622; // 8 +const static uint64_t SH_FLD_RESERVED_23_26_LEN = 12623; // 8 +const static uint64_t SH_FLD_RESERVED_23_63 = 12624; // 2 +const static uint64_t SH_FLD_RESERVED_23_63_LEN = 12625; // 2 +const static uint64_t SH_FLD_RESERVED_24 = 12626; // 3 +const static uint64_t SH_FLD_RESERVED_24_25 = 12627; // 2 +const static uint64_t SH_FLD_RESERVED_24_25_LEN = 12628; // 2 +const static uint64_t SH_FLD_RESERVED_24_29 = 12629; // 1 +const static uint64_t SH_FLD_RESERVED_24_29_LEN = 12630; // 1 +const static uint64_t SH_FLD_RESERVED_24_31 = 12631; // 1 +const static uint64_t SH_FLD_RESERVED_24_31_LEN = 12632; // 1 +const static uint64_t SH_FLD_RESERVED_24_LEN = 12633; // 1 +const static uint64_t SH_FLD_RESERVED_25 = 12634; // 11 +const static uint64_t SH_FLD_RESERVED_25_26 = 12635; // 3 +const static uint64_t SH_FLD_RESERVED_25_26_LEN = 12636; // 3 +const static uint64_t SH_FLD_RESERVED_26_49 = 12637; // 2 +const static uint64_t SH_FLD_RESERVED_26_49_LEN = 12638; // 2 +const static uint64_t SH_FLD_RESERVED_28 = 12639; // 3 +const static uint64_t SH_FLD_RESERVED_28_31 = 12640; // 68 +const static uint64_t SH_FLD_RESERVED_28_31_LEN = 12641; // 68 +const static uint64_t SH_FLD_RESERVED_28_LEN = 12642; // 2 +const static uint64_t SH_FLD_RESERVED_2E = 12643; // 43 +const static uint64_t SH_FLD_RESERVED_2_11 = 12644; // 24 +const static uint64_t SH_FLD_RESERVED_2_11_LEN = 12645; // 24 +const static uint64_t SH_FLD_RESERVED_2_3 = 12646; // 3 +const static uint64_t SH_FLD_RESERVED_2_3_LEN = 12647; // 3 +const static uint64_t SH_FLD_RESERVED_3 = 12648; // 8 +const static uint64_t SH_FLD_RESERVED_30 = 12649; // 1 +const static uint64_t SH_FLD_RESERVED_30C = 12650; // 43 +const static uint64_t SH_FLD_RESERVED_31 = 12651; // 3 +const static uint64_t SH_FLD_RESERVED_31C = 12652; // 43 +const static uint64_t SH_FLD_RESERVED_31_LEN = 12653; // 2 +const static uint64_t SH_FLD_RESERVED_32 = 12654; // 26 +const static uint64_t SH_FLD_RESERVED_32_33 = 12655; // 4 +const static uint64_t SH_FLD_RESERVED_32_33_LEN = 12656; // 4 +const static uint64_t SH_FLD_RESERVED_32_34 = 12657; // 7 +const static uint64_t SH_FLD_RESERVED_32_34_LEN = 12658; // 7 +const static uint64_t SH_FLD_RESERVED_32_35 = 12659; // 3 +const static uint64_t SH_FLD_RESERVED_32_35_LEN = 12660; // 3 +const static uint64_t SH_FLD_RESERVED_32_39 = 12661; // 3 +const static uint64_t SH_FLD_RESERVED_32_39_LEN = 12662; // 3 +const static uint64_t SH_FLD_RESERVED_32_40 = 12663; // 10 +const static uint64_t SH_FLD_RESERVED_32_40_LEN = 12664; // 10 +const static uint64_t SH_FLD_RESERVED_32_43 = 12665; // 1 +const static uint64_t SH_FLD_RESERVED_32_43_LEN = 12666; // 1 +const static uint64_t SH_FLD_RESERVED_32_63 = 12667; // 8 +const static uint64_t SH_FLD_RESERVED_32_63_LEN = 12668; // 8 +const static uint64_t SH_FLD_RESERVED_33A = 12669; // 43 +const static uint64_t SH_FLD_RESERVED_33_63 = 12670; // 2 +const static uint64_t SH_FLD_RESERVED_33_63_LEN = 12671; // 2 +const static uint64_t SH_FLD_RESERVED_34 = 12672; // 1 +const static uint64_t SH_FLD_RESERVED_34A = 12673; // 43 +const static uint64_t SH_FLD_RESERVED_34_35 = 12674; // 6 +const static uint64_t SH_FLD_RESERVED_34_35_LEN = 12675; // 6 +const static uint64_t SH_FLD_RESERVED_35 = 12676; // 1 +const static uint64_t SH_FLD_RESERVED_35A = 12677; // 43 +const static uint64_t SH_FLD_RESERVED_36_37 = 12678; // 8 +const static uint64_t SH_FLD_RESERVED_36_37_LEN = 12679; // 8 +const static uint64_t SH_FLD_RESERVED_36_39 = 12680; // 12 +const static uint64_t SH_FLD_RESERVED_36_39_LEN = 12681; // 12 +const static uint64_t SH_FLD_RESERVED_37 = 12682; // 1 +const static uint64_t SH_FLD_RESERVED_37_38 = 12683; // 6 +const static uint64_t SH_FLD_RESERVED_37_38_LEN = 12684; // 6 +const static uint64_t SH_FLD_RESERVED_37_51 = 12685; // 1 +const static uint64_t SH_FLD_RESERVED_37_51_LEN = 12686; // 1 +const static uint64_t SH_FLD_RESERVED_37_56 = 12687; // 8 +const static uint64_t SH_FLD_RESERVED_37_56_LEN = 12688; // 8 +const static uint64_t SH_FLD_RESERVED_38 = 12689; // 1 +const static uint64_t SH_FLD_RESERVED_38A = 12690; // 43 +const static uint64_t SH_FLD_RESERVED_38_39 = 12691; // 24 +const static uint64_t SH_FLD_RESERVED_38_39_LEN = 12692; // 24 +const static uint64_t SH_FLD_RESERVED_38_41 = 12693; // 2 +const static uint64_t SH_FLD_RESERVED_38_41_LEN = 12694; // 2 +const static uint64_t SH_FLD_RESERVED_38_63 = 12695; // 2 +const static uint64_t SH_FLD_RESERVED_38_63_LEN = 12696; // 2 +const static uint64_t SH_FLD_RESERVED_39 = 12697; // 12 +const static uint64_t SH_FLD_RESERVED_39A = 12698; // 43 +const static uint64_t SH_FLD_RESERVED_39_47 = 12699; // 64 +const static uint64_t SH_FLD_RESERVED_39_47_LEN = 12700; // 64 +const static uint64_t SH_FLD_RESERVED_3E = 12701; // 43 +const static uint64_t SH_FLD_RESERVED_4 = 12702; // 15 +const static uint64_t SH_FLD_RESERVED_40 = 12703; // 35 +const static uint64_t SH_FLD_RESERVED_40_41 = 12704; // 7 +const static uint64_t SH_FLD_RESERVED_40_41_LEN = 12705; // 7 +const static uint64_t SH_FLD_RESERVED_40_42 = 12706; // 1 +const static uint64_t SH_FLD_RESERVED_40_42_LEN = 12707; // 1 +const static uint64_t SH_FLD_RESERVED_40_47 = 12708; // 1 +const static uint64_t SH_FLD_RESERVED_40_47_LEN = 12709; // 1 +const static uint64_t SH_FLD_RESERVED_41 = 12710; // 2 +const static uint64_t SH_FLD_RESERVED_41_42 = 12711; // 10 +const static uint64_t SH_FLD_RESERVED_41_42_LEN = 12712; // 10 +const static uint64_t SH_FLD_RESERVED_41_43 = 12713; // 1 +const static uint64_t SH_FLD_RESERVED_41_43_LEN = 12714; // 1 +const static uint64_t SH_FLD_RESERVED_41_63 = 12715; // 8 +const static uint64_t SH_FLD_RESERVED_41_63_LEN = 12716; // 8 +const static uint64_t SH_FLD_RESERVED_42 = 12717; // 2 +const static uint64_t SH_FLD_RESERVED_42A = 12718; // 43 +const static uint64_t SH_FLD_RESERVED_42_43 = 12719; // 12 +const static uint64_t SH_FLD_RESERVED_42_43_LEN = 12720; // 12 +const static uint64_t SH_FLD_RESERVED_43 = 12721; // 2 +const static uint64_t SH_FLD_RESERVED_43A = 12722; // 43 +const static uint64_t SH_FLD_RESERVED_43C = 12723; // 43 +const static uint64_t SH_FLD_RESERVED_43_44 = 12724; // 2 +const static uint64_t SH_FLD_RESERVED_43_44_LEN = 12725; // 2 +const static uint64_t SH_FLD_RESERVED_44 = 12726; // 1 +const static uint64_t SH_FLD_RESERVED_44_47 = 12727; // 1 +const static uint64_t SH_FLD_RESERVED_44_47_LEN = 12728; // 1 +const static uint64_t SH_FLD_RESERVED_45 = 12729; // 1 +const static uint64_t SH_FLD_RESERVED_45_63 = 12730; // 1 +const static uint64_t SH_FLD_RESERVED_45_63_LEN = 12731; // 1 +const static uint64_t SH_FLD_RESERVED_46 = 12732; // 1 +const static uint64_t SH_FLD_RESERVED_47 = 12733; // 1 +const static uint64_t SH_FLD_RESERVED_47_48 = 12734; // 2 +const static uint64_t SH_FLD_RESERVED_47_48_LEN = 12735; // 2 +const static uint64_t SH_FLD_RESERVED_48 = 12736; // 26 +const static uint64_t SH_FLD_RESERVED_48_49 = 12737; // 1 +const static uint64_t SH_FLD_RESERVED_48_49_LEN = 12738; // 1 +const static uint64_t SH_FLD_RESERVED_48_50 = 12739; // 2 +const static uint64_t SH_FLD_RESERVED_48_50_LEN = 12740; // 2 +const static uint64_t SH_FLD_RESERVED_48_55 = 12741; // 1 +const static uint64_t SH_FLD_RESERVED_48_55_LEN = 12742; // 1 +const static uint64_t SH_FLD_RESERVED_48_63 = 12743; // 10 +const static uint64_t SH_FLD_RESERVED_48_63_LEN = 12744; // 10 +const static uint64_t SH_FLD_RESERVED_49_63 = 12745; // 8 +const static uint64_t SH_FLD_RESERVED_49_63_LEN = 12746; // 8 +const static uint64_t SH_FLD_RESERVED_4_5 = 12747; // 12 +const static uint64_t SH_FLD_RESERVED_4_5_LEN = 12748; // 12 +const static uint64_t SH_FLD_RESERVED_4_7 = 12749; // 33 +const static uint64_t SH_FLD_RESERVED_4_7_LEN = 12750; // 33 +const static uint64_t SH_FLD_RESERVED_4_LEN = 12751; // 1 +const static uint64_t SH_FLD_RESERVED_5 = 12752; // 1 +const static uint64_t SH_FLD_RESERVED_50 = 12753; // 4 +const static uint64_t SH_FLD_RESERVED_50_51 = 12754; // 1 +const static uint64_t SH_FLD_RESERVED_50_51_LEN = 12755; // 1 +const static uint64_t SH_FLD_RESERVED_51 = 12756; // 8 +const static uint64_t SH_FLD_RESERVED_51_63 = 12757; // 1 +const static uint64_t SH_FLD_RESERVED_51_63_LEN = 12758; // 1 +const static uint64_t SH_FLD_RESERVED_52 = 12759; // 38 +const static uint64_t SH_FLD_RESERVED_52_55 = 12760; // 64 +const static uint64_t SH_FLD_RESERVED_52_55_LEN = 12761; // 64 +const static uint64_t SH_FLD_RESERVED_52_56 = 12762; // 8 +const static uint64_t SH_FLD_RESERVED_52_56_LEN = 12763; // 8 +const static uint64_t SH_FLD_RESERVED_53 = 12764; // 8 +const static uint64_t SH_FLD_RESERVED_53_55 = 12765; // 6 +const static uint64_t SH_FLD_RESERVED_53_55_LEN = 12766; // 6 +const static uint64_t SH_FLD_RESERVED_53_59 = 12767; // 2 +const static uint64_t SH_FLD_RESERVED_53_59_LEN = 12768; // 2 +const static uint64_t SH_FLD_RESERVED_53_63 = 12769; // 1 +const static uint64_t SH_FLD_RESERVED_53_63_LEN = 12770; // 1 +const static uint64_t SH_FLD_RESERVED_54_63 = 12771; // 8 +const static uint64_t SH_FLD_RESERVED_54_63_LEN = 12772; // 8 +const static uint64_t SH_FLD_RESERVED_55_63 = 12773; // 8 +const static uint64_t SH_FLD_RESERVED_55_63_LEN = 12774; // 8 +const static uint64_t SH_FLD_RESERVED_56 = 12775; // 40 +const static uint64_t SH_FLD_RESERVED_56_57 = 12776; // 1 +const static uint64_t SH_FLD_RESERVED_56_57_LEN = 12777; // 1 +const static uint64_t SH_FLD_RESERVED_56_58 = 12778; // 4 +const static uint64_t SH_FLD_RESERVED_56_58_LEN = 12779; // 4 +const static uint64_t SH_FLD_RESERVED_56_59 = 12780; // 1 +const static uint64_t SH_FLD_RESERVED_56_59_LEN = 12781; // 1 +const static uint64_t SH_FLD_RESERVED_56_63 = 12782; // 17 +const static uint64_t SH_FLD_RESERVED_56_63_LEN = 12783; // 17 +const static uint64_t SH_FLD_RESERVED_57 = 12784; // 24 +const static uint64_t SH_FLD_RESERVED_57_58 = 12785; // 1 +const static uint64_t SH_FLD_RESERVED_57_58_LEN = 12786; // 1 +const static uint64_t SH_FLD_RESERVED_57_59 = 12787; // 2 +const static uint64_t SH_FLD_RESERVED_57_59_LEN = 12788; // 2 +const static uint64_t SH_FLD_RESERVED_57_60 = 12789; // 6 +const static uint64_t SH_FLD_RESERVED_57_60_LEN = 12790; // 6 +const static uint64_t SH_FLD_RESERVED_57_63 = 12791; // 8 +const static uint64_t SH_FLD_RESERVED_57_63_LEN = 12792; // 8 +const static uint64_t SH_FLD_RESERVED_58_63 = 12793; // 16 +const static uint64_t SH_FLD_RESERVED_58_63_LEN = 12794; // 16 +const static uint64_t SH_FLD_RESERVED_59 = 12795; // 1 +const static uint64_t SH_FLD_RESERVED_5_15 = 12796; // 1 +const static uint64_t SH_FLD_RESERVED_5_15_LEN = 12797; // 1 +const static uint64_t SH_FLD_RESERVED_5_LEN = 12798; // 1 +const static uint64_t SH_FLD_RESERVED_6 = 12799; // 2 +const static uint64_t SH_FLD_RESERVED_60 = 12800; // 24 +const static uint64_t SH_FLD_RESERVED_60_63 = 12801; // 15 +const static uint64_t SH_FLD_RESERVED_60_63_LEN = 12802; // 15 +const static uint64_t SH_FLD_RESERVED_61 = 12803; // 24 +const static uint64_t SH_FLD_RESERVED_61_63 = 12804; // 16 +const static uint64_t SH_FLD_RESERVED_61_63_LEN = 12805; // 16 +const static uint64_t SH_FLD_RESERVED_62 = 12806; // 3 +const static uint64_t SH_FLD_RESERVED_62_63 = 12807; // 8 +const static uint64_t SH_FLD_RESERVED_62_63_LEN = 12808; // 8 +const static uint64_t SH_FLD_RESERVED_63 = 12809; // 12 +const static uint64_t SH_FLD_RESERVED_6C = 12810; // 43 +const static uint64_t SH_FLD_RESERVED_6E = 12811; // 43 +const static uint64_t SH_FLD_RESERVED_6_14 = 12812; // 2 +const static uint64_t SH_FLD_RESERVED_6_14_LEN = 12813; // 2 +const static uint64_t SH_FLD_RESERVED_6_7 = 12814; // 26 +const static uint64_t SH_FLD_RESERVED_6_7_LEN = 12815; // 26 +const static uint64_t SH_FLD_RESERVED_7 = 12816; // 2 +const static uint64_t SH_FLD_RESERVED_7C = 12817; // 43 +const static uint64_t SH_FLD_RESERVED_7_9 = 12818; // 8 +const static uint64_t SH_FLD_RESERVED_7_9_LEN = 12819; // 8 +const static uint64_t SH_FLD_RESERVED_7_LEN = 12820; // 1 +const static uint64_t SH_FLD_RESERVED_8 = 12821; // 5 +const static uint64_t SH_FLD_RESERVED_8_10 = 12822; // 38 +const static uint64_t SH_FLD_RESERVED_8_10_LEN = 12823; // 38 +const static uint64_t SH_FLD_RESERVED_8_11 = 12824; // 12 +const static uint64_t SH_FLD_RESERVED_8_11_LEN = 12825; // 12 +const static uint64_t SH_FLD_RESERVED_8_9 = 12826; // 1 +const static uint64_t SH_FLD_RESERVED_8_9_LEN = 12827; // 1 +const static uint64_t SH_FLD_RESERVED_8_LEN = 12828; // 1 +const static uint64_t SH_FLD_RESERVED_9 = 12829; // 27 +const static uint64_t SH_FLD_RESERVED_9_15 = 12830; // 2 +const static uint64_t SH_FLD_RESERVED_9_15_LEN = 12831; // 2 +const static uint64_t SH_FLD_RESERVED_9_27 = 12832; // 1 +const static uint64_t SH_FLD_RESERVED_9_27_LEN = 12833; // 1 +const static uint64_t SH_FLD_RESERVED_CERR_24 = 12834; // 8 +const static uint64_t SH_FLD_RESERVED_CERR_25 = 12835; // 8 +const static uint64_t SH_FLD_RESERVED_FOR_ADDRESS = 12836; // 1 +const static uint64_t SH_FLD_RESERVED_FOR_ADDRESS_LEN = 12837; // 1 +const static uint64_t SH_FLD_RESERVED_FOR_CONFIGS = 12838; // 1 +const static uint64_t SH_FLD_RESERVED_FOR_CONFIGS_LEN = 12839; // 1 +const static uint64_t SH_FLD_RESERVED_FOR_ERRS = 12840; // 1 +const static uint64_t SH_FLD_RESERVED_FOR_ERRS_LEN = 12841; // 1 +const static uint64_t SH_FLD_RESERVED_ID_55C = 12842; // 43 +const static uint64_t SH_FLD_RESERVED_ID_61C = 12843; // 43 +const static uint64_t SH_FLD_RESERVED_ID_62C = 12844; // 43 +const static uint64_t SH_FLD_RESERVED_ID_63C = 12845; // 43 +const static uint64_t SH_FLD_RESERVED_LEN = 12846; // 65 +const static uint64_t SH_FLD_RESERVED_TEST_CONTROL_35C = 12847; // 43 +const static uint64_t SH_FLD_RESERVED_TEST_CONTROL_36C = 12848; // 43 +const static uint64_t SH_FLD_RESERVED_TEST_CONTROL_37C = 12849; // 43 +const static uint64_t SH_FLD_RESERVED_TEST_CONTROL_38C = 12850; // 43 +const static uint64_t SH_FLD_RESERVED_TEST_CONTROL_39C = 12851; // 43 +const static uint64_t SH_FLD_RESERVE_11 = 12852; // 2 +const static uint64_t SH_FLD_RESERVE_39_52 = 12853; // 2 +const static uint64_t SH_FLD_RESERVE_39_52_LEN = 12854; // 2 +const static uint64_t SH_FLD_RESERVE_5_63 = 12855; // 2 +const static uint64_t SH_FLD_RESERVE_5_63_LEN = 12856; // 2 +const static uint64_t SH_FLD_RESET = 12857; // 28 +const static uint64_t SH_FLD_RESETMODE = 12858; // 3 +const static uint64_t SH_FLD_RESET_0_7 = 12859; // 1 +const static uint64_t SH_FLD_RESET_0_7_LEN = 12860; // 1 +const static uint64_t SH_FLD_RESET_EP = 12861; // 43 +const static uint64_t SH_FLD_RESET_ERROR_LOGS = 12862; // 2 +const static uint64_t SH_FLD_RESET_ERR_RPT = 12863; // 8 +const static uint64_t SH_FLD_RESET_IMPRECISE_QERR = 12864; // 12 +const static uint64_t SH_FLD_RESET_KEEPER = 12865; // 26 +const static uint64_t SH_FLD_RESET_LEN = 12866; // 2 +const static uint64_t SH_FLD_RESET_ON_PARITY = 12867; // 1 +const static uint64_t SH_FLD_RESET_PIB = 12868; // 1 +const static uint64_t SH_FLD_RESET_RECOVER = 12869; // 8 +const static uint64_t SH_FLD_RESET_TOD_STATE = 12870; // 1 +const static uint64_t SH_FLD_RESET_TRAP_CNFG = 12871; // 2 +const static uint64_t SH_FLD_RESET_TRIG_SEL = 12872; // 43 +const static uint64_t SH_FLD_RESET_TRIG_SEL_LEN = 12873; // 43 +const static uint64_t SH_FLD_RESET_ZCAL = 12874; // 8 +const static uint64_t SH_FLD_RESID_FE_LEN_0 = 12875; // 1 +const static uint64_t SH_FLD_RESID_FE_LEN_0_LEN = 12876; // 1 +const static uint64_t SH_FLD_RESID_FE_LEN_1 = 12877; // 1 +const static uint64_t SH_FLD_RESID_FE_LEN_1_LEN = 12878; // 1 +const static uint64_t SH_FLD_RESID_FE_LEN_2 = 12879; // 1 +const static uint64_t SH_FLD_RESID_FE_LEN_2_LEN = 12880; // 1 +const static uint64_t SH_FLD_RESID_FE_LEN_3 = 12881; // 1 +const static uint64_t SH_FLD_RESID_FE_LEN_3_LEN = 12882; // 1 +const static uint64_t SH_FLD_RESPONSE = 12883; // 1 +const static uint64_t SH_FLD_RESP_PKT_RCV = 12884; // 2 +const static uint64_t SH_FLD_RESSEL = 12885; // 4 +const static uint64_t SH_FLD_RESULT = 12886; // 1 +const static uint64_t SH_FLD_RESULT_AVAILABLE = 12887; // 2 +const static uint64_t SH_FLD_RESULT_LEN = 12888; // 1 +const static uint64_t SH_FLD_RESUME_FROM_PAUSE = 12889; // 2 +const static uint64_t SH_FLD_RETRAIN_PERCAL_SW = 12890; // 8 +const static uint64_t SH_FLD_RETRY_LPC_LFSR_SELECT = 12891; // 4 +const static uint64_t SH_FLD_RETRY_LPC_LFSR_SELECT_LEN = 12892; // 4 +const static uint64_t SH_FLD_RETRY_VALUE = 12893; // 1 +const static uint64_t SH_FLD_RETRY_VALUE_LEN = 12894; // 1 +const static uint64_t SH_FLD_RETURNQ_ERR = 12895; // 4 +const static uint64_t SH_FLD_RG_CERR_BITS = 12896; // 1 +const static uint64_t SH_FLD_RG_CERR_BITS_LEN = 12897; // 1 +const static uint64_t SH_FLD_RG_CERR_RESET = 12898; // 1 +const static uint64_t SH_FLD_RG_ECC_CE_ERROR = 12899; // 2 +const static uint64_t SH_FLD_RG_ECC_SUE_ERROR = 12900; // 2 +const static uint64_t SH_FLD_RG_ECC_UE_ERROR = 12901; // 2 +const static uint64_t SH_FLD_RG_LOGIC_HW_ERROR = 12902; // 2 +const static uint64_t SH_FLD_RG_TRACE_GROUP_SEL_HI = 12903; // 1 +const static uint64_t SH_FLD_RG_TRACE_GROUP_SEL_HI_LEN = 12904; // 1 +const static uint64_t SH_FLD_RG_TRACE_GROUP_SEL_LO = 12905; // 1 +const static uint64_t SH_FLD_RG_TRACE_GROUP_SEL_LO_LEN = 12906; // 1 +const static uint64_t SH_FLD_RG_TRACE_TRIGGER_SEL_01 = 12907; // 1 +const static uint64_t SH_FLD_RG_TRACE_TRIGGER_SEL_01_LEN = 12908; // 1 +const static uint64_t SH_FLD_RG_TRACE_TRIGGER_SEL_23 = 12909; // 1 +const static uint64_t SH_FLD_RG_TRACE_TRIGGER_SEL_23_LEN = 12910; // 1 +const static uint64_t SH_FLD_RIC = 12911; // 8 +const static uint64_t SH_FLD_RIC_LEN = 12912; // 8 +const static uint64_t SH_FLD_RI_N = 12913; // 43 +const static uint64_t SH_FLD_RMA_BAR = 12914; // 1 +const static uint64_t SH_FLD_RMA_BAR_LEN = 12915; // 1 +const static uint64_t SH_FLD_RMA_BAR_MASK = 12916; // 1 +const static uint64_t SH_FLD_RMA_BAR_MASK_LEN = 12917; // 1 +const static uint64_t SH_FLD_RND_BACKOFF_ENABLE = 12918; // 2 +const static uint64_t SH_FLD_RNG0_BIST_FAIL = 12919; // 1 +const static uint64_t SH_FLD_RNG0_FAIL = 12920; // 1 +const static uint64_t SH_FLD_RNG0_INJ_CONTINOUS_ERROR = 12921; // 1 +const static uint64_t SH_FLD_RNG1_BIST_FAIL = 12922; // 1 +const static uint64_t SH_FLD_RNG1_FAIL = 12923; // 1 +const static uint64_t SH_FLD_RNG1_INJ_CONTINOUS_ERROR = 12924; // 1 +const static uint64_t SH_FLD_RNG_CNTRL_LOGIC_ERR = 12925; // 1 +const static uint64_t SH_FLD_RNG_FIRST_FAIL = 12926; // 1 +const static uint64_t SH_FLD_RNG_SECOND_FAIL = 12927; // 1 +const static uint64_t SH_FLD_RNW = 12928; // 15 +const static uint64_t SH_FLD_RPT = 12929; // 2 +const static uint64_t SH_FLD_RPT1 = 12930; // 1 +const static uint64_t SH_FLD_RPT1_LEN = 12931; // 1 +const static uint64_t SH_FLD_RPT_LEN = 12932; // 2 +const static uint64_t SH_FLD_RRDM_DLY = 12933; // 8 +const static uint64_t SH_FLD_RRDM_DLY_LEN = 12934; // 8 +const static uint64_t SH_FLD_RRN_BYPASS_ENABLE = 12935; // 1 +const static uint64_t SH_FLD_RRN_DATA = 12936; // 1 +const static uint64_t SH_FLD_RRN_DATA_LEN = 12937; // 1 +const static uint64_t SH_FLD_RROP_DLY = 12938; // 8 +const static uint64_t SH_FLD_RROP_DLY_LEN = 12939; // 8 +const static uint64_t SH_FLD_RRQ_CAPACITY_LIMIT = 12940; // 4 +const static uint64_t SH_FLD_RRQ_CAPACITY_LIMIT_LEN = 12941; // 4 +const static uint64_t SH_FLD_RRQ_HANG = 12942; // 8 +const static uint64_t SH_FLD_RRQ_PE = 12943; // 8 +const static uint64_t SH_FLD_RRSBG_DLY = 12944; // 8 +const static uint64_t SH_FLD_RRSBG_DLY_LEN = 12945; // 8 +const static uint64_t SH_FLD_RRSMDR_DLY = 12946; // 8 +const static uint64_t SH_FLD_RRSMDR_DLY_LEN = 12947; // 8 +const static uint64_t SH_FLD_RRSMSR_DLY = 12948; // 8 +const static uint64_t SH_FLD_RRSMSR_DLY_LEN = 12949; // 8 +const static uint64_t SH_FLD_RSD_CRD_AT_MACRO = 12950; // 1 +const static uint64_t SH_FLD_RSD_CRD_AT_MACRO_LEN = 12951; // 1 +const static uint64_t SH_FLD_RSD_CRD_DMA_READ = 12952; // 1 +const static uint64_t SH_FLD_RSD_CRD_DMA_READ_LEN = 12953; // 1 +const static uint64_t SH_FLD_RSD_CRD_DMA_WRITE = 12954; // 1 +const static uint64_t SH_FLD_RSD_CRD_DMA_WRITE_LEN = 12955; // 1 +const static uint64_t SH_FLD_RSD_CRD_EQC_DOING_CI_LOAD = 12956; // 1 +const static uint64_t SH_FLD_RSD_CRD_EQC_DOING_CI_LOAD_LEN = 12957; // 1 +const static uint64_t SH_FLD_RSD_CRD_EQ_POST = 12958; // 1 +const static uint64_t SH_FLD_RSD_CRD_EQ_POST_LEN = 12959; // 1 +const static uint64_t SH_FLD_RSD_CRD_TRIG_FWD_1 = 12960; // 1 +const static uint64_t SH_FLD_RSD_CRD_TRIG_FWD_1_LEN = 12961; // 1 +const static uint64_t SH_FLD_RSD_CRD_TRIG_FWD_2 = 12962; // 1 +const static uint64_t SH_FLD_RSD_CRD_TRIG_FWD_2_LEN = 12963; // 1 +const static uint64_t SH_FLD_RSEL = 12964; // 10 +const static uint64_t SH_FLD_RSEL_LEN = 12965; // 10 +const static uint64_t SH_FLD_RSPOUT_CE_ESR = 12966; // 1 +const static uint64_t SH_FLD_RSPOUT_UE_ESR = 12967; // 1 +const static uint64_t SH_FLD_RSP_AE_ALWAYS = 12968; // 6 +const static uint64_t SH_FLD_RSP_CTL_CRED_SINGLE_ENA = 12969; // 6 +const static uint64_t SH_FLD_RSV17 = 12970; // 2 +const static uint64_t SH_FLD_RSV18 = 12971; // 2 +const static uint64_t SH_FLD_RSV19 = 12972; // 2 +const static uint64_t SH_FLD_RSV26 = 12973; // 2 +const static uint64_t SH_FLD_RSV27 = 12974; // 2 +const static uint64_t SH_FLD_RSV34 = 12975; // 2 +const static uint64_t SH_FLD_RSV35 = 12976; // 2 +const static uint64_t SH_FLD_RSV6 = 12977; // 2 +const static uint64_t SH_FLD_RSV7 = 12978; // 2 +const static uint64_t SH_FLD_RSVD = 12979; // 1 +const static uint64_t SH_FLD_RSVD0 = 12980; // 1 +const static uint64_t SH_FLD_RTAGFLUSH_FAILED = 12981; // 2 +const static uint64_t SH_FLD_RTAG_PARITY = 12982; // 1 +const static uint64_t SH_FLD_RTAG_PERR = 12983; // 1 +const static uint64_t SH_FLD_RTIM_THOLD_FORCE = 12984; // 43 +const static uint64_t SH_FLD_RTY_COUNT = 12985; // 2 +const static uint64_t SH_FLD_RTY_COUNT_LEN = 12986; // 2 +const static uint64_t SH_FLD_RUNNING = 12987; // 2 +const static uint64_t SH_FLD_RUNN_MODE = 12988; // 43 +const static uint64_t SH_FLD_RUN_CHIPLET_SCAN0 = 12989; // 43 +const static uint64_t SH_FLD_RUN_CHIPLET_SCAN0_NO_PLL = 12990; // 43 +const static uint64_t SH_FLD_RUN_DCCAL = 12991; // 48 +const static uint64_t SH_FLD_RUN_DYN_RECAL_TIMER = 12992; // 4 +const static uint64_t SH_FLD_RUN_LANE = 12993; // 48 +const static uint64_t SH_FLD_RUN_LANE_DL_MASK = 12994; // 2 +const static uint64_t SH_FLD_RUN_ON_CAPTURE_DR = 12995; // 43 +const static uint64_t SH_FLD_RUN_ON_UPDATE_DR = 12996; // 43 +const static uint64_t SH_FLD_RUN_SCAN0 = 12997; // 43 +const static uint64_t SH_FLD_RUN_STATE_MASK = 12998; // 43 +const static uint64_t SH_FLD_RUN_STOP_HYP = 12999; // 30 +const static uint64_t SH_FLD_RUN_STOP_OCC = 13000; // 30 +const static uint64_t SH_FLD_RUN_STOP_OTR = 13001; // 30 +const static uint64_t SH_FLD_RUN_TCK = 13002; // 1 +const static uint64_t SH_FLD_RUN_TCK_EQ0_ERR = 13003; // 1 +const static uint64_t SH_FLD_RWDM_DLY = 13004; // 8 +const static uint64_t SH_FLD_RWDM_DLY_LEN = 13005; // 8 +const static uint64_t SH_FLD_RWSMDR_DLY = 13006; // 8 +const static uint64_t SH_FLD_RWSMDR_DLY_LEN = 13007; // 8 +const static uint64_t SH_FLD_RWSMSR_DLY = 13008; // 8 +const static uint64_t SH_FLD_RWSMSR_DLY_LEN = 13009; // 8 +const static uint64_t SH_FLD_RXAERR = 13010; // 6 +const static uint64_t SH_FLD_RXBERR = 13011; // 6 +const static uint64_t SH_FLD_RXCAL = 13012; // 116 +const static uint64_t SH_FLD_RXCERR = 13013; // 6 +const static uint64_t SH_FLD_RXDERR = 13014; // 6 +const static uint64_t SH_FLD_RXEERR = 13015; // 6 +const static uint64_t SH_FLD_RXFERR = 13016; // 6 +const static uint64_t SH_FLD_RXGERR = 13017; // 6 +const static uint64_t SH_FLD_RXHERR = 13018; // 6 +const static uint64_t SH_FLD_RXIERR = 13019; // 6 +const static uint64_t SH_FLD_RXJERR = 13020; // 6 +const static uint64_t SH_FLD_RXKERR = 13021; // 6 +const static uint64_t SH_FLD_RXLERR = 13022; // 6 +const static uint64_t SH_FLD_RXMERR = 13023; // 6 +const static uint64_t SH_FLD_RXNERR = 13024; // 6 +const static uint64_t SH_FLD_RXOERR = 13025; // 6 +const static uint64_t SH_FLD_RXPERR = 13026; // 6 +const static uint64_t SH_FLD_RX_BUS_WIDTH = 13027; // 4 +const static uint64_t SH_FLD_RX_BUS_WIDTH_LEN = 13028; // 4 +const static uint64_t SH_FLD_RX_PCB_DATA_P = 13029; // 1 +const static uint64_t SH_FLD_RX_PCB_DATA_P_ERR = 13030; // 1 +const static uint64_t SH_FLD_RX_SELECT = 13031; // 4 +const static uint64_t SH_FLD_RX_SELECT_LEN = 13032; // 4 +const static uint64_t SH_FLD_RX_TTYPE_0 = 13033; // 4 +const static uint64_t SH_FLD_RX_TTYPE_1 = 13034; // 4 +const static uint64_t SH_FLD_RX_TTYPE_1_ON_STEP_ENABLE = 13035; // 1 +const static uint64_t SH_FLD_RX_TTYPE_2 = 13036; // 4 +const static uint64_t SH_FLD_RX_TTYPE_3 = 13037; // 4 +const static uint64_t SH_FLD_RX_TTYPE_4 = 13038; // 4 +const static uint64_t SH_FLD_RX_TTYPE_4_DATA_PARITY = 13039; // 4 +const static uint64_t SH_FLD_RX_TTYPE_5 = 13040; // 4 +const static uint64_t SH_FLD_RX_TTYPE_INVALID = 13041; // 4 +const static uint64_t SH_FLD_S0_BIT_MAP = 13042; // 8 +const static uint64_t SH_FLD_S0_BIT_MAP_LEN = 13043; // 8 +const static uint64_t SH_FLD_S1_BIT_MAP = 13044; // 8 +const static uint64_t SH_FLD_S1_BIT_MAP_LEN = 13045; // 8 +const static uint64_t SH_FLD_S2_BIT_MAP = 13046; // 8 +const static uint64_t SH_FLD_S2_BIT_MAP_LEN = 13047; // 8 +const static uint64_t SH_FLD_SAFE_REFRESH_MODE = 13048; // 8 +const static uint64_t SH_FLD_SAFE_REFRESH_MODE_CLR = 13049; // 8 +const static uint64_t SH_FLD_SAMPLED_SMD_PIN = 13050; // 1 +const static uint64_t SH_FLD_SAMPLE_GUTS = 13051; // 43 +const static uint64_t SH_FLD_SAMPLE_GUTS_LEN = 13052; // 43 +const static uint64_t SH_FLD_SAMPLE_PULSE_CNT = 13053; // 43 +const static uint64_t SH_FLD_SAMPLE_PULSE_CNT_LEN = 13054; // 43 +const static uint64_t SH_FLD_SAMPLE_VALID = 13055; // 12 +const static uint64_t SH_FLD_SAMPTEST_ENABLE = 13056; // 1 +const static uint64_t SH_FLD_SAMPTEST_MATCH_TH_MAX = 13057; // 1 +const static uint64_t SH_FLD_SAMPTEST_MATCH_TH_MAX_LEN = 13058; // 1 +const static uint64_t SH_FLD_SAMPTEST_MATCH_TH_MIN = 13059; // 1 +const static uint64_t SH_FLD_SAMPTEST_MATCH_TH_MIN_LEN = 13060; // 1 +const static uint64_t SH_FLD_SAMPTEST_RRN_ENABLE = 13061; // 1 +const static uint64_t SH_FLD_SAMPTEST_WINDOW_SIZE = 13062; // 1 +const static uint64_t SH_FLD_SAMPTEST_WINDOW_SIZE_LEN = 13063; // 1 +const static uint64_t SH_FLD_SBASE = 13064; // 12 +const static uint64_t SH_FLD_SBASE_LEN = 13065; // 12 +const static uint64_t SH_FLD_SBC_DMA = 13066; // 1 +const static uint64_t SH_FLD_SBC_DMA_LEN = 13067; // 1 +const static uint64_t SH_FLD_SBC_EOI = 13068; // 1 +const static uint64_t SH_FLD_SBC_EOI_LEN = 13069; // 1 +const static uint64_t SH_FLD_SBC_LOOKUP = 13070; // 1 +const static uint64_t SH_FLD_SBC_LOOKUP_LEN = 13071; // 1 +const static uint64_t SH_FLD_SBEFIFO_DATA = 13072; // 5 +const static uint64_t SH_FLD_SBEFIFO_RESET = 13073; // 5 +const static uint64_t SH_FLD_SB_STRENGTH = 13074; // 43 +const static uint64_t SH_FLD_SB_STRENGTH_LEN = 13075; // 43 +const static uint64_t SH_FLD_SCAN0_MODE = 13076; // 43 +const static uint64_t SH_FLD_SCAN_CLK_USE_EVEN = 13077; // 43 +const static uint64_t SH_FLD_SCAN_COUNT = 13078; // 43 +const static uint64_t SH_FLD_SCAN_COUNT_LEN = 13079; // 43 +const static uint64_t SH_FLD_SCAN_INIT_VERSION_PARITY_MASK = 13080; // 43 +const static uint64_t SH_FLD_SCAN_RATIO = 13081; // 43 +const static uint64_t SH_FLD_SCAN_RATIO_LEN = 13082; // 43 +const static uint64_t SH_FLD_SCOM1_SAT_ERR = 13083; // 2 +const static uint64_t SH_FLD_SCOM_CMD_REG_INJ = 13084; // 2 +const static uint64_t SH_FLD_SCOM_CMD_REG_INJ_MODE = 13085; // 2 +const static uint64_t SH_FLD_SCOM_ERR = 13086; // 6 +const static uint64_t SH_FLD_SCOM_ERR1 = 13087; // 48 +const static uint64_t SH_FLD_SCOM_ERR2 = 13088; // 52 +const static uint64_t SH_FLD_SCOM_ERROR = 13089; // 8 +const static uint64_t SH_FLD_SCOM_ERR_DUP = 13090; // 2 +const static uint64_t SH_FLD_SCOM_FATAL_REG_PE = 13091; // 10 +const static uint64_t SH_FLD_SCOM_FIR_HMI = 13092; // 96 +const static uint64_t SH_FLD_SCOM_LINK01_RESET_KEEPER = 13093; // 2 +const static uint64_t SH_FLD_SCOM_LINK23_RESET_KEEPER = 13094; // 2 +const static uint64_t SH_FLD_SCOM_LINK45_RESET_KEEPER = 13095; // 2 +const static uint64_t SH_FLD_SCOM_LINK67_RESET_KEEPER = 13096; // 1 +const static uint64_t SH_FLD_SCOM_MMIO_ADDR_ERR = 13097; // 2 +const static uint64_t SH_FLD_SCOM_PARITY_CLASS_RECOVERABLE = 13098; // 8 +const static uint64_t SH_FLD_SCOM_PARITY_CLASS_STATUS = 13099; // 8 +const static uint64_t SH_FLD_SCOM_PARITY_CLASS_UNRECOVERABLE = 13100; // 8 +const static uint64_t SH_FLD_SCOM_PARITY_ERR = 13101; // 3 +const static uint64_t SH_FLD_SCOM_PARITY_ERR2 = 13102; // 3 +const static uint64_t SH_FLD_SCOM_PE = 13103; // 3 +const static uint64_t SH_FLD_SCOM_PERFMON_START_COMMAND = 13104; // 4 +const static uint64_t SH_FLD_SCOM_PERFMON_STOP_COMMAND = 13105; // 4 +const static uint64_t SH_FLD_SCOM_PERR0 = 13106; // 6 +const static uint64_t SH_FLD_SCOM_PERR1 = 13107; // 6 +const static uint64_t SH_FLD_SCOM_PE_DUP = 13108; // 3 +const static uint64_t SH_FLD_SCOM_RECOVERABLE_REG_PE = 13109; // 10 +const static uint64_t SH_FLD_SCOPE_ATTN_BAR = 13110; // 1 +const static uint64_t SH_FLD_SCOPE_ATTN_BAR_LEN = 13111; // 1 +const static uint64_t SH_FLD_SCOPE_CONTROL = 13112; // 6 +const static uint64_t SH_FLD_SCOPE_CONTROL_LEN = 13113; // 6 +const static uint64_t SH_FLD_SCOPE_MODE = 13114; // 48 +const static uint64_t SH_FLD_SCOPE_MODE_LEN = 13115; // 48 +const static uint64_t SH_FLD_SCPTGT_LFSR_MODE = 13116; // 2 +const static uint64_t SH_FLD_SCPTGT_LFSR_MODE_LEN = 13117; // 2 +const static uint64_t SH_FLD_SCRATCH_ATOMIC_DATA = 13118; // 24 +const static uint64_t SH_FLD_SCRATCH_ATOMIC_DATA_LEN = 13119; // 24 +const static uint64_t SH_FLD_SCRATCH_N = 13120; // 4 +const static uint64_t SH_FLD_SCRATCH_N_LEN = 13121; // 4 +const static uint64_t SH_FLD_SEC = 13122; // 8 +const static uint64_t SH_FLD_SECURE_ACCESS = 13123; // 1 +const static uint64_t SH_FLD_SECURE_ACCESS_BIT = 13124; // 1 +const static uint64_t SH_FLD_SECURE_DEBUG = 13125; // 1 +const static uint64_t SH_FLD_SECURE_DEBUG_MODE = 13126; // 1 +const static uint64_t SH_FLD_SECURE_ERR = 13127; // 2 +const static uint64_t SH_FLD_SECURE_MODE = 13128; // 1 +const static uint64_t SH_FLD_SECURE_SCOM_ERROR = 13129; // 4 +const static uint64_t SH_FLD_SECURITY_DEBUG_MODE = 13130; // 43 +const static uint64_t SH_FLD_SEC_I_PATH_STEP_CHECK_ENABLE = 13131; // 1 +const static uint64_t SH_FLD_SEC_LEN = 13132; // 8 +const static uint64_t SH_FLD_SEC_M_PATH_0_STEP_CHECK_ENABLE = 13133; // 1 +const static uint64_t SH_FLD_SEC_M_PATH_1_STEP_CHECK_ENABLE = 13134; // 1 +const static uint64_t SH_FLD_SEC_M_PATH_SELECT = 13135; // 2 +const static uint64_t SH_FLD_SEC_M_S_DRAWER_SELECT = 13136; // 2 +const static uint64_t SH_FLD_SEC_M_S_SELECT = 13137; // 2 +const static uint64_t SH_FLD_SEC_SELECT = 13138; // 1 +const static uint64_t SH_FLD_SEC_S_PATH_0_STEP_CHECK_ENABLE = 13139; // 1 +const static uint64_t SH_FLD_SEC_S_PATH_1_STEP_CHECK_ENABLE = 13140; // 1 +const static uint64_t SH_FLD_SEC_S_PATH_SELECT = 13141; // 1 +const static uint64_t SH_FLD_SEC_V = 13142; // 8 +const static uint64_t SH_FLD_SEC_WBRD_DEBUG_0_SELECT = 13143; // 8 +const static uint64_t SH_FLD_SEC_WBRD_DEBUG_1_SELECT = 13144; // 8 +const static uint64_t SH_FLD_SEEPROM_UPDATE_LOCK = 13145; // 1 +const static uint64_t SH_FLD_SEG_TEST_CLK_STATUS = 13146; // 4 +const static uint64_t SH_FLD_SEG_TEST_CLK_STATUS_LEN = 13147; // 4 +const static uint64_t SH_FLD_SEG_TEST_LEAKAGE_CTRL = 13148; // 6 +const static uint64_t SH_FLD_SEG_TEST_MODE = 13149; // 6 +const static uint64_t SH_FLD_SEG_TEST_MODE_LEN = 13150; // 6 +const static uint64_t SH_FLD_SEG_TEST_STATUS = 13151; // 116 +const static uint64_t SH_FLD_SEG_TEST_STATUS_LEN = 13152; // 116 +const static uint64_t SH_FLD_SEIDBAR = 13153; // 1 +const static uint64_t SH_FLD_SEIDBAR_LEN = 13154; // 1 +const static uint64_t SH_FLD_SEL = 13155; // 10 +const static uint64_t SH_FLD_SEL0 = 13156; // 1 +const static uint64_t SH_FLD_SEL0_LEN = 13157; // 1 +const static uint64_t SH_FLD_SEL1 = 13158; // 1 +const static uint64_t SH_FLD_SEL1_LEN = 13159; // 1 +const static uint64_t SH_FLD_SELD2SPR = 13160; // 10 +const static uint64_t SH_FLD_SELECT = 13161; // 2 +const static uint64_t SH_FLD_SELECT_LEN = 13162; // 2 +const static uint64_t SH_FLD_SELECT_REGISTER_FSP2PIB = 13163; // 1 +const static uint64_t SH_FLD_SELECT_REGISTER_FSP2PIB_LEN = 13164; // 1 +const static uint64_t SH_FLD_SELFBOOT_DONE = 13165; // 1 +const static uint64_t SH_FLD_SELFBOOT_ENGINE_ATTENTION = 13166; // 1 +const static uint64_t SH_FLD_SELF_BUSY_0 = 13167; // 2 +const static uint64_t SH_FLD_SELF_BUSY_1 = 13168; // 2 +const static uint64_t SH_FLD_SELF_BUSY_2 = 13169; // 2 +const static uint64_t SH_FLD_SELF_BUSY_3 = 13170; // 2 +const static uint64_t SH_FLD_SELPFDPW = 13171; // 10 +const static uint64_t SH_FLD_SELPREFB = 13172; // 10 +const static uint64_t SH_FLD_SELPRESPE = 13173; // 10 +const static uint64_t SH_FLD_SEL_03_NPU_NOT = 13174; // 1 +const static uint64_t SH_FLD_SEL_04_NPU_NOT = 13175; // 1 +const static uint64_t SH_FLD_SEL_05_NPU_NOT = 13176; // 1 +const static uint64_t SH_FLD_SEL_0_2 = 13177; // 16 +const static uint64_t SH_FLD_SEL_0_2_LEN = 13178; // 16 +const static uint64_t SH_FLD_SEL_1_3 = 13179; // 16 +const static uint64_t SH_FLD_SEL_1_3_LEN = 13180; // 16 +const static uint64_t SH_FLD_SEL_LEN = 13181; // 10 +const static uint64_t SH_FLD_SEL_RG_PMU_DATA_HI = 13182; // 1 +const static uint64_t SH_FLD_SEL_RG_PMU_DATA_HI_LEN = 13183; // 1 +const static uint64_t SH_FLD_SEL_RG_PMU_DATA_LO = 13184; // 1 +const static uint64_t SH_FLD_SEL_RG_PMU_DATA_LO_LEN = 13185; // 1 +const static uint64_t SH_FLD_SEL_RG_TRACE_DATA_HI = 13186; // 1 +const static uint64_t SH_FLD_SEL_RG_TRACE_DATA_HI_LEN = 13187; // 1 +const static uint64_t SH_FLD_SEL_RG_TRACE_DATA_LO = 13188; // 1 +const static uint64_t SH_FLD_SEL_RG_TRACE_DATA_LO_LEN = 13189; // 1 +const static uint64_t SH_FLD_SEL_RG_TRIGGERS_01 = 13190; // 1 +const static uint64_t SH_FLD_SEL_RG_TRIGGERS_01_LEN = 13191; // 1 +const static uint64_t SH_FLD_SEL_RG_TRIGGERS_23 = 13192; // 1 +const static uint64_t SH_FLD_SEL_RG_TRIGGERS_23_LEN = 13193; // 1 +const static uint64_t SH_FLD_SEL_THOLD_ARY = 13194; // 43 +const static uint64_t SH_FLD_SEL_THOLD_NSL = 13195; // 43 +const static uint64_t SH_FLD_SEL_THOLD_SL = 13196; // 43 +const static uint64_t SH_FLD_SEL_TYPE_0_2 = 13197; // 16 +const static uint64_t SH_FLD_SEL_TYPE_1_3 = 13198; // 16 +const static uint64_t SH_FLD_SEND_DELAY_CYCLES = 13199; // 2 +const static uint64_t SH_FLD_SEND_DELAY_CYCLES_LEN = 13200; // 2 +const static uint64_t SH_FLD_SEND_PACKET_TIMER_VALUE = 13201; // 2 +const static uint64_t SH_FLD_SEND_PACKET_TIMER_VALUE_LEN = 13202; // 2 +const static uint64_t SH_FLD_SEQ = 13203; // 8 +const static uint64_t SH_FLD_SEQ_01 = 13204; // 43 +const static uint64_t SH_FLD_SEQ_01_LEN = 13205; // 43 +const static uint64_t SH_FLD_SEQ_02 = 13206; // 43 +const static uint64_t SH_FLD_SEQ_02_LEN = 13207; // 43 +const static uint64_t SH_FLD_SEQ_03 = 13208; // 43 +const static uint64_t SH_FLD_SEQ_03_LEN = 13209; // 43 +const static uint64_t SH_FLD_SEQ_04 = 13210; // 43 +const static uint64_t SH_FLD_SEQ_04_LEN = 13211; // 43 +const static uint64_t SH_FLD_SEQ_05 = 13212; // 43 +const static uint64_t SH_FLD_SEQ_05_LEN = 13213; // 43 +const static uint64_t SH_FLD_SEQ_06 = 13214; // 43 +const static uint64_t SH_FLD_SEQ_06_LEN = 13215; // 43 +const static uint64_t SH_FLD_SEQ_07 = 13216; // 43 +const static uint64_t SH_FLD_SEQ_07EVEN = 13217; // 43 +const static uint64_t SH_FLD_SEQ_07EVEN_LEN = 13218; // 43 +const static uint64_t SH_FLD_SEQ_07ODD = 13219; // 43 +const static uint64_t SH_FLD_SEQ_07ODD_LEN = 13220; // 43 +const static uint64_t SH_FLD_SEQ_07_LEN = 13221; // 43 +const static uint64_t SH_FLD_SEQ_08 = 13222; // 43 +const static uint64_t SH_FLD_SEQ_08EVEN = 13223; // 43 +const static uint64_t SH_FLD_SEQ_08EVEN_LEN = 13224; // 43 +const static uint64_t SH_FLD_SEQ_08ODD = 13225; // 43 +const static uint64_t SH_FLD_SEQ_08ODD_LEN = 13226; // 43 +const static uint64_t SH_FLD_SEQ_08_LEN = 13227; // 43 +const static uint64_t SH_FLD_SEQ_09 = 13228; // 43 +const static uint64_t SH_FLD_SEQ_09EVEN = 13229; // 43 +const static uint64_t SH_FLD_SEQ_09EVEN_LEN = 13230; // 43 +const static uint64_t SH_FLD_SEQ_09ODD = 13231; // 43 +const static uint64_t SH_FLD_SEQ_09ODD_LEN = 13232; // 43 +const static uint64_t SH_FLD_SEQ_09_LEN = 13233; // 43 +const static uint64_t SH_FLD_SEQ_10 = 13234; // 43 +const static uint64_t SH_FLD_SEQ_10EVEN = 13235; // 43 +const static uint64_t SH_FLD_SEQ_10EVEN_LEN = 13236; // 43 +const static uint64_t SH_FLD_SEQ_10ODD = 13237; // 43 +const static uint64_t SH_FLD_SEQ_10ODD_LEN = 13238; // 43 +const static uint64_t SH_FLD_SEQ_10_LEN = 13239; // 43 +const static uint64_t SH_FLD_SEQ_11 = 13240; // 43 +const static uint64_t SH_FLD_SEQ_11EVEN = 13241; // 43 +const static uint64_t SH_FLD_SEQ_11EVEN_LEN = 13242; // 43 +const static uint64_t SH_FLD_SEQ_11ODD = 13243; // 43 +const static uint64_t SH_FLD_SEQ_11ODD_LEN = 13244; // 43 +const static uint64_t SH_FLD_SEQ_11_LEN = 13245; // 43 +const static uint64_t SH_FLD_SEQ_12 = 13246; // 43 +const static uint64_t SH_FLD_SEQ_12EVEN = 13247; // 43 +const static uint64_t SH_FLD_SEQ_12EVEN_LEN = 13248; // 43 +const static uint64_t SH_FLD_SEQ_12ODD = 13249; // 43 +const static uint64_t SH_FLD_SEQ_12ODD_LEN = 13250; // 43 +const static uint64_t SH_FLD_SEQ_12_LEN = 13251; // 43 +const static uint64_t SH_FLD_SEQ_13_01EVEN = 13252; // 43 +const static uint64_t SH_FLD_SEQ_13_01EVEN_LEN = 13253; // 43 +const static uint64_t SH_FLD_SEQ_14_01ODD = 13254; // 43 +const static uint64_t SH_FLD_SEQ_14_01ODD_LEN = 13255; // 43 +const static uint64_t SH_FLD_SEQ_15_02EVEN = 13256; // 43 +const static uint64_t SH_FLD_SEQ_15_02EVEN_LEN = 13257; // 43 +const static uint64_t SH_FLD_SEQ_16_02ODD = 13258; // 43 +const static uint64_t SH_FLD_SEQ_16_02ODD_LEN = 13259; // 43 +const static uint64_t SH_FLD_SEQ_17_03EVEN = 13260; // 43 +const static uint64_t SH_FLD_SEQ_17_03EVEN_LEN = 13261; // 43 +const static uint64_t SH_FLD_SEQ_18_03ODD = 13262; // 43 +const static uint64_t SH_FLD_SEQ_18_03ODD_LEN = 13263; // 43 +const static uint64_t SH_FLD_SEQ_19_04EVEN = 13264; // 43 +const static uint64_t SH_FLD_SEQ_19_04EVEN_LEN = 13265; // 43 +const static uint64_t SH_FLD_SEQ_20_04ODD = 13266; // 43 +const static uint64_t SH_FLD_SEQ_20_04ODD_LEN = 13267; // 43 +const static uint64_t SH_FLD_SEQ_21_05EVEN = 13268; // 43 +const static uint64_t SH_FLD_SEQ_21_05EVEN_LEN = 13269; // 43 +const static uint64_t SH_FLD_SEQ_22_05ODD = 13270; // 43 +const static uint64_t SH_FLD_SEQ_22_05ODD_LEN = 13271; // 43 +const static uint64_t SH_FLD_SEQ_23_06EVEN = 13272; // 43 +const static uint64_t SH_FLD_SEQ_23_06EVEN_LEN = 13273; // 43 +const static uint64_t SH_FLD_SEQ_24_06ODD = 13274; // 43 +const static uint64_t SH_FLD_SEQ_24_06ODD_LEN = 13275; // 43 +const static uint64_t SH_FLD_SEQ_MASK = 13276; // 8 +const static uint64_t SH_FLD_SERIAL_SHIFTCNT_MODEREG_PARITY_MASK = 13277; // 43 +const static uint64_t SH_FLD_SERVO_CHG_CFG = 13278; // 6 +const static uint64_t SH_FLD_SERVO_CHG_CFG_LEN = 13279; // 6 +const static uint64_t SH_FLD_SERVO_DONE = 13280; // 6 +const static uint64_t SH_FLD_SERVO_OP = 13281; // 6 +const static uint64_t SH_FLD_SERVO_OP_LEN = 13282; // 6 +const static uint64_t SH_FLD_SERVO_RECAL_IP = 13283; // 4 +const static uint64_t SH_FLD_SERVO_RESULT = 13284; // 6 +const static uint64_t SH_FLD_SERVO_RESULT_LEN = 13285; // 6 +const static uint64_t SH_FLD_SERVO_THRESH1 = 13286; // 6 +const static uint64_t SH_FLD_SERVO_THRESH1_LEN = 13287; // 6 +const static uint64_t SH_FLD_SERVO_THRESH2 = 13288; // 6 +const static uint64_t SH_FLD_SERVO_THRESH2_LEN = 13289; // 6 +const static uint64_t SH_FLD_SET = 13290; // 6 +const static uint64_t SH_FLD_SET_CMDS = 13291; // 2 +const static uint64_t SH_FLD_SET_CMDS_EN = 13292; // 2 +const static uint64_t SH_FLD_SET_CMDS_LEN = 13293; // 2 +const static uint64_t SH_FLD_SET_ECC_INJECT_ERR = 13294; // 12 +const static uint64_t SH_FLD_SET_INDEX = 13295; // 2 +const static uint64_t SH_FLD_SET_INDEX_LEN = 13296; // 2 +const static uint64_t SH_FLD_SET_LEN = 13297; // 6 +const static uint64_t SH_FLD_SGB_BYTE_VALID = 13298; // 21 +const static uint64_t SH_FLD_SGB_BYTE_VALID_LEN = 13299; // 21 +const static uint64_t SH_FLD_SGB_FLUSH_PENDING = 13300; // 21 +const static uint64_t SH_FLD_SG_HIGH_DURING_FILL = 13301; // 43 +const static uint64_t SH_FLD_SHADOW_ANALOGTUNE = 13302; // 14 +const static uint64_t SH_FLD_SHADOW_ANALOGTUNE_LEN = 13303; // 14 +const static uint64_t SH_FLD_SHADOW_ATSTSEL = 13304; // 14 +const static uint64_t SH_FLD_SHADOW_ATSTSEL_LEN = 13305; // 14 +const static uint64_t SH_FLD_SHADOW_BANDSEL = 13306; // 14 +const static uint64_t SH_FLD_SHADOW_BANDSEL_LEN = 13307; // 14 +const static uint64_t SH_FLD_SHADOW_BGOFFSET = 13308; // 14 +const static uint64_t SH_FLD_SHADOW_BGOFFSET_LEN = 13309; // 14 +const static uint64_t SH_FLD_SHADOW_BYPASSN = 13310; // 10 +const static uint64_t SH_FLD_SHADOW_CALRECAL = 13311; // 10 +const static uint64_t SH_FLD_SHADOW_CALREQ = 13312; // 10 +const static uint64_t SH_FLD_SHADOW_CAPSEL = 13313; // 4 +const static uint64_t SH_FLD_SHADOW_CCALBANDSEL = 13314; // 10 +const static uint64_t SH_FLD_SHADOW_CCALBANDSEL_LEN = 13315; // 10 +const static uint64_t SH_FLD_SHADOW_CCALCOMP = 13316; // 10 +const static uint64_t SH_FLD_SHADOW_CCALCVHOLD = 13317; // 10 +const static uint64_t SH_FLD_SHADOW_CCALERR = 13318; // 10 +const static uint64_t SH_FLD_SHADOW_CCALFMAX = 13319; // 10 +const static uint64_t SH_FLD_SHADOW_CCALFMIN = 13320; // 10 +const static uint64_t SH_FLD_SHADOW_CCALLOAD = 13321; // 10 +const static uint64_t SH_FLD_SHADOW_CCALMETH = 13322; // 10 +const static uint64_t SH_FLD_SHADOW_CMLEN = 13323; // 10 +const static uint64_t SH_FLD_SHADOW_CPISEL = 13324; // 14 +const static uint64_t SH_FLD_SHADOW_CPISEL_LEN = 13325; // 14 +const static uint64_t SH_FLD_SHADOW_CSEL = 13326; // 10 +const static uint64_t SH_FLD_SHADOW_CSEL_LEN = 13327; // 10 +const static uint64_t SH_FLD_SHADOW_DIVSELB = 13328; // 10 +const static uint64_t SH_FLD_SHADOW_DIVSELB_LEN = 13329; // 10 +const static uint64_t SH_FLD_SHADOW_DIVSELFB = 13330; // 4 +const static uint64_t SH_FLD_SHADOW_DIVSELFB_LEN = 13331; // 4 +const static uint64_t SH_FLD_SHADOW_EN = 13332; // 10 +const static uint64_t SH_FLD_SHADOW_ENABLE = 13333; // 10 +const static uint64_t SH_FLD_SHADOW_FILTDIVSEL = 13334; // 3 +const static uint64_t SH_FLD_SHADOW_FILTDIVSEL_LEN = 13335; // 3 +const static uint64_t SH_FLD_SHADOW_FRAC1 = 13336; // 3 +const static uint64_t SH_FLD_SHADOW_FRAC1_LEN = 13337; // 3 +const static uint64_t SH_FLD_SHADOW_FRAC2 = 13338; // 3 +const static uint64_t SH_FLD_SHADOW_FRAC2_LEN = 13339; // 3 +const static uint64_t SH_FLD_SHADOW_ITUNE = 13340; // 4 +const static uint64_t SH_FLD_SHADOW_ITUNE_LEN = 13341; // 4 +const static uint64_t SH_FLD_SHADOW_LOCK = 13342; // 10 +const static uint64_t SH_FLD_SHADOW_MUXEN = 13343; // 4 +const static uint64_t SH_FLD_SHADOW_MUXSEL = 13344; // 4 +const static uint64_t SH_FLD_SHADOW_MUXSEL_LEN = 13345; // 4 +const static uint64_t SH_FLD_SHADOW_PCLKDIFSEL = 13346; // 10 +const static uint64_t SH_FLD_SHADOW_PCLKSEL = 13347; // 14 +const static uint64_t SH_FLD_SHADOW_PCLKSEL_LEN = 13348; // 14 +const static uint64_t SH_FLD_SHADOW_PFD360SEL = 13349; // 4 +const static uint64_t SH_FLD_SHADOW_PHASEFB = 13350; // 4 +const static uint64_t SH_FLD_SHADOW_PHASEFB_LEN = 13351; // 4 +const static uint64_t SH_FLD_SHADOW_PLLLOCK = 13352; // 4 +const static uint64_t SH_FLD_SHADOW_RDIV = 13353; // 14 +const static uint64_t SH_FLD_SHADOW_RDIV_LEN = 13354; // 10 +const static uint64_t SH_FLD_SHADOW_REFCLKSEL = 13355; // 4 +const static uint64_t SH_FLD_SHADOW_RESET = 13356; // 10 +const static uint64_t SH_FLD_SHADOW_RESSEL = 13357; // 4 +const static uint64_t SH_FLD_SHADOW_RSEL = 13358; // 10 +const static uint64_t SH_FLD_SHADOW_RSEL_LEN = 13359; // 10 +const static uint64_t SH_FLD_SHADOW_SEL = 13360; // 10 +const static uint64_t SH_FLD_SHADOW_SELD2SPR = 13361; // 10 +const static uint64_t SH_FLD_SHADOW_SELPFDPW = 13362; // 10 +const static uint64_t SH_FLD_SHADOW_SELPREFB = 13363; // 10 +const static uint64_t SH_FLD_SHADOW_SELPRESPE = 13364; // 10 +const static uint64_t SH_FLD_SHADOW_SEL_LEN = 13365; // 10 +const static uint64_t SH_FLD_SHADOW_SPARE = 13366; // 7 +const static uint64_t SH_FLD_SHADOW_SPARE_LEN = 13367; // 3 +const static uint64_t SH_FLD_SHADOW_SPEDIV = 13368; // 10 +const static uint64_t SH_FLD_SHADOW_SPEDIV_LEN = 13369; // 10 +const static uint64_t SH_FLD_SHADOW_SSCGEN = 13370; // 3 +const static uint64_t SH_FLD_SHADOW_SYNCEN = 13371; // 7 +const static uint64_t SH_FLD_SHADOW_THREEPHAS = 13372; // 3 +const static uint64_t SH_FLD_SHADOW_UNUSED23_31 = 13373; // 7 +const static uint64_t SH_FLD_SHADOW_UNUSED23_31_LEN = 13374; // 7 +const static uint64_t SH_FLD_SHADOW_UNUSED4 = 13375; // 7 +const static uint64_t SH_FLD_SHADOW_UNUSED5 = 13376; // 7 +const static uint64_t SH_FLD_SHADOW_UNUSED63 = 13377; // 3 +const static uint64_t SH_FLD_SHADOW_UNUSED88 = 13378; // 3 +const static uint64_t SH_FLD_SHADOW_UNUSED88_LEN = 13379; // 3 +const static uint64_t SH_FLD_SHADOW_VCORANGE = 13380; // 10 +const static uint64_t SH_FLD_SHADOW_VCORANGE_LEN = 13381; // 10 +const static uint64_t SH_FLD_SHADOW_VCOSEL = 13382; // 10 +const static uint64_t SH_FLD_SHADOW_VREGBYPASS = 13383; // 4 +const static uint64_t SH_FLD_SHADOW_VREGENABLE_N = 13384; // 4 +const static uint64_t SH_FLD_SHADOW_VSEL = 13385; // 10 +const static uint64_t SH_FLD_SHADOW_VSEL_LEN = 13386; // 10 +const static uint64_t SH_FLD_SHA_LATENCY_CFG = 13387; // 1 +const static uint64_t SH_FLD_SHIFTER_PARITY_MASK = 13388; // 43 +const static uint64_t SH_FLD_SHIFTER_VALID_MASK = 13389; // 43 +const static uint64_t SH_FLD_SIGNATURE = 13390; // 1 +const static uint64_t SH_FLD_SIGNATURE_LEN = 13391; // 1 +const static uint64_t SH_FLD_SINGLE_BIT_MPR_RP0 = 13392; // 8 +const static uint64_t SH_FLD_SINGLE_BIT_MPR_RP1 = 13393; // 8 +const static uint64_t SH_FLD_SINGLE_BIT_MPR_RP2 = 13394; // 8 +const static uint64_t SH_FLD_SINGLE_BIT_MPR_RP3 = 13395; // 8 +const static uint64_t SH_FLD_SINGLE_OUTSTANDING_CMD = 13396; // 1 +const static uint64_t SH_FLD_SIR_CERR = 13397; // 8 +const static uint64_t SH_FLD_SIZE = 13398; // 33 +const static uint64_t SH_FLD_SIZE_LEN = 13399; // 33 +const static uint64_t SH_FLD_SKIP_G = 13400; // 3 +const static uint64_t SH_FLD_SKIP_INVALID_ADDR_DIMM_DIS = 13401; // 2 +const static uint64_t SH_FLD_SKITTER0 = 13402; // 43 +const static uint64_t SH_FLD_SKITTER0_LEN = 13403; // 43 +const static uint64_t SH_FLD_SKITTER_FORCEREG_PARITY_MASK = 13404; // 43 +const static uint64_t SH_FLD_SKITTER_MODEREG_PARITY_MASK = 13405; // 43 +const static uint64_t SH_FLD_SLAVE10_ERROR_CODE = 13406; // 1 +const static uint64_t SH_FLD_SLAVE10_ERROR_CODE_LEN = 13407; // 1 +const static uint64_t SH_FLD_SLAVE10_RESPONSE_BIT = 13408; // 1 +const static uint64_t SH_FLD_SLAVE11_ERROR_CODE = 13409; // 1 +const static uint64_t SH_FLD_SLAVE11_ERROR_CODE_LEN = 13410; // 1 +const static uint64_t SH_FLD_SLAVE11_RESPONSE_BIT = 13411; // 1 +const static uint64_t SH_FLD_SLAVE12_ERROR_CODE = 13412; // 1 +const static uint64_t SH_FLD_SLAVE12_ERROR_CODE_LEN = 13413; // 1 +const static uint64_t SH_FLD_SLAVE12_RESPONSE_BIT = 13414; // 1 +const static uint64_t SH_FLD_SLAVE13_ERROR_CODE = 13415; // 1 +const static uint64_t SH_FLD_SLAVE13_ERROR_CODE_LEN = 13416; // 1 +const static uint64_t SH_FLD_SLAVE13_RESPONSE_BIT = 13417; // 1 +const static uint64_t SH_FLD_SLAVE14_ERROR_CODE = 13418; // 1 +const static uint64_t SH_FLD_SLAVE14_ERROR_CODE_LEN = 13419; // 1 +const static uint64_t SH_FLD_SLAVE14_RESPONSE_BIT = 13420; // 1 +const static uint64_t SH_FLD_SLAVE15_ERROR_CODE = 13421; // 1 +const static uint64_t SH_FLD_SLAVE15_ERROR_CODE_LEN = 13422; // 1 +const static uint64_t SH_FLD_SLAVE15_RESPONSE_BIT = 13423; // 1 +const static uint64_t SH_FLD_SLAVE16_ERROR_CODE = 13424; // 1 +const static uint64_t SH_FLD_SLAVE16_ERROR_CODE_LEN = 13425; // 1 +const static uint64_t SH_FLD_SLAVE16_RESPONSE_BIT = 13426; // 1 +const static uint64_t SH_FLD_SLAVE17_ERROR_CODE = 13427; // 1 +const static uint64_t SH_FLD_SLAVE17_ERROR_CODE_LEN = 13428; // 1 +const static uint64_t SH_FLD_SLAVE17_RESPONSE_BIT = 13429; // 1 +const static uint64_t SH_FLD_SLAVE18_ERROR_CODE = 13430; // 1 +const static uint64_t SH_FLD_SLAVE18_ERROR_CODE_LEN = 13431; // 1 +const static uint64_t SH_FLD_SLAVE18_RESPONSE_BIT = 13432; // 1 +const static uint64_t SH_FLD_SLAVE19_ERROR_CODE = 13433; // 1 +const static uint64_t SH_FLD_SLAVE19_ERROR_CODE_LEN = 13434; // 1 +const static uint64_t SH_FLD_SLAVE19_RESPONSE_BIT = 13435; // 1 +const static uint64_t SH_FLD_SLAVE1_ERROR_CODE = 13436; // 1 +const static uint64_t SH_FLD_SLAVE1_ERROR_CODE_LEN = 13437; // 1 +const static uint64_t SH_FLD_SLAVE1_RESPONSE_BIT = 13438; // 1 +const static uint64_t SH_FLD_SLAVE20_ERROR_CODE = 13439; // 1 +const static uint64_t SH_FLD_SLAVE20_ERROR_CODE_LEN = 13440; // 1 +const static uint64_t SH_FLD_SLAVE20_RESPONSE_BIT = 13441; // 1 +const static uint64_t SH_FLD_SLAVE21_ERROR_CODE = 13442; // 1 +const static uint64_t SH_FLD_SLAVE21_ERROR_CODE_LEN = 13443; // 1 +const static uint64_t SH_FLD_SLAVE21_RESPONSE_BIT = 13444; // 1 +const static uint64_t SH_FLD_SLAVE22_ERROR_CODE = 13445; // 1 +const static uint64_t SH_FLD_SLAVE22_ERROR_CODE_LEN = 13446; // 1 +const static uint64_t SH_FLD_SLAVE22_RESPONSE_BIT = 13447; // 1 +const static uint64_t SH_FLD_SLAVE23_ERROR_CODE = 13448; // 1 +const static uint64_t SH_FLD_SLAVE23_ERROR_CODE_LEN = 13449; // 1 +const static uint64_t SH_FLD_SLAVE23_RESPONSE_BIT = 13450; // 1 +const static uint64_t SH_FLD_SLAVE24_ERROR_CODE = 13451; // 1 +const static uint64_t SH_FLD_SLAVE24_ERROR_CODE_LEN = 13452; // 1 +const static uint64_t SH_FLD_SLAVE24_RESPONSE_BIT = 13453; // 1 +const static uint64_t SH_FLD_SLAVE25_ERROR_CODE = 13454; // 1 +const static uint64_t SH_FLD_SLAVE25_ERROR_CODE_LEN = 13455; // 1 +const static uint64_t SH_FLD_SLAVE25_RESPONSE_BIT = 13456; // 1 +const static uint64_t SH_FLD_SLAVE26_ERROR_CODE = 13457; // 1 +const static uint64_t SH_FLD_SLAVE26_ERROR_CODE_LEN = 13458; // 1 +const static uint64_t SH_FLD_SLAVE26_RESPONSE_BIT = 13459; // 1 +const static uint64_t SH_FLD_SLAVE27_ERROR_CODE = 13460; // 1 +const static uint64_t SH_FLD_SLAVE27_ERROR_CODE_LEN = 13461; // 1 +const static uint64_t SH_FLD_SLAVE27_RESPONSE_BIT = 13462; // 1 +const static uint64_t SH_FLD_SLAVE28_ERROR_CODE = 13463; // 1 +const static uint64_t SH_FLD_SLAVE28_ERROR_CODE_LEN = 13464; // 1 +const static uint64_t SH_FLD_SLAVE28_RESPONSE_BIT = 13465; // 1 +const static uint64_t SH_FLD_SLAVE29_ERROR_CODE = 13466; // 1 +const static uint64_t SH_FLD_SLAVE29_ERROR_CODE_LEN = 13467; // 1 +const static uint64_t SH_FLD_SLAVE29_RESPONSE_BIT = 13468; // 1 +const static uint64_t SH_FLD_SLAVE2_ERROR_CODE = 13469; // 1 +const static uint64_t SH_FLD_SLAVE2_ERROR_CODE_LEN = 13470; // 1 +const static uint64_t SH_FLD_SLAVE2_RESPONSE_BIT = 13471; // 1 +const static uint64_t SH_FLD_SLAVE30_ERROR_CODE = 13472; // 1 +const static uint64_t SH_FLD_SLAVE30_ERROR_CODE_LEN = 13473; // 1 +const static uint64_t SH_FLD_SLAVE30_RESPONSE_BIT = 13474; // 1 +const static uint64_t SH_FLD_SLAVE31_ERROR_CODE = 13475; // 1 +const static uint64_t SH_FLD_SLAVE31_ERROR_CODE_LEN = 13476; // 1 +const static uint64_t SH_FLD_SLAVE31_RESPONSE_BIT = 13477; // 1 +const static uint64_t SH_FLD_SLAVE32_ERROR_CODE = 13478; // 1 +const static uint64_t SH_FLD_SLAVE32_ERROR_CODE_LEN = 13479; // 1 +const static uint64_t SH_FLD_SLAVE32_RESPONSE_BIT = 13480; // 1 +const static uint64_t SH_FLD_SLAVE33_ERROR_CODE = 13481; // 1 +const static uint64_t SH_FLD_SLAVE33_ERROR_CODE_LEN = 13482; // 1 +const static uint64_t SH_FLD_SLAVE33_RESPONSE_BIT = 13483; // 1 +const static uint64_t SH_FLD_SLAVE34_ERROR_CODE = 13484; // 1 +const static uint64_t SH_FLD_SLAVE34_ERROR_CODE_LEN = 13485; // 1 +const static uint64_t SH_FLD_SLAVE34_RESPONSE_BIT = 13486; // 1 +const static uint64_t SH_FLD_SLAVE35_ERROR_CODE = 13487; // 1 +const static uint64_t SH_FLD_SLAVE35_ERROR_CODE_LEN = 13488; // 1 +const static uint64_t SH_FLD_SLAVE35_RESPONSE_BIT = 13489; // 1 +const static uint64_t SH_FLD_SLAVE36_ERROR_CODE = 13490; // 1 +const static uint64_t SH_FLD_SLAVE36_ERROR_CODE_LEN = 13491; // 1 +const static uint64_t SH_FLD_SLAVE36_RESPONSE_BIT = 13492; // 1 +const static uint64_t SH_FLD_SLAVE37_ERROR_CODE = 13493; // 1 +const static uint64_t SH_FLD_SLAVE37_ERROR_CODE_LEN = 13494; // 1 +const static uint64_t SH_FLD_SLAVE37_RESPONSE_BIT = 13495; // 1 +const static uint64_t SH_FLD_SLAVE38_ERROR_CODE = 13496; // 1 +const static uint64_t SH_FLD_SLAVE38_ERROR_CODE_LEN = 13497; // 1 +const static uint64_t SH_FLD_SLAVE38_RESPONSE_BIT = 13498; // 1 +const static uint64_t SH_FLD_SLAVE39_ERROR_CODE = 13499; // 1 +const static uint64_t SH_FLD_SLAVE39_ERROR_CODE_LEN = 13500; // 1 +const static uint64_t SH_FLD_SLAVE39_RESPONSE_BIT = 13501; // 1 +const static uint64_t SH_FLD_SLAVE3_ERROR_CODE = 13502; // 1 +const static uint64_t SH_FLD_SLAVE3_ERROR_CODE_LEN = 13503; // 1 +const static uint64_t SH_FLD_SLAVE3_RESPONSE_BIT = 13504; // 1 +const static uint64_t SH_FLD_SLAVE40_ERROR_CODE = 13505; // 1 +const static uint64_t SH_FLD_SLAVE40_ERROR_CODE_LEN = 13506; // 1 +const static uint64_t SH_FLD_SLAVE40_RESPONSE_BIT = 13507; // 1 +const static uint64_t SH_FLD_SLAVE41_ERROR_CODE = 13508; // 1 +const static uint64_t SH_FLD_SLAVE41_ERROR_CODE_LEN = 13509; // 1 +const static uint64_t SH_FLD_SLAVE41_RESPONSE_BIT = 13510; // 1 +const static uint64_t SH_FLD_SLAVE42_ERROR_CODE = 13511; // 1 +const static uint64_t SH_FLD_SLAVE42_ERROR_CODE_LEN = 13512; // 1 +const static uint64_t SH_FLD_SLAVE42_RESPONSE_BIT = 13513; // 1 +const static uint64_t SH_FLD_SLAVE43_ERROR_CODE = 13514; // 1 +const static uint64_t SH_FLD_SLAVE43_ERROR_CODE_LEN = 13515; // 1 +const static uint64_t SH_FLD_SLAVE43_RESPONSE_BIT = 13516; // 1 +const static uint64_t SH_FLD_SLAVE44_ERROR_CODE = 13517; // 1 +const static uint64_t SH_FLD_SLAVE44_ERROR_CODE_LEN = 13518; // 1 +const static uint64_t SH_FLD_SLAVE44_RESPONSE_BIT = 13519; // 1 +const static uint64_t SH_FLD_SLAVE45_ERROR_CODE = 13520; // 1 +const static uint64_t SH_FLD_SLAVE45_ERROR_CODE_LEN = 13521; // 1 +const static uint64_t SH_FLD_SLAVE45_RESPONSE_BIT = 13522; // 1 +const static uint64_t SH_FLD_SLAVE46_ERROR_CODE = 13523; // 1 +const static uint64_t SH_FLD_SLAVE46_ERROR_CODE_LEN = 13524; // 1 +const static uint64_t SH_FLD_SLAVE46_RESPONSE_BIT = 13525; // 1 +const static uint64_t SH_FLD_SLAVE47_ERROR_CODE = 13526; // 1 +const static uint64_t SH_FLD_SLAVE47_ERROR_CODE_LEN = 13527; // 1 +const static uint64_t SH_FLD_SLAVE47_RESPONSE_BIT = 13528; // 1 +const static uint64_t SH_FLD_SLAVE48_ERROR_CODE = 13529; // 1 +const static uint64_t SH_FLD_SLAVE48_ERROR_CODE_LEN = 13530; // 1 +const static uint64_t SH_FLD_SLAVE48_RESPONSE_BIT = 13531; // 1 +const static uint64_t SH_FLD_SLAVE49_ERROR_CODE = 13532; // 1 +const static uint64_t SH_FLD_SLAVE49_ERROR_CODE_LEN = 13533; // 1 +const static uint64_t SH_FLD_SLAVE49_RESPONSE_BIT = 13534; // 1 +const static uint64_t SH_FLD_SLAVE4_ERROR_CODE = 13535; // 1 +const static uint64_t SH_FLD_SLAVE4_ERROR_CODE_LEN = 13536; // 1 +const static uint64_t SH_FLD_SLAVE4_RESPONSE_BIT = 13537; // 1 +const static uint64_t SH_FLD_SLAVE50_ERROR_CODE = 13538; // 1 +const static uint64_t SH_FLD_SLAVE50_ERROR_CODE_LEN = 13539; // 1 +const static uint64_t SH_FLD_SLAVE50_RESPONSE_BIT = 13540; // 1 +const static uint64_t SH_FLD_SLAVE51_ERROR_CODE = 13541; // 1 +const static uint64_t SH_FLD_SLAVE51_ERROR_CODE_LEN = 13542; // 1 +const static uint64_t SH_FLD_SLAVE51_RESPONSE_BIT = 13543; // 1 +const static uint64_t SH_FLD_SLAVE52_ERROR_CODE = 13544; // 1 +const static uint64_t SH_FLD_SLAVE52_ERROR_CODE_LEN = 13545; // 1 +const static uint64_t SH_FLD_SLAVE52_RESPONSE_BIT = 13546; // 1 +const static uint64_t SH_FLD_SLAVE53_ERROR_CODE = 13547; // 1 +const static uint64_t SH_FLD_SLAVE53_ERROR_CODE_LEN = 13548; // 1 +const static uint64_t SH_FLD_SLAVE53_RESPONSE_BIT = 13549; // 1 +const static uint64_t SH_FLD_SLAVE54_ERROR_CODE = 13550; // 1 +const static uint64_t SH_FLD_SLAVE54_ERROR_CODE_LEN = 13551; // 1 +const static uint64_t SH_FLD_SLAVE54_RESPONSE_BIT = 13552; // 1 +const static uint64_t SH_FLD_SLAVE55_ERROR_CODE = 13553; // 1 +const static uint64_t SH_FLD_SLAVE55_ERROR_CODE_LEN = 13554; // 1 +const static uint64_t SH_FLD_SLAVE55_RESPONSE_BIT = 13555; // 1 +const static uint64_t SH_FLD_SLAVE56_ERROR_CODE = 13556; // 1 +const static uint64_t SH_FLD_SLAVE56_ERROR_CODE_LEN = 13557; // 1 +const static uint64_t SH_FLD_SLAVE56_RESPONSE_BIT = 13558; // 1 +const static uint64_t SH_FLD_SLAVE57_ERROR_CODE = 13559; // 1 +const static uint64_t SH_FLD_SLAVE57_ERROR_CODE_LEN = 13560; // 1 +const static uint64_t SH_FLD_SLAVE57_RESPONSE_BIT = 13561; // 1 +const static uint64_t SH_FLD_SLAVE58_ERROR_CODE = 13562; // 1 +const static uint64_t SH_FLD_SLAVE58_ERROR_CODE_LEN = 13563; // 1 +const static uint64_t SH_FLD_SLAVE58_RESPONSE_BIT = 13564; // 1 +const static uint64_t SH_FLD_SLAVE59_ERROR_CODE = 13565; // 1 +const static uint64_t SH_FLD_SLAVE59_ERROR_CODE_LEN = 13566; // 1 +const static uint64_t SH_FLD_SLAVE59_RESPONSE_BIT = 13567; // 1 +const static uint64_t SH_FLD_SLAVE5_ERROR_CODE = 13568; // 1 +const static uint64_t SH_FLD_SLAVE5_ERROR_CODE_LEN = 13569; // 1 +const static uint64_t SH_FLD_SLAVE5_RESPONSE_BIT = 13570; // 1 +const static uint64_t SH_FLD_SLAVE60_ERROR_CODE = 13571; // 1 +const static uint64_t SH_FLD_SLAVE60_ERROR_CODE_LEN = 13572; // 1 +const static uint64_t SH_FLD_SLAVE60_RESPONSE_BIT = 13573; // 1 +const static uint64_t SH_FLD_SLAVE61_ERROR_CODE = 13574; // 1 +const static uint64_t SH_FLD_SLAVE61_ERROR_CODE_LEN = 13575; // 1 +const static uint64_t SH_FLD_SLAVE61_RESPONSE_BIT = 13576; // 1 +const static uint64_t SH_FLD_SLAVE62_ERROR_CODE = 13577; // 1 +const static uint64_t SH_FLD_SLAVE62_ERROR_CODE_LEN = 13578; // 1 +const static uint64_t SH_FLD_SLAVE62_RESPONSE_BIT = 13579; // 1 +const static uint64_t SH_FLD_SLAVE63_ERROR_CODE = 13580; // 1 +const static uint64_t SH_FLD_SLAVE63_ERROR_CODE_LEN = 13581; // 1 +const static uint64_t SH_FLD_SLAVE63_RESPONSE_BIT = 13582; // 1 +const static uint64_t SH_FLD_SLAVE6_ERROR_CODE = 13583; // 1 +const static uint64_t SH_FLD_SLAVE6_ERROR_CODE_LEN = 13584; // 1 +const static uint64_t SH_FLD_SLAVE6_RESPONSE_BIT = 13585; // 1 +const static uint64_t SH_FLD_SLAVE7_ERROR_CODE = 13586; // 1 +const static uint64_t SH_FLD_SLAVE7_ERROR_CODE_LEN = 13587; // 1 +const static uint64_t SH_FLD_SLAVE7_RESPONSE_BIT = 13588; // 1 +const static uint64_t SH_FLD_SLAVE8_ERROR_CODE = 13589; // 1 +const static uint64_t SH_FLD_SLAVE8_ERROR_CODE_LEN = 13590; // 1 +const static uint64_t SH_FLD_SLAVE8_RESPONSE_BIT = 13591; // 1 +const static uint64_t SH_FLD_SLAVE9_ERROR_CODE = 13592; // 1 +const static uint64_t SH_FLD_SLAVE9_ERROR_CODE_LEN = 13593; // 1 +const static uint64_t SH_FLD_SLAVE9_RESPONSE_BIT = 13594; // 1 +const static uint64_t SH_FLD_SLAVE_IDLE = 13595; // 1 +const static uint64_t SH_FLD_SLAVE_MODE = 13596; // 43 +const static uint64_t SH_FLD_SLAVE_RESET_TO_405_ENABLE = 13597; // 1 +const static uint64_t SH_FLD_SLBI_GROUP_PUMP_EN = 13598; // 12 +const static uint64_t SH_FLD_SLB_BUS0_STG1_SEL = 13599; // 1 +const static uint64_t SH_FLD_SLB_BUS0_STG2_SEL = 13600; // 1 +const static uint64_t SH_FLD_SLB_BUS1_STG1_SEL = 13601; // 1 +const static uint64_t SH_FLD_SLB_BUS1_STG2_SEL = 13602; // 1 +const static uint64_t SH_FLD_SLEWCTL = 13603; // 1 +const static uint64_t SH_FLD_SLEWCTL_LEN = 13604; // 1 +const static uint64_t SH_FLD_SLICE = 13605; // 3 +const static uint64_t SH_FLD_SLICE0_CFG_ECC_CE_ERR = 13606; // 2 +const static uint64_t SH_FLD_SLICE0_CFG_ECC_UE_ERR = 13607; // 2 +const static uint64_t SH_FLD_SLICE1_CFG_ECC_CE_ERR = 13608; // 2 +const static uint64_t SH_FLD_SLICE1_CFG_ECC_UE_ERR = 13609; // 2 +const static uint64_t SH_FLD_SLICE2_CFG_ECC_CE_ERR = 13610; // 2 +const static uint64_t SH_FLD_SLICE2_CFG_ECC_UE_ERR = 13611; // 2 +const static uint64_t SH_FLD_SLICE3_CFG_ECC_CE_ERR = 13612; // 2 +const static uint64_t SH_FLD_SLICE3_CFG_ECC_UE_ERR = 13613; // 2 +const static uint64_t SH_FLD_SLICE_LEN = 13614; // 3 +const static uint64_t SH_FLD_SLOT0_B2_VALID = 13615; // 8 +const static uint64_t SH_FLD_SLOT0_D_VALUE = 13616; // 8 +const static uint64_t SH_FLD_SLOT0_M0_VALID = 13617; // 8 +const static uint64_t SH_FLD_SLOT0_M1_VALID = 13618; // 8 +const static uint64_t SH_FLD_SLOT0_ROW15_VALID = 13619; // 8 +const static uint64_t SH_FLD_SLOT0_ROW16_VALID = 13620; // 8 +const static uint64_t SH_FLD_SLOT0_ROW17_VALID = 13621; // 8 +const static uint64_t SH_FLD_SLOT0_S0_VALID = 13622; // 8 +const static uint64_t SH_FLD_SLOT0_S1_VALID = 13623; // 8 +const static uint64_t SH_FLD_SLOT0_S2_VALID = 13624; // 8 +const static uint64_t SH_FLD_SLOT0_VALID = 13625; // 8 +const static uint64_t SH_FLD_SLOT1_B2_VALID = 13626; // 8 +const static uint64_t SH_FLD_SLOT1_D_VALUE = 13627; // 8 +const static uint64_t SH_FLD_SLOT1_M0_VALID = 13628; // 8 +const static uint64_t SH_FLD_SLOT1_M1_VALID = 13629; // 8 +const static uint64_t SH_FLD_SLOT1_ROW15_VALID = 13630; // 8 +const static uint64_t SH_FLD_SLOT1_ROW16_VALID = 13631; // 8 +const static uint64_t SH_FLD_SLOT1_ROW17_VALID = 13632; // 8 +const static uint64_t SH_FLD_SLOT1_S0_VALID = 13633; // 8 +const static uint64_t SH_FLD_SLOT1_S1_VALID = 13634; // 8 +const static uint64_t SH_FLD_SLOT1_S2_VALID = 13635; // 8 +const static uint64_t SH_FLD_SLOT1_VALID = 13636; // 8 +const static uint64_t SH_FLD_SLOW_CMD_RATE = 13637; // 1 +const static uint64_t SH_FLD_SLS_CMD_GCRMSG = 13638; // 4 +const static uint64_t SH_FLD_SLS_CMD_GCRMSG_LEN = 13639; // 4 +const static uint64_t SH_FLD_SLS_CNTR_TAP_PTS = 13640; // 4 +const static uint64_t SH_FLD_SLS_CNTR_TAP_PTS_LEN = 13641; // 4 +const static uint64_t SH_FLD_SLS_DISABLE = 13642; // 4 +const static uint64_t SH_FLD_SLS_EXCEPTION2_CS = 13643; // 4 +const static uint64_t SH_FLD_SLS_EXTEND_SEL = 13644; // 4 +const static uint64_t SH_FLD_SLS_EXTEND_SEL_LEN = 13645; // 4 +const static uint64_t SH_FLD_SLS_LANE_GCRMSG = 13646; // 4 +const static uint64_t SH_FLD_SLS_LANE_GCRMSG_LEN = 13647; // 4 +const static uint64_t SH_FLD_SLS_LANE_SEL_LG_GCRMSG = 13648; // 4 +const static uint64_t SH_FLD_SLS_LANE_SHDW_GCRMSG = 13649; // 4 +const static uint64_t SH_FLD_SLS_LANE_UNSEL_LG_GCRMSG = 13650; // 4 +const static uint64_t SH_FLD_SLS_LANE_VAL_GCRMSG = 13651; // 4 +const static uint64_t SH_FLD_SLS_SCRAMBLE_MODE = 13652; // 4 +const static uint64_t SH_FLD_SLS_SCRAMBLE_MODE_LEN = 13653; // 4 +const static uint64_t SH_FLD_SLS_TIMEOUT_SEL = 13654; // 4 +const static uint64_t SH_FLD_SLS_TIMEOUT_SEL_LEN = 13655; // 4 +const static uint64_t SH_FLD_SLV_DIS_ABUSPAR = 13656; // 1 +const static uint64_t SH_FLD_SLV_DIS_BE = 13657; // 1 +const static uint64_t SH_FLD_SLV_DIS_BEPAR = 13658; // 1 +const static uint64_t SH_FLD_SLV_DIS_RDDBUSPAREN = 13659; // 1 +const static uint64_t SH_FLD_SLV_DIS_SACK = 13660; // 1 +const static uint64_t SH_FLD_SLV_DIS_WRDBUSPAR = 13661; // 1 +const static uint64_t SH_FLD_SLV_EVENT_MUX = 13662; // 1 +const static uint64_t SH_FLD_SLV_EVENT_MUX_LEN = 13663; // 1 +const static uint64_t SH_FLD_SLV_LGL_RPR_REQ_GCRMSG = 13664; // 4 +const static uint64_t SH_FLD_SLV_MV_SLS_RPR_REQ_GCRMSG = 13665; // 4 +const static uint64_t SH_FLD_SLV_MV_SLS_SHDW_REQ_GCRMSG = 13666; // 4 +const static uint64_t SH_FLD_SLV_MV_SLS_SHDW_RPR_REQ_GCRMSG = 13667; // 4 +const static uint64_t SH_FLD_SLV_MV_SLS_UNSHDW_REQ_GCRMSG = 13668; // 4 +const static uint64_t SH_FLD_SLV_MV_SLS_UNSHDW_RPR_REQ_GCRMSG = 13669; // 4 +const static uint64_t SH_FLD_SLV_RECAL_ABORT_ACK_FIN_GCRMSG = 13670; // 4 +const static uint64_t SH_FLD_SLV_RECAL_ABORT_MNOP_FIN_GCRMSG = 13671; // 4 +const static uint64_t SH_FLD_SLV_RECAL_ABORT_SNOP_FIN_GCRMSG = 13672; // 4 +const static uint64_t SH_FLD_SLV_RECAL_DONE_NOP_FIN_GCRMSG = 13673; // 4 +const static uint64_t SH_FLD_SLV_RECAL_FAIL_NOP_FIN_GCRMSG = 13674; // 4 +const static uint64_t SH_FLD_SLV_RECAL_FRESULTS_FIN_GCRMSG = 13675; // 4 +const static uint64_t SH_FLD_SLV_SHDW_DONE_FIN_GCRMSG = 13676; // 4 +const static uint64_t SH_FLD_SLV_SHDW_NOP_FIN_GCRMSG = 13677; // 4 +const static uint64_t SH_FLD_SLV_SHDW_RPR_DONE_FIN_GCRMSG = 13678; // 4 +const static uint64_t SH_FLD_SLV_SHDW_RPR_NOP_FIN_GCRMSG = 13679; // 4 +const static uint64_t SH_FLD_SLV_SPARE = 13680; // 1 +const static uint64_t SH_FLD_SLV_UNSHDW_DONE_FIN_GCRMSG = 13681; // 4 +const static uint64_t SH_FLD_SLV_UNSHDW_NOP_FIN_GCRMSG = 13682; // 4 +const static uint64_t SH_FLD_SLV_UNSHDW_RPR_DONE_FIN_GCRMSG = 13683; // 4 +const static uint64_t SH_FLD_SLV_UNSHDW_RPR_NOP_FIN_GCRMSG = 13684; // 4 +const static uint64_t SH_FLD_SMALL_STEP = 13685; // 8 +const static uint64_t SH_FLD_SMALL_STEP_LEN = 13686; // 8 +const static uint64_t SH_FLD_SMASK_IN = 13687; // 43 +const static uint64_t SH_FLD_SMASK_IN_LEN = 13688; // 43 +const static uint64_t SH_FLD_SM_1HOT_ERR = 13689; // 16 +const static uint64_t SH_FLD_SM_RESET = 13690; // 1 +const static uint64_t SH_FLD_SND_CHIPID = 13691; // 1 +const static uint64_t SH_FLD_SND_CHIPID_LEN = 13692; // 1 +const static uint64_t SH_FLD_SND_CNT = 13693; // 1 +const static uint64_t SH_FLD_SND_CNT_LEN = 13694; // 1 +const static uint64_t SH_FLD_SND_CNT_STATUS = 13695; // 1 +const static uint64_t SH_FLD_SND_CNT_STATUS_LEN = 13696; // 1 +const static uint64_t SH_FLD_SND_ERROR = 13697; // 1 +const static uint64_t SH_FLD_SND_GROUPID = 13698; // 1 +const static uint64_t SH_FLD_SND_GROUPID_LEN = 13699; // 1 +const static uint64_t SH_FLD_SND_IN_PROGRESS = 13700; // 1 +const static uint64_t SH_FLD_SND_PHASE_STATUS = 13701; // 1 +const static uint64_t SH_FLD_SND_PHASE_STATUS_LEN = 13702; // 1 +const static uint64_t SH_FLD_SND_QID = 13703; // 1 +const static uint64_t SH_FLD_SND_RESERVATION = 13704; // 1 +const static uint64_t SH_FLD_SND_RESET = 13705; // 1 +const static uint64_t SH_FLD_SND_RETRY_COUNT = 13706; // 1 +const static uint64_t SH_FLD_SND_RETRY_COUNT_LEN = 13707; // 1 +const static uint64_t SH_FLD_SND_RETRY_COUNT_OVERCOM = 13708; // 1 +const static uint64_t SH_FLD_SND_RETRY_THRESH = 13709; // 1 +const static uint64_t SH_FLD_SND_RETRY_THRESH_LEN = 13710; // 1 +const static uint64_t SH_FLD_SND_RSVTO_DIV = 13711; // 1 +const static uint64_t SH_FLD_SND_RSVTO_DIV_LEN = 13712; // 1 +const static uint64_t SH_FLD_SND_SCOPE = 13713; // 1 +const static uint64_t SH_FLD_SND_SCOPE_LEN = 13714; // 1 +const static uint64_t SH_FLD_SND_SLS_CMD_GCRMSG = 13715; // 4 +const static uint64_t SH_FLD_SND_SLS_CMD_PREV_GCRMSG = 13716; // 4 +const static uint64_t SH_FLD_SND_SLS_USING_REG_SCRAMBLE = 13717; // 4 +const static uint64_t SH_FLD_SND_STOP = 13718; // 1 +const static uint64_t SH_FLD_SND_TYPE = 13719; // 1 +const static uint64_t SH_FLD_SNFSM_ADDR_ERR = 13720; // 12 +const static uint64_t SH_FLD_SNGL_THD_EN = 13721; // 2 +const static uint64_t SH_FLD_SNOOPER_RECOVERABLE_ERROR = 13722; // 4 +const static uint64_t SH_FLD_SNOOPER_SYS_XSTOP_ERROR = 13723; // 4 +const static uint64_t SH_FLD_SNOOP_ARRAY_CE = 13724; // 4 +const static uint64_t SH_FLD_SNOOP_ARRAY_UE = 13725; // 4 +const static uint64_t SH_FLD_SNOOP_DIS = 13726; // 8 +const static uint64_t SH_FLD_SNOP = 13727; // 43 +const static uint64_t SH_FLD_SNOP_FORCE_SG = 13728; // 43 +const static uint64_t SH_FLD_SNOP_LEN = 13729; // 43 +const static uint64_t SH_FLD_SNOP_WAIT = 13730; // 43 +const static uint64_t SH_FLD_SNOP_WAIT_LEN = 13731; // 43 +const static uint64_t SH_FLD_SNP_REG_ERR0 = 13732; // 1 +const static uint64_t SH_FLD_SNP_REG_ERR1 = 13733; // 1 +const static uint64_t SH_FLD_SNP_REG_ERR2 = 13734; // 1 +const static uint64_t SH_FLD_SNP_REG_ERR3 = 13735; // 1 +const static uint64_t SH_FLD_SNP_REG_ERR4 = 13736; // 1 +const static uint64_t SH_FLD_SNP_REG_ERR5 = 13737; // 1 +const static uint64_t SH_FLD_SNP_REG_ERR6 = 13738; // 1 +const static uint64_t SH_FLD_SNS1_UNUSED_0_31 = 13739; // 1 +const static uint64_t SH_FLD_SNS1_UNUSED_0_31_LEN = 13740; // 1 +const static uint64_t SH_FLD_SNS2_UNUSED_0_31 = 13741; // 1 +const static uint64_t SH_FLD_SNS2_UNUSED_0_31_LEN = 13742; // 1 +const static uint64_t SH_FLD_SN_MACHINE_HANG_ERR = 13743; // 12 +const static uint64_t SH_FLD_SN_MSG_MAX_CREDIT = 13744; // 2 +const static uint64_t SH_FLD_SN_MSG_MAX_CREDIT_LEN = 13745; // 2 +const static uint64_t SH_FLD_SN_UNSOLICITED_CRESP_ERR = 13746; // 12 +const static uint64_t SH_FLD_SN_UNSOLICITED_CRESP_ERR_LEN = 13747; // 12 +const static uint64_t SH_FLD_SN_WRT_DBUF_MAX_CREDIT = 13748; // 2 +const static uint64_t SH_FLD_SN_WRT_DBUF_MAX_CREDIT_LEN = 13749; // 2 +const static uint64_t SH_FLD_SOFT_CE_COUNT = 13750; // 2 +const static uint64_t SH_FLD_SOFT_CE_COUNT_LEN = 13751; // 2 +const static uint64_t SH_FLD_SOFT_MCE_COUNT = 13752; // 2 +const static uint64_t SH_FLD_SOFT_MCE_COUNT_LEN = 13753; // 2 +const static uint64_t SH_FLD_SOFT_NCE_ETE_ATTN = 13754; // 10 +const static uint64_t SH_FLD_SOURCE_SELECT = 13755; // 43 +const static uint64_t SH_FLD_SOURCE_SELECT_LEN = 13756; // 43 +const static uint64_t SH_FLD_SOURCE_SUBUNIT_0_1 = 13757; // 1 +const static uint64_t SH_FLD_SOURCE_SUBUNIT_0_1_LEN = 13758; // 1 +const static uint64_t SH_FLD_SOUTH_CTL_DISABLE_WC_ECC = 13759; // 1 +const static uint64_t SH_FLD_SOUTH_CTL_DISABLE_WC_SCRUB = 13760; // 1 +const static uint64_t SH_FLD_SOUTH_CTL_EG_SINGLE_THREAD = 13761; // 1 +const static uint64_t SH_FLD_SOUTH_CTL_EG_STAMP_DEBUG = 13762; // 1 +const static uint64_t SH_FLD_SOUTH_CTL_EG_WM_CTX_UPDATE_MODE = 13763; // 1 +const static uint64_t SH_FLD_SPAM_EN = 13764; // 8 +const static uint64_t SH_FLD_SPARE = 13765; // 86 +const static uint64_t SH_FLD_SPARE0 = 13766; // 105 +const static uint64_t SH_FLD_SPARE0_LEN = 13767; // 8 +const static uint64_t SH_FLD_SPARE1 = 13768; // 5 +const static uint64_t SH_FLD_SPARE10 = 13769; // 1 +const static uint64_t SH_FLD_SPARE11 = 13770; // 13 +const static uint64_t SH_FLD_SPARE13 = 13771; // 1 +const static uint64_t SH_FLD_SPARE14 = 13772; // 1 +const static uint64_t SH_FLD_SPARE15 = 13773; // 1 +const static uint64_t SH_FLD_SPARE1_ERR = 13774; // 12 +const static uint64_t SH_FLD_SPARE1_ERR_LEN = 13775; // 12 +const static uint64_t SH_FLD_SPARE2 = 13776; // 4 +const static uint64_t SH_FLD_SPARE2_ERR = 13777; // 12 +const static uint64_t SH_FLD_SPARE2_ERR_LEN = 13778; // 12 +const static uint64_t SH_FLD_SPARE3 = 13779; // 1 +const static uint64_t SH_FLD_SPARE4_TIMEOUT = 13780; // 6 +const static uint64_t SH_FLD_SPARE4_TIMEOUT_LEN = 13781; // 6 +const static uint64_t SH_FLD_SPARE7 = 13782; // 1 +const static uint64_t SH_FLD_SPARE8 = 13783; // 1 +const static uint64_t SH_FLD_SPARE9 = 13784; // 1 +const static uint64_t SH_FLD_SPARES = 13785; // 4 +const static uint64_t SH_FLD_SPARES_LEN = 13786; // 4 +const static uint64_t SH_FLD_SPARE_0 = 13787; // 4 +const static uint64_t SH_FLD_SPARE_0_LEN = 13788; // 4 +const static uint64_t SH_FLD_SPARE_1_3 = 13789; // 1 +const static uint64_t SH_FLD_SPARE_1_3_LEN = 13790; // 1 +const static uint64_t SH_FLD_SPARE_2 = 13791; // 4 +const static uint64_t SH_FLD_SPARE_21_23 = 13792; // 12 +const static uint64_t SH_FLD_SPARE_21_23_LEN = 13793; // 12 +const static uint64_t SH_FLD_SPARE_24_31 = 13794; // 1 +const static uint64_t SH_FLD_SPARE_24_31_LEN = 13795; // 1 +const static uint64_t SH_FLD_SPARE_25_27 = 13796; // 12 +const static uint64_t SH_FLD_SPARE_25_27_LEN = 13797; // 12 +const static uint64_t SH_FLD_SPARE_27_28 = 13798; // 12 +const static uint64_t SH_FLD_SPARE_27_28_LEN = 13799; // 12 +const static uint64_t SH_FLD_SPARE_3 = 13800; // 4 +const static uint64_t SH_FLD_SPARE_31 = 13801; // 1 +const static uint64_t SH_FLD_SPARE_32_33 = 13802; // 12 +const static uint64_t SH_FLD_SPARE_32_33_LEN = 13803; // 12 +const static uint64_t SH_FLD_SPARE_38_39 = 13804; // 12 +const static uint64_t SH_FLD_SPARE_38_39_LEN = 13805; // 12 +const static uint64_t SH_FLD_SPARE_4 = 13806; // 2 +const static uint64_t SH_FLD_SPARE_58 = 13807; // 4 +const static uint64_t SH_FLD_SPARE_59 = 13808; // 4 +const static uint64_t SH_FLD_SPARE_60 = 13809; // 4 +const static uint64_t SH_FLD_SPARE_61 = 13810; // 4 +const static uint64_t SH_FLD_SPARE_63 = 13811; // 3 +const static uint64_t SH_FLD_SPARE_6_7 = 13812; // 33 +const static uint64_t SH_FLD_SPARE_6_7_LEN = 13813; // 33 +const static uint64_t SH_FLD_SPARE_9 = 13814; // 12 +const static uint64_t SH_FLD_SPARE_DI_CONTROL = 13815; // 1 +const static uint64_t SH_FLD_SPARE_FENCE_CONTROL = 13816; // 1 +const static uint64_t SH_FLD_SPARE_LEN = 13817; // 69 +const static uint64_t SH_FLD_SPARE_MODE_0 = 13818; // 116 +const static uint64_t SH_FLD_SPARE_MODE_1 = 13819; // 116 +const static uint64_t SH_FLD_SPARE_MODE_2 = 13820; // 116 +const static uint64_t SH_FLD_SPARE_MODE_3 = 13821; // 116 +const static uint64_t SH_FLD_SPARE_N = 13822; // 2 +const static uint64_t SH_FLD_SPARE_N_LEN = 13823; // 2 +const static uint64_t SH_FLD_SPARE_PIB_CONTROL = 13824; // 1 +const static uint64_t SH_FLD_SPARE_RI_CONTROL = 13825; // 1 +const static uint64_t SH_FLD_SPARE_TANK_PLL_CONTROL = 13826; // 1 +const static uint64_t SH_FLD_SPECIAL_ATTENTION = 13827; // 1 +const static uint64_t SH_FLD_SPECIAL_WAKEUP_C0 = 13828; // 24 +const static uint64_t SH_FLD_SPECIAL_WAKEUP_C1 = 13829; // 24 +const static uint64_t SH_FLD_SPECIAL_WKUP_ACTIVE_FSP = 13830; // 30 +const static uint64_t SH_FLD_SPECIAL_WKUP_ACTIVE_HYP = 13831; // 30 +const static uint64_t SH_FLD_SPECIAL_WKUP_ACTIVE_OCC = 13832; // 30 +const static uint64_t SH_FLD_SPECIAL_WKUP_ACTIVE_OTR = 13833; // 30 +const static uint64_t SH_FLD_SPECIAL_WKUP_DONE = 13834; // 30 +const static uint64_t SH_FLD_SPECIAL_WKUP_PROTOCOL = 13835; // 30 +const static uint64_t SH_FLD_SPECIFIC_GAP_CONDITION = 13836; // 8 +const static uint64_t SH_FLD_SPECIFIC_GAP_CONDITION_LEN = 13837; // 8 +const static uint64_t SH_FLD_SPECIFIC_GAP_COUNT = 13838; // 8 +const static uint64_t SH_FLD_SPECIFIC_GAP_COUNT_LEN = 13839; // 8 +const static uint64_t SH_FLD_SPECULATIVE_CHECKIN_COUNT = 13840; // 1 +const static uint64_t SH_FLD_SPECULATIVE_CHECKIN_COUNT_LEN = 13841; // 1 +const static uint64_t SH_FLD_SPEC_CILD_G = 13842; // 1 +const static uint64_t SH_FLD_SPEC_HPC_DIR_STATE = 13843; // 2 +const static uint64_t SH_FLD_SPEC_HPC_DIR_STATE_LEN = 13844; // 2 +const static uint64_t SH_FLD_SPEC_READ_FILTER_NO_HASH_MODE = 13845; // 4 +const static uint64_t SH_FLD_SPEDIV = 13846; // 20 +const static uint64_t SH_FLD_SPEDIV_LEN = 13847; // 20 +const static uint64_t SH_FLD_SPIPSS_ERROR = 13848; // 1 +const static uint64_t SH_FLD_SPLURGE = 13849; // 1 +const static uint64_t SH_FLD_SPRC0_SEL = 13850; // 24 +const static uint64_t SH_FLD_SPRC1_SEL = 13851; // 24 +const static uint64_t SH_FLD_SPRC2_SEL = 13852; // 24 +const static uint64_t SH_FLD_SPRC3_SEL = 13853; // 24 +const static uint64_t SH_FLD_SPRC_T0_SEL = 13854; // 24 +const static uint64_t SH_FLD_SPRC_T1_SEL = 13855; // 24 +const static uint64_t SH_FLD_SPRC_T2_SEL = 13856; // 24 +const static uint64_t SH_FLD_SPRC_T3_SEL = 13857; // 24 +const static uint64_t SH_FLD_SPRC_WR_EN = 13858; // 24 +const static uint64_t SH_FLD_SPRG0 = 13859; // 21 +const static uint64_t SH_FLD_SPRG0_LEN = 13860; // 21 +const static uint64_t SH_FLD_SPR_LNS_PDWN_LITE_GCRMSG = 13861; // 4 +const static uint64_t SH_FLD_SR = 13862; // 8 +const static uint64_t SH_FLD_SRAM_ABIST_DONE_DC = 13863; // 43 +const static uint64_t SH_FLD_SRAM_ACCESS_MODE = 13864; // 15 +const static uint64_t SH_FLD_SRAM_ADDRESS = 13865; // 15 +const static uint64_t SH_FLD_SRAM_ADDRESS_LEN = 13866; // 15 +const static uint64_t SH_FLD_SRAM_CE = 13867; // 12 +const static uint64_t SH_FLD_SRAM_DATA = 13868; // 15 +const static uint64_t SH_FLD_SRAM_DATA_LEN = 13869; // 15 +const static uint64_t SH_FLD_SRAM_HIGH_PRIORITY = 13870; // 4 +const static uint64_t SH_FLD_SRAM_HIGH_PRIORITY_LEN = 13871; // 4 +const static uint64_t SH_FLD_SRAM_LOW_PRIORITY = 13872; // 4 +const static uint64_t SH_FLD_SRAM_LOW_PRIORITY_LEN = 13873; // 4 +const static uint64_t SH_FLD_SRAM_SCRUB_ENABLE = 13874; // 15 +const static uint64_t SH_FLD_SRAM_SCRUB_ERR = 13875; // 12 +const static uint64_t SH_FLD_SRAM_SCRUB_INDEX = 13876; // 15 +const static uint64_t SH_FLD_SRAM_SCRUB_INDEX_LEN = 13877; // 15 +const static uint64_t SH_FLD_SRAM_UE = 13878; // 12 +const static uint64_t SH_FLD_SRC_DDE = 13879; // 3 +const static uint64_t SH_FLD_SRC_DDE_LEN = 13880; // 3 +const static uint64_t SH_FLD_SRC_SEL_EQ1_ERR = 13881; // 1 +const static uint64_t SH_FLD_SRQ_MCBIST_OUT_OF_SYNC_HOLD_OUT = 13882; // 2 +const static uint64_t SH_FLD_SRT_ERROR = 13883; // 1 +const static uint64_t SH_FLD_SR_FINAL_NOP_TIMEOUT_SEL = 13884; // 4 +const static uint64_t SH_FLD_SR_FINAL_NOP_TIMEOUT_SEL_LEN = 13885; // 4 +const static uint64_t SH_FLD_SR_LEN = 13886; // 8 +const static uint64_t SH_FLD_SSCGEN = 13887; // 3 +const static uint64_t SH_FLD_SS_ENABLE = 13888; // 6 +const static uint64_t SH_FLD_ST2_RESET_PERIOD = 13889; // 1 +const static uint64_t SH_FLD_ST2_RESET_PERIOD_LEN = 13890; // 1 +const static uint64_t SH_FLD_STACK = 13891; // 16 +const static uint64_t SH_FLD_STACK_LEN = 13892; // 16 +const static uint64_t SH_FLD_STACK_SCOM_ERR0 = 13893; // 9 +const static uint64_t SH_FLD_STACK_SCOM_ERR0_MASK = 13894; // 9 +const static uint64_t SH_FLD_STACK_SCOM_ERR1 = 13895; // 9 +const static uint64_t SH_FLD_STACK_SCOM_ERR1_MASK = 13896; // 9 +const static uint64_t SH_FLD_STAGGERED_PATTERN = 13897; // 8 +const static uint64_t SH_FLD_START = 13898; // 23 +const static uint64_t SH_FLD_START0 = 13899; // 5 +const static uint64_t SH_FLD_START1 = 13900; // 5 +const static uint64_t SH_FLD_STARTING_ADDRESS = 13901; // 4 +const static uint64_t SH_FLD_STARTING_ADDRESS_LEN = 13902; // 4 +const static uint64_t SH_FLD_STARTS_BIST = 13903; // 43 +const static uint64_t SH_FLD_START_BOOT_SEQUENCER = 13904; // 1 +const static uint64_t SH_FLD_START_DESKEW = 13905; // 4 +const static uint64_t SH_FLD_START_EYE_OPT = 13906; // 4 +const static uint64_t SH_FLD_START_FUNC_MODE = 13907; // 4 +const static uint64_t SH_FLD_START_INIT = 13908; // 8 +const static uint64_t SH_FLD_START_JTAG_CMD = 13909; // 1 +const static uint64_t SH_FLD_START_LANE_ID = 13910; // 8 +const static uint64_t SH_FLD_START_LANE_ID_LEN = 13911; // 8 +const static uint64_t SH_FLD_START_PPE_ADDR = 13912; // 4 +const static uint64_t SH_FLD_START_PPE_ADDR_LEN = 13913; // 4 +const static uint64_t SH_FLD_START_READ = 13914; // 1 +const static uint64_t SH_FLD_START_REPAIR = 13915; // 4 +const static uint64_t SH_FLD_START_RESTART_VECTOR0 = 13916; // 1 +const static uint64_t SH_FLD_START_RESTART_VECTOR1 = 13917; // 1 +const static uint64_t SH_FLD_START_SEEPROM_ADDRESS = 13918; // 4 +const static uint64_t SH_FLD_START_SEEPROM_ADDRESS_LEN = 13919; // 4 +const static uint64_t SH_FLD_START_WIRETEST = 13920; // 4 +const static uint64_t SH_FLD_START_WRITE = 13921; // 1 +const static uint64_t SH_FLD_START_WR_ADDR = 13922; // 2 +const static uint64_t SH_FLD_START_WR_ADDR_LEN = 13923; // 2 +const static uint64_t SH_FLD_STAT = 13924; // 2 +const static uint64_t SH_FLD_STATE = 13925; // 44 +const static uint64_t SH_FLD_STATE_LEN = 13926; // 43 +const static uint64_t SH_FLD_STATE_LOSS_ENABLE_A_N = 13927; // 96 +const static uint64_t SH_FLD_STATE_MACHINE_TRANSITION_DELAY = 13928; // 1 +const static uint64_t SH_FLD_STATE_MACHINE_TRANSITION_DELAY_LEN = 13929; // 1 +const static uint64_t SH_FLD_STATIC_MAX_SPARES_EXCEEDED = 13930; // 8 +const static uint64_t SH_FLD_STATIC_SPARE_DEPLOYED = 13931; // 8 +const static uint64_t SH_FLD_STATUS = 13932; // 3 +const static uint64_t SH_FLD_STATUS_INVALID_CRESP = 13933; // 2 +const static uint64_t SH_FLD_STATUS_PARITY_ERROR = 13934; // 2 +const static uint64_t SH_FLD_STATUS_PERV = 13935; // 129 +const static uint64_t SH_FLD_STATUS_REC_DROPPED_Q = 13936; // 26 +const static uint64_t SH_FLD_STATUS_REG = 13937; // 1 +const static uint64_t SH_FLD_STATUS_REG_LEN = 13938; // 1 +const static uint64_t SH_FLD_STATUS_SCOM_ERROR = 13939; // 26 +const static uint64_t SH_FLD_STATUS_TRIG_DROPPED_Q = 13940; // 26 +const static uint64_t SH_FLD_STATUS_UNIT1 = 13941; // 129 +const static uint64_t SH_FLD_STATUS_UNIT10 = 13942; // 129 +const static uint64_t SH_FLD_STATUS_UNIT2 = 13943; // 129 +const static uint64_t SH_FLD_STATUS_UNIT3 = 13944; // 129 +const static uint64_t SH_FLD_STATUS_UNIT4 = 13945; // 129 +const static uint64_t SH_FLD_STATUS_UNIT5 = 13946; // 129 +const static uint64_t SH_FLD_STATUS_UNIT6 = 13947; // 129 +const static uint64_t SH_FLD_STATUS_UNIT7 = 13948; // 129 +const static uint64_t SH_FLD_STATUS_UNIT8 = 13949; // 129 +const static uint64_t SH_FLD_STATUS_UNIT9 = 13950; // 129 +const static uint64_t SH_FLD_STATUS_UNUSED = 13951; // 24 +const static uint64_t SH_FLD_STATUS_UNUSED_LEN = 13952; // 24 +const static uint64_t SH_FLD_STAT_LEN = 13953; // 2 +const static uint64_t SH_FLD_STEP_CHECK_CONSTANT_CPS_ENABLE = 13954; // 1 +const static uint64_t SH_FLD_STEP_CHECK_CPS_DEVIATION = 13955; // 1 +const static uint64_t SH_FLD_STEP_CHECK_CPS_DEVIATION_FACTOR = 13956; // 3 +const static uint64_t SH_FLD_STEP_CHECK_CPS_DEVIATION_FACTOR_LEN = 13957; // 3 +const static uint64_t SH_FLD_STEP_CHECK_CPS_DEVIATION_LEN = 13958; // 1 +const static uint64_t SH_FLD_STEP_CHECK_ENABLE_CHICKEN_SWITCH = 13959; // 1 +const static uint64_t SH_FLD_STEP_CHECK_STEP_SELECT = 13960; // 1 +const static uint64_t SH_FLD_STEP_CHECK_VALIDITY_COUNT = 13961; // 1 +const static uint64_t SH_FLD_STEP_CHECK_VALIDITY_COUNT_LEN = 13962; // 1 +const static uint64_t SH_FLD_STEP_CREATE_DUAL_EDGE_DISABLE = 13963; // 1 +const static uint64_t SH_FLD_STICKY_CACHE_VDM_DATA = 13964; // 12 +const static uint64_t SH_FLD_STICKY_CACHE_VDM_DATA_LEN = 13965; // 12 +const static uint64_t SH_FLD_STICKY_CORE0_VDM_DATA = 13966; // 12 +const static uint64_t SH_FLD_STICKY_CORE0_VDM_DATA_LEN = 13967; // 12 +const static uint64_t SH_FLD_STICKY_CORE1_VDM_DATA = 13968; // 12 +const static uint64_t SH_FLD_STICKY_CORE1_VDM_DATA_LEN = 13969; // 12 +const static uint64_t SH_FLD_STICKY_CORE2_VDM_DATA = 13970; // 12 +const static uint64_t SH_FLD_STICKY_CORE2_VDM_DATA_LEN = 13971; // 12 +const static uint64_t SH_FLD_STICKY_CORE3_VDM_DATA = 13972; // 12 +const static uint64_t SH_FLD_STICKY_CORE3_VDM_DATA_LEN = 13973; // 12 +const static uint64_t SH_FLD_STICKY_ERROR_INJECT_ENABLE = 13974; // 1 +const static uint64_t SH_FLD_STICKY_VDM_CONTROL_SUMMARY = 13975; // 12 +const static uint64_t SH_FLD_STICKY_VDM_CONTROL_SUMMARY_LEN = 13976; // 12 +const static uint64_t SH_FLD_STOP = 13977; // 6 +const static uint64_t SH_FLD_STOP1_ACTIVE_ENABLE = 13978; // 12 +const static uint64_t SH_FLD_STOPPED = 13979; // 2 +const static uint64_t SH_FLD_STOP_ACTIVE_MASK = 13980; // 12 +const static uint64_t SH_FLD_STOP_ERROR_0 = 13981; // 2 +const static uint64_t SH_FLD_STOP_ERROR_1 = 13982; // 2 +const static uint64_t SH_FLD_STOP_ERROR_2 = 13983; // 2 +const static uint64_t SH_FLD_STOP_ERROR_3 = 13984; // 2 +const static uint64_t SH_FLD_STOP_GATED = 13985; // 30 +const static uint64_t SH_FLD_STOP_GATED_FSP = 13986; // 30 +const static uint64_t SH_FLD_STOP_ON_ERR = 13987; // 2 +const static uint64_t SH_FLD_STOP_OVERRIDE_MODE = 13988; // 12 +const static uint64_t SH_FLD_STOP_REQUEST_LEVEL_A_N = 13989; // 96 +const static uint64_t SH_FLD_STOP_REQUEST_LEVEL_A_N_LEN = 13990; // 96 +const static uint64_t SH_FLD_STOP_RUNN_ON_XSTOP = 13991; // 43 +const static uint64_t SH_FLD_STOP_TRANSITION = 13992; // 30 +const static uint64_t SH_FLD_STOP_TRANSITION_FSP = 13993; // 30 +const static uint64_t SH_FLD_STOP_TRANSITION_FSP_LEN = 13994; // 30 +const static uint64_t SH_FLD_STOP_TRANSITION_HYP = 13995; // 30 +const static uint64_t SH_FLD_STOP_TRANSITION_HYP_LEN = 13996; // 30 +const static uint64_t SH_FLD_STOP_TRANSITION_LEN = 13997; // 30 +const static uint64_t SH_FLD_STOP_TRANSITION_OCC = 13998; // 30 +const static uint64_t SH_FLD_STOP_TRANSITION_OCC_LEN = 13999; // 30 +const static uint64_t SH_FLD_STOP_TRANSITION_OTR = 14000; // 30 +const static uint64_t SH_FLD_STOP_TRANSITION_OTR_LEN = 14001; // 30 +const static uint64_t SH_FLD_STORE_ADDRESS = 14002; // 21 +const static uint64_t SH_FLD_STORE_ADDRESS_LEN = 14003; // 21 +const static uint64_t SH_FLD_STORE_TIMEOUT = 14004; // 24 +const static uint64_t SH_FLD_STQ_DATA_PARITY_ERR = 14005; // 24 +const static uint64_t SH_FLD_STQ_ERR = 14006; // 12 +const static uint64_t SH_FLD_STQ_ERR_LEN = 14007; // 12 +const static uint64_t SH_FLD_STQ_HW_MAX_0_4 = 14008; // 1 +const static uint64_t SH_FLD_STQ_HW_MAX_0_4_LEN = 14009; // 1 +const static uint64_t SH_FLD_STQ_HW_MIN_0_4 = 14010; // 1 +const static uint64_t SH_FLD_STQ_HW_MIN_0_4_LEN = 14011; // 1 +const static uint64_t SH_FLD_STQ_HYP_MAX_0_4 = 14012; // 1 +const static uint64_t SH_FLD_STQ_HYP_MAX_0_4_LEN = 14013; // 1 +const static uint64_t SH_FLD_STQ_HYP_MIN_0_4 = 14014; // 1 +const static uint64_t SH_FLD_STQ_HYP_MIN_0_4_LEN = 14015; // 1 +const static uint64_t SH_FLD_STQ_INVALID_ST = 14016; // 1 +const static uint64_t SH_FLD_STQ_IPI_MAX_0_4 = 14017; // 1 +const static uint64_t SH_FLD_STQ_IPI_MAX_0_4_LEN = 14018; // 1 +const static uint64_t SH_FLD_STQ_IPI_MIN_0_4 = 14019; // 1 +const static uint64_t SH_FLD_STQ_IPI_MIN_0_4_LEN = 14020; // 1 +const static uint64_t SH_FLD_STQ_OS_MAX_0_4 = 14021; // 1 +const static uint64_t SH_FLD_STQ_OS_MAX_0_4_LEN = 14022; // 1 +const static uint64_t SH_FLD_STQ_OS_MIN_0_4 = 14023; // 1 +const static uint64_t SH_FLD_STQ_OS_MIN_0_4_LEN = 14024; // 1 +const static uint64_t SH_FLD_STQ_RDI_MAX_0_4 = 14025; // 1 +const static uint64_t SH_FLD_STQ_RDI_MAX_0_4_LEN = 14026; // 1 +const static uint64_t SH_FLD_STQ_RDI_MIN_0_4 = 14027; // 1 +const static uint64_t SH_FLD_STQ_RDI_MIN_0_4_LEN = 14028; // 1 +const static uint64_t SH_FLD_STQ_REG_MAX_0_4 = 14029; // 1 +const static uint64_t SH_FLD_STQ_REG_MAX_0_4_LEN = 14030; // 1 +const static uint64_t SH_FLD_STQ_REG_MIN_0_4 = 14031; // 1 +const static uint64_t SH_FLD_STQ_REG_MIN_0_4_LEN = 14032; // 1 +const static uint64_t SH_FLD_STQ_THR_MAX_0_4 = 14033; // 1 +const static uint64_t SH_FLD_STQ_THR_MAX_0_4_LEN = 14034; // 1 +const static uint64_t SH_FLD_STQ_THR_MIN_0_4 = 14035; // 1 +const static uint64_t SH_FLD_STQ_THR_MIN_0_4_LEN = 14036; // 1 +const static uint64_t SH_FLD_STQ_TYPE = 14037; // 12 +const static uint64_t SH_FLD_STQ_TYPE_LEN = 14038; // 12 +const static uint64_t SH_FLD_STQ_VPC_MAX_0_4 = 14039; // 1 +const static uint64_t SH_FLD_STQ_VPC_MAX_0_4_LEN = 14040; // 1 +const static uint64_t SH_FLD_STQ_VPC_MIN_0_4 = 14041; // 1 +const static uint64_t SH_FLD_STQ_VPC_MIN_0_4_LEN = 14042; // 1 +const static uint64_t SH_FLD_STREAM_MODE = 14043; // 4 +const static uint64_t SH_FLD_STREAM_TYPE = 14044; // 4 +const static uint64_t SH_FLD_STRICT_IPI_RULES = 14045; // 1 +const static uint64_t SH_FLD_STRICT_ORDER = 14046; // 1 +const static uint64_t SH_FLD_ST_ACK_DEAD = 14047; // 12 +const static uint64_t SH_FLD_ST_ADDR_ERR = 14048; // 24 +const static uint64_t SH_FLD_ST_CLASS_CMD_ADDR_ERR = 14049; // 4 +const static uint64_t SH_FLD_ST_CLASS_CMD_FOREIGN_LINK_FAIL = 14050; // 4 +const static uint64_t SH_FLD_ST_FOREIGN0_ACK_DEAD = 14051; // 12 +const static uint64_t SH_FLD_ST_FOREIGN1_ACK_DEAD = 14052; // 12 +const static uint64_t SH_FLD_SUE_0 = 14053; // 8 +const static uint64_t SH_FLD_SUE_1 = 14054; // 8 +const static uint64_t SH_FLD_SUE_DIS_BR = 14055; // 3 +const static uint64_t SH_FLD_SUE_DIS_BR_PERR = 14056; // 3 +const static uint64_t SH_FLD_SUE_DIS_IR = 14057; // 3 +const static uint64_t SH_FLD_SUE_DIS_IR_PERR = 14058; // 3 +const static uint64_t SH_FLD_SUE_DIS_OR = 14059; // 3 +const static uint64_t SH_FLD_SUE_DIS_OR_PERR = 14060; // 3 +const static uint64_t SH_FLD_SUE_DIS_PR = 14061; // 3 +const static uint64_t SH_FLD_SUE_DIS_PT = 14062; // 3 +const static uint64_t SH_FLD_SUMMARY = 14063; // 1 +const static uint64_t SH_FLD_SUOP_ERROR_1 = 14064; // 4 +const static uint64_t SH_FLD_SUOP_ERROR_2 = 14065; // 4 +const static uint64_t SH_FLD_SUOP_ERROR_3 = 14066; // 4 +const static uint64_t SH_FLD_SUPPRESS = 14067; // 301 +const static uint64_t SH_FLD_SUPPRESS_EVEN_CLK = 14068; // 43 +const static uint64_t SH_FLD_SWC_VALUE = 14069; // 1 +const static uint64_t SH_FLD_SWC_VALUE_LEN = 14070; // 1 +const static uint64_t SH_FLD_SWITCH_SYNC_ERROR_DISABLE = 14071; // 1 +const static uint64_t SH_FLD_SYM_CPB_CHECK_DISABLE = 14072; // 1 +const static uint64_t SH_FLD_SYM_MAX_INRD = 14073; // 1 +const static uint64_t SH_FLD_SYM_MAX_INRD_LEN = 14074; // 1 +const static uint64_t SH_FLD_SYNCEN = 14075; // 7 +const static uint64_t SH_FLD_SYNC_BRK = 14076; // 1 +const static uint64_t SH_FLD_SYNC_BRK_LEN = 14077; // 1 +const static uint64_t SH_FLD_SYNC_CREATE_SPS_SELECT = 14078; // 1 +const static uint64_t SH_FLD_SYNC_CREATE_SPS_SELECT_LEN = 14079; // 1 +const static uint64_t SH_FLD_SYNC_DONE = 14080; // 1 +const static uint64_t SH_FLD_SYNC_DONE_LEN = 14081; // 1 +const static uint64_t SH_FLD_SYNC_FENCE = 14082; // 4 +const static uint64_t SH_FLD_SYNC_GO_CH0 = 14083; // 4 +const static uint64_t SH_FLD_SYNC_GO_CH1 = 14084; // 4 +const static uint64_t SH_FLD_SYNC_MODE = 14085; // 4 +const static uint64_t SH_FLD_SYNC_REPLAY_COUNT = 14086; // 4 +const static uint64_t SH_FLD_SYNC_REPLAY_COUNT_LEN = 14087; // 4 +const static uint64_t SH_FLD_SYNC_RESERVED = 14088; // 4 +const static uint64_t SH_FLD_SYNC_RESERVED_LEN = 14089; // 4 +const static uint64_t SH_FLD_SYNC_RESET = 14090; // 1 +const static uint64_t SH_FLD_SYNC_TIMER_SEL = 14091; // 17 +const static uint64_t SH_FLD_SYNC_TIMER_SEL_LEN = 14092; // 17 +const static uint64_t SH_FLD_SYNC_TYPE = 14093; // 4 +const static uint64_t SH_FLD_SYNC_TYPE_LEN = 14094; // 4 +const static uint64_t SH_FLD_SYNC_WAIT = 14095; // 1 +const static uint64_t SH_FLD_SYNC_WAIT_LEN = 14096; // 1 +const static uint64_t SH_FLD_SYN_HI_0_7 = 14097; // 1 +const static uint64_t SH_FLD_SYN_HI_0_7_LEN = 14098; // 1 +const static uint64_t SH_FLD_SYN_LO_0_7 = 14099; // 1 +const static uint64_t SH_FLD_SYN_LO_0_7_LEN = 14100; // 1 +const static uint64_t SH_FLD_SYSCLK_2X_MEMINTCLKO = 14101; // 8 +const static uint64_t SH_FLD_SYSCLK_CLK_GATE = 14102; // 8 +const static uint64_t SH_FLD_SYSCLK_RESET = 14103; // 8 +const static uint64_t SH_FLD_SYSMAP_SM_NOT_LG_SEL = 14104; // 12 +const static uint64_t SH_FLD_SYSTEM = 14105; // 2 +const static uint64_t SH_FLD_SYSTEM_CHECKSTOP = 14106; // 1 +const static uint64_t SH_FLD_SYSTEM_FAST_INIT = 14107; // 43 +const static uint64_t SH_FLD_SYSTEM_LEN = 14108; // 2 +const static uint64_t SH_FLD_SYSTEM_RESET = 14109; // 1 +const static uint64_t SH_FLD_S_PATH_0_PARITY = 14110; // 4 +const static uint64_t SH_FLD_S_PATH_0_STEP_CHECK = 14111; // 4 +const static uint64_t SH_FLD_S_PATH_0_STEP_CHECK_VALID = 14112; // 1 +const static uint64_t SH_FLD_S_PATH_1_PARITY = 14113; // 4 +const static uint64_t SH_FLD_S_PATH_1_STEP_CHECK = 14114; // 4 +const static uint64_t SH_FLD_S_PATH_1_STEP_CHECK_VALID = 14115; // 1 +const static uint64_t SH_FLD_S_PATH_SELECT = 14116; // 1 +const static uint64_t SH_FLD_T0_RUN_Q = 14117; // 24 +const static uint64_t SH_FLD_T1_RUN_Q = 14118; // 24 +const static uint64_t SH_FLD_T2_RUN_Q = 14119; // 24 +const static uint64_t SH_FLD_T3_RUN_Q = 14120; // 24 +const static uint64_t SH_FLD_T4_RUN_Q = 14121; // 24 +const static uint64_t SH_FLD_T5_RUN_Q = 14122; // 24 +const static uint64_t SH_FLD_T6_RUN_Q = 14123; // 24 +const static uint64_t SH_FLD_T7_RUN_Q = 14124; // 24 +const static uint64_t SH_FLD_TABLE_ADDRESS = 14125; // 1 +const static uint64_t SH_FLD_TABLE_ADDRESS_LEN = 14126; // 1 +const static uint64_t SH_FLD_TABLE_DATA = 14127; // 1 +const static uint64_t SH_FLD_TABLE_DATA_LEN = 14128; // 1 +const static uint64_t SH_FLD_TABLE_SELECT = 14129; // 1 +const static uint64_t SH_FLD_TABLE_SELECT_LEN = 14130; // 1 +const static uint64_t SH_FLD_TABLE_SEL_0_3 = 14131; // 1 +const static uint64_t SH_FLD_TABLE_SEL_0_3_LEN = 14132; // 1 +const static uint64_t SH_FLD_TAG_ECC = 14133; // 12 +const static uint64_t SH_FLD_TAG_ECC_LEN = 14134; // 12 +const static uint64_t SH_FLD_TARGET_DDE = 14135; // 3 +const static uint64_t SH_FLD_TARGET_DDE_LEN = 14136; // 3 +const static uint64_t SH_FLD_TARGET_ID0 = 14137; // 2 +const static uint64_t SH_FLD_TARGET_MIN = 14138; // 2 +const static uint64_t SH_FLD_TARGET_MIN_LEN = 14139; // 2 +const static uint64_t SH_FLD_TARGET_VALID = 14140; // 2 +const static uint64_t SH_FLD_TARGET_VALID_LEN = 14141; // 2 +const static uint64_t SH_FLD_TCBR_TP_PSI_GLB_ERR_0 = 14142; // 4 +const static uint64_t SH_FLD_TCBR_TP_PSI_GLB_ERR_1 = 14143; // 4 +const static uint64_t SH_FLD_TCD_PERR_ESR = 14144; // 1 +const static uint64_t SH_FLD_TCEP_AMUX_VSELECT_EQ = 14145; // 6 +const static uint64_t SH_FLD_TCEP_AMUX_VSELECT_EQ_LEN = 14146; // 6 +const static uint64_t SH_FLD_TCEP_AMUX_VSELECT_L3_DN = 14147; // 6 +const static uint64_t SH_FLD_TCEP_AMUX_VSELECT_L3_DN_LEN = 14148; // 6 +const static uint64_t SH_FLD_TCEP_AMUX_VSELECT_L3_UP = 14149; // 6 +const static uint64_t SH_FLD_TCEP_AMUX_VSELECT_L3_UP_LEN = 14150; // 6 +const static uint64_t SH_FLD_TCEP_AMUX_VSELECT_PWR_DN = 14151; // 6 +const static uint64_t SH_FLD_TCEP_AMUX_VSELECT_PWR_DN_LEN = 14152; // 6 +const static uint64_t SH_FLD_TCEP_AMUX_VSELECT_PWR_UP = 14153; // 6 +const static uint64_t SH_FLD_TCEP_AMUX_VSELECT_PWR_UP_LEN = 14154; // 6 +const static uint64_t SH_FLD_TCE_CACHE_1W = 14155; // 1 +const static uint64_t SH_FLD_TCE_CACHE_DISABLE = 14156; // 1 +const static uint64_t SH_FLD_TCE_CACHE_MULT_HIT_ERR_ESR = 14157; // 1 +const static uint64_t SH_FLD_TCE_PAGE_ACCESS_ERR_ESR = 14158; // 1 +const static uint64_t SH_FLD_TCE_REQ_TO_ERR_ESR = 14159; // 1 +const static uint64_t SH_FLD_TCE_RESPONSE = 14160; // 1 +const static uint64_t SH_FLD_TCE_TIMEOUT = 14161; // 1 +const static uint64_t SH_FLD_TCE_TIMEOUT_LEN = 14162; // 1 +const static uint64_t SH_FLD_TCK_WIDTH = 14163; // 1 +const static uint64_t SH_FLD_TCK_WIDTH_LEN = 14164; // 1 +const static uint64_t SH_FLD_TCPERV_AMUX_VSELECT_CHIP = 14165; // 1 +const static uint64_t SH_FLD_TCPERV_AMUX_VSELECT_CHIP_LEN = 14166; // 1 +const static uint64_t SH_FLD_TC_BSC_EXTMODE_DC = 14167; // 43 +const static uint64_t SH_FLD_TC_BSC_INTMODE_DC = 14168; // 43 +const static uint64_t SH_FLD_TC_BSC_INV_DC = 14169; // 43 +const static uint64_t SH_FLD_TC_BSC_WRAPSEL_DC = 14170; // 43 +const static uint64_t SH_FLD_TC_DIAG_PORT0_OUT = 14171; // 43 +const static uint64_t SH_FLD_TC_DIAG_PORT1_OUT = 14172; // 43 +const static uint64_t SH_FLD_TC_EDRAM_ABIST_MODE_DC = 14173; // 43 +const static uint64_t SH_FLD_TC_IOBIST_MODE_DC = 14174; // 43 +const static uint64_t SH_FLD_TC_IOM_DPHY01_PLL_RESET_N = 14175; // 2 +const static uint64_t SH_FLD_TC_IOM_DPHY23_PLL_RESET_N = 14176; // 2 +const static uint64_t SH_FLD_TC_IOP_HSSPCLKOUTEN = 14177; // 3 +const static uint64_t SH_FLD_TC_IOP_HSSPORWREN = 14178; // 3 +const static uint64_t SH_FLD_TC_IOP_SYS_RESET_PCS = 14179; // 3 +const static uint64_t SH_FLD_TC_IOP_SYS_RESET_PMA = 14180; // 3 +const static uint64_t SH_FLD_TC_LP_RESET = 14181; // 1 +const static uint64_t SH_FLD_TC_NBTI_HDR_ENABLE_OVR_DC = 14182; // 43 +const static uint64_t SH_FLD_TC_NBTI_PROBE_GATE_DC = 14183; // 43 +const static uint64_t SH_FLD_TC_OB_RATIO_DC = 14184; // 2 +const static uint64_t SH_FLD_TC_OB_RATIO_DC_LEN = 14185; // 2 +const static uint64_t SH_FLD_TC_OELCC_ALIGN_FLUSH_DC = 14186; // 43 +const static uint64_t SH_FLD_TC_OELCC_EDGE_DELAYED_DC = 14187; // 43 +const static uint64_t SH_FLD_TC_PBE0_IOVALID_DC = 14188; // 1 +const static uint64_t SH_FLD_TC_PBE1_IOVALID_DC = 14189; // 1 +const static uint64_t SH_FLD_TC_PBE2_IOVALID_DC = 14190; // 1 +const static uint64_t SH_FLD_TC_PBE3_IOVALID_DC = 14191; // 1 +const static uint64_t SH_FLD_TC_PBE4_IOVALID_DC = 14192; // 1 +const static uint64_t SH_FLD_TC_PBE5_IOVALID_DC = 14193; // 1 +const static uint64_t SH_FLD_TC_PBIOO0_IOVALID = 14194; // 2 +const static uint64_t SH_FLD_TC_PBIOO1_IOVALID = 14195; // 2 +const static uint64_t SH_FLD_TC_PCI0_IOVALID = 14196; // 1 +const static uint64_t SH_FLD_TC_PCI0_LANE_CFG_DC = 14197; // 1 +const static uint64_t SH_FLD_TC_PCI0_LANE_CFG_DC_LEN = 14198; // 1 +const static uint64_t SH_FLD_TC_PCI0_RATIO_DC = 14199; // 1 +const static uint64_t SH_FLD_TC_PCI0_RATIO_DC_LEN = 14200; // 1 +const static uint64_t SH_FLD_TC_PCI0_RATIO_OVERRIDE = 14201; // 1 +const static uint64_t SH_FLD_TC_PCI0_SWAP_DC = 14202; // 1 +const static uint64_t SH_FLD_TC_PCI1X_IOVALID = 14203; // 1 +const static uint64_t SH_FLD_TC_PCI1X_IOVALID_LEN = 14204; // 1 +const static uint64_t SH_FLD_TC_PCI1_LANE_CFG_DC = 14205; // 1 +const static uint64_t SH_FLD_TC_PCI1_LANE_CFG_DC_LEN = 14206; // 1 +const static uint64_t SH_FLD_TC_PCI1_PIPE1_RATIO_DC = 14207; // 1 +const static uint64_t SH_FLD_TC_PCI1_PIPE1_RATIO_DC_LEN = 14208; // 1 +const static uint64_t SH_FLD_TC_PCI1_PIPE2_RATIO_DC = 14209; // 1 +const static uint64_t SH_FLD_TC_PCI1_PIPE2_RATIO_DC_LEN = 14210; // 1 +const static uint64_t SH_FLD_TC_PCI1_RATIO_OVERRIDE = 14211; // 1 +const static uint64_t SH_FLD_TC_PCI1_RATIO_OVERRIDE_LEN = 14212; // 1 +const static uint64_t SH_FLD_TC_PCI1_SWAP_DC = 14213; // 1 +const static uint64_t SH_FLD_TC_PCI1_SWAP_DC_LEN = 14214; // 1 +const static uint64_t SH_FLD_TC_PCI2_IOVALID = 14215; // 1 +const static uint64_t SH_FLD_TC_PCI2_IOVALID_LEN = 14216; // 1 +const static uint64_t SH_FLD_TC_PCI2_LANE_CFG_DC = 14217; // 1 +const static uint64_t SH_FLD_TC_PCI2_LANE_CFG_DC_LEN = 14218; // 1 +const static uint64_t SH_FLD_TC_PCI2_PIPE1_RATIO_DC = 14219; // 1 +const static uint64_t SH_FLD_TC_PCI2_PIPE1_RATIO_DC_LEN = 14220; // 1 +const static uint64_t SH_FLD_TC_PCI2_PIPE2_RATIO_DC = 14221; // 1 +const static uint64_t SH_FLD_TC_PCI2_PIPE2_RATIO_DC_LEN = 14222; // 1 +const static uint64_t SH_FLD_TC_PCI2_PIPE3_RATIO_DC = 14223; // 1 +const static uint64_t SH_FLD_TC_PCI2_PIPE3_RATIO_DC_LEN = 14224; // 1 +const static uint64_t SH_FLD_TC_PCI2_RATIO_OVERRIDE = 14225; // 1 +const static uint64_t SH_FLD_TC_PCI2_RATIO_OVERRIDE_LEN = 14226; // 1 +const static uint64_t SH_FLD_TC_PCI2_SWAP_DC = 14227; // 1 +const static uint64_t SH_FLD_TC_PCI2_SWAP_DC_LEN = 14228; // 1 +const static uint64_t SH_FLD_TC_PERV_EXPORT_FREEZE = 14229; // 1 +const static uint64_t SH_FLD_TC_PERV_REGION_FENCE = 14230; // 43 +const static uint64_t SH_FLD_TC_PSI_IOVALID_DC = 14231; // 1 +const static uint64_t SH_FLD_TC_PSRO_SEL_DC = 14232; // 43 +const static uint64_t SH_FLD_TC_PSRO_SEL_DC_LEN = 14233; // 43 +const static uint64_t SH_FLD_TC_REFCLK_DRVR_EN_DC = 14234; // 43 +const static uint64_t SH_FLD_TC_REGION1_FENCE = 14235; // 42 +const static uint64_t SH_FLD_TC_REGION2_FENCE = 14236; // 42 +const static uint64_t SH_FLD_TC_REGION3_FENCE = 14237; // 16 +const static uint64_t SH_FLD_TC_REGION4_FENCE = 14238; // 12 +const static uint64_t SH_FLD_TC_REGION5_FENCE = 14239; // 10 +const static uint64_t SH_FLD_TC_REGION6_FENCE = 14240; // 8 +const static uint64_t SH_FLD_TC_REGION7_FENCE = 14241; // 7 +const static uint64_t SH_FLD_TC_REGION8_FENCE = 14242; // 6 +const static uint64_t SH_FLD_TC_REGION9_FENCE = 14243; // 6 +const static uint64_t SH_FLD_TC_SKIT_MODE_BIST_DC = 14244; // 43 +const static uint64_t SH_FLD_TC_SRAM_ABIST_MODE_DC = 14245; // 43 +const static uint64_t SH_FLD_TC_START_TEST_DC = 14246; // 43 +const static uint64_t SH_FLD_TC_UNIT_ARY_WRT_THRU_DC = 14247; // 43 +const static uint64_t SH_FLD_TC_UNIT_AVP_MODE = 14248; // 43 +const static uint64_t SH_FLD_TC_UNIT_CHIP_ID_DC = 14249; // 43 +const static uint64_t SH_FLD_TC_UNIT_CHIP_ID_DC_LEN = 14250; // 43 +const static uint64_t SH_FLD_TC_UNIT_CONSTRAIN_SAFESCAN_DC = 14251; // 43 +const static uint64_t SH_FLD_TC_UNIT_DETERMINISTIC_TEST_ENABLE_DC = 14252; // 43 +const static uint64_t SH_FLD_TC_UNIT_GROUP_ID_DC = 14253; // 43 +const static uint64_t SH_FLD_TC_UNIT_GROUP_ID_DC_LEN = 14254; // 43 +const static uint64_t SH_FLD_TC_UNIT_IOBIST_TX_WRAP_ENABLE_DC = 14255; // 43 +const static uint64_t SH_FLD_TC_UNIT_MULTICYCLE_TEST_FENCE = 14256; // 43 +const static uint64_t SH_FLD_TC_UNIT_RRFA_TEST_ENABLE_DC = 14257; // 43 +const static uint64_t SH_FLD_TC_UNIT_SYNCCLK_MUXSEL_DC = 14258; // 43 +const static uint64_t SH_FLD_TC_UNIT_SYS_ID_DC = 14259; // 43 +const static uint64_t SH_FLD_TC_UNIT_SYS_ID_DC_LEN = 14260; // 43 +const static uint64_t SH_FLD_TC_VITL_REGION_FENCE = 14261; // 43 +const static uint64_t SH_FLD_TDR_DAC_CNTL = 14262; // 4 +const static uint64_t SH_FLD_TDR_DAC_CNTL_LEN = 14263; // 4 +const static uint64_t SH_FLD_TDR_PERR_ESR = 14264; // 1 +const static uint64_t SH_FLD_TDR_PHASE_SEL = 14265; // 4 +const static uint64_t SH_FLD_TDR_PULSE_OFFSET = 14266; // 4 +const static uint64_t SH_FLD_TDR_PULSE_OFFSET_LEN = 14267; // 4 +const static uint64_t SH_FLD_TDR_PULSE_WIDTH = 14268; // 4 +const static uint64_t SH_FLD_TDR_PULSE_WIDTH_LEN = 14269; // 4 +const static uint64_t SH_FLD_TER = 14270; // 8 +const static uint64_t SH_FLD_TERM_ENC = 14271; // 1 +const static uint64_t SH_FLD_TERM_ENC_LEN = 14272; // 1 +const static uint64_t SH_FLD_TERM_TEST = 14273; // 1 +const static uint64_t SH_FLD_TER_LEN = 14274; // 8 +const static uint64_t SH_FLD_TER_V = 14275; // 8 +const static uint64_t SH_FLD_TEST_ENABLE = 14276; // 43 +const static uint64_t SH_FLD_TFAC_ERR = 14277; // 96 +const static uint64_t SH_FLD_TFMR_PARITY_ERR = 14278; // 96 +const static uint64_t SH_FLD_TGT_NODAL_DINC_ERR = 14279; // 12 +const static uint64_t SH_FLD_TGT_NODAL_REQ_DINC_ERR = 14280; // 12 +const static uint64_t SH_FLD_THERM_MODE = 14281; // 43 +const static uint64_t SH_FLD_THERM_MODEREG_PARITY_MASK = 14282; // 43 +const static uint64_t SH_FLD_THERM_MODE_LEN = 14283; // 43 +const static uint64_t SH_FLD_THERM_TRIP = 14284; // 43 +const static uint64_t SH_FLD_THERM_TRIP_LEN = 14285; // 43 +const static uint64_t SH_FLD_THRDID = 14286; // 4 +const static uint64_t SH_FLD_THRDID_LEN = 14287; // 4 +const static uint64_t SH_FLD_THREEPHAS = 14288; // 3 +const static uint64_t SH_FLD_THRESHOLD = 14289; // 1 +const static uint64_t SH_FLD_THRESH_0 = 14290; // 3 +const static uint64_t SH_FLD_THRESH_0_LEN = 14291; // 3 +const static uint64_t SH_FLD_THRESH_1 = 14292; // 3 +const static uint64_t SH_FLD_THRESH_1_LEN = 14293; // 3 +const static uint64_t SH_FLD_THRESH_2 = 14294; // 3 +const static uint64_t SH_FLD_THRESH_2_LEN = 14295; // 3 +const static uint64_t SH_FLD_THRES_ENA = 14296; // 43 +const static uint64_t SH_FLD_THRES_ENA_LEN = 14297; // 43 +const static uint64_t SH_FLD_THRES_OVERFLOW_MASK = 14298; // 43 +const static uint64_t SH_FLD_THRES_STATE_MASK = 14299; // 43 +const static uint64_t SH_FLD_THRES_TRIP_ENA = 14300; // 43 +const static uint64_t SH_FLD_THRES_TRIP_ENA_LEN = 14301; // 43 +const static uint64_t SH_FLD_THRID = 14302; // 1 +const static uint64_t SH_FLD_THRID_LEN = 14303; // 1 +const static uint64_t SH_FLD_THR_ID = 14304; // 1 +const static uint64_t SH_FLD_THR_ID_LEN = 14305; // 1 +const static uint64_t SH_FLD_TID = 14306; // 8 +const static uint64_t SH_FLD_TID_LEN = 14307; // 8 +const static uint64_t SH_FLD_TIER0_VALUE = 14308; // 12 +const static uint64_t SH_FLD_TIER0_VALUE_LEN = 14309; // 12 +const static uint64_t SH_FLD_TIER1_VALUE = 14310; // 24 +const static uint64_t SH_FLD_TIER1_VALUE_LEN = 14311; // 24 +const static uint64_t SH_FLD_TIER2_VALUE = 14312; // 24 +const static uint64_t SH_FLD_TIER2_VALUE_LEN = 14313; // 24 +const static uint64_t SH_FLD_TIME = 14314; // 43 +const static uint64_t SH_FLD_TIMEBASE = 14315; // 330 +const static uint64_t SH_FLD_TIMEBASE_ENABLE = 14316; // 1 +const static uint64_t SH_FLD_TIMEBASE_LEN = 14317; // 330 +const static uint64_t SH_FLD_TIMEFAC_ERROR_INJ = 14318; // 24 +const static uint64_t SH_FLD_TIMEFAC_ERROR_INJ_LEN = 14319; // 24 +const static uint64_t SH_FLD_TIMEOUT_ACTIVE = 14320; // 2 +const static uint64_t SH_FLD_TIMEOUT_EN = 14321; // 1 +const static uint64_t SH_FLD_TIMEOUT_MASK = 14322; // 43 +const static uint64_t SH_FLD_TIMEOUT_N = 14323; // 2 +const static uint64_t SH_FLD_TIMEOUT_PARITY = 14324; // 43 +const static uint64_t SH_FLD_TIMEOUT_SEL = 14325; // 3 +const static uint64_t SH_FLD_TIMEOUT_SEL_LEN = 14326; // 3 +const static uint64_t SH_FLD_TIMEOUT_VALUE = 14327; // 1 +const static uint64_t SH_FLD_TIMEOUT_VALUE_LEN = 14328; // 1 +const static uint64_t SH_FLD_TIMER = 14329; // 4 +const static uint64_t SH_FLD_TIMER_ENABLE = 14330; // 4 +const static uint64_t SH_FLD_TIMER_EXPIRED_RECOV_ERROR = 14331; // 4 +const static uint64_t SH_FLD_TIMER_EXPIRED_XSTOP_ERROR = 14332; // 4 +const static uint64_t SH_FLD_TIMER_LEN = 14333; // 4 +const static uint64_t SH_FLD_TIMER_N = 14334; // 2 +const static uint64_t SH_FLD_TIMER_N_LEN = 14335; // 2 +const static uint64_t SH_FLD_TIMER_PERIOD_MASK = 14336; // 4 +const static uint64_t SH_FLD_TIMER_PERIOD_MASK_LEN = 14337; // 4 +const static uint64_t SH_FLD_TIMESTAMP_COUNTER_OVERFLOW_ERR = 14338; // 43 +const static uint64_t SH_FLD_TIMESTAMP_COUNTER_VALUE = 14339; // 43 +const static uint64_t SH_FLD_TIMESTAMP_COUNTER_VALUE_LEN = 14340; // 43 +const static uint64_t SH_FLD_TIME_BASE_ERR = 14341; // 4 +const static uint64_t SH_FLD_TLBIE_CNT_THRESH = 14342; // 13 +const static uint64_t SH_FLD_TLBIE_CNT_THRESH_LEN = 14343; // 13 +const static uint64_t SH_FLD_TLBIE_CNT_WT4TX_CORE_EN = 14344; // 12 +const static uint64_t SH_FLD_TLBIE_CONTROL_ERR = 14345; // 24 +const static uint64_t SH_FLD_TLBIE_DEC_RATE = 14346; // 13 +const static uint64_t SH_FLD_TLBIE_DEC_RATE_LEN = 14347; // 13 +const static uint64_t SH_FLD_TLBIE_INC_RATE = 14348; // 13 +const static uint64_t SH_FLD_TLBIE_INC_RATE_LEN = 14349; // 13 +const static uint64_t SH_FLD_TLBIE_MASTER_TIMEOUT = 14350; // 24 +const static uint64_t SH_FLD_TLBIE_PACING_CNT_EN = 14351; // 12 +const static uint64_t SH_FLD_TLBIE_SLBIEG_SW_ERR = 14352; // 12 +const static uint64_t SH_FLD_TLBIE_SNOOP_TIMEOUT = 14353; // 24 +const static uint64_t SH_FLD_TLBIE_STALL_CMPLT_CNT = 14354; // 14 +const static uint64_t SH_FLD_TLBIE_STALL_CMPLT_CNT_LEN = 14355; // 14 +const static uint64_t SH_FLD_TLBIE_STALL_DELAY_CNT = 14356; // 14 +const static uint64_t SH_FLD_TLBIE_STALL_DELAY_CNT_LEN = 14357; // 14 +const static uint64_t SH_FLD_TLBIE_STALL_EN = 14358; // 14 +const static uint64_t SH_FLD_TLBIE_STALL_THRESHOLD = 14359; // 14 +const static uint64_t SH_FLD_TLBIE_STALL_THRESHOLD_LEN = 14360; // 14 +const static uint64_t SH_FLD_TLBIE_SW_ERR = 14361; // 12 +const static uint64_t SH_FLD_TLBI_BAD_OP_ERR = 14362; // 4 +const static uint64_t SH_FLD_TLBI_DATA_POLL_PULSE_DIV = 14363; // 2 +const static uint64_t SH_FLD_TLBI_DATA_POLL_PULSE_DIV_LEN = 14364; // 2 +const static uint64_t SH_FLD_TLBI_FENCE = 14365; // 2 +const static uint64_t SH_FLD_TLBI_GROUP_PUMP_EN = 14366; // 12 +const static uint64_t SH_FLD_TLBI_PSL_DEAD = 14367; // 2 +const static uint64_t SH_FLD_TLBI_SEQ_ERR = 14368; // 4 +const static uint64_t SH_FLD_TLBI_SEQ_NUM_PARITY_ERR = 14369; // 4 +const static uint64_t SH_FLD_TLBI_TIMEOUT = 14370; // 4 +const static uint64_t SH_FLD_TLB_BUS0_STG1_SEL = 14371; // 1 +const static uint64_t SH_FLD_TLB_BUS0_STG2_SEL = 14372; // 1 +const static uint64_t SH_FLD_TLB_BUS1_STG1_SEL = 14373; // 1 +const static uint64_t SH_FLD_TLB_BUS1_STG2_SEL = 14374; // 1 +const static uint64_t SH_FLD_TLB_CHK_WAIT_DEC = 14375; // 12 +const static uint64_t SH_FLD_TLB_CHK_WAIT_DEC_LEN = 14376; // 12 +const static uint64_t SH_FLD_TLB_SNOOP_DATA_POLL_PULSE_DIV = 14377; // 12 +const static uint64_t SH_FLD_TLB_SNOOP_DATA_POLL_PULSE_DIV_LEN = 14378; // 12 +const static uint64_t SH_FLD_TLB_STG1_HANG_POLL_PULSE_DIV = 14379; // 12 +const static uint64_t SH_FLD_TLB_STG1_HANG_POLL_PULSE_DIV_LEN = 14380; // 12 +const static uint64_t SH_FLD_TLB_STG2_HANG_POLL_PULSE_DIV = 14381; // 12 +const static uint64_t SH_FLD_TLB_STG2_HANG_POLL_PULSE_DIV_LEN = 14382; // 12 +const static uint64_t SH_FLD_TMOD_CYCLES = 14383; // 8 +const static uint64_t SH_FLD_TMOD_CYCLES_LEN = 14384; // 8 +const static uint64_t SH_FLD_TMRSC_CYCLES = 14385; // 8 +const static uint64_t SH_FLD_TMRSC_CYCLES_LEN = 14386; // 8 +const static uint64_t SH_FLD_TMR_PE = 14387; // 8 +const static uint64_t SH_FLD_TM_CAM_ERR = 14388; // 12 +const static uint64_t SH_FLD_TM_CAM_ERR_LEN = 14389; // 12 +const static uint64_t SH_FLD_TODTLON_OFF_CYCLES = 14390; // 8 +const static uint64_t SH_FLD_TODTLON_OFF_CYCLES_LEN = 14391; // 8 +const static uint64_t SH_FLD_TOD_CMD_OVERRUN = 14392; // 1 +const static uint64_t SH_FLD_TOD_CNTR_REF = 14393; // 1 +const static uint64_t SH_FLD_TOD_CNTR_REF_LEN = 14394; // 1 +const static uint64_t SH_FLD_TOD_HANG_ERR = 14395; // 1 +const static uint64_t SH_FLD_TOO_MANY_BUS_ERRORS = 14396; // 8 +const static uint64_t SH_FLD_TOR_PERR_ESR = 14397; // 1 +const static uint64_t SH_FLD_TOTAL_FREE_BUF_COUNT = 14398; // 1 +const static uint64_t SH_FLD_TOTAL_FREE_BUF_COUNT_LEN = 14399; // 1 +const static uint64_t SH_FLD_TOTAL_GAP_COUNTS = 14400; // 8 +const static uint64_t SH_FLD_TOTAL_GAP_COUNTS_LEN = 14401; // 8 +const static uint64_t SH_FLD_TPCFSI_OPB_SW0_FENCE_DC = 14402; // 1 +const static uint64_t SH_FLD_TPCFSI_OPB_SW0_FENCE_DC_LEN = 14403; // 1 +const static uint64_t SH_FLD_TPCFSI_OPB_SW1_FENCE_DC = 14404; // 1 +const static uint64_t SH_FLD_TPCFSI_OPB_SW1_FENCE_DC_LEN = 14405; // 1 +const static uint64_t SH_FLD_TPCFSI_OPB_SW_RESET_DC = 14406; // 1 +const static uint64_t SH_FLD_TPFSI_ALTREFCLK_SE1 = 14407; // 1 +const static uint64_t SH_FLD_TPFSI_ALTREFCLK_SEL = 14408; // 1 +const static uint64_t SH_FLD_TPFSI_ARRAY_SET_VBL_TO_VDD_DC = 14409; // 1 +const static uint64_t SH_FLD_TPFSI_OFFCHIP_REFCLK_EN_DC = 14410; // 1 +const static uint64_t SH_FLD_TPFSI_OFFCHIP_REFCLK_EN_DC_LEN = 14411; // 1 +const static uint64_t SH_FLD_TPFSI_OSCSW0_PGOOD_N = 14412; // 1 +const static uint64_t SH_FLD_TPFSI_OSCSW1_PGOOD = 14413; // 1 +const static uint64_t SH_FLD_TPFSI_OSCSW_ERRINJ0_DC = 14414; // 1 +const static uint64_t SH_FLD_TPFSI_OSCSW_ERRINJ0_DC_LEN = 14415; // 1 +const static uint64_t SH_FLD_TPFSI_OSCSW_ERRINJ1_DC = 14416; // 1 +const static uint64_t SH_FLD_TPFSI_OSCSW_ERRINJ1_DC_LEN = 14417; // 1 +const static uint64_t SH_FLD_TPFSI_OSCSW_SKEW_ADJUST_DC = 14418; // 1 +const static uint64_t SH_FLD_TPFSI_OSCSW_SKEW_ADJUST_DC_LEN = 14419; // 1 +const static uint64_t SH_FLD_TPFSI_OSCSW_SNS_CONTENT_SEL_DC = 14420; // 1 +const static uint64_t SH_FLD_TPFSI_OSCSW_SNS_CONTENT_SEL_DC_LEN = 14421; // 1 +const static uint64_t SH_FLD_TPFSI_OSCSW_TWEAK_DC = 14422; // 1 +const static uint64_t SH_FLD_TPFSI_OSCSW_TWEAK_DC_LEN = 14423; // 1 +const static uint64_t SH_FLD_TPFSI_SBE_FENCE_VTLIO_DC = 14424; // 1 +const static uint64_t SH_FLD_TPFSI_TPI2C_BUS_FENCE_DC = 14425; // 1 +const static uint64_t SH_FLD_TPFSI_TP_FENCE_VTLIO_DC = 14426; // 1 +const static uint64_t SH_FLD_TPFSI_TP_LOWFREQTEST_REFCLK_DC = 14427; // 1 +const static uint64_t SH_FLD_TPFSI_TP_PFET_FORCE_OFF_DC = 14428; // 1 +const static uint64_t SH_FLD_TPFSI_TP_PFET_OVERRIDE_ON_DC_N = 14429; // 1 +const static uint64_t SH_FLD_TPFSI_TP_VSB_DBG_PCB_ASYNC_EN_DC = 14430; // 1 +const static uint64_t SH_FLD_TPFSI_TP_VSB_DBG_PCB_DATA_PAR_DIS_DC = 14431; // 1 +const static uint64_t SH_FLD_TPFSI_TP_VSB_DBG_PCB_TYPE_PAR_DIS_DC = 14432; // 1 +const static uint64_t SH_FLD_TPFSI_TP_VSB_PCB_GSD_LATCHED_MODE_DC = 14433; // 1 +const static uint64_t SH_FLD_TP_ARRAY_WRITE_ASSIST_EN_DC = 14434; // 1 +const static uint64_t SH_FLD_TP_CHIPLET_EN_DC = 14435; // 1 +const static uint64_t SH_FLD_TP_CLK_ASYNC_RESET_DC = 14436; // 1 +const static uint64_t SH_FLD_TP_CLK_DIV_BYPASS_EN_DC = 14437; // 1 +const static uint64_t SH_FLD_TP_CLK_PDLY_BYPASS1_EN_DC = 14438; // 1 +const static uint64_t SH_FLD_TP_CLK_PDLY_BYPASS2_EN_DC = 14439; // 1 +const static uint64_t SH_FLD_TP_CLK_PULSE_ENABLE_DC = 14440; // 1 +const static uint64_t SH_FLD_TP_CLK_PULSE_MODE_DC = 14441; // 1 +const static uint64_t SH_FLD_TP_CLK_PULSE_MODE_DC_LEN = 14442; // 1 +const static uint64_t SH_FLD_TP_CPM_CAL_SET = 14443; // 1 +const static uint64_t SH_FLD_TP_DI1_DC_B = 14444; // 1 +const static uint64_t SH_FLD_TP_DI1_DC_N = 14445; // 1 +const static uint64_t SH_FLD_TP_DI2_DC_B = 14446; // 1 +const static uint64_t SH_FLD_TP_DI2_DC_N = 14447; // 1 +const static uint64_t SH_FLD_TP_EDRAM_ENABLE_DC = 14448; // 1 +const static uint64_t SH_FLD_TP_EXSD_FULLSPEED_DC = 14449; // 1 +const static uint64_t SH_FLD_TP_EX_FUSE_FP_THROTTLE_EN_DC = 14450; // 1 +const static uint64_t SH_FLD_TP_EX_FUSE_VMX_CRYPTO_DIS_DC = 14451; // 1 +const static uint64_t SH_FLD_TP_FENCE_EN_DC = 14452; // 1 +const static uint64_t SH_FLD_TP_FENCE_PCB = 14453; // 43 +const static uint64_t SH_FLD_TP_FENCE_PCB_DC = 14454; // 1 +const static uint64_t SH_FLD_TP_FILTPLL_CP_ALT_BYPASS_DC = 14455; // 1 +const static uint64_t SH_FLD_TP_FILTPLL_IO_ALT_BYPASS_DC = 14456; // 1 +const static uint64_t SH_FLD_TP_FILTPLL_PLL_BYPASS1_DC = 14457; // 1 +const static uint64_t SH_FLD_TP_FILTPLL_PLL_RESET1_DC = 14458; // 1 +const static uint64_t SH_FLD_TP_FLUSH_ALIGN_OVERWRITE = 14459; // 1 +const static uint64_t SH_FLD_TP_FLUSH_SCAN_DC_N = 14460; // 1 +const static uint64_t SH_FLD_TP_FSI_CLKIN_SEL_DC = 14461; // 1 +const static uint64_t SH_FLD_TP_FSI_PROBE_SEL_DC = 14462; // 1 +const static uint64_t SH_FLD_TP_FSI_PROBE_SEL_DC_LEN = 14463; // 1 +const static uint64_t SH_FLD_TP_GLBCK_MEM_TESTCLK_SEL_DC = 14464; // 1 +const static uint64_t SH_FLD_TP_GLBCK_VSB_NEST_VREGDLY_SHUTOFF_DC = 14465; // 1 +const static uint64_t SH_FLD_TP_GLBCK_VSB_PCIESW_TWEAK_DC = 14466; // 1 +const static uint64_t SH_FLD_TP_GLBCK_VSB_PCIESW_TWEAK_DC_LEN = 14467; // 1 +const static uint64_t SH_FLD_TP_GLBCK_VSB_PCIESW_USEOSC_DC = 14468; // 1 +const static uint64_t SH_FLD_TP_GLBCK_VSB_PCIESW_USEOSC_DC_LEN = 14469; // 1 +const static uint64_t SH_FLD_TP_GPIO_PIB_TIMEOUT = 14470; // 1 +const static uint64_t SH_FLD_TP_GPIO_PIB_TIMEOUT_LEN = 14471; // 1 +const static uint64_t SH_FLD_TP_IDDQ_DC = 14472; // 1 +const static uint64_t SH_FLD_TP_LVLTRANS_FENCE_DC = 14473; // 1 +const static uint64_t SH_FLD_TP_NX_ALLOW_CRYPTO_DC = 14474; // 1 +const static uint64_t SH_FLD_TP_OSCSWITCH_VSB = 14475; // 1 +const static uint64_t SH_FLD_TP_OSCSWITCH_VSB_LEN = 14476; // 1 +const static uint64_t SH_FLD_TP_PCB_EP_RESET_DC = 14477; // 1 +const static uint64_t SH_FLD_TP_PCB_PM_MUX_SEL_DC = 14478; // 1 +const static uint64_t SH_FLD_TP_PCIREFCLK_RCVR_TERM_DC = 14479; // 1 +const static uint64_t SH_FLD_TP_PCIREFCLK_RCVR_TERM_DC_LEN = 14480; // 1 +const static uint64_t SH_FLD_TP_PIB_TRACE_MODE_DATA_DC = 14481; // 1 +const static uint64_t SH_FLD_TP_PIB_VSB_DISABLE_PARITY_DC = 14482; // 1 +const static uint64_t SH_FLD_TP_PIB_VSB_SBE_TRACE_MODE = 14483; // 1 +const static uint64_t SH_FLD_TP_PLLBYP_DC = 14484; // 1 +const static uint64_t SH_FLD_TP_PLLREFCLK_RCVR_TERM_DC = 14485; // 1 +const static uint64_t SH_FLD_TP_PLLREFCLK_RCVR_TERM_DC_LEN = 14486; // 1 +const static uint64_t SH_FLD_TP_PLLRST_DC = 14487; // 1 +const static uint64_t SH_FLD_TP_PLL_CLKIN_SEL1_DC = 14488; // 1 +const static uint64_t SH_FLD_TP_PLL_CLKIN_SEL2_DC = 14489; // 1 +const static uint64_t SH_FLD_TP_PLL_CLKIN_SEL3_DC = 14490; // 1 +const static uint64_t SH_FLD_TP_PLL_CLKIN_SEL4_DC = 14491; // 1 +const static uint64_t SH_FLD_TP_PLL_FORCE_OUT_EN_DC = 14492; // 1 +const static uint64_t SH_FLD_TP_PLL_TEST_ENABLE_DC = 14493; // 1 +const static uint64_t SH_FLD_TP_PLL_TEST_EN_DC = 14494; // 1 +const static uint64_t SH_FLD_TP_PROBE0_SEL_DC = 14495; // 1 +const static uint64_t SH_FLD_TP_PROBE0_SEL_DC_LEN = 14496; // 1 +const static uint64_t SH_FLD_TP_PROBE1_SEL_DC = 14497; // 1 +const static uint64_t SH_FLD_TP_PROBE1_SEL_DC_LEN = 14498; // 1 +const static uint64_t SH_FLD_TP_PROBE_DRV_EN_DC = 14499; // 1 +const static uint64_t SH_FLD_TP_PROBE_HIGHDRIVE_DC = 14500; // 1 +const static uint64_t SH_FLD_TP_PROBE_MESH_SEL_DC = 14501; // 1 +const static uint64_t SH_FLD_TP_RESCLK_DIS_DC = 14502; // 1 +const static uint64_t SH_FLD_TP_RI_DC_B = 14503; // 1 +const static uint64_t SH_FLD_TP_RI_DC_N = 14504; // 1 +const static uint64_t SH_FLD_TP_SEC_BUF_DRV_STRENGTH_DC = 14505; // 1 +const static uint64_t SH_FLD_TP_SEC_BUF_DRV_STRENGTH_DC_LEN = 14506; // 1 +const static uint64_t SH_FLD_TP_SSPLL_PLL_BYPASS0_DC = 14507; // 1 +const static uint64_t SH_FLD_TP_SSPLL_PLL_RESET0_DC = 14508; // 1 +const static uint64_t SH_FLD_TP_TANKPLL_TEST_PLL_BYPASS2_DC = 14509; // 1 +const static uint64_t SH_FLD_TP_TEST_BURNIN_MODE_DC = 14510; // 1 +const static uint64_t SH_FLD_TP_TPCPERV_VSB_TRACE_STOP = 14511; // 1 +const static uint64_t SH_FLD_TP_TPFSI_ACK = 14512; // 43 +const static uint64_t SH_FLD_TP_VCS_PFET_ENABLE_ACTUAL = 14513; // 30 +const static uint64_t SH_FLD_TP_VCS_PFET_ENABLE_ACTUAL_LEN = 14514; // 30 +const static uint64_t SH_FLD_TP_VDD_PFET_ENABLE_ACTUAL = 14515; // 30 +const static uint64_t SH_FLD_TP_VDD_PFET_ENABLE_ACTUAL_LEN = 14516; // 30 +const static uint64_t SH_FLD_TP_VITL_ACT_DIS_DC = 14517; // 1 +const static uint64_t SH_FLD_TP_VITL_CLKOFF_DC = 14518; // 1 +const static uint64_t SH_FLD_TP_VITL_DELAY_LCLKR_DC = 14519; // 1 +const static uint64_t SH_FLD_TP_VITL_MPW1_DC_N = 14520; // 1 +const static uint64_t SH_FLD_TP_VITL_MPW2_DC_N = 14521; // 1 +const static uint64_t SH_FLD_TP_VITL_MPW3_DC_N = 14522; // 1 +const static uint64_t SH_FLD_TP_VITL_SCAN_CLK_DC = 14523; // 1 +const static uint64_t SH_FLD_TP_VITL_SCIN_DC = 14524; // 1 +const static uint64_t SH_FLD_TRACE_BUS_BITS_64_87 = 14525; // 1 +const static uint64_t SH_FLD_TRACE_BUS_BITS_64_87_LEN = 14526; // 1 +const static uint64_t SH_FLD_TRACE_BUS_EN = 14527; // 1 +const static uint64_t SH_FLD_TRACE_BUS_SEL_0_1 = 14528; // 1 +const static uint64_t SH_FLD_TRACE_BUS_SEL_0_1_LEN = 14529; // 1 +const static uint64_t SH_FLD_TRACE_BUS_TRIGGER_BITS = 14530; // 1 +const static uint64_t SH_FLD_TRACE_BUS_TRIGGER_BITS_LEN = 14531; // 1 +const static uint64_t SH_FLD_TRACE_DATA_SELECT = 14532; // 1 +const static uint64_t SH_FLD_TRACE_DATA_SELECT_LEN = 14533; // 1 +const static uint64_t SH_FLD_TRACE_DISABLE = 14534; // 1 +const static uint64_t SH_FLD_TRACE_ENABLE = 14535; // 6 +const static uint64_t SH_FLD_TRACE_EVENT = 14536; // 1 +const static uint64_t SH_FLD_TRACE_MUX_SEL = 14537; // 1 +const static uint64_t SH_FLD_TRACE_SEL = 14538; // 1 +const static uint64_t SH_FLD_TRACE_SELECT = 14539; // 2 +const static uint64_t SH_FLD_TRACE_SELECT_LEN = 14540; // 2 +const static uint64_t SH_FLD_TRACE_SEL_0_1 = 14541; // 1 +const static uint64_t SH_FLD_TRACE_SEL_0_1_LEN = 14542; // 1 +const static uint64_t SH_FLD_TRACE_SEL_LEN = 14543; // 1 +const static uint64_t SH_FLD_TRACE_TRIGGER = 14544; // 1 +const static uint64_t SH_FLD_TRACKING_TIMEOUT_SEL = 14545; // 6 +const static uint64_t SH_FLD_TRACKING_TIMEOUT_SEL_LEN = 14546; // 6 +const static uint64_t SH_FLD_TRANSPORT_INFORMATIONAL_ERR = 14547; // 4 +const static uint64_t SH_FLD_TRANS_DELAY = 14548; // 1 +const static uint64_t SH_FLD_TRANS_DELAY_LEN = 14549; // 1 +const static uint64_t SH_FLD_TRASH_EN = 14550; // 12 +const static uint64_t SH_FLD_TRCD_CYCLES = 14551; // 8 +const static uint64_t SH_FLD_TRCD_CYCLES_LEN = 14552; // 8 +const static uint64_t SH_FLD_TRC_CMD_OVERRUN = 14553; // 1 +const static uint64_t SH_FLD_TRC_CYCLES = 14554; // 8 +const static uint64_t SH_FLD_TRC_CYCLES_LEN = 14555; // 8 +const static uint64_t SH_FLD_TRC_MODE = 14556; // 6 +const static uint64_t SH_FLD_TRC_MODE_LEN = 14557; // 6 +const static uint64_t SH_FLD_TRFC_CYCLES = 14558; // 8 +const static uint64_t SH_FLD_TRFC_CYCLES_LEN = 14559; // 8 +const static uint64_t SH_FLD_TRIG = 14560; // 17 +const static uint64_t SH_FLD_TRIGGER = 14561; // 31 +const static uint64_t SH_FLD_TRIGGER_OPCG_ON = 14562; // 129 +const static uint64_t SH_FLD_TRIG_FIR_HMI = 14563; // 96 +const static uint64_t SH_FLD_TRIG_OVERIDE = 14564; // 24 +const static uint64_t SH_FLD_TRP_CYCLES = 14565; // 8 +const static uint64_t SH_FLD_TRP_CYCLES_LEN = 14566; // 8 +const static uint64_t SH_FLD_TRRD = 14567; // 8 +const static uint64_t SH_FLD_TRRD_LEN = 14568; // 8 +const static uint64_t SH_FLD_TRRD_SBG = 14569; // 8 +const static uint64_t SH_FLD_TRRD_SBG_LEN = 14570; // 8 +const static uint64_t SH_FLD_TRST_B_EQ0_ERR = 14571; // 1 +const static uint64_t SH_FLD_TRY_ATR_RO = 14572; // 1 +const static uint64_t SH_FLD_TSIZE = 14573; // 1 +const static uint64_t SH_FLD_TSIZE_4_6 = 14574; // 1 +const static uint64_t SH_FLD_TSIZE_4_6_LEN = 14575; // 1 +const static uint64_t SH_FLD_TSIZE_MASK = 14576; // 8 +const static uint64_t SH_FLD_TSIZE_MASK_LEN = 14577; // 8 +const static uint64_t SH_FLD_TSIZE_MATCH = 14578; // 8 +const static uint64_t SH_FLD_TSIZE_MATCH_LEN = 14579; // 8 +const static uint64_t SH_FLD_TTAG_PARITY_ERROR = 14580; // 2 +const static uint64_t SH_FLD_TTYPE_MATCH = 14581; // 8 +const static uint64_t SH_FLD_TTYPE_MATCH_LEN = 14582; // 8 +const static uint64_t SH_FLD_TTYPE_REPLACE = 14583; // 8 +const static uint64_t SH_FLD_TTYPE_REPLACE_LEN = 14584; // 8 +const static uint64_t SH_FLD_TVT0_PAGE_SIZE = 14585; // 1 +const static uint64_t SH_FLD_TVT0_PAGE_SIZE_LEN = 14586; // 1 +const static uint64_t SH_FLD_TVT0_SPARE = 14587; // 1 +const static uint64_t SH_FLD_TVT0_SPARE_LEN = 14588; // 1 +const static uint64_t SH_FLD_TVT0_TABLE_LEVEL = 14589; // 1 +const static uint64_t SH_FLD_TVT0_TABLE_LEVEL_LEN = 14590; // 1 +const static uint64_t SH_FLD_TVT0_TABLE_SIZE = 14591; // 1 +const static uint64_t SH_FLD_TVT0_TABLE_SIZE_LEN = 14592; // 1 +const static uint64_t SH_FLD_TVT0_XLAT_ADDR = 14593; // 1 +const static uint64_t SH_FLD_TVT0_XLAT_ADDR_LEN = 14594; // 1 +const static uint64_t SH_FLD_TVT_ADDR_RANGE_ERR_ESR = 14595; // 1 +const static uint64_t SH_FLD_TVT_ENTRY_INVALID_ESR = 14596; // 1 +const static uint64_t SH_FLD_TVT_PERR_ESR = 14597; // 1 +const static uint64_t SH_FLD_TWLDQSEN_CYCLES = 14598; // 8 +const static uint64_t SH_FLD_TWLDQSEN_CYCLES_LEN = 14599; // 8 +const static uint64_t SH_FLD_TWLO_TWLOE = 14600; // 8 +const static uint64_t SH_FLD_TWLO_TWLOE_LEN = 14601; // 8 +const static uint64_t SH_FLD_TWO_CYCLE_ADDR_EN = 14602; // 8 +const static uint64_t SH_FLD_TWRMRD_CYCLES = 14603; // 8 +const static uint64_t SH_FLD_TWRMRD_CYCLES_LEN = 14604; // 8 +const static uint64_t SH_FLD_TWSM_DIS = 14605; // 1 +const static uint64_t SH_FLD_TWSM_DIS_LEN = 14606; // 1 +const static uint64_t SH_FLD_TW_ATT_HPT_SAO_FOLD_DIS = 14607; // 1 +const static uint64_t SH_FLD_TW_ATT_RDX_NIO_FOLD_DIS = 14608; // 1 +const static uint64_t SH_FLD_TW_ATT_RDX_SAO_FOLD_DIS = 14609; // 1 +const static uint64_t SH_FLD_TW_ATT_RDX_TIO_FOLD_DIS = 14610; // 1 +const static uint64_t SH_FLD_TW_BUS0_STG1_SEL = 14611; // 1 +const static uint64_t SH_FLD_TW_BUS0_STG2_SEL = 14612; // 1 +const static uint64_t SH_FLD_TW_BUS1_STG1_SEL = 14613; // 1 +const static uint64_t SH_FLD_TW_BUS1_STG2_SEL = 14614; // 1 +const static uint64_t SH_FLD_TW_LCO_RDX_C_DIS = 14615; // 1 +const static uint64_t SH_FLD_TW_LCO_RDX_EN = 14616; // 1 +const static uint64_t SH_FLD_TW_LCO_RDX_PDE_EN = 14617; // 1 +const static uint64_t SH_FLD_TW_LCO_RDX_PWC_L2_DIS = 14618; // 1 +const static uint64_t SH_FLD_TW_LCO_RDX_PWC_L3_DIS = 14619; // 1 +const static uint64_t SH_FLD_TW_LCO_RDX_PWC_L4_DIS = 14620; // 1 +const static uint64_t SH_FLD_TW_LCO_RDX_P_DIS = 14621; // 1 +const static uint64_t SH_FLD_TXAERR = 14622; // 6 +const static uint64_t SH_FLD_TXBERR = 14623; // 6 +const static uint64_t SH_FLD_TXCERR = 14624; // 6 +const static uint64_t SH_FLD_TXDERR = 14625; // 6 +const static uint64_t SH_FLD_TXEERR = 14626; // 6 +const static uint64_t SH_FLD_TXFERR = 14627; // 6 +const static uint64_t SH_FLD_TXGERR = 14628; // 6 +const static uint64_t SH_FLD_TXHERR = 14629; // 6 +const static uint64_t SH_FLD_TXIERR = 14630; // 6 +const static uint64_t SH_FLD_TXJERR = 14631; // 6 +const static uint64_t SH_FLD_TXKERR = 14632; // 6 +const static uint64_t SH_FLD_TXLERR = 14633; // 6 +const static uint64_t SH_FLD_TXMERR = 14634; // 6 +const static uint64_t SH_FLD_TXNERR = 14635; // 6 +const static uint64_t SH_FLD_TXOERR = 14636; // 6 +const static uint64_t SH_FLD_TXPERR = 14637; // 6 +const static uint64_t SH_FLD_TX_BUS_WIDTH = 14638; // 4 +const static uint64_t SH_FLD_TX_BUS_WIDTH_LEN = 14639; // 4 +const static uint64_t SH_FLD_TX_DATA_ECC_CORR_ENA = 14640; // 6 +const static uint64_t SH_FLD_TX_ECC_DATA_POISON_ENA = 14641; // 6 +const static uint64_t SH_FLD_TX_SLS_DISABLE = 14642; // 4 +const static uint64_t SH_FLD_TX_TRISTATE_CNTL = 14643; // 8 +const static uint64_t SH_FLD_TX_TTYPE_PIB_MST_FSM_STATE_DISABLE = 14644; // 1 +const static uint64_t SH_FLD_TX_TTYPE_PIB_MST_IF_RESET = 14645; // 1 +const static uint64_t SH_FLD_TYPE = 14646; // 108 +const static uint64_t SH_FLD_TYPE_LEN = 14647; // 44 +const static uint64_t SH_FLD_TZQCS_CYCLES = 14648; // 8 +const static uint64_t SH_FLD_TZQCS_CYCLES_LEN = 14649; // 8 +const static uint64_t SH_FLD_TZQINIT_CYCLES = 14650; // 8 +const static uint64_t SH_FLD_TZQINIT_CYCLES_LEN = 14651; // 8 +const static uint64_t SH_FLD_UE1_0_OUT = 14652; // 4 +const static uint64_t SH_FLD_UE1_1_OUT = 14653; // 4 +const static uint64_t SH_FLD_UE1_2_OUT = 14654; // 4 +const static uint64_t SH_FLD_UE1_3_OUT = 14655; // 4 +const static uint64_t SH_FLD_UE1_4_OUT = 14656; // 4 +const static uint64_t SH_FLD_UE1_5_OUT = 14657; // 4 +const static uint64_t SH_FLD_UE1_6_OUT = 14658; // 4 +const static uint64_t SH_FLD_UE1_7_OUT = 14659; // 4 +const static uint64_t SH_FLD_UE2_0_OUT = 14660; // 4 +const static uint64_t SH_FLD_UE2_1_OUT = 14661; // 4 +const static uint64_t SH_FLD_UE2_2_OUT = 14662; // 4 +const static uint64_t SH_FLD_UE2_3_OUT = 14663; // 4 +const static uint64_t SH_FLD_UE2_4_OUT = 14664; // 4 +const static uint64_t SH_FLD_UE2_5_OUT = 14665; // 4 +const static uint64_t SH_FLD_UE2_6_OUT = 14666; // 4 +const static uint64_t SH_FLD_UE2_7_OUT = 14667; // 4 +const static uint64_t SH_FLD_UE_COUNT = 14668; // 2 +const static uint64_t SH_FLD_UE_COUNT_LEN = 14669; // 2 +const static uint64_t SH_FLD_UE_DISABLE = 14670; // 2 +const static uint64_t SH_FLD_UMAC_CRB_SUE = 14671; // 1 +const static uint64_t SH_FLD_UMAC_CRB_UE = 14672; // 1 +const static uint64_t SH_FLD_UMAC_LD_LINK_ERR = 14673; // 1 +const static uint64_t SH_FLD_UMAC_LINK_ABORT = 14674; // 1 +const static uint64_t SH_FLD_UMAC_MUX_SELECT = 14675; // 1 +const static uint64_t SH_FLD_UMAC_MUX_SELECT_LEN = 14676; // 1 +const static uint64_t SH_FLD_UMAC_RD_DISABLE_GROUP = 14677; // 1 +const static uint64_t SH_FLD_UMAC_RD_DISABLE_LN = 14678; // 1 +const static uint64_t SH_FLD_UMAC_RD_DISABLE_NN_RN = 14679; // 1 +const static uint64_t SH_FLD_UMAC_RD_DISABLE_VG_NOT_SYS = 14680; // 1 +const static uint64_t SH_FLD_UMAC_WC_INT_ADDR_UE = 14681; // 1 +const static uint64_t SH_FLD_UMAC_WR_DISABLE_GROUP = 14682; // 1 +const static uint64_t SH_FLD_UMAC_WR_DISABLE_LN = 14683; // 1 +const static uint64_t SH_FLD_UMAC_WR_DISABLE_NN_RN = 14684; // 1 +const static uint64_t SH_FLD_UMAC_WR_DISABLE_VG_NOT_SYS = 14685; // 1 +const static uint64_t SH_FLD_UNCORR_ERROR = 14686; // 1 +const static uint64_t SH_FLD_UNEXPECTEDCRESP = 14687; // 9 +const static uint64_t SH_FLD_UNEXPECTEDCRESP_MASK = 14688; // 9 +const static uint64_t SH_FLD_UNEXPECTED_PB = 14689; // 4 +const static uint64_t SH_FLD_UNEXPECT_DATA = 14690; // 1 +const static uint64_t SH_FLD_UNIT1 = 14691; // 215 +const static uint64_t SH_FLD_UNIT10 = 14692; // 215 +const static uint64_t SH_FLD_UNIT2 = 14693; // 215 +const static uint64_t SH_FLD_UNIT3 = 14694; // 215 +const static uint64_t SH_FLD_UNIT4 = 14695; // 215 +const static uint64_t SH_FLD_UNIT5 = 14696; // 215 +const static uint64_t SH_FLD_UNIT6 = 14697; // 215 +const static uint64_t SH_FLD_UNIT7 = 14698; // 215 +const static uint64_t SH_FLD_UNIT8 = 14699; // 215 +const static uint64_t SH_FLD_UNIT9 = 14700; // 215 +const static uint64_t SH_FLD_UNIT_REGION_CLKCMD_ENABLE = 14701; // 43 +const static uint64_t SH_FLD_UNLOAD_CLK_DISABLE = 14702; // 116 +const static uint64_t SH_FLD_UNLOAD_SEL = 14703; // 116 +const static uint64_t SH_FLD_UNLOAD_SEL_LEN = 14704; // 116 +const static uint64_t SH_FLD_UNSOLICITIEDPBDATA = 14705; // 9 +const static uint64_t SH_FLD_UNSOLICITIEDPBDATA_MASK = 14706; // 9 +const static uint64_t SH_FLD_UNTRUSTED = 14707; // 4 +const static uint64_t SH_FLD_UNTRUSTED_LEN = 14708; // 4 +const static uint64_t SH_FLD_UNUSED = 14709; // 131 +const static uint64_t SH_FLD_UNUSED0 = 14710; // 1 +const static uint64_t SH_FLD_UNUSED1 = 14711; // 46 +const static uint64_t SH_FLD_UNUSED1520 = 14712; // 43 +const static uint64_t SH_FLD_UNUSED1520_LEN = 14713; // 43 +const static uint64_t SH_FLD_UNUSED1_LEN = 14714; // 45 +const static uint64_t SH_FLD_UNUSED2 = 14715; // 48 +const static uint64_t SH_FLD_UNUSED23_31 = 14716; // 7 +const static uint64_t SH_FLD_UNUSED23_31_LEN = 14717; // 7 +const static uint64_t SH_FLD_UNUSED2_LEN = 14718; // 44 +const static uint64_t SH_FLD_UNUSED3 = 14719; // 47 +const static uint64_t SH_FLD_UNUSED3_LEN = 14720; // 1 +const static uint64_t SH_FLD_UNUSED4 = 14721; // 9 +const static uint64_t SH_FLD_UNUSED41_63 = 14722; // 43 +const static uint64_t SH_FLD_UNUSED41_63_LEN = 14723; // 43 +const static uint64_t SH_FLD_UNUSED46 = 14724; // 43 +const static uint64_t SH_FLD_UNUSED4_LEN = 14725; // 1 +const static uint64_t SH_FLD_UNUSED5 = 14726; // 7 +const static uint64_t SH_FLD_UNUSED63 = 14727; // 3 +const static uint64_t SH_FLD_UNUSED78 = 14728; // 43 +const static uint64_t SH_FLD_UNUSED78_LEN = 14729; // 43 +const static uint64_t SH_FLD_UNUSED88 = 14730; // 3 +const static uint64_t SH_FLD_UNUSED88_LEN = 14731; // 3 +const static uint64_t SH_FLD_UNUSED919 = 14732; // 43 +const static uint64_t SH_FLD_UNUSED919_LEN = 14733; // 43 +const static uint64_t SH_FLD_UNUSED_0 = 14734; // 44 +const static uint64_t SH_FLD_UNUSED_0B = 14735; // 43 +const static uint64_t SH_FLD_UNUSED_0D = 14736; // 36 +const static uint64_t SH_FLD_UNUSED_0_LEN = 14737; // 1 +const static uint64_t SH_FLD_UNUSED_1 = 14738; // 44 +const static uint64_t SH_FLD_UNUSED_10B = 14739; // 35 +const static uint64_t SH_FLD_UNUSED_11B = 14740; // 36 +const static uint64_t SH_FLD_UNUSED_12B = 14741; // 37 +const static uint64_t SH_FLD_UNUSED_13B = 14742; // 37 +const static uint64_t SH_FLD_UNUSED_14B = 14743; // 43 +const static uint64_t SH_FLD_UNUSED_16_22 = 14744; // 1 +const static uint64_t SH_FLD_UNUSED_16_22_LEN = 14745; // 1 +const static uint64_t SH_FLD_UNUSED_17B = 14746; // 43 +const static uint64_t SH_FLD_UNUSED_18B = 14747; // 43 +const static uint64_t SH_FLD_UNUSED_19B = 14748; // 43 +const static uint64_t SH_FLD_UNUSED_1B = 14749; // 43 +const static uint64_t SH_FLD_UNUSED_1D = 14750; // 36 +const static uint64_t SH_FLD_UNUSED_1_LEN = 14751; // 1 +const static uint64_t SH_FLD_UNUSED_2 = 14752; // 1 +const static uint64_t SH_FLD_UNUSED_20B = 14753; // 42 +const static uint64_t SH_FLD_UNUSED_21B = 14754; // 43 +const static uint64_t SH_FLD_UNUSED_22B = 14755; // 43 +const static uint64_t SH_FLD_UNUSED_23B = 14756; // 43 +const static uint64_t SH_FLD_UNUSED_24B = 14757; // 43 +const static uint64_t SH_FLD_UNUSED_25B = 14758; // 43 +const static uint64_t SH_FLD_UNUSED_26B = 14759; // 43 +const static uint64_t SH_FLD_UNUSED_26_31 = 14760; // 1 +const static uint64_t SH_FLD_UNUSED_26_31_LEN = 14761; // 1 +const static uint64_t SH_FLD_UNUSED_27B = 14762; // 43 +const static uint64_t SH_FLD_UNUSED_28B = 14763; // 43 +const static uint64_t SH_FLD_UNUSED_29B = 14764; // 43 +const static uint64_t SH_FLD_UNUSED_2B = 14765; // 43 +const static uint64_t SH_FLD_UNUSED_2D = 14766; // 36 +const static uint64_t SH_FLD_UNUSED_2_LEN = 14767; // 1 +const static uint64_t SH_FLD_UNUSED_3 = 14768; // 1 +const static uint64_t SH_FLD_UNUSED_30B = 14769; // 43 +const static uint64_t SH_FLD_UNUSED_31B = 14770; // 43 +const static uint64_t SH_FLD_UNUSED_39_43 = 14771; // 1 +const static uint64_t SH_FLD_UNUSED_39_43_LEN = 14772; // 1 +const static uint64_t SH_FLD_UNUSED_3D = 14773; // 36 +const static uint64_t SH_FLD_UNUSED_3_LEN = 14774; // 1 +const static uint64_t SH_FLD_UNUSED_47_51 = 14775; // 1 +const static uint64_t SH_FLD_UNUSED_47_51_LEN = 14776; // 1 +const static uint64_t SH_FLD_UNUSED_4_15 = 14777; // 1 +const static uint64_t SH_FLD_UNUSED_4_15_LEN = 14778; // 1 +const static uint64_t SH_FLD_UNUSED_53 = 14779; // 1 +const static uint64_t SH_FLD_UNUSED_5B = 14780; // 1 +const static uint64_t SH_FLD_UNUSED_6B = 14781; // 1 +const static uint64_t SH_FLD_UNUSED_7B = 14782; // 27 +const static uint64_t SH_FLD_UNUSED_8B = 14783; // 31 +const static uint64_t SH_FLD_UNUSED_8_14 = 14784; // 1 +const static uint64_t SH_FLD_UNUSED_8_14_LEN = 14785; // 1 +const static uint64_t SH_FLD_UNUSED_9B = 14786; // 33 +const static uint64_t SH_FLD_UNUSED_LEN = 14787; // 88 +const static uint64_t SH_FLD_UPSTREAM = 14788; // 4 +const static uint64_t SH_FLD_USERDEF_CFG = 14789; // 6 +const static uint64_t SH_FLD_USERDEF_CFG_LEN = 14790; // 6 +const static uint64_t SH_FLD_USERDEF_TIMEOUT = 14791; // 6 +const static uint64_t SH_FLD_USERDEF_TIMEOUT_LEN = 14792; // 6 +const static uint64_t SH_FLD_USER_FILTER_MASK = 14793; // 6 +const static uint64_t SH_FLD_USER_FILTER_MASK_LEN = 14794; // 6 +const static uint64_t SH_FLD_USE_ARY_CLK_DURING_FILL = 14795; // 43 +const static uint64_t SH_FLD_USE_FOR_SCAN = 14796; // 43 +const static uint64_t SH_FLD_USE_OSC_OBSERVATION = 14797; // 1 +const static uint64_t SH_FLD_USE_OSC_OBSERVATION_LEN = 14798; // 1 +const static uint64_t SH_FLD_USE_PECE = 14799; // 24 +const static uint64_t SH_FLD_USE_PECE_LEN = 14800; // 24 +const static uint64_t SH_FLD_USE_SLS_AS_SPR = 14801; // 4 +const static uint64_t SH_FLD_USE_TB_STEP_SYNC = 14802; // 1 +const static uint64_t SH_FLD_USE_TB_SYNC_MECHANISM = 14803; // 1 +const static uint64_t SH_FLD_USE_WATCH_TO_READ_CTRL_ARY = 14804; // 1 +const static uint64_t SH_FLD_VALID = 14805; // 61 +const static uint64_t SH_FLD_VALID_ATRGPA0 = 14806; // 256 +const static uint64_t SH_FLD_VALID_ATRGPA1 = 14807; // 256 +const static uint64_t SH_FLD_VALID_ATSD = 14808; // 256 +const static uint64_t SH_FLD_VALID_ENTRY = 14809; // 1 +const static uint64_t SH_FLD_VALUE = 14810; // 50 +const static uint64_t SH_FLD_VALUES0 = 14811; // 16 +const static uint64_t SH_FLD_VALUES0_LEN = 14812; // 16 +const static uint64_t SH_FLD_VALUES1 = 14813; // 16 +const static uint64_t SH_FLD_VALUES1_LEN = 14814; // 16 +const static uint64_t SH_FLD_VALUES2 = 14815; // 16 +const static uint64_t SH_FLD_VALUES2_LEN = 14816; // 16 +const static uint64_t SH_FLD_VALUES3 = 14817; // 16 +const static uint64_t SH_FLD_VALUES3_LEN = 14818; // 16 +const static uint64_t SH_FLD_VALUES4 = 14819; // 16 +const static uint64_t SH_FLD_VALUES4_LEN = 14820; // 16 +const static uint64_t SH_FLD_VALUES5 = 14821; // 16 +const static uint64_t SH_FLD_VALUES5_LEN = 14822; // 16 +const static uint64_t SH_FLD_VALUES6 = 14823; // 16 +const static uint64_t SH_FLD_VALUES6_LEN = 14824; // 16 +const static uint64_t SH_FLD_VALUES7 = 14825; // 16 +const static uint64_t SH_FLD_VALUES7_LEN = 14826; // 16 +const static uint64_t SH_FLD_VALUE_LEN = 14827; // 50 +const static uint64_t SH_FLD_VAS_LOCAL_XSTOP = 14828; // 1 +const static uint64_t SH_FLD_VBGENDOC = 14829; // 3 +const static uint64_t SH_FLD_VBGENDOC_LEN = 14830; // 3 +const static uint64_t SH_FLD_VCC_REG_PD = 14831; // 8 +const static uint64_t SH_FLD_VCORANGE = 14832; // 10 +const static uint64_t SH_FLD_VCORANGE_LEN = 14833; // 10 +const static uint64_t SH_FLD_VCOSEL = 14834; // 16 +const static uint64_t SH_FLD_VCS_PFETS_DISABLED_SENSE = 14835; // 30 +const static uint64_t SH_FLD_VCS_PFETS_ENABLED_SENSE = 14836; // 30 +const static uint64_t SH_FLD_VCS_PFET_ENABLE_VALUE = 14837; // 30 +const static uint64_t SH_FLD_VCS_PFET_ENABLE_VALUE_LEN = 14838; // 30 +const static uint64_t SH_FLD_VCS_PFET_FORCE_STATE = 14839; // 30 +const static uint64_t SH_FLD_VCS_PFET_FORCE_STATE_LEN = 14840; // 30 +const static uint64_t SH_FLD_VCS_PFET_SEL_OVERRIDE = 14841; // 30 +const static uint64_t SH_FLD_VCS_PFET_SEL_VALUE = 14842; // 30 +const static uint64_t SH_FLD_VCS_PFET_SEL_VALUE_LEN = 14843; // 30 +const static uint64_t SH_FLD_VCS_PFET_VAL_OVERRIDE = 14844; // 30 +const static uint64_t SH_FLD_VCS_PG_SEL = 14845; // 30 +const static uint64_t SH_FLD_VCS_PG_SEL_LEN = 14846; // 30 +const static uint64_t SH_FLD_VCS_PG_STATE = 14847; // 30 +const static uint64_t SH_FLD_VCS_PG_STATE_LEN = 14848; // 30 +const static uint64_t SH_FLD_VCS_VOFF_SEL = 14849; // 30 +const static uint64_t SH_FLD_VCS_VOFF_SEL_LEN = 14850; // 30 +const static uint64_t SH_FLD_VC_PRIORITY_LIMIT_0_3 = 14851; // 1 +const static uint64_t SH_FLD_VC_PRIORITY_LIMIT_0_3_LEN = 14852; // 1 +const static uint64_t SH_FLD_VDD2VIO_LVL_FENCE_DC = 14853; // 1 +const static uint64_t SH_FLD_VDD_NEST_OBSERVE = 14854; // 1 +const static uint64_t SH_FLD_VDD_PFETS_DISABLED_SENSE = 14855; // 30 +const static uint64_t SH_FLD_VDD_PFETS_ENABLED_SENSE = 14856; // 30 +const static uint64_t SH_FLD_VDD_PFET_ENABLE_VALUE = 14857; // 30 +const static uint64_t SH_FLD_VDD_PFET_ENABLE_VALUE_LEN = 14858; // 30 +const static uint64_t SH_FLD_VDD_PFET_FORCE_STATE = 14859; // 30 +const static uint64_t SH_FLD_VDD_PFET_FORCE_STATE_LEN = 14860; // 30 +const static uint64_t SH_FLD_VDD_PFET_REGULATION_FINGER_EN = 14861; // 30 +const static uint64_t SH_FLD_VDD_PFET_REGULATION_FINGER_VALUE = 14862; // 30 +const static uint64_t SH_FLD_VDD_PFET_SEL_OVERRIDE = 14863; // 30 +const static uint64_t SH_FLD_VDD_PFET_SEL_VALUE = 14864; // 30 +const static uint64_t SH_FLD_VDD_PFET_SEL_VALUE_LEN = 14865; // 30 +const static uint64_t SH_FLD_VDD_PFET_VAL_OVERRIDE = 14866; // 30 +const static uint64_t SH_FLD_VDD_PG_SEL = 14867; // 30 +const static uint64_t SH_FLD_VDD_PG_SEL_LEN = 14868; // 30 +const static uint64_t SH_FLD_VDD_PG_STATE = 14869; // 30 +const static uint64_t SH_FLD_VDD_PG_STATE_LEN = 14870; // 30 +const static uint64_t SH_FLD_VDD_VOFF_SEL = 14871; // 30 +const static uint64_t SH_FLD_VDD_VOFF_SEL_LEN = 14872; // 30 +const static uint64_t SH_FLD_VDM_DISABLE = 14873; // 30 +const static uint64_t SH_FLD_VDM_DROOP_LARGE = 14874; // 6 +const static uint64_t SH_FLD_VDM_DROOP_LARGE_LEN = 14875; // 6 +const static uint64_t SH_FLD_VDM_DROOP_SMALL = 14876; // 6 +const static uint64_t SH_FLD_VDM_DROOP_SMALL_LEN = 14877; // 6 +const static uint64_t SH_FLD_VDM_DROOP_XTREME = 14878; // 6 +const static uint64_t SH_FLD_VDM_DROOP_XTREME_LEN = 14879; // 6 +const static uint64_t SH_FLD_VDM_EXTREME_DROOP_CTR = 14880; // 12 +const static uint64_t SH_FLD_VDM_EXTREME_DROOP_CTR_LEN = 14881; // 12 +const static uint64_t SH_FLD_VDM_LARGE_DROOP_CTR = 14882; // 12 +const static uint64_t SH_FLD_VDM_LARGE_DROOP_CTR_LEN = 14883; // 12 +const static uint64_t SH_FLD_VDM_LCL_SAMPLE_EN = 14884; // 12 +const static uint64_t SH_FLD_VDM_NO_DROOP_CTR = 14885; // 12 +const static uint64_t SH_FLD_VDM_NO_DROOP_CTR_LEN = 14886; // 12 +const static uint64_t SH_FLD_VDM_OVERVOLT = 14887; // 6 +const static uint64_t SH_FLD_VDM_OVERVOLT_CTR = 14888; // 12 +const static uint64_t SH_FLD_VDM_OVERVOLT_CTR_LEN = 14889; // 12 +const static uint64_t SH_FLD_VDM_OVERVOLT_LEN = 14890; // 6 +const static uint64_t SH_FLD_VDM_POWERON = 14891; // 30 +const static uint64_t SH_FLD_VDM_SMALL_DROOP_CTR = 14892; // 12 +const static uint64_t SH_FLD_VDM_SMALL_DROOP_CTR_LEN = 14893; // 12 +const static uint64_t SH_FLD_VDM_VID_COMPARE = 14894; // 6 +const static uint64_t SH_FLD_VDM_VID_COMPARE_LEN = 14895; // 6 +const static uint64_t SH_FLD_VECTOR_GROUP_EPSILON = 14896; // 8 +const static uint64_t SH_FLD_VECTOR_GROUP_EPSILON_LEN = 14897; // 8 +const static uint64_t SH_FLD_VG_COUNT = 14898; // 2 +const static uint64_t SH_FLD_VG_COUNT_LEN = 14899; // 2 +const static uint64_t SH_FLD_VG_TARGE = 14900; // 1 +const static uint64_t SH_FLD_VG_TARGET_SEL = 14901; // 24 +const static uint64_t SH_FLD_VG_TARGE_LEN = 14902; // 1 +const static uint64_t SH_FLD_VID_COMPARE_MAX = 14903; // 6 +const static uint64_t SH_FLD_VID_COMPARE_MAX_LEN = 14904; // 6 +const static uint64_t SH_FLD_VID_COMPARE_MIN = 14905; // 6 +const static uint64_t SH_FLD_VID_COMPARE_MIN_LEN = 14906; // 6 +const static uint64_t SH_FLD_VITAL_SCAN = 14907; // 43 +const static uint64_t SH_FLD_VITAL_SCAN_IN = 14908; // 43 +const static uint64_t SH_FLD_VITAL_THOLD = 14909; // 43 +const static uint64_t SH_FLD_VITL = 14910; // 43 +const static uint64_t SH_FLD_VITL_CLKOFF = 14911; // 43 +const static uint64_t SH_FLD_VLD = 14912; // 4 +const static uint64_t SH_FLD_VOFF_CFG = 14913; // 6 +const static uint64_t SH_FLD_VOFF_CFG_LEN = 14914; // 6 +const static uint64_t SH_FLD_VOLT_MODEREG_PARITY_MASK = 14915; // 43 +const static uint64_t SH_FLD_VPROTH_CTL = 14916; // 8 +const static uint64_t SH_FLD_VPROTH_CTL_LEN = 14917; // 8 +const static uint64_t SH_FLD_VREF = 14918; // 1 +const static uint64_t SH_FLD_VREFDQ0D = 14919; // 8 +const static uint64_t SH_FLD_VREFDQ0DSGN = 14920; // 8 +const static uint64_t SH_FLD_VREFDQ0D_LEN = 14921; // 8 +const static uint64_t SH_FLD_VREFDQ1D = 14922; // 8 +const static uint64_t SH_FLD_VREFDQ1DSGN = 14923; // 8 +const static uint64_t SH_FLD_VREFDQ1D_LEN = 14924; // 8 +const static uint64_t SH_FLD_VREFTUNE = 14925; // 3 +const static uint64_t SH_FLD_VREFTUNE_LEN = 14926; // 3 +const static uint64_t SH_FLD_VREF_LEN = 14927; // 1 +const static uint64_t SH_FLD_VREGBYP = 14928; // 6 +const static uint64_t SH_FLD_VREGBYPASS = 14929; // 4 +const static uint64_t SH_FLD_VREGENABLE_N = 14930; // 4 +const static uint64_t SH_FLD_VSEL = 14931; // 10 +const static uint64_t SH_FLD_VSEL_LEN = 14932; // 10 +const static uint64_t SH_FLD_VST_TYPE = 14933; // 1 +const static uint64_t SH_FLD_VST_TYPE_LEN = 14934; // 1 +const static uint64_t SH_FLD_VTARGET = 14935; // 4 +const static uint64_t SH_FLD_VTARGET_LEN = 14936; // 4 +const static uint64_t SH_FLD_V_TARG = 14937; // 1 +const static uint64_t SH_FLD_V_TARG_LEN = 14938; // 1 +const static uint64_t SH_FLD_W0_COUNT = 14939; // 12 +const static uint64_t SH_FLD_W0_COUNT_LEN = 14940; // 12 +const static uint64_t SH_FLD_W1_COUNT = 14941; // 12 +const static uint64_t SH_FLD_W1_COUNT_LEN = 14942; // 12 +const static uint64_t SH_FLD_WAITING = 14943; // 2 +const static uint64_t SH_FLD_WAIT_ALLWAYS = 14944; // 129 +const static uint64_t SH_FLD_WAIT_CYCLES = 14945; // 172 +const static uint64_t SH_FLD_WAIT_CYCLES_LEN = 14946; // 172 +const static uint64_t SH_FLD_WAKEUP_PULSE = 14947; // 1 +const static uint64_t SH_FLD_WAKEUP_PULSE_LEN = 14948; // 1 +const static uint64_t SH_FLD_WANT_CACHE_DISABLE = 14949; // 3 +const static uint64_t SH_FLD_WANT_INVALIDATE = 14950; // 2 +const static uint64_t SH_FLD_WARB_INVALID_CASE_ERROR = 14951; // 2 +const static uint64_t SH_FLD_WARM_START_COMPLETED = 14952; // 2 +const static uint64_t SH_FLD_WATCHDOG_SEL = 14953; // 17 +const static uint64_t SH_FLD_WATCHDOG_SEL_LEN = 14954; // 17 +const static uint64_t SH_FLD_WATERMARK_REG = 14955; // 1 +const static uint64_t SH_FLD_WATERMARK_REG_0 = 14956; // 1 +const static uint64_t SH_FLD_WATERMARK_REG_0_LEN = 14957; // 1 +const static uint64_t SH_FLD_WATERMARK_REG_1 = 14958; // 1 +const static uint64_t SH_FLD_WATERMARK_REG_1_LEN = 14959; // 1 +const static uint64_t SH_FLD_WATERMARK_REG_2 = 14960; // 1 +const static uint64_t SH_FLD_WATERMARK_REG_2_LEN = 14961; // 1 +const static uint64_t SH_FLD_WATERMARK_REG_3 = 14962; // 1 +const static uint64_t SH_FLD_WATERMARK_REG_3_LEN = 14963; // 1 +const static uint64_t SH_FLD_WATERMARK_REG_LEN = 14964; // 1 +const static uint64_t SH_FLD_WAT_DEBUG_ATTN = 14965; // 10 +const static uint64_t SH_FLD_WAT_ERROR = 14966; // 16 +const static uint64_t SH_FLD_WBMGR_DBG_0_SELECT = 14967; // 8 +const static uint64_t SH_FLD_WBMGR_DBG_1_SELECT = 14968; // 8 +const static uint64_t SH_FLD_WBRD_DEBUG_0_SELECT = 14969; // 8 +const static uint64_t SH_FLD_WBRD_DEBUG_1_SELECT = 14970; // 8 +const static uint64_t SH_FLD_WC = 14971; // 8 +const static uint64_t SH_FLD_WC_BS_BAR = 14972; // 1 +const static uint64_t SH_FLD_WC_BS_BAR_LEN = 14973; // 1 +const static uint64_t SH_FLD_WC_CERR_BITS = 14974; // 1 +const static uint64_t SH_FLD_WC_CERR_BITS_LEN = 14975; // 1 +const static uint64_t SH_FLD_WC_CERR_RESET = 14976; // 1 +const static uint64_t SH_FLD_WC_ECC_CE_ERROR = 14977; // 2 +const static uint64_t SH_FLD_WC_ECC_SUE_ERROR = 14978; // 2 +const static uint64_t SH_FLD_WC_ECC_UE_ERROR = 14979; // 2 +const static uint64_t SH_FLD_WC_LOGIC_HW_ERROR = 14980; // 2 +const static uint64_t SH_FLD_WC_MASK = 14981; // 8 +const static uint64_t SH_FLD_WC_TRACE_GROUP_SEL_HI = 14982; // 1 +const static uint64_t SH_FLD_WC_TRACE_GROUP_SEL_HI_LEN = 14983; // 1 +const static uint64_t SH_FLD_WC_TRACE_GROUP_SEL_LO = 14984; // 1 +const static uint64_t SH_FLD_WC_TRACE_GROUP_SEL_LO_LEN = 14985; // 1 +const static uint64_t SH_FLD_WC_TRACE_TRIGGER_SEL_01 = 14986; // 1 +const static uint64_t SH_FLD_WC_TRACE_TRIGGER_SEL_01_LEN = 14987; // 1 +const static uint64_t SH_FLD_WC_TRACE_TRIGGER_SEL_23 = 14988; // 1 +const static uint64_t SH_FLD_WC_TRACE_TRIGGER_SEL_23_LEN = 14989; // 1 +const static uint64_t SH_FLD_WDATA = 14990; // 1 +const static uint64_t SH_FLD_WDATA_LEN = 14991; // 1 +const static uint64_t SH_FLD_WDF_ASYNC_INTERFACE_ERROR = 14992; // 8 +const static uint64_t SH_FLD_WDF_ERR_INJECT0 = 14993; // 8 +const static uint64_t SH_FLD_WDF_ERR_INJECT0_LEN = 14994; // 8 +const static uint64_t SH_FLD_WDF_MISC_REGISTER_PARITY_ERROR = 14995; // 8 +const static uint64_t SH_FLD_WDF_OVERRUN_ERROR_0 = 14996; // 8 +const static uint64_t SH_FLD_WDF_OVERRUN_ERROR_1 = 14997; // 8 +const static uint64_t SH_FLD_WDF_SCOM_SEQUENCE_ERROR = 14998; // 8 +const static uint64_t SH_FLD_WDF_STATE_MACHINE_ERROR = 14999; // 8 +const static uint64_t SH_FLD_WINDOW_SELECT = 15000; // 3 +const static uint64_t SH_FLD_WINDOW_SELECT_LEN = 15001; // 3 +const static uint64_t SH_FLD_WIRETEST_DONE = 15002; // 4 +const static uint64_t SH_FLD_WIRETEST_FAILED = 15003; // 4 +const static uint64_t SH_FLD_WITH_ADDRESS_0 = 15004; // 1 +const static uint64_t SH_FLD_WITH_ADDRESS_1 = 15005; // 1 +const static uint64_t SH_FLD_WITH_ADDRESS_2 = 15006; // 1 +const static uint64_t SH_FLD_WITH_ADDRESS_3 = 15007; // 1 +const static uint64_t SH_FLD_WITH_START_0 = 15008; // 1 +const static uint64_t SH_FLD_WITH_START_1 = 15009; // 1 +const static uint64_t SH_FLD_WITH_START_2 = 15010; // 1 +const static uint64_t SH_FLD_WITH_START_3 = 15011; // 1 +const static uint64_t SH_FLD_WITH_STOP_0 = 15012; // 1 +const static uint64_t SH_FLD_WITH_STOP_1 = 15013; // 1 +const static uint64_t SH_FLD_WITH_STOP_2 = 15014; // 1 +const static uint64_t SH_FLD_WITH_STOP_3 = 15015; // 1 +const static uint64_t SH_FLD_WI_MACHINE_HANG_ERR = 15016; // 12 +const static uint64_t SH_FLD_WI_MACHINE_W4DT_HANG_ERR = 15017; // 12 +const static uint64_t SH_FLD_WI_UNSOLICITED_DATA_ERR = 15018; // 12 +const static uint64_t SH_FLD_WKUP_NOTIFY_SELECT = 15019; // 24 +const static uint64_t SH_FLD_WL_ONE_DQS_PULSE = 15020; // 8 +const static uint64_t SH_FLD_WM_MULTIHIT_ERR = 15021; // 2 +const static uint64_t SH_FLD_WM_WIN_NOT_OPEN_ERR = 15022; // 2 +const static uint64_t SH_FLD_WOF = 15023; // 5 +const static uint64_t SH_FLD_WOF_COUNTER = 15024; // 1 +const static uint64_t SH_FLD_WOF_COUNTER_LEN = 15025; // 1 +const static uint64_t SH_FLD_WOF_LEN = 15026; // 5 +const static uint64_t SH_FLD_WOF_LOW_ORDER_STEP_COUNTER_PARITY = 15027; // 4 +const static uint64_t SH_FLD_WORD = 15028; // 8 +const static uint64_t SH_FLD_WORD_LEN = 15029; // 8 +const static uint64_t SH_FLD_WRAP = 15030; // 1 +const static uint64_t SH_FLD_WRAP_0 = 15031; // 1 +const static uint64_t SH_FLD_WRAP_1 = 15032; // 1 +const static uint64_t SH_FLD_WRAP_2 = 15033; // 1 +const static uint64_t SH_FLD_WRAP_3 = 15034; // 1 +const static uint64_t SH_FLD_WRCMP = 15035; // 2 +const static uint64_t SH_FLD_WRCMP_LEN = 15036; // 2 +const static uint64_t SH_FLD_WRCNTL_DBG_SELECT = 15037; // 8 +const static uint64_t SH_FLD_WRDM_DLY = 15038; // 8 +const static uint64_t SH_FLD_WRDM_DLY_LEN = 15039; // 8 +const static uint64_t SH_FLD_WRD_MCBIST_OUT_OF_SYNC_HOLD_OUT = 15040; // 2 +const static uint64_t SH_FLD_WRITE = 15041; // 9 +const static uint64_t SH_FLD_WRITE_CMD = 15042; // 1 +const static uint64_t SH_FLD_WRITE_COMPLETE = 15043; // 1 +const static uint64_t SH_FLD_WRITE_COUNT = 15044; // 8 +const static uint64_t SH_FLD_WRITE_COUNTER = 15045; // 1 +const static uint64_t SH_FLD_WRITE_COUNTER_LEN = 15046; // 1 +const static uint64_t SH_FLD_WRITE_COUNT_LEN = 15047; // 8 +const static uint64_t SH_FLD_WRITE_CRD_POOL = 15048; // 1 +const static uint64_t SH_FLD_WRITE_CRD_POOL_LEN = 15049; // 1 +const static uint64_t SH_FLD_WRITE_CTR = 15050; // 8 +const static uint64_t SH_FLD_WRITE_ENABLE = 15051; // 129 +const static uint64_t SH_FLD_WRITE_ENABLE_0 = 15052; // 1 +const static uint64_t SH_FLD_WRITE_ENABLE_1 = 15053; // 1 +const static uint64_t SH_FLD_WRITE_ENABLE_2 = 15054; // 1 +const static uint64_t SH_FLD_WRITE_ENABLE_3 = 15055; // 1 +const static uint64_t SH_FLD_WRITE_ERR_INJECT0 = 15056; // 8 +const static uint64_t SH_FLD_WRITE_ERR_INJECT0_LEN = 15057; // 8 +const static uint64_t SH_FLD_WRITE_INVALID_FACES = 15058; // 1 +const static uint64_t SH_FLD_WRITE_INVALID_PIB = 15059; // 1 +const static uint64_t SH_FLD_WRITE_LATENCY_OFFSET = 15060; // 8 +const static uint64_t SH_FLD_WRITE_LATENCY_OFFSET_LEN = 15061; // 8 +const static uint64_t SH_FLD_WRITE_NOT_READ = 15062; // 3 +const static uint64_t SH_FLD_WRITE_NVLD = 15063; // 1 +const static uint64_t SH_FLD_WRITE_RMW_CE = 15064; // 8 +const static uint64_t SH_FLD_WRITE_RMW_SUE = 15065; // 8 +const static uint64_t SH_FLD_WRITE_RMW_UE = 15066; // 8 +const static uint64_t SH_FLD_WRITE_RST_INTERRUPT_FACES = 15067; // 1 +const static uint64_t SH_FLD_WRITE_RST_INTERRUPT_PIB = 15068; // 1 +const static uint64_t SH_FLD_WRITE_TSIZE = 15069; // 4 +const static uint64_t SH_FLD_WRITE_TSIZE_LEN = 15070; // 4 +const static uint64_t SH_FLD_WRITE_TTYPE = 15071; // 4 +const static uint64_t SH_FLD_WRITE_TTYPE_LEN = 15072; // 4 +const static uint64_t SH_FLD_WRITE_WHILE_BRIDGE_BUSY_ERR = 15073; // 1 +const static uint64_t SH_FLD_WRITE_WHILE_BRIDGE_BUSY_SCRESP_EN = 15074; // 1 +const static uint64_t SH_FLD_WRMON_BAR0_BA = 15075; // 1 +const static uint64_t SH_FLD_WRMON_BAR0_BA_LEN = 15076; // 1 +const static uint64_t SH_FLD_WRMON_BAR0_SIZE = 15077; // 1 +const static uint64_t SH_FLD_WRMON_BAR0_SIZE_LEN = 15078; // 1 +const static uint64_t SH_FLD_WRMON_BAR1_BA = 15079; // 1 +const static uint64_t SH_FLD_WRMON_BAR1_BA_LEN = 15080; // 1 +const static uint64_t SH_FLD_WRMON_BAR1_SIZE = 15081; // 1 +const static uint64_t SH_FLD_WRMON_BAR1_SIZE_LEN = 15082; // 1 +const static uint64_t SH_FLD_WRMON_BAR2_BA = 15083; // 1 +const static uint64_t SH_FLD_WRMON_BAR2_BA_LEN = 15084; // 1 +const static uint64_t SH_FLD_WRMON_BAR2_SIZE = 15085; // 1 +const static uint64_t SH_FLD_WRMON_BAR2_SIZE_LEN = 15086; // 1 +const static uint64_t SH_FLD_WRMON_BAR3_BA = 15087; // 1 +const static uint64_t SH_FLD_WRMON_BAR3_BA_LEN = 15088; // 1 +const static uint64_t SH_FLD_WRMON_BAR3_SIZE = 15089; // 1 +const static uint64_t SH_FLD_WRMON_BAR3_SIZE_LEN = 15090; // 1 +const static uint64_t SH_FLD_WRMON_BAR4_BA = 15091; // 1 +const static uint64_t SH_FLD_WRMON_BAR4_BA_LEN = 15092; // 1 +const static uint64_t SH_FLD_WRMON_BAR4_SIZE = 15093; // 1 +const static uint64_t SH_FLD_WRMON_BAR4_SIZE_LEN = 15094; // 1 +const static uint64_t SH_FLD_WRMON_BAR5_BA = 15095; // 1 +const static uint64_t SH_FLD_WRMON_BAR5_BA_LEN = 15096; // 1 +const static uint64_t SH_FLD_WRMON_BAR5_SIZE = 15097; // 1 +const static uint64_t SH_FLD_WRMON_BAR5_SIZE_LEN = 15098; // 1 +const static uint64_t SH_FLD_WRMON_BAR6_BA = 15099; // 1 +const static uint64_t SH_FLD_WRMON_BAR6_BA_LEN = 15100; // 1 +const static uint64_t SH_FLD_WRMON_BAR6_SIZE = 15101; // 1 +const static uint64_t SH_FLD_WRMON_BAR6_SIZE_LEN = 15102; // 1 +const static uint64_t SH_FLD_WRMON_BAR7_BA = 15103; // 1 +const static uint64_t SH_FLD_WRMON_BAR7_BA_LEN = 15104; // 1 +const static uint64_t SH_FLD_WRMON_BAR7_SIZE = 15105; // 1 +const static uint64_t SH_FLD_WRMON_BAR7_SIZE_LEN = 15106; // 1 +const static uint64_t SH_FLD_WRMON_CMP0_ENADTTYPE = 15107; // 1 +const static uint64_t SH_FLD_WRMON_CMP0_TSIZE = 15108; // 1 +const static uint64_t SH_FLD_WRMON_CMP0_TSIZEMSK = 15109; // 1 +const static uint64_t SH_FLD_WRMON_CMP0_TSIZEMSK_LEN = 15110; // 1 +const static uint64_t SH_FLD_WRMON_CMP0_TSIZE_LEN = 15111; // 1 +const static uint64_t SH_FLD_WRMON_CMP0_TTYPE = 15112; // 1 +const static uint64_t SH_FLD_WRMON_CMP0_TTYPEDIS = 15113; // 1 +const static uint64_t SH_FLD_WRMON_CMP0_TTYPEDIS_LEN = 15114; // 1 +const static uint64_t SH_FLD_WRMON_CMP0_TTYPEMSK = 15115; // 1 +const static uint64_t SH_FLD_WRMON_CMP0_TTYPEMSK_LEN = 15116; // 1 +const static uint64_t SH_FLD_WRMON_CMP0_TTYPE_LEN = 15117; // 1 +const static uint64_t SH_FLD_WRMON_CMP0_VAL = 15118; // 1 +const static uint64_t SH_FLD_WRMON_CMP1_ENADTTYPE = 15119; // 1 +const static uint64_t SH_FLD_WRMON_CMP1_TSIZE = 15120; // 1 +const static uint64_t SH_FLD_WRMON_CMP1_TSIZEMSK = 15121; // 1 +const static uint64_t SH_FLD_WRMON_CMP1_TSIZEMSK_LEN = 15122; // 1 +const static uint64_t SH_FLD_WRMON_CMP1_TSIZE_LEN = 15123; // 1 +const static uint64_t SH_FLD_WRMON_CMP1_TTYPE = 15124; // 1 +const static uint64_t SH_FLD_WRMON_CMP1_TTYPEDIS = 15125; // 1 +const static uint64_t SH_FLD_WRMON_CMP1_TTYPEDIS_LEN = 15126; // 1 +const static uint64_t SH_FLD_WRMON_CMP1_TTYPEMSK = 15127; // 1 +const static uint64_t SH_FLD_WRMON_CMP1_TTYPEMSK_LEN = 15128; // 1 +const static uint64_t SH_FLD_WRMON_CMP1_TTYPE_LEN = 15129; // 1 +const static uint64_t SH_FLD_WRMON_CMP1_VAL = 15130; // 1 +const static uint64_t SH_FLD_WRMON_CMP2_ENADTTYPE = 15131; // 1 +const static uint64_t SH_FLD_WRMON_CMP2_TSIZE = 15132; // 1 +const static uint64_t SH_FLD_WRMON_CMP2_TSIZEMSK = 15133; // 1 +const static uint64_t SH_FLD_WRMON_CMP2_TSIZEMSK_LEN = 15134; // 1 +const static uint64_t SH_FLD_WRMON_CMP2_TSIZE_LEN = 15135; // 1 +const static uint64_t SH_FLD_WRMON_CMP2_TTYPE = 15136; // 1 +const static uint64_t SH_FLD_WRMON_CMP2_TTYPEDIS = 15137; // 1 +const static uint64_t SH_FLD_WRMON_CMP2_TTYPEDIS_LEN = 15138; // 1 +const static uint64_t SH_FLD_WRMON_CMP2_TTYPEMSK = 15139; // 1 +const static uint64_t SH_FLD_WRMON_CMP2_TTYPEMSK_LEN = 15140; // 1 +const static uint64_t SH_FLD_WRMON_CMP2_TTYPE_LEN = 15141; // 1 +const static uint64_t SH_FLD_WRMON_CMP2_VAL = 15142; // 1 +const static uint64_t SH_FLD_WRMON_CMP3_ENADTTYPE = 15143; // 1 +const static uint64_t SH_FLD_WRMON_CMP3_TSIZE = 15144; // 1 +const static uint64_t SH_FLD_WRMON_CMP3_TSIZEMSK = 15145; // 1 +const static uint64_t SH_FLD_WRMON_CMP3_TSIZEMSK_LEN = 15146; // 1 +const static uint64_t SH_FLD_WRMON_CMP3_TSIZE_LEN = 15147; // 1 +const static uint64_t SH_FLD_WRMON_CMP3_TTYPE = 15148; // 1 +const static uint64_t SH_FLD_WRMON_CMP3_TTYPEDIS = 15149; // 1 +const static uint64_t SH_FLD_WRMON_CMP3_TTYPEDIS_LEN = 15150; // 1 +const static uint64_t SH_FLD_WRMON_CMP3_TTYPEMSK = 15151; // 1 +const static uint64_t SH_FLD_WRMON_CMP3_TTYPEMSK_LEN = 15152; // 1 +const static uint64_t SH_FLD_WRMON_CMP3_TTYPE_LEN = 15153; // 1 +const static uint64_t SH_FLD_WRMON_CMP3_VAL = 15154; // 1 +const static uint64_t SH_FLD_WRMON_CMP4_ENADTTYPE = 15155; // 1 +const static uint64_t SH_FLD_WRMON_CMP4_TSIZE = 15156; // 1 +const static uint64_t SH_FLD_WRMON_CMP4_TSIZEMSK = 15157; // 1 +const static uint64_t SH_FLD_WRMON_CMP4_TSIZEMSK_LEN = 15158; // 1 +const static uint64_t SH_FLD_WRMON_CMP4_TSIZE_LEN = 15159; // 1 +const static uint64_t SH_FLD_WRMON_CMP4_TTYPE = 15160; // 1 +const static uint64_t SH_FLD_WRMON_CMP4_TTYPEDIS = 15161; // 1 +const static uint64_t SH_FLD_WRMON_CMP4_TTYPEDIS_LEN = 15162; // 1 +const static uint64_t SH_FLD_WRMON_CMP4_TTYPEMSK = 15163; // 1 +const static uint64_t SH_FLD_WRMON_CMP4_TTYPEMSK_LEN = 15164; // 1 +const static uint64_t SH_FLD_WRMON_CMP4_TTYPE_LEN = 15165; // 1 +const static uint64_t SH_FLD_WRMON_CMP4_VAL = 15166; // 1 +const static uint64_t SH_FLD_WRMON_CMP5_ENADTTYPE = 15167; // 1 +const static uint64_t SH_FLD_WRMON_CMP5_TSIZE = 15168; // 1 +const static uint64_t SH_FLD_WRMON_CMP5_TSIZEMSK = 15169; // 1 +const static uint64_t SH_FLD_WRMON_CMP5_TSIZEMSK_LEN = 15170; // 1 +const static uint64_t SH_FLD_WRMON_CMP5_TSIZE_LEN = 15171; // 1 +const static uint64_t SH_FLD_WRMON_CMP5_TTYPE = 15172; // 1 +const static uint64_t SH_FLD_WRMON_CMP5_TTYPEDIS = 15173; // 1 +const static uint64_t SH_FLD_WRMON_CMP5_TTYPEDIS_LEN = 15174; // 1 +const static uint64_t SH_FLD_WRMON_CMP5_TTYPEMSK = 15175; // 1 +const static uint64_t SH_FLD_WRMON_CMP5_TTYPEMSK_LEN = 15176; // 1 +const static uint64_t SH_FLD_WRMON_CMP5_TTYPE_LEN = 15177; // 1 +const static uint64_t SH_FLD_WRMON_CMP5_VAL = 15178; // 1 +const static uint64_t SH_FLD_WRMON_CMP6_ENADTTYPE = 15179; // 1 +const static uint64_t SH_FLD_WRMON_CMP6_TSIZE = 15180; // 1 +const static uint64_t SH_FLD_WRMON_CMP6_TSIZEMSK = 15181; // 1 +const static uint64_t SH_FLD_WRMON_CMP6_TSIZEMSK_LEN = 15182; // 1 +const static uint64_t SH_FLD_WRMON_CMP6_TSIZE_LEN = 15183; // 1 +const static uint64_t SH_FLD_WRMON_CMP6_TTYPE = 15184; // 1 +const static uint64_t SH_FLD_WRMON_CMP6_TTYPEDIS = 15185; // 1 +const static uint64_t SH_FLD_WRMON_CMP6_TTYPEDIS_LEN = 15186; // 1 +const static uint64_t SH_FLD_WRMON_CMP6_TTYPEMSK = 15187; // 1 +const static uint64_t SH_FLD_WRMON_CMP6_TTYPEMSK_LEN = 15188; // 1 +const static uint64_t SH_FLD_WRMON_CMP6_TTYPE_LEN = 15189; // 1 +const static uint64_t SH_FLD_WRMON_CMP6_VAL = 15190; // 1 +const static uint64_t SH_FLD_WRMON_CMP7_ENADTTYPE = 15191; // 1 +const static uint64_t SH_FLD_WRMON_CMP7_TSIZE = 15192; // 1 +const static uint64_t SH_FLD_WRMON_CMP7_TSIZEMSK = 15193; // 1 +const static uint64_t SH_FLD_WRMON_CMP7_TSIZEMSK_LEN = 15194; // 1 +const static uint64_t SH_FLD_WRMON_CMP7_TSIZE_LEN = 15195; // 1 +const static uint64_t SH_FLD_WRMON_CMP7_TTYPE = 15196; // 1 +const static uint64_t SH_FLD_WRMON_CMP7_TTYPEDIS = 15197; // 1 +const static uint64_t SH_FLD_WRMON_CMP7_TTYPEDIS_LEN = 15198; // 1 +const static uint64_t SH_FLD_WRMON_CMP7_TTYPEMSK = 15199; // 1 +const static uint64_t SH_FLD_WRMON_CMP7_TTYPEMSK_LEN = 15200; // 1 +const static uint64_t SH_FLD_WRMON_CMP7_TTYPE_LEN = 15201; // 1 +const static uint64_t SH_FLD_WRMON_CMP7_VAL = 15202; // 1 +const static uint64_t SH_FLD_WRMON_WID0 = 15203; // 1 +const static uint64_t SH_FLD_WRMON_WID0_LEN = 15204; // 1 +const static uint64_t SH_FLD_WRMON_WID1 = 15205; // 1 +const static uint64_t SH_FLD_WRMON_WID1_LEN = 15206; // 1 +const static uint64_t SH_FLD_WRMON_WID2 = 15207; // 1 +const static uint64_t SH_FLD_WRMON_WID2_LEN = 15208; // 1 +const static uint64_t SH_FLD_WRMON_WID3 = 15209; // 1 +const static uint64_t SH_FLD_WRMON_WID3_LEN = 15210; // 1 +const static uint64_t SH_FLD_WRMON_WID4 = 15211; // 1 +const static uint64_t SH_FLD_WRMON_WID4_LEN = 15212; // 1 +const static uint64_t SH_FLD_WRMON_WID5 = 15213; // 1 +const static uint64_t SH_FLD_WRMON_WID5_LEN = 15214; // 1 +const static uint64_t SH_FLD_WRMON_WID6 = 15215; // 1 +const static uint64_t SH_FLD_WRMON_WID6_LEN = 15216; // 1 +const static uint64_t SH_FLD_WRMON_WID7 = 15217; // 1 +const static uint64_t SH_FLD_WRMON_WID7_LEN = 15218; // 1 +const static uint64_t SH_FLD_WRQ_CAPACITY_LIMIT = 15219; // 4 +const static uint64_t SH_FLD_WRQ_CAPACITY_LIMIT_LEN = 15220; // 4 +const static uint64_t SH_FLD_WRQ_FSM_PERR = 15221; // 1 +const static uint64_t SH_FLD_WRQ_HANG = 15222; // 8 +const static uint64_t SH_FLD_WRQ_OVERFLOW = 15223; // 1 +const static uint64_t SH_FLD_WRQ_PE = 15224; // 8 +const static uint64_t SH_FLD_WRQ_RRQ_HANG_ERR = 15225; // 16 +const static uint64_t SH_FLD_WRSBG_DLY = 15226; // 8 +const static uint64_t SH_FLD_WRSBG_DLY_LEN = 15227; // 8 +const static uint64_t SH_FLD_WRSMDR_DLY = 15228; // 8 +const static uint64_t SH_FLD_WRSMDR_DLY_LEN = 15229; // 8 +const static uint64_t SH_FLD_WRSMSR_DLY = 15230; // 8 +const static uint64_t SH_FLD_WRSMSR_DLY_LEN = 15231; // 8 +const static uint64_t SH_FLD_WRTO_AMO_COLLISION_RULES = 15232; // 8 +const static uint64_t SH_FLD_WRTO_AMO_COLLISION_RULES_LEN = 15233; // 8 +const static uint64_t SH_FLD_WRT_MISC_REGISTER_PARITY_ERROR = 15234; // 8 +const static uint64_t SH_FLD_WRT_RST_INTRPT_FACES = 15235; // 1 +const static uint64_t SH_FLD_WRT_RST_INTRPT_PIB = 15236; // 1 +const static uint64_t SH_FLD_WRT_SCOM_SEQUENCE_ERROR = 15237; // 8 +const static uint64_t SH_FLD_WR_BUFFER_STATUS = 15238; // 2 +const static uint64_t SH_FLD_WR_BUFFER_STATUS_LEN = 15239; // 2 +const static uint64_t SH_FLD_WR_BYTE_COUNT = 15240; // 2 +const static uint64_t SH_FLD_WR_BYTE_COUNT_LEN = 15241; // 2 +const static uint64_t SH_FLD_WR_CNTL = 15242; // 8 +const static uint64_t SH_FLD_WR_CNTL_MASK = 15243; // 8 +const static uint64_t SH_FLD_WR_DATA_PARITY_ERROR = 15244; // 3 +const static uint64_t SH_FLD_WR_EPSILON_VALUE = 15245; // 2 +const static uint64_t SH_FLD_WR_EPSILON_VALUE_LEN = 15246; // 2 +const static uint64_t SH_FLD_WR_FIFO_STAB = 15247; // 8 +const static uint64_t SH_FLD_WR_GATHER_TIMEOUT = 15248; // 4 +const static uint64_t SH_FLD_WR_GATHER_TIMEOUT_LEN = 15249; // 4 +const static uint64_t SH_FLD_WR_LEVEL = 15250; // 8 +const static uint64_t SH_FLD_WR_MON_NOT_DISABLED_ERR = 15251; // 2 +const static uint64_t SH_FLD_WR_PAR_ERR = 15252; // 8 +const static uint64_t SH_FLD_WR_PAR_ERR_MASK = 15253; // 8 +const static uint64_t SH_FLD_WR_PRE_DLY = 15254; // 8 +const static uint64_t SH_FLD_WR_PRE_DLY_LEN = 15255; // 8 +const static uint64_t SH_FLD_WR_RSVD_LOWER_OR_STATIC_LIMIT = 15256; // 8 +const static uint64_t SH_FLD_WR_RSVD_LOWER_OR_STATIC_LIMIT_LEN = 15257; // 8 +const static uint64_t SH_FLD_WR_RSVD_UPPER_LIMIT = 15258; // 8 +const static uint64_t SH_FLD_WR_RSVD_UPPER_LIMIT_LEN = 15259; // 8 +const static uint64_t SH_FLD_WR_SCOPE = 15260; // 24 +const static uint64_t SH_FLD_WR_SLVNUM = 15261; // 2 +const static uint64_t SH_FLD_WR_SLVNUM_LEN = 15262; // 2 +const static uint64_t SH_FLD_WR_SPLIT_UT0_ENA = 15263; // 6 +const static uint64_t SH_FLD_WR_SPLIT_UT1_ENA = 15264; // 6 +const static uint64_t SH_FLD_WR_VALID = 15265; // 1 +const static uint64_t SH_FLD_WSIZE = 15266; // 1 +const static uint64_t SH_FLD_WSIZE_LEN = 15267; // 1 +const static uint64_t SH_FLD_WT4CR_TIER0_EPS_VAL = 15268; // 12 +const static uint64_t SH_FLD_WT4CR_TIER0_EPS_VAL_LEN = 15269; // 12 +const static uint64_t SH_FLD_WT4CR_TIER1_EPS_VAL = 15270; // 24 +const static uint64_t SH_FLD_WT4CR_TIER1_EPS_VAL_LEN = 15271; // 24 +const static uint64_t SH_FLD_WT4CR_TIER2_EPS_VAL = 15272; // 24 +const static uint64_t SH_FLD_WT4CR_TIER2_EPS_VAL_LEN = 15273; // 24 +const static uint64_t SH_FLD_WTL_SM_STATUS = 15274; // 4 +const static uint64_t SH_FLD_WTL_SM_STATUS_LEN = 15275; // 4 +const static uint64_t SH_FLD_WTL_TEST_CLOCK = 15276; // 4 +const static uint64_t SH_FLD_WTL_TEST_DATA = 15277; // 4 +const static uint64_t SH_FLD_WTR_MAX_BAD_LANES = 15278; // 4 +const static uint64_t SH_FLD_WTR_MAX_BAD_LANES_LEN = 15279; // 4 +const static uint64_t SH_FLD_WT_ALL_DONE_GCRMSG = 15280; // 4 +const static uint64_t SH_FLD_WT_BS_CLOCK_EN_BYP = 15281; // 4 +const static uint64_t SH_FLD_WT_BS_DATA_EN_BYP = 15282; // 4 +const static uint64_t SH_FLD_WT_CHECK_COUNT = 15283; // 4 +const static uint64_t SH_FLD_WT_CHECK_COUNT_LEN = 15284; // 4 +const static uint64_t SH_FLD_WT_CLK_LANE_BAD_CODE = 15285; // 4 +const static uint64_t SH_FLD_WT_CLK_LANE_BAD_CODE_LEN = 15286; // 4 +const static uint64_t SH_FLD_WT_CLK_LANE_INVERTED = 15287; // 4 +const static uint64_t SH_FLD_WT_CU_BYP_PLL_LOCK = 15288; // 4 +const static uint64_t SH_FLD_WT_CU_PLL_PGOOD = 15289; // 4 +const static uint64_t SH_FLD_WT_CU_PLL_PGOODDLY = 15290; // 4 +const static uint64_t SH_FLD_WT_CU_PLL_PGOODDLY_LEN = 15291; // 4 +const static uint64_t SH_FLD_WT_CU_PLL_RESET = 15292; // 4 +const static uint64_t SH_FLD_WT_EN_ALL_CLK_SEGS_GCRMSG = 15293; // 4 +const static uint64_t SH_FLD_WT_EN_ALL_DATA_SEGS_GCRMSG = 15294; // 4 +const static uint64_t SH_FLD_WT_LANE_BAD_CODE = 15295; // 96 +const static uint64_t SH_FLD_WT_LANE_BAD_CODE_LEN = 15296; // 96 +const static uint64_t SH_FLD_WT_LANE_DISABLED = 15297; // 96 +const static uint64_t SH_FLD_WT_PATTERN_LENGTH = 15298; // 8 +const static uint64_t SH_FLD_WT_PATTERN_LENGTH_LEN = 15299; // 8 +const static uint64_t SH_FLD_WT_PLL_REFCLKSEL = 15300; // 4 +const static uint64_t SH_FLD_WT_PREV_DONE_GCRMSG = 15301; // 4 +const static uint64_t SH_FLD_WT_TIMEOUT_SEL = 15302; // 4 +const static uint64_t SH_FLD_WT_TIMEOUT_SEL_LEN = 15303; // 4 +const static uint64_t SH_FLD_WWDM_DLY = 15304; // 8 +const static uint64_t SH_FLD_WWDM_DLY_LEN = 15305; // 8 +const static uint64_t SH_FLD_WWOP_DLY = 15306; // 8 +const static uint64_t SH_FLD_WWOP_DLY_LEN = 15307; // 8 +const static uint64_t SH_FLD_WWSMDR_DLY = 15308; // 8 +const static uint64_t SH_FLD_WWSMDR_DLY_LEN = 15309; // 8 +const static uint64_t SH_FLD_WWSMSR_DLY = 15310; // 8 +const static uint64_t SH_FLD_WWSMSR_DLY_LEN = 15311; // 8 +const static uint64_t SH_FLD_X0_ACT = 15312; // 1 +const static uint64_t SH_FLD_X0_TX_ENABLE = 15313; // 4 +const static uint64_t SH_FLD_X0_TX_SELECT = 15314; // 4 +const static uint64_t SH_FLD_X0_TX_SELECT_LEN = 15315; // 4 +const static uint64_t SH_FLD_X1_ACT = 15316; // 1 +const static uint64_t SH_FLD_X1_TX_ENABLE = 15317; // 4 +const static uint64_t SH_FLD_X1_TX_SELECT = 15318; // 4 +const static uint64_t SH_FLD_X1_TX_SELECT_LEN = 15319; // 4 +const static uint64_t SH_FLD_X2_ACT = 15320; // 1 +const static uint64_t SH_FLD_X2_TX_ENABLE = 15321; // 4 +const static uint64_t SH_FLD_X2_TX_SELECT = 15322; // 4 +const static uint64_t SH_FLD_X2_TX_SELECT_LEN = 15323; // 4 +const static uint64_t SH_FLD_X3_TX_ENABLE = 15324; // 4 +const static uint64_t SH_FLD_X3_TX_SELECT = 15325; // 4 +const static uint64_t SH_FLD_X3_TX_SELECT_LEN = 15326; // 4 +const static uint64_t SH_FLD_X4_TX_ENABLE = 15327; // 4 +const static uint64_t SH_FLD_X4_TX_SELECT = 15328; // 4 +const static uint64_t SH_FLD_X4_TX_SELECT_LEN = 15329; // 4 +const static uint64_t SH_FLD_X5_TX_ENABLE = 15330; // 4 +const static uint64_t SH_FLD_X5_TX_SELECT = 15331; // 4 +const static uint64_t SH_FLD_X5_TX_SELECT_LEN = 15332; // 4 +const static uint64_t SH_FLD_X6_TX_ENABLE = 15333; // 4 +const static uint64_t SH_FLD_X6_TX_SELECT = 15334; // 4 +const static uint64_t SH_FLD_X6_TX_SELECT_LEN = 15335; // 4 +const static uint64_t SH_FLD_X7_TX_ENABLE = 15336; // 4 +const static uint64_t SH_FLD_X7_TX_SELECT = 15337; // 4 +const static uint64_t SH_FLD_X7_TX_SELECT_LEN = 15338; // 4 +const static uint64_t SH_FLD_XCR = 15339; // 21 +const static uint64_t SH_FLD_XCR_LEN = 15340; // 21 +const static uint64_t SH_FLD_XIMEM_MEM_IFETCH_PENDING = 15341; // 21 +const static uint64_t SH_FLD_XIMEM_MEM_IMPRECISE_ERROR_PENDING = 15342; // 21 +const static uint64_t SH_FLD_XIRAMGA_IR = 15343; // 21 +const static uint64_t SH_FLD_XIRAMGA_IR_LEN = 15344; // 21 +const static uint64_t SH_FLD_XIRAMRA_SPRG0 = 15345; // 42 +const static uint64_t SH_FLD_XIRAMRA_SPRG0_LEN = 15346; // 42 +const static uint64_t SH_FLD_XISIB_PIB_IFETCH_PENDING = 15347; // 21 +const static uint64_t SH_FLD_XIXCR_XCR = 15348; // 21 +const static uint64_t SH_FLD_XIXCR_XCR_LEN = 15349; // 21 +const static uint64_t SH_FLD_XLAT = 15350; // 16 +const static uint64_t SH_FLD_XLATE_TO_ADDR_ID_ENABLE = 15351; // 2 +const static uint64_t SH_FLD_XLAT_LEN = 15352; // 16 +const static uint64_t SH_FLD_XPT_POWERBUS_CE = 15353; // 4 +const static uint64_t SH_FLD_XPT_POWERBUS_SUE = 15354; // 4 +const static uint64_t SH_FLD_XPT_POWERBUS_UE = 15355; // 4 +const static uint64_t SH_FLD_XPT_RECOVERABLE_ERROR = 15356; // 4 +const static uint64_t SH_FLD_XPT_SYS_XSTOP_ERROR = 15357; // 4 +const static uint64_t SH_FLD_XSCOM_DONE = 15358; // 96 +const static uint64_t SH_FLD_XSCOM_FAIL = 15359; // 96 +const static uint64_t SH_FLD_XSCOM_STATUS = 15360; // 96 +const static uint64_t SH_FLD_XSCOM_STATUS_LEN = 15361; // 96 +const static uint64_t SH_FLD_XSC_CMD_OVERRUN = 15362; // 1 +const static uint64_t SH_FLD_XSTOP = 15363; // 5 +const static uint64_t SH_FLD_XSTOP_GATE = 15364; // 1 +const static uint64_t SH_FLD_XTS_CONFIG_P = 15365; // 1 +const static uint64_t SH_FLD_XTS_INT = 15366; // 1 +const static uint64_t SH_FLD_XTS_PBUS_PROTOCOL = 15367; // 1 +const static uint64_t SH_FLD_XTS_PROTOCOL_CE = 15368; // 1 +const static uint64_t SH_FLD_XTS_PROTOCOL_UE = 15369; // 1 +const static uint64_t SH_FLD_XTS_SRAM_CE = 15370; // 1 +const static uint64_t SH_FLD_XTS_SRAM_UE = 15371; // 1 +const static uint64_t SH_FLD_Z = 15372; // 1 +const static uint64_t SH_FLD_ZCAL = 15373; // 4 +const static uint64_t SH_FLD_ZCAL_CYA_DATA_INV = 15374; // 4 +const static uint64_t SH_FLD_ZCAL_LEN = 15375; // 4 +const static uint64_t SH_FLD_ZCAL_N = 15376; // 4 +const static uint64_t SH_FLD_ZCAL_NOT_CONT = 15377; // 8 +const static uint64_t SH_FLD_ZCAL_N_LEN = 15378; // 4 +const static uint64_t SH_FLD_ZCAL_P = 15379; // 4 +const static uint64_t SH_FLD_ZCAL_P_LEN = 15380; // 4 +const static uint64_t SH_FLD_ZCAL_RANGE_CHECK = 15381; // 4 +const static uint64_t SH_FLD_ZCAL_SM_MAX_VAL = 15382; // 4 +const static uint64_t SH_FLD_ZCAL_SM_MAX_VAL_LEN = 15383; // 4 +const static uint64_t SH_FLD_ZCAL_SM_MIN_VAL = 15384; // 4 +const static uint64_t SH_FLD_ZCAL_SM_MIN_VAL_LEN = 15385; // 4 +const static uint64_t SH_FLD_ZCAL_SWO_CAL_SEGS = 15386; // 4 +const static uint64_t SH_FLD_ZCAL_SWO_CMP_INV = 15387; // 4 +const static uint64_t SH_FLD_ZCAL_SWO_CMP_OFFSET = 15388; // 4 +const static uint64_t SH_FLD_ZCAL_SWO_CMP_RESET = 15389; // 4 +const static uint64_t SH_FLD_ZCAL_SWO_EN = 15390; // 4 +const static uint64_t SH_FLD_ZCAL_SWO_POWERDOWN = 15391; // 4 +const static uint64_t SH_FLD_ZCAL_SWO_TCOIL = 15392; // 4 +const static uint64_t SH_FLD_ZCAL_TEST_CLK_DIV = 15393; // 4 +const static uint64_t SH_FLD_ZCAL_TEST_OVR_1R = 15394; // 4 +const static uint64_t SH_FLD_ZCAL_TEST_OVR_2R = 15395; // 4 +const static uint64_t SH_FLD_ZCAL_TEST_OVR_4X_SEG = 15396; // 4 + +#endif |
