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| author | Bill Hoffa <wghoffa@us.ibm.com> | 2018-08-16 15:14:55 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2018-08-29 16:33:55 -0500 |
| commit | 64499fa24bc2b3e1fe1e0109ed23e73f30dfaa4d (patch) | |
| tree | bfa77feb558227b377f1a3dc04295cfa669a211d /src | |
| parent | d808f52a637fcd1b6d4b54327c96efa886d26969 (diff) | |
| download | talos-hostboot-64499fa24bc2b3e1fe1e0109ed23e73f30dfaa4d.tar.gz talos-hostboot-64499fa24bc2b3e1fe1e0109ed23e73f30dfaa4d.zip | |
Update p9_sbe_i2c_bit_rate_divisor_setting to set I2C Rate Valid bit
- Set Bit 1 (SBE I2C Bus speed based, ref clock valid) on Mailbox
Scratch Reg 8 (CFAM 283F) to indicate the i2c bit rate divisor
(set in Mailbox Scratch Reg 2) is correct
- Without this change if the SBE needs to be restarted after a
reset/reload it will use the default i2c divisor value which
isn't always correct
Change-Id: I2d0f071a0af42278bac886fce04a08d0c38682eb
CQ: SW440895
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64697
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64705
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_hreset.C | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_hreset.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_hreset.C index 07e7aca3a..64153812f 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_hreset.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_hreset.C @@ -71,7 +71,7 @@ fapi2::ReturnCode p9_sbe_i2c_bit_rate_divisor_setting( l_data64.insertFromRight< 0, 16 >(l_mb_bit_rate_divisor); FAPI_TRY(fapi2::putScom(i_target_chip, PU_MODE_REGISTER_B, l_data64)); - FAPI_INF("Writing I2C bit rate divisor into mailbox_reg_2"); + FAPI_INF("Writing I2C bit rate divisor into mailbox_reg_2 AND writing i2c valid bit into mailbox_reg_8"); #ifndef __HOSTBOOT_RUNTIME if (i_masterProc) @@ -81,6 +81,12 @@ fapi2::ReturnCode p9_sbe_i2c_bit_rate_divisor_setting( l_data64.insertFromRight< 0, 16 >(l_mb_bit_rate_divisor); FAPI_INF("p9_sbe_i2c_bit_rate_divisor_setting - Master proc Scratch2 0x%.16llX", l_data64); FAPI_TRY(fapi2::putScom(i_target_chip, PERV_SCRATCH_REGISTER_2_SCOM, l_data64)); + + FAPI_TRY(fapi2::getScom(i_target_chip, PERV_SCRATCH_REGISTER_8_SCOM, l_data64)); + FAPI_INF("p9_sbe_i2c_bit_rate_divisor_setting - Master proc Scratch8 0x%.16llX (before insert)", l_data64); + l_data64.insertFromRight< 1, 1 >(1); + FAPI_INF("p9_sbe_i2c_bit_rate_divisor_setting - Master proc Scratch8 0x%.16llX", l_data64); + FAPI_TRY(fapi2::putScom(i_target_chip, PERV_SCRATCH_REGISTER_8_SCOM, l_data64)); } #ifndef __HOSTBOOT_RUNTIME @@ -90,6 +96,12 @@ fapi2::ReturnCode p9_sbe_i2c_bit_rate_divisor_setting( l_data32.insertFromRight< 0, 16 >(l_mb_bit_rate_divisor); FAPI_INF("p9_sbe_i2c_bit_rate_divisor_setting - Slave proc Scratch2 0x%.8X", l_data32); FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_SCRATCH_REGISTER_2_FSI, l_data32)); + + FAPI_TRY(fapi2::getScom(i_target_chip, PERV_SCRATCH_REGISTER_8_SCOM, l_data64)); + FAPI_INF("p9_sbe_i2c_bit_rate_divisor_setting - Slave proc Scratch8 0x%.16llX (before insert)", l_data64); + l_data64.insertFromRight< 1, 1 >(1); + FAPI_INF("p9_sbe_i2c_bit_rate_divisor_setting - Slave proc Scratch8 0x%.16llX", l_data64); + FAPI_TRY(fapi2::putScom(i_target_chip, PERV_SCRATCH_REGISTER_8_SCOM, l_data64)); } #endif |
