Streamline the way PIB/NET are initialized between SBE and Cronus

Instead of p9_start_cbs swinging the PCB mux to PIB2PCB, do it
in p9_sbe_tp_chiplet_init1. The PIBMEM repair code on the SBE does
it this way already so no change is needed there.

This way, even if we start the SBE but then run isteps in Cronus,
both pieces of code will work correctly since they don't depend on
previous steps leaving the mux in a specific state.

Change-Id: I4a2bd53f813cbb0a00486effb156a3c2a7f4336a
CQ: SW470122
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81162
Reviewed-by: Joseph J McGill <jmcgill@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Milton D Miller <miltonm@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Dev-Ready: Joachim Fenkes <fenkes@de.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81193
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>

1 files changed, 1 insertions, 65 deletions

diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_start_cbs.C b/src/import/chips/p9/procedures/hwp/perv/p9_start_cbs.C
index 914a78072..13990c15e 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_start_cbs.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_start_cbs.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2019                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -71,7 +71,6 @@ fapi2::ReturnCode p9_start_cbs(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>
     fapi2::buffer<uint8_t> l_read_attr;
     fapi2::buffer<uint8_t> l_fifo_reset_skip;
     const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
-    fapi2::buffer<uint8_t>  l_is_axone;
 
     FAPI_INF("p9_start_cbs: Entering ...");
 
@@ -81,8 +80,6 @@ fapi2::ReturnCode p9_start_cbs(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>
     FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_START_CBS_FIFO_RESET_SKIP,
                            FAPI_SYSTEM, l_fifo_reset_skip));
 
-    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_P9A_SBE_REGION, i_target_chip, l_is_axone));
-
     FAPI_DBG("Clearing  Selfboot message register before every boot ");
     // buffer is init value is 0
     FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_SB_MSG_FSI, l_data32));
@@ -203,70 +200,9 @@ fapi2::ReturnCode p9_start_cbs(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>
                 .set_FSI2PIB_STATUS_READ(l_data32),
                 "ERROR:VDD OFF, FSI2PIB  BIT 16 NOT SET");
 
-    if (l_is_axone)
-    {
-        FAPI_DBG("Switching to PIB2PCB mux sel to 1 [till pcbnet clocks are started]");
-        FAPI_TRY(p9_start_cbs_switch_to_pib2pcb_path_cfam(i_target_chip));
-    }
-
     FAPI_INF("p9_start_cbs: Exiting ...");
 
 fapi_try_exit:
     return fapi2::current_err;
 
 }
-
-/// @brief Switching to PIB2PCB Path via cfam
-///
-/// @param[in]     i_target_chip     Reference to TARGET_TYPE_PROC_CHIP
-/// @return  FAPI2_RC_SUCCESS if success, else error code.
-fapi2::ReturnCode p9_start_cbs_switch_to_pib2pcb_path_cfam(const
-        fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
-{
-    fapi2::buffer<uint32_t> l_read_reg;
-    FAPI_INF("p9_start_cbs_switch_to_pib2pcb_path_cfam: Entering ...");
-
-    FAPI_DBG("Reading ROOT_CTRL0_REG");
-    FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_read_reg));
-
-    if (!l_read_reg.getBit<PERV_ROOT_CTRL0_SET_PCB_RESET_DC>())
-    {
-        FAPI_DBG("Setting PCB RESET bit in  ROOT_CTRL0_REG");
-        l_read_reg.setBit<PERV_ROOT_CTRL0_SET_PCB_RESET_DC>();
-        FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_read_reg));
-    }
-
-    if (!l_read_reg.getBit<PERV_ROOT_CTRL0_18_SPARE_MUX_CONTROL>())
-    {
-        FAPI_DBG("Setting PIB2PCB bit in  ROOT_CTRL0_REG");
-        l_read_reg.setBit<PERV_ROOT_CTRL0_18_SPARE_MUX_CONTROL>();
-        FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_read_reg));
-    }
-
-    if (l_read_reg.getBit<PERV_ROOT_CTRL0_PIB2PCB_DC>())
-    {
-        FAPI_DBG("Clearing FSI2PCB bit in  ROOT_CTRL0_REG");
-        l_read_reg.clearBit<PERV_ROOT_CTRL0_PIB2PCB_DC>();
-        FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_read_reg));
-    }
-
-    if (l_read_reg.getBit<PERV_ROOT_CTRL0_19_SPARE_MUX_CONTROL>())
-    {
-        FAPI_DBG("Clearing PCB2PCB bit in  ROOT_CTRL0_REG");
-        l_read_reg.clearBit<PERV_ROOT_CTRL0_19_SPARE_MUX_CONTROL>();
-        FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_read_reg));
-    }
-
-    if (l_read_reg.getBit<PERV_ROOT_CTRL0_SET_PCB_RESET_DC>())
-    {
-        FAPI_DBG("Clearing PCB RESET bit in  ROOT_CTRL0_REG");
-        l_read_reg.clearBit<PERV_ROOT_CTRL0_SET_PCB_RESET_DC>();
-        FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_read_reg));
-    }
-
-    FAPI_INF("p9_start_cbs_switch_to_pib2pcb_path_cfam: Exiting ...");
-
-fapi_try_exit:
-    return fapi2::current_err;
-
-}