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author | Luke C. Murray <murrayl@us.ibm.com> | 2017-12-05 15:18:23 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-12-11 10:49:01 -0500 |
commit | 5fa8f9e036df879504b9caa4551c32d11b6f84af (patch) | |
tree | 269da54d377bf3a63f8a4839cc6516c283c0431e /src | |
parent | d5ca0693761afc6f9fa959432a94309820f3a72a (diff) | |
download | talos-hostboot-5fa8f9e036df879504b9caa4551c32d11b6f84af.tar.gz talos-hostboot-5fa8f9e036df879504b9caa4551c32d11b6f84af.zip |
Enabling L2 64B store prediction
Turning on the 64B store prediction inside the L2. This is a
performance fix.
Change-Id: I2e91747e2cf420ffa50efeb73b8876e54c89b8d6
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50531
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50543
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index d87071a9a..bfc7f2266 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -2466,6 +2466,23 @@ </attribute> <!-- ******************************************************************** --> <attribute> + <id>ATTR_CHIP_EC_FEATURE_DISABLE_64B_STORE</id>> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Nimbus DD1 only: don't set 64B store, dials didn't exist + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> + <attribute> <id>ATTR_CHIP_EC_FEATURE_DISABLE_TLBIE_PACING</id>> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> |