diff options
author | Doug Gilbert <dgilbert@us.ibm.com> | 2014-02-13 14:20:26 -0600 |
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committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2014-02-27 11:19:29 -0600 |
commit | 5c4f6ef821b369fb3bf40e9db48e80a10f5b2229 (patch) | |
tree | 894ca5f1d11d0fb52442f47d9ee21e0efabe6c55 /src | |
parent | 75f8fdc613dc9d6c5957e2ab7379c1876382f118 (diff) | |
download | talos-hostboot-5c4f6ef821b369fb3bf40e9db48e80a10f5b2229.tar.gz talos-hostboot-5c4f6ef821b369fb3bf40e9db48e80a10f5b2229.zip |
HB Remove CleanCheck() from Intrrp
Change-Id: Ib65e04e342adbdf014777597f62ca3b4d265bf34
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8847
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/usr/intr/intrrp.C | 54 | ||||
-rw-r--r-- | src/usr/intr/intrrp.H | 5 |
2 files changed, 0 insertions, 59 deletions
diff --git a/src/usr/intr/intrrp.C b/src/usr/intr/intrrp.C index 60b31c0b2..9b2d125ac 100644 --- a/src/usr/intr/intrrp.C +++ b/src/usr/intr/intrrp.C @@ -235,13 +235,6 @@ errlHndl_t IntrRp::_init() err = NULL; } } - else - { - // The XIRR should be clean at this point, if not there is a - // serious problem. The routine will assert if an interrupt is - // found. - cleanCheck(); - } // Set up the interrupt provider registers @@ -2179,53 +2172,6 @@ errlHndl_t IntrRp::hw_disableIntrMpIpl() } -void IntrRp::cleanCheck() -{ - TARGETING::TargetHandleList procCores; - getAllChiplets(procCores, TYPE_CORE); - - for(TARGETING::TargetHandleList::iterator - core = procCores.begin(); - core != procCores.end(); - ++core) - { - const TARGETING::Target * proc = getParentChip(*core); - - FABRIC_CHIP_ID_ATTR chip = proc->getAttr<ATTR_FABRIC_CHIP_ID>(); - FABRIC_NODE_ID_ATTR node = proc->getAttr<ATTR_FABRIC_NODE_ID>(); - CHIP_UNIT_ATTR coreId = - (*core)->getAttr<TARGETING::ATTR_CHIP_UNIT>(); - - PIR_t pir(0); - pir.nodeId = node; - pir.chipId = chip; - pir.coreId = coreId; - - size_t threads = cpu_thread_count(); - for(size_t thread = 0; thread < threads; ++thread) - { - pir.threadId = thread; - uint64_t xirrAddr = - cpuOffsetAddr(pir) + iv_baseAddr + XIRR_RO_OFFSET; - uint32_t * xirrPtr = reinterpret_cast<uint32_t*>(xirrAddr); - uint32_t xirr = (*xirrPtr) & 0x00FFFFFF; // mask off CPPR - - if(xirr != 0) - { - // mbox is not available at this point. - // errl is not functional at this point. - // This is probably a bug in SIMICS or FSP or HARDWARE - TRACFCOMP(g_trac_intr, ERR_MRK - "Unexpected early interrupt on non-mpipl path." - " xirr = %x", - xirr); - assert(xirr == 0); - } - } - } -} - - //---------------------------------------------------------------------------- // External interfaces //---------------------------------------------------------------------------- diff --git a/src/usr/intr/intrrp.H b/src/usr/intr/intrrp.H index 650479b8f..69c4be68b 100644 --- a/src/usr/intr/intrrp.H +++ b/src/usr/intr/intrrp.H @@ -534,11 +534,6 @@ namespace INTR void allowAllInterrupts(TARGETING::Target* i_core); /** - * cleanCheck - verify there are no active interrupts - */ - void cleanCheck(); - - /** * Shutdown procedure */ void shutDown(); |