Edit ECID+Perv code to use new gen'd centaur scom headers

RTC 163585 - Done

Change-Id: I2fa3a890e5e1c19f13fc1c8b3bde8a527fc298e9
Original-Change-Id: I4fe900e3c1e919ff03158dd4cd02c268667dcbec
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34371
Dev-Ready: Brent Wieman <bwieman@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Brent Wieman <bwieman@us.ibm.com>
Reviewed-by: Peng Fei Gou <shgoupf@cn.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43849
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

1 files changed, 17 insertions, 17 deletions

diff --git a/src/import/chips/centaur/procedures/hwp/perv/cen_tp_chiplet_init3.C b/src/import/chips/centaur/procedures/hwp/perv/cen_tp_chiplet_init3.C
index 8a6bf893b..86101427b 100644
--- a/src/import/chips/centaur/procedures/hwp/perv/cen_tp_chiplet_init3.C
+++ b/src/import/chips/centaur/procedures/hwp/perv/cen_tp_chiplet_init3.C
@@ -48,7 +48,7 @@
 // Includes
 //------------------------------------------------------------------------------
 #include <cen_tp_chiplet_init3.H>
-#include <centaur_misc_scom_addresses.H>
+#include <cen_gen_scom_addresses.H>
 #include <centaur_misc_constants.H>
 
 //------------------------------------------------------------------------------
@@ -71,28 +71,28 @@ cen_tp_chiplet_init3(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF_CHIP>& i_targ
               "Start Clocks on Pervasive Region *** " );
 
     FAPI_DBG("Reset PCB Master interrupt register");
-    FAPI_TRY(fapi2::putScom(i_target, MASTER_PCB_INT, l_master_pcb_int_data));
+    FAPI_TRY(fapi2::putScom(i_target, CEN_INTERRUPT_TYPE_REG, l_master_pcb_int_data));
 
     FAPI_DBG("TP_Chiplet, drop pervasive fence");
-    FAPI_TRY(fapi2::getScom(i_target, TP_GP0, l_tp_gp0_data));
+    FAPI_TRY(fapi2::getScom(i_target, CEN_GP0_PCB, l_tp_gp0_data));
     l_tp_gp0_data.clearBit<63>();
-    FAPI_TRY(fapi2::putScom(i_target, TP_GP0, l_tp_gp0_data));
+    FAPI_TRY(fapi2::putScom(i_target, CEN_GP0_PCB, l_tp_gp0_data));
 
     FAPI_DBG("enable PIB trace mode");
-    FAPI_TRY(fapi2::getScom(i_target, TP_GP0, l_tp_gp0_data));
+    FAPI_TRY(fapi2::getScom(i_target, CEN_GP0_PCB, l_tp_gp0_data));
     l_tp_gp0_data.setBit<23>();
-    FAPI_TRY(fapi2::putScom(i_target, TP_GP0, l_tp_gp0_data));
-    FAPI_TRY(fapi2::getScom(i_target, TP_GP0, l_tp_gp0_data));
+    FAPI_TRY(fapi2::putScom(i_target, CEN_GP0_PCB, l_tp_gp0_data));
+    FAPI_TRY(fapi2::getScom(i_target, CEN_GP0_PCB, l_tp_gp0_data));
     l_tp_gp0_data.setBit<55>();
-    FAPI_TRY(fapi2::putScom(i_target, TP_GP0, l_tp_gp0_data));
+    FAPI_TRY(fapi2::putScom(i_target, CEN_GP0_PCB, l_tp_gp0_data));
 
     FAPI_DBG("Write CC, Clock Start command (all other clock domains)");
-    FAPI_TRY(fapi2::putScom(i_target, TP_CLK_REGION, l_tp_clk_region_data));
+    FAPI_TRY(fapi2::putScom(i_target, CEN_CLK_REGION_PCB, l_tp_clk_region_data));
 
     FAPI_DBG("Clock Start command (all other clock domains)");
 
     FAPI_DBG("Read Clock Status Register, check tholds");
-    FAPI_TRY(fapi2::getScom(i_target, TP_CLK_STATUS, l_tp_clk_status_data));
+    FAPI_TRY(fapi2::getScom(i_target, CEN_CLOCK_STAT_PCB, l_tp_clk_status_data));
     l_tp_clk_status_data ^= EXPECTED_CC_STATUS_START_all;
 
     FAPI_ASSERT((l_tp_clk_status_data == 0),
@@ -104,28 +104,28 @@ cen_tp_chiplet_init3(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF_CHIP>& i_targ
     FAPI_DBG("ALL other clocks are running now...");
 
     FAPI_DBG("Write GP0, clear force_align");
-    FAPI_TRY(fapi2::getScom(i_target, TP_GP0, l_tp_gp0_data));
+    FAPI_TRY(fapi2::getScom(i_target, CEN_GP0_PCB, l_tp_gp0_data));
     l_tp_gp0_data.clearBit<3>();
-    FAPI_TRY(fapi2::putScom(i_target, TP_GP0, l_tp_gp0_data));
+    FAPI_TRY(fapi2::putScom(i_target, CEN_GP0_PCB, l_tp_gp0_data));
 
     FAPI_DBG("Write GP0, clear flushmode_inhibit");
     l_tp_gp0_data.clearBit<2>();
-    FAPI_TRY(fapi2::putScom(i_target, TP_GP0, l_tp_gp0_data));
+    FAPI_TRY(fapi2::putScom(i_target, CEN_GP0_PCB, l_tp_gp0_data));
 
     FAPI_DBG("Pervasive chiplet drop FSI fence 5 (checkstop, interrupt conditions)");
-    FAPI_TRY(fapi2::getCfamRegister(i_target, CFAM_FSI_GP3, l_fsi_gp3_data));
+    FAPI_TRY(fapi2::getCfamRegister(i_target, CEN_FSIGP3, l_fsi_gp3_data));
     l_fsi_gp3_data.clearBit<26>();
-    FAPI_TRY(fapi2::putCfamRegister(i_target, CFAM_FSI_GP3, l_fsi_gp3_data));
+    FAPI_TRY(fapi2::putCfamRegister(i_target, CEN_FSIGP3, l_fsi_gp3_data));
 
     FAPI_DBG( "Check FSI2PIB-Status(31) if any clock region is stopped." );
-    FAPI_TRY(fapi2::getCfamRegister(i_target, FSI2PIB_STATUS, l_fsi_status_data));
+    FAPI_TRY(fapi2::getCfamRegister(i_target, CEN_STATUS_ROX, l_fsi_status_data));
 
     FAPI_ASSERT(!l_fsi_status_data.getBit<31>(),
                 fapi2::CEN_TP_CHIPLET_INIT3_NOT_ALL_CLK_RUNNING().set_TARGET(i_target),
                 "FSI Status register bit(31) indicates, not all clocks are running");
 
     FAPI_DBG("Setup automatic PCB network, reset on a hang");
-    FAPI_TRY(fapi2::putScom(i_target, PRV_PIB_PCBMS_RESET_REG, l_prv_pib_pcbms_reset_reg_data));
+    FAPI_TRY(fapi2::putScom(i_target, CEN_RESET_REG, l_prv_pib_pcbms_reset_reg_data));
 
 fapi_try_exit:
     FAPI_DBG("End");