Remove simics patches for indirect scoms

Task 38013
Latest bbuild has the updates for the buildIndScom.pl so we can
remove the patches.
I also deleted the p8_pnor.act patch that I forgot earlier

Change-Id: Ibcc8c79cb82590b9110eeaf91e8f5d9bed5fa934
RTC: 36813
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/814
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

5 files changed, 0 insertions, 502 deletions

diff --git a/src/build/citest/etc/patches/p8_indScom_910431.act b/src/build/citest/etc/patches/p8_indScom_910431.act
deleted file mode 100644
index 534c52efe..000000000
--- a/src/build/citest/etc/patches/p8_indScom_910431.act
+++ /dev/null
@@ -1,196 +0,0 @@
-#This file was generated by /gsa/rchgsa-h1/02/missyc/sandboxes/hostboot/src/simu/fsp/buildIndScom.pl for scomdef: p8_910431.scomdef
-
-#The following actions are used for Indirect SCOMs
-
-CAUSE_EFFECT {
-  LABEL=[Indirect Scom Action for 0x020140BF]
-  WATCH=[REG(0x020140BF)]
-  CAUSE: TARGET=[REG(0x020140BF)] OP=[BIT,OFF] BIT=[0] #Write
-  #bits 12-31 contain the indirect address.
-  EFFECT: TARGET=[INDSCOM_0x020140BF(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x020140BF)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #bits 48-63 contain the indirect SCOM data
-  EFFECT: TARGET=[INDSCOM_0x020140BF(0xFF0000DD)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x020140BF)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #write 48-63 6010420 to the IND REG
-  EFFECT: TARGET=[INDSCOM_0x020140BF(CONTENTSOF{INDSCOM_0x020140BF(0xFF0000AA)})] OP=[EQUALTO,BUFSTRING] DATA=[INDSCOM_0x020140BF(0xFF0000DD]
-  #Turn on bits 32 and 38 to show successful write
-   EFFECT: TARGET=[REG(0x020140BF)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 82000000]
-  
-  ## Read => if Bit 0 = 1 in SCOM reg, it's a read request
-  #bits 12-31 contain the indirect address
-  ELSE: TARGET=[INDSCOM_0x020140BF(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x020140BF)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #Move bits 48-63 from IND SCOM reg to 0xFF0000DD scratch reg (for debug)
-  ELSE: TARGET=[INDSCOM_0x020140BF(0xFF0000DD)]  OP=[EQUALTO,BUFSTRING,MASK]  DATA=[INDSCOM_0x020140BF(CONTENTSOF{INDSCOM_0x020140BF(0xFF0000AA)})] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Move bits 48-63 from 0xFF0000DD scratch reg to SCOM Reg
-  ELSE: TARGET=[REG(0x020140BF)] OP=[EQUALTO,BUF,MASK] DATA=[INDSCOM_0x020140BF(0xFF0000DD)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Turn on bits 32, 38, 39 to show successful read
-  ELSE: TARGET=[REG(0x020140BF)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 83000000]
-}
-
-CAUSE_EFFECT {
-  LABEL=[Indirect Scom Action for 0x0301187F]
-  WATCH=[REG(0x0301187F)]
-  CAUSE: TARGET=[REG(0x0301187F)] OP=[BIT,OFF] BIT=[0] #Write
-  #bits 12-31 contain the indirect address.
-  EFFECT: TARGET=[INDSCOM_0x0301187F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0301187F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #bits 48-63 contain the indirect SCOM data
-  EFFECT: TARGET=[INDSCOM_0x0301187F(0xFF0000DD)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0301187F)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #write 48-63 6010420 to the IND REG
-  EFFECT: TARGET=[INDSCOM_0x0301187F(CONTENTSOF{INDSCOM_0x0301187F(0xFF0000AA)})] OP=[EQUALTO,BUFSTRING] DATA=[INDSCOM_0x0301187F(0xFF0000DD]
-  #Turn on bits 32 and 38 to show successful write
-   EFFECT: TARGET=[REG(0x0301187F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 82000000]
-  
-  ## Read => if Bit 0 = 1 in SCOM reg, it's a read request
-  #bits 12-31 contain the indirect address
-  ELSE: TARGET=[INDSCOM_0x0301187F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0301187F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #Move bits 48-63 from IND SCOM reg to 0xFF0000DD scratch reg (for debug)
-  ELSE: TARGET=[INDSCOM_0x0301187F(0xFF0000DD)]  OP=[EQUALTO,BUFSTRING,MASK]  DATA=[INDSCOM_0x0301187F(CONTENTSOF{INDSCOM_0x0301187F(0xFF0000AA)})] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Move bits 48-63 from 0xFF0000DD scratch reg to SCOM Reg
-  ELSE: TARGET=[REG(0x0301187F)] OP=[EQUALTO,BUF,MASK] DATA=[INDSCOM_0x0301187F(0xFF0000DD)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Turn on bits 32, 38, 39 to show successful read
-  ELSE: TARGET=[REG(0x0301187F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 83000000]
-}
-
-CAUSE_EFFECT {
-  LABEL=[Indirect Scom Action for 0x08010C3F]
-  WATCH=[REG(0x08010C3F)]
-  CAUSE: TARGET=[REG(0x08010C3F)] OP=[BIT,OFF] BIT=[0] #Write
-  #bits 12-31 contain the indirect address.
-  EFFECT: TARGET=[INDSCOM_0x08010C3F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x08010C3F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #bits 48-63 contain the indirect SCOM data
-  EFFECT: TARGET=[INDSCOM_0x08010C3F(0xFF0000DD)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x08010C3F)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #write 48-63 6010420 to the IND REG
-  EFFECT: TARGET=[INDSCOM_0x08010C3F(CONTENTSOF{INDSCOM_0x08010C3F(0xFF0000AA)})] OP=[EQUALTO,BUFSTRING] DATA=[INDSCOM_0x08010C3F(0xFF0000DD]
-  #Turn on bits 32 and 38 to show successful write
-   EFFECT: TARGET=[REG(0x08010C3F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 82000000]
-  
-  ## Read => if Bit 0 = 1 in SCOM reg, it's a read request
-  #bits 12-31 contain the indirect address
-  ELSE: TARGET=[INDSCOM_0x08010C3F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x08010C3F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #Move bits 48-63 from IND SCOM reg to 0xFF0000DD scratch reg (for debug)
-  ELSE: TARGET=[INDSCOM_0x08010C3F(0xFF0000DD)]  OP=[EQUALTO,BUFSTRING,MASK]  DATA=[INDSCOM_0x08010C3F(CONTENTSOF{INDSCOM_0x08010C3F(0xFF0000AA)})] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Move bits 48-63 from 0xFF0000DD scratch reg to SCOM Reg
-  ELSE: TARGET=[REG(0x08010C3F)] OP=[EQUALTO,BUF,MASK] DATA=[INDSCOM_0x08010C3F(0xFF0000DD)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Turn on bits 32, 38, 39 to show successful read
-  ELSE: TARGET=[REG(0x08010C3F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 83000000]
-}
-
-CAUSE_EFFECT {
-  LABEL=[Indirect Scom Action for 0x03010C3F]
-  WATCH=[REG(0x03010C3F)]
-  CAUSE: TARGET=[REG(0x03010C3F)] OP=[BIT,OFF] BIT=[0] #Write
-  #bits 12-31 contain the indirect address.
-  EFFECT: TARGET=[INDSCOM_0x03010C3F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x03010C3F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #bits 48-63 contain the indirect SCOM data
-  EFFECT: TARGET=[INDSCOM_0x03010C3F(0xFF0000DD)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x03010C3F)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #write 48-63 6010420 to the IND REG
-  EFFECT: TARGET=[INDSCOM_0x03010C3F(CONTENTSOF{INDSCOM_0x03010C3F(0xFF0000AA)})] OP=[EQUALTO,BUFSTRING] DATA=[INDSCOM_0x03010C3F(0xFF0000DD]
-  #Turn on bits 32 and 38 to show successful write
-   EFFECT: TARGET=[REG(0x03010C3F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 82000000]
-  
-  ## Read => if Bit 0 = 1 in SCOM reg, it's a read request
-  #bits 12-31 contain the indirect address
-  ELSE: TARGET=[INDSCOM_0x03010C3F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x03010C3F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #Move bits 48-63 from IND SCOM reg to 0xFF0000DD scratch reg (for debug)
-  ELSE: TARGET=[INDSCOM_0x03010C3F(0xFF0000DD)]  OP=[EQUALTO,BUFSTRING,MASK]  DATA=[INDSCOM_0x03010C3F(CONTENTSOF{INDSCOM_0x03010C3F(0xFF0000AA)})] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Move bits 48-63 from 0xFF0000DD scratch reg to SCOM Reg
-  ELSE: TARGET=[REG(0x03010C3F)] OP=[EQUALTO,BUF,MASK] DATA=[INDSCOM_0x03010C3F(0xFF0000DD)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Turn on bits 32, 38, 39 to show successful read
-  ELSE: TARGET=[REG(0x03010C3F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 83000000]
-}
-
-CAUSE_EFFECT {
-  LABEL=[Indirect Scom Action for 0x0301103F]
-  WATCH=[REG(0x0301103F)]
-  CAUSE: TARGET=[REG(0x0301103F)] OP=[BIT,OFF] BIT=[0] #Write
-  #bits 12-31 contain the indirect address.
-  EFFECT: TARGET=[INDSCOM_0x0301103F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0301103F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #bits 48-63 contain the indirect SCOM data
-  EFFECT: TARGET=[INDSCOM_0x0301103F(0xFF0000DD)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0301103F)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #write 48-63 6010420 to the IND REG
-  EFFECT: TARGET=[INDSCOM_0x0301103F(CONTENTSOF{INDSCOM_0x0301103F(0xFF0000AA)})] OP=[EQUALTO,BUFSTRING] DATA=[INDSCOM_0x0301103F(0xFF0000DD]
-  #Turn on bits 32 and 38 to show successful write
-   EFFECT: TARGET=[REG(0x0301103F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 82000000]
-  
-  ## Read => if Bit 0 = 1 in SCOM reg, it's a read request
-  #bits 12-31 contain the indirect address
-  ELSE: TARGET=[INDSCOM_0x0301103F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0301103F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #Move bits 48-63 from IND SCOM reg to 0xFF0000DD scratch reg (for debug)
-  ELSE: TARGET=[INDSCOM_0x0301103F(0xFF0000DD)]  OP=[EQUALTO,BUFSTRING,MASK]  DATA=[INDSCOM_0x0301103F(CONTENTSOF{INDSCOM_0x0301103F(0xFF0000AA)})] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Move bits 48-63 from 0xFF0000DD scratch reg to SCOM Reg
-  ELSE: TARGET=[REG(0x0301103F)] OP=[EQUALTO,BUF,MASK] DATA=[INDSCOM_0x0301103F(0xFF0000DD)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Turn on bits 32, 38, 39 to show successful read
-  ELSE: TARGET=[REG(0x0301103F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 83000000]
-}
-
-CAUSE_EFFECT {
-  LABEL=[Indirect Scom Action for 0x0301143F]
-  WATCH=[REG(0x0301143F)]
-  CAUSE: TARGET=[REG(0x0301143F)] OP=[BIT,OFF] BIT=[0] #Write
-  #bits 12-31 contain the indirect address.
-  EFFECT: TARGET=[INDSCOM_0x0301143F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0301143F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #bits 48-63 contain the indirect SCOM data
-  EFFECT: TARGET=[INDSCOM_0x0301143F(0xFF0000DD)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0301143F)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #write 48-63 6010420 to the IND REG
-  EFFECT: TARGET=[INDSCOM_0x0301143F(CONTENTSOF{INDSCOM_0x0301143F(0xFF0000AA)})] OP=[EQUALTO,BUFSTRING] DATA=[INDSCOM_0x0301143F(0xFF0000DD]
-  #Turn on bits 32 and 38 to show successful write
-   EFFECT: TARGET=[REG(0x0301143F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 82000000]
-  
-  ## Read => if Bit 0 = 1 in SCOM reg, it's a read request
-  #bits 12-31 contain the indirect address
-  ELSE: TARGET=[INDSCOM_0x0301143F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0301143F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #Move bits 48-63 from IND SCOM reg to 0xFF0000DD scratch reg (for debug)
-  ELSE: TARGET=[INDSCOM_0x0301143F(0xFF0000DD)]  OP=[EQUALTO,BUFSTRING,MASK]  DATA=[INDSCOM_0x0301143F(CONTENTSOF{INDSCOM_0x0301143F(0xFF0000AA)})] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Move bits 48-63 from 0xFF0000DD scratch reg to SCOM Reg
-  ELSE: TARGET=[REG(0x0301143F)] OP=[EQUALTO,BUF,MASK] DATA=[INDSCOM_0x0301143F(0xFF0000DD)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Turn on bits 32, 38, 39 to show successful read
-  ELSE: TARGET=[REG(0x0301143F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 83000000]
-}
-
-CAUSE_EFFECT {
-  LABEL=[Indirect Scom Action for 0x0301183F]
-  WATCH=[REG(0x0301183F)]
-  CAUSE: TARGET=[REG(0x0301183F)] OP=[BIT,OFF] BIT=[0] #Write
-  #bits 12-31 contain the indirect address.
-  EFFECT: TARGET=[INDSCOM_0x0301183F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0301183F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #bits 48-63 contain the indirect SCOM data
-  EFFECT: TARGET=[INDSCOM_0x0301183F(0xFF0000DD)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0301183F)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #write 48-63 6010420 to the IND REG
-  EFFECT: TARGET=[INDSCOM_0x0301183F(CONTENTSOF{INDSCOM_0x0301183F(0xFF0000AA)})] OP=[EQUALTO,BUFSTRING] DATA=[INDSCOM_0x0301183F(0xFF0000DD]
-  #Turn on bits 32 and 38 to show successful write
-   EFFECT: TARGET=[REG(0x0301183F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 82000000]
-  
-  ## Read => if Bit 0 = 1 in SCOM reg, it's a read request
-  #bits 12-31 contain the indirect address
-  ELSE: TARGET=[INDSCOM_0x0301183F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0301183F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #Move bits 48-63 from IND SCOM reg to 0xFF0000DD scratch reg (for debug)
-  ELSE: TARGET=[INDSCOM_0x0301183F(0xFF0000DD)]  OP=[EQUALTO,BUFSTRING,MASK]  DATA=[INDSCOM_0x0301183F(CONTENTSOF{INDSCOM_0x0301183F(0xFF0000AA)})] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Move bits 48-63 from 0xFF0000DD scratch reg to SCOM Reg
-  ELSE: TARGET=[REG(0x0301183F)] OP=[EQUALTO,BUF,MASK] DATA=[INDSCOM_0x0301183F(0xFF0000DD)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Turn on bits 32, 38, 39 to show successful read
-  ELSE: TARGET=[REG(0x0301183F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 83000000]
-}
-
-CAUSE_EFFECT {
-  LABEL=[Indirect Scom Action for 0x020120BF]
-  WATCH=[REG(0x020120BF)]
-  CAUSE: TARGET=[REG(0x020120BF)] OP=[BIT,OFF] BIT=[0] #Write
-  #bits 12-31 contain the indirect address.
-  EFFECT: TARGET=[INDSCOM_0x020120BF(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x020120BF)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #bits 48-63 contain the indirect SCOM data
-  EFFECT: TARGET=[INDSCOM_0x020120BF(0xFF0000DD)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x020120BF)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #write 48-63 6010420 to the IND REG
-  EFFECT: TARGET=[INDSCOM_0x020120BF(CONTENTSOF{INDSCOM_0x020120BF(0xFF0000AA)})] OP=[EQUALTO,BUFSTRING] DATA=[INDSCOM_0x020120BF(0xFF0000DD]
-  #Turn on bits 32 and 38 to show successful write
-   EFFECT: TARGET=[REG(0x020120BF)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 82000000]
-  
-  ## Read => if Bit 0 = 1 in SCOM reg, it's a read request
-  #bits 12-31 contain the indirect address
-  ELSE: TARGET=[INDSCOM_0x020120BF(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x020120BF)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #Move bits 48-63 from IND SCOM reg to 0xFF0000DD scratch reg (for debug)
-  ELSE: TARGET=[INDSCOM_0x020120BF(0xFF0000DD)]  OP=[EQUALTO,BUFSTRING,MASK]  DATA=[INDSCOM_0x020120BF(CONTENTSOF{INDSCOM_0x020120BF(0xFF0000AA)})] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Move bits 48-63 from 0xFF0000DD scratch reg to SCOM Reg
-  ELSE: TARGET=[REG(0x020120BF)] OP=[EQUALTO,BUF,MASK] DATA=[INDSCOM_0x020120BF(0xFF0000DD)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Turn on bits 32, 38, 39 to show successful read
-  ELSE: TARGET=[REG(0x020120BF)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 83000000]
-}
-
diff --git a/src/build/citest/etc/patches/p8_indScom_910520.act b/src/build/citest/etc/patches/p8_indScom_910520.act
deleted file mode 100644
index 3c03fb738..000000000
--- a/src/build/citest/etc/patches/p8_indScom_910520.act
+++ /dev/null
@@ -1,244 +0,0 @@
-#This file was generated by /gsa/rchgsa-h1/02/missyc/sandboxes/hostboot/src/simu/fsp/buildIndScom.pl for scomdef: p8_910520.scomdef
-
-#The following actions are used for Indirect SCOMs
-
-CAUSE_EFFECT {
-  LABEL=[Indirect Scom Action for 0x08010C3F]
-  WATCH=[REG(0x08010C3F)]
-  CAUSE: TARGET=[REG(0x08010C3F)] OP=[BIT,OFF] BIT=[0] #Write
-  #bits 12-31 contain the indirect address.
-  EFFECT: TARGET=[INDSCOM_0x08010C3F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x08010C3F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #bits 48-63 contain the indirect SCOM data
-  EFFECT: TARGET=[INDSCOM_0x08010C3F(0xFF0000DD)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x08010C3F)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #write 48-63 6010420 to the IND REG
-  EFFECT: TARGET=[INDSCOM_0x08010C3F(CONTENTSOF{INDSCOM_0x08010C3F(0xFF0000AA)})] OP=[EQUALTO,BUFSTRING] DATA=[INDSCOM_0x08010C3F(0xFF0000DD]
-  #Turn on bits 32 and 38 to show successful write
-   EFFECT: TARGET=[REG(0x08010C3F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 82000000]
-  
-  ## Read => if Bit 0 = 1 in SCOM reg, it's a read request
-  #bits 12-31 contain the indirect address
-  ELSE: TARGET=[INDSCOM_0x08010C3F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x08010C3F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #Move bits 48-63 from IND SCOM reg to 0xFF0000DD scratch reg (for debug)
-  ELSE: TARGET=[INDSCOM_0x08010C3F(0xFF0000DD)]  OP=[EQUALTO,BUFSTRING,MASK]  DATA=[INDSCOM_0x08010C3F(CONTENTSOF{INDSCOM_0x08010C3F(0xFF0000AA)})] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Move bits 48-63 from 0xFF0000DD scratch reg to SCOM Reg
-  ELSE: TARGET=[REG(0x08010C3F)] OP=[EQUALTO,BUF,MASK] DATA=[INDSCOM_0x08010C3F(0xFF0000DD)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Turn on bits 32, 38, 39 to show successful read
-  ELSE: TARGET=[REG(0x08010C3F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 83000000]
-}
-
-CAUSE_EFFECT {
-  LABEL=[Indirect Scom Action for 0x02011E3F]
-  WATCH=[REG(0x02011E3F)]
-  CAUSE: TARGET=[REG(0x02011E3F)] OP=[BIT,OFF] BIT=[0] #Write
-  #bits 12-31 contain the indirect address.
-  EFFECT: TARGET=[INDSCOM_0x02011E3F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x02011E3F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #bits 48-63 contain the indirect SCOM data
-  EFFECT: TARGET=[INDSCOM_0x02011E3F(0xFF0000DD)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x02011E3F)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #write 48-63 6010420 to the IND REG
-  EFFECT: TARGET=[INDSCOM_0x02011E3F(CONTENTSOF{INDSCOM_0x02011E3F(0xFF0000AA)})] OP=[EQUALTO,BUFSTRING] DATA=[INDSCOM_0x02011E3F(0xFF0000DD]
-  #Turn on bits 32 and 38 to show successful write
-   EFFECT: TARGET=[REG(0x02011E3F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 82000000]
-  
-  ## Read => if Bit 0 = 1 in SCOM reg, it's a read request
-  #bits 12-31 contain the indirect address
-  ELSE: TARGET=[INDSCOM_0x02011E3F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x02011E3F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #Move bits 48-63 from IND SCOM reg to 0xFF0000DD scratch reg (for debug)
-  ELSE: TARGET=[INDSCOM_0x02011E3F(0xFF0000DD)]  OP=[EQUALTO,BUFSTRING,MASK]  DATA=[INDSCOM_0x02011E3F(CONTENTSOF{INDSCOM_0x02011E3F(0xFF0000AA)})] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Move bits 48-63 from 0xFF0000DD scratch reg to SCOM Reg
-  ELSE: TARGET=[REG(0x02011E3F)] OP=[EQUALTO,BUF,MASK] DATA=[INDSCOM_0x02011E3F(0xFF0000DD)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Turn on bits 32, 38, 39 to show successful read
-  ELSE: TARGET=[REG(0x02011E3F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 83000000]
-}
-
-CAUSE_EFFECT {
-  LABEL=[Indirect Scom Action for 0x0901183F]
-  WATCH=[REG(0x0901183F)]
-  CAUSE: TARGET=[REG(0x0901183F)] OP=[BIT,OFF] BIT=[0] #Write
-  #bits 12-31 contain the indirect address.
-  EFFECT: TARGET=[INDSCOM_0x0901183F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0901183F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #bits 48-63 contain the indirect SCOM data
-  EFFECT: TARGET=[INDSCOM_0x0901183F(0xFF0000DD)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0901183F)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #write 48-63 6010420 to the IND REG
-  EFFECT: TARGET=[INDSCOM_0x0901183F(CONTENTSOF{INDSCOM_0x0901183F(0xFF0000AA)})] OP=[EQUALTO,BUFSTRING] DATA=[INDSCOM_0x0901183F(0xFF0000DD]
-  #Turn on bits 32 and 38 to show successful write
-   EFFECT: TARGET=[REG(0x0901183F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 82000000]
-  
-  ## Read => if Bit 0 = 1 in SCOM reg, it's a read request
-  #bits 12-31 contain the indirect address
-  ELSE: TARGET=[INDSCOM_0x0901183F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0901183F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #Move bits 48-63 from IND SCOM reg to 0xFF0000DD scratch reg (for debug)
-  ELSE: TARGET=[INDSCOM_0x0901183F(0xFF0000DD)]  OP=[EQUALTO,BUFSTRING,MASK]  DATA=[INDSCOM_0x0901183F(CONTENTSOF{INDSCOM_0x0901183F(0xFF0000AA)})] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Move bits 48-63 from 0xFF0000DD scratch reg to SCOM Reg
-  ELSE: TARGET=[REG(0x0901183F)] OP=[EQUALTO,BUF,MASK] DATA=[INDSCOM_0x0901183F(0xFF0000DD)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Turn on bits 32, 38, 39 to show successful read
-  ELSE: TARGET=[REG(0x0901183F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 83000000]
-}
-
-CAUSE_EFFECT {
-  LABEL=[Indirect Scom Action for 0x0401143F]
-  WATCH=[REG(0x0401143F)]
-  CAUSE: TARGET=[REG(0x0401143F)] OP=[BIT,OFF] BIT=[0] #Write
-  #bits 12-31 contain the indirect address.
-  EFFECT: TARGET=[INDSCOM_0x0401143F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0401143F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #bits 48-63 contain the indirect SCOM data
-  EFFECT: TARGET=[INDSCOM_0x0401143F(0xFF0000DD)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0401143F)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #write 48-63 6010420 to the IND REG
-  EFFECT: TARGET=[INDSCOM_0x0401143F(CONTENTSOF{INDSCOM_0x0401143F(0xFF0000AA)})] OP=[EQUALTO,BUFSTRING] DATA=[INDSCOM_0x0401143F(0xFF0000DD]
-  #Turn on bits 32 and 38 to show successful write
-   EFFECT: TARGET=[REG(0x0401143F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 82000000]
-  
-  ## Read => if Bit 0 = 1 in SCOM reg, it's a read request
-  #bits 12-31 contain the indirect address
-  ELSE: TARGET=[INDSCOM_0x0401143F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0401143F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #Move bits 48-63 from IND SCOM reg to 0xFF0000DD scratch reg (for debug)
-  ELSE: TARGET=[INDSCOM_0x0401143F(0xFF0000DD)]  OP=[EQUALTO,BUFSTRING,MASK]  DATA=[INDSCOM_0x0401143F(CONTENTSOF{INDSCOM_0x0401143F(0xFF0000AA)})] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Move bits 48-63 from 0xFF0000DD scratch reg to SCOM Reg
-  ELSE: TARGET=[REG(0x0401143F)] OP=[EQUALTO,BUF,MASK] DATA=[INDSCOM_0x0401143F(0xFF0000DD)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Turn on bits 32, 38, 39 to show successful read
-  ELSE: TARGET=[REG(0x0401143F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 83000000]
-}
-
-CAUSE_EFFECT {
-  LABEL=[Indirect Scom Action for 0x0901143F]
-  WATCH=[REG(0x0901143F)]
-  CAUSE: TARGET=[REG(0x0901143F)] OP=[BIT,OFF] BIT=[0] #Write
-  #bits 12-31 contain the indirect address.
-  EFFECT: TARGET=[INDSCOM_0x0901143F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0901143F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #bits 48-63 contain the indirect SCOM data
-  EFFECT: TARGET=[INDSCOM_0x0901143F(0xFF0000DD)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0901143F)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #write 48-63 6010420 to the IND REG
-  EFFECT: TARGET=[INDSCOM_0x0901143F(CONTENTSOF{INDSCOM_0x0901143F(0xFF0000AA)})] OP=[EQUALTO,BUFSTRING] DATA=[INDSCOM_0x0901143F(0xFF0000DD]
-  #Turn on bits 32 and 38 to show successful write
-   EFFECT: TARGET=[REG(0x0901143F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 82000000]
-  
-  ## Read => if Bit 0 = 1 in SCOM reg, it's a read request
-  #bits 12-31 contain the indirect address
-  ELSE: TARGET=[INDSCOM_0x0901143F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0901143F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #Move bits 48-63 from IND SCOM reg to 0xFF0000DD scratch reg (for debug)
-  ELSE: TARGET=[INDSCOM_0x0901143F(0xFF0000DD)]  OP=[EQUALTO,BUFSTRING,MASK]  DATA=[INDSCOM_0x0901143F(CONTENTSOF{INDSCOM_0x0901143F(0xFF0000AA)})] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Move bits 48-63 from 0xFF0000DD scratch reg to SCOM Reg
-  ELSE: TARGET=[REG(0x0901143F)] OP=[EQUALTO,BUF,MASK] DATA=[INDSCOM_0x0901143F(0xFF0000DD)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Turn on bits 32, 38, 39 to show successful read
-  ELSE: TARGET=[REG(0x0901143F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 83000000]
-}
-
-CAUSE_EFFECT {
-  LABEL=[Indirect Scom Action for 0x04011C3F]
-  WATCH=[REG(0x04011C3F)]
-  CAUSE: TARGET=[REG(0x04011C3F)] OP=[BIT,OFF] BIT=[0] #Write
-  #bits 12-31 contain the indirect address.
-  EFFECT: TARGET=[INDSCOM_0x04011C3F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x04011C3F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #bits 48-63 contain the indirect SCOM data
-  EFFECT: TARGET=[INDSCOM_0x04011C3F(0xFF0000DD)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x04011C3F)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #write 48-63 6010420 to the IND REG
-  EFFECT: TARGET=[INDSCOM_0x04011C3F(CONTENTSOF{INDSCOM_0x04011C3F(0xFF0000AA)})] OP=[EQUALTO,BUFSTRING] DATA=[INDSCOM_0x04011C3F(0xFF0000DD]
-  #Turn on bits 32 and 38 to show successful write
-   EFFECT: TARGET=[REG(0x04011C3F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 82000000]
-  
-  ## Read => if Bit 0 = 1 in SCOM reg, it's a read request
-  #bits 12-31 contain the indirect address
-  ELSE: TARGET=[INDSCOM_0x04011C3F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x04011C3F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #Move bits 48-63 from IND SCOM reg to 0xFF0000DD scratch reg (for debug)
-  ELSE: TARGET=[INDSCOM_0x04011C3F(0xFF0000DD)]  OP=[EQUALTO,BUFSTRING,MASK]  DATA=[INDSCOM_0x04011C3F(CONTENTSOF{INDSCOM_0x04011C3F(0xFF0000AA)})] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Move bits 48-63 from 0xFF0000DD scratch reg to SCOM Reg
-  ELSE: TARGET=[REG(0x04011C3F)] OP=[EQUALTO,BUF,MASK] DATA=[INDSCOM_0x04011C3F(0xFF0000DD)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Turn on bits 32, 38, 39 to show successful read
-  ELSE: TARGET=[REG(0x04011C3F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 83000000]
-}
-
-CAUSE_EFFECT {
-  LABEL=[Indirect Scom Action for 0x02011A3F]
-  WATCH=[REG(0x02011A3F)]
-  CAUSE: TARGET=[REG(0x02011A3F)] OP=[BIT,OFF] BIT=[0] #Write
-  #bits 12-31 contain the indirect address.
-  EFFECT: TARGET=[INDSCOM_0x02011A3F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x02011A3F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #bits 48-63 contain the indirect SCOM data
-  EFFECT: TARGET=[INDSCOM_0x02011A3F(0xFF0000DD)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x02011A3F)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #write 48-63 6010420 to the IND REG
-  EFFECT: TARGET=[INDSCOM_0x02011A3F(CONTENTSOF{INDSCOM_0x02011A3F(0xFF0000AA)})] OP=[EQUALTO,BUFSTRING] DATA=[INDSCOM_0x02011A3F(0xFF0000DD]
-  #Turn on bits 32 and 38 to show successful write
-   EFFECT: TARGET=[REG(0x02011A3F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 82000000]
-  
-  ## Read => if Bit 0 = 1 in SCOM reg, it's a read request
-  #bits 12-31 contain the indirect address
-  ELSE: TARGET=[INDSCOM_0x02011A3F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x02011A3F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #Move bits 48-63 from IND SCOM reg to 0xFF0000DD scratch reg (for debug)
-  ELSE: TARGET=[INDSCOM_0x02011A3F(0xFF0000DD)]  OP=[EQUALTO,BUFSTRING,MASK]  DATA=[INDSCOM_0x02011A3F(CONTENTSOF{INDSCOM_0x02011A3F(0xFF0000AA)})] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Move bits 48-63 from 0xFF0000DD scratch reg to SCOM Reg
-  ELSE: TARGET=[REG(0x02011A3F)] OP=[EQUALTO,BUF,MASK] DATA=[INDSCOM_0x02011A3F(0xFF0000DD)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Turn on bits 32, 38, 39 to show successful read
-  ELSE: TARGET=[REG(0x02011A3F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 83000000]
-}
-
-CAUSE_EFFECT {
-  LABEL=[Indirect Scom Action for 0x0401183F]
-  WATCH=[REG(0x0401183F)]
-  CAUSE: TARGET=[REG(0x0401183F)] OP=[BIT,OFF] BIT=[0] #Write
-  #bits 12-31 contain the indirect address.
-  EFFECT: TARGET=[INDSCOM_0x0401183F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0401183F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #bits 48-63 contain the indirect SCOM data
-  EFFECT: TARGET=[INDSCOM_0x0401183F(0xFF0000DD)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0401183F)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #write 48-63 6010420 to the IND REG
-  EFFECT: TARGET=[INDSCOM_0x0401183F(CONTENTSOF{INDSCOM_0x0401183F(0xFF0000AA)})] OP=[EQUALTO,BUFSTRING] DATA=[INDSCOM_0x0401183F(0xFF0000DD]
-  #Turn on bits 32 and 38 to show successful write
-   EFFECT: TARGET=[REG(0x0401183F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 82000000]
-  
-  ## Read => if Bit 0 = 1 in SCOM reg, it's a read request
-  #bits 12-31 contain the indirect address
-  ELSE: TARGET=[INDSCOM_0x0401183F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0401183F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #Move bits 48-63 from IND SCOM reg to 0xFF0000DD scratch reg (for debug)
-  ELSE: TARGET=[INDSCOM_0x0401183F(0xFF0000DD)]  OP=[EQUALTO,BUFSTRING,MASK]  DATA=[INDSCOM_0x0401183F(CONTENTSOF{INDSCOM_0x0401183F(0xFF0000AA)})] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Move bits 48-63 from 0xFF0000DD scratch reg to SCOM Reg
-  ELSE: TARGET=[REG(0x0401183F)] OP=[EQUALTO,BUF,MASK] DATA=[INDSCOM_0x0401183F(0xFF0000DD)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Turn on bits 32, 38, 39 to show successful read
-  ELSE: TARGET=[REG(0x0401183F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 83000000]
-}
-
-CAUSE_EFFECT {
-  LABEL=[Indirect Scom Action for 0x0401103F]
-  WATCH=[REG(0x0401103F)]
-  CAUSE: TARGET=[REG(0x0401103F)] OP=[BIT,OFF] BIT=[0] #Write
-  #bits 12-31 contain the indirect address.
-  EFFECT: TARGET=[INDSCOM_0x0401103F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0401103F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #bits 48-63 contain the indirect SCOM data
-  EFFECT: TARGET=[INDSCOM_0x0401103F(0xFF0000DD)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0401103F)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #write 48-63 6010420 to the IND REG
-  EFFECT: TARGET=[INDSCOM_0x0401103F(CONTENTSOF{INDSCOM_0x0401103F(0xFF0000AA)})] OP=[EQUALTO,BUFSTRING] DATA=[INDSCOM_0x0401103F(0xFF0000DD]
-  #Turn on bits 32 and 38 to show successful write
-   EFFECT: TARGET=[REG(0x0401103F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 82000000]
-  
-  ## Read => if Bit 0 = 1 in SCOM reg, it's a read request
-  #bits 12-31 contain the indirect address
-  ELSE: TARGET=[INDSCOM_0x0401103F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x0401103F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #Move bits 48-63 from IND SCOM reg to 0xFF0000DD scratch reg (for debug)
-  ELSE: TARGET=[INDSCOM_0x0401103F(0xFF0000DD)]  OP=[EQUALTO,BUFSTRING,MASK]  DATA=[INDSCOM_0x0401103F(CONTENTSOF{INDSCOM_0x0401103F(0xFF0000AA)})] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Move bits 48-63 from 0xFF0000DD scratch reg to SCOM Reg
-  ELSE: TARGET=[REG(0x0401103F)] OP=[EQUALTO,BUF,MASK] DATA=[INDSCOM_0x0401103F(0xFF0000DD)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Turn on bits 32, 38, 39 to show successful read
-  ELSE: TARGET=[REG(0x0401103F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 83000000]
-}
-
-CAUSE_EFFECT {
-  LABEL=[Indirect Scom Action for 0x09011C3F]
-  WATCH=[REG(0x09011C3F)]
-  CAUSE: TARGET=[REG(0x09011C3F)] OP=[BIT,OFF] BIT=[0] #Write
-  #bits 12-31 contain the indirect address.
-  EFFECT: TARGET=[INDSCOM_0x09011C3F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x09011C3F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #bits 48-63 contain the indirect SCOM data
-  EFFECT: TARGET=[INDSCOM_0x09011C3F(0xFF0000DD)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x09011C3F)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #write 48-63 6010420 to the IND REG
-  EFFECT: TARGET=[INDSCOM_0x09011C3F(CONTENTSOF{INDSCOM_0x09011C3F(0xFF0000AA)})] OP=[EQUALTO,BUFSTRING] DATA=[INDSCOM_0x09011C3F(0xFF0000DD]
-  #Turn on bits 32 and 38 to show successful write
-   EFFECT: TARGET=[REG(0x09011C3F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 82000000]
-  
-  ## Read => if Bit 0 = 1 in SCOM reg, it's a read request
-  #bits 12-31 contain the indirect address
-  ELSE: TARGET=[INDSCOM_0x09011C3F(0xFF0000AA)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x09011C3F)] MASK=[LITERAL(64,000FFFFF 00000000)]
-  #Move bits 48-63 from IND SCOM reg to 0xFF0000DD scratch reg (for debug)
-  ELSE: TARGET=[INDSCOM_0x09011C3F(0xFF0000DD)]  OP=[EQUALTO,BUFSTRING,MASK]  DATA=[INDSCOM_0x09011C3F(CONTENTSOF{INDSCOM_0x09011C3F(0xFF0000AA)})] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Move bits 48-63 from 0xFF0000DD scratch reg to SCOM Reg
-  ELSE: TARGET=[REG(0x09011C3F)] OP=[EQUALTO,BUF,MASK] DATA=[INDSCOM_0x09011C3F(0xFF0000DD)] MASK=[LITERAL(64,00000000 0000FFFF)]
-  #Turn on bits 32, 38, 39 to show successful read
-  ELSE: TARGET=[REG(0x09011C3F)] OP=[OR,ON,BUF] DATA=[LITERAL(64,00000000 83000000]
-}
-
diff --git a/src/build/citest/etc/patches/p8_pnor.act b/src/build/citest/etc/patches/p8_pnor.act
deleted file mode 100644
index 86d7b040b..000000000
--- a/src/build/citest/etc/patches/p8_pnor.act
+++ /dev/null
@@ -1,45 +0,0 @@
-#####
-# LPC Actions through ECCB
-
-# Catch LPC Read to flash
-CAUSE_EFFECT {
-  LABEL=[LPC Read]
-  WATCH=[REG(0x000B0020)]  #ECCB Control Reg (FW)
-  # look for a read command
-  CAUSE: TARGET=[REG(0x000B0020)] OP=[EQUALTO,BUF,MASK] DATA=[LITERAL(64,D4010100 F0000000)] MASK=[LITERAL(64,FFFFFFFF F0000000)]
-  # push the address into a dummy reg
-  EFFECT: TARGET=[REG(0xDDDD0000)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x000B0020)] MASK=[LITERAL(64,00000000 0FFFFFFF)]
-  # move the address into our PNOR space (5 MB)
-  EFFECT: TARGET=[REG(0xDDDD0000)] OP=[INCREMENT,MASK] INCVAL=[5242880] MASK=[LITERAL(64,00000000 FFFFFFFF)]
-  # write the data from mainstore into another dummy reg
-  EFFECT: TARGET=[MODULE(readMainstore, 0xDDDD0000)] OP=[MODULECALL]  DATA=[REG(0xDDDD0001)]
-  # Copy 32-bits into the ECCB Data Reg (FW)  
-  EFFECT: TARGET=[REG(0x000B0023)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0xDDDD0001)] MASK=[LITERAL(64,FFFFFFFF 00000000)]
-  # Copy the data into the ECCB Status Reg (FW) bits 6:37
-  EFFECT: TARGET=[REG(0x000B0022)] OP=[EQUALTO,BUF,MASK,SHIFT] DATA=[REG(0xDDDD0001)] MASK=[LITERAL(64,03FFFFFF FC000000)] SHIFT=[6]
-  #ECCB Status Reg (FW)  done bit
-  EFFECT: TARGET=[REG(0x000B0022)] OP=[BIT,ON] BIT=[52]  
-}
-
-
-# Catch LPC Write to flash
-CAUSE_EFFECT {
-  LABEL=[LPC Write]
-  WATCH=[REG(0x000B0020)]  #ECCB Control Reg (FW)
-  # look for a read command
-  CAUSE: TARGET=[REG(0x000B0020)] OP=[EQUALTO,BUF,MASK] DATA=[LITERAL(64,D4000100 F0000000)] MASK=[LITERAL(64,FFFFFFFF F0000000)]
-  # push the address into a dummy reg
-  EFFECT: TARGET=[REG(0xDDDD0000)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x000B0020)] MASK=[LITERAL(64,00000000 0FFFFFFF)]
-  # move the address into our PNOR space (5 MB)
-  EFFECT: TARGET=[REG(0xDDDD0000)] OP=[INCREMENT,MASK] INCVAL=[5242880] MASK=[LITERAL(64,00000000 FFFFFFFF)]
-  # copy the data from mainstore into the dummy reg since it reads 64-bits but we only write 32
-  EFFECT: TARGET=[MODULE(readMainstore, 0xDDDD0000)] OP=[MODULECALL]  DATA=[REG(0xDDDD0001)]
-  # Copy 32-bits from the ECCB Data Reg (FW) into a dummy reg
-  EFFECT: TARGET=[REG(0xDDDD0001)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x000B0023)] MASK=[LITERAL(64,FFFFFFFF 00000000)]
-  # write the data from the dummy reg into mainstore
-  EFFECT: TARGET=[MODULE(writeMainstore, 0xDDDD0000)] OP=[MODULECALL]  DATA=[REG(0xDDDD0001)]
-  #ECCB Status Reg (FW)  done bit
-  EFFECT: TARGET=[REG(0x000B0022)] OP=[BIT,ON] BIT=[52]  
-}
-
-
diff --git a/src/build/citest/etc/patches/patchlist.txt b/src/build/citest/etc/patches/patchlist.txt
index 216b517ea..de26a64f9 100644
--- a/src/build/citest/etc/patches/patchlist.txt
+++ b/src/build/citest/etc/patches/patchlist.txt
@@ -1,10 +1,3 @@
-Enable ECCB-based LPC/PNOR access (temporary)
--RTC: Story 37972 will be used to remove the patches
--CQ: No fips defect because these changes are not permanent
--Files: p8_pnor.act
--Coreq: associated changes are also in workarounds.presimsetup
-
-
 Update centaur.act for running DRAM hardware procedures
 -RTC: Story 38362 will be used to remove the patch
 -CQ: SW127616
@@ -12,8 +5,3 @@ Update centaur.act for running DRAM hardware procedures
 -Coreq: the file is copied in place by the workarounds.presimsetup
 
 
-Update the Action Files to add behavior for Indirect SCOM error bits
--RTC: task 38013  will be used to remove the patch
--CMVC:  Defect 825800 was used to check in the changes in buildIndScom.pl
--Files: p8_indScom_910431.act , p8_indScom_910520.act in the src/build/citest/etc/patches directory
--Coreq: associated changes are also in workarounds.presimsetup that need to be removed.
diff --git a/src/build/citest/etc/workarounds.presimsetup b/src/build/citest/etc/workarounds.presimsetup
index ca5f0a717..fe2d22234 100755
--- a/src/build/citest/etc/workarounds.presimsetup
+++ b/src/build/citest/etc/workarounds.presimsetup
@@ -59,11 +59,6 @@ mkdir -p $sb/simu/data/cec-chip/
 cp $HOSTBOOTROOT/src/build/citest/etc/patches/centaur.act $sb/simu/data/cec-chip/
 #fixme with Story 38362
 
-# added this patch until defect 825800 is integrated and included in a hostboot bbuild.
-echo "+++ Add workaround for p8 Indirect SCOM action files."
-cp --update $HOSTBOOTROOT/src/build/citest/etc/patches/p8_indScom_910431.act $sb/simu/data/cec-chip/p8_indScom_910431.act
-cp --update $HOSTBOOTROOT/src/build/citest/etc/patches/p8_indScom_910520.act $sb/simu/data/cec-chip/p8_indScom_910520.act
-
 # Leaving this here as an example for the future
 echo "+++ Update to new phyp and mambo level."
 mkdir -p $sb/simu/data