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| author | Andre Marin <aamarin@us.ibm.com> | 2016-07-18 13:29:22 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-06-08 12:26:29 -0400 |
| commit | 3e223a4466e9ab93d6fe271c108b101b05b22bcf (patch) | |
| tree | 81eb5396fa798e6c70b63199a63f05b0e516d97b /src | |
| parent | 55f3850bd9042ffb07dc05669dd1c6886aeee27a (diff) | |
| download | talos-hostboot-3e223a4466e9ab93d6fe271c108b101b05b22bcf.tar.gz talos-hostboot-3e223a4466e9ab93d6fe271c108b101b05b22bcf.zip | |
Fix p9_mss_utils_to_throttle, create throttles API, attribute cleanup
Change-Id: Ic5bb202315cfa0cdc0ddead43231e4b6bfed5ec1
Original-Change-Id: Ibdb563542adb9e4f05dd07d597a9687b1deaf3c8
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27183
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41506
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/p9_mss_utils_to_throttle.H | 35 |
1 files changed, 5 insertions, 30 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_utils_to_throttle.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_utils_to_throttle.H index 638a3c3b8..ab8d051e9 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_utils_to_throttle.H +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_utils_to_throttle.H @@ -25,12 +25,15 @@ /// /// @file p9_mss_utils_to_throttle.H -/// @brief Set the N throttle attributes for a given dram data bus utilization. +/// @brief Sets throttles +/// TMGT will call this procedure to set the N address operations (commands) +/// allowed within a window of M DRAM clocks given the minimum dram data bus utilization. /// + // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> // *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com> // *HWP Team: Memory -// *HWP Level: 1 +// *HWP Level: 2 // *HWP Consumed by: FSP:HB #ifndef __P9_MSS_UTILS_TO_THROTTLE__ @@ -38,34 +41,6 @@ #include <fapi2.H> -namespace mss -{ - -enum THROTTLE_UTILS : uint64_t -{ - // Dram data bus utilization is 4X the address bus utilization - DRAM_BUS_UTILS = 4, - PERCENT_CONVERSION = 100, -}; - -/// -/// @brief Calculate N (address operations) allowed within a window of M DRAM clocks -/// @param[in] databus_util databus utilization percentage (e.g. 5% = 5) -/// @param[in] num_dram_clocks window of M DRAM clocks -/// @return FAPI2_RC_SUCCESS iff ok -/// -inline uint32_t commands_allowed_over_clock_window(uint8_t databus_util, uint32_t num_dram_clocks) -{ - uint32_t divisor = DRAM_BUS_UTILS * PERCENT_CONVERSION; - uint32_t divident = databus_util * num_dram_clocks; - uint32_t quotient = divident / divisor; - uint32_t remainder = divident % divisor; - - return quotient + (remainder == 0 ? 0 : 1); -} - -}// mss - typedef fapi2::ReturnCode (*p9_mss_utils_to_throttle_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_MCS>&); extern "C" |
