diff options
author | Elizabeth Liner <eliner@us.ibm.com> | 2015-10-28 14:22:20 -0500 |
---|---|---|
committer | Patrick Williams <iawillia@us.ibm.com> | 2015-12-11 15:30:28 -0600 |
commit | 3b57d1c52f78645cfbe69f1dd059ac964d53de1f (patch) | |
tree | 8292a35faec981b4450df111bee65e88bb2c1f4b /src | |
parent | a66777ad5b0aaab094211e2d3bc0f3c40a95a067 (diff) | |
download | talos-hostboot-3b57d1c52f78645cfbe69f1dd059ac964d53de1f.tar.gz talos-hostboot-3b57d1c52f78645cfbe69f1dd059ac964d53de1f.zip |
Update PHYP Attributes with new P9 MMIO values
Change-Id: I167d9500e8478e22b1c13c8744f2566e9da29c1d
RTC:139073
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21601
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src')
-rwxr-xr-x | src/usr/targeting/common/genHwsvMrwXml.pl | 180 | ||||
-rw-r--r-- | src/usr/targeting/common/processMrw.pl | 11 | ||||
-rw-r--r-- | src/usr/targeting/common/xmltohb/attribute_types.xml | 217 | ||||
-rw-r--r-- | src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml | 24 | ||||
-rwxr-xr-x | src/usr/targeting/common/xmltohb/target_types.xml | 20 |
5 files changed, 389 insertions, 63 deletions
diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl index 346c24c9f..4b60dc2e9 100755 --- a/src/usr/targeting/common/genHwsvMrwXml.pl +++ b/src/usr/targeting/common/genHwsvMrwXml.pl @@ -2682,6 +2682,12 @@ sub generate_sys "; } + #adding XSCOM_BASE_ADDRESS to the system target for HDAT + print " + <attribute><id>XSCOM_BASE_ADDRESS</id> + <default>0x000603FC00000000</default> + </attribute> +"; if( $haveFSPs == 0 ) { @@ -3297,11 +3303,13 @@ sub generate_proc $node, $proc, $fruid, $ipath, $hwTopology, $mboxFspApath, $mboxFspAsize, $mboxFspBpath, $mboxFspBsize, $ordinalId ); - #TODO: RTC 139073 Need to fix all of these calculations. # Data from PHYP Memory Map print "\n"; print " <!-- Data from PHYP Memory Map -->\n"; + my $nodeSize = 0x200000000000; # 32 TB + my $chipSize = 0x40000000000; # 4 TB + # Calculate the FSP and PSI BRIGDE BASE ADDR my $fspBase = 0; my $psiBase = 0; @@ -3310,74 +3318,180 @@ sub generate_proc if (($i->{'processor'}->{target}->{position} eq $proc) && ($i->{'processor'}->{target}->{node} eq $node )) { - $fspBase = 0x0003FFE000000000 + 0x400000000*$lognode + 0x100000000*$logid; - $psiBase = 0x0003FFFE80000000 + 0x400000*$psichip + 0x100000*$psilink; + #FSP MMIO address + $fspBase = 0x0006030100000000 + $nodeSize*$lognode + + $chipSize*$logid; + #PSI Link address + $psiBase = 0x0006030203000000 + $nodeSize*$psichip + + $chipSize*$logid; last; } } - # Starts at 1024TB - 128GB, 4GB per proc + # FSP MMIO address printf( " <attribute><id>FSP_BASE_ADDR</id>\n" ); printf( " <default>0x%016X</default>\n", $fspBase ); printf( " </attribute>\n" ); - # Starts at 1024TB - 6GB, 1MB per link/proc + # PSI Link address printf( " <attribute><id>PSI_BRIDGE_BASE_ADDR</id>\n" ); printf( " <default>0x%016X</default>\n", $psiBase ); printf( " </attribute>\n" ); - # Starts at 1024TB - 2GB, 1MB per proc + #HDAT consumes INTP_BASE_ADDR. leaving for now. TODO RTC:140452 printf( " <attribute><id>INTP_BASE_ADDR</id>\n" ); printf( " <default>0x%016X</default>\n", 0x0003FFFF80000000 + 0x400000*$lognode + 0x100000*$logid ); printf( " </attribute>\n" ); - # Starts at 1024TB - 7GB, 1MB per PHB (=4MB per proc) - printf( " <attribute><id>PHB_BASE_ADDRS</id>\n" ); + #PHB 64 bit MMIO address (PHB0-PHB5) + printf( " <attribute><id>PHB_MMIO_ADDRS_64</id>\n" ); + printf( " <default>\n" ); + printf( " 0x%016X,0x%016X,\n", + 0x0006000000000000 + $nodeSize*$lognode + $chipSize*$logid, + 0x0006002000000000 + $nodeSize*$lognode + $chipSize*$logid); + printf( " 0x%016X,0x%016X,\n", + 0x0006004000000000 + $nodeSize*$lognode + $chipSize*$logid, + 0x0006006000000000 + $nodeSize*$lognode + $chipSize*$logid); + printf( " 0x%016X,0x%016X,\n", + 0x0006008000000000 + $nodeSize*$lognode + $chipSize*$logid, + 0x000600A000000000 + $nodeSize*$lognode + $chipSize*$logid); + printf( " </default>\n" ); + printf( " </attribute>\n" ); + + #PHB 32 Bit MMIO address (PHB0-PHB5) + printf( " <attribute><id>PHB_MMIO_ADDRS_32</id>\n" ); printf( " <default>\n" ); printf( " 0x%016X,0x%016X,\n", - 0x0003FFFE40000000 + 0x1000000*$lognode + 0x400000*$logid + 0x100000*0, - 0x0003FFFE40000000 + 0x1000000*$lognode + 0x400000*$logid + 0x100000*1 ); - printf( " 0x%016X,0x%016X\n", - 0x0003FFFE40000000 + 0x1000000*$lognode + 0x400000*$logid + 0x100000*2, - 0x0003FFFE40000000 + 0x1000000*$lognode + 0x400000*$logid + 0x100000*3 ); + 0x000600C000000000 + $nodeSize*$lognode + $chipSize*$logid, + 0x000600C080000000 + $nodeSize*$lognode + $chipSize*$logid); + printf( " 0x%016X,0x%016X,\n", + 0x000600C100000000 + $nodeSize*$lognode + $chipSize*$logid, + 0x000600C180000000 + $nodeSize*$lognode + $chipSize*$logid); + printf( " 0x%016X,0x%016X,\n", + 0x000600C200000000 + $nodeSize*$lognode + $chipSize*$logid, + 0x000600C280000000 + $nodeSize*$lognode + $chipSize*$logid); printf( " </default>\n" ); printf( " </attribute>\n" ); - # Starts at 1024TB -0.5TB, 2GB per PHB (=8GB per proc) - printf( " <attribute><id>PCI_BASE_ADDRS_32</id>\n" ); + #PHB XIVE ESB address (PHB0-PHB5) + printf( " <attribute><id>PHB_XIVE_ESB_ADDRS</id>\n" ); printf( " <default>\n" ); printf( " 0x%016X,0x%016X,\n", - 0x0003FF8000000000 + 0x800000000*$lognode + 0x200000000*$logid + 0x80000000*0, - 0x0003FF8000000000 + 0x800000000*$lognode + 0x200000000*$logid + 0x80000000*1 ); - printf( " 0x%016X,0x%016X\n", - 0x0003FF8000000000 + 0x800000000*$lognode + 0x200000000*$logid + 0x80000000*2, - 0x0003FF8000000000 + 0x800000000*$lognode + 0x200000000*$logid + 0x80000000*3 ); + 0x000600C300000000 + $nodeSize*$lognode + $chipSize*$logid, + 0x000600C320000000 + $nodeSize*$lognode + $chipSize*$logid); + printf( " 0x%016X,0x%016X,\n", + 0x000600C340000000 + $nodeSize*$lognode + $chipSize*$logid, + 0x000600C360000000 + $nodeSize*$lognode + $chipSize*$logid); + printf( " 0x%016X,0x%016X,\n", + 0x000600C380000000 + $nodeSize*$lognode + $chipSize*$logid, + 0x000600C3A0000000 + $nodeSize*$lognode + $chipSize*$logid); printf( " </default>\n" ); printf( " </attribute>\n" ); - # Starts at 976TB, 64GB per PHB (=256GB per proc) - printf( " <attribute><id>PCI_BASE_ADDRS_64</id>\n" ); + #PHB Register Space address (PHB0-PHB5) + printf( " <attribute><id>PHB_REG_ADDRS</id>\n" ); printf( " <default>\n" ); printf( " 0x%016X,0x%016X,\n", - 0x0003D00000000000 + 0x10000000000*$lognode + 0x4000000000*$logid + 0x1000000000*0, - 0x0003D00000000000 + 0x10000000000*$lognode + 0x4000000000*$logid + 0x1000000000*1 ); - printf( " 0x%016X,0x%016X\n", - 0x0003D00000000000 + 0x10000000000*$lognode + 0x4000000000*$logid + 0x1000000000*2, - 0x0003D00000000000 + 0x10000000000*$lognode + 0x4000000000*$logid + 0x1000000000*3 ); + 0x000600C3C0000000 + $nodeSize*$lognode + $chipSize*$logid, + 0x000600C3C0100000 + $nodeSize*$lognode + $chipSize*$logid); + printf( " 0x%016X,0x%016X,\n", + 0x000600C3C0200000 + $nodeSize*$lognode + $chipSize*$logid, + 0x000600C3C0300000 + $nodeSize*$lognode + $chipSize*$logid); + printf( " 0x%016X,0x%016X,\n", + 0x000600C3C0400000 + $nodeSize*$lognode + $chipSize*$logid, + 0x000600C3C0500000 + $nodeSize*$lognode + $chipSize*$logid); printf( " </default>\n" ); printf( " </attribute>\n" ); - # Starts at 1024TB - 3GB - printf( " <attribute><id>RNG_BASE_ADDR</id>\n" ); + #XIVE Routing ESB address + printf( " <attribute><id>XIVE_ROUTING_ESB_ADDR</id>\n" ); + printf( " <default>0x%016X</default>\n", + 0x0006010000000000 + $nodeSize*$lognode + $chipSize*$logid ); + printf( " </attribute>\n" ); + + #XIVE Routing END address + printf( " <attribute><id>XIVE_ROUTING_END_ADDR</id>\n" ); + printf( " <default>0x%016X</default>\n", + 0x0006011000000000 + $nodeSize*$lognode + $chipSize*$logid ); + printf( " </attribute>\n" ); + + #XIVE Presentation NVT address + printf( " <attribute><id>XIVE_PRESENTATION_NVT_ADDR</id>\n" ); + printf( " <default>0x%016X</default>\n", + 0x0006012000000000 + $nodeSize*$lognode + $chipSize*$logid ); + printf( " </attribute>\n" ); + + #VAS Hypervisor Window Contexts address + printf( " <attribute><id>VAS_HYPERVISOR_WINDOW_CONTEXT_ADDR</id>\n" ); + printf( " <default>0x%016X</default>\n", + 0x0006013000000000 + $nodeSize*$lognode + $chipSize*$logid ); + printf( " </attribute>\n" ); + + #VAS User Window Contexts address + printf( " <attribute><id>VAS_USER_WINDOW_CONTEXT_ADDR</id>\n" ); + printf( " <default>0x%016X</default>\n", + 0x0006013100000000 + $nodeSize*$lognode + $chipSize*$logid ); + printf( " </attribute>\n" ); + + #LPC Bus address + printf( " <attribute><id>LPC_BUS_ADDR</id>\n" ); + printf( " <default>0x%016X</default>\n", + 0x0006030000000000 + $nodeSize*$lognode + $chipSize*$logid ); + printf( " </attribute>\n" ); + + #Nvidia Link - NPU Priviledged address + printf( " <attribute><id>NVIDIA_NPU_PRIVILEGED_ADDR</id>\n" ); + printf( " <default>0x%016X</default>\n", + 0x0006030200000000 + $nodeSize*$lognode + $chipSize*$logid ); + printf( " </attribute>\n" ); + + #Nvidia Link - NPU User Regs address + printf( " <attribute><id>NVIDIA_NPU_USER_REG_ADDR</id>\n" ); + printf( " <default>0x%016X</default>\n", + 0x0006030201000000 + $nodeSize*$lognode + $chipSize*$logid ); + printf( " </attribute>\n" ); + + #Nvidia Link - Phy 0 Regs address + printf( " <attribute><id>NVIDIA_PHY0_REG_ADDR</id>\n" ); + printf( " <default>0x%016X</default>\n", + 0x0006030201200000 + $nodeSize*$lognode + $chipSize*$logid ); + printf( " </attribute>\n" ); + + #Nvidia Link - Phy 1 Regs address + printf( " <attribute><id>NVIDIA_PHY1_REG_ADDR</id>\n" ); + printf( " <default>0x%016X</default>\n", + 0x0006030201400000 + $nodeSize*$lognode + $chipSize*$logid ); + printf( " </attribute>\n" ); + + #XIVE - Controller Bar address + printf( " <attribute><id>XIVE_CONTROLLER_BAR_ADDR</id>\n" ); + printf( " <default>0x%016X</default>\n", + 0x0006030203100000 + $nodeSize*$lognode + $chipSize*$logid ); + printf( " </attribute>\n" ); + + #XIVE - Presentation Bar address + printf( " <attribute><id>XIVE_PRESENTATION_BAR_ADDR</id>\n" ); + printf( " <default>0x%016X</default>\n", + 0x0006030203180000 + $nodeSize*$lognode + $chipSize*$logid ); + printf( " </attribute>\n" ); + + #PSI HB - ESP space address + printf( " <attribute><id>PSI_HB_ESP_ADDR</id>\n" ); + printf( " <default>0x%016X</default>\n", + 0x00060302031C0000 + $nodeSize*$lognode + $chipSize*$logid ); + printf( " </attribute>\n" ); + + #NX - RNG space address + printf( " <attribute><id>NX_RNG_ADDR</id>\n" ); printf( " <default>0x%016X</default>\n", - 0x0003FFFF40000000 + 0x4000*$lognode + 0x1000*$logid ); + 0x00060302031D0000 + $nodeSize*$lognode + $chipSize*$logid ); printf( " </attribute>\n" ); - # Starts at 992TB - 128GB per MCS/Centaur - printf( " <attribute><id>IBSCOM_PROC_BASE_ADDR</id>\n" ); + #XSCOM address + printf( " <attribute><id>XSCOM_BASE_ADDRESS</id>\n" ); printf( " <default>0x%016X</default>\n", - 0x0003E00000000000 + 0x40000000000*$lognode + 0x10000000000*$logid ); + 0x000603FC00000000 + $nodeSize*$lognode + $chipSize*$logid ); printf( " </attribute>\n" ); print " <!-- End PHYP Memory Map -->\n\n"; diff --git a/src/usr/targeting/common/processMrw.pl b/src/usr/targeting/common/processMrw.pl index 9276768d9..0130cbb4a 100644 --- a/src/usr/targeting/common/processMrw.pl +++ b/src/usr/targeting/common/processMrw.pl @@ -614,8 +614,15 @@ sub setupBars $targetObj->{TOPOLOGY}->{$node}->{$proc}++; my @bars=("FSP_BASE_ADDR","PSI_BRIDGE_BASE_ADDR", - "INTP_BASE_ADDR","PHB_BASE_ADDRS","PCI_BASE_ADDRS_32", - "PCI_BASE_ADDRS_64","RNG_BASE_ADDR","IBSCOM_PROC_BASE_ADDR"); + "INTP_BASE_ADDR","PHB_MMIO_ADDRS_64","PHB_MMIO_ADDRS_32", + "PHB_XIVE_ESB_ADDRS","PHB_REG_ADDRS","XIVE_ROUTING_ESB_ADDR", + "XIVE_ROUTING_END_ADDR","XIVE_PRESENTATION_NVT_ADDR", + "VAS_HYPERVISOR_WINDOW_CONTEXT_ADDR", + "VAS_USER_WINDOW_CONTEXT_ADDR","LPC_BUS_ADDR", + "NVIDIA_NPU_PRIVILEGED_ADDR","NVIDIA_NPU_USER_REG_ADDR", + "NVIDIA_PHY0_REG_ADDR","NVIDIA_PHY1_REG_ADDR", + "XIVE_CONTROLLER_BAR_ADDR","XIVE_PRESENTATION_BAR_ADDR", + "PSI_HB_ESP_ADDR","NX_RNG_ADDR"); # Attribute only valid in naples-based systems if (!$targetObj->isBadAttribute($target,"NPU_MMIO_BAR_BASE_ADDR") ) { diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index 9ff6b10f8..0aedf3831 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -2782,8 +2782,6 @@ <description>System XSCOM base address</description> <simpleType> <uint64_t> - <!-- 1020TB, 32GB per proc --> - <default>0x0003FC0000000000</default> </uint64_t> </simpleType> <persistency>non-volatile</persistency> @@ -16749,4 +16747,219 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript </hwpfToHbAttrMap> </attribute> +<attribute> + <id>PHB_MMIO_ADDRS_64</id> + <description>PHB0-PHB5 64 bits addresses + MMIO consumed by PHYP + </description> + <simpleType> + <uint64_t></uint64_t> + <array>6</array> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>PHB_MMIO_ADDRS_32</id> + <description>PHB0-PHB5 32 bit addresses + MMIO consumed by PHYP + </description> + <simpleType> + <uint64_t></uint64_t> + <array>6</array> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute>` + +<attribute> + <id>PHB_XIVE_ESB_ADDRS</id> + <description>PHB0-PHB5 XIVE ESB addresses + MMIO consumed by PHYP + </description> + <simpleType> + <uint64_t></uint64_t> + <array>6</array> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>PHB_REG_ADDRS</id> + <description>PHB0-PHB5 Register Space addresses + MMIO consumed by PHYP + </description> + <simpleType> + <uint64_t></uint64_t> + <array>6</array> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>XIVE_ROUTING_ESB_ADDR</id> + <description>XIVE Routing ESB address + MMIO consumed by PHYP + </description> + <simpleType> + <uint64_t></uint64_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>XIVE_ROUTING_END_ADDR</id> + <description>XIVE Routing END address + MMIO consumed by PHYP + </description> + <simpleType> + <uint64_t></uint64_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>XIVE_PRESENTATION_NVT_ADDR</id> + <description>XIVE Presentation NVT address + MMIO consumed by PHYP + </description> + <simpleType> + <uint64_t></uint64_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>VAS_HYPERVISOR_WINDOW_CONTEXT_ADDR</id> + <description>VAS - Hypervisor Window Contexts address + MMIO consumed by PHYP + </description> + <simpleType> + <uint64_t></uint64_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>VAS_USER_WINDOW_CONTEXT_ADDR</id> + <description>VAS - User Window Context address + MMIO consumed by PHYP + </description> + <simpleType> + <uint64_t></uint64_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>LPC_BUS_ADDR</id> + <description>LPC Bus address - MMIO consumed by PHYP</description> + <simpleType> + <uint64_t></uint64_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>NVIDIA_NPU_PRIVILEGED_ADDR</id> + <description>Nvidia Link - NPU Privileged Regs address + MMIO consumed by PHYP + </description> + <simpleType> + <uint64_t></uint64_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>NVIDIA_NPU_USER_REG_ADDR</id> + <description>Nvidia Link - NPU User Regs address + MMIO consumed by PHYP + </description> + <simpleType> + <uint64_t></uint64_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>NVIDIA_PHY0_REG_ADDR</id> + <description>Nvidia Link - Phy 0 Regs address + MMIO consumed by PHYP + </description> + <simpleType> + <uint64_t></uint64_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>NVIDIA_PHY1_REG_ADDR</id> + <description>Nvidia Link - Phy 1 Regs address + MMIO consumed by PHYP + </description> + <simpleType> + <uint64_t></uint64_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>XIVE_CONTROLLER_BAR_ADDR</id> + <description>XIVE - Controller Bar address + MMIO consumed by PHYP + </description> + <simpleType> + <uint64_t></uint64_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>XIVE_PRESENTATION_BAR_ADDR</id> + <description>XIVE - Presentation Bar address + MMIO consumed by PHYP + </description> + <simpleType> + <uint64_t></uint64_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>PSI_HB_ESP_ADDR</id> + <description>PSIHB - ESB space address - MMIO consumed by PHYP + </description> + <simpleType> + <uint64_t></uint64_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>NX_RNG_ADDR</id> + <description>NX - RNG space - MMIO consumed by PHYP</description> + <simpleType> + <uint64_t></uint64_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + </attributes> diff --git a/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml b/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml index 53df0adb8..577c11fb7 100644 --- a/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml @@ -186,30 +186,6 @@ <attribute><id>INTP_BASE_ADDR</id> <default>0x0003FFFF80300000</default> </attribute> - <attribute><id>PHB_BASE_ADDRS</id> - <default> - 0x0003FFFE40C00000,0x0003FFFE40D00000, - 0x0003FFFE40E00000,0x0003FFFE40F00000 - </default> - </attribute> - <attribute><id>PCI_BASE_ADDRS_64</id> - <default> - 0x0003D0C000000000,0x0003D0D000000000, - 0x0003D0E000000000,0x0003D0F000000000 - </default> - </attribute> - <attribute><id>PCI_BASE_ADDRS_32</id> - <default> - 0x0003FF8600000000,0x0003FF8680000000, - 0x0003FF8700000000,0x0003FF8780000000 - </default> - </attribute> - <attribute><id>RNG_BASE_ADDR</id> - <default>0x0003FFFF40003000</default> - </attribute> - <attribute><id>IBSCOM_PROC_BASE_ADDR</id> - <default>0x0003E50000000000</default> - </attribute> <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index ac76677f2..0fda5f612 100755 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -2037,11 +2037,27 @@ <attribute><id>PCI_BASE_ADDRS_32</id></attribute> <attribute><id>MEM_BASE</id></attribute> <attribute><id>MIRROR_BASE</id></attribute> - <attribute><id>RNG_BASE_ADDR</id></attribute> <attribute><id>RNG_BAR_SIZE</id></attribute> <attribute><id>IMT_BASE_ADDR</id></attribute> <attribute><id>IMT_BAR_SIZE</id></attribute> - <attribute><id>IBSCOM_PROC_BASE_ADDR</id></attribute> + <attribute><id>PHB_MMIO_ADDRS_64</id></attribute> + <attribute><id>PHB_MMIO_ADDRS_32</id></attribute> + <attribute><id>PHB_XIVE_ESB_ADDRS</id></attribute> + <attribute><id>PHB_REG_ADDRS</id></attribute> + <attribute><id>XIVE_ROUTING_ESB_ADDR</id></attribute> + <attribute><id>XIVE_ROUTING_END_ADDR</id></attribute> + <attribute><id>XIVE_PRESENTATION_NVT_ADDR</id></attribute> + <attribute><id>VAS_HYPERVISOR_WINDOW_CONTEXT_ADDR</id></attribute> + <attribute><id>VAS_USER_WINDOW_CONTEXT_ADDR</id></attribute> + <attribute><id>LPC_BUS_ADDR</id></attribute> + <attribute><id>NVIDIA_NPU_PRIVILEGED_ADDR</id></attribute> + <attribute><id>NVIDIA_NPU_USER_REG_ADDR</id></attribute> + <attribute><id>NVIDIA_PHY0_REG_ADDR</id></attribute> + <attribute><id>NVIDIA_PHY1_REG_ADDR</id></attribute> + <attribute><id>XIVE_CONTROLLER_BAR_ADDR</id></attribute> + <attribute><id>XIVE_PRESENTATION_BAR_ADDR</id></attribute> + <attribute><id>PSI_HB_ESP_ADDR</id></attribute> + <attribute><id>NX_RNG_ADDR</id></attribute> <!-- end Memory Map --> <attribute><id>ECID</id></attribute> |