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authorLouis Stermole <stermole@us.ibm.com>2018-10-12 08:58:56 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2018-12-19 16:35:00 -0600
commit3a992958a6d431a58a0cc72f6c5554ef0ed2f617 (patch)
tree22e5725bbfc4d8cea07fc1bf703a7002cd7ee710 /src
parent1b23e259236678f334ad506255ae28d0df684138 (diff)
downloadtalos-hostboot-3a992958a6d431a58a0cc72f6c5554ef0ed2f617.tar.gz
talos-hostboot-3a992958a6d431a58a0cc72f6c5554ef0ed2f617.zip
Add p9a_mss_volt procedure
Change-Id: I893685b365f6c815653717d4cc8149f2ea7acb94 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68412 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68751 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_volt.xml57
-rw-r--r--src/import/generic/memory/lib/spd/spd_facade.H4
-rw-r--r--src/import/generic/memory/lib/utils/find.H63
-rw-r--r--src/import/generic/memory/lib/utils/voltage/gen_mss_voltage_traits.H30
-rw-r--r--src/import/generic/procedures/xml/error_info/generic_error.xml20
5 files changed, 111 insertions, 63 deletions
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_volt.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_volt.xml
deleted file mode 100644
index 73f3c1b0a..000000000
--- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_volt.xml
+++ /dev/null
@@ -1,57 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG -->
-<!-- This is an automatically generated prolog. -->
-<!-- -->
-<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_volt.xml $ -->
-<!-- -->
-<!-- OpenPOWER HostBoot Project -->
-<!-- -->
-<!-- Contributors Listed Below - COPYRIGHT 2015,2017 -->
-<!-- [+] International Business Machines Corp. -->
-<!-- -->
-<!-- -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License"); -->
-<!-- you may not use this file except in compliance with the License. -->
-<!-- You may obtain a copy of the License at -->
-<!-- -->
-<!-- http://www.apache.org/licenses/LICENSE-2.0 -->
-<!-- -->
-<!-- Unless required by applicable law or agreed to in writing, software -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS, -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or -->
-<!-- implied. See the License for the specific language governing -->
-<!-- permissions and limitations under the License. -->
-<!-- -->
-<!-- IBM_PROLOG_END_TAG -->
-
-<!-- -->
-<!-- @file memory_mss_volt.xml -->
-<!-- @brief Error xml for mss_volt -->
-<!-- -->
-<!-- *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -->
-<!-- *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com> -->
-<!-- *HWP Team: Memory -->
-<!-- *HWP Level: 3 -->
-<!-- *HWP Consumed by: HB:FSP -->
-<!-- -->
-
-<hwpErrors>
- <hwpError>
- <rc>RC_MSS_VOLT_DDR_TYPE_REQUIRED_VOLTAGE</rc>
- <description>One or more DIMMs do not support required voltage for DDR type.</description>
- <ffdc>EXPECTED_OPERABLE</ffdc>
- <ffdc>EXPECTED_ENDURANT</ffdc>
- <ffdc>ACTUAL_OPERABLE</ffdc>
- <ffdc>ACTUAL_ENDURANT</ffdc>
- <callout>
- <procedure>MEMORY_PLUGGING_ERROR</procedure>
- <priority>HIGH</priority>
- </callout>
- <callout>
- <target>DIMM_TARGET</target>
- <priority>MEDIUM</priority>
- </callout>
- <deconfigure>
- <target>DIMM_TARGET</target>
- </deconfigure>
- </hwpError>
-</hwpErrors>
diff --git a/src/import/generic/memory/lib/spd/spd_facade.H b/src/import/generic/memory/lib/spd/spd_facade.H
index 5c86d7895..b8ac288d1 100644
--- a/src/import/generic/memory/lib/spd/spd_facade.H
+++ b/src/import/generic/memory/lib/spd/spd_facade.H
@@ -1619,9 +1619,9 @@ fapi2::ReturnCode get_spd_decoder_list( const fapi2::Target<T>& i_target,
for( const auto& l_dimm : mss::find_targets<fapi2::TARGET_TYPE_DIMM>(i_target) )
{
std::vector<uint8_t> l_spd;
- FAPI_TRY( get_raw_data(l_dimm, l_spd) );
+ FAPI_TRY( get_raw_data(l_dimm, l_spd), "%s Failed get_raw_data", mss::c_str(l_dimm) );
- FAPI_TRY( add_decoder_to_list(l_dimm, l_spd, o_spd_decoder) );
+ FAPI_TRY( add_decoder_to_list(l_dimm, l_spd, o_spd_decoder), "%s Failed add_decoder_to_list", mss::c_str(l_dimm) );
}// dimms
fapi_try_exit:
diff --git a/src/import/generic/memory/lib/utils/find.H b/src/import/generic/memory/lib/utils/find.H
index cb0ffab15..df7d55d41 100644
--- a/src/import/generic/memory/lib/utils/find.H
+++ b/src/import/generic/memory/lib/utils/find.H
@@ -131,6 +131,30 @@ inline fapi2::Target<fapi2::TARGET_TYPE_MCS> find_target( const fapi2::Target<fa
}
///
+/// @brief find the MEM_PORT given a MEM_PORT
+/// @param[in] i_self the fapi2 target MEM_PORT
+/// @return a MEM_PORT target.
+///
+template<>
+inline fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT> find_target( const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>&
+ i_self)
+{
+ return i_self;
+}
+
+///
+/// @brief find the OCMB_CHIP given a OCMB_CHIP
+/// @param[in] i_self the fapi2 target OCMB_CHIP
+/// @return a OCMB_CHIP target.
+///
+template<>
+inline fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> find_target( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>&
+ i_self)
+{
+ return i_self;
+}
+
+///
/// @brief find the McBIST given a DIMM
/// @param[in] i_target the fapi2 target DIMM
/// @return a McBIST target.
@@ -155,6 +179,20 @@ inline fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> find_target( const fapi2::Tar
}
///
+/// @brief find the PROC_CHIP given a OCMB_CHIP
+/// @param[in] i_target the fapi2 target OCMB_CHIP
+/// @return a PROC_CHIP target.
+///
+template<>
+inline fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> find_target( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>&
+ i_target)
+{
+ return i_target.getParent<fapi2::TARGET_TYPE_OMI>()
+ .getParent<fapi2::TARGET_TYPE_MC>()
+ .getParent<fapi2::TARGET_TYPE_PROC_CHIP>();
+}
+
+///
/// @brief find the DMI given an MBA
/// @param[in] i_target the fapi2 target MBA
/// @return a DMI target.
@@ -202,6 +240,30 @@ find_targets( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
}
///
+/// @brief find all the OCMB_CHIPs connected to a PROC_CHIP
+/// @param[in] i_target a fapi2::Target PROC_CHIP
+/// @return a vector of fapi2::TARGET_TYPE_OCMB_CHIP
+///
+template<>
+inline std::vector< fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> >
+find_targets( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
+ fapi2::TargetState i_state )
+{
+ std::vector< fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> > l_ocmbs;
+
+ for (const auto& l_mc : i_target.getChildren<fapi2::TARGET_TYPE_MC>(i_state))
+ {
+ for (const auto& l_omi : l_mc.getChildren<fapi2::TARGET_TYPE_OMI>(i_state))
+ {
+ auto l_these_ocmbs( l_omi.getChildren<fapi2::TARGET_TYPE_OCMB_CHIP>(i_state) );
+ l_ocmbs.insert(l_ocmbs.end(), l_these_ocmbs.begin(), l_these_ocmbs.end());
+ }
+ }
+
+ return l_ocmbs;
+}
+
+///
/// @brief find all the MEMBUFs connected to an DMI
/// @param[in] i_target a fapi2::Target DMI
/// @return a vector of fapi2::TARGET_TYPE_MEMBUF_CHIP
@@ -324,6 +386,7 @@ inline std::vector< fapi2::Target<fapi2::TARGET_TYPE_MCS> > find_targets
{
return i_target.getChildren<fapi2::TARGET_TYPE_MCS>(i_state);
}
+
///
/// @brief find all the MCS connected to an MCBIST
/// @param[in] i_target a fapi2::Target MCBIST
diff --git a/src/import/generic/memory/lib/utils/voltage/gen_mss_voltage_traits.H b/src/import/generic/memory/lib/utils/voltage/gen_mss_voltage_traits.H
index baa9c693a..b121bfdb0 100644
--- a/src/import/generic/memory/lib/utils/voltage/gen_mss_voltage_traits.H
+++ b/src/import/generic/memory/lib/utils/voltage/gen_mss_voltage_traits.H
@@ -44,14 +44,14 @@ namespace mss
///
/// @class Traits and policy class for voltage code
-/// @tparam M mss::mc_type memory controller type
+/// @tparam P mss::proc_type processor type
/// @tparam D mss::spd::device_type DRAM device type (generation)
///
-template< mss::mc_type M, mss::spd::device_type D >
+template< mss::mc_type P, mss::spd::device_type D >
class voltage_traits;
///
-/// @class Traits and policy class for voltage code - specialization for the NIMBUS memory controller type
+/// @class Traits and policy class for voltage code - specialization for the NIMBUS processor type, DDR4 device type
///
template<>
class voltage_traits<mss::mc_type::NIMBUS, mss::spd::device_type::DDR4>
@@ -67,10 +67,32 @@ class voltage_traits<mss::mc_type::NIMBUS, mss::spd::device_type::DDR4>
// Traits values
//////////////////////////////////////////////////////////////
// List of attribute setter functions for setting voltage rail values
- // This vector is defined in the p9 space: lib/eff_config/nimbus_mss_voltage.C
static const std::vector<fapi2::ReturnCode (*)(const fapi2::Target<VOLTAGE_TARGET_TYPE>&, uint32_t)> voltage_setters;
};
+///
+/// @class Traits and policy class for voltage code - specialization for the AXONE processor type, DDR4 device type
+///
+template<>
+class voltage_traits<mss::mc_type::EXPLORER, mss::spd::device_type::DDR4>
+{
+ public:
+ //////////////////////////////////////////////////////////////
+ // Target types
+ //////////////////////////////////////////////////////////////
+ static constexpr fapi2::TargetType VOLTAGE_TARGET_TYPE = fapi2::TARGET_TYPE_OCMB_CHIP;
+ static constexpr fapi2::TargetType SPD_TARGET_TYPE = fapi2::TARGET_TYPE_MEM_PORT;
+
+ //////////////////////////////////////////////////////////////
+ // Traits values
+ //////////////////////////////////////////////////////////////
+ // List of attribute setter functions for setting voltage rail values
+ static const std::vector<fapi2::ReturnCode (*)(const fapi2::Target<VOLTAGE_TARGET_TYPE>&, uint32_t)> voltage_setters;
+
+ // Static consts for DDR4 voltages used in p9_mss_volt
+ static const uint64_t DDR4_NOMINAL_VOLTAGE = 1200;
+ static const uint64_t DDR4_VPP_VOLTAGE = 2500;
+};
} // ns mss
#endif
diff --git a/src/import/generic/procedures/xml/error_info/generic_error.xml b/src/import/generic/procedures/xml/error_info/generic_error.xml
index 2315fe6a3..066c8817a 100644
--- a/src/import/generic/procedures/xml/error_info/generic_error.xml
+++ b/src/import/generic/procedures/xml/error_info/generic_error.xml
@@ -292,6 +292,26 @@
</hwpError>
<hwpError>
+ <rc>RC_MSS_VOLT_DDR_TYPE_REQUIRED_VOLTAGE</rc>
+ <description>One or more DIMMs do not support required voltage for DDR type.</description>
+ <ffdc>EXPECTED_OPERABLE</ffdc>
+ <ffdc>EXPECTED_ENDURANT</ffdc>
+ <ffdc>ACTUAL_OPERABLE</ffdc>
+ <ffdc>ACTUAL_ENDURANT</ffdc>
+ <callout>
+ <procedure>MEMORY_PLUGGING_ERROR</procedure>
+ <priority>HIGH</priority>
+ </callout>
+ <callout>
+ <target>DIMM_TARGET</target>
+ <priority>MEDIUM</priority>
+ </callout>
+ <deconfigure>
+ <target>DIMM_TARGET</target>
+ </deconfigure>
+ </hwpError>
+
+ <hwpError>
<rc>RC_MSS_PORT_DOES_NOT_SUPPORT_MAJORITY_FREQ</rc>
<description>
When considering the frequencies in the MRW and the max supported
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