diff options
| author | Christian Geddes <crgeddes@us.ibm.com> | 2019-02-20 12:37:08 -0600 |
|---|---|---|
| committer | William G. Hoffa <wghoffa@us.ibm.com> | 2019-03-29 09:48:42 -0500 |
| commit | 33e7c6de0769ae7f408e64995e7976717ad47653 (patch) | |
| tree | 421358d2233a21b21bb9b0f47852191adf2de0ce /src | |
| parent | 30a512e3d84df2ac47c1ad1876e3ff0811a7aa2a (diff) | |
| download | talos-hostboot-33e7c6de0769ae7f408e64995e7976717ad47653.tar.gz talos-hostboot-33e7c6de0769ae7f408e64995e7976717ad47653.zip | |
Add calls to available p9a_mss_eff_config HWPs in istep 7.4
New effective configuration HWPs have been introduced in Axone.
Currently p9a_mss_eff_config and p9a_mss_eff_config_thermal are
no-ops but this commit gets the calls in-place so we are ready.
Eventually we need to pull in the rest of the eff_config HWPs
but there are not even no-ops stubs to pull in yet.
Change-Id: Icd71006d31023caa5ef913a8b81694ae9ea3a5ba
RTC: 195552
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72204
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/include/usr/fapi2/vpd_access.H | 10 | ||||
| -rw-r--r-- | src/usr/isteps/istep07/call_mss_eff_config.C | 426 | ||||
| -rw-r--r-- | src/usr/isteps/istep07/makefile | 82 |
3 files changed, 309 insertions, 209 deletions
diff --git a/src/include/usr/fapi2/vpd_access.H b/src/include/usr/fapi2/vpd_access.H index 4e52500db..41b878a42 100644 --- a/src/include/usr/fapi2/vpd_access.H +++ b/src/include/usr/fapi2/vpd_access.H @@ -48,6 +48,16 @@ inline fapi2::ReturnCode getVPD( return platGetVPD( i_target, io_vpd_info, o_blob ); } +// platform specialization for OCMB target +template<> +inline fapi2::ReturnCode getVPD( + const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, + VPDInfo<fapi2::TARGET_TYPE_OCMB_CHIP>& io_vpd_info, + uint8_t* o_blob) +{ + return platGetVPD( i_target, io_vpd_info, o_blob ); +} + }; #endif // __VPDACCESS_H_ diff --git a/src/usr/isteps/istep07/call_mss_eff_config.C b/src/usr/isteps/istep07/call_mss_eff_config.C index adc62d750..cc3745490 100644 --- a/src/usr/isteps/istep07/call_mss_eff_config.C +++ b/src/usr/isteps/istep07/call_mss_eff_config.C @@ -59,6 +59,8 @@ #include <p9c_mss_eff_config.H> #include <p9c_mss_eff_mb_interleave.H> #include <p9c_mss_eff_config_thermal.H> +#include <p9a_mss_eff_config.H> +#include <p9a_mss_eff_config_thermal.H> #include <hbotcompid.H> @@ -187,189 +189,226 @@ void* call_mss_eff_config( void *io_pArgs ) TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_eff_config entry" ); + TARGETING::ATTR_MODEL_type l_procModel = TARGETING::targetService().getProcessorModel(); + TARGETING::Target* l_sys = nullptr; targetService().getTopLevelTarget(l_sys); assert( l_sys != nullptr ); - // Get all Centaur targets TARGETING::TargetHandleList l_membufTargetList; - getAllChips(l_membufTargetList, TYPE_MEMBUF); + TARGETING::TargetHandleList l_mcsTargetList; + TARGETING::TargetHandleList l_memportTargetList; + std::vector<fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>> l_fapi_memport_targets; - for (TargetHandleList::const_iterator - l_membuf_iter = l_membufTargetList.begin(); - l_membuf_iter != l_membufTargetList.end(); - ++l_membuf_iter) + if(l_procModel == TARGETING::MODEL_CUMULUS) { - // make a local copy of the target for ease of use - TARGETING::Target* l_pCentaur = *l_membuf_iter; - TARGETING::TargetHandleList l_mbaTargetList; - getChildChiplets(l_mbaTargetList, - l_pCentaur, - TYPE_MBA); + // Get all Centaur targets + getAllChips(l_membufTargetList, TYPE_MEMBUF); + for (TargetHandleList::const_iterator - l_mba_iter = l_mbaTargetList.begin(); - l_mba_iter != l_mbaTargetList.end(); - ++l_mba_iter) - { - // Make a local copy of the target for ease of use - TARGETING::Target* l_mbaTarget = *l_mba_iter; - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "p9c_mss_eff_config HWP target HUID %.8x", - TARGETING::get_huid(l_mbaTarget)); - - // call the HWP with each target - fapi2::Target <fapi2::TARGET_TYPE_MBA_CHIPLET> l_fapi_mba_target(l_mbaTarget); - - FAPI_INVOKE_HWP(l_err, p9c_mss_eff_config, l_fapi_mba_target); - - // process return code. - if ( l_err ) + l_membuf_iter = l_membufTargetList.begin(); + l_membuf_iter != l_membufTargetList.end(); + ++l_membuf_iter) + { + // make a local copy of the target for ease of use + TARGETING::Target* l_pCentaur = *l_membuf_iter; + TARGETING::TargetHandleList l_mbaTargetList; + getChildChiplets(l_mbaTargetList, + l_pCentaur, + TYPE_MBA); + for (TargetHandleList::const_iterator + l_mba_iter = l_mbaTargetList.begin(); + l_mba_iter != l_mbaTargetList.end(); + ++l_mba_iter) { - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "ERROR 0x%.8X: p9c_mss_eff_config HWP on target HUID %.8x", - l_err->reasonCode(), TARGETING::get_huid(l_mbaTarget) ); + // Make a local copy of the target for ease of use + TARGETING::Target* l_mbaTarget = *l_mba_iter; + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "p9c_mss_eff_config HWP target HUID %.8x", + TARGETING::get_huid(l_mbaTarget)); - // capture the target data in the elog - ErrlUserDetailsTarget(l_mbaTarget).addToLog( l_err ); + // call the HWP with each target + fapi2::Target <fapi2::TARGET_TYPE_MBA_CHIPLET> l_fapi_mba_target(l_mbaTarget); + + FAPI_INVOKE_HWP(l_err, p9c_mss_eff_config, l_fapi_mba_target); + + // process return code. + if ( l_err ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X: p9c_mss_eff_config HWP on target HUID %.8x", + l_err->reasonCode(), TARGETING::get_huid(l_mbaTarget) ); - // Create IStep error log and cross reference to error that occurred - l_StepError.addErrorDetails( l_err ); + // capture the target data in the elog + ErrlUserDetailsTarget(l_mbaTarget).addToLog( l_err ); - // Commit Error - errlCommit( l_err, ISTEP_COMP_ID ); + // Create IStep error log and cross reference to error that occurred + l_StepError.addErrorDetails( l_err ); + + // Commit Error + errlCommit( l_err, ISTEP_COMP_ID ); + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : p9c_mss_eff_config HWP"); + } + } // end mba loop + } // end membuf loop + } + else if(l_procModel == TARGETING::MODEL_NIMBUS) + { + // Get all functional MCS chiplets + getAllChiplets(l_mcsTargetList, TYPE_MCS); + + // Iterate over all MCS, calling mss_eff_config and mss_eff_config_thermal + for (const auto & l_mcs_target : l_mcsTargetList) + { + // Get the TARGETING::Target pointer and its HUID + uint32_t l_huid = TARGETING::get_huid(l_mcs_target); + + // Create a FAPI target representing the MCS + const fapi2::Target <fapi2::TARGET_TYPE_MCS> l_fapi_mcs_target + (l_mcs_target); + + // Call the mss_eff_config HWP + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "p9_mss_eff_config HWP. MCS HUID %.8X", l_huid); + FAPI_INVOKE_HWP(l_err, p9_mss_eff_config, l_fapi_mcs_target); + + if (l_err) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X: p9_mss_eff_config HWP ", l_err->reasonCode()); + + // Ensure istep error created and has same plid as this error + ErrlUserDetailsTarget(l_mcs_target).addToLog(l_err); + l_err->collectTrace(EEPROM_COMP_NAME); + l_err->collectTrace(I2C_COMP_NAME); + l_StepError.addErrorDetails(l_err); + errlCommit(l_err, ISTEP_COMP_ID); } else { - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "SUCCESS : p9c_mss_eff_config HWP"); + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : p9_mss_eff_config HWP"); } - } + } // end mcs loop } + else if(l_procModel == TARGETING::MODEL_AXONE) + { + // Get all functional MEM_PORT chiplets + getAllChiplets(l_memportTargetList, TYPE_MEM_PORT); - // The attribute ATTR_MEM_MIRROR_PLACEMENT_POLICY should already be - // correctly set by default for all platforms except for sapphire. - // Don't allow mirroring on sapphire yet @todo-RTC:108314 - // - //ATTR_PAYLOAD_IN_MIRROR_MEM_type l_mirrored = - // l_sys->getAttr<ATTR_PAYLOAD_IN_MIRROR_MEM>(); - // - //if(l_mirrored && is_sapphire_load()) - //{ - // TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "Mirroring is enabled"); - - // uint8_t l_mmPolicy = - // fapi::ENUM_ATTR_MEM_MIRROR_PLACEMENT_POLICY_FLIPPED; - // l_sys-> - // setAttr<TARGETING::ATTR_MEM_MIRROR_PLACEMENT_POLICY>(l_mmPolicy); - //} - - // Get all functional MCS chiplets - TARGETING::TargetHandleList l_mcsTargetList; - getAllChiplets(l_mcsTargetList, TYPE_MCS); + for(const auto & l_memport_target: l_memportTargetList) + { + // Create a FAPI target representing the MEM_PORT target + const fapi2::Target <fapi2::TARGET_TYPE_MEM_PORT> l_fapi_memport_target + (l_memport_target); - // Iterate over all MCS, calling mss_eff_config and mss_eff_config_thermal - for (const auto & l_mcs_target : l_mcsTargetList) - { - // Get the TARGETING::Target pointer and its HUID - uint32_t l_huid = TARGETING::get_huid(l_mcs_target); + l_fapi_memport_targets.push_back(l_fapi_memport_target); - // Create a FAPI target representing the MCS - const fapi2::Target <fapi2::TARGET_TYPE_MCS> l_fapi_mcs_target - (l_mcs_target); + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "call p9a_mss_eff_config HWP on MEM_PORT HUID %.8X", + TARGETING::get_huid(l_memport_target)); - // Call the mss_eff_config HWP - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "p9_mss_eff_config HWP. MCS HUID %.8X", l_huid); - FAPI_INVOKE_HWP(l_err, p9_mss_eff_config, l_fapi_mcs_target); + FAPI_INVOKE_HWP(l_err, p9a_mss_eff_config, l_fapi_memport_target); - if (l_err) - { - TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, - "ERROR 0x%.8X: p9_mss_eff_config HWP ", l_err->reasonCode()); + if (l_err) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X: p9a_mss_eff_config HWP on target 0x%.08X", + l_err->reasonCode(), + TARGETING::get_huid(l_memport_target)); - // Ensure istep error created and has same plid as this error - ErrlUserDetailsTarget(l_mcs_target).addToLog(l_err); - l_err->collectTrace(EEPROM_COMP_NAME); - l_err->collectTrace(I2C_COMP_NAME); - l_StepError.addErrorDetails(l_err); - errlCommit(l_err, ISTEP_COMP_ID); - continue; - } + // Ensure istep error created and has same plid as this error + ErrlUserDetailsTarget(l_memport_target).addToLog(l_err); + l_err->collectTrace(EEPROM_COMP_NAME); + l_err->collectTrace(I2C_COMP_NAME); + l_StepError.addErrorDetails(l_err); + errlCommit(l_err, ISTEP_COMP_ID); + } + else + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : p9a_mss_eff_config HWP on target 0x%.08X", + TARGETING::get_huid(l_memport_target)); + } + } // end mem_port list + } - TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, - "SUCCESS : p9_mss_eff_config HWP"); - } // end membuf loop + if(!l_StepError.isNull()) + { + break; + } - if(l_StepError.isNull()) + l_err = call_mss_eff_mb_interleave(); + + if (l_err) { - l_err = call_mss_eff_mb_interleave(); + // Ensure istep error created and has same plid as this error + l_StepError.addErrorDetails( l_err ); + errlCommit( l_err, ISTEP_COMP_ID); + break; + } - if (l_err) - { - // Ensure istep error created and has same plid as this error - l_StepError.addErrorDetails( l_err ); - errlCommit( l_err, ISTEP_COMP_ID); - } - else - { - for (TargetHandleList::const_iterator + if(l_procModel == TARGETING::MODEL_CUMULUS) + { + for (TargetHandleList::const_iterator l_membuf_iter = l_membufTargetList.begin(); l_membuf_iter != l_membufTargetList.end(); ++l_membuf_iter) + { + // Make a local copy of the target for ease of use + TARGETING::Target* l_pCentaur = *l_membuf_iter; + + TARGETING::TargetHandleList l_mbaTargetList; + getChildChiplets(l_mbaTargetList, + l_pCentaur, + TYPE_MBA); + + for (TargetHandleList::const_iterator + l_mba_iter = l_mbaTargetList.begin(); + l_mba_iter != l_mbaTargetList.end(); + ++l_mba_iter) { // Make a local copy of the target for ease of use - TARGETING::Target* l_pCentaur = *l_membuf_iter; + TARGETING::Target* l_mbaTarget = *l_mba_iter; + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "p9c_mss_eff_config_thermal HWP target HUID %.8x", + TARGETING::get_huid(l_mbaTarget)); - TARGETING::TargetHandleList l_mbaTargetList; - getChildChiplets(l_mbaTargetList, - l_pCentaur, - TYPE_MBA); + // call the HWP with each target + fapi2::Target <fapi2::TARGET_TYPE_MBA_CHIPLET> l_fapi_mba_target(l_mbaTarget); - for (TargetHandleList::const_iterator - l_mba_iter = l_mbaTargetList.begin(); - l_mba_iter != l_mbaTargetList.end(); - ++l_mba_iter) + FAPI_INVOKE_HWP(l_err, p9c_mss_eff_config_thermal, l_fapi_mba_target); + + // process return code. + if ( l_err ) { - // Make a local copy of the target for ease of use - TARGETING::Target* l_mbaTarget = *l_mba_iter; TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "p9c_mss_eff_config_thermal HWP target HUID %.8x", - TARGETING::get_huid(l_mbaTarget)); - - // call the HWP with each target - fapi2::Target <fapi2::TARGET_TYPE_MBA_CHIPLET> l_fapi_mba_target(l_mbaTarget); - - FAPI_INVOKE_HWP(l_err, p9c_mss_eff_config_thermal, l_fapi_mba_target); - - // process return code. - if ( l_err ) - { - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "ERROR 0x%.8X: p9c_mss_eff_config_thermal HWP on target HUID %.8x", - l_err->reasonCode(), TARGETING::get_huid(l_mbaTarget) ); + "ERROR 0x%.8X: p9c_mss_eff_config_thermal HWP on target HUID %.8x", + l_err->reasonCode(), TARGETING::get_huid(l_mbaTarget) ); - // capture the target data in the elog - ErrlUserDetailsTarget(l_mbaTarget).addToLog( l_err ); + // capture the target data in the elog + ErrlUserDetailsTarget(l_mbaTarget).addToLog( l_err ); - // Create IStep error log and cross reference to error that occurred - l_StepError.addErrorDetails( l_err ); + // Create IStep error log and cross reference to error that occurred + l_StepError.addErrorDetails( l_err ); - // Commit Error - errlCommit( l_err, ISTEP_COMP_ID ); - } - else - { - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "SUCCESS : p9c_mss_eff_config_thermal HWP"); - } + // Commit Error + errlCommit( l_err, ISTEP_COMP_ID ); + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : p9c_mss_eff_config_thermal HWP"); } } } } - - if(l_StepError.isNull()) + else if(l_procModel == TARGETING::MODEL_NIMBUS) { - std::map<ATTR_VDDR_ID_type,TARGETING::TargetHandleList> l_domainIdGroups; TARGETING::TargetHandleList l_mcbistTargetList; getAllChiplets(l_mcbistTargetList, TYPE_MCBIST); @@ -404,7 +443,7 @@ void* call_mss_eff_config( void *io_pArgs ) } // Call the mss_eff_config_thermal HWP TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "p9_mss_eff_config_thermal HWP. "); + "p9_mss_eff_config_thermal HWP. "); FAPI_INVOKE_HWP(l_err, p9_mss_eff_config_thermal,l_fapi_mcs_targs); if (l_err) @@ -424,53 +463,92 @@ void* call_mss_eff_config( void *io_pArgs ) } } } + else if(l_procModel == TARGETING::MODEL_AXONE) + { + if(l_fapi_memport_targets.size() > 0) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "call p9a_mss_eff_config_thermal HWP on %d MEM_PORT targets", + l_fapi_memport_targets.size()); + FAPI_INVOKE_HWP(l_err, p9a_mss_eff_config_thermal, l_fapi_memport_targets); - if (l_StepError.isNull()) - { - // Stack the memory on each chip - l_err = call_mss_eff_grouping(l_StepError); + if (l_err) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X: p9a_mss_eff_config_thermal HWP", + l_err->reasonCode()); - if (l_err) + // Ensure istep error created and has same plid as this error + l_err->collectTrace(EEPROM_COMP_NAME); + l_err->collectTrace(I2C_COMP_NAME); + l_StepError.addErrorDetails(l_err); + errlCommit(l_err, ISTEP_COMP_ID); + } + else + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : p9a_mss_eff_config_thermal HWP"); + } + } + else { - // Ensure istep error created and has same plid as this error - l_StepError.addErrorDetails( l_err ); - errlCommit( l_err, ISTEP_COMP_ID); + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "No MEM_PORT targets found, skipping p9a_mss_eff_config_thermal HWP"); } } + + if (!l_StepError.isNull()) + { + break; + } + + // Stack the memory on each chip + l_err = call_mss_eff_grouping(l_StepError); + + if (l_err) + { + // Ensure istep error created and has same plid as this error + l_StepError.addErrorDetails( l_err ); + errlCommit( l_err, ISTEP_COMP_ID); + } + #ifndef CONFIG_FSP_BUILD - if(l_StepError.isNull()) + if(!l_StepError.isNull()) { - const char* l_smfMemAmtStr = nullptr; - l_err = NVRAM::nvramRead(NVRAM::SMF_MEM_AMT_KEY, l_smfMemAmtStr); - if(l_err) - { - TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, INFO_MRK"NVRAM read failed. Will not attempt to distribute any SMF memory."); - // Do not propagate the error - we don't care if NVRAM read fails - delete l_err; - l_err = nullptr; - break; - } + break; + } - // l_smfMemAmtStr will be nullptr if the SMF_MEM_AMT_KEY doesn't exist - if(l_smfMemAmtStr) - { - uint64_t l_smfMemAmt = strtoul(l_smfMemAmtStr, nullptr, 16); - TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, INFO_MRK"Distributing 0x%.16llx SMF memory among the procs on the system", l_smfMemAmt); - l_err = SECUREBOOT::SMF::distributeSmfMem(l_smfMemAmt); - if(l_err) - { - // Do not propagate or break on error - distributeSmfMem will - // not return unrecoverable errors. - errlCommit(l_err, ISTEP_COMP_ID); - } - } - else + const char* l_smfMemAmtStr = nullptr; + l_err = NVRAM::nvramRead(NVRAM::SMF_MEM_AMT_KEY, l_smfMemAmtStr); + if(l_err) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, INFO_MRK"NVRAM read failed. Will not attempt to distribute any SMF memory."); + // Do not propagate the error - we don't care if NVRAM read fails + delete l_err; + l_err = nullptr; + break; + } + + // l_smfMemAmtStr will be nullptr if the SMF_MEM_AMT_KEY doesn't exist + if(l_smfMemAmtStr) + { + uint64_t l_smfMemAmt = strtoul(l_smfMemAmtStr, nullptr, 16); + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, INFO_MRK"Distributing 0x%.16llx SMF memory among the procs on the system", l_smfMemAmt); + l_err = SECUREBOOT::SMF::distributeSmfMem(l_smfMemAmt); + if(l_err) { - TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, INFO_MRK"SMF_MEM_AMT_KEY was not found in NVRAM; no SMF memory was distributed."); + // Do not propagate or break on error - distributeSmfMem will + // not return unrecoverable errors. + errlCommit(l_err, ISTEP_COMP_ID); } } + else + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, INFO_MRK"SMF_MEM_AMT_KEY was not found in NVRAM; no SMF memory was distributed."); + } + #endif } while (0); diff --git a/src/usr/isteps/istep07/makefile b/src/usr/isteps/istep07/makefile index 2c1e96849..88eb51d1d 100644 --- a/src/usr/isteps/istep07/makefile +++ b/src/usr/isteps/istep07/makefile @@ -25,10 +25,16 @@ ROOTPATH = ../../../.. MODULE = istep07 PROCEDURES_PATH = ${ROOTPATH}/src/import/chips/p9/procedures -HWP_PATH_1 += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/memory -HWP_PATH_2 += ${ROOTPATH}/src/import/chips/centaur/procedures/hwp/memory -HWP_PATH_3 += ${ROOTPATH}/src/import/chips/p9a/procedures/hwp/memory -HWP_PATH += ${HWP_PATH_1}/ ${HWP_PATH_2}/ ${HWP_PATH_3}/ +# P9 (NIMBUS / CUMULUS / AXONE shared) +HWP_PATH_P9 += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/memory +# Centaur +HWP_PATH_CEN += ${ROOTPATH}/src/import/chips/centaur/procedures/hwp/memory +# Axone +HWP_PATH_P9A += ${ROOTPATH}/src/import/chips/p9a/procedures/hwp/memory +# Explorer +HWP_PATH_EXP += ${ROOTPATH}/src/import/chips/ocmb/explorer/procedures/hwp/memory + +HWP_PATH += ${HWP_PATH_P9}/ ${HWP_PATH_CEN}/ ${HWP_PATH_P9A}/ ${HWP_PATH_EXP}/ #Add all the object files required for istep07 module OBJS += call_mss_volt.o @@ -44,6 +50,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/include/usr/fapi2/ EXTRAINCDIR += ${ROOTPATH}/src/include/usr/sbe/ EXTRAINCDIR += ${ROOTPATH}/src/import/hwpf/fapi2/include/ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/ +EXTRAINCDIR += ${ROOTPATH}/src/import/generic/memory/lib/ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/common/include/ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/imageProcs/ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/common/utils/imageProcs/ @@ -51,22 +58,25 @@ EXTRAINCDIR += ${ROOTPATH}/src/import/ EXTRAINCDIR += ${ROOTPATH}/obj/genfiles/ EXTRAINCDIR += ${ROOTPATH}/src/usr/isteps/ EXTRAINCDIR += ${HWP_PATH} -EXTRAINCDIR += ${HWP_PATH_1}/lib/ -EXTRAINCDIR += ${HWP_PATH_1}/lib/dimm/ -EXTRAINCDIR += ${HWP_PATH_1}/lib/freq/ -EXTRAINCDIR += ${HWP_PATH_1}/lib/utils/ -EXTRAINCDIR += ${HWP_PATH_1}/lib/eff_config/ +EXTRAINCDIR += ${HWP_PATH_P9}/lib/ +EXTRAINCDIR += ${HWP_PATH_P9}/lib/dimm/ +EXTRAINCDIR += ${HWP_PATH_P9}/lib/freq/ +EXTRAINCDIR += ${HWP_PATH_P9}/lib/utils/ +EXTRAINCDIR += ${HWP_PATH_P9}/lib/eff_config/ EXTRAINCDIR += $(PROCEDURES_PATH)/hwp/nest EXTRAINCDIR += ${PROCEDURES_PATH}/hwp/perv/ -EXTRAINCDIR += ${HWP_PATH_2}/lib/ -EXTRAINCDIR += ${HWP_PATH_2}/lib/shared/ -EXTRAINCDIR += ${HWP_PATH_2}/lib/utils/ +EXTRAINCDIR += ${HWP_PATH_CEN}/lib/ +EXTRAINCDIR += ${HWP_PATH_CEN}/lib/shared/ +EXTRAINCDIR += ${HWP_PATH_CEN}/lib/utils/ +EXTRAINCDIR += ${HWP_PATH_EXP}/lib/eff_config/ +EXTRAINCDIR += ${ROOTPATH}/obj/genfiles/chips/ocmb/explorer/procedures/hwp/memory/ + -VPATH += ${HWP_PATH} ${HWP_PATH_1}/lib/spd +VPATH += ${HWP_PATH} ${HWP_PATH_P9}/lib/spd VPATH += $(PROCEDURES_PATH)/hwp/nest ${ROOTPATH}/src/usr/fapi2 VPATH += ${PROCEDURES_PATH}/hwp/perv -VPATH += ${HWP_PATH_1}/lib ${HWP_PATH_1}/lib/utils ${HWP_PATH_1}/lib/eff_config -VPATH += ${HWP_PATH_1}/lib/freq ${HWP_PATH_1}/lib/dimm +VPATH += ${HWP_PATH_P9}/lib ${HWP_PATH_P9}/lib/utils ${HWP_PATH_P9}/lib/eff_config +VPATH += ${HWP_PATH_P9}/lib/freq ${HWP_PATH_P9}/lib/dimm VPATH += ${ROOTPATH}/src/usr/sbe #Required include before all the procedure.mk are included @@ -75,31 +85,33 @@ include ${ROOTPATH}/procedure.rules.mk #Include all the procedure makefiles #mss_volt : Calc dimm voltage -include $(HWP_PATH_1)/p9_mss_volt.mk -include $(HWP_PATH_2)/p9c_mss_volt.mk -include $(HWP_PATH_2)/p9c_mss_volt_vddr_offset.mk -include $(HWP_PATH_2)/p9c_mss_volt_dimm_count.mk -include $(HWP_PATH_2)/mss_dynamic_vid_utils.mk -include $(HWP_PATH_3)/p9a_mss_volt.mk +include $(HWP_PATH_P9)/p9_mss_volt.mk +include $(HWP_PATH_CEN)/p9c_mss_volt.mk +include $(HWP_PATH_CEN)/p9c_mss_volt_vddr_offset.mk +include $(HWP_PATH_CEN)/p9c_mss_volt_dimm_count.mk +include $(HWP_PATH_CEN)/mss_dynamic_vid_utils.mk +include $(HWP_PATH_P9A)/p9a_mss_volt.mk #mss_freq : Calc dimm frequency -include $(HWP_PATH_1)/p9_mss_freq.mk -include $(HWP_PATH_1)/p9_mss_freq_system.mk -include $(HWP_PATH_2)/p9c_mss_freq.mk -include $(HWP_PATH_1)/p9_mss_eff_config.mk -include $(HWP_PATH_1)/p9_mss_eff_config_thermal.mk -include $(HWP_PATH_1)/p9_mss_bulk_pwr_throttles.mk -include $(HWP_PATH_2)/p9c_mss_eff_config.mk -include $(HWP_PATH_2)/p9c_mss_eff_config_thermal.mk -include $(HWP_PATH_2)/p9c_mss_bulk_pwr_throttles.mk -include $(HWP_PATH_2)/p9c_mss_eff_mb_interleave.mk -include $(HWP_PATH_3)/p9a_mss_freq.mk -include $(HWP_PATH_3)/p9a_mss_freq_system.mk +include $(HWP_PATH_P9)/p9_mss_freq.mk +include $(HWP_PATH_P9)/p9_mss_freq_system.mk +include $(HWP_PATH_CEN)/p9c_mss_freq.mk +include $(HWP_PATH_P9)/p9_mss_eff_config.mk +include $(HWP_PATH_P9)/p9_mss_eff_config_thermal.mk +include $(HWP_PATH_P9)/p9_mss_bulk_pwr_throttles.mk +include $(HWP_PATH_CEN)/p9c_mss_eff_config.mk +include $(HWP_PATH_CEN)/p9c_mss_eff_config_thermal.mk +include $(HWP_PATH_CEN)/p9c_mss_bulk_pwr_throttles.mk +include $(HWP_PATH_CEN)/p9c_mss_eff_mb_interleave.mk +include $(HWP_PATH_P9A)/p9a_mss_freq.mk +include $(HWP_PATH_P9A)/p9a_mss_freq_system.mk +include $(HWP_PATH_P9A)/p9a_mss_eff_config.mk +include $(HWP_PATH_P9A)/p9a_mss_eff_config_thermal.mk #host_mss_attr_cleanup : MSS ATTR Cleanup -include $(HWP_PATH_2)/p9c_mss_attr_cleanup.mk +include $(HWP_PATH_CEN)/p9c_mss_attr_cleanup.mk #mss_attr_update : MSS ATTR Overrides -include $(HWP_PATH_1)/p9_mss_attr_update.mk +include $(HWP_PATH_P9)/p9_mss_attr_update.mk include ${ROOTPATH}/config.mk |

