diff options
author | Anusha Reddy Rangareddygari <anusrang@in.ibm.com> | 2015-12-16 06:44:19 +0100 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-02-23 14:46:56 -0500 |
commit | 24e258c7ec794f46193161f0ccac8e5b9cbe3c9a (patch) | |
tree | 8505df108f891334b20b06127da5340f2b8bbc7c /src | |
parent | 861c7c0738aa5512a6bcca719b8182fbd98d47e0 (diff) | |
download | talos-hostboot-24e258c7ec794f46193161f0ccac8e5b9cbe3c9a.tar.gz talos-hostboot-24e258c7ec794f46193161f0ccac8e5b9cbe3c9a.zip |
Level 2 HWP for p9_sbe_chiplet_reset
included enable pll according to
version55 of IPL sequence
Change-Id: Id770cdd5bd58e38904550ffd2cd09f7a98162453
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22804
Tested-by: Jenkins Server
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com>
Reviewed-by: Parvathi Rachakonda
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36929
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H index 098b58ff8..e0fb483c7 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H @@ -32,6 +32,7 @@ /// 4) Similar way, Reset sys.config and OPCG setting for Nest and MC chiplet in sync mode /// /// Done +/// //------------------------------------------------------------------------------ // *HWP HW Owner : Abhishek Agarwal <abagarw8@in.ibm.com> // *HWP HW Backup Owner : Srinivas V. Naga <srinivan@in.ibm.com> |