diff options
| author | Prem Shanker Jha <premjha2@in.ibm.com> | 2017-07-17 05:38:20 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-08-18 10:05:53 -0400 |
| commit | 1f8706f0f7ad7c0db7113e3f68b594244804ab0f (patch) | |
| tree | 488aa5f67fe796fcc3685917f8db23e42aec22db /src | |
| parent | b3a0dfb55493aae0d9340d7befa8448d4e86f33f (diff) | |
| download | talos-hostboot-1f8706f0f7ad7c0db7113e3f68b594244804ab0f.tar.gz talos-hostboot-1f8706f0f7ad7c0db7113e3f68b594244804ab0f.zip | |
24x7: Update of P9 proc config to HOMER.
24x7 application needs a unit availability vector populated
in HOMER. This unit availability vector should represent
functional state of various chiplets of P9 chip. This vector
needs to be populated during IPL time and subsequently
during runtime periodically.
Change-Id: I477b11c1c379d81dde69c3d0b72be2e5b6bc33c6
RTC: 176049
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43367
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Sooraj R. Nair <soonair3@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44786
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
4 files changed, 494 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.C b/src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.C new file mode 100644 index 000000000..7d5ffdedd --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.C @@ -0,0 +1,294 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +#include <stdint.h> + +/// +/// @file p9_check_proc_config.C +/// @brief describes interface for a HWP that generates a bit vector corresponding to P9 chip config. +/// +/// *HWP HWP Owner: Greg Still <stillgs@us.ibm.com> +/// *HWP FW Owner: Prem S Jha <premjha2@in.ibm.com> +/// *HWP Team: PM +/// *HWP Level: 3 +/// *HWP Consumed by: Hostboot:Phyp +// + +//-------------------------------------------------------------------------- +// Includes +//-------------------------------------------------------------------------- +#include <p9_check_proc_config.H> +#include <p9_hcd_memmap_base.H> +#include <endian.h> +#include <map> +#include <stdint.h> + + +#ifndef __HOSTBOOT_MODULE + std::map< fapi2::TargetType, std::string > g_targetTypeMap; +#endif +/** + * @brief misc local constants + */ +enum +{ + INIT_CONFIG_VALUE = 0x8000000C09800000ull, + QPMR_PROC_CONFIG_POS = 0xBFC18, +}; + +/** + * @brief bit position for various chiplets in config vector. + */ +enum +{ + MCS_POS = 1, + MBA_POS = 9, + MEM_BUF_POS = 17, + XBUS_POS = 25, + PHB_POS = 30, + CAPP_POS = 37, + OBUS_POS = 41, + NVLINK_POS = 45, +}; + +/** + * @brief validates the input arguments for the HWP. + * @param[in] i_procTgt fapi2 target for P9 chip. + * @param[in] i_pHomerImage pointer to HOMER base + */ +fapi2::ReturnCode validateInputArgs( CONST_FAPI2_PROC& i_procTgt, void* i_pHomerImage ) +{ + FAPI_INF( ">> validateInputArgs" ); + + FAPI_ASSERT( i_procTgt.isFunctional(), + fapi2::BAD_PROC_TARGET() + .set_TARGET( i_procTgt ) + .set_INPUT_BUF( i_pHomerImage ), + "Bad Proc Target Passed As Input" ); + + FAPI_ASSERT( ( i_pHomerImage != NULL ), + fapi2::BAD_INPUT_BUFFER() + .set_TARGET( i_procTgt ) + .set_INPUT_BUF( i_pHomerImage ), + "Bad Buffer Is Passed As Input" ); +fapi_try_exit: + + FAPI_INF( "<< validateInputArgs" ); + return fapi2::current_err; +} + +//----------------------------------------------------------------------------------------- + +/** + * @brief checks Memory buf configuration and updates config vector buffer. + * @param[in] i_procTgt fapi2 target for P9 + * @param[in] i_configBuf fapi2 buffer + * @return fapi2 return code + */ +fapi2::ReturnCode checkMemConfig( CONST_FAPI2_PROC& i_procTgt, uint64_t& io_configVector ) +{ + FAPI_INF( ">> checkMemConfig" ); + auto l_dmiChiplets = i_procTgt.getChildren<fapi2::TARGET_TYPE_DMI>( fapi2::TARGET_STATE_PRESENT ); + + uint64_t l_tempVector = 0; + + for( auto l_dmi : l_dmiChiplets ) + { + auto l_cenChips = l_dmi.getChildren<fapi2::TARGET_TYPE_MEMBUF_CHIP>( fapi2::TARGET_STATE_PRESENT ); + + for( auto l_cent : l_cenChips ) + { + auto l_mbaChiplets = l_cent.getChildren<fapi2::TARGET_TYPE_MBA>( fapi2::TARGET_STATE_PRESENT ); + uint8_t l_memBufPos = 0; + uint8_t l_memBufBitPos = 0; + + //DMI Pos same as membuf position + FAPI_TRY( FAPI_ATTR_GET( fapi2::ATTR_CHIP_UNIT_POS, l_dmi, l_memBufPos ), + "Failed to get membuf position "); + + if( l_cent.isFunctional( ) ) + { + l_tempVector = 0x8000000000000000ull; + l_memBufBitPos = l_memBufPos + MEM_BUF_POS; + io_configVector |= ( l_tempVector >> l_memBufBitPos ) ; + + FAPI_INF("Mem Buf Pos 0x%04x Bit Pos 0x%04x", + l_memBufPos, l_memBufBitPos ); + } + + for( auto l_mba : l_mbaChiplets ) + { + if( l_mba.isFunctional( ) ) + { + uint8_t l_mbaPos = 0; + uint8_t l_mbaBitPos = 0; + FAPI_TRY( FAPI_ATTR_GET( fapi2::ATTR_CHIP_UNIT_POS, l_mba, l_mbaPos ), + "Failed to get mba position "); + + l_mbaBitPos = ( l_mbaChiplets.size() * l_memBufPos ) + l_mbaPos + MBA_POS; + l_tempVector = 0x8000000000000000ull; + io_configVector |= ( l_tempVector >> l_mbaBitPos ); + + FAPI_INF("Mba Pos 0x%04x Bit Pos 0x%04x", + l_mbaPos, l_mbaBitPos ); + } + } + } + } + +fapi_try_exit: + FAPI_INF( ">> checkMemConfig" ); + return fapi2::current_err; +} + +/** + * @brief checks Memory buf configuration and updates config vector buffer. + * @param[in] i_procTgt fapi2 target for P9 + * @param[in] io_configVector Unit Avaialability Vector + * @param[in] i_oBusStartPos start bit position for OBUS + * @param[in] i_nvLinkPos start bit position for NV Link + * @return fapi2 return code + */ +fapi2::ReturnCode checkObusChipletHierarchy( CONST_FAPI2_PROC& i_procTgt, + uint64_t& io_configVector, uint8_t i_oBusStartPos, uint8_t i_nvLinkPos ) +{ + auto l_obusList = + i_procTgt.getChildren < fapi2::TARGET_TYPE_OBUS > ( fapi2::TARGET_STATE_PRESENT ); + + uint64_t l_tempVector = 0; + + for( auto itv : l_obusList ) + { + uint8_t l_oBusPos = 0; + + FAPI_TRY( FAPI_ATTR_GET( fapi2::ATTR_CHIP_UNIT_POS, itv, l_oBusPos ), + "Failed to get chiplet position " ); + + if( itv.isFunctional() ) + { + uint8_t l_configPos = i_oBusStartPos + l_oBusPos; + uint8_t l_configMode = 0; + auto l_oBusBrickList = itv.getChildren<fapi2::TARGET_TYPE_OBUS_BRICK>( fapi2::TARGET_STATE_FUNCTIONAL ); + + l_tempVector = 0x8000000000000000ull; + + FAPI_TRY( FAPI_ATTR_GET( fapi2::ATTR_OPTICS_CONFIG_MODE, itv, l_configMode ), + "Failed To Read ATTR_OPTICS_CONFIG_MODE" ); + + for ( auto l_obusBrick : l_oBusBrickList ) + { + uint8_t l_brickPos = 0; + uint8_t l_brickBitPos = 0; + + + if( fapi2::ENUM_ATTR_OPTICS_CONFIG_MODE_NV == l_configMode ) + { + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_obusBrick, l_brickPos ), + "Error from FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS)" ); + + l_brickBitPos = l_brickPos + i_nvLinkPos; + io_configVector |= l_tempVector >> l_brickBitPos; + +#ifndef __HOSTBOOT_MODULE + + FAPI_INF( "NV Link Pos %02d Bit Pos 0x%02x (%d) UAV 0x%016lx", + l_brickPos, l_brickBitPos, l_brickBitPos, io_configVector ); + +#endif + } + } + + io_configVector |= (l_tempVector >> l_configPos); + + FAPI_INF( "Obus Pos 0x%08x Bit Pos 0x%02x UAV 0x%016lx", + l_oBusPos, l_configPos, io_configVector ); + } + } + +fapi_try_exit: + + FAPI_INF( "<< p9_check_proc_config" ); + return fapi2::current_err; +} + +//----------------------------------------------------------------------------------------- + +fapi2::ReturnCode p9_check_proc_config ( CONST_FAPI2_PROC& i_procTgt, void* i_pHomerImage ) +{ + FAPI_INF( ">> p9_check_proc_config" ); + + uint64_t l_configVectVal = INIT_CONFIG_VALUE; + uint8_t* pHomer = (uint8_t*)i_pHomerImage + QPMR_HOMER_OFFSET + + QPMR_PROC_CONFIG_POS; + +#ifndef __HOSTBOOT_MODULE + g_targetTypeMap[fapi2::TARGET_TYPE_MCS] = "MCS"; + g_targetTypeMap[fapi2::TARGET_TYPE_XBUS] = "XBUS"; + g_targetTypeMap[fapi2::TARGET_TYPE_OBUS] = "OBUS"; + g_targetTypeMap[fapi2::TARGET_TYPE_CAPP] = "CAPP"; + g_targetTypeMap[fapi2::TARGET_TYPE_PHB] = "PHB"; + g_targetTypeMap[fapi2::TARGET_TYPE_MEMBUF_CHIP] = "MEM BUF"; + g_targetTypeMap[fapi2::TARGET_TYPE_MBA] = "MBA"; + g_targetTypeMap[fapi2::TARGET_TYPE_OBUS_BRICK] = "OBUS_BRICK"; +#endif + + FAPI_TRY( validateInputArgs( i_procTgt, i_pHomerImage ), + "Input Arguments Found Invalid" ); + + FAPI_TRY( checkChiplet< fapi2::TARGET_TYPE_MCS > + ( i_procTgt, fapi2::TARGET_TYPE_MCS, l_configVectVal, MCS_POS ), + "Failed to get MCS configuration" ); + + FAPI_TRY( checkChiplet< fapi2::TARGET_TYPE_XBUS> + ( i_procTgt, fapi2::TARGET_TYPE_XBUS, l_configVectVal, XBUS_POS ), + "Failed to get XBUS configuration" ); + + FAPI_TRY( checkChiplet<fapi2::TARGET_TYPE_PHB> + ( i_procTgt, fapi2::TARGET_TYPE_PHB, l_configVectVal, PHB_POS ), + "Failed to get PHB configuration" ); + + FAPI_TRY( checkChiplet<fapi2::TARGET_TYPE_CAPP> + ( i_procTgt, fapi2::TARGET_TYPE_CAPP, l_configVectVal, CAPP_POS ), + "Failed to get CAPP configuration" ); + + FAPI_TRY( checkObusChipletHierarchy ( i_procTgt, l_configVectVal, OBUS_POS, NVLINK_POS ), + "Failed to get OBUS Hierarchy configuration" ); + + FAPI_TRY( checkMemConfig( i_procTgt, l_configVectVal ), + "Failed to get Memory configuration" ); + + FAPI_INF( "Updating Vector in HOMER" ); + *(uint64_t*)pHomer = htobe64( l_configVectVal ); + + FAPI_IMP( "Config Vector is 0x%016lx ", l_configVectVal ); + FAPI_IMP( "Reading back 0x%016lx ", htobe64( (*(uint64_t*)pHomer)) ); + +fapi_try_exit: + + FAPI_INF( "<< p9_check_proc_config" ); + return fapi2::current_err; +} + +//----------------------------------------------------------------------------------------- diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.H b/src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.H new file mode 100644 index 000000000..1696eeb52 --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.H @@ -0,0 +1,118 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#ifndef __CHECK_PROC_CONFIG_ +#define __CHECK_PROC_CONFIG_ + + +/// +/// @file p9_check_proc_config.H +/// @brief describes interface for a HWP that generates a bit vector corresponding to P9 chip config. +/// +/// *HWP HWP Owner: Greg Still <stillgs@us.ibm.com> +/// *HWP FW Owner: Prem S Jha <premjha2@in.ibm.com> +/// *HWP Team: PM +/// *HWP Level: 3 +/// *HWP Consumed by: Hostboot:Phyp +// + +//-------------------------------------------------------------------------- +// Includes +//-------------------------------------------------------------------------- +#include <fapi2.H> +#include <stdint.h> +#include <map> + + +extern "C" +{ + typedef const fapi2::Target< fapi2::TARGET_TYPE_PROC_CHIP > CONST_FAPI2_PROC; + +//------------------------------------------------------------------------------ + +/// @brief builds a STOP image using a refrence image as input. +/// @param[in] i_procTgt fapi2 target for processor chip. +/// @param[in] i_pHomerImage pointer to the beginning of the HOMER image buffer +/// @return fapi2 return code +// + fapi2::ReturnCode p9_check_proc_config( CONST_FAPI2_PROC& i_procTgt, void* i_pHomerImage ); + +//------------------------------------------------------------------------------ + + typedef fapi2::ReturnCode( *p9_check_proc_config_FP_t ) ( CONST_FAPI2_PROC& i_procTgt, + void* i_pHomerImage ); + +} // extern C + +#ifndef __HOSTBOOT_MODULE + extern std::map< fapi2::TargetType, std::string > g_targetTypeMap; +#endif + +/// @brief checks proc configuration for a given chiplet type +/// @param[in] i_procTgt fapi2 target for processor chip. +/// @param[in] i_type target type +/// @param[inout] io_configVector fapi2 buffer +/// @param[in] i_chipletStartPos start position for given chiplet type in config vector +/// @return fapi2 return code +// +template< fapi2::TargetType K > +fapi2::ReturnCode checkChiplet( CONST_FAPI2_PROC& i_procTgt, fapi2::TargetType i_type, + uint64_t& io_configVector, uint8_t i_chipletStartPos ) +{ + auto l_childVector = + i_procTgt.getChildren < K > ( fapi2::TARGET_STATE_PRESENT ); + + uint64_t l_tempVector = 0; + + for( auto itv : l_childVector ) + { + uint8_t l_chipletPos = 0; + FAPI_TRY( FAPI_ATTR_GET( fapi2::ATTR_CHIP_UNIT_POS, itv, l_chipletPos ), + "Failed to get chiplet position " ); + + if( itv.isFunctional() ) + { + l_tempVector = 0x8000000000000000ull; + uint8_t l_configPos = i_chipletStartPos + l_chipletPos; + + io_configVector |= (l_tempVector >> l_configPos); + +#ifndef __HOSTBOOT_MODULE + + FAPI_INF( "Chiplet Type %s", g_targetTypeMap[i_type].c_str() ); + +#endif + + FAPI_INF( "Chiplet Pos 0x%08x Bit Pos 0x%02x UAV 0x%016lx", + l_chipletPos, l_configPos, io_configVector ); + } + } + +fapi_try_exit: + + FAPI_INF( "<< p9_check_proc_config" ); + return fapi2::current_err; +} + +#endif //__CHECK_PROC_CONFIG_ diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.mk b/src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.mk new file mode 100644 index 000000000..13eec265e --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.mk @@ -0,0 +1,28 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.mk $ +# +# OpenPOWER HostBoot Project +# +# Contributors Listed Below - COPYRIGHT 2017 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG +PROCEDURE=p9_check_proc_config +HWP_INC+=$(ROOTPATH)/chips/p9/procedures/hwp/lib/ +$(call ADD_MODULE_INCDIR,$(PROCEDURE),$(HWP_INC)) +$(call BUILD_PROCEDURE) diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_check_proc_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_check_proc_errors.xml new file mode 100644 index 000000000..1dba0c951 --- /dev/null +++ b/src/import/chips/p9/procedures/xml/error_info/p9_check_proc_errors.xml @@ -0,0 +1,54 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_check_proc_errors.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2017 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<hwpErrors> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_BAD_PROC_TARGET</rc> + <description> + Processor target passed as input is either not functional or + not valid. + </description> + <ffdc>TARGET</ffdc> + <ffdc>INPUT_BUF</ffdc> + <callout> + <target>TARGET</target> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_BAD_INPUT_BUFFER</rc> + <description> + Input buffer which should point to HOMER base is not valid. + </description> + <ffdc>TARGET</ffdc> + <ffdc>INPUT_BUF</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- ******************************************************************** --> +</hwpErrors> |

