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author | Thi Tran <thi@us.ibm.com> | 2011-07-14 13:49:28 -0500 |
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committer | Thi N. Tran <thi@us.ibm.com> | 2011-07-21 09:44:19 -0500 |
commit | f8db3532fc97a0f97d89ee97e85be4d9c81a1c54 (patch) | |
tree | 1fdb4bba6868e3fa7971abd54ae2288c0afeed8c /src/usr | |
parent | 471f09f1a9bcc46fc385fa8aca776cb682075c0b (diff) | |
download | talos-hostboot-f8db3532fc97a0f97d89ee97e85be4d9c81a1c54.tar.gz talos-hostboot-f8db3532fc97a0f97d89ee97e85be4d9c81a1c54.zip |
Update addresses used in XSCOM/HWPF test cases to work in VBU
Disable XSCOM and HWPF test cases so automated test doesn't fail
Added XSCOM address in trace
Re-enable XSCOM and HWPF test cases to be used with new fips build
Change to backing build b0720a_1132.750 & fix test cases failure
Change-Id: Iac54bdcde54d2d8168455e1f51f6ff309f14918f
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/200
Tested-by: Jenkins Server
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr')
-rw-r--r-- | src/usr/hwpf/hwp/fapiTestHwp.C | 19 | ||||
-rw-r--r-- | src/usr/xscom/test/xscomtest.H | 67 | ||||
-rw-r--r-- | src/usr/xscom/xscom.C | 16 |
3 files changed, 82 insertions, 20 deletions
diff --git a/src/usr/hwpf/hwp/fapiTestHwp.C b/src/usr/hwpf/hwp/fapiTestHwp.C index 2a7e2fae7..b37bdd49a 100644 --- a/src/usr/hwpf/hwp/fapiTestHwp.C +++ b/src/usr/hwpf/hwp/fapiTestHwp.C @@ -33,16 +33,21 @@ fapi::ReturnCode hwpIsP7EM0ChipletClockOn(const fapi::Target & i_chip, // Attempt to call the attribute get/set functions for the test attributes fapi::ReturnCode l_rc; + // ----------------------------------------------------------------------- + // NOTE: @TODO + // There's no EM0 in P8. + // Must use core 3 clock status register to work in current VBU model + // ----------------------------------------------------------------------- // Constants - const uint64_t EM_CLOCK_STATUS_MASK = 0xEEC0000000000000ULL; - const uint32_t EM0_CHIPLET_BASE_ADDR = 0x06000000; + const uint64_t EX_CLOCK_STATUS_MASK = 0xEEC0000000000000ULL; + const uint32_t EX3_CHIPLET_BASE_ADDR = 0x13000000; const uint32_t CHIPLET_CLOCK_ON_SCOM_ADDR = 0x00030008; // Set caller's result to default o_clocksOn = false; // Figure out the scom address and create a 64 bit data buffer - uint32_t l_addr = (EM0_CHIPLET_BASE_ADDR | CHIPLET_CLOCK_ON_SCOM_ADDR); + uint32_t l_addr = (EX3_CHIPLET_BASE_ADDR | CHIPLET_CLOCK_ON_SCOM_ADDR); ecmdDataBufferBase l_data(64); // Perform a GetScom operation on the chip @@ -50,18 +55,18 @@ fapi::ReturnCode hwpIsP7EM0ChipletClockOn(const fapi::Target & i_chip, if (l_rc != fapi::FAPI_RC_SUCCESS) { - FAPI_ERR("hwpIsP7EM0ChipletClockOn: Error from GetScomChip"); + FAPI_ERR("hwpIsP8EX3ChipletClockOn: Error from GetScomChip"); } else { - if (!(l_data.getDoubleWord(0) & EM_CLOCK_STATUS_MASK)) + if (!(l_data.getDoubleWord(0) & EX_CLOCK_STATUS_MASK)) { - FAPI_INF("hwpIsP7EM0ChipletClockOn: Clocks are on"); + FAPI_INF("hwpIsP8EX3ChipletClockOn: Clocks are on"); o_clocksOn = true; } else { - FAPI_INF("hwpIsP7EM0ChipletClockOn: Clocks are off"); + FAPI_INF("hwpIsP8EX3ChipletClockOn: Clocks are off"); } } diff --git a/src/usr/xscom/test/xscomtest.H b/src/usr/xscom/test/xscomtest.H index f1c7a017a..b2934bf4b 100644 --- a/src/usr/xscom/test/xscomtest.H +++ b/src/usr/xscom/test/xscomtest.H @@ -12,6 +12,7 @@ #include <errl/errlentry.H> #include <errl/errltypes.H> #include <devicefw/userif.H> +#include <xscom/xscomreasoncodes.H> extern trace_desc_t* g_trac_xscom; @@ -25,11 +26,11 @@ struct testXscomAddrData }; // Test table values -//@todo - Select scratch register so chip doesn't get messed-up const testXscomAddrData g_xscomAddrTable[] = { - {0x08030007, 0x8000000000000001}, - {0x08010587, 0x9000000000000003}, + // Write data to be ORed with read value + {0x13030007, 0x0000040000000000}, + {0x130F0012, 0x00000C0000000000}, }; const uint32_t g_xscomAddrTableSz = @@ -46,6 +47,7 @@ public: */ void testXscom1(void) { + TARGETING::Target* l_testTarget = MASTER_PROCESSOR_CHIP_TARGET_SENTINEL; size_t l_size = sizeof(uint64_t); @@ -56,9 +58,11 @@ public: testXscomAddrData l_testEntry = g_xscomAddrTable[l_num]; // Perform XSComOM read - uint64_t l_data = 0; + uint64_t l_readData = 0; + uint64_t l_writeData = 0; + uint64_t l_savedData = 0; l_err = deviceRead(l_testTarget, - &l_data, + &l_readData, l_size, DEVICE_SCOM_ADDRESS(l_testEntry.addr)); if (l_err) @@ -66,10 +70,18 @@ public: TS_FAIL("testXscom1: XSCom read: deviceRead() fails! Error committed."); break; } + else + { + TS_TRACE("testXscom1: XSCom read, Address 0x%.8X, Data %llx", + l_testEntry.addr, + (long long unsigned)l_readData); + } // Perform an XSCom write + l_savedData = l_readData; + l_writeData = (l_readData | l_testEntry.data); l_err = deviceWrite(l_testTarget, - &l_testEntry.data, + &l_writeData, l_size, DeviceFW::SCOM, l_testEntry.addr); @@ -79,11 +91,17 @@ public: TS_FAIL("testXscom1: XSCom write: deviceWrite() fails!"); break; } + else + { + TS_TRACE("testXscom1: XSCom write, Address 0x%.8X, Data %llx", + l_testEntry.addr, + (long long unsigned)l_writeData); + } // Read back - l_data = 0; + l_readData = 0; l_err = deviceRead(l_testTarget, - &l_data, + &l_readData, l_size, DEVICE_SCOM_ADDRESS(l_testEntry.addr)); if (l_err) @@ -91,6 +109,39 @@ public: TS_FAIL("testXscom1: XSCom read back: deviceRead() fails!"); break; } + + if( l_readData != l_writeData ) + { + TS_FAIL("testXscom1: XSCom read back doesn't match write!"); + /*@ + * @errortype + * @moduleid XSCOM_TEST_XSCOM1 + * @reasoncode XSCOM_DATA_UNMATCHED + * @userdata1 Write value + * @userdata2 Read back value + * @devdesc Read back value doesn't match write + */ + l_err = new ERRORLOG::ErrlEntry( + ERRORLOG::ERRL_SEV_INFORMATIONAL, + XSCOM::XSCOM_TEST_XSCOM1, + XSCOM::XSCOM_DATA_UNMATCHED, + l_writeData, + l_readData); + break; + } + + // Write back original value + l_err = deviceWrite(l_testTarget, + &l_savedData, + l_size, + DeviceFW::SCOM, + l_testEntry.addr); + + if (l_err) + { + TS_FAIL("testXscom1: XSCom write back original fails!"); + break; + } } if (l_err) diff --git a/src/usr/xscom/xscom.C b/src/usr/xscom/xscom.C index 969b81db0..215d0e11b 100644 --- a/src/usr/xscom/xscom.C +++ b/src/usr/xscom/xscom.C @@ -181,6 +181,7 @@ errlHndl_t xscomPerformOp(DeviceFW::OperationType i_opType, errlHndl_t l_err = NULL; HMER l_hmer; mutex_t* l_XSComMutex; + uint64_t l_addr = va_arg(i_args,uint64_t); // Retry loop bool l_retry = false; @@ -213,7 +214,7 @@ errlHndl_t xscomPerformOp(DeviceFW::OperationType i_opType, } // Build the XSCom address - XSComP8Address l_mmioAddr(va_arg(i_args,uint64_t), l_xscomChipInfo.nodeId, + XSComP8Address l_mmioAddr(l_addr, l_xscomChipInfo.nodeId, l_xscomChipInfo.chipId, l_XSComBaseAddr); // Re-init l_retry for loop @@ -266,10 +267,15 @@ errlHndl_t xscomPerformOp(DeviceFW::OperationType i_opType, // Done, un-pin task_affinity_unpin(); - - TRACFCOMP(g_trac_xscom, "xscomPerformOp: OpType 0x%.8X, Address %llx, Page %llx; Offset %llx; VirtAddr %llx; l_virtAddr+l_offset %llx", - i_opType, static_cast<uint64_t>(l_mmioAddr), l_page, - l_offset_64, l_virtAddr, l_virtAddr + l_offset_64); + TRACFCOMP(g_trac_xscom, "xscomPerformOp: OpType %llx, Address 0%llx, MMIO Address %llx", + static_cast<uint64_t>(i_opType), + l_addr, + static_cast<uint64_t>(l_mmioAddr)); + TRACFCOMP(g_trac_xscom, "xscomPerformOp: Page %llx; Offset %llx; VirtAddr %llx; l_virtAddr+l_offset %llx", + l_page, + l_offset_64, + l_virtAddr, + l_virtAddr + l_offset_64); if (i_opType == DeviceFW::READ) { |