diff options
author | Zane Shelley <zshelle@us.ibm.com> | 2016-04-15 16:34:52 -0500 |
---|---|---|
committer | William G. Hoffa <wghoffa@us.ibm.com> | 2016-05-12 09:57:23 -0400 |
commit | e22a971e4a78b218aee6c6d6be7e7c9e3886bed9 (patch) | |
tree | 26305adebf000308842757efaa78aa581a793118 /src/usr | |
parent | 8ba27e9d76687d8071a19a64c690283d01d2523c (diff) | |
download | talos-hostboot-e22a971e4a78b218aee6c6d6be7e7c9e3886bed9.tar.gz talos-hostboot-e22a971e4a78b218aee6c6d6be7e7c9e3886bed9.zip |
PRD: created P9 configurator
Change-Id: I9bda0d2baefe828776e6323a99afea30b883e745
RTC: 145445
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23537
Tested-by: Jenkins Server
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24260
Tested-by: FSP CI Jenkins
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/usr')
-rwxr-xr-x | src/usr/diag/prdf/common/iipconst.h | 44 | ||||
-rw-r--r-- | src/usr/diag/prdf/common/plat/p9/p9_common_actions.rule | 172 | ||||
-rwxr-xr-x | src/usr/diag/prdf/common/plat/p9/prdfP9Configurator.C | 352 | ||||
-rwxr-xr-x | src/usr/diag/prdf/common/plat/p9/prdfP9PllDomain.C (renamed from src/usr/diag/prdf/common/plat/pegasus/prdfPllDomain.C) | 14 | ||||
-rw-r--r-- | src/usr/diag/prdf/common/plat/p9/prdf_plat_p9.mk | 2 | ||||
-rw-r--r-- | src/usr/diag/prdf/common/plat/pegasus/prdfPegasusConfigurator.C | 434 | ||||
-rw-r--r-- | src/usr/diag/prdf/common/plat/prdfPlatConfigurator.H (renamed from src/usr/diag/prdf/common/plat/pegasus/prdfPegasusConfigurator.H) | 102 | ||||
-rw-r--r-- | src/usr/diag/prdf/common/plat/prdfPllDomain.H (renamed from src/usr/diag/prdf/common/plat/pegasus/prdfPllDomain.H) | 2 | ||||
-rwxr-xr-x | src/usr/diag/prdf/common/prdfMain_common.C | 6 | ||||
-rwxr-xr-x | src/usr/diag/prdf/common/rule/prdfRuleFiles.C | 25 | ||||
-rwxr-xr-x | src/usr/diag/prdf/common/rule/prdfRuleFiles.H | 26 |
11 files changed, 494 insertions, 685 deletions
diff --git a/src/usr/diag/prdf/common/iipconst.h b/src/usr/diag/prdf/common/iipconst.h index 62410a432..9a709342b 100755 --- a/src/usr/diag/prdf/common/iipconst.h +++ b/src/usr/diag/prdf/common/iipconst.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2015 */ +/* Contributors Listed Below - COPYRIGHT 2012,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -68,24 +68,30 @@ namespace PRDF enum DOMAIN_ID { - UKNOWN_DOMAIN = 0, - - FABRIC_DOMAIN = 0x71, - EX_DOMAIN = 0x72, - MCS_DOMAIN = 0x73, - MEMBUF_DOMAIN = 0x74, - MBA_DOMAIN = 0x75, - XBUS_DOMAIN = 0x76, - ABUS_DOMAIN = 0x77, - NV_DOMAIN = 0x78, - - CLOCK_DOMAIN_FAB = 0x90, - CLOCK_DOMAIN_MCS = 0x91, - CLOCK_DOMAIN_MEMBUF = 0x92, - CLOCK_DOMAIN_IO = 0x93, - PCI_OSC_SWITCH_DOMAIN = 0x94, - - END_DOMAIN_ID + UKNOWN_DOMAIN = 0, + + PROC_DOMAIN = 0x71, + EQ_DOMAIN = 0x72, + EX_DOMAIN = 0x73, + EC_DOMAIN = 0x74, + CAPP_DOMAIN = 0x75, + PEC_DOMAIN = 0x76, + PHB_DOMAIN = 0x77, + XBUS_DOMAIN = 0x78, + OBUS_DOMAIN = 0x79, + MCBIST_DOMAIN = 0x7A, + MCS_DOMAIN = 0x7B, + MCA_DOMAIN = 0x7C, + + MEMBUF_DOMAIN = 0x80, + MBA_DOMAIN = 0x81, + + CLOCK_DOMAIN_FAB = 0x90, + CLOCK_DOMAIN_MCS = 0x91, + CLOCK_DOMAIN_MEMBUF = 0x92, + CLOCK_DOMAIN_IO = 0x93, + + END_DOMAIN_ID }; } // end namespace PRDF diff --git a/src/usr/diag/prdf/common/plat/p9/p9_common_actions.rule b/src/usr/diag/prdf/common/plat/p9/p9_common_actions.rule index 52e2e303f..91102e60d 100644 --- a/src/usr/diag/prdf/common/plat/p9/p9_common_actions.rule +++ b/src/usr/diag/prdf/common/plat/p9/p9_common_actions.rule @@ -25,9 +25,11 @@ ################################################################################ # This file is intended to create a common set of actionclasses for all rule -# files. These actionclasses will be created for all rule files, regardless if -# they are actually used. Please limit this file to relatively common actions. -# Otherwise, it will cause unwanted code size and memory usage. +# files. +# +# NOTE: THESE ACTIONCLASSES WILL BE CREATED FOR ALL RULE FILES, REGARDLESS IF +# THEY ARE ACTUALLY USED. PLEASE LIMIT THIS FILE TO RELATIVELY COMMON +# ACTIONS. OTHERWISE, IT WILL CAUSE UNWANTED CODE BLOAT AND MEMORY USAGE. # # Simply add the following line at the top the actionclass section of each rule # file: @@ -69,30 +71,12 @@ actionclass thresholdPll threshold( field(2 / 5 min) ); }; -/** Threshold of 2 per day */ -actionclass threshold2pday -{ - threshold( field(2 / day) ); -}; - /** Threshold of 32 per day */ actionclass threshold32pday { threshold( field(32 / day) ); }; -/** Threshold of 5 per hour */ -actionclass threshold5phour -{ - threshold( field(5 / hour) ); -}; - -/** Threshold of 5 per day */ -actionclass threshold5pday -{ - threshold( field(5 / day) ); -}; - ################################################################################ # Threshold and Mask policy ################################################################################ @@ -101,18 +85,18 @@ actionclass threshold5pday * Threshold 32/day (field) and 1 (mnfg). Do not predictively callout on * threshold in the field, instead just mask. */ -actionclass thresholdAndMask -{ - threshold32pday; - funccall("ClearServiceCallFlag"); -}; - -/** Callout self with "Threshold and Mask" policy. */ -actionclass thresholdAndMask_self -{ - calloutSelfMed; - thresholdAndMask; -}; +#actionclass thresholdAndMask +#{ +# threshold32pday; +# funccall("ClearServiceCallFlag"); +#}; +# +#/** Callout self with "Threshold and Mask" policy. */ +#actionclass thresholdAndMask_self +#{ +# calloutSelfMed; +# thresholdAndMask; +#}; ################################################################################ # Special Flags # @@ -153,120 +137,19 @@ actionclass calloutSelfLowNoGard # Callouts with thresholds # ################################################################################ -actionclass calloutParentProcMedThr1 -{ - callout(connected(TYPE_PROC),MRU_MED); - threshold1; -}; - -actionclass calloutParentProcHighThr1 -{ - callout(connected(TYPE_PROC),MRU_HIGH ); - threshold1; -}; - -actionclass callout2ndLvlMedThr1 -{ - callout2ndLvlMed; - threshold1; -}; -actionclass SelfMedThr1 +actionclass calloutSelfMedThr1 { calloutSelfMed; threshold1; }; -actionclass SelfMedThr1NoGard -{ - calloutSelfMedNoGard; - threshold1; -}; - -actionclass SelfHighThr1 -{ - calloutSelfHigh; - threshold1; -}; - -actionclass SelfMedThr1UE -{ - SelfMedThr1; - SUEGenerationPoint; -}; - -actionclass SelfHighThr1UE -{ - SelfHighThr1; - SUEGenerationPoint; -}; - -actionclass SelfLowLevel2MedThr1 -{ - calloutSelfLow; - callout2ndLvlMed; - threshold1; -}; - -actionclass SelfMedThr32PerDay -{ - calloutSelfMed; - threshold32pday; -}; - -actionclass SelfMedThr5PerHour +actionclass calloutSelfMedThr32PerDay { calloutSelfMed; - threshold5phour; -}; - -actionclass SelfHighThr5PerHour -{ - calloutSelfHigh; - threshold5phour; -}; - -actionclass SelfHighThr32PerDay -{ - calloutSelfHigh; - threshold32pday; -}; - -actionclass calloutSelfAndLevel2MedThr1 -{ - calloutSelfMed; - callout2ndLvlMed; - threshold1; -}; - - -/** Callout 2nd level support of afer 32 events per day */ -actionclass callout2ndLvlMedThr32 -{ - callout2ndLvlMed; threshold32pday; }; -/** Callout 2nd Level support on first occurrence */ -actionclass callout2ndLvlMedThr1 -{ - callout2ndLvlMed; - threshold1; -}; - -/** Callout 2nd Level Medium, set SUE generation point*/ -actionclass callout2ndLvlMedThr1UE -{ - callout2ndLvlMedThr1; - SUEGenerationPoint; -}; - -/** Callout 2nd Level Medium, initiate SH dump */ -actionclass callout2ndLvlMedThr1dumpSh -{ - callout2ndLvlMedThr1; - dumpSH; -}; ################################################################################ # Dump Types # ################################################################################ @@ -284,23 +167,6 @@ actionclass dumpSW }; ################################################################################ -# Callout sec lvl support with dump # -################################################################################ - -/** callout second lvl on first instance, initiaite SH dump */ -actionclass callout2ndLvlDumpSh -{ - callout2ndLvlMedThr1; - dumpSH; -}; - -/** Callout 2nd Level and dump SW */ -actionclass callout2ndLvlDumpSw -{ - callout2ndLvlMedThr1; - dumpSW; -}; -################################################################################ # Default callouts # ################################################################################ diff --git a/src/usr/diag/prdf/common/plat/p9/prdfP9Configurator.C b/src/usr/diag/prdf/common/plat/p9/prdfP9Configurator.C new file mode 100755 index 000000000..6fefc4742 --- /dev/null +++ b/src/usr/diag/prdf/common/plat/p9/prdfP9Configurator.C @@ -0,0 +1,352 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/diag/prdf/common/plat/p9/prdfP9Configurator.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +//------------------------------------------------------------------------------ +// Includes +//------------------------------------------------------------------------------ + +#include <prdfPlatConfigurator.H> + +#include <iipDomainContainer.h> +#include <iipResolutionFactory.h> +#include <iipSystem.h> +#include <prdfGlobal.H> +#include <prdfPlatServices.H> +#include <prdfRuleFiles.H> +#include <prdfRuleChip.H> +#include <prdfScanFacility.H> +#include <prdrLoadChipCache.H> // To flush chip-file cache. + +#include <prdfP9CappDomain.H> +#include <prdfP9EcDomain.H> +#include <prdfP9EqDomain.H> +#include <prdfP9ExDomain.H> +#include <prdfP9McaDomain.H> +#include <prdfP9McbistDomain.H> +#include <prdfP9McsDomain.H> +#include <prdfP9ObusDomain.H> +#include <prdfP9PecDomain.H> +#include <prdfP9PhbDomain.H> +#include <prdfP9ProcDomain.H> +#include <prdfP9XbusDomain.H> + +using namespace TARGETING; + +namespace PRDF +{ + +using namespace PlatServices; + +//------------------------------------------------------------------------------ + +// Resolution for no chips at attention. +CallAttnResolution PlatConfigurator::cv_noAttnResolution; + +//------------------------------------------------------------------------------ + +errlHndl_t PlatConfigurator::build() +{ + PRDF_ENTER( "PlatConfigurator::build()" ); + + errlHndl_t errl = NULL; + + // Create System object to populate with domains. + systemPtr = new System(cv_noAttnResolution); + + // Create domains. + ProcDomain * procDomain = new ProcDomain( PROC_DOMAIN ); + EqDomain * eqDomain = new EqDomain( EQ_DOMAIN ); + ExDomain * exDomain = new ExDomain( EX_DOMAIN ); + EcDomain * ecDomain = new EcDomain( EC_DOMAIN ); + CappDomain * cappDomain = new CappDomain( CAPP_DOMAIN ); + PecDomain * pecDomain = new PecDomain( PEC_DOMAIN ); + PhbDomain * phbDomain = new PhbDomain( PHB_DOMAIN ); + XbusDomain * xbusDomain = new XbusDomain( XBUS_DOMAIN ); + ObusDomain * obusDomain = new ObusDomain( OBUS_DOMAIN ); + McbistDomain * mcbistDomain = new McbistDomain( MCBIST_DOMAIN ); + McsDomain * mcsDomain = new McsDomain( MCS_DOMAIN ); + McaDomain * mcaDomain = new McaDomain( MCA_DOMAIN ); + + PllDomainMapList pllDmnMapLst; + + do + { + // First, add all chips to the domains. + // NOTE: Order is important so that the PLL domains are added in the + // correct order. + // NOTE: We should ensure that if build fails midway, deleting System + // should be enough to clean up the partial model. + + errl = addDomainChips( TYPE_PROC, procDomain, pllDmnMapLst ); + if ( NULL != errl ) break; + + errl = addDomainChips( TYPE_EQ, eqDomain, pllDmnMapLst ); + if ( NULL != errl ) break; + + errl = addDomainChips( TYPE_EX, exDomain, pllDmnMapLst ); + if ( NULL != errl ) break; + + errl = addDomainChips( TYPE_CORE, ecDomain, pllDmnMapLst ); + if ( NULL != errl ) break; + + errl = addDomainChips( TYPE_CAPP, cappDomain, pllDmnMapLst ); + if ( NULL != errl ) break; + + errl = addDomainChips( TYPE_PEC, pecDomain, pllDmnMapLst ); + if ( NULL != errl ) break; + + errl = addDomainChips( TYPE_PHB, phbDomain, pllDmnMapLst ); + if ( NULL != errl ) break; + + errl = addDomainChips( TYPE_XBUS, xbusDomain, pllDmnMapLst ); + if ( NULL != errl ) break; + + errl = addDomainChips( TYPE_OBUS, obusDomain, pllDmnMapLst ); + if ( NULL != errl ) break; + + errl = addDomainChips( TYPE_MCBIST, mcbistDomain, pllDmnMapLst ); + if ( NULL != errl ) break; + + errl = addDomainChips( TYPE_MCS, mcsDomain, pllDmnMapLst ); + if ( NULL != errl ) break; + + errl = addDomainChips( TYPE_MCA, mcaDomain, pllDmnMapLst ); + if ( NULL != errl ) break; + + } while (0); + + // Now, add the domains to system. + // NOTE: Order is important because this is the order that the domains will + // be analyzed. + // Note: We are adding these domains to system regardless if there was a + // failure. We are doing it simply because we want to clean up the + // partial object model by simply deleting the system. If we add + // domain to system with or without chips (error scenario), we can do + // the clean up quite easily. + + // PLL domains are always first. + addPllDomainsToSystem( pllDmnMapLst ); + + // Memory chip domains are always second. + // TODO: RTC 144056 Cumulus/Centaur systems. + + // Processor chip domains are always third. + sysDmnLst.push_back( procDomain ); + + // ATTN only calls PRD with a list of chips. For performance improvements + // during System::Analyze() add all chiplet domains after the chip domains. + // Note that order of the chiplet domains does not matter because analysis + // originates from the chip domains above. + sysDmnLst.push_back( eqDomain ); + sysDmnLst.push_back( exDomain ); + sysDmnLst.push_back( ecDomain ); + sysDmnLst.push_back( cappDomain ); + sysDmnLst.push_back( pecDomain ); + sysDmnLst.push_back( phbDomain ); + sysDmnLst.push_back( xbusDomain ); + sysDmnLst.push_back( obusDomain ); + sysDmnLst.push_back( mcbistDomain ); + sysDmnLst.push_back( mcsDomain ); + sysDmnLst.push_back( mcaDomain ); + + // Add chips to the system. + Configurator::chipList & chips = getChipList(); + systemPtr->AddChips( chips.begin(), chips.end() ); + + // Add domains to the system. + Configurator::domainList & domains = getDomainList(); + systemPtr->AddDomains( domains.begin(), domains.end() ); + + #ifdef FLYWEIGHT_PROFILING + + ScanFacility & scanFac = ScanFacility::Access(); + PRDF_TRAC( "printing flyweight register and resolution objects "); + scanFac.printStats(); + PRDF_TRAC("total chips in the system %d ",chips.size()); + ResolutionFactory & resol = ResolutionFactory::Access( ); + resol.printStats(); + + #endif // FLYWEIGHT_PROFILING + + // The underlying list of chips and domains will not be cleaned up until + // the configurator goes out of scope at the end of PRDF::initialize(). + // It was observed that clearing these lists here will greatly reduced + // the peak memory usage for the duration of the PRDF::initialize() + // function. + chips.clear(); + domains.clear(); + + if ( NULL != errl ) + { + PRDF_ERR( "PlatConfigurator::build() failed to build object model" ); + } + + PRDF_EXIT( "PlatConfigurator::build()" ); + + return errl; +} + +//------------------------------------------------------------------------------ + +errlHndl_t PlatConfigurator::addDomainChips( TARGETING::TYPE i_type, + RuleChipDomain * io_domain, + PllDomainMapList & io_pllDmnLst ) +{ + errlHndl_t l_errl = NULL; + + // Get references to factory objects. + ScanFacility & scanFac = ScanFacility::Access(); + ResolutionFactory & resFac = ResolutionFactory::Access(); + + // Get all targets of specified type and add to given domain. + TargetHandleList trgtList = getFunctionalTargetList( i_type ); + + if ( 0 == trgtList.size() ) + { + PRDF_ERR( "[addDomainChips] getFunctionalTargetList() " + "returned empty list for i_type=%d", i_type ); + } + else + { + // Get rule filename based on type. + const char * fileName = ""; + switch ( i_type ) + { + case TYPE_PROC: fileName = p9_nimbus; break; + case TYPE_EQ: fileName = p9_eq; break; + case TYPE_EX: fileName = p9_ex; break; + case TYPE_CORE: fileName = p9_ec; break; + case TYPE_CAPP: fileName = p9_capp; break; + case TYPE_PEC: fileName = p9_pec; break; + case TYPE_PHB: fileName = p9_phb; break; + case TYPE_XBUS: fileName = p9_xbus; break; + case TYPE_OBUS: fileName = p9_obus; break; + case TYPE_MCBIST: fileName = p9_mcbist; break; + case TYPE_MCS: fileName = p9_mcs; break; + case TYPE_MCA: fileName = p9_mca; break; + + default: + // Print a trace statement, but do not fail the build. + PRDF_ERR( "[addDomainChips] Unsupported target type: %d", + i_type ); + } + + // Generic empty PLL domain maps, if they are used. + PllDomainMap pllDmnMap1, pllDmnMap2; + + // Add each chip to the chip domain. + for ( const auto & trgt : trgtList ) + { + if ( NULL == trgt ) continue; + + RuleChip * chip = new RuleChip( fileName, trgt, + scanFac, resFac, l_errl ); + if ( NULL != l_errl ) + { + delete chip; + break; + } + + sysChipLst.push_back( chip ); + io_domain->AddChip( chip ); + + // PLL domains + switch ( i_type ) + { + case TYPE_PROC: + addChipToPllDomain( CLOCK_DOMAIN_FAB, pllDmnMap1, + chip, trgt, TYPE_PROC, + scanFac, resFac ); + addChipToPllDomain( CLOCK_DOMAIN_IO, pllDmnMap2, + chip, trgt, TYPE_PCI, + scanFac, resFac ); + break; + + case TYPE_MEMBUF: + addChipToPllDomain( CLOCK_DOMAIN_MEMBUF, pllDmnMap1, + chip, trgt, TYPE_MEMBUF, + scanFac, resFac ); + break; + + default: ; + } + } + + // Add the PLL domain maps to the PLL domain map list. + if ( !pllDmnMap1.empty() ) io_pllDmnLst.push_back( pllDmnMap1 ); + if ( !pllDmnMap2.empty() ) io_pllDmnLst.push_back( pllDmnMap2 ); + + // Flush rule table cache since objects are all built. + Prdr::LoadChipCache::flushCache(); + } + + return l_errl; +} + +//------------------------------------------------------------------------------ + +void PlatConfigurator::addChipToPllDomain( DOMAIN_ID i_domainId, + PllDomainMap & io_pllDmnMap, + RuleChip * i_chip, + TARGETING::TargetHandle_t i_trgt, + TARGETING::TYPE i_type, + ScanFacility & i_scanFac, + ResolutionFactory & i_resFac ) +{ + // PROC PLL - only one per node as all fabs on node have same clock source. + uint32_t node = getNodePosition( i_trgt ); + + if ( io_pllDmnMap.end() == io_pllDmnMap.find(node) ) + { + Resolution & clock = i_resFac.GetClockResolution( i_trgt, i_type ); + + #ifdef __HOSTBOOT_MODULE + io_pllDmnMap[node] = new PllDomain( i_domainId, clock, + ThresholdResolution::cv_mnfgDefault ); + #else + io_pllDmnMap[node] = new PllDomain( i_domainId, clock, CONTENT_HW, + ThresholdResolution::cv_mnfgDefault ); + #endif + } + + io_pllDmnMap[node]->AddChip( i_chip ); +} + +//------------------------------------------------------------------------------ + +void PlatConfigurator::addPllDomainsToSystem( const PllDomainMapList & i_list ) +{ + for ( PllDomainMapList::const_iterator lit = i_list.begin(); + lit != i_list.end(); ++lit ) + { + for ( PllDomainMap::const_iterator mit = lit->begin(); + mit != lit->begin(); ++mit ) + { + sysDmnLst.push_back( mit->second ); + } + } +} + +} // end namespace PRDF diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfPllDomain.C b/src/usr/diag/prdf/common/plat/p9/prdfP9PllDomain.C index 494bdbac7..a94a58193 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/prdfPllDomain.C +++ b/src/usr/diag/prdf/common/plat/p9/prdfP9PllDomain.C @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/usr/diag/prdf/common/plat/pegasus/prdfPllDomain.C $ */ +/* $Source: src/usr/diag/prdf/common/plat/p9/prdfP9PllDomain.C $ */ /* */ /* OpenPOWER HostBoot Project */ /* */ @@ -27,27 +27,29 @@ * @brief Definition of PllDomain class */ +#include <prdfPllDomain.H> + #include <CcAutoDeletePointer.h> #include <iipscr.h> #include <iipsdbug.h> #include <iipServiceDataCollector.h> #include <prdfErrorSignature.H> -#include <prdfPllDomain.H> #include <iipResolution.h> #include <prdfPlatServices.H> #include <prdfPluginDef.H> #include <prdfGlobal.H> #include <iipSystem.h> #include <UtilHash.H> -#include <prdfP8PllPcie.H> -#include <prdfP8ProcMbCommonExtraSig.H> + +//#include <prdfP8PllPcie.H> TODO RTC 136052 +//#include <prdfP8ProcMbCommonExtraSig.H> TODO RTC 136052 using namespace TARGETING; namespace PRDF { -using namespace PLL; +//using namespace PLL; TODO RTC 136052 using namespace PlatServices; //------------------------------------------------------------------------------ @@ -321,7 +323,7 @@ int32_t PllDomain::Analyze(STEP_CODE_DATA_STRUCT & serviceData, } // Set Signature serviceData.service_data->GetErrorSignature()->setChipId(chip()[0]->GetId()); - serviceData.service_data->SetErrorSig( PRDFSIG_PLL_ERROR ); +// serviceData.service_data->SetErrorSig( PRDFSIG_PLL_ERROR ); TODO RTC 136052 #ifndef __HOSTBOOT_MODULE // Set dump flag dg09a diff --git a/src/usr/diag/prdf/common/plat/p9/prdf_plat_p9.mk b/src/usr/diag/prdf/common/plat/p9/prdf_plat_p9.mk index d0e83e000..a11d7c90e 100644 --- a/src/usr/diag/prdf/common/plat/p9/prdf_plat_p9.mk +++ b/src/usr/diag/prdf/common/plat/p9/prdf_plat_p9.mk @@ -37,4 +37,6 @@ prd_incpath += ${PRD_SRC_PATH}/common/plat/p9 # Object files common to both FSP and Hostboot ################################################################################ +prd_obj += prdfP9Configurator.o +prd_obj += prdfP9PllDomain.o diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfPegasusConfigurator.C b/src/usr/diag/prdf/common/plat/pegasus/prdfPegasusConfigurator.C deleted file mode 100644 index b7ef7ff68..000000000 --- a/src/usr/diag/prdf/common/plat/pegasus/prdfPegasusConfigurator.C +++ /dev/null @@ -1,434 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/usr/diag/prdf/common/plat/pegasus/prdfPegasusConfigurator.C $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2012,2015 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -//------------------------------------------------------------------------------ -// Includes -//------------------------------------------------------------------------------ - -#include <prdfGlobal.H> -#include <prdfPegasusConfigurator.H> -#include <prdfRuleFiles.H> - -#include <prdfRuleChip.H> -#include <iipDomainContainer.h> -#include <prdfScanFacility.H> -#include <iipResolutionFactory.h> - -#include <prdfFabricDomain.H> -#include <prdfExDomain.H> -#include <prdfMcsDomain.H> -#include <prdfMembufDomain.H> -#include <prdfMbaDomain.H> -#include <prdfPlatServices.H> -#include <iipSystem.h> -#include <prdrLoadChipCache.H> // To flush chip-file cache. -#include <prdfPciOscSwitchDomain.H> - -using namespace TARGETING; - -namespace PRDF -{ - -using namespace PlatServices; - -//------------------------------------------------------------------------------ - -// Resolution for no chips at attention. -CallAttnResolution PegasusConfigurator::noAttnResolution; - -//------------------------------------------------------------------------------ -// Local Helper functions - -/** - * @brief Return max number of nodes in the system - * Note that Hostboot only has node view. - * @return max number of nodes - * always return 1 in Hostboot - */ -uint32_t _getMaxNumNodes() -{ - #ifdef __HOSTBOOT_MODULE - return 1; // only one node in Hostboot - #else - return MAX_NODE_PER_SYS; - #endif -} - -/** - * @brief Returns the position of a node in which the given target is - * contained. - * @param i_target Any target. - * @return The position of the connected node. - * Hostboot only has node view so it always returns 0. - */ -uint32_t _getNodePosition( TARGETING::TargetHandle_t i_pTarget ) -{ - using namespace TARGETING; - - uint32_t o_pos = 0; - - #ifndef __HOSTBOOT_MODULE - - o_pos = PlatServices::getNodePosition(i_pTarget); - - #endif - - return o_pos; -} - -//------------------------------------------------------------------------------ - -errlHndl_t PegasusConfigurator::build() -{ - using namespace TARGETING; - - PRDF_ENTER( "PegasusConfigurator::build()" ); - - errlHndl_t errl = NULL; - - // Create System object to populate with domains. - systemPtr = new System(noAttnResolution); - - // Create domains. - FabricDomain * l_procDomain = new FabricDomain( FABRIC_DOMAIN ); - ExDomain * l_exDomain = new ExDomain( EX_DOMAIN ); - McsDomain * l_mcsDomain = new McsDomain( MCS_DOMAIN ); - MembufDomain * l_membufDomain = new MembufDomain( MEMBUF_DOMAIN ); - MbaDomain * l_mbaDomain = new MbaDomain( MBA_DOMAIN ); - PciOscSwitchDomain * l_pciSwitchDomain = - new PciOscSwitchDomain ( PCI_OSC_SWITCH_DOMAIN ); - - uint32_t l_maxNodeCount = _getMaxNumNodes(); - // PLL domains - PllDomainList l_fabricPllDomains(l_maxNodeCount, NULL); - PllDomainList l_pciePllDomains(l_maxNodeCount, NULL); - PllDomainList l_membPllDomains( l_maxNodeCount, NULL); - - do - { - // Idea of build is to add chips to domain and add domains to System - // Also, we should ensure that if build fails in mid way, deleting - // System should be enough to clean up th partial model. - - // Add chips to domains. - errl = addDomainChips( TYPE_MEMBUF, l_membufDomain, &l_membPllDomains ); - if ( NULL != errl ) break; - - errl = addDomainChips( TYPE_MBA, l_mbaDomain ); - if ( NULL != errl ) break; - - errl = addDomainChips( TYPE_PROC, l_procDomain, - &l_fabricPllDomains, &l_pciePllDomains ); - if ( NULL != errl ) break; - - errl = addDomainChips( TYPE_PROC, l_pciSwitchDomain ); - if ( NULL != errl ) break; - - errl = addDomainChips( TYPE_EX, l_exDomain ); - if ( NULL != errl ) break; - - errl = addDomainChips( TYPE_MCS, l_mcsDomain ); - if ( NULL != errl ) break; - - } while (0); - - //Note: we are adding these domains to system regardles of error log - //handle status. We are doing it simply because in case error handle is - //not NULL, we want to clean up the partial object model by simply - //deleting the system. If we add domain to system with or without chips - //( error scenario ), we can do the clean up quite easily. - - // Add domains to domain list. NOTE: Order is important because this is - // the order the domains will be analyzed. - - sysDmnLst.push_back( l_pciSwitchDomain ); - - addPllDomainsToSystem( l_fabricPllDomains, - l_pciePllDomains, - l_membPllDomains ); - - //MemBuf domain added after PLL domain - sysDmnLst.push_back( l_membufDomain ); - //Proc domain added after Membuf domain - sysDmnLst.push_back( l_procDomain ); - //In real HW, ATTN only calls PRD with Centaur or Proc chip. For - //performance improvement during System::Analyze add all domains - //after membuf/Proc domain. - sysDmnLst.push_back( l_exDomain ); - sysDmnLst.push_back( l_mcsDomain ); - sysDmnLst.push_back( l_mbaDomain ); - - // Add chips to the system. - Configurator::chipList & chips = getChipList(); - systemPtr->AddChips( chips.begin(), chips.end() ); - - // Add domains to the system. - Configurator::domainList & domains = getDomainList(); - systemPtr->AddDomains( domains.begin(), domains.end() ); - - #ifdef FLYWEIGHT_PROFILING - - ScanFacility & scanFac = ScanFacility::Access(); - PRDF_TRAC( "printing flyweight register and resolution objects "); - scanFac.printStats(); - PRDF_TRAC("total chips in the system %d ",chips.size()); - ResolutionFactory & resol = ResolutionFactory::Access( ); - resol.printStats(); - - #endif // FLYWEIGHT_PROFILING - - // The underlying list of chips and domains will not be cleaned up until - // the configurator goes out of scope at the end of PRDF::initialize(). - // It was observed that clearing these lists here will greatly reduced - // the peak memory usage for the duration of the PRDF::initialize() - // function. - chips.clear(); - domains.clear(); - - - if ( NULL != errl ) - { - PRDF_ERR( "PegasusConfigurator::build() failed to build" - " object model" ); - } - - PRDF_EXIT( "PegasusConfigurator::build()" ); - - return errl; -} - -//------------------------------------------------------------------------------ - -errlHndl_t PegasusConfigurator::addDomainChips( TARGETING::TYPE i_type, - RuleChipDomain * io_domain, - PllDomainList * io_pllDomains, - PllDomainList * io_pllDomains2) -{ - using namespace TARGETING; - errlHndl_t l_errl = NULL ; - - // Get references to factory objects. - ScanFacility & scanFac = ScanFacility::Access(); - ResolutionFactory & resFac = ResolutionFactory::Access(); - - // Get all targets of specified type and add to given domain. - TargetHandleList list = PlatServices::getFunctionalTargetList( i_type ); - - if ( 0 == list.size() ) - { - PRDF_ERR( "[addDomainChips] getFunctionalTargetList " - "returned empty list for i_type=%d", i_type ); - } - else - { - // Get rule filename based on type. - const char * fileName = ""; - switch ( i_type ) - { - case TYPE_PROC: - // Check which Proc chip type - if (MODEL_NAPLES == getProcModel(list[0])) - fileName = NaplesProc; - else - fileName = MuranoVeniceProc; - break; - case TYPE_EX: fileName = Ex; break; - case TYPE_MCS: fileName = Mcs; break; - case TYPE_MEMBUF: fileName = Membuf; break; - case TYPE_MBA: fileName = Mba; break; - - default: - // Print a trace statement, but do not fail the build. - PRDF_ERR( "[addDomainChips] Unsupported target type: %d", - i_type ); - } - - for ( TargetHandleList::const_iterator itr = list.begin(); - itr != list.end(); ++itr ) - { - if ( NULL == *itr ) continue; - - RuleChip * chip = new RuleChip( fileName, *itr, - scanFac, resFac,l_errl ); - if( NULL != l_errl ) - { - delete chip; - break; - } - sysChipLst.push_back( chip ); - io_domain->AddChip( chip ); - - // PLL domains - switch ( i_type ) - { - case TYPE_PROC: - addChipsToPllDomain(CLOCK_DOMAIN_FAB, - io_pllDomains, - chip, - *itr, - scanFac, - resFac); - addChipsToPllDomain(CLOCK_DOMAIN_IO, - io_pllDomains2, - chip, - *itr, - scanFac, - resFac); - break; - case TYPE_MEMBUF: - addChipsToPllDomain(CLOCK_DOMAIN_MEMBUF, - io_pllDomains, - chip, - *itr, - scanFac, - resFac); - break; - default: - break; - } - } - - // Flush rule table cache since objects are all built. - Prdr::LoadChipCache::flushCache(); - - } - - return l_errl; -} - -void PegasusConfigurator::addChipsToPllDomain( - DOMAIN_ID i_domainId, - PllDomainList * io_pllDomains, - RuleChip * i_chip, - TARGETING::TargetHandle_t i_pTarget, - ScanFacility & i_scanFac, - ResolutionFactory & i_resFac) -{ - do - { - uint32_t l_node = _getNodePosition(i_pTarget); - - // Fabric PLL - only one per node as all fabs - // on node have same clock source - if(NULL != io_pllDomains) - { - if(NULL == (*io_pllDomains)[l_node]) - { - if(CLOCK_DOMAIN_FAB == i_domainId) - { - Resolution & procClock = i_resFac.GetClockResolution( - i_pTarget, TYPE_PROC); - - #ifdef __HOSTBOOT_MODULE - (*io_pllDomains)[l_node] = new PllDomain( - i_domainId, procClock, - ThresholdResolution::cv_mnfgDefault ); - #else - (*io_pllDomains)[l_node] = new PllDomain( - i_domainId, procClock, - CONTENT_HW, - ThresholdResolution::cv_mnfgDefault ); - #endif - } - else if(CLOCK_DOMAIN_IO == i_domainId) - { - Resolution & ioClock = i_resFac.GetClockResolution( - i_pTarget, TYPE_PCI); - #ifdef __HOSTBOOT_MODULE - (*io_pllDomains)[l_node] = new PllDomain( - i_domainId, ioClock, - ThresholdResolution::cv_mnfgDefault ); - #else - (*io_pllDomains)[l_node] = new PllDomain( - i_domainId, ioClock, - CONTENT_HW, - ThresholdResolution::cv_mnfgDefault ); - #endif - } - else if(CLOCK_DOMAIN_MEMBUF == i_domainId) - { - Resolution & clock = i_resFac.GetClockResolution( - i_pTarget, TYPE_MEMBUF); - - #ifdef __HOSTBOOT_MODULE - (*io_pllDomains)[l_node] = new PllDomain( - i_domainId, clock, - ThresholdResolution::cv_mnfgDefault ); - #else - (*io_pllDomains)[l_node] = new PllDomain( - i_domainId, clock, CONTENT_HW, - ThresholdResolution::cv_mnfgDefault ); - #endif - } - else - { - PRDF_ERR( "[addChipsToPllDomain] Unsupported PLL Domain: " - "0x%08x", i_domainId ); - break; - } - } - - (*io_pllDomains)[l_node]->AddChip(i_chip); - } - - } while(0); -} - -void PegasusConfigurator::addPllDomainsToSystem( - PllDomainList & i_fabricPllDomains, - PllDomainList & i_pciePllDomains, - PllDomainList & i_membPllDomains) -{ - uint32_t l_maxNodeCount = _getMaxNumNodes(); - - //Add Fabric Pll Domains to the system. - for(uint32_t n = 0; n < l_maxNodeCount; ++n) - { - if(NULL != i_fabricPllDomains[n]) - { - sysDmnLst.push_back(i_fabricPllDomains[n]); - } - } - - //Add PCIe Pll Domains to the system. - for(uint32_t n = 0; n < l_maxNodeCount; ++n) - { - if(NULL != i_pciePllDomains[n]) - { - sysDmnLst.push_back(i_pciePllDomains[n]); - } - } - - //Add Membuf Pll Domains to the system. - for(uint32_t n = 0; n < l_maxNodeCount; ++n) - { - if(NULL != i_membPllDomains[n]) - { - sysDmnLst.push_back(i_membPllDomains[n]); - } - } -} - -} // end namespace PRDF diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfPegasusConfigurator.H b/src/usr/diag/prdf/common/plat/prdfPlatConfigurator.H index 17cf1ae6f..4a531ced9 100644 --- a/src/usr/diag/prdf/common/plat/pegasus/prdfPegasusConfigurator.H +++ b/src/usr/diag/prdf/common/plat/prdfPlatConfigurator.H @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/usr/diag/prdf/common/plat/pegasus/prdfPegasusConfigurator.H $ */ +/* $Source: src/usr/diag/prdf/common/plat/prdfPlatConfigurator.H $ */ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2015 */ +/* Contributors Listed Below - COPYRIGHT 2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -23,32 +23,33 @@ /* */ /* IBM_PROLOG_END_TAG */ -#ifndef prdfPegasusConfigurator_H -#define prdfPegasusConfigurator_H +#ifndef __prdfPlatConfigurator_H +#define __prdfPlatConfigurator_H -/** @file prdfPegasusConfigurator.H - * @brief Builds the PRD system model for Pegasus (P8 based systems). +/** @file prdfPlatConfigurator.H + * @brief Builds the PRD system model. */ +#include <vector> +#include <map> + #include <iipConfigurator.h> #include <iipCallAttnResolution.h> // For CallAttnResolution #include <prdfPllDomain.H> +#include <prdfRuleChipDomain.H> namespace PRDF { -class RuleChipDomain; -typedef std::vector< PllDomain *> PllDomainList; -typedef std::vector< CHIP_CLASS *> PllChipList; -/** @brief PRD configurator for Pegasus (P8 systems) */ -class PegasusConfigurator : public Configurator +/** @brief PRD configurator */ +class PlatConfigurator : public Configurator { public: /** * @brief Constructor */ - PegasusConfigurator() : + PlatConfigurator() : Configurator( RuleChipDomain::TOTAL_CHIPS, RuleChipDomain::TOTAL_DOMAINS ) {} @@ -58,7 +59,7 @@ class PegasusConfigurator : public Configurator * @note This configurator does not delete the objects it created during * build(); that is the responsibility of the system object. */ - ~PegasusConfigurator() {} + ~PlatConfigurator() {} /** * @brief Create the PRD system object, all chip instances, and all domain @@ -67,60 +68,59 @@ class PegasusConfigurator : public Configurator * @note The caller of this function owns the responsibility of deleting * the system object created. */ - virtual errlHndl_t build(); + virtual errlHndl_t build(); + + private: // data + + typedef std::map<uint32_t, PllDomain *> PllDomainMap; + typedef std::vector<PllDomainMap> PllDomainMapList; private: // functions /** @brief Copy not allowed. */ - PegasusConfigurator( const PegasusConfigurator & right ); + PlatConfigurator( const PlatConfigurator & right ); /** @brief Assignment not allowed. */ - const PegasusConfigurator & operator=( const PegasusConfigurator & right ); + const PlatConfigurator & operator=( const PlatConfigurator & right ); /** - * @brief Will add all chips of a given type to a domain. - * @parm i_type The specified target type. - * @parm io_domain The associated domain. - * @parm io_pllDomains The associated PLL domain (optional for some) - * @parm io_pllDomains2 The associated PLL domain (optional for some) - * @return error log handle + * @brief Adds all chips of a given target type to a domain. + * @parm i_type The specified target type. + * @parm io_domain The associated domain. + * @parm io_pllDmnLst The PLL domain map list. + * @return An error log on error, otherwise NULL. */ errlHndl_t addDomainChips( TARGETING::TYPE i_type, - RuleChipDomain * io_domain, - PllDomainList * io_pllDomains = NULL, - PllDomainList * io_pllDomains2 = NULL); + RuleChipDomain * io_domain, + PllDomainMapList & io_pllDmnLst ); + + /** + * @brief Adds a chip to its Pll Domain. + * @param i_domainId PLL Domain ID (CLOCK_DOMAIN_FAB/_MEMBUF) + * @param io_pllDmnMap PLL domain map for this clock type. + * @param i_chip Chip to add. + * @param i_trgt Chip's target handle. + * @param i_type Clock type. + * @param i_scanFac Scan Facility. + * @param i_resFac Resolution Factory. + */ + void addChipToPllDomain( DOMAIN_ID i_domainId, + PllDomainMap & io_pllDmnMap, + RuleChip * i_chip, + TARGETING::TargetHandle_t i_trgt, + TARGETING::TYPE i_type, + ScanFacility & i_scanFac, + ResolutionFactory & i_resFac ); /** - * @brief Add chip to its Pll Domain. - * @param i_domainId - Domain Id (CLOCK_DOMAIN_FAB/_MEMBUF) - * @param i_fabricPllDomains - List of Pll Domains - * @param i_chip - Pointer to chip. - * @param i_pTarget - chip target. - * @param i_scanFac - Scan Facility. - * @param i_resFac - Resolution Factory. + * @brief Add PLL all of the PLL domains to System. + * @param i_list List of PLL domain maps to add to System. */ - void addChipsToPllDomain( - DOMAIN_ID i_domainId, - PllDomainList * io_fabricPllDomains, - RuleChip * i_chip, - TARGETING::TargetHandle_t i_pTarget, - ScanFacility & i_scanFac, - ResolutionFactory & i_resFac); - - /** - * @brief Add Pll Domains to the System. - * @param i_fabricPllDomains - List of Fabric Pll Domains - * @param i_pciePllDomains - List of Pcie Pll Domains - * @param i_membPllDomains - List of Membuf Pll Domains - */ - void addPllDomainsToSystem( - PllDomainList & i_fabricPllDomains, - PllDomainList & i_pciePllDomains, - PllDomainList & i_membPllDomains ); + void addPllDomainsToSystem( const PllDomainMapList & i_list ); private: // data - static CallAttnResolution noAttnResolution; + static CallAttnResolution cv_noAttnResolution; }; } // end namespace PRDF diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfPllDomain.H b/src/usr/diag/prdf/common/plat/prdfPllDomain.H index ef053b6da..7cf387c32 100644 --- a/src/usr/diag/prdf/common/plat/pegasus/prdfPllDomain.H +++ b/src/usr/diag/prdf/common/plat/prdfPllDomain.H @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/usr/diag/prdf/common/plat/pegasus/prdfPllDomain.H $ */ +/* $Source: src/usr/diag/prdf/common/plat/prdfPllDomain.H $ */ /* */ /* OpenPOWER HostBoot Project */ /* */ diff --git a/src/usr/diag/prdf/common/prdfMain_common.C b/src/usr/diag/prdf/common/prdfMain_common.C index 38e0b5c61..f766e1832 100755 --- a/src/usr/diag/prdf/common/prdfMain_common.C +++ b/src/usr/diag/prdf/common/prdfMain_common.C @@ -48,7 +48,7 @@ #include <prdfSdcFileControl.H> #endif -//#include <prdfPegasusConfigurator.H> TODO: RTC 145445 +#include <prdfPlatConfigurator.H> namespace PRDF { @@ -119,9 +119,8 @@ errlHndl_t noLock_initialize() // Perform platform specific initialization. initPlatSpecific(); -/* TODO: RTC 145445 CcAutoDeletePointer<Configurator> configuratorPtr - ( new PRDF::PegasusConfigurator() ); + ( new PRDF::PlatConfigurator() ); errlHndl_t l_errBuild = configuratorPtr->build();//build object model if( NULL != l_errBuild ) @@ -143,7 +142,6 @@ errlHndl_t noLock_initialize() systemPtr->Initialize(); // Hardware initialization g_initialized = true; } -*/ // Flush rule table cache since objects are all built. Prdr::LoadChipCache::flushCache(); diff --git a/src/usr/diag/prdf/common/rule/prdfRuleFiles.C b/src/usr/diag/prdf/common/rule/prdfRuleFiles.C index 36830a723..c0360beec 100755 --- a/src/usr/diag/prdf/common/rule/prdfRuleFiles.C +++ b/src/usr/diag/prdf/common/rule/prdfRuleFiles.C @@ -28,21 +28,30 @@ /** * @file prdfRuleFiles.C - * @brief Contains the name of each chip's associated file. + * @brief Contains the name of each chip's associated .prf file. */ namespace PRDF { - // Pegasus P8 Chip - const char * MuranoVeniceProc = "MuranoVeniceProc"; - const char * NaplesProc = "NaplesProc"; - const char * Ex = "Ex"; - const char * Mcs = "Mcs"; + // P9 Chip + const char * p9_nimbus = "p9_nimbus"; + const char * p9_eq = "p9_eq"; + const char * p9_ex = "p9_ex"; + const char * p9_ec = "p9_ec"; + const char * p9_capp = "p9_capp"; + const char * p9_pec = "p9_pec"; + const char * p9_phb = "p9_phb"; + const char * p9_xbus = "p9_xbus"; + const char * p9_obus = "p9_obus"; + const char * p9_mcbist = "p9_mcbist"; + const char * p9_mcs = "p9_mcs"; + const char * p9_mca = "p9_mca"; // Pegasus Centaur Chip - const char * Membuf = "Membuf"; - const char * Mba = "Mba"; +// const char * Membuf = "Membuf"; +// const char * Mba = "Mba"; } // end namespace PRDF #endif + diff --git a/src/usr/diag/prdf/common/rule/prdfRuleFiles.H b/src/usr/diag/prdf/common/rule/prdfRuleFiles.H index f60c88e84..73ffbbcb0 100755 --- a/src/usr/diag/prdf/common/rule/prdfRuleFiles.H +++ b/src/usr/diag/prdf/common/rule/prdfRuleFiles.H @@ -34,15 +34,23 @@ namespace PRDF { - // Pegasus P8 Chip - extern const char * MuranoVeniceProc; - extern const char * NaplesProc; - extern const char * Ex; - extern const char * Mcs; - - // Pegasus Centaur Chip - extern const char * Membuf; - extern const char * Mba; + // P9 Chip + extern const char * p9_nimbus; + extern const char * p9_eq; + extern const char * p9_ex; + extern const char * p9_ec; + extern const char * p9_capp; + extern const char * p9_pec; + extern const char * p9_phb; + extern const char * p9_xbus; + extern const char * p9_obus; + extern const char * p9_mcbist; + extern const char * p9_mcs; + extern const char * p9_mca; + + // Centaur Chip +// extern const char * Membuf; +// extern const char * Mba; } // end namespace PRDF |