Enabled fsi-scom testing of remote Venice and remote Centaur chips.

Change-Id: If7b45610dcd20f35f9f1d1442164a7485c4d7e14
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/504
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

2 files changed, 137 insertions, 59 deletions

diff --git a/src/usr/fsi/test/fsiddtest.H b/src/usr/fsi/test/fsiddtest.H
index ebd96cad0..dfd7c66e0 100644
--- a/src/usr/fsi/test/fsiddtest.H
+++ b/src/usr/fsi/test/fsiddtest.H
@@ -139,6 +139,7 @@ class FsiDDTest : public CxxTest::TestSuite
         enum {
             PROC0,
             PROCWRAP,
+            PROC1,
             PROC2,
             CENTAUR0,
             CENTAUR8,
@@ -167,19 +168,25 @@ class FsiDDTest : public CxxTest::TestSuite
         fsi_target = TARGETING::targetService().toTarget(epath);
         fsi_targets[PROCWRAP] = fsi_target;
 
-        // other (wrap) processor target (physical:sys-0/node-0/proc-2)
+        // other processor target (physical:sys-0/node-0/proc-1)
+        epath.removeLast();
+        epath.addLast(TARGETING::TYPE_PROC,1);
+        fsi_target = TARGETING::targetService().toTarget(epath);
+        fsi_targets[PROC1] = fsi_target;
+
+        // alt-master processor target (physical:sys-0/node-0/proc-2)
         epath.removeLast();
         epath.addLast(TARGETING::TYPE_PROC,2);
         fsi_target = TARGETING::targetService().toTarget(epath);
         fsi_targets[PROC2] = fsi_target;
 
-        // centaur target (physical:sys-0/node-0/membuf-0)
+        // local centaur target (physical:sys-0/node-0/membuf-0)
         epath.removeLast();
         epath.addLast(TARGETING::TYPE_MEMBUF,0);
         fsi_target = TARGETING::targetService().toTarget(epath);
         fsi_targets[CENTAUR0] = fsi_target;
 
-        // centaur target (physical:sys-0/node-0/membuf-8)
+        // remote centaur target (physical:sys-0/node-0/membuf-8)
         epath.removeLast();
         epath.addLast(TARGETING::TYPE_MEMBUF,8);
         fsi_target = TARGETING::targetService().toTarget(epath);
@@ -217,6 +224,9 @@ class FsiDDTest : public CxxTest::TestSuite
             //@fixme SW106529  { PROCWRAP, 0x001028, 0x120EA049, false, false }, //CHIPID from FSI2PIB off MFSI-0 
 
             //** Slave Regs
+            { PROC1, 0x001000, 0x88776655, true, false }, //FEL from SHIFT off MFSI-1
+
+            //** Slave Regs
             { PROC2, 0x000000, 0xC0010EA0, false, false }, //Config Table entry for slave0 off MFSI-2
             { PROC2, 0x001000, 0x12345678, true, false }, //FEL from SHIFT off MFSI-2
             { PROC2, 0x001028, 0x120EA049, false, false }, //CHIPID from FSI2PIB off MFSI-2
diff --git a/src/usr/scom/test/scomtest.H b/src/usr/scom/test/scomtest.H
index c9069acf7..2dc45251e 100644
--- a/src/usr/scom/test/scomtest.H
+++ b/src/usr/scom/test/scomtest.H
@@ -58,44 +58,66 @@ public:
       uint64_t total = 0;
       errlHndl_t l_err = NULL;
 
-      TARGETING::Target* scom_target = NULL;
+      // Setup some targets to use
+      enum {
+          PROCWRAP,
+          PROC1,
+          NUM_TARGETS
+      };
+      TARGETING::Target* scom_targets[NUM_TARGETS];
+      for( uint64_t x = 0; x < NUM_TARGETS; x++ )
+      {
+          scom_targets[x] = NULL;
+      }
 
-      // Target Proc 1 - the FSI wrap-back connection in simics
+      // Target Proc 9 - the FSI wrap-back connection in simics
       TARGETING::EntityPath epath(TARGETING::EntityPath::PATH_PHYSICAL);
       epath.addLast(TARGETING::TYPE_SYS,0);
       epath.addLast(TARGETING::TYPE_NODE,0);
       epath.addLast(TARGETING::TYPE_PROC,9);
-      scom_target = TARGETING::targetService().toTarget(epath);
+      scom_targets[PROCWRAP] = TARGETING::targetService().toTarget(epath);
 
-      //only run if the target exists and has FSI enabled.
-      if(scom_target == NULL)
-      {
-          TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_proc> FSI Target not found, exiting test" );
-          return;
-      }
-      else if((TARGETING::MASTER_PROCESSOR_CHIP_TARGET_SENTINEL == scom_target) ||
-              (scom_target->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useXscom))
-      {
-          TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_proc> Target is the MASTER Sentinal or is set to use Xscom, exiting test" );
-          return;
-      }
-      else if(0 == scom_target->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useFsiScom)
+      // other processor target (physical:sys-0/node-0/proc-1)
+      epath.removeLast();
+      epath.addLast(TARGETING::TYPE_PROC,1);
+      scom_targets[PROC1] = TARGETING::targetService().toTarget(epath);
+
+      for( uint64_t x = 0; x < NUM_TARGETS; x++ )
       {
-          TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_proc> useFsiScom set to zero, exiting test" );
-          return;
+          //only run if the target exists
+          if(scom_targets[x] == NULL)
+          {
+              continue;
+          }
+          // skip the sentinel or if it Xscom is enabled
+          else if((TARGETING::MASTER_PROCESSOR_CHIP_TARGET_SENTINEL == scom_targets[x]) ||
+                  (scom_targets[x]->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useXscom))
+          {
+              TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_proc> Target is the MASTER Sentinal or is set to use Xscom, exiting test" );
+              scom_targets[x] = NULL; //remove from our list
+          }
+          // skip if fsi scom is not enabled
+          else if(0 == scom_targets[x]->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useFsiScom)
+          {
+              TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_proc> useFsiScom set to zero, exiting test" );
+              scom_targets[x] = NULL; //remove from our list
+          }
       }
 
       // scratch data to use
       //@fixme: Need to either fabricate some fake registers to use or save off data before modifying SCOMs to avoid
       //   corrupting the HW.
       struct {
+          TARGETING::Target* target;
           uint64_t addr;
           uint64_t data;
       } test_data[] = {
-          { 0x120F0000 ,0xFEEDB0B000001234}, 
-          { 0x120F0166, 0xFEDCBA9876543210}, 
-          { 0x00040005, 0x0000000000000000}, 
-          { 0x02040004, 0xFFFFFFFFFFFFFFFF}, 
+          { scom_targets[PROCWRAP], 0x120F0000 ,0xFEEDB0B000001234}, 
+          { scom_targets[PROCWRAP], 0x120F0166, 0xFEDCBA9876543210}, 
+          { scom_targets[PROCWRAP], 0x00040005, 0x0000000000000000}, 
+          { scom_targets[PROCWRAP], 0x02040004, 0xFFFFFFFFFFFFFFFF}, 
+          { scom_targets[PROC1],    0x00040005, 0x1234567887654321}, 
+          { scom_targets[PROC1],    0x02040004, 0x1122334455667788}, 
       };
       const uint64_t NUM_ADDRS = sizeof(test_data)/sizeof(test_data[0]);
 
@@ -106,16 +128,22 @@ public:
       // write all the test registers
       for( uint64_t x = 0; x < NUM_ADDRS; x++ )   
       {
+          //only run if the target exists
+          if(test_data[x].target == NULL)
+          {
+              continue;
+          }
+
           op_size = sizeof(uint64_t);
 
           total++;
-          l_err = deviceWrite( scom_target,
+          l_err = deviceWrite( test_data[x].target,
                                &(test_data[x].data),
                                op_size,
                                DEVICE_SCOM_ADDRESS(test_data[x].addr) );
           if( l_err )
           {
-              TRACFCOMP(g_trac_scom, "ScomTest::test_FSISCOMreadWrite_proc> Write: Error from device : addr=0x%X, RC=%X", test_data[x].addr, l_err->reasonCode() );
+              TRACFCOMP(g_trac_scom, "ScomTest::test_FSISCOMreadWrite_proc> [%d] Write: Error from device : addr=0x%X, RC=%X", x,  test_data[x].addr, l_err->reasonCode() );
               TS_FAIL( "ScomTest::test_FSISCOMreadWrite_proc> ERROR : Unexpected error log from write1" );
               fails++;
               errlCommit(l_err,SCOM_COMP_ID);
@@ -126,16 +154,22 @@ public:
       // read all the test registers
       for( uint64_t x = 0; x < NUM_ADDRS; x++ )   
       {
+          //only run if the target exists
+          if(test_data[x].target == NULL)
+          {
+              continue;
+          }
+
           op_size = sizeof(uint64_t);
 
           total++;
-          l_err = deviceRead( scom_target,
+          l_err = deviceRead( test_data[x].target,
                               &(read_data[x]),
                               op_size,
                               DEVICE_SCOM_ADDRESS(test_data[x].addr) );
           if( l_err )
           {
-              TRACFCOMP(g_trac_scom, "ScomTest::test_FSISCOMreadWrite_proc> read: Error from device : addr=0x%X, RC=%X", test_data[x].addr, l_err->reasonCode() );
+              TRACFCOMP(g_trac_scom, "ScomTest::test_FSISCOMreadWrite_proc> [%d] Read: Error from device : addr=0x%X, RC=%X", x,  test_data[x].addr, l_err->reasonCode() );
               TS_FAIL( "ScomTest::test_FSISCOMreadWrite_proc> ERROR : Unexpected error log from write1" );
               fails++;
               errlCommit(l_err,SCOM_COMP_ID);
@@ -143,7 +177,7 @@ public:
           }
           else if(read_data[x] != test_data[x].data)
           {
-              TRACFCOMP(g_trac_scom, "ScomTest::test_FSISCOMreadWrite_proc> read: Data miss-match : addr=0x%X, read_data=0x%llx, write_data=0x%llx", test_data[x].addr, read_data[x], test_data[x].data);
+              TRACFCOMP(g_trac_scom, "ScomTest::test_FSISCOMreadWrite_proc> [%d] Read: Data miss-match : addr=0x%X, read_data=0x%llx, write_data=0x%llx", x, test_data[x].addr, read_data[x], test_data[x].data);
               TS_FAIL( "ScomTest::test_FSISCOMreadWrite_proc> ERROR : Data miss-match between read and expected data" );
               fails++;
           }
@@ -164,46 +198,64 @@ public:
       uint64_t total = 0;
       errlHndl_t l_err = NULL;
 
-      TARGETING::Target* scom_target = NULL;
+      // Setup some targets to use
+      enum {
+          CENTAUR0, //local 
+          CENTAUR8, //remote (off PROC1)
+          NUM_TARGETS
+      };
+      TARGETING::Target* scom_targets[NUM_TARGETS];
+      for( uint64_t x = 0; x < NUM_TARGETS; x++ )
+      {
+          scom_targets[x] = NULL;
+      }
 
       // Target Centaur0 - the local centaur
       TARGETING::EntityPath epath(TARGETING::EntityPath::PATH_PHYSICAL);
       epath.addLast(TARGETING::TYPE_SYS,0);
       epath.addLast(TARGETING::TYPE_NODE,0);
       epath.addLast(TARGETING::TYPE_MEMBUF,0);
-      scom_target = TARGETING::targetService().toTarget(epath);
+      scom_targets[CENTAUR0] = TARGETING::targetService().toTarget(epath);
 
-      //only run if the target exists and has FSI enabled.
-      if(scom_target == NULL)
-      {
-          TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_centaur> FSI Target not found, exiting test" );
-          return;
-      }
-      else if((TARGETING::MASTER_PROCESSOR_CHIP_TARGET_SENTINEL == scom_target) ||
-              (scom_target->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useXscom) ||
-              (scom_target->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useInbandScom))
-      {
-          TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_centaur> Target is the MASTER Sentinal or is set to use Xscom or Inband Scom, exiting test" );
-          return;
-      }
-      else if(0 == scom_target->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useFsiScom)
+      // remote centaur target (off of sys-0/node-0/proc-1)
+      epath.removeLast();
+      epath.addLast(TARGETING::TYPE_MEMBUF,8);
+      scom_targets[CENTAUR8] = TARGETING::targetService().toTarget(epath);
+
+      for( uint64_t x = 0; x < NUM_TARGETS; x++ )
       {
-          TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_centaur> useFsiScom set to zero, exiting test" );
-          return;
+          //only run if the target exists and has FSI enabled.
+          if(scom_targets[x] == NULL)
+          {
+              continue;
+          }
+          else if((TARGETING::MASTER_PROCESSOR_CHIP_TARGET_SENTINEL == scom_targets[x]) ||
+                  (scom_targets[x]->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useXscom) ||
+                  (scom_targets[x]->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useInbandScom))
+          {
+              TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_centaur> Target is the MASTER Sentinal or is set to use Xscom or Inband Scom, exiting test" );
+              scom_targets[x] = NULL; //remove from our list
+          }
+          else if(0 == scom_targets[x]->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useFsiScom)
+          {
+              TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_centaur> useFsiScom set to zero, exiting test" );
+              scom_targets[x] = NULL; //remove from our list
+          }
       }
 
       // scratch data to use
       //@fixme: Need to either fabricate some fake registers to use or save off data before modifying SCOMs to avoid
       //   corrupting the HW.
       struct {
+          TARGETING::Target* target;
           uint64_t addr;
           uint64_t data;
       } test_data[] = {
-          { 0x00012345 , 0x1111222233334444 }, 
-          //@fixme - should be 0x02011403 but simics is adding parity...
-          { 0x02011402 , 0x123456789ABCDEF0 }, 
-          { 0x02011672 , 0x1122334455667788 },
-
+          { scom_targets[CENTAUR0], 0x00012345 , 0x1111222233334444 }, 
+          //@fixme - address should be 0x02011403 but simics is adding parity...
+          { scom_targets[CENTAUR0], 0x02011402 , 0x123456789ABCDEF0 }, 
+          { scom_targets[CENTAUR0], 0x02011672 , 0x1122334455667788 },
+          { scom_targets[CENTAUR8], 0x02011672 , 0x9E9E9E9E9E9E9E9E },
       };
       const uint64_t NUM_ADDRS = sizeof(test_data)/sizeof(test_data[0]);
 
@@ -214,16 +266,22 @@ public:
       // write all the test registers
       for( uint64_t x = 0; x < NUM_ADDRS; x++ )   
       {
+          //only run if the target exists
+          if(test_data[x].target == NULL)
+          {
+              continue;
+          }
+
           op_size = sizeof(uint64_t);
 
           total++;
-          l_err = deviceWrite( scom_target,
+          l_err = deviceWrite( test_data[x].target,
                                &(test_data[x].data),
                                op_size,
                                DEVICE_SCOM_ADDRESS(test_data[x].addr) );
           if( l_err )
           {
-              TRACFCOMP(g_trac_scom, "ScomTest::test_FSISCOMreadWrite_centaur> Write: Error from device : addr=0x%X, RC=%X", test_data[x].addr, l_err->reasonCode() );
+              TRACFCOMP(g_trac_scom, "ScomTest::test_FSISCOMreadWrite_centaur> [%d] Write: Error from device : addr=0x%X, RC=%X", x,  test_data[x].addr, l_err->reasonCode() );
               TS_FAIL( "ScomTest::test_FSISCOMreadWrite_centaur> ERROR : Unexpected error log from write1" );
               fails++;
               errlCommit(l_err,SCOM_COMP_ID);
@@ -234,16 +292,22 @@ public:
       // read all the test registers
       for( uint64_t x = 0; x < NUM_ADDRS; x++ )   
       {
+          //only run if the target exists
+          if(test_data[x].target == NULL)
+          {
+              continue;
+          }
+
           op_size = sizeof(uint64_t);
 
           total++;
-          l_err = deviceRead( scom_target,
+          l_err = deviceRead( test_data[x].target,
                               &(read_data[x]),
                               op_size,
                               DEVICE_SCOM_ADDRESS(test_data[x].addr) );
           if( l_err )
           {
-              TRACFCOMP(g_trac_scom, "ScomTest::test_FSISCOMreadWrite_centaur> read: Error from device : addr=0x%X, RC=%X", test_data[x].addr, l_err->reasonCode() );
+              TRACFCOMP(g_trac_scom, "ScomTest::test_FSISCOMreadWrite_centaur> [%d] Read: Error from device : addr=0x%X, RC=%X", x,  test_data[x].addr, l_err->reasonCode() );
               TS_FAIL( "ScomTest::test_FSISCOMreadWrite_centaur> ERROR : Unexpected error log from write1" );
               fails++;
               errlCommit(l_err,SCOM_COMP_ID);
@@ -251,7 +315,7 @@ public:
           }
           else if(read_data[x] != test_data[x].data)
           {
-              TRACFCOMP(g_trac_scom, "ScomTest::test_FSISCOMreadWrite_centaur> read: Data miss-match : addr=0x%X, read_data=0x%llx, write_data=0x%llx", test_data[x].addr, read_data[x], test_data[x].data);
+              TRACFCOMP(g_trac_scom, "ScomTest::test_FSISCOMreadWrite_centaur> [%d] Read: Data miss-match : addr=0x%X, read_data=0x%llx, write_data=0x%llx", x, test_data[x].addr, read_data[x], test_data[x].data);
               TS_FAIL( "ScomTest::test_FSISCOMreadWrite_centaur> ERROR : Data miss-match between read and expected data" );
               fails++;
           }
@@ -264,7 +328,11 @@ public:
 
   //@todo - write tests to verify connection between XSCOM and FSISCOM
 
-  //@todo - write error path testcase for FSI scom using bad address 
+  //@todo - write error path testcase for FSI scom using bad address
+
+  //@todo - indirect scom
+
+  //@todo - address translation
 
 };