Update MR and MT VPD. Add support for Impedance CNTL.

  Updated fake vpd

Change-Id: Ibdc07d3cbf517d8bd3f5192218205e3680f7eeb6
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27889
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27940
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>

2 files changed, 101 insertions, 28 deletions

diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
index 1306780d6..9ec39690c 100644
--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
+++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
@@ -27379,7 +27379,7 @@ DEPRECATED!!!!
 
 
 <attribute>
-    <id>MSS_VPD_MR_MC_PHASE_ROT_D0_CLK0</id>
+    <id>MSS_VPD_MR_MC_PHASE_ROT_D0_CLKP</id>
     <description>Phase rotator delay value of Clock for Dimm#_CLK# in ticks. Ticks are 1/128 of one cycle of clock.</description>
     <simpleType>
       <uint8_t></uint8_t>
@@ -27389,7 +27389,7 @@ DEPRECATED!!!!
     <writeable/>
     <readable/>
     <hwpfToHbAttrMap>
-      <id>ATTR_MSS_VPD_MR_MC_PHASE_ROT_D0_CLK0</id>
+      <id>ATTR_MSS_VPD_MR_MC_PHASE_ROT_D0_CLKP</id>
       <macro>DIRECT</macro>
     </hwpfToHbAttrMap>
 </attribute>
@@ -27411,7 +27411,7 @@ DEPRECATED!!!!
 </attribute>
 
 <attribute>
-    <id>MSS_VPD_MR_MC_PHASE_ROT_D0_CLK1</id>
+    <id>MSS_VPD_MR_MC_PHASE_ROT_D0_CLKN</id>
     <description>Phase rotator delay value of Clock for Dimm#_CLK# in ticks. Ticks are 1/128 of one cycle of clock.</description>
     <simpleType>
       <uint8_t></uint8_t>
@@ -27421,7 +27421,7 @@ DEPRECATED!!!!
     <writeable/>
     <readable/>
     <hwpfToHbAttrMap>
-      <id>ATTR_MSS_VPD_MR_MC_PHASE_ROT_D0_CLK1</id>
+      <id>ATTR_MSS_VPD_MR_MC_PHASE_ROT_D0_CLKN</id>
       <macro>DIRECT</macro>
     </hwpfToHbAttrMap>
 </attribute>
@@ -27443,7 +27443,7 @@ DEPRECATED!!!!
 </attribute>
 
 <attribute>
-    <id>MSS_VPD_MR_MC_PHASE_ROT_D1_CLK0</id>
+    <id>MSS_VPD_MR_MC_PHASE_ROT_D1_CLKP</id>
     <description>Phase rotator delay value of Clock for Dimm#_CLK# in ticks. Ticks are 1/128 of one cycle of clock.</description>
     <simpleType>
       <uint8_t></uint8_t>
@@ -27453,7 +27453,7 @@ DEPRECATED!!!!
     <writeable/>
     <readable/>
     <hwpfToHbAttrMap>
-      <id>ATTR_MSS_VPD_MR_MC_PHASE_ROT_D1_CLK0</id>
+      <id>ATTR_MSS_VPD_MR_MC_PHASE_ROT_D1_CLKP</id>
       <macro>DIRECT</macro>
     </hwpfToHbAttrMap>
 </attribute>
@@ -27476,7 +27476,7 @@ DEPRECATED!!!!
 
 
 <attribute>
-    <id>MSS_VPD_MR_MC_PHASE_ROT_D1_CLK1</id>
+    <id>MSS_VPD_MR_MC_PHASE_ROT_D1_CLKN</id>
     <description>Phase rotator delay value of Clock for Dimm#_CLK# in ticks. Ticks are 1/128 of one cycle of clock.</description>
     <simpleType>
       <uint8_t></uint8_t>
@@ -27486,7 +27486,7 @@ DEPRECATED!!!!
     <writeable/>
     <readable/>
     <hwpfToHbAttrMap>
-      <id>ATTR_MSS_VPD_MR_MC_PHASE_ROT_D1_CLK1</id>
+      <id>ATTR_MSS_VPD_MR_MC_PHASE_ROT_D1_CLKN</id>
       <macro>DIRECT</macro>
     </hwpfToHbAttrMap>
 </attribute>
@@ -27606,8 +27606,8 @@ DEPRECATED!!!!
 </attribute>
 
 <attribute>
-    <id>MSS_VPD_MT_DIMM_RCD_IBT</id>
-    <description>Place holder description</description>
+    <id>MSS_VPD_MT_DIMM_RCD_IBT_CA</id>
+    <description>Register Clock Driver, Input Bus Termination for Command/Address in tens of Ohms</description>
     <simpleType>
       <uint8_t></uint8_t>
       <array>2,2</array>
@@ -27616,7 +27616,55 @@ DEPRECATED!!!!
     <writeable/>
     <readable/>
     <hwpfToHbAttrMap>
-      <id>ATTR_MSS_VPD_MT_DIMM_RCD_IBT</id>
+      <id>ATTR_MSS_VPD_MT_DIMM_RCD_IBT_CA</id>
+      <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_VPD_MT_DIMM_RCD_IBT_CKE</id>
+    <description>Register Clock Driver, Input Bus Termination for Clock Enable in tens of Ohms.</description>
+    <simpleType>
+      <uint8_t></uint8_t>
+      <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <writeable/>
+    <readable/>
+    <hwpfToHbAttrMap>
+      <id>ATTR_MSS_VPD_MT_DIMM_RCD_IBT_CKE</id>
+      <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_VPD_MT_DIMM_RCD_IBT_CS</id>
+    <description>Register Clock Driver, Input Bus Termination for Chip Select in tens of Ohms.</description>
+    <simpleType>
+      <uint8_t></uint8_t>
+      <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <writeable/>
+    <readable/>
+    <hwpfToHbAttrMap>
+      <id>ATTR_MSS_VPD_MT_DIMM_RCD_IBT_CS</id>
+      <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_VPD_MT_DIMM_RCD_IBT_ODT</id>
+    <description>Register Clock Driver, Input Bus Termination for Clock Enable in tens of Ohms.</description>
+    <simpleType>
+      <uint8_t></uint8_t>
+      <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <writeable/>
+    <readable/>
+    <hwpfToHbAttrMap>
+      <id>ATTR_MSS_VPD_MT_DIMM_RCD_IBT_ODT</id>
       <macro>DIRECT</macro>
     </hwpfToHbAttrMap>
 </attribute>
@@ -27703,7 +27751,7 @@ DEPRECATED!!!!
 </attribute>
 
 <attribute>
-    <id>MSS_VPD_MT_MC_DRV_IMP_ADDR</id>
+    <id>MSS_VPD_MT_MC_DRV_IMP_CLK</id>
     <description>Place holder description</description>
     <simpleType>
       <uint8_t></uint8_t>
@@ -27713,13 +27761,13 @@ DEPRECATED!!!!
     <writeable/>
     <readable/>
     <hwpfToHbAttrMap>
-      <id>ATTR_MSS_VPD_MT_MC_DRV_IMP_ADDR</id>
+      <id>ATTR_MSS_VPD_MT_MC_DRV_IMP_CLK</id>
       <macro>DIRECT</macro>
     </hwpfToHbAttrMap>
 </attribute>
 
 <attribute>
-    <id>MSS_VPD_MT_MC_DRV_IMP_CLK</id>
+    <id>MSS_VPD_MT_MC_DRV_IMP_CMD_ADDR</id>
     <description>Place holder description</description>
     <simpleType>
       <uint8_t></uint8_t>
@@ -27729,14 +27777,15 @@ DEPRECATED!!!!
     <writeable/>
     <readable/>
     <hwpfToHbAttrMap>
-      <id>ATTR_MSS_VPD_MT_MC_DRV_IMP_CLK</id>
+      <id>ATTR_MSS_VPD_MT_MC_DRV_IMP_CMD_ADDR</id>
       <macro>DIRECT</macro>
     </hwpfToHbAttrMap>
 </attribute>
 
 <attribute>
     <id>MSS_VPD_MT_MC_DRV_IMP_CNTL</id>
-    <description>Place holder description</description>
+    <description>Memory Controller side Drive Impedance for Clock Enable,
+    ODT, Parity, and Reset Lines in Ohms.</description>
     <simpleType>
       <uint8_t></uint8_t>
       <array>2</array>
@@ -27751,8 +27800,10 @@ DEPRECATED!!!!
 </attribute>
 
 <attribute>
-    <id>MSS_VPD_MT_MC_DRV_IMP_DQ_DQS</id>
-    <description>Place holder description</description>
+    <id>MSS_VPD_MT_MC_DRV_IMP_CSCID</id>
+    <description>
+    Memory Controller side Drive Impedance for Chip Select and Chip ID Lines in Ohms.
+    </description>
     <simpleType>
       <uint8_t></uint8_t>
       <array>2</array>
@@ -27761,13 +27812,13 @@ DEPRECATED!!!!
     <writeable/>
     <readable/>
     <hwpfToHbAttrMap>
-      <id>ATTR_MSS_VPD_MT_MC_DRV_IMP_DQ_DQS</id>
+      <id>ATTR_MSS_VPD_MT_MC_DRV_IMP_CSCID</id>
       <macro>DIRECT</macro>
     </hwpfToHbAttrMap>
 </attribute>
 
 <attribute>
-    <id>MSS_VPD_MT_MC_DRV_IMP_SPCKE</id>
+    <id>MSS_VPD_MT_MC_DRV_IMP_DQ_DQS</id>
     <description>Place holder description</description>
     <simpleType>
       <uint8_t></uint8_t>
@@ -27777,7 +27828,7 @@ DEPRECATED!!!!
     <writeable/>
     <readable/>
     <hwpfToHbAttrMap>
-      <id>ATTR_MSS_VPD_MT_MC_DRV_IMP_SPCKE</id>
+      <id>ATTR_MSS_VPD_MT_MC_DRV_IMP_DQ_DQS</id>
       <macro>DIRECT</macro>
     </hwpfToHbAttrMap>
 </attribute>
@@ -27799,6 +27850,24 @@ DEPRECATED!!!!
 </attribute>
 
 <attribute>
+    <id>MSS_VPD_MT_PREAMBLE</id>
+    <description>Number of clocks used for preamble.
+    Calibration only uses 1 nCK preamble (DEFAULT).
+    Mainline has both 1 nCK and 2 nCK preamble option.</description>
+    <simpleType>
+      <uint8_t></uint8_t>
+      <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <writeable/>
+    <readable/>
+    <hwpfToHbAttrMap>
+      <id>ATTR_MSS_VPD_MT_PREAMBLE</id>
+      <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
     <id>MSS_VPD_MT_MC_SLEW_RATE_ADDR</id>
     <description>Place holder description</description>
     <simpleType>
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml
index 4a97a5bf0..ce12a639f 100755
--- a/src/usr/targeting/common/xmltohb/target_types.xml
+++ b/src/usr/targeting/common/xmltohb/target_types.xml
@@ -1497,10 +1497,10 @@
     <attribute><id>MSS_VPD_MR_MC_PHASE_ROT_ADDR_C0</id></attribute>
     <attribute><id>MSS_VPD_MR_MC_PHASE_ROT_ADDR_C1</id></attribute>
     <attribute><id>MSS_VPD_MR_MC_PHASE_ROT_ADDR_C2</id></attribute>
-    <attribute><id>MSS_VPD_MR_MC_PHASE_ROT_D0_CLK0</id></attribute>
-    <attribute><id>MSS_VPD_MR_MC_PHASE_ROT_D0_CLK1</id></attribute>
-    <attribute><id>MSS_VPD_MR_MC_PHASE_ROT_D1_CLK0</id></attribute>
-    <attribute><id>MSS_VPD_MR_MC_PHASE_ROT_D1_CLK1</id></attribute>
+    <attribute><id>MSS_VPD_MR_MC_PHASE_ROT_D0_CLKP</id></attribute>
+    <attribute><id>MSS_VPD_MR_MC_PHASE_ROT_D0_CLKN</id></attribute>
+    <attribute><id>MSS_VPD_MR_MC_PHASE_ROT_D1_CLKP</id></attribute>
+    <attribute><id>MSS_VPD_MR_MC_PHASE_ROT_D1_CLKN</id></attribute>
     <attribute><id>MSS_VPD_MR_MC_PHASE_ROT_CLK_D0_P0</id></attribute>
     <attribute><id>MSS_VPD_MR_MC_PHASE_ROT_CMD_ADDR_CASN_A15</id></attribute>
     <attribute><id>MSS_VPD_MR_MC_PHASE_ROT_CMD_ADDR_RASN_A16</id></attribute>
@@ -1572,17 +1572,21 @@
     <attribute><id>VPD_MR_TSYS_DATA</id></attribute>
     <attribute><id>MSS_VPD_MT_CKE_PRI_MAP</id></attribute>
     <attribute><id>MSS_VPD_MT_CKE_PWR_MAP</id></attribute>
-    <attribute><id>MSS_VPD_MT_DIMM_RCD_IBT</id></attribute>
+    <attribute><id>MSS_VPD_MT_DIMM_RCD_IBT_CA</id></attribute>
+    <attribute><id>MSS_VPD_MT_DIMM_RCD_IBT_CKE</id></attribute>
+    <attribute><id>MSS_VPD_MT_DIMM_RCD_IBT_CS</id></attribute>
+    <attribute><id>MSS_VPD_MT_DIMM_RCD_IBT_ODT</id></attribute>
+    <attribute><id>MSS_VPD_MT_PREAMBLE</id></attribute>
+    <attribute><id>MSS_VPD_MT_MC_DRV_IMP_CSCID</id></attribute>
+    <attribute><id>MSS_VPD_MT_MC_DRV_IMP_CMD_ADDR</id></attribute>
     <attribute><id>MSS_VPD_MT_DIMM_RCD_OUTPUT_TIMING</id></attribute>
     <attribute><id>MSS_VPD_MT_DRAM_DRV_IMP_DQ_DQS</id></attribute>
     <attribute><id>MSS_VPD_MT_DRAM_RTT_NOM</id></attribute>
     <attribute><id>MSS_VPD_MT_DRAM_RTT_PARK</id></attribute>
     <attribute><id>MSS_VPD_MT_DRAM_RTT_WR</id></attribute>
-    <attribute><id>MSS_VPD_MT_MC_DRV_IMP_ADDR</id></attribute>
     <attribute><id>MSS_VPD_MT_MC_DRV_IMP_CLK</id></attribute>
     <attribute><id>MSS_VPD_MT_MC_DRV_IMP_CNTL</id></attribute>
     <attribute><id>MSS_VPD_MT_MC_DRV_IMP_DQ_DQS</id></attribute>
-    <attribute><id>MSS_VPD_MT_MC_DRV_IMP_SPCKE</id></attribute>
     <attribute><id>MSS_VPD_MT_MC_RCV_IMP_DQ_DQS</id></attribute>
     <attribute><id>MSS_VPD_MT_MC_SLEW_RATE_ADDR</id></attribute>
     <attribute><id>MSS_VPD_MT_MC_SLEW_RATE_CLK</id></attribute>