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author | Nick Bofferding <bofferdn@us.ibm.com> | 2018-05-31 01:04:19 -0500 |
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committer | William G. Hoffa <wghoffa@us.ibm.com> | 2018-06-04 15:58:42 -0400 |
commit | b81a9c8640e667af65e830fc35ce23db323f916a (patch) | |
tree | 9574d87cc50c08d7fc199e3153bb6cd3ae3d1a38 /src/usr | |
parent | f9aa8f06bbd8250f63725080e189ce4719fd1253 (diff) | |
download | talos-hostboot-b81a9c8640e667af65e830fc35ce23db323f916a.tar.gz talos-hostboot-b81a9c8640e667af65e830fc35ce23db323f916a.zip |
Secure Boot: Defer init of Centaur SCOM cache register definitions
Defer init of Centaur SCOM cache register definitions until after istep 10.2
Change-Id: Ifdf94d00d65b0dffe841a32698f1aec5a97f3fe6
RTC: 187288
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59615
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/usr')
-rw-r--r-- | src/usr/scom/centaurScomCache.C | 53 |
1 files changed, 29 insertions, 24 deletions
diff --git a/src/usr/scom/centaurScomCache.C b/src/usr/scom/centaurScomCache.C index 99ccc73fd..17199b549 100644 --- a/src/usr/scom/centaurScomCache.C +++ b/src/usr/scom/centaurScomCache.C @@ -56,34 +56,14 @@ const bool ADD_HI_PRI_HB_SW_CALLOUT=true; const bool NO_HB_SW_CALLOUT=false; ScomCache::ScomCache() - : iv_pScomRegDefs(_initScomRegDefs()), + : iv_pScomRegDefs(nullptr), iv_cacheEnabled(false) { - // Sort SCOM register defintion records by register address so that we - // can look up a given register using std::lower_bound in O(log n) - // algorithmic complexity and then jump to same index within local - // Centaur SCOM cache to find the current value, yielding overall - // algorithmic complexity of O(log n) for lookup of any given Centaur's - // cached SCOM register - std::sort( - iv_pScomRegDefs->begin(), - iv_pScomRegDefs->end(), - [](const ScomRegDef& i_lhs,const ScomRegDef &i_rhs) - { - return (i_lhs.addr<i_rhs.addr); - }); - - _enforceScomRegDefUniqueness(); - - _validateScomRegDefs(); - - _optimizeScomRegDefs(); } ScomCache::~ScomCache() { - delete iv_pScomRegDefs; - iv_pScomRegDefs=nullptr; + destroy(); } void ScomCache::_enforceScomRegDefUniqueness() const @@ -196,10 +176,32 @@ void ScomCache::_optimizeScomRegDefs() } } -void ScomCache::init() const +void ScomCache::init() { destroy(); + iv_pScomRegDefs = _initScomRegDefs(); + + // Sort SCOM register defintion records by register address so that we + // can look up a given register using std::lower_bound in O(log n) + // algorithmic complexity and then jump to same index within local + // Centaur SCOM cache to find the current value, yielding overall + // algorithmic complexity of O(log n) for lookup of any given Centaur's + // cached SCOM register + std::sort( + iv_pScomRegDefs->begin(), + iv_pScomRegDefs->end(), + [](const ScomRegDef& i_lhs,const ScomRegDef &i_rhs) + { + return (i_lhs.addr<i_rhs.addr); + }); + + _enforceScomRegDefUniqueness(); + + _validateScomRegDefs(); + + _optimizeScomRegDefs(); + std::vector<uint64_t> registerCache(iv_pScomRegDefs->size(),0); auto registerCacheItr = registerCache.begin(); for (const auto& scomRegDef : *iv_pScomRegDefs) @@ -235,7 +237,7 @@ void ScomCache::init() const } } -void ScomCache::destroy() const +void ScomCache::destroy() { // Grab all blueprint Centaurs in case a Centaur got deconfigured after // Hostboot configured its cache @@ -258,6 +260,9 @@ void ScomCache::destroy() const _setCachePtr(pCentaur,pCache); } } + + delete iv_pScomRegDefs; + iv_pScomRegDefs=nullptr; } errlHndl_t ScomCache::write( |