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| author | Marty Gloff <mgloff@us.ibm.com> | 2017-09-26 14:04:12 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-09-29 14:17:14 -0400 |
| commit | b0d5f27a21da630c3eb9072692e7b72cff134d2e (patch) | |
| tree | 40467b3eec0b23d49a75edea345d3d173cffef2b /src/usr | |
| parent | 607bbc3b741cdea27d60e6390bee112609bfd227 (diff) | |
| download | talos-hostboot-b0d5f27a21da630c3eb9072692e7b72cff134d2e.tar.gz talos-hostboot-b0d5f27a21da630c3eb9072692e7b72cff134d2e.zip | |
Traces from bringup memory remapping for no memory behind master proc
During debug of problems with OP / BMC systems, a trace bug was found and
some debug traces were used. This commit captures select trace changes.
Change-Id: I9398c0b0ccd44414e6fc360cfc68db581729db6a
RTC: 149250
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46769
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr')
| -rw-r--r-- | src/usr/isteps/istep07/call_mss_attr_update.C | 39 | ||||
| -rwxr-xr-x | src/usr/targeting/targetservicestart.C | 3 |
2 files changed, 41 insertions, 1 deletions
diff --git a/src/usr/isteps/istep07/call_mss_attr_update.C b/src/usr/isteps/istep07/call_mss_attr_update.C index 4f625ae13..d548fff84 100644 --- a/src/usr/isteps/istep07/call_mss_attr_update.C +++ b/src/usr/isteps/istep07/call_mss_attr_update.C @@ -159,6 +159,19 @@ errlHndl_t check_proc0_memory_config(IStepError & io_istepErr) l_proc0 = i; } + TRACDCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "check_proc0_memory_config: Initial settings for " + "Proc %.8X\n" + " groupIdDflt = %d, groupIdEff = %d, groupId = %d\n" + " chipIdDflt = %d, chipIdEff = %d, chipId = %d", + get_huid(l_procIds[i].proc), + l_procIds[i].groupIdDflt, + l_procIds[i].groupIdEff, + l_procIds[i].groupId, + l_procIds[i].chipIdDflt, + l_procIds[i].chipIdEff, + l_procIds[i].chipId); + // Increment index i++; } @@ -300,6 +313,17 @@ errlHndl_t check_proc0_memory_config(IStepError & io_istepErr) // Loop through all procs detecting that IDs are set correctly for (i = 0; i < l_procsList.size(); i++) { + TRACDCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "check_proc0_memory_config: Compare settings for " + "Proc %.8X\n" + " groupIdEff = %d, groupId = %d\n" + " chipIdEff = %d, chipId = %d", + get_huid(l_procIds[i].proc), + l_procIds[i].groupIdEff, + l_procIds[i].groupId, + l_procIds[i].chipIdEff, + l_procIds[i].chipId); + if((l_procIds[i].groupId != l_procIds[i].groupIdEff) || (l_procIds[i].chipId != l_procIds[i].chipIdEff) ) { @@ -311,6 +335,21 @@ errlHndl_t check_proc0_memory_config(IStepError & io_istepErr) l_updateNeeded = true; } + + TRACDCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "check_proc0_memory_config: Current attribute " + "settings for Proc %.8X\n" + " ATTR_PROC_EFF_FABRIC_GROUP_ID = %d\n" + " ATTR_FABRIC_GROUP_ID = %d\n" + " ATTR_PROC_EFF_FABRIC_CHIP_ID = %d\n" + " ATTR_FABRIC_CHIP_ID = %d", + get_huid(l_procIds[i].proc), + (l_procIds[i].proc)-> + getAttr<ATTR_PROC_EFF_FABRIC_GROUP_ID>(), + (l_procIds[i].proc)->getAttr<ATTR_FABRIC_GROUP_ID>(), + (l_procIds[i].proc)-> + getAttr<ATTR_PROC_EFF_FABRIC_CHIP_ID>(), + (l_procIds[i].proc)->getAttr<ATTR_FABRIC_CHIP_ID>()); } if(l_updateNeeded) diff --git a/src/usr/targeting/targetservicestart.C b/src/usr/targeting/targetservicestart.C index 4ced5dd2d..4c06c6f52 100755 --- a/src/usr/targeting/targetservicestart.C +++ b/src/usr/targeting/targetservicestart.C @@ -452,7 +452,8 @@ static void adjustMemoryMap( TargetService& i_targetService ) // Grab the value of the BARs that SBE booted with uint64_t l_curXscomBAR = g_BlToHbDataManager.getXscomBAR(); uint64_t l_curLpcBAR = g_BlToHbDataManager.getLpcBAR(); - TARG_INF( "adjustMemoryMap> xscom=%X, lpc=%X", l_curXscomBAR, l_curLpcBAR ); + TARG_INF( "adjustMemoryMap> xscom=%llX, lpc=%llX", + l_curXscomBAR, l_curLpcBAR ); // Get the master proc Target* l_pMasterProcChip = nullptr; |
