PRD: permanently mask NCEs/TCEs after runtime Targeted Diagnostics

Change-Id: I1ad9aae847cab22cee63ec4f78b5819354206bf3
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44931
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com>
Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45002
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>

4 files changed, 188 insertions, 184 deletions

diff --git a/src/usr/diag/prdf/common/plat/mem/prdfP9McaDataBundle.H b/src/usr/diag/prdf/common/plat/mem/prdfP9McaDataBundle.H
index 11153b417..117947fe2 100644
--- a/src/usr/diag/prdf/common/plat/mem/prdfP9McaDataBundle.H
+++ b/src/usr/diag/prdf/common/plat/mem/prdfP9McaDataBundle.H
@@ -191,6 +191,15 @@ class McaDataBundle : public DataBundle
     std::map<uint8_t, TimeBasedThreshold> iv_iueTh;
 
     #endif
+
+    #ifdef __HOSTBOOT_RUNTIME
+
+    /** Set to true if mainline NCEs and TCEs should be permanently masked. This
+     *  is checked at the end of targeted diagnostics before background
+     *  scrubbing is resumed. */
+    bool iv_maskMainlineNceTce = false;
+
+    #endif
 };
 
 /**
diff --git a/src/usr/diag/prdf/plat/mem/prdfMemTdCtlr.C b/src/usr/diag/prdf/plat/mem/prdfMemTdCtlr.C
index e338c7b4d..4dc2dc7e3 100644
--- a/src/usr/diag/prdf/plat/mem/prdfMemTdCtlr.C
+++ b/src/usr/diag/prdf/plat/mem/prdfMemTdCtlr.C
@@ -377,183 +377,6 @@ uint32_t MemTdCtlr<T>::analyzeCmdComplete( bool & o_errorsFound,
 
 //------------------------------------------------------------------------------
 
-template<>
-uint32_t MemTdCtlr<TYPE_MCBIST>::maskEccAttns()
-{
-    #define PRDF_FUNC "[MemTdCtlr<TYPE_MCBIST>::maskEccAttns] "
-
-    uint32_t o_rc = SUCCESS;
-
-    // Loop through all MCAs.
-    for ( auto mcaChip : getConnected(iv_chip, TYPE_MCA) )
-    {
-        SCAN_COMM_REGISTER_CLASS * mask =
-            mcaChip->getRegister( "MCAECCFIR_MASK_OR" );
-
-        mask->clearAllBits();
-        mask->SetBit(8); // Mainline read NCE
-        mask->SetBit(9); // Mainline read TCE
-
-        o_rc = mask->Write();
-        if ( SUCCESS != o_rc )
-        {
-            PRDF_ERR( PRDF_FUNC "Write() failed on MCAECCFIR_MASK_OR" );
-            break;
-        }
-    }
-
-    return o_rc;
-
-    #undef PRDF_FUNC
-}
-
-//------------------------------------------------------------------------------
-
-template<>
-uint32_t MemTdCtlr<TYPE_MCBIST>::unmaskEccAttns()
-{
-    #define PRDF_FUNC "[MemTdCtlr<TYPE_MCBIST>::unmaskEccAttns] "
-
-    uint32_t o_rc = SUCCESS;
-
-    // Memory CEs were masked at the beginning of the TD procedure, so
-    // clear and unmask them. Also, it is possible that memory UEs have
-    // thresholded so clear and unmask them as well.
-
-    // Loop through all MCAs.
-    for ( auto mcaChip : getConnected(iv_chip, TYPE_MCA) )
-    {
-        SCAN_COMM_REGISTER_CLASS * fir =
-            mcaChip->getRegister( "MCAECCFIR_AND" );
-        SCAN_COMM_REGISTER_CLASS * mask =
-            mcaChip->getRegister( "MCAECCFIR_MASK_AND" );
-
-        fir->setAllBits(); mask->setAllBits();
-
-        // Don't clear the NCE and TCE attentions if specified to save the mask
-        // in the iv_saveEccMask array.
-        if ( !iv_saveEccMask[mcaChip->getPos()%MAX_PORT_PER_MCBIST] )
-        {
-            fir->ClearBit(8);  mask->ClearBit(8);  // Mainline read NCE
-            fir->ClearBit(9);  mask->ClearBit(9);  // Mainline read TCE
-        }
-        fir->ClearBit(14); mask->ClearBit(14); // Mainline read UE
-
-        o_rc = fir->Write();
-        if ( SUCCESS != o_rc )
-        {
-            PRDF_ERR( PRDF_FUNC "Write() failed on MCAECCFIR_AND" );
-            break;
-        }
-
-        o_rc = mask->Write();
-        if ( SUCCESS != o_rc )
-        {
-            PRDF_ERR( PRDF_FUNC "Write() failed on MCAECCFIR_MASK_AND" );
-            break;
-        }
-    }
-
-    return o_rc;
-
-    #undef PRDF_FUNC
-}
-
-//------------------------------------------------------------------------------
-
-template<>
-uint32_t MemTdCtlr<TYPE_MBA>::maskEccAttns()
-{
-    #define PRDF_FUNC "[MemTdCtlr<TYPE_MBA>::maskEccAttns] "
-
-    uint32_t o_rc = SUCCESS;
-
-    // TODO RTC 176901
-    //do
-    //{
-    //    // Don't want to handle memory CEs during any TD procedures, so
-    //    // mask them.
-
-    //    const char * reg_str = (0 == iv_mbaPos) ? "MBA0_MBSECCFIR_MASK_OR"
-    //                                            : "MBA1_MBSECCFIR_MASK_OR";
-    //    SCAN_COMM_REGISTER_CLASS * reg = iv_membChip->getRegister(reg_str);
-
-    //    reg->clearAllBits();
-    //    reg->SetBit(16); // fetch NCE
-    //    reg->SetBit(17); // fetch RCE
-    //    reg->SetBit(43); // prefetch UE
-
-    //    o_rc = reg->Write();
-    //    if ( SUCCESS != o_rc )
-    //    {
-    //        PRDF_ERR( PRDF_FUNC "Write() failed on %s", reg_str );
-    //        break;
-    //    }
-
-    //    iv_fetchAttnsMasked = true;
-
-    //} while (0);
-
-    return o_rc;
-
-    #undef PRDF_FUNC
-}
-
-//------------------------------------------------------------------------------
-
-template<>
-uint32_t MemTdCtlr<TYPE_MBA>::unmaskEccAttns()
-{
-    #define PRDF_FUNC "[MemTdCtlr<TYPE_MBA>::unmaskEccAttns] "
-
-    uint32_t o_rc = SUCCESS;
-
-    // TODO RTC 176901
-    //do
-    //{
-    //    // Memory CEs where masked at the beginning of the TD procedure, so
-    //    // clear and unmask them. Also, it is possible that memory UEs have
-    //    // thresholded so clear and unmask them as well.
-
-    //    const char * fir_str = (0 == iv_mbaPos) ? "MBA0_MBSECCFIR_AND"
-    //                                            : "MBA1_MBSECCFIR_AND";
-    //    const char * msk_str = (0 == iv_mbaPos) ? "MBA0_MBSECCFIR_MASK_AND"
-    //                                            : "MBA1_MBSECCFIR_MASK_AND";
-
-    //    SCAN_COMM_REGISTER_CLASS * fir = iv_membChip->getRegister( fir_str );
-    //    SCAN_COMM_REGISTER_CLASS * msk = iv_membChip->getRegister( msk_str );
-
-    //    fir->setAllBits(); msk->setAllBits();
-    //    fir->ClearBit(16); msk->ClearBit(16); // fetch NCE
-    //    fir->ClearBit(17); msk->ClearBit(17); // fetch RCE
-    //    fir->ClearBit(19); msk->ClearBit(19); // fetch UE
-    //    fir->ClearBit(43); msk->ClearBit(43); // prefetch UE
-
-    //    o_rc = fir->Write();
-    //    if ( SUCCESS != o_rc )
-    //    {
-    //        PRDF_ERR( PRDF_FUNC "Write() failed on %s", fir_str );
-    //        break;
-    //    }
-
-    //    o_rc = msk->Write();
-    //    if ( SUCCESS != o_rc )
-    //    {
-    //        PRDF_ERR( PRDF_FUNC "Write() failed on %s", msk_str );
-    //        break;
-    //    }
-
-    //    iv_fetchAttnsMasked = false;
-
-    //} while (0);
-
-    return o_rc;
-
-    #undef PRDF_FUNC
-}
-
-//------------------------------------------------------------------------------
-
 template <TARGETING::TYPE T>
 void MemTdCtlr<T>::collectStateCaptureData( STEP_CODE_DATA_STRUCT & io_sc,
                                             const char * i_startEnd )
diff --git a/src/usr/diag/prdf/plat/mem/prdfMemTdCtlr.H b/src/usr/diag/prdf/plat/mem/prdfMemTdCtlr.H
index 4fe100528..e49112cb0 100644
--- a/src/usr/diag/prdf/plat/mem/prdfMemTdCtlr.H
+++ b/src/usr/diag/prdf/plat/mem/prdfMemTdCtlr.H
@@ -189,6 +189,8 @@ class MemTdCtlr
     void collectStateCaptureData( STEP_CODE_DATA_STRUCT & io_sc,
                                   const char * i_startEnd );
 
+    #ifdef __HOSTBOOT_RUNTIME
+
     /**
      * @brief  Masks NCE and TCE ECC attentions.
      * @note   Only intended to be used just before starting a new TD procedure.
@@ -206,8 +208,6 @@ class MemTdCtlr
      */
     uint32_t unmaskEccAttns();
 
-    #ifdef __HOSTBOOT_RUNTIME
-
     /**
      * @brief  Initializes the TD controller, if needed.
      *
@@ -247,11 +247,6 @@ class MemTdCtlr
      *  diagnostics are complete. */
     TdRankListEntry iv_stoppedRank;
 
-    /** An array to track whether we want to keep the NCE and TCE ECC attentions
-     *  for each port masked at the end of the TD procedures or not. True if we
-     *  keep them masked, false if we unmask and clear them. */
-    bool iv_saveEccMask[MAX_PORT_PER_MCBIST] = { false };
-
     #ifdef __HOSTBOOT_RUNTIME
 
     /** True if the TD controller has been initialized. False otherwise. */
diff --git a/src/usr/diag/prdf/plat/mem/prdfMemTdCtlr_rt.C b/src/usr/diag/prdf/plat/mem/prdfMemTdCtlr_rt.C
index 8741c183d..cedba8f78 100644
--- a/src/usr/diag/prdf/plat/mem/prdfMemTdCtlr_rt.C
+++ b/src/usr/diag/prdf/plat/mem/prdfMemTdCtlr_rt.C
@@ -730,6 +730,183 @@ uint32_t __checkEcc<TYPE_MBA>( ExtensibleChip * i_chip, TdQueue & io_queue,
 
 //------------------------------------------------------------------------------
 
+template<>
+uint32_t MemTdCtlr<TYPE_MCBIST>::maskEccAttns()
+{
+    #define PRDF_FUNC "[MemTdCtlr<TYPE_MCBIST>::maskEccAttns] "
+
+    uint32_t o_rc = SUCCESS;
+
+    // Loop through all MCAs.
+    for ( auto mcaChip : getConnected(iv_chip, TYPE_MCA) )
+    {
+        SCAN_COMM_REGISTER_CLASS * mask =
+            mcaChip->getRegister( "MCAECCFIR_MASK_OR" );
+
+        mask->clearAllBits();
+        mask->SetBit(8); // Mainline read NCE
+        mask->SetBit(9); // Mainline read TCE
+
+        o_rc = mask->Write();
+        if ( SUCCESS != o_rc )
+        {
+            PRDF_ERR( PRDF_FUNC "Write() failed on MCAECCFIR_MASK_OR" );
+            break;
+        }
+    }
+
+    return o_rc;
+
+    #undef PRDF_FUNC
+}
+
+//------------------------------------------------------------------------------
+
+template<>
+uint32_t MemTdCtlr<TYPE_MCBIST>::unmaskEccAttns()
+{
+    #define PRDF_FUNC "[MemTdCtlr<TYPE_MCBIST>::unmaskEccAttns] "
+
+    uint32_t o_rc = SUCCESS;
+
+    // Memory CEs were masked at the beginning of the TD procedure, so
+    // clear and unmask them. Also, it is possible that memory UEs have
+    // thresholded so clear and unmask them as well.
+
+    // Loop through all MCAs.
+    for ( auto mcaChip : getConnected(iv_chip, TYPE_MCA) )
+    {
+        SCAN_COMM_REGISTER_CLASS * fir =
+            mcaChip->getRegister( "MCAECCFIR_AND" );
+        SCAN_COMM_REGISTER_CLASS * mask =
+            mcaChip->getRegister( "MCAECCFIR_MASK_AND" );
+
+        fir->setAllBits(); mask->setAllBits();
+
+        // Do not unmask NCE and TCE attentions if they have been permanently
+        // masked due to certain TPS conditions.
+        if ( !(getMcaDataBundle(mcaChip)->iv_maskMainlineNceTce) )
+        {
+            fir->ClearBit(8);  mask->ClearBit(8);  // Mainline read NCE
+            fir->ClearBit(9);  mask->ClearBit(9);  // Mainline read TCE
+        }
+        fir->ClearBit(14); mask->ClearBit(14); // Mainline read UE
+
+        o_rc = fir->Write();
+        if ( SUCCESS != o_rc )
+        {
+            PRDF_ERR( PRDF_FUNC "Write() failed on MCAECCFIR_AND" );
+            break;
+        }
+
+        o_rc = mask->Write();
+        if ( SUCCESS != o_rc )
+        {
+            PRDF_ERR( PRDF_FUNC "Write() failed on MCAECCFIR_MASK_AND" );
+            break;
+        }
+    }
+
+    return o_rc;
+
+    #undef PRDF_FUNC
+}
+
+//------------------------------------------------------------------------------
+
+template<>
+uint32_t MemTdCtlr<TYPE_MBA>::maskEccAttns()
+{
+    #define PRDF_FUNC "[MemTdCtlr<TYPE_MBA>::maskEccAttns] "
+
+    uint32_t o_rc = SUCCESS;
+
+    // TODO RTC 176901
+    //do
+    //{
+    //    // Don't want to handle memory CEs during any TD procedures, so
+    //    // mask them.
+
+    //    const char * reg_str = (0 == iv_mbaPos) ? "MBA0_MBSECCFIR_MASK_OR"
+    //                                            : "MBA1_MBSECCFIR_MASK_OR";
+    //    SCAN_COMM_REGISTER_CLASS * reg = iv_membChip->getRegister(reg_str);
+
+    //    reg->clearAllBits();
+    //    reg->SetBit(16); // fetch NCE
+    //    reg->SetBit(17); // fetch RCE
+    //    reg->SetBit(43); // prefetch UE
+
+    //    o_rc = reg->Write();
+    //    if ( SUCCESS != o_rc )
+    //    {
+    //        PRDF_ERR( PRDF_FUNC "Write() failed on %s", reg_str );
+    //        break;
+    //    }
+
+    //    iv_fetchAttnsMasked = true;
+
+    //} while (0);
+
+    return o_rc;
+
+    #undef PRDF_FUNC
+}
+
+//------------------------------------------------------------------------------
+
+template<>
+uint32_t MemTdCtlr<TYPE_MBA>::unmaskEccAttns()
+{
+    #define PRDF_FUNC "[MemTdCtlr<TYPE_MBA>::unmaskEccAttns] "
+
+    uint32_t o_rc = SUCCESS;
+
+    // TODO RTC 176901
+    //do
+    //{
+    //    // Memory CEs where masked at the beginning of the TD procedure, so
+    //    // clear and unmask them. Also, it is possible that memory UEs have
+    //    // thresholded so clear and unmask them as well.
+
+    //    const char * fir_str = (0 == iv_mbaPos) ? "MBA0_MBSECCFIR_AND"
+    //                                            : "MBA1_MBSECCFIR_AND";
+    //    const char * msk_str = (0 == iv_mbaPos) ? "MBA0_MBSECCFIR_MASK_AND"
+    //                                            : "MBA1_MBSECCFIR_MASK_AND";
+
+    //    SCAN_COMM_REGISTER_CLASS * fir = iv_membChip->getRegister( fir_str );
+    //    SCAN_COMM_REGISTER_CLASS * msk = iv_membChip->getRegister( msk_str );
+
+    //    fir->setAllBits(); msk->setAllBits();
+    //    fir->ClearBit(16); msk->ClearBit(16); // fetch NCE
+    //    fir->ClearBit(17); msk->ClearBit(17); // fetch RCE
+    //    fir->ClearBit(19); msk->ClearBit(19); // fetch UE
+    //    fir->ClearBit(43); msk->ClearBit(43); // prefetch UE
+
+    //    o_rc = fir->Write();
+    //    if ( SUCCESS != o_rc )
+    //    {
+    //        PRDF_ERR( PRDF_FUNC "Write() failed on %s", fir_str );
+    //        break;
+    //    }
+
+    //    o_rc = msk->Write();
+    //    if ( SUCCESS != o_rc )
+    //    {
+    //        PRDF_ERR( PRDF_FUNC "Write() failed on %s", msk_str );
+    //        break;
+    //    }
+
+    //    iv_fetchAttnsMasked = false;
+
+    //} while (0);
+
+    return o_rc;
+
+    #undef PRDF_FUNC
+}
+
+//------------------------------------------------------------------------------
+
 // Avoid linker errors with the template.
 template class MemTdCtlr<TYPE_MCBIST>;
 template class MemTdCtlr<TYPE_MBA>;