Remove Salerno and non-present Murano units

Change-Id: I64c2d979d3b7a92ef6563e52cf6a3459a4ba7cd2
RTC: 45796
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1896
Tested-by: Jenkins Server
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

7 files changed, 53 insertions, 379 deletions

diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
index 90352824f..e971372b5 100644
--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
+++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
@@ -184,7 +184,7 @@
         <value>0</value>
     </enumerator>
     <enumerator>
-        <name>SALERNO</name>
+        <name>RESERVED</name><!-- Left here to keep later values the same -->
         <value>16</value>
     </enumerator>
     <enumerator>
diff --git a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml
index 49ff9cacf..f651acc20 100644
--- a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml
+++ b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml
@@ -29,7 +29,7 @@
 
      * MAXIMUM config has 4 Murano chips
      * each Murano has 6 ex chiplets (4,5,6,12,13,14)
-     * each Murano has 3 ABUS (0,1,2) and 4 XBUS (0,1,2,3) units
+     * each Murano has 3 ABUS (0,1,2) and 1 XBUS (1) unit
      * each Murano has 4 MCS chiplets (4-7)
       * each MCS chiplet connects to 1 Centaur membuf chip
        * each Centaur membuf chip has 2 MBA chiplets
@@ -652,24 +652,6 @@
 <!-- murano n0p0 XBUS units -->
 
 <targetInstance>
-    <id>sys0node0proc0xbus0</id>
-    <type>unit-xbus-murano</type>
-    <attribute><id>HUID</id><default>0x00150000</default></attribute>
-        <attribute>
-        <id>PHYS_PATH</id>
-        <default>physical:sys-0/node-0/proc-0/xbus-0</default>
-    </attribute>
-    <attribute>
-        <id>AFFINITY_PATH</id>
-        <default>affinity:sys-0/node-0/proc-0/xbus-0</default>
-    </attribute>
-    <attribute>
-        <id>CHIP_UNIT</id>
-        <default>0</default>
-    </attribute>  
-</targetInstance>
-
-<targetInstance>
     <id>sys0node0proc0xbus1</id>
     <type>unit-xbus-murano</type>
     <attribute><id>HUID</id><default>0x00150001</default></attribute>
@@ -691,42 +673,6 @@
     </attribute>
 </targetInstance>
 
-<targetInstance>
-    <id>sys0node0proc0xbus2</id>
-    <type>unit-xbus-murano</type>
-    <attribute><id>HUID</id><default>0x00150002</default></attribute>
-        <attribute>
-        <id>PHYS_PATH</id>
-        <default>physical:sys-0/node-0/proc-0/xbus-2</default>
-    </attribute>
-    <attribute>
-        <id>AFFINITY_PATH</id>
-        <default>affinity:sys-0/node-0/proc-0/xbus-2</default>
-    </attribute>
-    <attribute>
-        <id>CHIP_UNIT</id>
-        <default>2</default>
-    </attribute>
-</targetInstance>
-
-<targetInstance>
-    <id>sys0node0proc0xbus3</id>
-    <type>unit-xbus-murano</type>
-    <attribute><id>HUID</id><default>0x00150003</default></attribute>
-        <attribute>
-        <id>PHYS_PATH</id>
-        <default>physical:sys-0/node-0/proc-0/xbus-3</default>
-    </attribute>
-    <attribute>
-        <id>AFFINITY_PATH</id>
-        <default>affinity:sys-0/node-0/proc-0/xbus-3</default>
-    </attribute>
-    <attribute>
-        <id>CHIP_UNIT</id>
-        <default>3</default>
-    </attribute>
-</targetInstance>
-
 
 <!-- Murano n0p1 processor chip -->
 
@@ -1263,24 +1209,6 @@
 <!-- murano n0p1 XBUS units -->
 
 <targetInstance>
-    <id>sys0node0proc1xbus0</id>
-    <type>unit-xbus-murano</type>
-    <attribute><id>HUID</id><default>0x00150004</default></attribute>
-        <attribute>
-        <id>PHYS_PATH</id>
-        <default>physical:sys-0/node-0/proc-1/xbus-0</default>
-    </attribute>
-    <attribute>
-        <id>AFFINITY_PATH</id>
-        <default>affinity:sys-0/node-0/proc-1/xbus-0</default>
-    </attribute>
-    <attribute>
-        <id>CHIP_UNIT</id>
-        <default>0</default>
-    </attribute>
-</targetInstance>
-
-<targetInstance>
     <id>sys0node0proc1xbus1</id>
     <type>unit-xbus-murano</type>
     <attribute><id>HUID</id><default>0x00150005</default></attribute>
@@ -1302,42 +1230,6 @@
     </attribute>
 </targetInstance>
 
-<targetInstance>
-    <id>sys0node0proc1xbus2</id>
-    <type>unit-xbus-murano</type>
-    <attribute><id>HUID</id><default>0x00150006</default></attribute>
-        <attribute>
-        <id>PHYS_PATH</id>
-        <default>physical:sys-0/node-0/proc-1/xbus-2</default>
-    </attribute>
-    <attribute>
-        <id>AFFINITY_PATH</id>
-        <default>affinity:sys-0/node-0/proc-1/xbus-2</default>
-    </attribute> 
-    <attribute>
-        <id>CHIP_UNIT</id>
-        <default>2</default>
-    </attribute>
-</targetInstance>
-
-<targetInstance>
-    <id>sys0node0proc1xbus3</id>
-    <type>unit-xbus-murano</type>
-    <attribute><id>HUID</id><default>0x00150007</default></attribute>
-        <attribute>
-        <id>PHYS_PATH</id>
-        <default>physical:sys-0/node-0/proc-1/xbus-3</default>
-    </attribute>
-    <attribute>
-        <id>AFFINITY_PATH</id>
-        <default>affinity:sys-0/node-0/proc-1/xbus-3</default>
-    </attribute> 
-    <attribute>
-        <id>CHIP_UNIT</id>
-        <default>3</default>
-    </attribute>
-</targetInstance>
-
 
 <!-- Murano n0p2 processor chip -->
 
@@ -1875,24 +1767,6 @@
 <!-- murano n0p2 XBUS units -->
 
 <targetInstance>
-    <id>sys0node0proc2xbus0</id>
-    <type>unit-xbus-murano</type>
-    <attribute><id>HUID</id><default>0x00150008</default></attribute>
-        <attribute>
-        <id>PHYS_PATH</id>
-        <default>physical:sys-0/node-0/proc-2/xbus-0</default>
-    </attribute>
-    <attribute>
-        <id>AFFINITY_PATH</id>
-        <default>affinity:sys-0/node-0/proc-2/xbus-0</default>
-    </attribute>
-    <attribute>
-        <id>CHIP_UNIT</id>
-        <default>0</default>
-    </attribute>
-</targetInstance>
-
-<targetInstance>
     <id>sys0node0proc2xbus1</id>
     <type>unit-xbus-murano</type>
     <attribute><id>HUID</id><default>0x00150009</default></attribute>
@@ -1914,42 +1788,6 @@
     </attribute>
 </targetInstance>
 
-<targetInstance>
-    <id>sys0node0proc2xbus2</id>
-    <type>unit-xbus-murano</type>
-    <attribute><id>HUID</id><default>0x0015000A</default></attribute>
-        <attribute>
-        <id>PHYS_PATH</id>
-        <default>physical:sys-0/node-0/proc-2/xbus-2</default>
-    </attribute>
-    <attribute>
-        <id>AFFINITY_PATH</id>
-        <default>affinity:sys-0/node-0/proc-2/xbus-2</default>
-    </attribute>
-    <attribute>
-        <id>CHIP_UNIT</id>
-        <default>2</default>
-    </attribute>
-</targetInstance>
-
-<targetInstance>
-    <id>sys0node0proc2xbus3</id>
-    <type>unit-xbus-murano</type>
-    <attribute><id>HUID</id><default>0x0015000B</default></attribute>
-        <attribute>
-        <id>PHYS_PATH</id>
-        <default>physical:sys-0/node-0/proc-2/xbus-3</default>
-    </attribute>
-    <attribute>
-        <id>AFFINITY_PATH</id>
-        <default>affinity:sys-0/node-0/proc-2/xbus-3</default>
-    </attribute>
-    <attribute>
-        <id>CHIP_UNIT</id>
-        <default>3</default>
-    </attribute>
-</targetInstance>
-
 
 <!-- Murano n0p3 processor chip -->
 
@@ -2486,24 +2324,6 @@
 <!-- murano n0p3 XBUS units -->
 
 <targetInstance>
-    <id>sys0node0proc3xbus0</id>
-    <type>unit-xbus-murano</type>
-    <attribute><id>HUID</id><default>0x0015000C</default></attribute>
-        <attribute>
-        <id>PHYS_PATH</id>
-        <default>physical:sys-0/node-0/proc-3/xbus-0</default>
-    </attribute>
-    <attribute>
-        <id>AFFINITY_PATH</id>
-        <default>affinity:sys-0/node-0/proc-3/xbus-0</default>
-    </attribute>
-    <attribute>
-        <id>CHIP_UNIT</id>
-        <default>0</default>
-    </attribute>
-</targetInstance>
-
-<targetInstance>
     <id>sys0node0proc3xbus1</id>
     <type>unit-xbus-murano</type>
     <attribute><id>HUID</id><default>0x0015000D</default></attribute>
@@ -2525,42 +2345,6 @@
     </attribute>
 </targetInstance>
 
-<targetInstance>
-    <id>sys0node0proc3xbus2</id>
-    <type>unit-xbus-murano</type>
-    <attribute><id>HUID</id><default>0x0015000E</default></attribute>
-        <attribute>
-        <id>PHYS_PATH</id>
-        <default>physical:sys-0/node-0/proc-3/xbus-2</default>
-    </attribute>
-    <attribute>
-        <id>AFFINITY_PATH</id>
-        <default>affinity:sys-0/node-0/proc-3/xbus-2</default>
-    </attribute> 
-    <attribute>
-        <id>CHIP_UNIT</id>
-        <default>2</default>
-    </attribute>
-</targetInstance>
-
-<targetInstance>
-    <id>sys0node0proc3xbus3</id>
-    <type>unit-xbus-murano</type>
-    <attribute><id>HUID</id><default>0x0015000F</default></attribute>
-        <attribute>
-        <id>PHYS_PATH</id>
-        <default>physical:sys-0/node-0/proc-3/xbus-3</default>
-    </attribute>
-    <attribute>
-        <id>AFFINITY_PATH</id>
-        <default>affinity:sys-0/node-0/proc-3/xbus-3</default>
-    </attribute>
-    <attribute>
-        <id>CHIP_UNIT</id>
-        <default>3</default>
-    </attribute>
-</targetInstance>
-
 <!-- Centaur n0p4 : start -->
 
 <targetInstance>
diff --git a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml
index b809240e8..4bcd9a56b 100644
--- a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml
+++ b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml
@@ -29,7 +29,6 @@
 
      * MAXIMUM config has 8 Venice chips
      * each Venice has 12 ex chiplets (1-6,9-14)
-           (@fixme : targets don't match this numbering RTC:38384)
      * each VENICE has 3 ABUS (0,1,2) and 4 XBUS (0,1,2,3) units
      * each Venice has 8 MCS chiplets
       * each MCS chiplet connects to 1 Centaur membuf chip
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml
index d21eeaa1a..d34269335 100644
--- a/src/usr/targeting/common/xmltohb/target_types.xml
+++ b/src/usr/targeting/common/xmltohb/target_types.xml
@@ -254,17 +254,6 @@
 </targetType>
 
 <targetType>
-    <id>chip-processor-salerno</id>
-    <parent>chip-processor-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>SALERNO</default>
-    </attribute>
-    <attribute><id>EEPROM_ADDR_INFO0</id></attribute>
-    <attribute><id>EEPROM_ADDR_INFO1</id></attribute>
- </targetType>
-
-<targetType>
     <id>chip-processor-venice</id>
     <parent>chip-processor-power8</parent>
     <attribute>
@@ -352,15 +341,6 @@
 </targetType>
 
 <targetType>
-    <id>unit-ex-salerno</id>
-    <parent>unit-ex-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>SALERNO</default>
-    </attribute>
-</targetType>
-
-<targetType>
     <id>unit-ex-venice</id>
     <parent>unit-ex-power8</parent>
     <attribute>
@@ -389,15 +369,6 @@
 </targetType>
 
 <targetType>
-    <id>unit-core-salerno</id>
-    <parent>unit-core-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>SALERNO</default>
-    </attribute>
-</targetType>
-
-<targetType>
     <id>unit-core-venice</id>
     <parent>unit-core-power8</parent>
     <attribute>
@@ -426,15 +397,6 @@
 </targetType>
 
 <targetType>
-    <id>unit-pervasive-salerno</id>
-    <parent>unit-pervasive-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>SALERNO</default>
-    </attribute>
-</targetType>
-
-<targetType>
     <id>unit-pervasive-venice</id>
     <parent>unit-pervasive-power8</parent>
     <attribute>
@@ -463,15 +425,6 @@
 </targetType>
 
 <targetType>
-    <id>unit-pci-salerno</id>
-    <parent>unit-pci-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>SALERNO</default>
-    </attribute>
-</targetType>
-
-<targetType>
     <id>unit-pci-venice</id>
     <parent>unit-pci-power8</parent>
     <attribute>
@@ -500,15 +453,6 @@
 </targetType>
 
 <targetType>
-    <id>unit-powerbus-salerno</id>
-    <parent>unit-powerbus-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>SALERNO</default>
-    </attribute>
-</targetType>
-
-<targetType>
     <id>unit-powerbus-venice</id>
     <parent>unit-powerbus-power8</parent>
     <attribute>
@@ -556,15 +500,6 @@
 </targetType>
 
 <targetType>
-    <id>unit-abus-salerno</id>
-    <parent>unit-abus-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>SALERNO</default>
-    </attribute>
-</targetType>
-
-<targetType>
     <id>unit-abus-venice</id>
     <parent>unit-abus-power8</parent>
     <attribute>
@@ -594,15 +529,6 @@
 </targetType>
 
 <targetType>
-    <id>unit-xbus-salerno</id>
-    <parent>unit-xbus-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>SALERNO</default>
-    </attribute>
-</targetType>
-
-<targetType>
     <id>unit-xbus-venice</id>
     <parent>unit-xbus-power8</parent>
     <attribute>
@@ -769,15 +695,6 @@
 </targetType>
 
 <targetType>
-    <id>unit-mcs-salerno</id>
-    <parent>unit-mcs-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>SALERNO</default>
-    </attribute>
-</targetType>
-
-<targetType>
     <id>unit-mcs-murano</id>
     <parent>unit-mcs-power8</parent>
     <attribute>
@@ -798,15 +715,6 @@
 </targetType>
 
 <targetType>
-    <id>unit-mba-salerno</id>
-    <parent>unit-mba-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>SALERNO</default>
-    </attribute>
-</targetType>
-
-<targetType>
     <id>unit-mba-murano</id>
     <parent>unit-mba-venice</parent>
     <attribute>
@@ -825,15 +733,6 @@
 </targetType>
 
 <targetType>
-    <id>unit-mbs-salerno</id>
-    <parent>unit-mbs-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>SALERNO</default>
-    </attribute>
-</targetType>
-
-<targetType>
     <id>unit-mbs-murano</id>
     <parent>unit-mbs-venice</parent>
     <attribute>
@@ -843,15 +742,6 @@
 </targetType>
 
 <targetType>
-    <id>unit-memport-salerno</id>
-    <parent>unit-memport-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>SALERNO</default>
-    </attribute>
-</targetType>
-
-<targetType>
     <id>unit-memport-venice</id>
     <parent>unit-memport-power8</parent>
     <attribute>
diff --git a/src/usr/targeting/xmltohb/genHwsvMrwXml.pl b/src/usr/targeting/xmltohb/genHwsvMrwXml.pl
index 502935927..2494dfd98 100755
--- a/src/usr/targeting/xmltohb/genHwsvMrwXml.pl
+++ b/src/usr/targeting/xmltohb/genHwsvMrwXml.pl
@@ -1270,15 +1270,17 @@ sub generate_ax_buses
 
     my $proc_name = "n${node}p${proc}";
     print "\n<!-- $SYSNAME $proc_name ${type}BUS units -->\n";
-    my $maxbus = ($type eq "A") ? 2 : 3;
+    my $minbus = ($type eq "A") ? 0 : 1;
+    my $maxbus = ($type eq "A") ? 2 : 1;
+    my $numperchip = ($type eq "A") ? 3 : 4;
     my $typenum = ($type eq "A") ? 0x16 : 0x15;
     $type = lc( $type );
-    for my $i ( 0 .. $maxbus )
+    for my $i ( $minbus .. $maxbus )
     {
 	my $uidstr = sprintf( "0x%02X%02X%04X",
 			     ${node},
 			       $typenum,
-			       $i+$proc*($maxbus+1)+${node}*8*($maxbus+1));
+                   $i+$proc*($numperchip)+${node}*8*($numperchip));
         my $peer = 0;
         my $p_proc = 0;
         my $p_port = 0;
diff --git a/src/usr/xscom/xscom.C b/src/usr/xscom/xscom.C
index d2ef0f254..2f1308468 100644
--- a/src/usr/xscom/xscom.C
+++ b/src/usr/xscom/xscom.C
@@ -1,26 +1,25 @@
-/*  IBM_PROLOG_BEGIN_TAG
- *  This is an automatically generated prolog.
- *
- *  $Source: src/usr/xscom/xscom.C $
- *
- *  IBM CONFIDENTIAL
- *
- *  COPYRIGHT International Business Machines Corp. 2011-2012
- *
- *  p1
- *
- *  Object Code Only (OCO) source materials
- *  Licensed Internal Code Source Materials
- *  IBM HostBoot Licensed Internal Code
- *
- *  The source code for this program is not published or other-
- *  wise divested of its trade secrets, irrespective of what has
- *  been deposited with the U.S. Copyright Office.
- *
- *  Origin: 30
- *
- *  IBM_PROLOG_END_TAG
- */
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/xscom/xscom.C $                                       */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2011,2012              */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
 /**
  *  @file xscom.C
  *
@@ -214,7 +213,7 @@ uint8_t getMaxChipsPerNode()
 
     ProcessorCoreType l_coreType = cpu_core_type();
     //@todo - Need to verify if this number is correct
-    // for both Salerno and Venice
+    // for both Murano and Venice
     switch (l_coreType)
     {
         case CORE_POWER8_MURANO:
diff --git a/src/usr/xscom/xscom.H b/src/usr/xscom/xscom.H
index 88cb0aeaf..6efc48274 100644
--- a/src/usr/xscom/xscom.H
+++ b/src/usr/xscom/xscom.H
@@ -1,25 +1,25 @@
-//  IBM_PROLOG_BEGIN_TAG
-//  This is an automatically generated prolog.
-//
-//  $Source: src/usr/xscom/xscom.H $
-//
-//  IBM CONFIDENTIAL
-//
-//  COPYRIGHT International Business Machines Corp. 2011
-//
-//  p1
-//
-//  Object Code Only (OCO) source materials
-//  Licensed Internal Code Source Materials
-//  IBM HostBoot Licensed Internal Code
-//
-//  The source code for this program is not published or other-
-//  wise divested of its trade secrets, irrespective of what has
-//  been deposited with the U.S. Copyright Office.
-//
-//  Origin: 30
-//
-//  IBM_PROLOG_END
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/xscom/xscom.H $                                       */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2011,2012              */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
 #ifndef __XSCOM_H
 #define __XSCOM_H
 
@@ -83,7 +83,7 @@ errlHndl_t xscomPerformOp(DeviceFW::OperationType i_opType,
                           va_list i_args);
 
 /**
- *  @brief  Abstracts HMER register of a P8/Salerno chip
+ *  @brief  Abstracts HMER register of a P8 (Murano/Venice) chip
  */
 class HMER
 {