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author | Corey Swenson <cswenson@us.ibm.com> | 2015-05-11 14:03:51 -0500 |
---|---|---|
committer | Patrick Williams <iawillia@us.ibm.com> | 2015-12-11 13:56:27 -0600 |
commit | 5d33811c6f265463f502c19dd2a3173e1bbc38bc (patch) | |
tree | 978fca6284a12f15d4084559317c034775813ac2 /src/usr | |
parent | 12bdd1a279cf7913b5da2010c8cbbc7ccfacf0a6 (diff) | |
download | talos-hostboot-5d33811c6f265463f502c19dd2a3173e1bbc38bc.tar.gz talos-hostboot-5d33811c6f265463f502c19dd2a3173e1bbc38bc.zip |
Base kernel changes for Nimbus/Cumulus
Change-Id: Ic5dfde1e975453d760631335bab674919e1109e7
RTC: 126637
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18321
Tested-by: Jenkins Server
Reviewed-by: Christian Geddes <crgeddes@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr')
-rw-r--r-- | src/usr/errl/errlmanager.C | 5 | ||||
-rw-r--r-- | src/usr/pnor/pnorrp.C | 4 | ||||
-rw-r--r-- | src/usr/secureboot/base/purge.C | 10 | ||||
-rw-r--r-- | src/usr/secureboot/base/securerom.C | 3 | ||||
-rw-r--r-- | src/usr/targeting/targetservicestart.C | 16 | ||||
-rw-r--r-- | src/usr/xscom/xscom.C | 6 | ||||
-rw-r--r-- | src/usr/xscom/xscom.H | 8 |
7 files changed, 39 insertions, 13 deletions
diff --git a/src/usr/errl/errlmanager.C b/src/usr/errl/errlmanager.C index 3b8b206d3..ff0e62304 100644 --- a/src/usr/errl/errlmanager.C +++ b/src/usr/errl/errlmanager.C @@ -249,9 +249,10 @@ void ErrlManager::errlogMsgHndlr () case ERRLOG_ACCESS_PNOR_TYPE: { // PNOR is up and running now. - +// @todo-RTC:127337 Fake PNOR support +#if (0) setupPnorInfo(); - +#endif //We are done with the msg msg_free(theMsg); diff --git a/src/usr/pnor/pnorrp.C b/src/usr/pnor/pnorrp.C index a887e8a98..d2f739819 100644 --- a/src/usr/pnor/pnorrp.C +++ b/src/usr/pnor/pnorrp.C @@ -280,6 +280,8 @@ void PnorRP::initDaemon() INITSERVICE::registerBlock(reinterpret_cast<void*>(BASE_VADDR), TOTAL_SIZE,PNOR_PRIORITY); +// @todo-RTC:127337 Fake PNOR support +#if (0) //Find and read the TOC in the PNOR to compute the sections and set //their correct permissions l_errhdl = findTOC(); @@ -305,7 +307,7 @@ void PnorRP::initDaemon() // start task to wait on the queue task_create( wait_for_message, NULL ); - +#endif } while(0); if( l_errhdl ) diff --git a/src/usr/secureboot/base/purge.C b/src/usr/secureboot/base/purge.C index 4c5793c39..5d9b7b624 100644 --- a/src/usr/secureboot/base/purge.C +++ b/src/usr/secureboot/base/purge.C @@ -5,7 +5,9 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* COPYRIGHT International Business Machines Corp. 2013,2014 */ +/* Contributors Listed Below - COPYRIGHT 2013,2015 */ +/* [+] International Business Machines Corp. */ +/* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ @@ -32,6 +34,9 @@ namespace SECUREBOOT { errlHndl_t issueBlindPurge() { + errlHndl_t l_errl = NULL; +// @todo-RTC:118832 Remove with purge update +#if (0) static const uint64_t PURGE_REG = 0x1001080e; // Bits : Value @@ -47,7 +52,6 @@ namespace SECUREBOOT static const size_t RETRY_COUNT = 100; static const size_t RETRY_WAIT_NS = ONE_CTX_SWITCH_NS; - errlHndl_t l_errl = NULL; do { size_t coreId = (task_getcpuid() / 8) & 0xF; @@ -152,7 +156,7 @@ namespace SECUREBOOT } } while(0); - +#endif return l_errl; } diff --git a/src/usr/secureboot/base/securerom.C b/src/usr/secureboot/base/securerom.C index 8b2946210..28bb22983 100644 --- a/src/usr/secureboot/base/securerom.C +++ b/src/usr/secureboot/base/securerom.C @@ -101,6 +101,7 @@ errlHndl_t SecureROM::initialize() TRACDCOMP(g_trac_secure,ENTER_MRK"SecureROM::initialize()"); errlHndl_t l_errl = NULL; +#if (0) bool l_cleanup = false; uint32_t l_rc = 0; @@ -279,7 +280,7 @@ errlHndl_t SecureROM::initialize() TRACDCOMP(g_trac_secure,EXIT_MRK"SecureROM::initialize() - %s", ((NULL == l_errl) ? "No Error" : "With Error") ); - +#endif return l_errl; } diff --git a/src/usr/targeting/targetservicestart.C b/src/usr/targeting/targetservicestart.C index 4252ca32b..203468510 100644 --- a/src/usr/targeting/targetservicestart.C +++ b/src/usr/targeting/targetservicestart.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2014 */ +/* Contributors Listed Below - COPYRIGHT 2012,2015 */ /* [+] Google Inc. */ /* [+] International Business Machines Corp. */ /* */ @@ -86,7 +86,7 @@ static void checkProcessorTargeting(TargetService& i_targetService); /** * @brief Entry point for initialization service to initialize the targeting * code - * + * * @param[in] io_pError * Error log handle; returns NULL on success, !NULL otherwise * @@ -178,6 +178,18 @@ static void checkProcessorTargeting(TargetService& i_targetService) l_haveOneCorrectProcessor = true; } break; + case MODEL_NIMBUS: + if(l_coreType == CORE_POWER9_NIMBUS) + { + l_haveOneCorrectProcessor = true; + } + break; + case MODEL_CUMULUS: + if(l_coreType == CORE_POWER9_CUMULUS) + { + l_haveOneCorrectProcessor = true; + } + break; default: break; diff --git a/src/usr/xscom/xscom.C b/src/usr/xscom/xscom.C index bfc4df2e6..3291ce476 100644 --- a/src/usr/xscom/xscom.C +++ b/src/usr/xscom/xscom.C @@ -201,6 +201,8 @@ uint8_t getMaxChipsPerNode() case CORE_POWER8_MURANO: case CORE_POWER8_VENICE: case CORE_POWER8_NAPLES: + case CORE_POWER9_NIMBUS: + case CORE_POWER9_CUMULUS: case CORE_UNKNOWN: default: l_numOfChips = 8; @@ -662,6 +664,8 @@ void collectXscomFFDC(TARGETING::Target* i_target, uint64_t* i_virtAddr, errlHndl_t& io_errl) { +// @todo-RTC:128077 XSCOM support for P9 +#if (0) errlHndl_t l_err = NULL; HMER l_hmer; uint64_t io_buffer = 0; @@ -728,7 +732,7 @@ void collectXscomFFDC(TARGETING::Target* i_target, // Add the register FFDC to the errorlog passed in. l_logReg.addToLog(io_errl); - +#endif return; } diff --git a/src/usr/xscom/xscom.H b/src/usr/xscom/xscom.H index 372361b53..df49b1ac0 100644 --- a/src/usr/xscom/xscom.H +++ b/src/usr/xscom/xscom.H @@ -5,7 +5,9 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* COPYRIGHT International Business Machines Corp. 2011,2014 */ +/* Contributors Listed Below - COPYRIGHT 2011,2015 */ +/* [+] International Business Machines Corp. */ +/* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ @@ -38,8 +40,8 @@ /** * @brief The (fixed) base address value for master proc */ -//@todo - Verify this value for HW -#define MASTER_PROC_XSCOM_BASE_ADDR 0x0003FC0000000000 +// @todo-RTC:128077 XSCOM support for P9 +#define MASTER_PROC_XSCOM_BASE_ADDR 0x0006010000000000 /** * @brief Type definition for XSCom address and Chip ID |