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authorNick Bofferding <bofferdn@us.ibm.com>2018-07-16 17:37:14 -0500
committerNicholas E. Bofferding <bofferdn@us.ibm.com>2018-07-21 21:03:24 -0500
commit5ce2333d7d4ac137d389ed5c1ce58795d791ff01 (patch)
tree1228864472cea73ff8860be27e8f4a90753171cf /src/usr
parent96eb889d26faa0a7bafea9424b5b8db6964c7941 (diff)
downloadtalos-hostboot-5ce2333d7d4ac137d389ed5c1ce58795d791ff01.tar.gz
talos-hostboot-5ce2333d7d4ac137d389ed5c1ce58795d791ff01.zip
Secure Boot: Clear XBUS FIR bits after SMP enabled
Previously, XBUS link training kept track of bad lanes before and after the link training procedure, so as to clear FIR bits for old problems. This violates secure boot restrictions, so this change relocates the FIR bit clearing to after the SMP has been built Change-Id: I8f180801d98d693beb04a890936bb07f9c977dfb CQ: SW437852 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62629 Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63093
Diffstat (limited to 'src/usr')
-rw-r--r--src/usr/isteps/istep10/call_proc_build_smp.C60
1 files changed, 47 insertions, 13 deletions
diff --git a/src/usr/isteps/istep10/call_proc_build_smp.C b/src/usr/isteps/istep10/call_proc_build_smp.C
index e8b39ed57..b3ce48516 100644
--- a/src/usr/isteps/istep10/call_proc_build_smp.C
+++ b/src/usr/isteps/istep10/call_proc_build_smp.C
@@ -22,23 +22,24 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
-#include <errl/errlentry.H>
-#include <errl/errludtarget.H>
-#include <errl/errlmanager.H>
-#include <isteps/hwpisteperror.H>
-#include <initservice/isteps_trace.H>
-#include <fsi/fsiif.H>
+#include <errl/errlentry.H>
+#include <errl/errludtarget.H>
+#include <errl/errlmanager.H>
+#include <isteps/hwpisteperror.H>
+#include <initservice/isteps_trace.H>
+#include <fsi/fsiif.H>
// targeting support
-#include <targeting/common/commontargeting.H>
-#include <targeting/common/utilFilter.H>
-#include <targeting/common/target.H>
-#include <pbusLinkSvc.H>
+#include <targeting/common/commontargeting.H>
+#include <targeting/common/utilFilter.H>
+#include <targeting/common/target.H>
+#include <pbusLinkSvc.H>
-#include <fapi2/target.H>
-#include <fapi2/plat_hwp_invoker.H>
-#include <intr/interrupt.H>
+#include <fapi2/target.H>
+#include <fapi2/plat_hwp_invoker.H>
+#include <intr/interrupt.H>
+#include <p9_io_xbus_clear_firs.H>
//@TODO RTC:150562 - Remove when BAR setting handled by INTRRP
#include <devicefw/userif.H>
@@ -210,6 +211,39 @@ void* call_proc_build_smp (void *io_pArgs)
}
}
+ // Clear XBUS FIR bits for bad lanes that existed prior to
+ // link training
+ TARGETING::TargetHandleList xbusTargets;
+ getChildChiplets(xbusTargets, *curproc, TYPE_XBUS);
+ for(auto pXbusTarget : xbusTargets)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Calling p9_io_xbus_erepair_cleanup HWP for XBUS with "
+ "HUID of 0x%08X",
+ TARGETING::get_huid(pXbusTarget));
+
+ const fapi2::Target<fapi2::TARGET_TYPE_XBUS>
+ fapi2_xbus(pXbusTarget);
+
+ FAPI_INVOKE_HWP(l_errl,
+ p9_io_xbus_erepair_cleanup,
+ fapi2_xbus);
+ if(l_errl)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, ERR_MRK
+ "ERROR : Call to p9_io_xbus_erepair_cleanup HWP "
+ "for XBUS with HUID of 0x%08X failed. "
+ "PLID=0x%08X, EID=0x%08X, Reason=0x%04X",
+ TARGETING::get_huid(pXbusTarget),
+ l_errl->plid(),
+ l_errl->eid(),
+ l_errl->reasonCode());
+ ErrlUserDetailsTarget(pXbusTarget).addToLog(l_errl);
+ l_StepError.addErrorDetails(l_errl);
+ errlCommit(l_errl,HWPF_COMP_ID);
+ }
+ }
+
++curproc;
}
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