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| author | Yue Du <daviddu@us.ibm.com> | 2017-03-25 00:17:16 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2017-04-18 17:08:52 -0400 |
| commit | 5334b1e8d4f2ff7463defcf39c8c9c9c6b6012f7 (patch) | |
| tree | d4c58f03e88892789dbe90a2369ac86434ac7a2d /src/usr | |
| parent | 709665c008ea19185cb644b848439298a3c7b577 (diff) | |
| download | talos-hostboot-5334b1e8d4f2ff7463defcf39c8c9c9c6b6012f7.tar.gz talos-hostboot-5334b1e8d4f2ff7463defcf39c8c9c9c6b6012f7.zip | |
STOP: Enable CHTM
CHTM traces use Homer CpmrBase + 0x80000 + 16KB*cme_id
When enabled, the CHTM traces are hard coded to
0x20000000 + 16MB*EX
Change-Id: I80256273a0b7fc31c2f8b5119108ca34e1599106
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38437
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38439
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/usr')
| -rw-r--r-- | src/usr/targeting/common/xmltohb/attribute_types.xml | 45 | ||||
| -rwxr-xr-x | src/usr/targeting/common/xmltohb/target_types.xml | 3 |
2 files changed, 47 insertions, 1 deletions
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index a96d3c590..a3a5a80d8 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -33643,4 +33643,49 @@ Measured in GB</description> </hwpfToHbAttrMap> </attribute> +<attribute> + <id>CME_CHTM_TRACE_ENABLE</id> + <description> + Enables the SGPE Hcode to enable the CME instruction traces into the CHTM + for debug. Note: all configured CMEs will be put into this + mode if this attribute is ON. + + Consumer: p9_hcode_image_build.c -> + SGPE Header field + + Platform default: OFF + </description> + <simpleType> + <uint8_t></uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_CME_CHTM_TRACE_ENABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>CME_CHTM_TRACE_MEMORY_CONFIG</id> + <description> + CHTM Trace Memory Configuration value goes directly into CHTM_MEM register. + User is responsible to put correct data for each bit field of the register. + + Consumer: p9_hcode_image_build.c -> + SGPE Header field + + Platform default: 0 + </description> + <simpleType> + <uint64_t></uint64_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_CME_CHTM_TRACE_MEMORY_CONFIG</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + </attributes> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 7efa71ffb..438021e40 100755 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -1330,7 +1330,8 @@ <attribute><id>DO_MSS_TRAINING_BAD_BITS</id></attribute> <!-- END memory workaround for DD1.02 --> <attribute><id>DO_BLUE_WATERFALL_ADJUST</id></attribute> - + <attribute><id>CME_CHTM_TRACE_ENABLE</id></attribute> + <attribute><id>CME_CHTM_TRACE_MEMORY_CONFIG</id></attribute> </targetType><!-- chip-processor-power9 --> <!-- chip-processor-nimbus --> |
