diff options
author | Dan Crowell <dcrowell@us.ibm.com> | 2017-08-28 15:44:21 -0500 |
---|---|---|
committer | William G. Hoffa <wghoffa@us.ibm.com> | 2017-09-12 17:20:27 -0400 |
commit | 3b784aa068925aa39976ce6f92a044da672319a9 (patch) | |
tree | fbd6fb1f4c5863a5f73e3d92860e0e9224a3fa9c /src/usr | |
parent | 753699cd319a341f024ef4be7ee1242638135ce0 (diff) | |
download | talos-hostboot-3b784aa068925aa39976ce6f92a044da672319a9.tar.gz talos-hostboot-3b784aa068925aa39976ce6f92a044da672319a9.zip |
Default to use the master's side for slave sbe starts in OP
On OP systems (any non-sequential sbe update config), we will
use the same side of the sbe seeprom on the slave as what was
used to boot the master. This will prevent us from seeing the
same failure booting the slaves that we got booting the master
in the case where we have a bad sbe image for some reason.
resolves zaius-openpower/#61
Change-Id: Ibcd00c43958d0ba2ce5978b0ab921a934f9f58a5
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45264
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/usr')
-rw-r--r-- | src/usr/sbe/sbe_update.C | 98 |
1 files changed, 59 insertions, 39 deletions
diff --git a/src/usr/sbe/sbe_update.C b/src/usr/sbe/sbe_update.C index 10f3cc1b1..5054a5dfa 100644 --- a/src/usr/sbe/sbe_update.C +++ b/src/usr/sbe/sbe_update.C @@ -1642,47 +1642,44 @@ namespace SBE TRACFCOMP( g_trac_sbe, ENTER_MRK"updateSbeBootSeeprom()" ); errlHndl_t err = NULL; - fapi2::ReturnCode l_fapi_rc; - fapi2::buffer<uint32_t> l_read_reg; const uint32_t l_sbeBootSelectMask = SBE_BOOT_SELECT_MASK >> 32; - // cast OUR type of target to a FAPI type of target. - const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>l_fapiTarg(i_target); + size_t l_opSize = sizeof(uint32_t); do{ - // Read version from MVPD for target proc - mvpdSbKeyword_t l_mvpdSbKeyword; - err = getSetMVPDVersion(i_target, - MVPDOP_READ, - l_mvpdSbKeyword); - + // Read PERV_SB_CS_FSI 0x2808 for target proc + uint32_t l_targetReg = 0; + err = DeviceFW::deviceOp( + DeviceFW::READ, + i_target, + &l_targetReg, + l_opSize, + DEVICE_FSI_ADDRESS(PERV_SB_CS_FSI_BYTE) ); if( err ) { TRACFCOMP( g_trac_sbe, - ERR_MRK"updateSbeBootSeeprom(): getSetMVPDVersion, " + ERR_MRK"updateSbeBootSeeprom(): getCfamRegister, " + "PERV_SB_CS_FSI (0x%.4X), proc target = %.8X, " "RC=0x%X, PLID=0x%lX", + PERV_SB_CS_FSI, // 0x2808 + TARGETING::get_huid(i_target), ERRL_GETRC_SAFE(err), ERRL_GETPLID_SAFE(err)); break; } - // Read PERV_SB_CS_FSI 0x2808 for target proc - l_fapi_rc = fapi2::getCfamRegister(l_fapiTarg, - PERV_SB_CS_FSI, - l_read_reg); +#ifdef CONFIG_SBE_UPDATE_SEQUENTIAL + // Read version from MVPD for target proc + mvpdSbKeyword_t l_mvpdSbKeyword; + err = getSetMVPDVersion(i_target, + MVPDOP_READ, + l_mvpdSbKeyword); - if(!l_fapi_rc.isRC(0)) + if( err ) { - err = fapi2::rcToErrl(l_fapi_rc); - err->collectTrace(FAPI_IMP_TRACE_NAME,256); - err->collectTrace(FAPI_TRACE_NAME,384); - TRACFCOMP( g_trac_sbe, - ERR_MRK"updateSbeBootSeeprom(): getCfamRegister, " - "PERV_SB_CS_FSI (0x%.4X), proc target = %.8X, " + ERR_MRK"updateSbeBootSeeprom(): getSetMVPDVersion, " "RC=0x%X, PLID=0x%lX", - PERV_SB_CS_FSI, // 0x2808 - TARGETING::get_huid(i_target), ERRL_GETRC_SAFE(err), ERRL_GETPLID_SAFE(err)); break; @@ -1695,39 +1692,61 @@ namespace SBE : (SEEPROM_0_PERMANENT_VALUE == (l_mvpdSbKeyword.flags & PERMANENT_FLAG_MASK)); +#else + + // The slave will use the same side setting as the master + sbeSeepromSide_t l_bootside = SBE_SEEPROM_INVALID; + TARGETING::Target * l_masterTarget = nullptr; + targetService().masterProcChipTargetHandle(l_masterTarget); + err = getSbeBootSeeprom( l_masterTarget, l_bootside ); + if( err ) + { + TRACFCOMP( g_trac_sbe, + ERR_MRK"updateSbeBootSeeprom(): call to getSbeBootSeeprom(master) failed : PLID=%.8X", + ERRL_GETPLID_SAFE(err)); + break; + } + + bool l_bootSide0 = (l_bootside == SBE_SEEPROM0); + + TRACFCOMP( g_trac_sbe,INFO_MRK"updateSbeBootSeeprom(): set SBE boot side %d for proc=%.8X", + !l_bootSide0, + TARGETING::get_huid(i_target) ); + +#endif + if(l_bootSide0) { // Set Boot Side 0 by clearing bit for side 1 - l_read_reg &= ~l_sbeBootSelectMask; + l_targetReg &= ~l_sbeBootSelectMask; TRACFCOMP( g_trac_sbe, INFO_MRK"updateSbeBootSeeprom(): l_read_reg=0x%.8X " - "set SBE boot side 0 for proc=%.8X", - l_read_reg, + "set SBE boot side 0 for proc=%.8llX", + l_targetReg, TARGETING::get_huid(i_target) ); } else { // Set Boot Side 1 by setting bit for side 1 - l_read_reg |= l_sbeBootSelectMask; + l_targetReg |= l_sbeBootSelectMask; TRACFCOMP( g_trac_sbe, INFO_MRK"updateSbeBootSeeprom(): l_read_reg=0x%.8X " - "set SBE boot side 1 for proc=%.8X", - l_read_reg, + "set SBE boot side 1 for proc=%.8llX", + l_targetReg, TARGETING::get_huid(i_target) ); } - l_fapi_rc = fapi2::putCfamRegister(l_fapiTarg, - PERV_SB_CS_FSI, - l_read_reg); - - if(!l_fapi_rc.isRC(0)) + // Write PERV_SB_CS_FSI 0x2808 back into target proc + err = DeviceFW::deviceOp( + DeviceFW::WRITE, + i_target, + &l_targetReg, + l_opSize, + DEVICE_FSI_ADDRESS(PERV_SB_CS_FSI_BYTE) ); + if( err ) { - err = fapi2::rcToErrl(l_fapi_rc); - err->collectTrace(FAPI_IMP_TRACE_NAME,256); - err->collectTrace(FAPI_TRACE_NAME,384); - TRACFCOMP( g_trac_sbe, ERR_MRK"updateSbeBootSeeprom(): putCfamRegister, " "PERV_SB_CS_FSI (0x%.4X), proc target = %.8X, " @@ -1738,6 +1757,7 @@ namespace SBE ERRL_GETPLID_SAFE(err)); break; } + }while(0); TRACFCOMP( g_trac_sbe, EXIT_MRK"updateSbeBootSeeprom()" ); |