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authorDan Crowell <dcrowell@us.ibm.com>2013-08-12 10:42:41 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2013-09-13 13:09:17 -0500
commit907bd272887a4223e233091172a6a6e5f29cb05a (patch)
tree599d0e14d59908fdd8f1b06f202d87746ab8b122 /src/usr/xscom
parentb614caa4f28616bba6e27625e4430083f53679b8 (diff)
downloadtalos-hostboot-907bd272887a4223e233091172a6a6e5f29cb05a.tar.gz
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FSI SCOM Error Handling
Change-Id: I1538fbf386d5480e473f3f0b049492d494412624 RTC: 35064 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5825 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/xscom')
-rw-r--r--src/usr/xscom/piberror.C3
-rw-r--r--src/usr/xscom/xscom.C2
2 files changed, 2 insertions, 3 deletions
diff --git a/src/usr/xscom/piberror.C b/src/usr/xscom/piberror.C
index e36a37f78..366fd2579 100644
--- a/src/usr/xscom/piberror.C
+++ b/src/usr/xscom/piberror.C
@@ -57,8 +57,8 @@ void addFruCallouts(TARGETING::Target* i_target,
case PIB::PIB_INVALID_ADDRESS:
io_errl->addProcedureCallout(HWAS::EPUB_PRC_HB_CODE,
HWAS::SRCI_PRIORITY_HIGH);
-
break;
+
case PIB::PIB_PARITY_ERROR:
case PIB::PIB_TIMEOUT:
io_errl->addHwCallout( i_target,
@@ -66,6 +66,7 @@ void addFruCallouts(TARGETING::Target* i_target,
HWAS::NO_DECONFIG,
HWAS::GARD_NULL );
break;
+
case PIB::PIB_CLOCK_ERROR:
if (i_target->getAttr<TARGETING::ATTR_TYPE>() ==
TARGETING::TYPE_PROC)
diff --git a/src/usr/xscom/xscom.C b/src/usr/xscom/xscom.C
index 8e39ea29d..a900c8c8f 100644
--- a/src/usr/xscom/xscom.C
+++ b/src/usr/xscom/xscom.C
@@ -212,8 +212,6 @@ uint8_t getMaxChipsPerNode()
uint8_t l_numOfChips = 0;
ProcessorCoreType l_coreType = cpu_core_type();
- //@todo - Need to verify if this number is correct
- // for both Murano and Venice
switch (l_coreType)
{
case CORE_POWER8_MURANO:
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