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| author | Dan Crowell <dcrowell@us.ibm.com> | 2017-05-10 15:55:40 -0500 |
|---|---|---|
| committer | William G. Hoffa <wghoffa@us.ibm.com> | 2017-06-02 09:23:59 -0400 |
| commit | 6b508aaf86e1d397155ada70bd1678cf5efde9aa (patch) | |
| tree | 6ff8cd3aa44c82263df9ce4dda351163f2568be0 /src/usr/xscom | |
| parent | 3cbec65e0cf56eac08f826d3aa7fa618b9e7c1c9 (diff) | |
| download | talos-hostboot-6b508aaf86e1d397155ada70bd1678cf5efde9aa.tar.gz talos-hostboot-6b508aaf86e1d397155ada70bd1678cf5efde9aa.zip | |
Map BAR attributes based on data from Bootloader
If the master processor has no memory behind it the entire
memory map must be modified. Each processor has its own statically
defined map that covers both memory and MMIOs. If the master
has no memory, its memory map is swapped with another processor.
Each processor gets a new effective fabric id that is then used
to compute all of the BAR values for those processors.
The SBE boots with a certain memory map programmed into the master
processor. That value is then passed up through the bootloader
into Hostboot. This value is compared to the BAR values that
Hostboot assumes it is using. Based on that comparison, various
attributes are computed to match the effective fabric positions.
Change-Id: I2b0d1959c303df8c9c28c8f0a5b5be1e77aa154f
RTC: 173528
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40359
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/usr/xscom')
| -rw-r--r-- | src/usr/xscom/xscom.H | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/src/usr/xscom/xscom.H b/src/usr/xscom/xscom.H index 9472f39d9..b1ceaab6a 100644 --- a/src/usr/xscom/xscom.H +++ b/src/usr/xscom/xscom.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2016 */ +/* Contributors Listed Below - COPYRIGHT 2011,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -31,6 +31,7 @@ #include <stdint.h> #include <limits.h> +#include <arch/memorymap.H> /** * @brief The (fixed) base address value for master proc @@ -38,12 +39,6 @@ constexpr uint64_t MASTER_PROC_XSCOM_BASE_ADDR = 0x000603FC00000000; /** - * @brief Static offsets into other chips - */ -constexpr uint64_t MMIO_OFFSET_PER_CHIP = (4*TERABYTE); -constexpr uint64_t MMIO_OFFSET_PER_GROUP = (32*TERABYTE); - -/** * @brief Type definition for XSCom address and Base */ typedef uint32_t XSComAddress_t; |
