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| author | Matthew Raybuck <matthew.raybuck@ibm.com> | 2019-05-01 08:12:44 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-05-07 09:58:34 -0500 |
| commit | 6390bd34536aa14d814ab07390ef679a1aeff2b2 (patch) | |
| tree | 9ca8a343cc568b2ac13230299836b329c6895d32 /src/usr/vpd | |
| parent | f1b76d406973cffd6276fcbf05a036a0ef31b150 (diff) | |
| download | talos-hostboot-6390bd34536aa14d814ab07390ef679a1aeff2b2.tar.gz talos-hostboot-6390bd34536aa14d814ab07390ef679a1aeff2b2.zip | |
Add keywords for part and serial number for DDIMM
Adds the PART_NUMBER and SERIAL_NUMBER keywords to spdDDR4.H for DDIMM
modules. This way OCMBs don't need to read the ENTIRE_SPD and then index
to the correct spot.
Change-Id: Id0aa805b10305b75fd4f57bb92acb7bbef5667e5
RTC:203788
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76921
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/vpd')
| -rwxr-xr-x | src/usr/vpd/spdDDR4.H | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/usr/vpd/spdDDR4.H b/src/usr/vpd/spdDDR4.H index 0d732fa92..b71eb92e1 100755 --- a/src/usr/vpd/spdDDR4.H +++ b/src/usr/vpd/spdDDR4.H @@ -118,7 +118,7 @@ const KeywordData ddr4Data[] = { BANK_GROUP_BITS, 0x04, 0x01, 0xC0, 0x06, false, false, NA }, { BANK_ADDRESS_BITS_DDR4, 0x04, 0x01, 0x30, 0x04, false, false, NA }, { MODULE_NOMINAL_VOLTAGE_DDR4, 0x0b, 0x01, 0x3F, 0x00, false, false, NA }, - { TIMEBASES_MTB , 0x11, 0x01, 0x0C, 0x02, false, false, NA }, + { TIMEBASES_MTB, 0x11, 0x01, 0x0C, 0x02, false, false, NA }, { TIMEBASES_FTB, 0x11, 0x01, 0x03, 0x00, false, false, NA }, { TCK_MAX, 0x13, 0x01, 0x00, 0x00, false, false, NA }, { CAS_LATENCIES_SUPPORTED_DDR4, 0x17, 0x04, 0x00, 0x00, true, false, NA }, @@ -186,6 +186,8 @@ const KeywordData ddr4Data[] = { LRMM_ODT_RTT_PARK_2400_3200, 0x9a, 0x01, 0x00, 0x00, false, false, LRMM }, { RMM_CRC, 0xff, 0x02, 0x00, 0x00, true, false, RMM }, { LRMM_CRC, 0xff, 0x02, 0x00, 0x00, true, false, LRMM }, + { OCMB_MODULE_PART_NUMBER, 0x209, 0x30, 0x00, 0x00, false, false, DDIMM }, + { OCMB_MODULE_SERIAL_NUMBER, 0x205, 0x04, 0x00, 0x00, false, false, DDIMM }, { ENTIRE_SPD, 0x00, 0x200, 0x00, 0x00, false, false, ALL }, //--------------------------------------------------------------------------------------- }; |
