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authorDan Crowell <dcrowell@us.ibm.com>2012-08-10 14:48:06 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2012-09-16 15:09:40 -0500
commit2f50c376a718ea6542b42e029a6735f719a8f407 (patch)
treef54c4c46d71f1a3226a3e12e69664614ce4db138 /src/usr/testcore
parenta0206bc94f427a1a4e3913fa9122b5530c5500ad (diff)
downloadtalos-hostboot-2f50c376a718ea6542b42e029a6735f719a8f407.tar.gz
talos-hostboot-2f50c376a718ea6542b42e029a6735f719a8f407.zip
Support for Non-zero HRMOR
Changes to kernel code to support detection and use of HRMOR offset in memory Changes to tooling to handle the real memory offset New interface to retrieve the physical address that corresponds to a virtual address To test, run these commands before starting up Hostboot: system_cmp0.cpu0_0_05_0.write-reg HRMOR 0x8000000 proc_venicechip_cmp0.phys_mem.del-map p8Proc0.l3_cache_ram 0 0 RTC: 46032 Change-Id: I50ab248f941218a3a14a8f0fc12a551b56dc7cf3 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1553 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/testcore')
-rw-r--r--src/usr/testcore/kernel/misctest.H54
-rw-r--r--src/usr/testcore/kernel/ptmgrtest.H51
2 files changed, 80 insertions, 25 deletions
diff --git a/src/usr/testcore/kernel/misctest.H b/src/usr/testcore/kernel/misctest.H
index 9a7cbb2ba..e31b3cc9c 100644
--- a/src/usr/testcore/kernel/misctest.H
+++ b/src/usr/testcore/kernel/misctest.H
@@ -26,6 +26,7 @@
#include <sys/misc.h>
#include <kernel/cpumgr.H>
+#include <targeting/common/targetservice.H>
/** @file misctest.H
*
@@ -49,6 +50,59 @@ class MiscTest : public CxxTest::TestSuite
TS_FAIL("LPCR value is not as expected.");
}
}
+
+ /** Tests for mm_virt_to_phys() */
+ void testVirtToPhys()
+ {
+ uint64_t phys = 0;
+ uint64_t hrmor = cpu_spr_value(CPU_SPR_HRMOR);
+
+ // Verify a regular heap address
+ uint8_t* heap = (uint8_t*)malloc(1);
+ *heap = 0xAB; //to make sure it gets paged in
+ phys = mm_virt_to_phys( heap );
+ if( phys != (reinterpret_cast<uint64_t>(heap)|hrmor) )
+ {
+ TS_FAIL("Unexpected Physical Address for Heap.");
+ TS_TRACE( "heap> virt=%p, phys=%lX", (void*)heap, phys );
+ }
+ free(heap);
+
+ // Verify a regular stack address
+ phys = mm_virt_to_phys( (void*)&phys );
+ if( phys < hrmor )
+ {
+ TS_FAIL("Unexpected Physical Address for Stack.");
+ TS_TRACE( "stack> virt=%p, phys=%lX", &phys, phys );
+ }
+
+ // Verify a MMIO (XSCOM)
+ TARGETING::EntityPath epath(TARGETING::EntityPath::PATH_PHYSICAL);
+ epath.addLast(TARGETING::TYPE_SYS,0);
+ epath.addLast(TARGETING::TYPE_NODE,0);
+ epath.addLast(TARGETING::TYPE_PROC,1);
+ TARGETING::Target* l_targ =
+ TARGETING::targetService().toTarget(epath);
+ if(l_targ != NULL)
+ {
+ uint64_t xscom =
+ l_targ->getAttr<TARGETING::ATTR_XSCOM_VIRTUAL_ADDR>();
+ phys = mm_virt_to_phys( (void*)xscom );
+ if( (phys != (1020*TERABYTE+32*GIGABYTE))
+ && (xscom != 0) ) //never got set
+ {
+ TS_FAIL("Unexpected Physical Address for MMIO.");
+ TS_TRACE( "mmio1> virt=%lX, phys=%lX\n", xscom, phys );
+ }
+ }
+
+
+ /* Hardcoded interrupt presenter address for testing on 1-proc model
+ uint64_t intr = 0x20800000000;
+ phys = mm_virt_to_phys( (void*)intr );
+ TS_TRACE( "mmio2> virt=%lX, phys=%lX\n", intr, phys );
+ */
+ }
};
#endif
diff --git a/src/usr/testcore/kernel/ptmgrtest.H b/src/usr/testcore/kernel/ptmgrtest.H
index e97457513..635901318 100644
--- a/src/usr/testcore/kernel/ptmgrtest.H
+++ b/src/usr/testcore/kernel/ptmgrtest.H
@@ -1,25 +1,25 @@
-// IBM_PROLOG_BEGIN_TAG
-// This is an automatically generated prolog.
-//
-// $Source: src/usr/testcore/kernel/ptmgrtest.H $
-//
-// IBM CONFIDENTIAL
-//
-// COPYRIGHT International Business Machines Corp. 2011
-//
-// p1
-//
-// Object Code Only (OCO) source materials
-// Licensed Internal Code Source Materials
-// IBM HostBoot Licensed Internal Code
-//
-// The source code for this program is not published or other-
-// wise divested of its trade secrets, irrespective of what has
-// been deposited with the U.S. Copyright Office.
-//
-// Origin: 30
-//
-// IBM_PROLOG_END
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/testcore/kernel/ptmgrtest.H $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2011,2012 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
#ifndef __PTMGRTEST_H
#define __PTMGRTEST_H
/**
@@ -154,7 +154,8 @@ class ptmgrtest : public CxxTest::TestSuite
TS_TRACE( "Addr=%.16lX, Status=%.16lX", TEST_DATA[x].va, status );
fails++;
}
- else if( (status & PageTableManager::PTE_VALID) && (pn == TEST_DATA[x].page) )
+ else if( (status & PageTableManager::PTE_VALID)
+ && (pn == TEST_DATA[x].page) )
{
PASS_TRACE( "ptmgrtest::test_addEntry> PASS1 : 0x%.16lX", TEST_DATA[x].va );
@@ -162,8 +163,8 @@ class ptmgrtest : public CxxTest::TestSuite
uint64_t va = ptmgr->getVirtAddrFromPTE(pte);
if( va != (TEST_DATA[x].va - TEST_DATA[x].va%4096) )
{
- printk( "ptmgrtest::test_addEntry> ERROR6 : VA doesn't match expected" );
- printk( "Exp=%.16lX, Act=%.16lX", TEST_DATA[x].va, va );
+ TS_FAIL( "ptmgrtest::test_addEntry> ERROR6 : VA doesn't match expected" );
+ TS_TRACE( "Exp=%.16lX, Act=%.16lX", TEST_DATA[x].va, va );
fails++;
}
total++;
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