Support dynamic VID for AVDD, VPP, VCS, VDD memory voltage domains

- Added AVDD, VPP, VCS, VPP voltage domain ID attributes
- Added offset voltage attributes for all 5 memory voltage domains
- Added VPP base voltage attribute
- Added HWP attributes for all 5 memory voltage domain offset calcs
- Added all new attributes to appropriate targets
- Updated MRW parser to populate voltage domain ID attributes
- Updated MRW parser to populate HWP related optional system attributes
- Updated mss_volt istep to set offset voltages for all domains/membufs
- Updated VID compare/equality operators to handle voltage domain type
- Updated VID populator to add VID programming info from all domains
- Updated VID messages to populate and receive voltage domain type
- Added dynamic VID HWPs, attributes, error XML files

Change-Id: I58f9eb13e4083b192d99308b8314cda0c1078800
RTC: 99246
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11091
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

3 files changed, 812 insertions, 88 deletions

diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl
index 031752633..a93c4a12e 100755
--- a/src/usr/targeting/common/genHwsvMrwXml.pl
+++ b/src/usr/targeting/common/genHwsvMrwXml.pl
@@ -122,7 +122,6 @@ if ($sysname =~ /brazos/)
     $placement = 0x3; #DRAWER
 }
 
-
 push @systemAttr,
 [
     "FREQ_PROC_REFCLOCK", $reqPol->{'processor-refclock-frequency'}->{content},
@@ -219,6 +218,61 @@ if ($MAXNODE > 1 && $sysname !~ m/mfg/)
     push @systemAttr, ["DO_ABUS_DECONFIG", 0];
 }
 
+# Process optional policies related to dyanmic VID
+my $optMrwPolicies = $sysPolicy->{"optional-policy-settings"};
+use constant MRW_NAME => 'mrw-name';
+
+my %optTargPolicies = ();
+$optTargPolicies{'MSS_CENT_AVDD_OFFSET_DISABLE'}{MRW_NAME}
+    = "mem_avdd_offset_disable" ;
+$optTargPolicies{'MSS_CENT_VDD_OFFSET_DISABLE'}{MRW_NAME}
+    = "mem_vdd_offset_disable" ;
+$optTargPolicies{'MSS_CENT_VCS_OFFSET_DISABLE'}{MRW_NAME}
+    = "mem_vcs_offset_disable" ;
+$optTargPolicies{'MSS_VOLT_VPP_OFFSET_DISABLE'}{MRW_NAME}
+    = "mem_vpp_offset_disable" ;
+$optTargPolicies{'MSS_VOLT_VDDR_OFFSET_DISABLE'}{MRW_NAME}
+    = "mem_vddr_offset_disable" ;
+$optTargPolicies{'MSS_CENT_AVDD_SLOPE_ACTIVE'}{MRW_NAME}
+    = "mem_avdd_slope_active" ;
+$optTargPolicies{'MSS_CENT_AVDD_SLOPE_INACTIVE'}{MRW_NAME}
+    = "mem_avdd_slope_inactive" ;
+$optTargPolicies{'MSS_CENT_AVDD_INTERCEPT'}{MRW_NAME}
+    = "mem_avdd_intercept" ;
+$optTargPolicies{'MSS_CENT_VDD_SLOPE_ACTIVE'}{MRW_NAME}
+    = "mem_vdd_slope_active" ;
+$optTargPolicies{'MSS_CENT_VDD_SLOPE_INACTIVE'}{MRW_NAME}
+    = "mem_vdd_slope_inactive" ;
+$optTargPolicies{'MSS_CENT_VDD_INTERCEPT'}{MRW_NAME}
+    = "mem_vdd_intercept" ;
+$optTargPolicies{'MSS_CENT_VCS_SLOPE_ACTIVE'}{MRW_NAME}
+    = "mem_vcs_slope_active" ;
+$optTargPolicies{'MSS_CENT_VCS_SLOPE_INACTIVE'}{MRW_NAME}
+    = "mem_vcs_slope_inactive" ;
+$optTargPolicies{'MSS_CENT_VCS_INTERCEPT'}{MRW_NAME}
+    = "mem_vcs_intercept" ;
+$optTargPolicies{'MSS_VOLT_VPP_SLOPE'}{MRW_NAME}
+    = "mem_vpp_slope" ;
+$optTargPolicies{'MSS_VOLT_VPP_INTERCEPT'}{MRW_NAME}
+    = "mem_vpp_intercept" ;
+$optTargPolicies{'MSS_VOLT_DDR3_VDDR_SLOPE'}{MRW_NAME}
+    = "mem_ddr3_vddr_slope" ;
+$optTargPolicies{'MSS_VOLT_DDR3_VDDR_INTERCEPT'}{MRW_NAME}
+    = "mem_ddr3_vddr_intercept" ;
+$optTargPolicies{'MSS_VOLT_DDR4_VDDR_SLOPE'}{MRW_NAME}
+    = "mem_ddr4_vddr_slope" ;
+$optTargPolicies{'MSS_VOLT_DDR4_VDDR_INTERCEPT'}{MRW_NAME}
+    = "mem_ddr4_vddr_intercept" ;
+
+foreach my $policy ( keys %optTargPolicies )
+{
+    if(exists $optMrwPolicies->{ $optTargPolicies{$policy}{MRW_NAME}})
+    {
+        push @systemAttr, [ $policy ,
+          $optMrwPolicies->{$optTargPolicies{$policy}{MRW_NAME}}];
+    }
+}
+
 #------------------------------------------------------------------------------
 # Process the pm-settings MRW file
 #------------------------------------------------------------------------------
@@ -458,60 +512,100 @@ foreach my $dmi (@{$dmibus->{'dmi-bus'}})
 # Process the cent-vrds MRW file
 #------------------------------------------------------------------------------
 my $cent_vrds_file = open_mrw_file($mrwdir, "${sysname}-cent-vrds.xml");
-my $vmemCentaur = XMLin($cent_vrds_file);
-
-# Capture all pnor attributes into the @unsortedPnorTargets array
-use constant VMEM_DEV_PATH_FIELD => 0;
-use constant VMEM_I2C_ADDR_FIELD => 1;
-use constant VMEM_ID_FIELD => 2;
-use constant VMEM_NODE_FIELD => 3;
-use constant VMEM_POS_FIELD => 4;
+my $mrwMemVoltageDomains = XMLin($cent_vrds_file);
+
+our %vrmHash = ();
+my %membufVrmUuidHash = ();
+my %vrmIdHash = ();
+my %validVrmTypes
+    = ('VMEM' => 1,'AVDD' => 1,'VCS' => 1,'VPP' => 1,'VDD' => 1);
+use constant VRM_I2C_DEVICE_PATH => 'vrmI2cDevicePath';
+use constant VRM_I2C_ADDRESS => 'vrmI2cAddress';
+use constant VRM_DOMAIN_TYPE => 'vrmDomainType';
+use constant VRM_DOMAIN_ID => 'vrmDomainId';
+use constant VRM_UUID => 'vrmUuid';
+
+foreach my $mrwMemVoltageDomain (
+    @{$mrwMemVoltageDomains->{'centaur-vrd-connection'}})
+{
+    if(   (!exists $mrwMemVoltageDomain->{'vrd'}->{'i2c-dev-path'})
+       || (!exists $mrwMemVoltageDomain->{'vrd'}->{'i2c-address'})
+       || (ref($mrwMemVoltageDomain->{'vrd'}->{'i2c-dev-path'}) eq "HASH")
+       || (ref($mrwMemVoltageDomain->{'vrd'}->{'i2c-address'}) eq "HASH")
+       || ($mrwMemVoltageDomain->{'vrd'}->{'i2c-dev-path'} eq "")
+       || ($mrwMemVoltageDomain->{'vrd'}->{'i2c-address'} eq ""))
+    {
+        next;
+    }
 
-my $vmemId = 0x0;
+    my $vrmDev  = $mrwMemVoltageDomain->{'vrd'}->{'i2c-dev-path'};
+    my $vrmAddr = $mrwMemVoltageDomain->{'vrd'}->{'i2c-address'};
+    my $vrmType = uc $mrwMemVoltageDomain->{'vrd'}->{'type'};
+    my $membufInstance =
+        "n"  . $mrwMemVoltageDomain->{'centaur'}->{'target'}->{'node'} .
+        ":p" . $mrwMemVoltageDomain->{'centaur'}->{'target'}->{'position'};
 
-my @unsortedVmem;
-my @vmemArray;
-my @vmemDevAddr;
-my $vmemValue =0;
-my $found=0;
-my $loc=0;
-my $newValue =0;
+    if(!exists $validVrmTypes{$vrmType})
+    {
+        die "Illegal VRM type of $vrmType used\n";
+    }
 
-foreach my $i (@{$vmemCentaur->{'centaur-vrd-connection'}})
-{
-    my $vmemDev = $i->{'vrd'}->{'i2c-dev-path'};
-    my $vmemAddr = $i->{'vrd'}->{'i2c-address'};
+    if(!exists $vrmIdHash{$vrmType})
+    {
+        $vrmIdHash{$vrmType} = 0;
+    }
 
-    for my $j (0 .. $#vmemDevAddr)
+    my $uuid = -1;
+    foreach my $vrm ( keys %vrmHash )
     {
-        if ( ($vmemDev eq $vmemDevAddr[$j][VMEM_DEV_PATH_FIELD]) &&
-             ($vmemAddr eq $vmemDevAddr[$j][VMEM_I2C_ADDR_FIELD]) )
+        if(   ($vrmHash{$vrm}{VRM_I2C_DEVICE_PATH} eq $vrmDev )
+           && ($vrmHash{$vrm}{VRM_I2C_ADDRESS}     eq $vrmAddr)
+           && ($vrmHash{$vrm}{VRM_DOMAIN_TYPE}     eq $vrmType) )
         {
-            $found =1;
-            $vmemValue=$vmemDevAddr[$j][VMEM_ID_FIELD];
+            $uuid = $vrm;
             last;
         }
-        else
-        {
-            $found=0;
-        }
+
     }
-    if ($found ==0)
+
+    if($uuid == -1)
     {
-        $vmemValue=$newValue++;
-        push (@vmemDevAddr,[$vmemDev, $vmemAddr, $vmemValue]);
+        my $vrm = scalar keys %vrmHash;
+        $vrmHash{$vrm}{VRM_I2C_DEVICE_PATH} = $vrmDev;
+        $vrmHash{$vrm}{VRM_I2C_ADDRESS} = $vrmAddr;
+        $vrmHash{$vrm}{VRM_DOMAIN_TYPE} = $vrmType;
+        $vrmHash{$vrm}{VRM_DOMAIN_ID} =
+            $vrmIdHash{$vrmType}++;
+        $uuid = $vrm;
     }
 
-
-    my $vmemNode = $i->{'centaur'}->{'target'}->{'node'};
-    my $vmemPosition = $i->{'centaur'}->{'target'}->{'position'};
-
-    push (@unsortedVmem,[$vmemDev, $vmemAddr, $vmemValue, $vmemNode,
-                         $vmemPosition]);
+    $membufVrmUuidHash{$membufInstance}{$vrmType}{VRM_UUID} = $uuid;
 }
 
+my $vrmDebug = 0;
+if($vrmDebug)
+{
+    foreach my $membuf ( keys %membufVrmUuidHash)
+    {
+        print STDOUT "Membuf instance: " . $membuf . "\n";
 
-my @SortedVmem = sort byVmemNodePos @unsortedVmem;
+        foreach my $vrmType ( keys %{$membufVrmUuidHash{$membuf}} )
+        {
+            print STDOUT "VRM type: " . $vrmType . "\n";
+            print STDOUT "VRM UUID: " .
+                $membufVrmUuidHash{$membuf}{$vrmType}{VRM_UUID} . "\n";
+        }
+    }
+
+    foreach my $vrm ( keys %vrmHash)
+    {
+        print STDOUT "VRM UUID: " . $vrm . "\n";
+        print STDOUT "VRM type: " . $vrmHash{$vrm}{VRM_DOMAIN_TYPE} . "\n";
+        print STDOUT "VRM id: " . $vrmHash{$vrm}{VRM_DOMAIN_ID} . "\n";
+        print STDOUT "VRM dev: " . $vrmHash{$vrm}{VRM_I2C_DEVICE_PATH} . "\n";
+        print STDOUT "VRM addr: " .  $vrmHash{$vrm}{VRM_I2C_ADDRESS} . "\n";
+    }
+}
 
 #------------------------------------------------------------------------------
 # Process the cec-chips and pcie-busses MRW files
@@ -1021,7 +1115,6 @@ my @fru_paths;
 my $hasProc = 0;
 my $hash_ax_buses;
 my $axBusesHuidInit = 0;
-my $vmem_count =0;
 
 for (my $curnode = 0; $curnode <= $MAXNODE; $curnode++)
 {
@@ -1260,7 +1353,6 @@ for (my $do_core = 0, my $i = 0; $i <= $#STargets; $i++)
 my $memb;
 my $membMcs;
 my $mba_count = 0;
-my $vmem_id =0;
 
 for my $i ( 0 .. $#STargets )
 {
@@ -1321,17 +1413,9 @@ for my $i ( 0 .. $#STargets )
         my $relativeCentaurRid = $STargets[$i][PLUG_POS]
             + (CDIMM_RID_NODE_MULTIPLIER * $STargets[$i][NODE_FIELD]);
 
-        #should note that the $SortedVmem is sorted by node and position and
-        #currently $STargets is also sorted by node and postion. If this ever
-        #changes then will need to make a modification here
-        my $vmemDevPath=$SortedVmem[$vmem_count][VMEM_DEV_PATH_FIELD];
-        my $vmemAddr=$SortedVmem[$vmem_count][VMEM_I2C_ADDR_FIELD];
-        my $vmem_id=$SortedVmem[$vmem_count][VMEM_ID_FIELD];
-        $vmem_count++;
-
         generate_centaur( $memb, $membMcs, \@fsi, \@altfsi, $ipath,
                           $STargets[$i][ORDINAL_FIELD],$relativeCentaurRid,
-                          $vmem_id, $vmemDevPath, $vmemAddr, $ipath);
+                          $ipath, $membufVrmUuidHash{"n${node}:p${memb}"});
     }
     elsif ($STargets[$i][NAME_FIELD] eq "mba")
     {
@@ -1651,37 +1735,6 @@ sub byNodePos($$)
     return $retVal;
 }
 
-################################################################################
-# Compares two Vmem instances based on the node and position #
-################################################################################
-sub byVmemNodePos($$)
-{
-    my $retVal = -1;
-
-    my $lhsInstance_node = $_[0][VMEM_NODE_FIELD];
-    my $rhsInstance_node = $_[1][VMEM_NODE_FIELD];
-    if(int($lhsInstance_node) eq int($rhsInstance_node))
-    {
-         my $lhsInstance_pos = $_[0][VMEM_POS_FIELD];
-         my $rhsInstance_pos = $_[1][VMEM_POS_FIELD];
-         if(int($lhsInstance_pos) eq int($rhsInstance_pos))
-         {
-                die "ERROR: Duplicate vmem positions: 2 vmem with same
-                    node and position, \
-                    NODE: $lhsInstance_node POSITION: $lhsInstance_pos\n";
-         }
-         elsif(int($lhsInstance_pos) > int($rhsInstance_pos))
-         {
-             $retVal = 1;
-         }
-    }
-    elsif(int($lhsInstance_node) > int($rhsInstance_node))
-    {
-        $retVal = 1;
-    }
-    return $retVal;
-}
-
 sub generate_sys
 {
     my $plat = 0;
@@ -3035,7 +3088,8 @@ sub generate_logicalDimms
 sub generate_centaur
 {
     my ($ctaur, $mcs, $fsiA, $altfsiA, $ipath, $ordinalId, $relativeCentaurRid,
-            $vmemId, $vmemDevPath, $vmemAddr, $ipath) = @_;
+        $ipath, $membufVrmUuidHash) = @_;
+
     my @fsi = @{$fsiA};
     my @altfsi = @{$altfsiA};
     my $scomFspApath = $devpath->{chip}->{$ipath}->{'scom-path-a'};
@@ -3107,10 +3161,6 @@ sub generate_centaur
         <default>instance:$ipath</default>
     </compileAttribute>
     <attribute>
-        <id>VMEM_ID</id>
-        <default>$vmemId</default>
-    </attribute>
-    <attribute>
         <id>EI_BUS_TX_MSBSWAP</id>
         <default>$msb_swap</default>
     </attribute>";
@@ -3192,10 +3242,21 @@ sub generate_centaur
         <default>$lane_swap</default>
     </attribute>";
 
+    foreach my $vrmType ( keys %$membufVrmUuidHash )
+    {
+        my $key = $membufVrmUuidHash->{$vrmType}{VRM_UUID};
+        print
+              "\n"
+            . "    <attribute>\n"
+            . "        <id>$vrmType" . "_ID</id>\n"
+            . "        <default>$vrmHash{$key}{VRM_DOMAIN_ID}</default>\n"
+            . "    </attribute>";
+    }
+
     # call to do any fsp per-centaur attributes
     do_plugin('fsp_centaur', $scomFspApath, $scomFspAsize, $scanFspApath,
        $scanFspAsize, $scomFspBpath, $scomFspBsize, $scanFspBpath,
-       $scanFspBsize, $vmemDevPath, $vmemAddr, $relativeCentaurRid, $ordinalId);
+       $scanFspBsize, $relativeCentaurRid, $ordinalId, $membufVrmUuidHash);
 
     print "\n</targetInstance>\n";
 
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
index 2887cccc0..d5be9f15c 100644
--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
+++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
@@ -5737,6 +5737,74 @@ firmware notes: Used as override attribute for pstate procedure
 </attribute>
 
 <attribute>
+    <id>AVDD_ID</id>
+    <description>
+        Memory AVDD voltage domain ID.  All memory buffers in the same AVDD
+        voltage domain will share the same ID.  IDs are arbitrarily assigned,
+        used for correlation between HB + HWSV, and are generated by
+        genHwsvMrwXml.pl
+    </description>
+    <simpleType>
+        <uint16_t>
+            <default>0</default>
+        </uint16_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>VDD_ID</id>
+    <description>
+        Memory VDD voltage domain ID.  All memory buffers in the same VDD
+        voltage domain will share the same ID.  IDs are arbitrarily assigned,
+        used for correlation between HB + HWSV, and are generated by
+        genHwsvMrwXml.pl
+    </description>
+    <simpleType>
+        <uint16_t>
+            <default>0</default>
+        </uint16_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>VCS_ID</id>
+    <description>
+        Memory VCS voltage domain ID.  All memory buffers in the same VCS
+        voltage domain will share the same ID.  IDs are arbitrarily assigned,
+        used for correlation between HB + HWSV, and are generated by
+        genHwsvMrwXml.pl
+    </description>
+    <simpleType>
+        <uint16_t>
+            <default>0</default>
+        </uint16_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>VPP_ID</id>
+    <description>
+        Memory VPP voltage domain ID.  All memory buffers in the same VPP
+        voltage domain will share the same ID.  IDs are arbitrarily assigned,
+        used for correlation between HB + HWSV, and are generated by
+        genHwsvMrwXml.pl
+    </description>
+    <simpleType>
+        <uint16_t>
+            <default>0</default>
+        </uint16_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
     <id>VMEM_ID</id>
     <description>Voltage Memory Rail Manager ID.  Currently HB only needs
         to configured the Vmem voltage rail manger during the IPL.  The ID
@@ -6130,6 +6198,25 @@ firmware notes: Used as override attribute for pstate procedure
 </attribute>
 
 <attribute>
+    <id>VPP_BASE</id>
+    <description>
+        DRAM VPP voltage domain base voltage in mV.  Managed by HWPs.
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VOLT_VPP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
     <id>MSS_FREQ</id>
     <description>Frequency of memory channel in MHz. Initialized and used by HWPs.</description>
     <simpleType>
@@ -12101,4 +12188,546 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript
     <readable/>
 </attribute>
 
+<attribute>
+    <id>MEM_AVDD_OFFSET_MILLIVOLTS</id>
+    <description>Memory AVDD voltage domain offset in mV.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_AVDD_OFFSET</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MEM_VDD_OFFSET_MILLIVOLTS</id>
+    <description>Memory VDD voltage domain offset in mV.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VDD_OFFSET</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MEM_VCS_OFFSET_MILLIVOLTS</id>
+    <description>Memory VCS voltage domain offset in mV.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VCS_OFFSET</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MEM_VPP_OFFSET_MILLIVOLTS</id>
+    <description>Memory VPP voltage domain offset in mV.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VPP_OFFSET</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MEM_VDDR_OFFSET_MILLIVOLTS</id>
+    <description>Memory VDDR voltage domain offset in mV.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VDDR_OFFSET</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_AVDD_OFFSET_DISABLE</id>
+    <description>
+        Boolean indicating whether to disable configuring VDDR offset voltage
+        for memory voltage domains.
+            0x00 = Enable VDDR offset voltage for memory voltage domains
+            0x01 = Disable VDDR offset voltage for memory voltage domains
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>1</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_AVDD_OFFSET_DISABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_VDD_OFFSET_DISABLE</id>
+    <description>
+        Boolean indicating whether to disable configuring VDD offset voltage
+        for memory voltage domains.
+            0x00 = Enable VDD offset voltage for memory voltage domains
+            0x01 = Disable VDD offset voltage for memory voltage domains
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>1</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VDD_OFFSET_DISABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_VCS_OFFSET_DISABLE</id>
+    <description>
+        Boolean indicating whether to disable configuring VCS offset voltage
+        for memory voltage domains.
+            0x00 = Enable VCS offset voltage for memory voltage domains
+            0x01 = Disable VCS offset voltage for memory voltage domains
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>1</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VCS_OFFSET_DISABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_VPP_OFFSET_DISABLE</id>
+    <description>
+        Boolean indicating whether to disable configuring VPP offset voltage
+        for memory voltage domains.
+            0x00 = Enable VPP offset voltage for memory voltage domains
+            0x01 = Disable VPP offset voltage for memory voltage domains
+        If disabled, Hostboot will send VPP_BASE in place of this to program the
+        VPP voltage domain.
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>1</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VPP_OFFSET_DISABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_VDDR_OFFSET_DISABLE</id>
+    <description>
+        Boolean indicating whether to disable configuring VDDR offset voltage
+        for memory voltage domains.
+            0x00 = Enable VDDR offset voltage for memory voltage domains
+            0x01 = Disable VDDR offset voltage for memory voltage domains
+        If disabled, Hostboot will send MSS_VOLT in place of this to program the
+        VDDR voltage domain.
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>1</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VDDR_OFFSET_DISABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_AVDD_SLOPE_ACTIVE</id>
+    <description>Units: uV/Membuf
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_AVDD_SLOPE_ACTIVE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_AVDD_SLOPE_INACTIVE</id>
+    <description>Units: uV/Membuf
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_AVDD_SLOPE_INACTIVE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_AVDD_INTERCEPT</id>
+    <description>Units: mV
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_AVDD_SLOPE_INTERCEPT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_VDD_SLOPE_ACTIVE</id>
+    <description>Units: uV/Membuf
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VDD_SLOPE_ACTIVE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_VDD_SLOPE_INACTIVE</id>
+    <description>Units: uV/Membuf
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VDD_SLOPE_INACTIVE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_VDD_INTERCEPT</id>
+    <description>Units: mV
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VDD_SLOPE_INTERCEPT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_VCS_SLOPE_ACTIVE</id>
+    <description>Units: uV/Membuf
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VCS_SLOPE_ACTIVE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_VCS_SLOPE_INACTIVE</id>
+    <description>Units: uV/Membuf
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VCS_SLOPE_INACTIVE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_VCS_INTERCEPT</id>
+    <description>Units: mV
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VCS_SLOPE_INTERCEPT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_VPP_SLOPE</id>
+    <description>Units: uV/DRAM
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VPP_SLOPE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_VPP_INTERCEPT</id>
+    <description>Units: mV
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VPP_SLOPE_INTERCEPT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_DDR3_VDDR_SLOPE</id>
+    <description>Units: 1/Amps
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_DDR3_VDDR_SLOPE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_DDR3_VDDR_INTERCEPT</id>
+    <description>Units: mV
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_DDR3_VDDR_INTERCEPT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_DDR4_VDDR_SLOPE</id>
+    <description>Units: 1/Amps
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_DDR4_VDDR_SLOPE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_DDR4_VDDR_INTERCEPT</id>
+    <description>Units: mV
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_DDR4_VDDR_INTERCEPT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_OVERRIDE</id>
+    <description>
+        Voltage override for MSS_VOLT.  Used for membuf lab debug.
+
+        0x00 = None (default), no override
+        0x01 = 1.35V
+        0x02 = 1.20V
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VOLT_OVERRIDE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_VDDR_OVERIDE_SPD</id>
+    <description>
+        DIMM SPD voltage override for VDDR voltage calculations.
+        Used for lab debug.
+
+        0x00 = None (default), no override
+        0x01 = 1.35V
+        0x02 = 1.20V
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VDDR_OVERIDE_SPD</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_POWER_CONTROL_REQUESTED</id>
+    <description>
+        Type of memory power control requested
+
+        0x00 = Off
+        0x01 = SLOWEXIT
+        0x02 = FASTEXIT
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0x00</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_POWER_CONTROL_REQUESTED</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_POWER_CONTROL_CAPABLE</id>
+    <description>
+        Supported memory power control types
+
+        0x00 = NONE
+        0x01 = SLOWEXIT_CAPABLE
+        0x02 = FASTEXIT_CAPABLE
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0x00</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_POWER_CONTROL_CAPABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
 </attributes>
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml
index 1b8db96b2..cb412fef2 100644
--- a/src/usr/targeting/common/xmltohb/target_types.xml
+++ b/src/usr/targeting/common/xmltohb/target_types.xml
@@ -247,6 +247,27 @@
     <attribute><id>PM_HWP_ATTR_VERSION</id></attribute>
     <attribute><id>DO_ABUS_DECONFIG</id></attribute>
     <attribute><id>REDUNDANT_CLOCKS</id></attribute>
+    <attribute><id>MSS_VOLT_VDDR_OFFSET_DISABLE</id></attribute>
+    <attribute><id>MSS_VOLT_VPP_OFFSET_DISABLE</id></attribute>
+    <attribute><id>MSS_CENT_VDD_OFFSET_DISABLE</id></attribute>
+    <attribute><id>MSS_CENT_VCS_OFFSET_DISABLE</id></attribute>
+    <attribute><id>MSS_CENT_AVDD_OFFSET_DISABLE</id></attribute>
+    <attribute><id>MSS_CENT_AVDD_SLOPE_ACTIVE</id></attribute>
+    <attribute><id>MSS_CENT_AVDD_SLOPE_INACTIVE</id></attribute>
+    <attribute><id>MSS_CENT_AVDD_INTERCEPT</id></attribute>
+    <attribute><id>MSS_CENT_VDD_SLOPE_ACTIVE</id></attribute>
+    <attribute><id>MSS_CENT_VDD_SLOPE_INACTIVE</id></attribute>
+    <attribute><id>MSS_CENT_VDD_INTERCEPT</id></attribute>
+    <attribute><id>MSS_CENT_VCS_SLOPE_ACTIVE</id></attribute>
+    <attribute><id>MSS_CENT_VCS_SLOPE_INACTIVE</id></attribute>
+    <attribute><id>MSS_CENT_VCS_INTERCEPT</id></attribute>
+    <attribute><id>MSS_VOLT_VPP_SLOPE</id></attribute>
+    <attribute><id>MSS_VOLT_VPP_INTERCEPT</id></attribute>
+    <attribute><id>MSS_VOLT_DDR3_VDDR_SLOPE</id></attribute>
+    <attribute><id>MSS_VOLT_DDR3_VDDR_INTERCEPT</id></attribute>
+    <attribute><id>MSS_VOLT_DDR4_VDDR_SLOPE</id></attribute>
+    <attribute><id>MSS_VOLT_DDR4_VDDR_INTERCEPT</id></attribute>
+    <attribute><id>MSS_VDDR_OVERIDE_SPD</id></attribute>
 </targetType>
 
 <targetType>
@@ -1109,6 +1130,12 @@
     </attribute>
     <attribute><id>EEPROM_VPD_PRIMARY_INFO</id></attribute>
     <attribute><id>MSS_VOLT</id></attribute>
+    <attribute><id>VPP_BASE</id></attribute>
+    <attribute><id>MEM_VDDR_OFFSET_MILLIVOLTS</id></attribute>
+    <attribute><id>MEM_AVDD_OFFSET_MILLIVOLTS</id></attribute>
+    <attribute><id>MEM_VDD_OFFSET_MILLIVOLTS</id></attribute>
+    <attribute><id>MEM_VCS_OFFSET_MILLIVOLTS</id></attribute>
+    <attribute><id>MEM_VPP_OFFSET_MILLIVOLTS</id></attribute>
     <attribute><id>MSS_FREQ</id></attribute>
     <attribute><id>MSS_LAB_OVERRIDE_FOR_MEM_PLL</id></attribute>
     <attribute><id>ECID</id></attribute>
@@ -1124,6 +1151,10 @@
     </attribute>
     <attribute><id>MSS_CACHE_ENABLE</id></attribute>
     <attribute><id>VMEM_ID</id></attribute>
+    <attribute><id>AVDD_ID</id></attribute>
+    <attribute><id>VDD_ID</id></attribute>
+    <attribute><id>VCS_ID</id></attribute>
+    <attribute><id>VPP_ID</id></attribute>
     <attribute><id>EI_BUS_TX_LANE_INVERT</id></attribute>
      <!-- Begin poreve_memory_attributes.xml -->
      <attribute><id>SBE_SEEPROM_I2C_ADDRESS_BYTES</id></attribute>
@@ -1144,6 +1175,9 @@
     <attribute><id>MSS_NEST_CAPABLE_FREQUENCIES</id></attribute>
     <attribute><id>MSS_DERIVED_MBA_ADDR_INTERLEAVE_BIT</id></attribute>
     <attribute><id>MSS_DERIVED_MBA_CACHELINE_INTERLEAVE_MODE</id></attribute>
+    <attribute><id>MSS_VOLT_OVERRIDE</id></attribute>
+    <attribute><id>MSS_POWER_CONTROL_REQUESTED</id></attribute>
+    <attribute><id>MSS_POWER_CONTROL_CAPABLE</id></attribute>
 </targetType>
 
 <!-- Centaur L4 -->