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author | Matt Derksen <v2cibmd@us.ibm.com> | 2016-12-21 16:42:34 -0600 |
---|---|---|
committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2016-12-22 15:25:52 -0500 |
commit | e2ec30e3f338198a85a044507c0dc11f4d19ea80 (patch) | |
tree | 7069a6705ca3769258e6ad7839d1c89969398cae /src/usr/targeting | |
parent | 3c33d80c0f8a1b23330e45dc793b7c371895bb3f (diff) | |
download | talos-hostboot-e2ec30e3f338198a85a044507c0dc11f4d19ea80.tar.gz talos-hostboot-e2ec30e3f338198a85a044507c0dc11f4d19ea80.zip |
gerrit30556> Remove unused PCIE values from the attribute file
Remove these 20 attributes
1) ATTR_PROC_PCIE_IOP_G3_PLL_CONTROL0
2) ATTR_PROC_PCIE_IOP_G2_PLL_CONTROL0
3) ATTR_PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0
4) ATTR_PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1
5) ATTR_PROC_PCIE_IOP_PCS_CONTROL0
6) ATTR_PROC_PCIE_IOP_PCS_CONTROL1
7) ATTR_PROC_PCIE_IOP_TX_FIFO_OFFSET
8) ATTR_PROC_PCIE_IOP_TX_RCVRDETCNTL
9) ATTR_PROC_PCIE_IOP_TX_BWLOSS1
10) ATTR_PROC_PCIE_IOP_RX_VGA_CONTROL2
11) ATTR_PROC_PCIE_IOP_RX_PEAK
12) ATTR_PROC_PCIE_IOP_RX_SDL
13) ATTR_PROC_PCIE_IOP_TX_FFE_GEN1
14) ATTR_PROC_PCIE_IOP_TX_FFE_GEN2
15) ATTR_PROC_PCIE_IOP_ZCAL_CONTROL
16) ATTR_PROC_PCIE_HOTPLUG_I2C_DEVICE_ADDRESS
17) ATTR_PROC_PCIE_HOTPLUG_ENABLE_ACTIONS
18) ATTR_PROC_PCIE_HOTPLUG_NUM_ENABLE_ACTIONS
19) ATTR_PROC_PCIE_HOTPLUG_DISABLE_ACTIONS
20) ATTR_PROC_PCIE_HOTPLUG_NUM_DISABLE_ACTIONS
Change-Id: I1dd1db2562414e6ab87fc65c2ff67fdb3168b5b1
RTC:162147
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34154
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/usr/targeting')
-rw-r--r-- | src/usr/targeting/common/Targets.pm | 17 | ||||
-rw-r--r-- | src/usr/targeting/common/xmltohb/attribute_types.xml | 440 |
2 files changed, 0 insertions, 457 deletions
diff --git a/src/usr/targeting/common/Targets.pm b/src/usr/targeting/common/Targets.pm index 457f80dfe..8d4bbccf5 100644 --- a/src/usr/targeting/common/Targets.pm +++ b/src/usr/targeting/common/Targets.pm @@ -293,24 +293,9 @@ sub printAttribute $filter{CARD_TYPE} = 1; $filter{PROC_PCIE_DSMP_CAPABLE} = 1; $filter{PROC_PCIE_IOP_CONFIG} = 1; - $filter{PROC_PCIE_IOP_G2_PLL_CONTROL0} = 1; - $filter{PROC_PCIE_IOP_G3_PLL_CONTROL0} = 1; - $filter{PROC_PCIE_IOP_PCS_CONTROL0} = 1; - $filter{PROC_PCIE_IOP_PCS_CONTROL1} = 1; - $filter{PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0} = 1; - $filter{PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1} = 1; $filter{PROC_PCIE_IOP_REVERSAL} = 1; $filter{PROC_PCIE_IOP_REVERSAL_BIFURCATED} = 1; $filter{PROC_PCIE_IOP_REVERSAL_NON_BIFURCATED} = 1; - $filter{PROC_PCIE_IOP_RX_PEAK} = 1; - $filter{PROC_PCIE_IOP_RX_SDL} = 1; - $filter{PROC_PCIE_IOP_RX_VGA_CONTROL2} = 1; - $filter{PROC_PCIE_IOP_TX_BWLOSS1} = 1; - $filter{PROC_PCIE_IOP_TX_FFE_GEN1} = 1; - $filter{PROC_PCIE_IOP_TX_FFE_GEN2} = 1; - $filter{PROC_PCIE_IOP_TX_FIFO_OFFSET} = 1; - $filter{PROC_PCIE_IOP_TX_RCVRDETCNTL} = 1; - $filter{PROC_PCIE_IOP_ZCAL_CONTROL} = 1; $filter{NPU_MMIO_BAR_SIZE} = 1; $filter{NPU_MMIO_BAR_BASE_ADDR} = 1; $filter{PROC_PCIE_REFCLOCK_ENABLE} = 1; @@ -319,12 +304,10 @@ sub printAttribute $filter{STANDBY_PLUGGABLE} = 1; $filter{CPM_INFLECTION_POINTS} = 1; $filter{PROC_FABRIC_X_ATTACHED_CHIP_CNFG} = 1; - $filter{PROC_PCIE_HOTPLUG_DISABLE_ACTIONS} = 1; $filter{SYSTEM_RESCLK_VALUE} = 1; $filter{HWAS_STATE} = 1; $filter{PROC_MIRROR_SIZES} = 1; $filter{PROC_FABRIC_X_ADDR_DIS} = 1; - $filter{PROC_PCIE_HOTPLUG_ENABLE_ACTIONS} = 1; $filter{PROC_FABRIC_A_ATTACHED_LINK_ID} = 1; $filter{PROC_MEM_BASES} = 1; $filter{UNIT_TEST_MCA_MEMORY_SIZES} = 1; diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index cfa217672..c95363f7c 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -21604,131 +21604,7 @@ Measured in GB</description> <macro>DIRECT</macro> </hwpfToHbAttrMap> </attribute> -<attribute> - <id>PROC_PCIE_HOTPLUG_I2C_DEVICE_ADDRESS</id> - <!-- TARGET_TYPE_PROC_CHIP --> - <description> - I2C device address for PCIE hotplug controller - creator: platform - consumer: p9_pcie_hotplug - </description> - <simpleType> - <uint8_t></uint8_t> - </simpleType> - <persistency>non-volatile</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_HOTPLUG_I2C_DEVICE_ADDRESS</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> -<attribute> - <id>PROC_PCIE_HOTPLUG_ENABLE_ACTIONS</id> - <!-- TARGET_TYPE_PROC_CHIP --> - <description> - Sequence of PCIE hotplug controller register writes required to enable - slot power - creator: platform - consumer: p9_pcie_hotplug - firmware notes: - Primary array index: Sequence number - Secondary array index: Address (0) / Data (1) - </description> - <simpleType> - <uint8_t></uint8_t> - <array>8,2</array> - </simpleType> - <persistency>non-volatile</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_HOTPLUG_ENABLE_ACTIONS</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PROC_PCIE_HOTPLUG_NUM_ENABLE_ACTIONS</id> - <!-- TARGET_TYPE_PROC_CHIP --> - <description> - Number of valid entries in primary index of - ATTR_PROC_PCIE_HOTPLUG_ENABLE_ACTIONS - creator: platform - consumer: p9_pcie_hotplug - ZERO = 0x0, - ONE = 0x1, - TWO = 0x2, - THREE = 0x3, - FOUR = 0x4, - FIVE = 0x5, - SIX = 0x6, - SEVEN = 0x7, - EIGHT = 0x8 - </description> - <simpleType> - <uint8_t></uint8_t> - </simpleType> - <persistency>non-volatile</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_HOTPLUG_NUM_ENABLE_ACTIONS</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PROC_PCIE_HOTPLUG_DISABLE_ACTIONS</id> - <!-- TARGET_TYPE_PROC_CHIP --> - <description> - Sequence of PCIE hotplug controller register writes required to disable - slot power - creator: platform - consumer: p9_pcie_hotplug - firmware notes: - Primary array index: Sequence number - Secondary array index: Address (0) / Data (1) - </description> - <simpleType> - <uint8_t></uint8_t> - <array>8,2</array> - </simpleType> - <persistency>non-volatile</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_HOTPLUG_DISABLE_ACTIONS</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PROC_PCIE_HOTPLUG_NUM_DISABLE_ACTIONS</id> - <!-- TARGET_TYPE_PROC_CHIP --> - <description> - Number of valid entries in primary index of - ATTR_PROC_PCIE_HOTPLUG_DISABLE_ACTIONS - creator: platform - consumer: p9_pcie_hotplug - - ZERO = 0x0, - ONE = 0x1, - TWO = 0x2, - THREE = 0x3, - FOUR = 0x4, - FIVE = 0x5, - SIX = 0x6, - SEVEN = 0x7, - EIGHT = 0x8 - </description> - <simpleType> - <uint8_t></uint8_t> - </simpleType> - <persistency>non-volatile</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_HOTPLUG_NUM_DISABLE_ACTIONS</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> <attribute> <id>PROC_PCIE_PCS_RX_CDR_GAIN</id> @@ -22145,322 +22021,6 @@ Measured in GB</description> </attribute> <attribute> - <id>PROC_PCIE_IOP_G3_PLL_CONTROL0</id><!-- @deprecated --> - <description> - creator: platform (MRW) - consumer: p9_pcie_scominit - firmware notes: - PCIe Gen3 PLL Control Register 0. - ATUNE/CPISEL. - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_IOP_G3_PLL_CONTROL0</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PROC_PCIE_IOP_G2_PLL_CONTROL0</id><!-- @deprecated --> - <description> - creator: platform (MRW) - consumer: p9_pcie_scominit - firmware notes: - PCIe Gen2/Gen1 PLL Control Register 0. - ATUNE/CPISEL. - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_IOP_G2_PLL_CONTROL0</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id><!-- @deprecated --> - <description> - creator: platform (MRW) - consumer: p9_pcie_scominit - notes: - PCIe PLL Global Control Register 0. - REFISRC/REFISINK. - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id><!-- @deprecated --> - <description> - creator: platform (MRW) - consumer: p9_pcie_scominit - notes: - PCIe PLL Global Control Register 1. - ENBGDOCPSRC/ENBGDOCAMP/REFVREG. - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PROC_PCIE_IOP_PCS_CONTROL0</id><!-- @deprecated --> - <description> - creator: platform (MRW) - consumer: p9_pcie_scominit - notes: - PCIe PCS Control Register 0. - BITLOCKTIME/ADDDREMDELTA_810_B/STARTUPDELTA_810_B/ADDDREMDELTA_810_A/ - STARTUPDELTA_A/RXREJECTHANDLING/EQCOMLETERESPONSE. - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_IOP_PCS_CONTROL0</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PROC_PCIE_IOP_PCS_CONTROL1</id><!-- @deprecated --> - <description> - creator: platform (MRW) - consumer: p9_pcie_scominit - notes: - PCIe PCS Control Register 1. - RXSIGDETSETTING/ADDDREMDELTA_128130_B/STARTUPDELTA_128130_B/ - ADDDREMDELTA_128130_A/STARTUPDELTA_128130_A. - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_IOP_PCS_CONTROL1</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PROC_PCIE_IOP_TX_FIFO_OFFSET</id><!-- @deprecated --> - <description> - creator: platform (MRW) - consumer: p9_pcie_scominit - notes: - PCIe TX FIFO Offset Register. - G3OFFSET/G2OFFSET/G1OFFSET. - Array index: Lane number (0:15) - </description> - <simpleType> - <uint32_t></uint32_t> - <array>16</array> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_IOP_TX_FIFO_OFFSET</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PROC_PCIE_IOP_TX_RCVRDETCNTL</id><!-- @deprecated --> - <description> - creator: platform (MRW) - consumer: p9_pcie_scominit - notes: - PCIe TX Receiver Detect Control Register. - VREFSEL/RCVRDETCNT/DETDRVC/PH1WAIT. - Array index: Lane number (0:15) - </description> - <simpleType> - <uint32_t></uint32_t> - <array>16</array> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_IOP_TX_RCVRDETCNTL</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PROC_PCIE_IOP_TX_BWLOSS1</id><!-- @deprecated --> - <description> - creator: platform (MRW) - consumer: p9_pcie_scominit - notes: - PCIe TX Bandwidth Loss Coefficient Register. - GEN3BWCOEFF/GEN2BWCOEFF/GEN1BWCOEFF. - Array index: Lane number (0:15) - </description> - <simpleType> - <uint32_t></uint32_t> - <array>16</array> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_IOP_TX_BWLOSS1</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PROC_PCIE_IOP_RX_VGA_CONTROL2</id><!-- @deprecated --> - <description> - creator: platform (MRW) - consumer: p9_pcie_scominit - notes: - PCIe RX VGA Control Register 2. - GAIN2/GAIN1. - Array index: Lane number (0:15) - </description> - <simpleType> - <uint32_t></uint32_t> - <array>16</array> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_IOP_RX_VGA_CONTROL2</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PROC_PCIE_IOP_RX_PEAK</id><!-- @deprecated --> - <description> - creator: platform (MRW) - consumer: p9_pcie_scominit - notes: - PCIe RX Receiver Peaking Value Register. - PEAK1/PEAK2/PEAK3. - Array index: Lane number (0:15) - </description> - <simpleType> - <uint32_t></uint32_t> - <array>16</array> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_IOP_RX_PEAK</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PROC_PCIE_IOP_RX_SDL</id><!-- @deprecated --> - <description> - creator: platform (MRW) - consumer: p9_pcie_scominit - notes: - PCIe RX Signal Detect Level Register. - SDLVL3/SDLVL2/SDLVL1. - Array index: Lane number (0:15) - </description> - <simpleType> - <uint32_t></uint32_t> - <array>16</array> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_IOP_RX_SDL</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PROC_PCIE_IOP_ZCAL_CONTROL</id><!-- @deprecated --> - <description> - creator: platform (MRW) - consumer: p9_pcie_scominit - notes: - PCIe ZCAL Control Register. - CMPEVALDLY. - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_IOP_ZCAL_CONTROL</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PROC_PCIE_IOP_TX_FFE_GEN1</id><!-- @deprecated --> - <description> - creator: platform (MRW) - consumer: p9_pcie_scominit - notes: - PCIe TX FFE (Gen1) - Array index: Lane number (0:15) - </description> - <simpleType> - <uint32_t></uint32_t> - <array>16</array> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_IOP_TX_FFE_GEN1</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PROC_PCIE_IOP_TX_FFE_GEN2</id><!-- @deprecated --> - <description> - creator: platform (MRW) - consumer: p9_pcie_scominit - notes: - PCIe TX FFE (Gen2) - Array index: Lane number (0:15) - </description> - <simpleType> - <uint32_t></uint32_t> - <array>16</array> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_IOP_TX_FFE_GEN2</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> <id>IO_XBUS_DCCAL_FLAGS</id> <!-- <targetType>TARGET_TYPE_XBUS</targetType> --> <description> |