PROC_xx_ENABLE and DMI_REFCLOCK_SWIZZLE FAPI attributes support update

- PROC_xx_ENABLE are mapped to platform function
- Patch to initial DMI_REFLCLOCK_SWIZZLE for Tuleta

Change-Id: Ifc29c454adb8f63a5d676b102dc62bf8aaef6268
DependsOn: I6ea44b24b27a833534e378fa552e1930a73759f5
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3384
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Tested-by: Jenkins Server

3 files changed, 17 insertions, 111 deletions

diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl
index 30ecc5f93..b63662877 100755
--- a/src/usr/targeting/common/genHwsvMrwXml.pl
+++ b/src/usr/targeting/common/genHwsvMrwXml.pl
@@ -91,6 +91,20 @@ if ($outFile ne "")
 
 my $SYSNAME = uc($sysname);
 
+# Quick patch to support platform specific setting for DMI_REFCLOCK_SWIZZLE
+# attributes for MCS target. This quick patch assumes all procs have the
+# same swizzled wiring
+# TODO. This will be remove when MRW provide the settings in system specific
+# xml file. RTC 65460
+my @DmiRefClockSwizzle = [ 0, 1, 2, 3, 4, 5, 6, 7 ];
+if ($SYSNAME eq "TULETA")
+{
+    $DmiRefClockSwizzle[4] = 7;
+    $DmiRefClockSwizzle[5] = 6;
+    $DmiRefClockSwizzle[6] = 5;
+    $DmiRefClockSwizzle[7] = 4;
+}
+
 open (FH, "<$mrwdir/${sysname}-system-policy.xml") ||
     die "ERROR: unable to open $mrwdir/${sysname}-system-policy.xml\n";
 close (FH);
@@ -1723,6 +1737,9 @@ sub generate_mcs
         <!-- baseAddr = 0x0003E00000000000, 128GB per MCS -->
         <default>$mscStr</default>
     </attribute>
+    <attribute><id>DMI_REFCLOCK_SWIZZLE</id>
+        <default>$DmiRefClockSwizzle[$mcs]</default>
+    </attribute>
     <!-- TODO When MRW provides the information, these two attributes
          should be included. values of X come from MRW.
     <attribute>
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
index c77b8585b..74165ffba 100644
--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
+++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
@@ -5558,25 +5558,6 @@ firmware notes: Used as override attribute for pstate procedure
 </attribute>
 
 <attribute>
-    <id>PROC_NX_ENABLE</id>
-    <description>
-      NX partial good control
-      creator: platform
-      firmware notes:
-        must track ATTR_CHIP_REGIONS_TO_ENABLE
-    </description>
-    <simpleType>
-        <uint8_t></uint8_t>
-    </simpleType>
-    <persistency>volatile</persistency>
-    <readable/>
-    <hwpfToHbAttrMap>
-        <id>ATTR_PROC_NX_ENABLE</id>
-        <macro>DIRECT</macro>
-    </hwpfToHbAttrMap>
-</attribute>
-
-<attribute>
     <id>BOOT_FREQ_MHZ</id>
     <description>
        Boot frequency in MHZ.  Default is 50% of nominal.
@@ -5596,25 +5577,6 @@ firmware notes: Used as override attribute for pstate procedure
 </attribute>
 
 <attribute>
-    <id>PROC_PCIE_ENABLE</id>
-    <description>
-      PCIE partial good control
-      creator: platform
-      firmware notes:
-        must track ATTR_CHIP_REGIONS_TO_ENABLE
-    </description>
-    <simpleType>
-        <uint8_t><default>1</default></uint8_t>
-    </simpleType>
-    <persistency>volatile</persistency>
-    <readable/>
-    <hwpfToHbAttrMap>
-        <id>ATTR_PROC_PCIE_ENABLE</id>
-        <macro>DIRECT</macro>
-    </hwpfToHbAttrMap>
-</attribute>
-
-<attribute>
     <id>EX_GARD_BITS</id>
     <description>
       Vector to communicate the guarded EX chiplets to SBE
@@ -5637,25 +5599,6 @@ firmware notes: Used as override attribute for pstate procedure
 </attribute>
 
 <attribute>
-    <id>PROC_L3_ENABLE</id>
-    <description>
-      L3 partial good control
-      creator: platform
-      firmware notes:
-        must track ATTR_CHIP_REGIONS_TO_ENABLE
-    </description>
-    <simpleType>
-        <uint8_t></uint8_t>
-    </simpleType>
-    <persistency>volatile</persistency>
-    <readable/>
-    <hwpfToHbAttrMap>
-        <id>ATTR_PROC_L3_ENABLE</id>
-        <macro>DIRECT</macro>
-    </hwpfToHbAttrMap>
-</attribute>
-
-<attribute>
 <id>PIB_I2C_REFCLOCK</id>
 <description>
     i2c reference clock for the system.
@@ -9986,53 +9929,6 @@ Measured in GB</description>
 
 <!-- ===== End supporting poreve_memory_attributes.xml ===== -->
 
-<!-- ===== Supporting A/X bus enable in p8_xip_customize_attributes.xml ===== -->
-<attribute>
-    <id>PROC_A_ENABLE</id>
-    <description>ABUS chiplet partial good control
-                      creator: platform
-                      firmware notes:
-                      must track ATTR_CHIP_REGIONS_TO_ENABLE
-    </description>
-    <simpleType>
-        <uint8_t>
-<!-- Hostboot doesn't support A/X regional partial good ===== -->
-            <default>1</default>
-        </uint8_t>
-    </simpleType>
-    <persistency>volatile</persistency>
-    <readable/>
-    <writeable/>
-    <hwpfToHbAttrMap>
-        <id>ATTR_PROC_A_ENABLE</id>
-        <macro>DIRECT</macro>
-    </hwpfToHbAttrMap>
-</attribute>
-
-<attribute>
-    <id>PROC_X_ENABLE</id>
-    <description>XBUS chiplet partial good control
-                      creator: platform
-                      firmware notes:
-                      must track ATTR_CHIP_REGIONS_TO_ENABLE
-    </description>
-    <simpleType>
-        <uint8_t>
-<!-- Hostboot doesn't support A/X regional partial good ===== -->
-            <default>1</default>
-        </uint8_t>
-    </simpleType>
-    <persistency>volatile</persistency>
-    <readable/>
-    <writeable/>
-    <hwpfToHbAttrMap>
-        <id>ATTR_PROC_X_ENABLE</id>
-        <macro>DIRECT</macro>
-    </hwpfToHbAttrMap>
-</attribute>
-
-<!-- ===== End supporting A/X bus enable in p8_xip_customize_attributes.xml ===== -->
-
 <!-- Support for sync_attributes.xml -->
 <attribute>
     <id>SYNC_BETWEEN_STEPS</id>
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml
index 2bc56c6bf..fe139537b 100644
--- a/src/usr/targeting/common/xmltohb/target_types.xml
+++ b/src/usr/targeting/common/xmltohb/target_types.xml
@@ -351,10 +351,6 @@
      <attribute><id>SBE_SEEPROM_I2C_PORT</id></attribute>
      <attribute><id>PNOR_I2C_ADDRESS_BYTES</id></attribute>
      <!-- End Supporting poreve_memory_attributes.xml -->
-     <!-- ===== Begin supporting A/X bus enable in p8_xip_customize_attributes.xml ===== -->
-     <attribute><id>PROC_A_ENABLE</id></attribute>
-     <attribute><id>PROC_X_ENABLE</id></attribute>
-     <!-- ===== End supporting A/X bus enable in p8_xip_customize_attributes.xml ===== -->
      
 </targetType>
 
@@ -400,8 +396,6 @@
     <attribute><id>PROC_PCIE_IOP_ZCAL_CONTROL</id></attribute>
     <attribute><id>PROC_DCM_INSTALLED</id></attribute>
     <attribute><id>CHIP_REGIONS_TO_ENABLE</id></attribute>
-    <attribute><id>PROC_NX_ENABLE</id></attribute>
-    <attribute><id>PROC_PCIE_ENABLE</id></attribute>
     <attribute><id>PROC_ADU_UNTRUSTED_BAR_BASE_ADDR</id></attribute>
     <attribute><id>PROC_ADU_UNTRUSTED_BAR_SIZE</id></attribute>
     <attribute><id>PROC_PSI_UNTRUSTED_BAR0_BASE_ADDR</id></attribute>
@@ -519,7 +513,6 @@
     <attribute><id>OVERRIDE_MVPD_V_CS_LAB_VOLTAGE</id></attribute>
     <attribute><id>OVERRIDE_MVPD_I_CS_LAB_CURRENT</id></attribute>
     <!-- End pm_attributes_all_hwp.xml -->
-    <attribute><id>PROC_L3_ENABLE</id></attribute>
 </targetType>
 
 <targetType>