diff options
| author | Corey Swenson <cswenson@us.ibm.com> | 2013-07-18 14:32:02 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-08-08 11:11:27 -0500 |
| commit | 1a20907d8a8c5c0828223a82a927bea96b77912d (patch) | |
| tree | 6a3fe10eb01b34e5f911e7a8475d82d67281cc87 /src/usr/targeting | |
| parent | 7555b953439d721e5da279f973792fb2c8f651e5 (diff) | |
| download | talos-hostboot-1a20907d8a8c5c0828223a82a927bea96b77912d.tar.gz talos-hostboot-1a20907d8a8c5c0828223a82a927bea96b77912d.zip | |
Attribute updates for HostServices
Change-Id: Ia8640d52bf822ed0696776d1aad0fc728433cd8c
RTC: 50411
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5466
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/targeting')
| -rw-r--r-- | src/usr/targeting/common/xmltohb/target_types.xml | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 4e1619d34..51dc75e09 100644 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -104,9 +104,6 @@ <attribute><id>MSS_PREFETCH_ENABLE</id></attribute> <attribute><id>MSS_CLEANER_ENABLE</id></attribute> <attribute><id>MIRROR_BASE_ADDRESS</id></attribute> - <attribute><id>PROC_EPS_GB_PERCENTAGE</id></attribute> - <attribute><id>PROC_EPS_GB_DIRECTION</id></attribute> - <attribute><id>PROC_FABRIC_ASYNC_SAFE_MODE</id></attribute> <attribute><id>FREQ_PCIE</id></attribute> <attribute><id>L2_R_T0_EPS</id></attribute> <attribute><id>L2_R_T1_EPS</id></attribute> @@ -159,6 +156,12 @@ <attribute><id>A_EREPAIR_THRESHOLD_MNFG</id></attribute> <attribute><id>DMI_EREPAIR_THRESHOLD_MNFG</id></attribute> <!-- End erepair_thresholds.xml --> + <!-- proc_fab_smp_fabric_attributes.xml --> + <attribute><id>FREQ_CORE</id></attribute> + <attribute><id>PROC_EPS_GB_PERCENTAGE</id></attribute> + <attribute><id>PROC_EPS_GB_DIRECTION</id></attribute> + <attribute><id>PROC_FABRIC_ASYNC_SAFE_MODE</id></attribute> + <!-- End proc_fab_smp_fabric_attributes.xml --> <attribute><id>ENABLED_THREADS</id></attribute> <attribute><id>MSS_ZSERIES</id></attribute> @@ -274,7 +277,6 @@ <attribute><id>PROC_L3_BAR2_REG</id></attribute> <attribute><id>PROC_L3_BAR_GROUP_MASK_REG</id></attribute> <!-- proc_fab_smp_fabric_attributes.xml --> - <attribute><id>FREQ_CORE</id></attribute> <attribute><id>PROC_PCIE_NOT_F_LINK</id></attribute> <attribute><id>MSS_INTERLEAVE_ENABLE</id></attribute> <attribute><id>MSS_MCS_GROUP_32</id></attribute> |
