HWPF Attributes: Support ATTR_CHIP_HAS_SBE

This was reuqested by Jeshua. One of his HWPs will run on both Venice
and Murano and needs to know if the chip has an SBE in order to
initialize some SBE related registers. Venice has an SBE, Murano
doesn't

Change-Id: I8e606a6168873f8aef4fdd11e0d3f4e1cb8597d9
RTC: 39971
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/823
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

1 files changed, 10 insertions, 1 deletions

diff --git a/src/usr/targeting/xmltohb/target_types.xml b/src/usr/targeting/xmltohb/target_types.xml
index c4aee6ddb..6e15a36d6 100644
--- a/src/usr/targeting/xmltohb/target_types.xml
+++ b/src/usr/targeting/xmltohb/target_types.xml
@@ -170,6 +170,11 @@
     </attribute>
     <attribute><id>FABRIC_NODE_ID</id></attribute>
     <attribute><id>FABRIC_CHIP_ID</id></attribute>
+    <attribute>
+        <!-- Processor chips have an SBE -->
+        <id>CHIP_HAS_SBE</id>
+        <default>1</default>
+    </attribute>
     <!-- TODO. MVPD_FREQ_CORE_NOMINAL to be deleted when MVPD available -->
     <attribute><id>MVPD_FREQ_CORE_NOMINAL</id></attribute>
 </targetType>
@@ -844,7 +849,11 @@
         <id>FSI_GP_REG_SCOM_ACCESS</id> 
         <default>0</default>
     </attribute>
-
+    <attribute>
+        <!-- Centaur memory buffer chips do not have an SBE -->
+        <id>CHIP_HAS_SBE</id>
+        <default>0</default>
+    </attribute>
 </targetType>
 
 <!-- Centaur MBS -->