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author | Nick Bofferding <bofferdn@us.ibm.com> | 2012-04-17 22:30:59 -0500 |
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committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2012-04-24 15:48:42 -0500 |
commit | 4157b5631a1bbfcc7f9f95480b54e9ade7abce7d (patch) | |
tree | 423f4f13a4a0e2d6e76898992a37b4d2db302b3b /src/usr/targeting/xmltohb/target_types.xml | |
parent | 5631ede5d2e63fa8585505eb29c6d86f420c9344 (diff) | |
download | talos-hostboot-4157b5631a1bbfcc7f9f95480b54e9ade7abce7d.tar.gz talos-hostboot-4157b5631a1bbfcc7f9f95480b54e9ade7abce7d.zip |
Support targeting code commonality
- Moved common targeting code to own subtrees
- Updated many components with header file changes
- Implemented abstract pointer class
- Implemented Hostboot specific support for targeting commonality
- Changed attribute VMM base address to 4 GB (From 3 GB)
- Removed tabs, fixed > 80 character lines
Change-Id: Ie5a6956670bfa4f262f7691b4f0ce5a20ed289fe
RTC: 35569
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/909
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/targeting/xmltohb/target_types.xml')
-rw-r--r-- | src/usr/targeting/xmltohb/target_types.xml | 974 |
1 files changed, 0 insertions, 974 deletions
diff --git a/src/usr/targeting/xmltohb/target_types.xml b/src/usr/targeting/xmltohb/target_types.xml deleted file mode 100644 index a22d8ef1c..000000000 --- a/src/usr/targeting/xmltohb/target_types.xml +++ /dev/null @@ -1,974 +0,0 @@ -<!-- IBM_PROLOG_BEGIN_TAG - This is an automatically generated prolog. - - $Source: src/usr/targeting/xmltohb/target_types.xml $ - - IBM CONFIDENTIAL - - COPYRIGHT International Business Machines Corp. 2011 - - p1 - - Object Code Only (OCO) source materials - Licensed Internal Code Source Materials - IBM HostBoot Licensed Internal Code - - The source code for this program is not published or other- - wise divested of its trade secrets, irrespective of what has - been deposited with the U.S. Copyright Office. - - Origin: 30 - - IBM_PROLOG_END --> - -<attributes> - -<!-- ===================================================================== - HOST BOOT TARGETS - Contains the definition of the different types of targets - ================================================================= --> - -<targetType> - <id>base</id> - <attribute><id>CLASS</id></attribute> - <attribute><id>TYPE</id></attribute> - <attribute><id>MODEL</id></attribute> - <attribute><id>HUID</id></attribute> - <attribute><id>PHYS_PATH</id></attribute> - <attribute><id>AFFINITY_PATH</id></attribute> - <attribute> - <id>PRIMARY_CAPABILITIES</id> - </attribute> - <attribute><id>HWAS_STATE</id></attribute> - <attribute> - <id>DECONFIG_GARDABLE</id> - <default>0</default> - </attribute> -</targetType> - -<targetType> - <id>sys-sys-power8</id> - <parent>base</parent> - <attribute><id>CLASS</id><default>SYS</default></attribute> - <attribute><id>TYPE</id><default>SYS</default></attribute> - <attribute><id>MODEL</id><default>POWER8</default></attribute> - <attribute><id>HUID</id><default>0x00010000</default></attribute> - <attribute><id>EXECUTION_PLATFORM</id></attribute> - <attribute><id>SCRATCH_UINT8_1</id></attribute> - <attribute><id>SCRATCH_UINT8_2</id></attribute> - <attribute><id>SCRATCH_UINT32_1</id></attribute> - <attribute><id>SCRATCH_UINT32_2</id></attribute> - <attribute><id>SCRATCH_UINT64_1</id></attribute> - <attribute><id>SCRATCH_UINT64_2</id></attribute> - <attribute><id>SCRATCH_UINT8_ARRAY_1</id></attribute> - <attribute><id>SCRATCH_UINT8_ARRAY_2</id></attribute> - <attribute><id>SCRATCH_UINT32_ARRAY_1</id></attribute> - <attribute><id>SCRATCH_UINT32_ARRAY_2</id></attribute> - <attribute><id>SCRATCH_UINT64_ARRAY_1</id></attribute> - <attribute><id>SCRATCH_UINT64_ARRAY_2</id></attribute> - <attribute><id>NUMERIC_POD_TYPE_TEST</id></attribute> - <attribute><id>HB_MUTEX_TEST_LOCK</id></attribute> - <attribute><id>DUMMY_RW</id></attribute> - <attribute><id>XSCOM_BASE_ADDRESS</id></attribute> - <attribute><id>TEST_NULL_STRING</id></attribute> - <attribute><id>TEST_MIN_STRING</id><default>Z</default></attribute> - <attribute><id>TEST_MAX_STRING</id></attribute> - <attribute><id>TEST_NO_DEFAULT_STRING</id></attribute> - <attribute> - <id>PHYS_PATH</id> - <default>physical:sys-0</default> - </attribute> - <attribute> - <id>AFFINITY_PATH</id> - <default>affinity:sys-0</default> - </attribute> - <attribute> - <id>IS_SIMULATION</id> - <default>0</default> - </attribute> - <attribute><id>ISTEP_MODE</id></attribute> - <attribute><id>PROC_EPS_TABLE_TYPE</id></attribute> - <attribute><id>PROC_FABRIC_PUMP_MODE</id></attribute> - <attribute><id>PROC_X_BUS_WIDTH</id></attribute> - <attribute><id>ALL_MCS_IN_INTERLEAVING_GROUP</id></attribute> - <attribute><id>FREQ_PROC_REFCLOCK</id></attribute> - <attribute><id>FREQ_MEM_REFCLOCK</id></attribute> - <attribute><id>FREQ_CORE_FLOOR</id></attribute> - <attribute><id>FREQ_PB</id></attribute> - <attribute><id>FREQ_A</id></attribute> - <attribute><id>FREQ_X</id></attribute> - <attribute><id>SP_FUNCTIONS</id></attribute> -</targetType> - -<targetType> - <id>chip</id> - <parent>base</parent> - <attribute> - <id>CLASS</id> - <default>CHIP</default> - </attribute> - <attribute> - <id>POSITION</id> - </attribute> - <attribute> - <id>FSI_MASTER_CHIP</id> - <!-- Default to a non-sensical value --> - <default>physical:na-0</default> - </attribute> - <attribute> - <id>FSI_MASTER_TYPE</id> - </attribute> - <attribute> - <id>FSI_MASTER_PORT</id> - </attribute> - <attribute> - <id>FSI_SLAVE_CASCADE</id> - </attribute> - <attribute> - <id>FSI_OPTION_FLAGS</id> - </attribute> - <attribute> - <id>DECONFIG_GARDABLE</id> - <default>1</default> - </attribute> - <attribute> - <id>EC</id> - </attribute> - <attribute> - <id>CHIP_ID</id> - </attribute> -</targetType> - -<targetType> - <id>chip-processor</id> - <parent>chip</parent> - <attribute> - <id>TYPE</id> - <default>PROC</default> - </attribute> - <attribute> - <id>PRIMARY_CAPABILITIES</id> - <default> - <field><id>supportsFsiScom</id><value>1</value></field> - <field><id>supportsXscom</id><value>1</value></field> - <field><id>supportsInbandScom</id><value>0</value></field> - <field><id>reserved</id><value>0</value></field> - </default> - </attribute> - <attribute> - <id>SCOM_SWITCHES</id> - </attribute> - <attribute> - <id>FSI_MASTER_MUTEX</id> - </attribute> - <attribute> - <id>FSI_SCOM_MUTEX</id> - </attribute> - <attribute> - <id>SCOM_IND_MUTEX</id> - </attribute> - <attribute> - <!-- Processor chips have SCOM accessible FSI GP regs --> - <id>FSI_GP_REG_SCOM_ACCESS</id> - <default>1</default> - </attribute> - <attribute><id>FABRIC_NODE_ID</id></attribute> - <attribute><id>FABRIC_CHIP_ID</id></attribute> - <attribute> - <!-- Processor chips have an SBE --> - <id>CHIP_HAS_SBE</id> - <default>1</default> - </attribute> - <!-- TODO. MVPD_FREQ_CORE_NOMINAL to be deleted when MVPD available --> - <attribute><id>MVPD_FREQ_CORE_NOMINAL</id></attribute> - <attribute><id>VPD_REC_NUM</id></attribute> -</targetType> - -<targetType> - <id>chip-processor-power8</id> - <parent>chip-processor</parent> - <attribute> - <id>XSCOM_CHIP_INFO</id> - </attribute> - <attribute><id>DUMMY_RW</id></attribute> - <attribute><id>DUMMY_HEAP_ZERO_DEFAULT</id></attribute> - <attribute> - <id>I2C_ENGINE_MUTEX_0</id> - <default>0</default> - </attribute> - <attribute> - <id>I2C_ENGINE_MUTEX_1</id> - <default>0</default> - </attribute> - <attribute> - <id>I2C_ENGINE_MUTEX_2</id> - <default>0</default> - </attribute> -</targetType> - -<targetType> - <id>chip-processor-salerno</id> - <parent>chip-processor-power8</parent> - <attribute> - <id>MODEL</id> - <default>SALERNO</default> - </attribute> - <attribute><id>EEPROM_ADDR_INFO0</id></attribute> - <attribute><id>EEPROM_ADDR_INFO1</id></attribute> - </targetType> - -<targetType> - <id>chip-processor-venice</id> - <parent>chip-processor-power8</parent> - <attribute> - <id>MODEL</id> - <default>VENICE</default> - </attribute> - <attribute><id>DUMMY_RW</id></attribute> - <attribute><id>DUMMY_HEAP_ZERO_DEFAULT</id></attribute> - <attribute><id>EEPROM_ADDR_INFO0</id></attribute> - <attribute><id>EEPROM_ADDR_INFO1</id></attribute> -</targetType> - -<targetType> - <id>chip-processor-murano</id> - <parent>chip-processor-power8</parent> - <attribute> - <id>MODEL</id> - <default>MURANO</default> - </attribute> -</targetType> - -<targetType> - <id>unit</id> - <parent>base</parent> - <attribute> - <id>CLASS</id> - <default>UNIT</default> - </attribute> - <attribute> - <id>PRIMARY_CAPABILITIES</id> - <default> - <field><id>supportsFsiScom</id><value>1</value></field> - <field><id>supportsXscom</id><value>1</value></field> - <field><id>supportsInbandScom</id><value>0</value></field> - <field><id>reserved</id><value>0</value></field> - </default> - </attribute> - <attribute> - <id>DECONFIG_GARDABLE</id> - <default>1</default> - </attribute> - <attribute> - <id>CHIP_UNIT</id> - <default>0</default> - </attribute> -</targetType> - -<targetType> - <id>unit-ex-power8</id> - <parent>unit</parent> - <attribute> - <id>TYPE</id> - <default>EX</default> - </attribute> - <attribute> - <id>L2_R_T0_EPS</id> - </attribute> - <attribute> - <id>L2_R_T1_EPS</id> - </attribute> - <attribute> - <id>L2_R_T2_EPS</id> - </attribute> - <attribute> - <id>L2_FORCE_R_T2_EPS</id> - </attribute> - <attribute> - <id>L2_W_EPS</id> - </attribute> - <attribute> - <id>L3_R_T0_EPS</id> - </attribute> - <attribute> - <id>L3_R_T1_EPS</id> - </attribute> - <attribute> - <id>L3_R_T2_EPS</id> - </attribute> - <attribute> - <id>L3_FORCE_R_T2_EPS</id> - </attribute> - <attribute> - <id>L3_W_EPS</id> - </attribute> -</targetType> - -<targetType> - <id>unit-ex-salerno</id> - <parent>unit-ex-power8</parent> - <attribute> - <id>MODEL</id> - <default>SALERNO</default> - </attribute> -</targetType> - -<targetType> - <id>unit-ex-venice</id> - <parent>unit-ex-power8</parent> - <attribute> - <id>MODEL</id> - <default>VENICE</default> - </attribute> -</targetType> - -<targetType> - <id>unit-ex-murano</id> - <parent>unit-ex-power8</parent> - <attribute> - <id>MODEL</id> - <default>MURANO</default> - </attribute> -</targetType> - - -<targetType> - <id>unit-core-power8</id> - <parent>unit</parent> - <attribute> - <id>TYPE</id> - <default>CORE</default> - </attribute> -</targetType> - -<targetType> - <id>unit-core-salerno</id> - <parent>unit-core-power8</parent> - <attribute> - <id>MODEL</id> - <default>SALERNO</default> - </attribute> -</targetType> - -<targetType> - <id>unit-core-venice</id> - <parent>unit-core-power8</parent> - <attribute> - <id>MODEL</id> - <default>VENICE</default> - </attribute> -</targetType> - -<targetType> - <id>unit-core-murano</id> - <parent>unit-core-power8</parent> - <attribute> - <id>MODEL</id> - <default>MURANO</default> - </attribute> -</targetType> - - -<targetType> - <id>unit-pervasive-power8</id> - <parent>unit</parent> - <attribute> - <id>TYPE</id> - <default>PERVASIVE</default> - </attribute> -</targetType> - -<targetType> - <id>unit-pervasive-salerno</id> - <parent>unit-pervasive-power8</parent> - <attribute> - <id>MODEL</id> - <default>SALERNO</default> - </attribute> -</targetType> - -<targetType> - <id>unit-pervasive-venice</id> - <parent>unit-pervasive-power8</parent> - <attribute> - <id>MODEL</id> - <default>VENICE</default> - </attribute> -</targetType> - -<targetType> - <id>unit-pervasive-murano</id> - <parent>unit-pervasive-power8</parent> - <attribute> - <id>MODEL</id> - <default>MURANO</default> - </attribute> -</targetType> - - -<targetType> - <id>unit-pci-power8</id> - <parent>unit</parent> - <attribute> - <id>TYPE</id> - <default>PCI</default> - </attribute> -</targetType> - -<targetType> - <id>unit-pci-salerno</id> - <parent>unit-pci-power8</parent> - <attribute> - <id>MODEL</id> - <default>SALERNO</default> - </attribute> -</targetType> - -<targetType> - <id>unit-pci-venice</id> - <parent>unit-pci-power8</parent> - <attribute> - <id>MODEL</id> - <default>VENICE</default> - </attribute> -</targetType> - -<targetType> - <id>unit-pci-murano</id> - <parent>unit-pci-power8</parent> - <attribute> - <id>MODEL</id> - <default>MURANO</default> - </attribute> -</targetType> - - -<targetType> - <id>unit-powerbus-power8</id> - <parent>unit</parent> - <attribute> - <id>TYPE</id> - <default>POWERBUS</default> - </attribute> -</targetType> - -<targetType> - <id>unit-powerbus-salerno</id> - <parent>unit-powerbus-power8</parent> - <attribute> - <id>MODEL</id> - <default>SALERNO</default> - </attribute> -</targetType> - -<targetType> - <id>unit-powerbus-venice</id> - <parent>unit-powerbus-power8</parent> - <attribute> - <id>MODEL</id> - <default>VENICE</default> - </attribute> -</targetType> - -<targetType> - <id>unit-powerbus-murano</id> - <parent>unit-powerbus-power8</parent> - <attribute> - <id>MODEL</id> - <default>MURANO</default> - </attribute> -</targetType> - - -<targetType> - <id>enc-node-power8</id> - <parent>base</parent> - <attribute> - <id>CLASS</id> - <default>ENC</default> - </attribute> - <attribute> - <id>TYPE</id> - <default>NODE</default> - </attribute> - <attribute> - <id>MODEL</id> - <default>POWER8</default> - </attribute> -</targetType> - -<targetType> - <id>unit-abus-power8</id> - <parent>unit</parent> - <attribute> - <id>TYPE</id> - <default>ABUS</default> - </attribute> - <attribute><id>CHIP_UNIT</id></attribute> -</targetType> - -<targetType> - <id>unit-abus-salerno</id> - <parent>unit-abus-power8</parent> - <attribute> - <id>MODEL</id> - <default>SALERNO</default> - </attribute> -</targetType> - -<targetType> - <id>unit-abus-venice</id> - <parent>unit-abus-power8</parent> - <attribute> - <id>MODEL</id> - <default>VENICE</default> - </attribute> -</targetType> - -<targetType> - <id>unit-abus-murano</id> - <parent>unit-abus-power8</parent> - <attribute> - <id>MODEL</id> - <default>MURANO</default> - </attribute> -</targetType> - -<targetType> - <id>unit-xbus-power8</id> - <parent>unit</parent> - <attribute> - <id>TYPE</id> - <default>XBUS</default> - </attribute> - <attribute><id>CHIP_UNIT</id></attribute> -</targetType> - -<targetType> - <id>unit-xbus-salerno</id> - <parent>unit-xbus-power8</parent> - <attribute> - <id>MODEL</id> - <default>SALERNO</default> - </attribute> -</targetType> - -<targetType> - <id>unit-xbus-venice</id> - <parent>unit-xbus-power8</parent> - <attribute> - <id>MODEL</id> - <default>VENICE</default> - </attribute> -</targetType> - -<targetType> - <id>unit-xbus-murano</id> - <parent>unit-xbus-power8</parent> - <attribute> - <id>MODEL</id> - <default>MURANO</default> - </attribute> -</targetType> - -<!-- Hybrid targets --> - -<targetType> - <id>unit-memport-power8</id> - <parent>unit</parent> - <attribute> - <id>TYPE</id> - <default>MEM_PORT</default> - </attribute> -</targetType> - -<targetType> - <id>unit-mbs-power8</id> - <parent>unit</parent> - <attribute> - <id>TYPE</id> - <default>MBS</default> - </attribute> -</targetType> - -<targetType> - <id>unit-mba-power8</id> - <parent>unit</parent> - <attribute> - <id>TYPE</id> - <default>MBA</default> - </attribute> - <attribute><id>MSS_DIMM_MFG_ID_CODE</id></attribute> - <attribute><id>EFF_DIMM_RANKS_CONFIGED</id></attribute> - <attribute><id>EFF_NUM_RANKS_PER_DIMM</id></attribute> - <attribute><id>EFF_DIMM_TYPE</id></attribute> - <attribute><id>EFF_DRAM_WIDTH</id></attribute> - <attribute><id>EFF_DRAM_GEN</id></attribute> - <attribute><id>EFF_PRIMARY_RANK_GROUP0</id></attribute> - <attribute><id>EFF_PRIMARY_RANK_GROUP1</id></attribute> - <attribute><id>EFF_PRIMARY_RANK_GROUP2</id></attribute> - <attribute><id>EFF_PRIMARY_RANK_GROUP3</id></attribute> - <attribute><id>EFF_SECONDARY_RANK_GROUP0</id></attribute> - <attribute><id>EFF_SECONDARY_RANK_GROUP1</id></attribute> - <attribute><id>EFF_SECONDARY_RANK_GROUP2</id></attribute> - <attribute><id>EFF_SECONDARY_RANK_GROUP3</id></attribute> - <attribute><id>EFF_TERTIARY_RANK_GROUP0</id></attribute> - <attribute><id>EFF_TERTIARY_RANK_GROUP1</id></attribute> - <attribute><id>EFF_TERTIARY_RANK_GROUP2</id></attribute> - <attribute><id>EFF_TERTIARY_RANK_GROUP3</id></attribute> - <attribute><id>EFF_QUATERNARY_RANK_GROUP0</id></attribute> - <attribute><id>EFF_QUATERNARY_RANK_GROUP1</id></attribute> - <attribute><id>EFF_QUATERNARY_RANK_GROUP2</id></attribute> - <attribute><id>EFF_QUATERNARY_RANK_GROUP3</id></attribute> - <attribute><id>EFF_ODT_RD</id></attribute> - <attribute><id>EFF_ODT_WR</id></attribute> - <attribute><id>EFF_DRAM_RON</id></attribute> - <attribute><id>EFF_DRAM_RTT_NOM</id></attribute> - <attribute><id>EFF_DRAM_RTT_WR</id></attribute> - <attribute><id>EFF_DRAM_WR_VREF</id></attribute> - <attribute><id>EFF_CEN_DRV_IMP_DQ_DQS</id></attribute> - <attribute><id>EFF_CEN_DRV_IMP_CMD</id></attribute> - <attribute><id>EFF_CEN_DRV_IMP_CNTL</id></attribute> - <attribute><id>EFF_CEN_RCV_IMP_DQ_DQS</id></attribute> - <attribute><id>EFF_CEN_SLEW_RATE_DQ_DQS</id></attribute> - <attribute><id>EFF_CEN_SLEW_RATE_CMD</id></attribute> - <attribute><id>EFF_CEN_SLEW_RATE_CNTL</id></attribute> - <attribute><id>EFF_CEN_RD_VREF</id></attribute> - <attribute><id>EFF_DIMM_SIZE</id></attribute> - <attribute><id>EFF_DRAM_DENSITY</id></attribute> - <attribute><id>EFF_DRAM_TRCD</id></attribute> - <attribute><id>EFF_DRAM_TRRD</id></attribute> - <attribute><id>EFF_DRAM_TRP</id></attribute> - <attribute><id>EFF_DRAM_TRAS</id></attribute> - <attribute><id>EFF_DRAM_TRC</id></attribute> - <attribute><id>EFF_DRAM_TRFI</id></attribute> - <attribute><id>EFF_DRAM_TRFC</id></attribute> - <attribute><id>EFF_DRAM_TWTR</id></attribute> - <attribute><id>EFF_DRAM_TRTP</id></attribute> - <attribute><id>EFF_DRAM_TFAW</id></attribute> - <attribute><id>EFF_DRAM_BL</id></attribute> - <attribute><id>EFF_DRAM_CL</id></attribute> - <attribute><id>EFF_DRAM_AL</id></attribute> - <attribute><id>EFF_DRAM_CWL</id></attribute> - <attribute><id>EFF_DRAM_RBT</id></attribute> - <attribute><id>EFF_DRAM_TM</id></attribute> - <attribute><id>EFF_DRAM_DLL_RESET</id></attribute> - <attribute><id>EFF_DRAM_WR</id></attribute> - <attribute><id>EFF_DRAM_DLL_PPD</id></attribute> - <attribute><id>EFF_DRAM_DLL_ENABLE</id></attribute> - <attribute><id>EFF_DRAM_TDQS</id></attribute> - <attribute><id>EFF_DRAM_WR_LVL_ENABLE</id></attribute> - <attribute><id>EFF_DRAM_OUTPUT_BUFFER</id></attribute> - <attribute><id>EFF_DRAM_PASR</id></attribute> - <attribute><id>EFF_DRAM_ASR</id></attribute> - <attribute><id>EFF_DRAM_SRT</id></attribute> - <attribute><id>EFF_MPR_LOC</id></attribute> - <attribute><id>EFF_MPR_MODE</id></attribute> - <attribute><id>EFF_DIMM_RCD_CNTL_WORD_0_15</id></attribute> - <attribute><id>EFF_SCHMOO_MODE</id></attribute> - <attribute><id>EFF_SCHMOO_TEST_VALID</id></attribute> - <attribute><id>EFF_SCHMOO_PARAM_VALID</id></attribute> - <attribute><id>EFF_MEMCAL_INTERVAL</id></attribute> - <attribute><id>EFF_ZQCAL_INTERVAL</id></attribute> - <attribute><id>MSS_THROTTLE_NUMERATOR</id></attribute> - <attribute><id>MSS_THROTTLE_DENOMINATOR</id></attribute> - <attribute><id>MSS_THROTTLE_CHANNEL_NUMERATOR</id></attribute> - <attribute><id>MSS_THROTTLE_CHANNEL_DENOMINATOR</id></attribute> - <attribute><id>MSS_WATT_TARGET</id></attribute> - <attribute><id>MSS_POWER_SLOPE</id></attribute> - <attribute><id>MSS_POWER_INT</id></attribute> - <attribute><id>MSS_DIMM_MAXBANDWIDTH_GBS</id></attribute> - <attribute><id>MSS_DIMM_MAXBANDWIDTH_MRS</id></attribute> - <attribute><id>MSS_CHANNEL_MAXBANDWIDTH_GBS</id></attribute> - <attribute><id>MSS_CHANNEL_MAXBANDWIDTH_MRS</id></attribute> - <attribute><id>MSS_DIMM_MAXPOWER</id></attribute> - <attribute><id>MSS_CHANNEL_MAXPOWER</id></attribute> - <attribute><id>MSS_MEMSIZE_MBA</id></attribute> -</targetType> - -<targetType> - <id>unit-mcs-power8</id> - <parent>unit</parent> - <attribute> - <id>TYPE</id> - <default>MCS</default> - </attribute> - <attribute><id>MSS_MEMSIZE</id></attribute> -</targetType> - -<targetType> - <id>unit-mcs-venice</id> - <parent>unit-mcs-power8</parent> - <attribute> - <id>MODEL</id> - <default>VENICE</default> - </attribute> -</targetType> - -<targetType> - <id>unit-mcs-salerno</id> - <parent>unit-mcs-power8</parent> - <attribute> - <id>MODEL</id> - <default>SALERNO</default> - </attribute> -</targetType> - -<targetType> - <id>unit-mcs-murano</id> - <parent>unit-mcs-power8</parent> - <attribute> - <id>MODEL</id> - <default>MURANO</default> - </attribute> -</targetType> - -<!-- Processor target types --> - -<targetType> - <id>unit-mba-venice</id> - <parent>unit-mba-power8</parent> - <attribute> - <id>MODEL</id> - <default>VENICE</default> - </attribute> -</targetType> - -<targetType> - <id>unit-mba-salerno</id> - <parent>unit-mba-power8</parent> - <attribute> - <id>MODEL</id> - <default>SALERNO</default> - </attribute> -</targetType> - -<targetType> - <id>unit-mba-murano</id> - <parent>unit-mba-venice</parent> - <attribute> - <id>MODEL</id> - <default>MURANO</default> - </attribute> -</targetType> - -<targetType> - <id>unit-mbs-venice</id> - <parent>unit-mbs-power8</parent> - <attribute> - <id>MODEL</id> - <default>VENICE</default> - </attribute> -</targetType> - -<targetType> - <id>unit-mbs-salerno</id> - <parent>unit-mbs-power8</parent> - <attribute> - <id>MODEL</id> - <default>SALERNO</default> - </attribute> -</targetType> - -<targetType> - <id>unit-mbs-murano</id> - <parent>unit-mbs-venice</parent> - <attribute> - <id>MODEL</id> - <default>MURANO</default> - </attribute> -</targetType> - -<targetType> - <id>unit-memport-salerno</id> - <parent>unit-memport-power8</parent> - <attribute> - <id>MODEL</id> - <default>SALERNO</default> - </attribute> -</targetType> - -<targetType> - <id>unit-memport-venice</id> - <parent>unit-memport-power8</parent> - <attribute> - <id>MODEL</id> - <default>VENICE</default> - </attribute> -</targetType> - -<targetType> - <id>unit-memport-murano</id> - <parent>unit-memport-venice</parent> - <attribute> - <id>MODEL</id> - <default>MURANO</default> - </attribute> -</targetType> - -<!-- Memory Buffer Target Types --> - -<!-- Centaur chip/DMI --> - -<targetType> - <id>chip-membuf-centaur</id> - <parent>chip</parent> - <attribute> - <id>TYPE</id> - <default>MEMBUF</default> - </attribute> - <attribute> - <id>MODEL</id> - <default>CENTAUR</default> - </attribute> - <attribute> - <id>PRIMARY_CAPABILITIES</id> - <default> - <field><id>supportsFsiScom</id><value>1</value></field> - <field><id>supportsXscom</id><value>0</value></field> - <field><id>supportsInbandScom</id><value>1</value></field> - <field><id>reserved</id><value>0</value></field> - </default> - </attribute> - <attribute> - <id>SCOM_SWITCHES</id> - <default> - <field><id>useFsiScom</id><value>1</value></field> - <field><id>useXscom</id><value>0</value></field> - <field><id>useInbandScom</id><value>0</value></field> - <field><id>reserved</id><value>0</value></field> - </default> - </attribute> - <attribute><id>EEPROM_ADDR_INFO0</id></attribute> - <attribute><id>EEPROM_ADDR_INFO1</id></attribute> - <attribute><id>MSS_VOLT</id></attribute> - <attribute><id>MSS_FREQ</id></attribute> - <attribute> - <id>FSI_SCOM_MUTEX</id> - </attribute> - <attribute> - <id>SCOM_IND_MUTEX</id> - </attribute> - <attribute> - <!-- Centaur memory buffer chips do not have SCOM accessible FSI GP regs --> - <id>FSI_GP_REG_SCOM_ACCESS</id> - <default>0</default> - </attribute> - <attribute> - <!-- Centaur memory buffer chips do not have an SBE --> - <id>CHIP_HAS_SBE</id> - <default>0</default> - </attribute> -</targetType> - -<!-- Centaur MBS --> - -<targetType> - <id>unit-mbs-centaur</id> - <parent>unit-mbs-power8</parent> - <attribute> - <id>PRIMARY_CAPABILITIES</id> - <default> - <field><id>supportsFsiScom</id><value>1</value></field> - <field><id>supportsXscom</id><value>0</value></field> - <field><id>supportsInbandScom</id><value>1</value></field> - <field><id>reserved</id><value>0</value></field> - </default> - </attribute> - <attribute> - <id>MODEL</id> - <default>CENTAUR</default> - </attribute> -</targetType> - -<!-- Centaur MBA --> - -<targetType> - <id>unit-mba-centaur</id> - <parent>unit-mba-power8</parent> - <attribute> - <id>PRIMARY_CAPABILITIES</id> - <default> - <field><id>supportsFsiScom</id><value>1</value></field> - <field><id>supportsXscom</id><value>0</value></field> - <field><id>supportsInbandScom</id><value>1</value></field> - <field><id>reserved</id><value>0</value></field> - </default> - </attribute> - <attribute> - <id>MODEL</id> - <default>CENTAUR</default> - </attribute> -</targetType> - -<!-- Centaur memory port --> - -<targetType> - <id>unit-memport-centaur</id> - <parent>unit-memport-power8</parent> - <attribute> - <id>PRIMARY_CAPABILITIES</id> - <default> - <field><id>supportsFsiScom</id><value>0</value></field> - <field><id>supportsXscom</id><value>0</value></field> - <field><id>supportsInbandScom</id><value>0</value></field> - <field><id>reserved</id><value>0</value></field> - </default> - </attribute> - <attribute> - <id>MODEL</id> - <default>CENTAUR</default> - </attribute> -</targetType> - -<!--Dummy card to use as a DIMM for initial I2C/EEPROM testing --> -<targetType> - <id>card</id> - <parent>base</parent> - <attribute> - <id>CLASS</id> - <default>CARD</default> - </attribute> -</targetType> - -<targetType> - <id>lcard-dimm</id> - <parent>card</parent> - <attribute> - <id>TYPE</id> - <default>DIMM</default> - </attribute> - <attribute> - <id>CLASS</id> - <default>LOGICAL_CARD</default> - </attribute> - <attribute> - <id>POSITION</id> - </attribute> - <attribute> - <id>MBA_PORT</id> - </attribute> - <attribute> - <id>MBA_DIMM</id> - </attribute> - - <!-- Defaulting this info to the one Simics Dummy device that we have --> - <attribute><id>EEPROM_ADDR_INFO0</id></attribute> - - <attribute><id>VPD_REC_NUM</id></attribute> -</targetType> - -<targetType> - <id>lcard-dimm-jedec</id> - <parent>lcard-dimm</parent> - <attribute><id>MODEL</id><default>JEDEC</default></attribute> - <attribute><id>CEN_DQ_TO_DIMM_CONN_DQ</id></attribute> -</targetType> - -<targetType> - <id>lcard-dimm-cdimm</id> - <parent>lcard-dimm</parent> - <attribute><id>MODEL</id><default>CDIMM</default></attribute> -</targetType> - -</attributes> |