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| author | Amit Tendolkar <amit.tendolkar@in.ibm.com> | 2018-07-18 03:24:30 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-08-01 13:35:39 -0500 |
| commit | 4022351e16d2eb0368407c7a2e1d28507adcfee3 (patch) | |
| tree | e7c255cb9bd303902235792669383dd32672f512 /src/usr/targeting/targetservicestart.C | |
| parent | b2cf0aa44b39ba6ff6f09b2ebc3ec3942b020f24 (diff) | |
| download | talos-hostboot-4022351e16d2eb0368407c7a2e1d28507adcfee3.tar.gz talos-hostboot-4022351e16d2eb0368407c7a2e1d28507adcfee3.zip | |
Enable PM Malf Alert Handling & PM Complex FFDC to HOMER
1. Enable ATTR_PM_MALF_ALERT_ENABLE so that alerts due to a PM
Complex failure are sent to PHYP and related callouts, etc by PRD
are enabled. This is enabled only for PHYP loads.
2. Enable ATTR_PM_RESET_FFDC_ENABLE so that on a PM Complex Reset
triggered due to PM Errors (e.g. Malf alert, etc.), PM Complex FFDC
is captured and stored in the HOMER to enable debug.
Change-Id: I2c0b753e461a59e12f99ef029702759f508904cb
CQ: SW436197
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62727
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/targeting/targetservicestart.C')
| -rwxr-xr-x | src/usr/targeting/targetservicestart.C | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/usr/targeting/targetservicestart.C b/src/usr/targeting/targetservicestart.C index ab32b3b28..77e602578 100755 --- a/src/usr/targeting/targetservicestart.C +++ b/src/usr/targeting/targetservicestart.C @@ -458,6 +458,10 @@ static void initializeAttributes(TargetService& i_targetService, l_pTopLevel->setAttr<ATTR_HB_RSV_MEM_NEXT_SECTION>(0); l_pTopLevel->setAttr<ATTR_ATTN_CHK_ALL_PROCS>(1); + //Clear out PM MALF and FFDC enabled attributes + l_pTopLevel->setAttr<ATTR_PM_MALF_ALERT_ENABLE> (0x0); + l_pTopLevel->setAttr<ATTR_PM_RESET_FFDC_ENABLE> (0x0); + //Assemble list of functional procs and zero out virtual address values //to ensure they get set again this IPL TARGETING::PredicateCTM l_chipFilter(CLASS_CHIP, TYPE_PROC); |
