diff options
| author | Dan Crowell <dcrowell@us.ibm.com> | 2013-02-15 09:59:35 -0600 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-04-03 16:53:06 -0500 |
| commit | db788c8ab715f12958584a9d20a31cef28b64698 (patch) | |
| tree | e20b3f6b3b1f88a26e9b96a1aa72664cd9f27b67 /src/usr/targeting/common | |
| parent | ad540da587687d36373267ab468584f40e99d14b (diff) | |
| download | talos-hostboot-db788c8ab715f12958584a9d20a31cef28b64698.tar.gz talos-hostboot-db788c8ab715f12958584a9d20a31cef28b64698.zip | |
Updates to HostServices attribute list
Adding a few more attributes that the HWPs in HostServices need.
Also improved the testcases to catch missing attributes.
Updated gen script to add missing PM attribute defaults.
Change-Id: I99d2c4646492f020fb59f526db5a449d3507939a
RTC: 52950
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3236
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Tested-by: Jenkins Server
Diffstat (limited to 'src/usr/targeting/common')
| -rwxr-xr-x | src/usr/targeting/common/genHwsvMrwXml.pl | 96 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/attribute_types.xml | 876 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/common.mk | 4 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/simics_MURANO.system.xml | 226 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/simics_VENICE.system.xml | 449 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/target_types.xml | 199 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml | 127 |
7 files changed, 686 insertions, 1291 deletions
diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl index 7c59a07f7..a90bc1384 100755 --- a/src/usr/targeting/common/genHwsvMrwXml.pl +++ b/src/usr/targeting/common/genHwsvMrwXml.pl @@ -1482,6 +1482,53 @@ sub generate_sys </attribute>"; generate_max_config(); + #todo-RTC:52835 + print " + <!-- Start pm_plat_attributes.xml --> + <attribute><id>PROC_R_LOADLINE</id> + <default>890</default> + </attribute> + <attribute><id>PROC_R_DISTLOSS</id> + <default>100</default> + </attribute> + <attribute><id>PROC_VRM_VOFFSET</id> + <default>1000</default> + </attribute> + <attribute><id>FREQ_CORE_MAX</id> + <default>4000</default> + </attribute> + <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> + <default>2500</default> + </attribute> + <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> + <default>10</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> + <default>2000</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> + <default>2300</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> + <default>3000</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> + <default>3050</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> + <default>4800</default> + </attribute> + <attribute><id>PM_SAFE_FREQUENCY</id> + <default>3200</default> + </attribute> + <attribute><id>PM_SPIPSS_FREQUENCY</id> + <default>10</default> + </attribute> + <attribute><id>PM_SPIVID_FREQUENCY</id> + <default>0b11</default> + </attribute> +"; + # call to do any fsp per-sys attributes do_plugin('fsp_sys', $sys, $sysname, 0); @@ -1806,8 +1853,55 @@ sub generate_proc <attribute> <id>PROC_PCIE_PHB_ACTIVE</id> <default>0</default> + </attribute>\n"; + + #@todo-RTC:52835 + print " + <!-- Start pm_plat_attributes.xml --> + <attribute><id>PM_PSTATE_UNDERVOLTING_MINIMUM</id> + <default>900</default> + </attribute> + <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id> + <default>1250</default> </attribute> -</targetInstance>\n"; + <attribute><id>PM_SLEEP_TYPE</id> + <default>1</default><!-- DEEP --> + </attribute> + <attribute><id>PM_PBAX_NODEID</id> + <default>0</default> + </attribute> + <attribute><id>PM_PBAX_CHIPID</id> + <default>$logid</default> + </attribute> + <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> + <default>$lognode</default> + </attribute> + <attribute><id>PM_SPIVID_PORT_ENABLE</id>\n"; + if( $proc % 2 == 0 ) # proc0 of DCM + { + print " <default>0b100</default><!-- PORT0NONRED -->"; + } + else # proc1 of DCM + { + print " <default>0b000</default><!-- NONE -->"; + } + print " + </attribute> + <attribute><id>PM_APSS_CHIP_SELECT</id>\n"; + if( $proc % 2 == 0 ) # proc0 of DCM + { + print " <default>0x00</default><!-- CS0 -->"; + } + else # proc1 of DCM + { + print " <default>0xFF</default><!-- NONE -->"; + } + print " + </attribute> + <!-- End pm_plat_attributes.xml -->\n"; + + + print " </targetInstance>\n"; } diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index 00ed8177e..8aafa7fbf 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -2593,15 +2593,31 @@ </enumerator> </enumerationType> -<!-- Support for pm_attributes_all_hwp.xml --> +<!-- Support for pm_hwp_attributes.xml --> + +<attribute> + <id>PROC_DPLL_DIVIDER</id> + <description> + PROC_CHIP Attribute + </description> + <simpleType> + <uint32_t></uint32_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_DPLL_DIVIDER</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> <attribute> <id>PM_POWER_PROXY_TRACE_TIMER</id> <description> PROC_CHIP Attribute - The Power Proxy Trace timer (binary in microseconds) defines the time between Power Proxy Trace records when no other event that would otherwise produce a record has occured. Values must be within a range of 32us to 64ms. </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2617,9 +2633,8 @@ <id>PM_PPT_TIMER_MATCH_VALUE</id> <description> PROC_CHIP Attribute - The delay is 32us * ATTR_PM_PPT_TIMER_MATCH_VALUE </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2635,9 +2650,8 @@ <id>PM_PPT_TIMER_TICK</id> <description> PROC_CHIP Attribute - Defines the Power Proxy Trace interval timer tick (0=25us, 1=0.5us, 2=1us, and 3=2us) </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2653,9 +2667,8 @@ <id>PM_AISS_TIMEOUT</id> <description> PROC_CHIP Attribute - Defines the timeout value for the Architected Idle State Sequencer (AISS). </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2671,7 +2684,6 @@ <id>PM_PSTATE_STEPSIZE</id> <description> PROC_CHIP Attribute - Unsigned 7 bit (baby-) stepsize for Pstate transitions between the Global Pstate Actual and the Global Pstate Target. Only non-zero values are supported for this dial. Used to setup the PMC voltage controller @@ -2679,7 +2691,7 @@ Producer: proc_build_pstate_tables.C Consumer: OCC pstate_init() </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2695,13 +2707,12 @@ Consumer: OCC pstate_init() <id>PM_EXTERNAL_VRM_STEPDELAY_RANGE</id> <description> PROC_CHIP Attribute - Selects the resolution for the step delay count after a voltage change (decimal value N for this field divides the prv clock by 2^(N+3)) A 4 bit field selects one of the the upper 16bit of a 19bit counter (16+3) incremented in the nest/4 domain Consumer: proc_pm.scominit </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2717,11 +2728,10 @@ Consumer: proc_pm.scominit <id>PM_EXTERNAL_VRM_STEPDELAY_VALUE</id> <description> PROC_CHIP Attribute - Step delay after a voltage change in increments of vrm_stepdelay_range. Setting this dial to a value N causes a delay of N cycles of the divided nest clk (see dial vrm_stepdelay_range). The closed formula is as follows: Delay_seconds = vrm_stepdelay_value * ( 2^(3 + vrm_stepdelay_range) / (Nest_frequency_Hz/4)) Consumer: proc_pm.scominit </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2737,13 +2747,12 @@ Consumer: proc_pm.scominit <id>PM_PMC_HANGPULSE_DIVIDER</id> <description> PROC_CHIP Attribute - Divides the hang pulse to PMC to achieve XXXX. Note that this needs to be set according to the description of dial pmc_occ_heartbeat_time -Producer: prc_pm_effective +Producer: proc_pm_init Consumer: proc_pm.scominit </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2759,14 +2768,13 @@ Consumer: proc_pm.scominit <id>PM_PVSAFE_PSTATE</id> <description> PROC_CHIP Attribute - Pstate that is invoked in the PMC voltage controller upon the loss of the OCC Heartbeat.. -Producer: proc_pm_effective.C +Producer: proc_pm_init.C Consumer: proc_pm.scominit </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2782,13 +2790,12 @@ Consumer: proc_pm.scominit <id>PM_SPIVID_FRAME_SIZE</id> <description> PROC_CHIP Attribute - Number of data bits per individual SPIVID transaction (also referred to as frame) during chip select assertion Supported values: 0x20 (32d) Chip Select assertion duration is spi_frame_size + 2 </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2804,11 +2811,10 @@ Chip Select assertion duration is spi_frame_size + 2 <id>PM_SPIVID_IN_DELAY_FRAME1</id> <description> PROC_CHIP Attribute - Number of SPIVID clocks after chip select to wait before capturing MISO input in frame 1 Supported values: 0x00 to spi_frame_size. Values beyond spi_frame_size result in the input never being captured </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2824,11 +2830,10 @@ Supported values: 0x00 to spi_frame_size. Values beyond spi_frame_size result i <id>PM_SPIVID_IN_DELAY_FRAME2</id> <description> PROC_CHIP Attribute - Number of SPI clocks after chip select to wait before capturing MISO input in frame 2 Supported values: 0x00 to spi_frame_size. Values beyond spi_frame_size result in the input never being captured </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2844,9 +2849,8 @@ Supported values: 0x00 to spi_frame_size. Values beyond spi_frame_size result i <id>PM_SPIVID_CLOCK_POLARITY</id> <description> PROC_CHIP Attribute - SPVID Clock Polarity (CPOL=0 means that clk idle is deasserted, CPOL=1 means that clk idle is asserted) </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2862,9 +2866,8 @@ Supported values: 0x00 to spi_frame_size. Values beyond spi_frame_size result i <id>PM_SPIVID_CLOCK_PHASE</id> <description> PROC_CHIP Attribute - SPI clock phase (CPHA=0 means to change/sample values of data signals on first edge, otherwise on 2nd) </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2880,10 +2883,9 @@ Supported values: 0x00 to spi_frame_size. Values beyond spi_frame_size result i <id>PM_SPIVID_CLOCK_DIVIDER</id> <description> PROC_CHIP Attribute - SPIVID clock speed divider to divide the nest_nclk/4 mesh clock, which results in a divider = (nest_freq/ (SPI_freq*8))-1 For a 2.4GHz nest clock, this means that the SPI clk can be theoretically adjusted between 600MHz and 0.29MHz (cycle time 1.66ns...3.41us, in 1.66ns steps). However, a practical range is 0.5...25MHz. </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2899,10 +2901,9 @@ For a 2.4GHz nest clock, this means that the SPI clk can be theoretically adjust <id>PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS</id> <description> PROC_CHIP Attribute - Delay between command and status frames of a SPIVID 'WRITE' operation (binary in nanoseconds) Consumer: proc_pmc_init </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2918,7 +2919,6 @@ Consumer: proc_pmc_init <id>PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS_VALUE</id> <description> PROC_CHIP Attribute - Delay between two frames of a Write command as measured from the end of the last bit of the first frame until the chip select of the second frame, which contains the status, is asserted. This delay allows for the checking and status data production in the SPIVID chip. Delay is computed as: (value * ~100ns_hang_pulse) +0/-~100ns_hang_pulse time @@ -2927,7 +2927,7 @@ Delay is computed as: (value * ~100ns_hang_pulse) +0/-~100ns_hang_pulse time For values greater than 0x00000, the actual delay is 1 SPI Clock + the time delay designated by the value defined. Max. delay at 0x1FFFF: 13.1ms + 1 SPI clock cycle. </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2943,7 +2943,6 @@ For values greater than 0x00000, the actual delay is 1 SPI Clock + the time dela <id>PM_SPIVID_INTER_RETRY_DELAY_VALUE</id> <description> PROC_CHIP Attribute - Delay between command retry attempts. Delay is computed as: (value * ~100ns_hang_pulse) +0/-~100ns_hang_pulse time @@ -2952,7 +2951,7 @@ Delay is computed as: (value * ~100ns_hang_pulse) +0/-~100ns_hang_pulse time For values greater than 0x00000, the actual delay is 1 SPI Clock + the time delay designated by the value defined. Max. delay at 0x1FFFF: 13.1ms + 1 SPI clock cycle. </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2968,10 +2967,9 @@ For values greater than 0x00000, the actual delay is 1 SPI Clock + the time dela <id>PM_SPIVID_INTER_RETRY_DELAY</id> <description> PROC_CHIP Attribute - Delay between SPIVID reture attempts when WRITE command status indicates an error (binary in nanoseconds) Consumer: proc_pmc_init </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -2987,9 +2985,8 @@ Consumer: proc_pmc_init <id>PM_SPIVID_CRC_GEN_ENABLE</id> <description> PROC_CHIP Attribute - EnableS CRC generation from processor to VRM device. This will produce an 8b CRC per the enabled polynomial. If CRC generation is disabled, the full 32 bits at the data input of the SPI master are transmitted. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3005,9 +3002,8 @@ Consumer: proc_pmc_init <id>PM_SPIVID_CRC_CHECK_ENABLE</id> <description> PROC_CHIP Attribute - Enables CRC checking in the processor of frames from the VRM device. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3023,9 +3019,8 @@ Consumer: proc_pmc_init <id>PM_SPIVID_MAJORITY_VOTE_ENABLE</id> <description> PROC_CHIP Attribute - enables the a majority vote on the 3B of status payload on a frame received by the master as each of these have a 1 byte status field replicated three (3) times by the slave. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3041,12 +3036,11 @@ Consumer: proc_pmc_init <id>PM_SPIVID_MAX_RETRIES</id> <description> PROC_CHIP Attribute - Number retries upon detected errors. 0x00: No retry 0x01 to 0x1F: 1 to 31 respectively </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3062,14 +3056,13 @@ Consumer: proc_pmc_init <id>PM_SPIVID_CRC_POLYNOMIAL_ENABLES</id> <description> PROC_CHIP Attribute - CRC8 Polynomial Enables An 8 bit mask vector to enable XORs in the CRC generation and checking LFSRs at the respective bit position. MSB (x^8) is omitted since it is always enabled, so the mask layout is (x^7,x^6,x^5,x^4,x^3,x^2,x^1,1) Planned CRC8 polynomial: x^8 + x^7 + x^6 + x^4 + x^2 + 1 Value to enable planned polynomial: 0b1101_0101 (=0xD5) </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3085,10 +3078,9 @@ Value to enable planned polynomial: 0b1101_0101 (=0xD5) <id>PM_OCC_HEARTBEAT_TIME</id> <description> PROC_CHIP Attribute - Time within which the OCC firmware must access the PMC or the OCC will be considered faulty whereby FIRs and malfunction alerts will be produced . (binary in nanoseconds) Consumer: OCC FW </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3104,11 +3096,10 @@ Consumer: OCC FW <id>PM_SLEEP_WINKLE_REQUEST_TIMEOUT</id> <description> PROC_CHIP Attribute - Time (binary in ns) that will be the threshold value for the PMC PORE request timeout. Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by proc_pm..scominit as a multiple of PM hang pulses.. Counter starts at 0, is increased with every tp_pmc_hang_pulse as long as PORE is busy and set the PMC local FIR bit 19 when count = threshold. </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3121,18 +3112,105 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by </attribute> <attribute> - <id>PM_PFET_POWERUP_CORE_DELAY0</id> + <id>PM_SLEEP_ENTRY</id> <description> PROC_CHIP Attribute - Delay (binary in nanoseconds) after a step in the Core power-up PFET sequence. Enabled per step by the vector defined in ATTR_PM_PFET_POWERUP_CORE_SEQUENCE_DELAY_SELECT + +Set Assisted if power off serialization is needed and SLEEP_TYPE=Fast; Set to Hardware if the system can handle the unrelated powering off between cores. Hardware setting decreases entry latency + +Producer: MRWB + +Consumer: proc_pm_init and proc_pcbs_init </description> - <simpleType> - <uint32_t></uint32_t> + <simpleType> + <uint8_t></uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_PM_SLEEP_ENTRY</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PM_SLEEP_EXIT</id> + <description> + PROC_CHIP Attribute + +Set to Assisted if power on serialization is needed and SLEEP_TYPE=Fast; Set to Hardware if the system can handle the unrelated powering off between cores. Hardware setting decreases entry latency +Must be set to Assisted if ATTR_PM_SLEEP_TYPE=Deep as this necessary for restore. + +Setting to Hardware is a test mode for Fast only. + +Producer: MRWB + +Consumer: proc_pm_init and proc_pcbs_init. + </description> + <simpleType> + <uint8_t></uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_PM_SLEEP_EXIT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PM_SLEEP_TYPE</id> + <description> + PROC_CHIP Attribute +Selects which voltage level to place the Core domain PFETs upon Sleep entry. 0 = Vret (Fast Sleep Mode), 1 = Voff (Deep Sleep Mode) + +Producer: MRWB + +Consumer: proc_pm_init and proc_pcbs_init + </description> + <simpleType> + <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> <readable/> <writeable/> <hwpfToHbAttrMap> + <id>ATTR_PM_SLEEP_TYPE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PM_WINKLE_TYPE</id> + <description> + PROC_CHIP Attribute +Selects which voltage level to place the Core and ECO domain PFETs upon Winkle entry. 0 = Vret (Fast Winkle Mode), 1 = Voff (Deep Winkle Mode) + </description> + <simpleType> + <uint8_t></uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_PM_WINKLE_TYPE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PM_PFET_POWERUP_CORE_DELAY0</id> + <description> + PROC_CHIP Attribute + </description> + <simpleType> + <uint32_t></uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> <id>ATTR_PM_PFET_POWERUP_CORE_DELAY0</id> <macro>DIRECT</macro> </hwpfToHbAttrMap> @@ -3142,14 +3220,12 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERUP_CORE_DELAY1</id> <description> PROC_CHIP Attribute - Delay (binary in nanoseconds) after a step in the Core power-up PFET sequence. Enabled per step by the vector defined in ATTR_PM_PFET_POWERUP_CORE_SEQUENCE_DELAY_SELECT </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> - <persistency>volatile-zeroed</persistency> + <persistency>non-volatile</persistency> <readable/> - <writeable/> <hwpfToHbAttrMap> <id>ATTR_PM_PFET_POWERUP_CORE_DELAY1</id> <macro>DIRECT</macro> @@ -3160,9 +3236,8 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERUP_CORE_DELAY0_VALUE</id> <description> PROC_CHIP Attribute - Delay value 0 between any step in the Core power-up PFET sequence. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3178,9 +3253,8 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERUP_CORE_DELAY1_VALUE</id> <description> PROC_CHIP Attribute - Delay value 1 between any step in the Core power-up PFET sequence. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3196,13 +3270,12 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERUP_CORE_SEQUENCE_DELAY_SELECT</id> <description> PROC_CHIP Attribute - Binary vector where the most significant bits (0:11) identify the delay to be used for that step of the sequence. Power up goes from 11, then 10, then 9,.... then 0. 0 in the bit position: use ATTR_PM_PFET_POWERUP_CORE_DELAY0; 1 in the bit position: use ATTR_PM_PFET_POWERUP_CORE_DELAY1 </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3218,14 +3291,12 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERDOWN_CORE_DELAY0</id> <description> PROC_CHIP Attribute - Delay (binary in nanoseconds) between a step in the Core power-down PFET sequence. Enabled per step by the vector defined in ATTR_PM_PFET_POWERDOWN_CORE_SEQUENCE_DELAY_SELECT </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> - <persistency>volatile-zeroed</persistency> + <persistency>non-volatile</persistency> <readable/> - <writeable/> <hwpfToHbAttrMap> <id>ATTR_PM_PFET_POWERDOWN_CORE_DELAY0</id> <macro>DIRECT</macro> @@ -3236,14 +3307,12 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERDOWN_CORE_DELAY1</id> <description> PROC_CHIP Attribute - Delay (binary in nanoseconds) between a step in the Core power-down PFET sequence. Enabled per step by the vector defined in ATTR_PM_PFET_POWERDOWN_CORE_SEQUENCE_DELAY_SELECT </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> - <persistency>volatile-zeroed</persistency> + <persistency>non-volatile</persistency> <readable/> - <writeable/> <hwpfToHbAttrMap> <id>ATTR_PM_PFET_POWERDOWN_CORE_DELAY1</id> <macro>DIRECT</macro> @@ -3254,9 +3323,8 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERDOWN_CORE_DELAY0_VALUE</id> <description> PROC_CHIP Attribute - Delay value 0 between any step in the Core power-up PFET sequence. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3272,9 +3340,8 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERDOWN_CORE_DELAY1_VALUE</id> <description> PROC_CHIP Attribute - Delay value 1 between any step in the Core power-up PFET sequence. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3290,13 +3357,12 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERDOWN_CORE_SEQUENCE_DELAY_SELECT</id> <description> PROC_CHIP Attribute - Binary vector where the most significant bits (0:11) identify the delay to be used for that step of the sequence. Power up goes from 11, then 10, then 9,.... then 0. 0 in the bit position: use ATTR_PM_PFET_POWERUP_CORE_DELAY0; 1 in the bit position: use ATTR_PM_PFET_POWERUP_CORE_DELAY1 </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3312,14 +3378,12 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERUP_ECO_DELAY0</id> <description> PROC_CHIP Attribute - Delay (binary in nanoseconds) after a step in the ECO power-up PFET sequence. Enabled per step by the vector defined in ATTR_PM_PFET_POWERUP_ECO_SEQUENCE_DELAY_SELECT </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> - <persistency>volatile-zeroed</persistency> + <persistency>non-volatile</persistency> <readable/> - <writeable/> <hwpfToHbAttrMap> <id>ATTR_PM_PFET_POWERUP_ECO_DELAY0</id> <macro>DIRECT</macro> @@ -3330,14 +3394,12 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERUP_ECO_DELAY1</id> <description> PROC_CHIP Attribute - Delay (binary in nanoseconds) after a step in the ECO power-up PFET sequence. Enabled per step by the vector defined in ATTR_PM_PFET_POWERUP_ECO_SEQUENCE_DELAY_SELECT </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> - <persistency>volatile-zeroed</persistency> + <persistency>non-volatile</persistency> <readable/> - <writeable/> <hwpfToHbAttrMap> <id>ATTR_PM_PFET_POWERUP_ECO_DELAY1</id> <macro>DIRECT</macro> @@ -3348,9 +3410,8 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERUP_ECO_DELAY0_VALUE</id> <description> PROC_CHIP Attribute - Delay value 0 between any step in the ECO power-up PFET sequence. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3366,9 +3427,8 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERUP_ECO_DELAY1_VALUE</id> <description> PROC_CHIP Attribute - Delay value 1 between any step in the ECO power-up PFET sequence. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3384,13 +3444,12 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERUP_ECO_SEQUENCE_DELAY_SELECT</id> <description> PROC_CHIP Attribute - Binary vector where the most significant bits (0:11) identify the delay to be used for that step of the sequence. Power up goes from 11, then 10, then 9,.... then 0. 0 in the bit position: use ATTR_PM_PFET_POWERUP_ECO_DELAY0; 1 in the bit position: use ATTR_PM_PFET_POWERUP_ECO_DELAY1 </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3406,14 +3465,12 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERDOWN_ECO_DELAY0</id> <description> PROC_CHIP Attribute - Delay (binary in nanoseconds) between a step in the ECO power-down PFET sequence. Enabled per step by the vector defined in ATTR_PM_PFET_POWERDOWN_ECO_SEQUENCE_DELAY_SELECT </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> - <persistency>volatile-zeroed</persistency> + <persistency>non-volatile</persistency> <readable/> - <writeable/> <hwpfToHbAttrMap> <id>ATTR_PM_PFET_POWERDOWN_ECO_DELAY0</id> <macro>DIRECT</macro> @@ -3424,14 +3481,12 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERDOWN_ECO_DELAY1</id> <description> PROC_CHIP Attribute - Delay (binary in nanoseconds) between a step in the ECO power-down PFET sequence. Enabled per step by the vector defined in ATTR_PM_PFET_POWERDOWN_ECO_SEQUENCE_DELAY_SELECT </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> - <persistency>volatile-zeroed</persistency> + <persistency>non-volatile</persistency> <readable/> - <writeable/> <hwpfToHbAttrMap> <id>ATTR_PM_PFET_POWERDOWN_ECO_DELAY1</id> <macro>DIRECT</macro> @@ -3442,9 +3497,8 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERDOWN_ECO_DELAY0_VALUE</id> <description> PROC_CHIP Attribute - Delay value 0 between any step in the ECO power-up PFET sequence. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3460,9 +3514,8 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERDOWN_ECO_DELAY1_VALUE</id> <description> PROC_CHIP Attribute - Delay value 1 between any step in the ECO power-up PFET sequence. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3478,9 +3531,8 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PFET_POWERDOWN_ECO_SEQUENCE_DELAY_SELECT</id> <description> PROC_CHIP Attribute - Binary vector where the most significant bits (0:11) identify the delay to be used for that step of the ECO power up sequence. Power up goes from 11, then 10, then 9,.... then 0. 0 in the bit position: use ATTR_PM_PFET_POWERUP_ECO_DELAY0; 1 in the bit position: use ATTR_PM_PFET_POWERUP_ECO_DELAY1 </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3496,13 +3548,12 @@ Consumer: proc_pmc_init.C. Will be translated to a DYNAMIC ATTRIBUTE for use by <id>PM_PSTATE0_FREQUENCY</id> <description> PROC_CHIP Attribute - Defines the center point of the Pstate space in the frequency domain. Binary in Khz. Producer: proc_build_gpstate.C -Consumers: proc_pcbs_init.C, proc_pcbs_lpst_init.C, +Consumers: proc_pcbs_init.C, proc_pcbs_lpst_init.C, </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3518,9 +3569,8 @@ Consumers: proc_pcbs_init.C, proc_pcbs_lpst_init.C, <id>PM_IVRMS_ENABLED</id> <description> PROC_CHIP Attribute - Indicates whether available internal voltage regulation macros (iVRMs) are to enabled. This indicates that module VPD has valid #M keywords available. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3536,27 +3586,26 @@ Consumers: proc_pcbs_init.C, proc_pcbs_lpst_init.C, <id>PM_SAFE_PSTATE</id> <description> PROC_CHIP Attribute - Safe Pstate Valid Values:-128 thru 127 -Producer: proc_pm_effective.C +Producer: proc_pm_init.C DYNAMIC_ATTRIBUTE Consumer: proc_pcbs_init.C Establishes the Pstate that the core chiplet will take on if: -psafe less than or equal to PMSR[global_actual_pstate] +psafe less-than-or-equal PMSR[global_actual_pstate] AND any of the following conditions are true: Loss of OCC Heartbeat if occ_heartbeat_en is set PMGP0[force_safe_mode] is set -If psafe > PMSR[global_actual_pstate], the global_actual_pstate is forced. +If psafe greater-than PMSR[global_actual_pstate], the global_actual_pstate is forced. The value of Psafe needs to be at or below the nominal Pstate to make sure safe operation of all chiplets. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3572,9 +3621,8 @@ The value of Psafe needs to be at or below the nominal Pstate to make sure safe <id>PM_RESONANT_CLOCK_ENABLE</id> <description> PROC_CHIP Attribute - Resonant Clock Enable </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3590,11 +3638,9 @@ The value of Psafe needs to be at or below the nominal Pstate to make sure safe <id>PM_RESONANT_CLOCK_FULL_CSB_PSTATE</id> <description> PROC_CHIP Attribute - FCSB = Full Clock Sector Buffer (8b in terms of Pstate) Defines the Pstate for the point at which clock sector buffers should be at full strength. This is to support Vmin operation. - </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3610,9 +3656,8 @@ Defines the Pstate for the point at which clock sector buffers should be at full <id>PM_RESONANT_CLOCK_LFRLOW_PSTATE</id> <description> PROC_CHIP Attribute - LFRLower = Low Frequency Resonant Lower. Defines the Pstate for the lower end of the Low Frequency Resonant band </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3628,9 +3673,8 @@ Defines the Pstate for the point at which clock sector buffers should be at full <id>PM_RESONANT_CLOCK_LFRUPPER_PSTATE</id> <description> PROC_CHIP Attribute - LFRUpper = Low Frequency Resonant Upper. Defines the Pstate for the upper end of the Low Frequency Resonant band </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3646,9 +3690,8 @@ Defines the Pstate for the point at which clock sector buffers should be at full <id>PM_RESONANT_CLOCK_HFRLOW_PSTATE</id> <description> PROC_CHIP Attribute - HFRLower = High Frequency Resonant Low. Defines the Pstate for the lower end of the High Frequency Resonant band </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3664,9 +3707,8 @@ Defines the Pstate for the point at which clock sector buffers should be at full <id>PM_RESONANT_CLOCK_HFRHIGH_PSTATE</id> <description> PROC_CHIP Attribute - HFRUpper = High Frequency Resonant Upper. Defines the Pstate for the upper end of the High Frequency Resonant band </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3682,13 +3724,12 @@ Defines the Pstate for the point at which clock sector buffers should be at full <id>PM_SPIPSS_FRAME_SIZE</id> <description> PROC_CHIP Attribute - Number of data bits per individual SPIPSS transaction (also referred to as frame) during chip select assertion Supported values: 0x10 (16d), Chip Select assertion duration is spi_frame_size + 2 </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3704,11 +3745,10 @@ Chip Select assertion duration is spi_frame_size + 2 <id>PM_SPIPSS_OUT_COUNT</id> <description> PROC_CHIP Attribute - Number of bits sent out MOSI of the frame Supported values: 0x000 to spi_frame_size. Values beyond spi_frame_size are ignored. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3724,11 +3764,10 @@ Supported values: 0x000 to spi_frame_size. Values beyond spi_frame_size are ign <id>PM_SPIPSS_IN_DELAY</id> <description> PROC_CHIP Attribute - Number of SPI clocks after chip select to wait before capturing MISO input Supported values: 0x000 to spi_frame_size. Values beyond spi_frame_size result in the input never being captured </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3744,11 +3783,10 @@ Supported values: 0x000 to spi_frame_size. Values beyond spi_frame_size result <id>PM_SPIPSS_IN_COUNT</id> <description> PROC_CHIP Attribute - Number of bits captured on MISO input Supported values: 0x000 to spi_frame_size. The actual number of bits captured is spi_frame_size - spi_in_delay </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3764,9 +3802,8 @@ Supported values: 0x000 to spi_frame_size. The actual number of bits captured i <id>PM_SPIPSS_CLOCK_POLARITY</id> <description> PROC_CHIP Attribute - SPIPSS Clock Polarity (CPOL=0 means that clk idle is deasserted, CPOH=1 means that clk idle is asserted) </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3782,9 +3819,8 @@ Supported values: 0x000 to spi_frame_size. The actual number of bits captured i <id>PM_SPIPSS_CLOCK_PHASE</id> <description> PROC_CHIP Attribute - SPIPSS clock phase (CPHA=0 means to change/sample values of data signals on first edge, otherwise on 2nd) </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3800,9 +3836,8 @@ Supported values: 0x000 to spi_frame_size. The actual number of bits captured i <id>PM_SPIPSS_CLOCK_DIVIDER</id> <description> PROC_CHIP Attribute - SPI clock speed divider to divide the nest_nclk/4 mesh clock, which results in a divider = (nest_freq/ (SPI_freq*8))-1 </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3818,7 +3853,6 @@ Supported values: 0x000 to spi_frame_size. The actual number of bits captured i <id>PM_SPIPSS_INTER_FRAME_DELAY_SETTING</id> <description> PROC_CHIP Attribute - Delay is computed as: (value * ~100ns_hang_pulse) +0/-~100ns_hang_pulse time 0x00000: Wait 1 PSS Clock @@ -3826,11 +3860,11 @@ Delay is computed as: (value * ~100ns_hang_pulse) +0/-~100ns_hang_pulse time For values greater than 0x00000, the actual delay is 1 PSS Clock + the time delay designated by the value defined. Max. delay at 0x1FFFF: 13.1ms + 1 PSSI clock cycle. -Producer: proc_pm_effective +Producer: proc_pm_init Consumer: proc_pss_init </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3846,13 +3880,12 @@ Consumer: proc_pss_init <id>PM_SPIPSS_INTER_FRAME_DELAY</id> <description> PROC_CHIP Attribute - Delay between two frames of a P2S command as measured from the end of the last bit of the first frame until the chip select of the second frame. (binary in nanoseconds) -Consumer: proc_pm_effective +Consumer: proc_pm_init Produces ATTR_PM_SPIPSS_INTER_FRAME_DELAY_SETTING </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3868,19 +3901,18 @@ Produces ATTR_PM_SPIPSS_INTER_FRAME_DELAY_SETTING <id>PM_PBAX_RCV_RESERV_TIMEOUT</id> <description> PROC_CHIP Attribute - PBAX Data Timeout Divider Divider for the 1us PBAX hang pulse. A hang is detected after two divided hang pulses are received under the following conditions: -- Data Hi packet accepted and timeout waiting for Data Lo packet. -- Reservation aquired and timeout waiting for Data Hi packet. + Data Hi packet accepted and timeout waiting for Data Lo packet. + Reservation aquired and timeout waiting for Data Hi packet. -00000 = Data Timeout is Disabled -00001 = divided hang pulse = PBAX hang pulse -00010 = divided hang pulse = PBAX hang pulse/2 -00011 = divided hang pulse = PBAX hang pulse/3 +00000 Data Timeout is Disabled +00001 divided hang pulse = PBAX hang pulse +00010 divided hang pulse = PBAX hang pulse/2 +00011 divided hang pulse = PBAX hang pulse/3 . . . -11111 = divided hang pulse = PBAX hang pulse/31 +11111 divided hang pulse = PBAX hang pulse/31 </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3896,10 +3928,9 @@ Divider for the 1us PBAX hang pulse. A hang is detected after two divided hang <id>PM_PBAX_SND_RETRY_COUNT_OVERCOMMIT_ENABLE</id> <description> PROC_CHIP Attribute - PBAX Send Retry count overcommit Mode bit to count overcommit retries for the send retry threshold when sending PBAX commands on the powerbus. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3915,7 +3946,6 @@ Mode bit to count overcommit retries for the send retry threshold when sending P <id>PM_PBAX_SND_RETRY_THRESHOLD</id> <description> PROC_CHIP Attribute - PBAX Send Retry Threshold Defines the maximum number of retry attempts by the Send Engine for any phase of the PBAX transaction set before the operation is dropped and status bit are set. This does not count PowerBus overcommit retries unless snd_retry_count_overcom bit is set. 0x00 : No Timeout @@ -3924,7 +3954,7 @@ Defines the maximum number of retry attempts by the Send Engine for any phase of .etc. 0xFF : 255 attempts </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3940,17 +3970,16 @@ Defines the maximum number of retry attempts by the Send Engine for any phase of <id>PM_PBAX_SND_RESERV_TIMEOUT</id> <description> PROC_CHIP Attribute - PBAX Send Reservation Timeout Divider Divider for the 1us PBAX hang pulse. A hang is detected after two divided hang pulses are received after attempting to acquire a reservation with the PBAX Receive engine before declaring a Send Reservation Timeout error. -00000 = Send Reservation Timeout is Disabled -00001 = divided hang pulse = PBAX hang pulse -00010 = divided hang pulse = PBAX hang pulse/2 -00011 = divided hang pulse = PBAX hang pulse/3 +00000 Send Reservation Timeout is Disabled +00001 divided hang pulse = PBAX hang pulse +00010 divided hang pulse = PBAX hang pulse/2 +00011 divided hang pulse = PBAX hang pulse/3 . . . -11111 = divided hang pulse = PBAX hang pulse/31 +11111 divided hang pulse = PBAX hang pulse/31 </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3966,18 +3995,8 @@ Divider for the 1us PBAX hang pulse. A hang is detected after two divided hang <id>PM_SPWUP_FSP</id> <description> EX_CHIPLET Attribute - PBAX Send Reservation Timeout Divider -Divider for the 1us PBAX hang pulse. A hang is detected after two divided hang pulses are received after attempting to acquire a reservation with the PBAX Receive engine before declaring a Send Reservation Timeout error. - -00000 = Send Reservation Timeout is Disabled -00001 = divided hang pulse = PBAX hang pulse -00010 = divided hang pulse = PBAX hang pulse/2 -00011 = divided hang pulse = PBAX hang pulse/3 -. . . -11111 = divided hang pulse = PBAX hang pulse/31 - Arbitration Attribute for FSP special wakeups: upon set, increment, upon clear, decrement; hardware bit only cleared upon attribute being 0. </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -3993,19 +4012,8 @@ Divider for the 1us PBAX hang pulse. A hang is detected after two divided hang <id>PM_SPWUP_OCC</id> <description> EX_CHIPLET Attribute - PBAX Send Reservation Timeout Divider -Divider for the 1us PBAX hang pulse. A hang is detected after two divided hang pulses are received after attempting to acquire a reservation with the PBAX Receive engine before declaring a Send Reservation Timeout error. - -00000 = Send Reservation Timeout is Disabled -00001 = divided hang pulse = PBAX hang pulse -00010 = divided hang pulse = PBAX hang pulse/2 -00011 = divided hang pulse = PBAX hang pulse/3 -. . . -11111 = divided hang pulse = PBAX hang pulse/31 - Arbitration Attribute for FSP special wakeups: upon set, increment, upon clear, decrement; hardware bit only cleared upon attribute being 0. - Arbitration Attribute for OCC special wakeups: upon set, increment, upon clear, decrement; hardware bit only cleared upon attribute being 0. </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -4021,20 +4029,8 @@ Divider for the 1us PBAX hang pulse. A hang is detected after two divided hang <id>PM_SPWUP_PHYP</id> <description> EX_CHIPLET Attribute - PBAX Send Reservation Timeout Divider -Divider for the 1us PBAX hang pulse. A hang is detected after two divided hang pulses are received after attempting to acquire a reservation with the PBAX Receive engine before declaring a Send Reservation Timeout error. - -00000 = Send Reservation Timeout is Disabled -00001 = divided hang pulse = PBAX hang pulse -00010 = divided hang pulse = PBAX hang pulse/2 -00011 = divided hang pulse = PBAX hang pulse/3 -. . . -11111 = divided hang pulse = PBAX hang pulse/31 - Arbitration Attribute for FSP special wakeups: upon set, increment, upon clear, decrement; hardware bit only cleared upon attribute being 0. - Arbitration Attribute for OCC special wakeups: upon set, increment, upon clear, decrement; hardware bit only cleared upon attribute being 0. - Arbitration Attribute for PHYP special wakeups: upon set, increment, upon clear, decrement; hardware bit only cleared upon attribute being 0. </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>volatile-zeroed</persistency> @@ -4046,44 +4042,26 @@ Divider for the 1us PBAX hang pulse. A hang is detected after two divided hang </hwpfToHbAttrMap> </attribute> -<!-- End pm_attributes_all_hwp.xml --> +<!-- End pm_hwp_attributes.xml --> -<!-- Support for pm_attributes_all_plat.xml --> - -<attribute> - <id>PROC_DCM_INSTALLED</id> - <description> - PROC_CHIP Attribute -This attribute is set to 1 if the target processor is part of a Dual Chip Module (DCM). - -Used for enabling operations between the two chips for to voltage control based on 'interchip_mode' and the settings of PMIC0. - -Consumer: proc_pm.scominit - </description> - <simpleType> - <uint8_t></uint8_t> - </simpleType> - <persistency>non-volatile</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_DCM_INSTALLED</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> +<!-- Support for pm_hwp_attributes.xml --> <attribute> <id>PM_EXTERNAL_VRM_STEPSIZE</id> <description> - PROC_CHIP Attribute -Step size (binary in microvolts) to take upon external VRM voltage transitions. The value set here must take into account where internal VRMs are enabled or not as, when they are enabled, the step size must account for the tracking (eg PFET strength recalculation) for the step. + SYSTEM Attribute + Step size (binary in microvolts) to take upon external VRM voltage + transitions. The value set here must take into account where internal + VRMs are enabled or not as, when they are enabled, the step size must + account for the tracking (eg PFET strength recalculation) for the step. -MRWB after system characterization + Consumer: proc_build_pstate_tables.C, proc_pmc_init.C -config -Consumer: proc_build_pstate_tables.C, proc_pmc_init.C -config + Provided by the Machine Readable Workbook after system characterization. </description> - <simpleType> - <uint32_t></uint32_t> + <simpleType> + <uint8_t></uint8_t> </simpleType> <persistency>non-volatile</persistency> <readable/> @@ -4096,15 +4074,14 @@ Consumer: proc_build_pstate_tables.C, proc_pmc_init.C -config <attribute> <id>PM_EXTERNAL_VRM_STEPDELAY</id> <description> - PROC_CHIP Attribute -Step delay (binary in microseconds) after a voltage change - -Producer: MRWB after system characterization + SYSTEM Attribute + Step delay (binary in microseconds) after a voltage change + Consumer: proc_pmc_init -config -Consumer: proc_pmc_init -config + Provided by the Machine Readable Workbook after system characterization. </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>non-volatile</persistency> @@ -4116,44 +4093,17 @@ Consumer: proc_pmc_init -config </attribute> <attribute> - <id>PM_SAFE_VOLTAGE</id> - <description> - PROC_CHIP Attribute - -Voltage (binary in 5mv units) that is invoked upon the loss of the OCC Heartbeat. - -Used to determine the Pstate to load into the hardware for automatic reaction upon the loss of the OCC heartbeat . This value needs to be at or above that which supports the nominal frequency to make sure safe operation of all chiplets. - -The value is translated to the Pstate space. - -Consumer: proc_pm_effective.C - -DYNAMIC_ATTRIBUTE: ATTR_PM_SAFE_PSTATE - -Consumer: proc_pm.scominit - </description> - <simpleType> - <uint8_t></uint8_t> - </simpleType> - <persistency>non-volatile</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PM_SAFE_VOLTAGE</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> <id>PM_PSTATE_UNDERVOLTING_MINIMUM</id> <description> PROC_CHIP Attribute -Minimum frequency (binary in 5mv units) for which undervolting is allowed. Will be internally rounded to the nearest ATTR_PROC_REFCLK_FREQUENCY / 8 value. + Minimum frequency for which undervolting is allowed. Will be internally + rounded to the nearest ATTR_PROC_REFCLK_FREQUENCY / 8 value. -Consumer: OCC FW; OCC Lab Tools + Consumer: OCC FW; OCC Lab Tools -Need to create a process for MRWB elements to get passed to OCC (FW or lab tools) + Provided by the Machine Readable Workbook. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>non-volatile</persistency> @@ -4168,13 +4118,14 @@ Need to create a process for MRWB elements to get passed to OCC (FW or lab tools <id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id> <description> PROC_CHIP Attribute -Maximum frequency for which undervolting is allowed. Will be internally rounded to the nearest ATTR_PROC_REFCLK_FREQUENCY / 8 value. + Maximum frequency for which undervolting is allowed. Will be internally + rounded to the nearest ATTR_PROC_REFCLK_FREQUENCY / 8 value. -Consumer: OCC FW; OCC Lab Tools + Consumer: OCC FW; OCC Lab Tools -Need to create a process for MRWB elements to get passed to OCC (FW or lab tools) + Provided by the Machine Readable Workbook. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>non-volatile</persistency> @@ -4188,13 +4139,16 @@ Need to create a process for MRWB elements to get passed to OCC (FW or lab tools <attribute> <id>PM_SPIVID_FREQUENCY</id> <description> - PROC_CHIP Attribute -SPI Clock Frequency (binary in MHz) -Consumer: proc_pm_effective + SYSTEM Attribute + SPI Clock Frequency (binary in MHz) -Produces ATTR_PM_SPIVID_CLOCK_DIVIDER + Consumer: proc_pm_effective + + Produces ATTR_PM_SPIVID_CLOCK_DIVIDER + + Provided by the Machine Readable Workbook. </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>non-volatile</persistency> @@ -4209,183 +4163,52 @@ Produces ATTR_PM_SPIVID_CLOCK_DIVIDER <id>PM_SPIVID_PORT_ENABLE</id> <description> PROC_CHIP Attribute -Defines the configuration of the SPIVID ports from the target. NONE means that no VRM is attached; PORTxNONRED means that the indicated port is used in a non-redundant configuration; REDUNDANT means that all three are connected and considered redundant. - </description> - <simpleType> - <uint8_t></uint8_t> - </simpleType> - <persistency>non-volatile</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PM_SPIVID_PORT_ENABLE</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PM_SLEEP_ENTRY</id> - <description> - PROC_CHIP Attribute -Setting depends on di/dt charateristics of the system. - -Set Assisted if power off serialization is needed and SLEEP_TYPE=Fast; Set to Hardware if the system can handle the unrelated powering off between cores. Hardware setting decreases entry latency - -Producer: MRWB - -Consumer: proc_pm_init -config and proc_pcbs_init - </description> - <simpleType> - <uint8_t></uint8_t> - </simpleType> - <persistency>non-volatile</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PM_SLEEP_ENTRY</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PM_SLEEP_EXIT</id> - <description> - PROC_CHIP Attribute -Setting depends on di/dt charateristics of the system and the setting of ATTR_PM_SLEEP_TYPE. - -Set to Assisted if power on serialization is needed and SLEEP_TYPE=Fast; Set to Hardware if the system can handle the unrelated powering off between cores. Hardware setting decreases entry latency -Must be set to Assisted if ATTR_PM_SLEEP_TYPE=Deep as this necessary for restore. - -Setting to Hardware is a test mode for Fast only. - -Producer: MRWB - -Consumer: proc_pm_init -config and proc_pcbs_init - </description> - <simpleType> - <uint8_t></uint8_t> - </simpleType> - <persistency>non-volatile</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PM_SLEEP_EXIT</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PM_SLEEP_TYPE</id> - <description> - PROC_CHIP Attribute -Sleep Power Off Select: -Selects which voltage level to place the Core domain PFETs upon Sleep entry. 0 = Vret (Fast Sleep Mode), 1 = Voff (Deep Sleep Mode) + Defines the configuration of the SPIVID ports from the target. + - NONE means that no VRM is attached. + - PORTxNONRED means that the indicated port is used in a non-redundant + configuration. + - REDUNDANT means that all three are connected and considered redundant. -Producer: MRWB - -Consumer: proc_pm_init -config and proc_pcbs_init + Provided by the Machine Readable Workbook. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>non-volatile</persistency> <readable/> <hwpfToHbAttrMap> - <id>ATTR_PM_SLEEP_TYPE</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PM_WINKLE_ENTRY</id> - <description> - PROC_CHIP Attribute -Setting depends on di/dt charateristics of the system. - -Set Assisted if power off serialization is needed and WINKE_TYPE=Fast; Set to Hardware if the system can handle the unrelated powering off between cores. Hardware setting decreases entry latency - -Producer: MRWB - -Consumer: proc_pm_init -config and proc_pcbs_init - </description> - <simpleType> - <uint8_t></uint8_t> - </simpleType> - <persistency>non-volatile</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PM_WINKLE_ENTRY</id> + <id>ATTR_PM_SPIVID_PORT_ENABLE</id> <macro>DIRECT</macro> </hwpfToHbAttrMap> </attribute> <attribute> - <id>PM_WINKLE_EXIT</id> + <id>PM_SAFE_FREQUENCY</id> <description> - PROC_CHIP Attribute -Setting depends on di/dt charateristics of the system and the setting of ATTR_PM_WINKE_TYPE. + SYSTEM Attribute + Indicates the frequency that the cores will be moved to in the event of + the loss of the OCC Heartbead. This value needs to be at or below the + nominal frequency to make sure safe operation of all chiplets. -Set to Assisted if power on serialization is needed and WINKE_TYPE=Fast; Set to Hardware if the system can handle the unrelated powering off between cores. Hardware setting decreases entry latency -Must be set to Assisted if ATTR_PM_WINKE_TYPE=Deep as this necessary for restore. + Valid Values:-128 thru 127 -Setting to Hardware is a test mode for Fast only. + The value is translated to the Pstate space. -Producer: MRWB + Consumer: proc_pm_effective.C -Consumer: proc_pm_effective and proc_pcbs_init. - </description> - <simpleType> - <uint8_t></uint8_t> - </simpleType> - <persistency>non-volatile</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PM_WINKLE_EXIT</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> + DYNAMIC_ATTRIBUTE: ATTR_PM_SAFE_PSTATE -<attribute> - <id>PM_WINKLE_TYPE</id> - <description> - PROC_CHIP Attribute -Winkle Power Off Select: -Selects which voltage level to place the Core and ECO domain PFETs upon Winkle entry. 0 = Vret (Fast Winkle Mode), 1 = Voff (Deep Winkle Mode) + Consumer: proc_pcbs_init.C -Producer: MRWB - -Consumer: proc_pm_init -config and proc_pcbs_init + TODO: Dean said this may either be provided by the Machine Readable + Workbook or Todd R's power management def file. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>non-volatile</persistency> <readable/> <hwpfToHbAttrMap> - <id>ATTR_PM_WINKLE_TYPE</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PM_SAFE_FREQUENCY</id> - <description> - PROC_CHIP Attribute -Safe Frequency (binary in MHz) - -Indicates the frequency that the cores will be moved to in the event of the loss of the OCC Heartbead. This value needs to be at or below the nominal frequency to make sure safe operation of all chiplets. - -The value is translated to the Pstate space. - -Consumer: proc_pm_effective.C - -DYNAMIC_ATTRIBUTE: ATTR_PM_SAFE_PSTATE - -Consumer: proc_pcbs_init.C - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>non-volatile</persistency> - <readable/> - <hwpfToHbAttrMap> <id>ATTR_PM_SAFE_FREQUENCY</id> <macro>DIRECT</macro> </hwpfToHbAttrMap> @@ -4394,10 +4217,14 @@ Consumer: proc_pcbs_init.C <attribute> <id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> <description> - PROC_CHIP Attribute -Frequency (binary in MHz) for the point at which clock sector buffers should be at full strength. This is to support Vmin operation. Setting cannot overlap the Low or High bands. + SYSTEM Attribute + Frequency (binary in MHz) for the point at which clock sector buffers + should be at full strength. This is to support Vmin operation. + Setting cannot overlap the Low or High bands. + + Provided by the Machine Readable Workbook after system characterization. </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>non-volatile</persistency> @@ -4411,10 +4238,13 @@ Frequency (binary in MHz) for the point at which clock sector buffers should be <attribute> <id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> <description> - PROC_CHIP Attribute -Frequency (binary in MHz)) for the lower end of the Low Frequency Resonant band + SYSTEM Attribute + Frequency (binary in MHz)) for the lower end of the Low Frequency + Resonant band + + Provided by the Machine Readable Workbook after system characterization. </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>non-volatile</persistency> @@ -4428,10 +4258,13 @@ Frequency (binary in MHz)) for the lower end of the Low Frequency Resonant band <attribute> <id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> <description> - PROC_CHIP Attribute -Frequency (binary in MHz) for the upper end of the Low Frequency Resonant band + SYSTEM Attribute + Frequency (binary in MHz) for the upper end of the Low Frequency + Resonant band + + Provided by the Machine Readable Workbook after system characterization. </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>non-volatile</persistency> @@ -4445,10 +4278,13 @@ Frequency (binary in MHz) for the upper end of the Low Frequency Resonant band <attribute> <id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> <description> - PROC_CHIP Attribute -Frequency (binary in MHz) for the lower end of the High Frequency Resonant band + SYSTEM Attribute + Frequency (binary in MHz) for the lower end of the High Frequency + Resonant band + + Provided by the Machine Readable Workbook after system characterization. </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>non-volatile</persistency> @@ -4462,10 +4298,13 @@ Frequency (binary in MHz) for the lower end of the High Frequency Resonant band <attribute> <id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> <description> - PROC_CHIP Attribute -Frequency (binary in MHz)) for the upper end of the High Frequency Resonant band + SYSTEM Attribute + Frequency (binary in MHz)) for the upper end of the High Frequency + Resonant band + + Provided by the Machine Readable Workbook after system characterization. </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>non-volatile</persistency> @@ -4479,14 +4318,16 @@ Frequency (binary in MHz)) for the upper end of the High Frequency Resonant band <attribute> <id>PM_SPIPSS_FREQUENCY</id> <description> - PROC_CHIP Attribute -SPIPSS Clock Frequency (binary in MHz) + SYSTEM Attribute + SPIPSS Clock Frequency (binary in MHz) -Valid range: 0.5MHz to 25MHz + Valid range: 0.5MHz to 25MHz -Consumer: proc_pmc_init + Consumer: proc_pmc_init + + Provided by the Machine Readable Workbook. </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>non-volatile</persistency> @@ -4501,9 +4342,11 @@ Consumer: proc_pmc_init <id>PM_APSS_CHIP_SELECT</id> <description> PROC_CHIP Attribute -Defines which of the PSS chip selects that the APSS is connected + Defines which of the PSS chip selects that the APSS is connected + + Provided by the Machine Readable Workbook. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>non-volatile</persistency> @@ -4518,10 +4361,12 @@ Defines which of the PSS chip selects that the APSS is connected <id>PM_PBAX_NODEID</id> <description> PROC_CHIP Attribute -Receive PBAX Nodeid -Value that indicates this PBA's PBAX Node affinity. This is matched to pbax_nodeid of the PMISC Address phase. + Receive PBAX Nodeid. Value that indicates this PBA's PBAX Node affinity. + This is matched to pbax_nodeid of the PMISC Address phase. + + Provided by the Machine Readable Workbook. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>non-volatile</persistency> @@ -4536,10 +4381,13 @@ Value that indicates this PBA's PBAX Node affinity. This is matched to pbax_nod <id>PM_PBAX_CHIPID</id> <description> PROC_CHIP Attribute -Receive PBAX Chipid -Value that indicates this PBA's PBAX Chipid within the PBAX node. Is matched to pbax_chipid of the Address phase if pbax_type=unicast. + Receive PBAX Chipid. Value that indicates this PBA's PBAX Chipid within + the PBAX node. Is matched to pbax_chipid of the Address phase if + pbax_type=unicast. + + Provided by the Machine Readable Workbook. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>non-volatile</persistency> @@ -4554,10 +4402,14 @@ Value that indicates this PBA's PBAX Chipid within the PBAX node. Is matched to <id>PM_PBAX_BRDCST_ID_VECTOR</id> <description> PROC_CHIP Attribute -Receive PBAX Broadcast Group -Vector that is indexed when decoded PMISC pbax_type=broadcast with the decoded PMISC pbax_chipid value. If the bit in this vector at the decoded bit location is a 1, then this receive engine will participate in the broadcast operation. + Receive PBAX Broadcast Group. Vector that is indexed when decoded PMISC + pbax_type=broadcast with the decoded PMISC pbax_chipid value. If the + bit in this vector at the decoded bit location is a 1, then this receive + engine will participate in the broadcast operation. + + Provided by the Machine Readable Workbook. </description> - <simpleType> + <simpleType> <uint8_t></uint8_t> </simpleType> <persistency>non-volatile</persistency> @@ -4572,13 +4424,15 @@ Vector that is indexed when decoded PMISC pbax_type=broadcast with the decoded P <id>PROC_R_LOADLINE</id> <description> SYSTEM Attribute -Impedance (binary microOhms) of the load line from a processor VRM to the Processor Module pins. This value is applied to each processor instance. + Impedance (binary microOhms) of the load line from a processor VRM to the + Processor Module pins. This value is applied to each processor instance. -Producer: MRWB (via the power subsystem design per system) + Consumers: proc_build_gpstate_table.C -Consumers: proc_build_gpstate_table.C + Provided by the Machine Readable Workbook (via the power subsystem design + per system) </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>non-volatile</persistency> @@ -4593,13 +4447,15 @@ Consumers: proc_build_gpstate_table.C <id>PROC_R_DISTLOSS</id> <description> SYSTEM Attribute -Impedance (binary in microOhms) of the distribution loss the sense point to the circuit. This value is applied to each processor instance. + Impedance (binary in microOhms) of the distribution loss the sense point + to the circuit. This value is applied to each processor instance. -Producer: MRWB (via the power subsystem design per system) + Consumers: proc_build_gpstate_table.C -Consumers: proc_build_gpstate_table.C + Provided by the Machine Readable Workbook (via the power subsystem design + per system) </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>non-volatile</persistency> @@ -4614,13 +4470,15 @@ Consumers: proc_build_gpstate_table.C <id>PROC_VRM_VOFFSET</id> <description> SYSTEM Attribute -Offset voltage (binary in microvolts) to apply to the VRM distribution to the processor module. This value is applied to each processor instance. + Offset voltage (binary in microvolts) to apply to the VRM distribution to + the processor module. This value is applied to each processor instance. -Producer: MRWB (via the power subsystem design per system) + Consumers: proc_build_gpstate_table.C -Consumers: proc_build_gpstate_table.C + Provided by the Machine Readable Workbook (via the power subsystem design + per system) </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>non-volatile</persistency> @@ -4632,38 +4490,21 @@ Consumers: proc_build_gpstate_table.C </attribute> <attribute> - <id>PROC_DPLL_DIVIDER</id> - <description> - SYSTEM Attribute -Feedback divider x forward divider setting for the DPLL - -Producer: MRWB - -Consumers: proc_build_gpstate_table.C - </description> - <simpleType> - <uint8_t></uint8_t> - </simpleType> - <persistency>non-volatile</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_DPLL_DIVIDER</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> <id>FREQ_CORE_MAX</id> <description> SYSTEM Attribute -Maximum frequency (binary in MHz) that any processor in the system will run. Used to define the top end of the PState range in the frequency space. -From this, the ATTR_PROCPM_PSTATE0_FREQUENCY is computed using ATTR_SYSTEM_REFCLK_FREQUENCY to determine the step size. + Maximum frequency (binary in MHz) that any processor in the system will + run. Used to define the top end of the PState range in the frequency space. + From this, the ATTR_PROCPM_PSTATE0_FREQUENCY is computed using + ATTR_SYSTEM_REFCLK_FREQUENCY to determine the step size. -Producer: MRWB (system design) + Consumers: proc_build_gpstate_table.C (among others) -Consumers: proc_build_gpstate_table.C (among others) + TODO: Dean's proposal is that each platform will iterate over all chips, + reading the super-turbo frequency from MVPD #V and set this attribute + to the lowest value. </description> - <simpleType> + <simpleType> <uint32_t></uint32_t> </simpleType> <persistency>non-volatile</persistency> @@ -4675,7 +4516,7 @@ Consumers: proc_build_gpstate_table.C (among others) </hwpfToHbAttrMap> </attribute> -<!-- End pm_attributes_all_plat.xml --> +<!-- End pm_plat_attributes.xml --> <attribute> <id>OVERRIDE_MVPD_NOM_FREQ_MHZ</id> @@ -10671,6 +10512,25 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript </hwpfToHbAttrMap> </attribute> +<attribute> + <id>PROC_DCM_INSTALLED</id> + <description> + PROC_CHIP Attribute + If true, the chip is installed on a Dual Chip Module + Provided by the Machine Readable Workbook + </description> + <simpleType> + <uint8_t></uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_DCM_INSTALLED</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + + <!-- === Attributes supporting erepair_thresholds.xml HWPF Attributes === --> <attribute> <id>X_EREPAIR_THRESHOLD_FIELD</id> diff --git a/src/usr/targeting/common/xmltohb/common.mk b/src/usr/targeting/common/xmltohb/common.mk index 4ded1af0e..e1edf24d4 100644 --- a/src/usr/targeting/common/xmltohb/common.mk +++ b/src/usr/targeting/common/xmltohb/common.mk @@ -73,8 +73,8 @@ FAPI_ATTR_SOURCES = \ dram_initialization/proc_setup_bars/proc_setup_bars_l3_attributes.xml \ dram_initialization/proc_setup_bars/proc_setup_bars_mmio_attributes.xml \ activate_powerbus/proc_build_smp/proc_fab_smp_fabric_attributes.xml \ - runtime_attributes/pm_attributes_all_hwp.xml \ - runtime_attributes/pm_attributes_all_plat.xml \ + runtime_attributes/pm_hwp_attributes.xml \ + runtime_attributes/pm_plat_attributes.xml \ nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_attributes.xml \ dmi_training/proc_cen_set_inband_addr/proc_cen_set_inband_addr_attributes.xml \ common_attributes.xml \ diff --git a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml index 97a7d35f3..6d9388153 100644 --- a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml @@ -164,7 +164,7 @@ <id>MSS_CLEANER_ENABLE</id> <default>1</default> </attribute> - <!-- Start pm_attributes_all_plat.xml --> + <!-- Start pm_plat_attributes.xml --> <attribute><id>PROC_R_LOADLINE</id> <default>890</default> </attribute> @@ -177,10 +177,37 @@ <attribute><id>FREQ_CORE_MAX</id> <default>4000</default> </attribute> - <attribute><id>PROC_DPLL_DIVIDER</id> + <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> + <default>2500</default> + </attribute> + <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> + <default>10</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> + <default>2000</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> + <default>2300</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> + <default>3000</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> + <default>3050</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> + <default>4800</default> + </attribute> + <attribute><id>PM_SAFE_FREQUENCY</id> + <default>3200</default> + </attribute> + <attribute><id>PM_SPIPSS_FREQUENCY</id> <default>10</default> </attribute> - <!-- End pm_attributes_all_plat.xml --> + <attribute><id>PM_SPIVID_FREQUENCY</id> + <default>0b11</default> + </attribute> + <!-- End pm_plat_attributes.xml --> </targetInstance> <!-- System node 0 --> @@ -255,70 +282,22 @@ <attribute><id>RNG_BASE_ADDR</id> <default>0x0003FFFF40000000</default> </attribute> - <!-- Start pm_attributes_all_plat.xml --> <attribute><id>PROC_DCM_INSTALLED</id> <default>1</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>2500</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SAFE_VOLTAGE</id> - <default>1100</default> - </attribute> + <!-- Start pm_plat_attributes.xml --> <attribute><id>PM_PSTATE_UNDERVOLTING_MINIMUM</id> <default>900</default> </attribute> <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id> <default>1250</default> </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b100</default><!-- PORT0NONRED --> </attribute> - <attribute><id>PM_SLEEP_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> <attribute><id>PM_SLEEP_TYPE</id> <default>1</default><!-- DEEP --> </attribute> - <attribute><id>PM_WINKLE_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -331,7 +310,7 @@ <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> <default>0</default> </attribute> - <!-- End pm_attributes_all_plat.xml --> + <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -962,28 +941,16 @@ <attribute><id>RNG_BASE_ADDR</id> <default>0x0003FFFF40001000</default> </attribute> - <!-- Start pm_attributes_all_plat.xml --> <attribute><id>PROC_DCM_INSTALLED</id> <default>1</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>0</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>0</default> - </attribute> - <attribute><id>PM_SAFE_VOLTAGE</id> - <default>1100</default> - </attribute> + <!-- Start pm_plat_attributes.xml --> <attribute><id>PM_PSTATE_UNDERVOLTING_MINIMUM</id> <default>900</default> </attribute> <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id> <default>1250</default> </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>0</default> - </attribute> <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b000</default><!-- NONE --> </attribute> @@ -996,36 +963,6 @@ <attribute><id>PM_SLEEP_TYPE</id> <default>1</default><!-- DEEP --> </attribute> - <attribute><id>PM_WINKLE_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>0</default> - </attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0xFF</default><!-- NONE --> </attribute> @@ -1038,7 +975,7 @@ <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> <default>0</default> </attribute> - <!-- End pm_attributes_all_plat.xml --> + <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -1670,31 +1607,16 @@ <attribute><id>RNG_BASE_ADDR</id> <default>0x0003FFFF40002000</default> </attribute> - <!-- Start pm_attributes_all_plat.xml --> <attribute><id>PROC_DCM_INSTALLED</id> <default>1</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>2500</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SAFE_VOLTAGE</id> - <default>1100</default> - </attribute> + <!-- Start pm_plat_attributes.xml --> <attribute><id>PM_PSTATE_UNDERVOLTING_MINIMUM</id> <default>900</default> </attribute> <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id> <default>1250</default> </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SPIVID_PORT_ENABLE</id> - <default>0b100</default><!-- PORT0NONRED --> - </attribute> <attribute><id>PM_SLEEP_ENTRY</id> <default>1</default><!-- ASSISTED --> </attribute> @@ -1704,36 +1626,6 @@ <attribute><id>PM_SLEEP_TYPE</id> <default>1</default><!-- DEEP --> </attribute> - <attribute><id>PM_WINKLE_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0xFF</default><!-- NONE --> </attribute> @@ -1746,7 +1638,7 @@ <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> <default>0</default> </attribute> - <!-- End pm_attributes_all_plat.xml --> + <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -2379,28 +2271,16 @@ <attribute><id>RNG_BASE_ADDR</id> <default>0x0003FFFF40003000</default> </attribute> - <!-- Start pm_attributes_all_plat.xml --> <attribute><id>PROC_DCM_INSTALLED</id> <default>1</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>0</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>0</default> - </attribute> - <attribute><id>PM_SAFE_VOLTAGE</id> - <default>1100</default> - </attribute> + <!-- Start pm_plat_attributes.xml --> <attribute><id>PM_PSTATE_UNDERVOLTING_MINIMUM</id> <default>900</default> </attribute> <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id> <default>1250</default> </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>0</default> - </attribute> <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b000</default><!-- NONE --> </attribute> @@ -2413,36 +2293,6 @@ <attribute><id>PM_SLEEP_TYPE</id> <default>1</default><!-- DEEP --> </attribute> - <attribute><id>PM_WINKLE_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>0</default> - </attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0xFF</default><!-- NONE --> </attribute> @@ -2455,7 +2305,7 @@ <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> <default>0</default> </attribute> - <!-- End pm_attributes_all_plat.xml --> + <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> diff --git a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml index dac70f6a9..0507cac51 100644 --- a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml @@ -40,7 +40,7 @@ relationship to the FSI ports: cMFSI Port 0-7 = Logical MCS Port 4,5,6,7,0,1,2,3 - Values for pm_attributes_all_plat.xml attributes was provided by + Values for pm_plat_attributes.xml attributes were provided by Greg Still on 10/17/1012. ================================================================= --> @@ -140,7 +140,7 @@ <id>MSS_CLEANER_ENABLE</id> <default>1</default> </attribute> - <!-- Start pm_attributes_all_plat.xml --> + <!-- Start pm_plat_attributes.xml --> <attribute><id>PROC_R_LOADLINE</id> <default>890</default> </attribute> @@ -153,10 +153,37 @@ <attribute><id>FREQ_CORE_MAX</id> <default>4000</default> </attribute> - <attribute><id>PROC_DPLL_DIVIDER</id> + <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> + <default>2500</default> + </attribute> + <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> + <default>10</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> + <default>2000</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> + <default>2300</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> + <default>3000</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> + <default>3050</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> + <default>4800</default> + </attribute> + <attribute><id>PM_SAFE_FREQUENCY</id> + <default>3200</default> + </attribute> + <attribute><id>PM_SPIPSS_FREQUENCY</id> + <default>10</default> + </attribute> + <attribute><id>PM_SPIVID_FREQUENCY</id> <default>10</default> </attribute> - <!-- End pm_attributes_all_plat.xml --> + <!-- End pm_plat_attributes.xml --> </targetInstance> <!-- System node 0 --> @@ -231,28 +258,16 @@ <attribute><id>RNG_BASE_ADDR</id> <default>0x0003FFFF40000000</default> </attribute> - <!-- Start pm_attributes_all_plat.xml --> <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>2500</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SAFE_VOLTAGE</id> - <default>1100</default> - </attribute> + <!-- Start pm_plat_attributes.xml --> <attribute><id>PM_PSTATE_UNDERVOLTING_MINIMUM</id> <default>900</default> </attribute> <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id> <default>1250</default> </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> @@ -265,36 +280,6 @@ <attribute><id>PM_SLEEP_TYPE</id> <default>1</default><!-- DEEP --> </attribute> - <attribute><id>PM_WINKLE_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -307,7 +292,7 @@ <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> <default>0</default> </attribute> - <!-- End pm_attributes_all_plat.xml --> + <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -1289,28 +1274,16 @@ <attribute><id>RNG_BASE_ADDR</id> <default>0x0003FFFF40001000</default> </attribute> - <!-- Start pm_attributes_all_plat.xml --> <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>2500</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SAFE_VOLTAGE</id> - <default>1100</default> - </attribute> + <!-- Start pm_plat_attributes.xml --> <attribute><id>PM_PSTATE_UNDERVOLTING_MINIMUM</id> <default>900</default> </attribute> <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id> <default>1250</default> </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> @@ -1323,36 +1296,6 @@ <attribute><id>PM_SLEEP_TYPE</id> <default>1</default><!-- DEEP --> </attribute> - <attribute><id>PM_WINKLE_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -1365,7 +1308,7 @@ <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> <default>0</default> </attribute> - <!-- End pm_attributes_all_plat.xml --> + <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -2347,28 +2290,16 @@ <attribute><id>RNG_BASE_ADDR</id> <default>0x0003FFFF40002000</default> </attribute> - <!-- Start pm_attributes_all_plat.xml --> <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>2500</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SAFE_VOLTAGE</id> - <default>1100</default> - </attribute> + <!-- Start pm_plat_attributes.xml --> <attribute><id>PM_PSTATE_UNDERVOLTING_MINIMUM</id> <default>900</default> </attribute> <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id> <default>1250</default> </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> @@ -2381,36 +2312,6 @@ <attribute><id>PM_SLEEP_TYPE</id> <default>1</default><!-- DEEP --> </attribute> - <attribute><id>PM_WINKLE_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -2423,7 +2324,7 @@ <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> <default>0</default> </attribute> - <!-- End pm_attributes_all_plat.xml --> + <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -3405,28 +3306,16 @@ <attribute><id>RNG_BASE_ADDR</id> <default>0x0003FFFF40003000</default> </attribute> - <!-- Start pm_attributes_all_plat.xml --> <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>2500</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SAFE_VOLTAGE</id> - <default>1100</default> - </attribute> + <!-- Start pm_plat_attributes.xml --> <attribute><id>PM_PSTATE_UNDERVOLTING_MINIMUM</id> <default>900</default> </attribute> <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id> <default>1250</default> </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> @@ -3439,36 +3328,6 @@ <attribute><id>PM_SLEEP_TYPE</id> <default>1</default><!-- DEEP --> </attribute> - <attribute><id>PM_WINKLE_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -3481,7 +3340,7 @@ <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> <default>0</default> </attribute> - <!-- End pm_attributes_all_plat.xml --> + <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -4461,28 +4320,16 @@ <attribute><id>RNG_BASE_ADDR</id> <default>0x0003FFFF40004000</default> </attribute> - <!-- Start pm_attributes_all_plat.xml --> <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>2500</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SAFE_VOLTAGE</id> - <default>1100</default> - </attribute> + <!-- Start pm_plat_attributes.xml --> <attribute><id>PM_PSTATE_UNDERVOLTING_MINIMUM</id> <default>900</default> </attribute> <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id> <default>1250</default> </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> @@ -4495,36 +4342,6 @@ <attribute><id>PM_SLEEP_TYPE</id> <default>1</default><!-- DEEP --> </attribute> - <attribute><id>PM_WINKLE_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -4537,7 +4354,7 @@ <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> <default>0</default> </attribute> - <!-- End pm_attributes_all_plat.xml --> + <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -5519,28 +5336,16 @@ <attribute><id>RNG_BASE_ADDR</id> <default>0x0003FFFF40005000</default> </attribute> - <!-- Start pm_attributes_all_plat.xml --> <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>2500</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SAFE_VOLTAGE</id> - <default>1100</default> - </attribute> + <!-- Start pm_plat_attributes.xml --> <attribute><id>PM_PSTATE_UNDERVOLTING_MINIMUM</id> <default>900</default> </attribute> <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id> <default>1250</default> </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> @@ -5553,36 +5358,6 @@ <attribute><id>PM_SLEEP_TYPE</id> <default>1</default><!-- DEEP --> </attribute> - <attribute><id>PM_WINKLE_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -5595,7 +5370,7 @@ <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> <default>0</default> </attribute> - <!-- End pm_attributes_all_plat.xml --> + <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -6575,28 +6350,16 @@ <attribute><id>RNG_BASE_ADDR</id> <default>0x0003FFFF40006000</default> </attribute> - <!-- Start pm_attributes_all_plat.xml --> <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>2500</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SAFE_VOLTAGE</id> - <default>1100</default> - </attribute> + <!-- Start pm_plat_attributes.xml --> <attribute><id>PM_PSTATE_UNDERVOLTING_MINIMUM</id> <default>900</default> </attribute> <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id> <default>1250</default> </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> @@ -6609,36 +6372,6 @@ <attribute><id>PM_SLEEP_TYPE</id> <default>1</default><!-- DEEP --> </attribute> - <attribute><id>PM_WINKLE_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -6651,7 +6384,7 @@ <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> <default>0</default> </attribute> - <!-- End pm_attributes_all_plat.xml --> + <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -7632,28 +7365,16 @@ <attribute><id>RNG_BASE_ADDR</id> <default>0x0003FFFF40007000</default> </attribute> - <!-- Start pm_attributes_all_plat.xml --> <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>2500</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SAFE_VOLTAGE</id> - <default>1100</default> - </attribute> + <!-- Start pm_plat_attributes.xml --> <attribute><id>PM_PSTATE_UNDERVOLTING_MINIMUM</id> <default>900</default> </attribute> <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id> <default>1250</default> </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> @@ -7666,36 +7387,6 @@ <attribute><id>PM_SLEEP_TYPE</id> <default>1</default><!-- DEEP --> </attribute> - <attribute><id>PM_WINKLE_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -7708,7 +7399,7 @@ <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> <default>0</default> </attribute> - <!-- End pm_attributes_all_plat.xml --> + <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -14966,28 +14657,16 @@ <attribute><id>RNG_BASE_ADDR</id> <default>0x0003FFFF40000000</default> </attribute> - <!-- Start pm_attributes_all_plat.xml --> <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>2500</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SAFE_VOLTAGE</id> - <default>1100</default> - </attribute> + <!-- Start pm_plat_attributes.xml --> <attribute><id>PM_PSTATE_UNDERVOLTING_MINIMUM</id> <default>900</default> </attribute> <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id> <default>1250</default> </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> @@ -15000,36 +14679,6 @@ <attribute><id>PM_SLEEP_TYPE</id> <default>1</default><!-- DEEP --> </attribute> - <attribute><id>PM_WINKLE_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -15042,7 +14691,7 @@ <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> <default>0</default> </attribute> - <!-- End pm_attributes_all_plat.xml --> + <!-- End pm_plat_attributes.xml --> </targetInstance> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 68f05f371..205d431c8 100644 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -122,13 +122,22 @@ <attribute><id>L3_W_EPS</id></attribute> <attribute><id>NOMINAL_FREQ_MHZ</id></attribute> <attribute><id>MNFG_FLAGS</id></attribute> - <!-- Start pm_attributes_all_plat.xml --> - <attribute><id>PROC_R_LOADLINE</id></attribute> + <!-- Start pm_plat_attributes.xml --> + <attribute><id>FREQ_CORE_MAX</id></attribute> + <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id></attribute> + <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id></attribute> + <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id></attribute> + <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id></attribute> + <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id></attribute> + <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id></attribute> + <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id></attribute> + <attribute><id>PM_SAFE_FREQUENCY</id></attribute> + <attribute><id>PM_SPIPSS_FREQUENCY</id></attribute> + <attribute><id>PM_SPIVID_FREQUENCY</id></attribute> <attribute><id>PROC_R_DISTLOSS</id></attribute> + <attribute><id>PROC_R_LOADLINE</id></attribute> <attribute><id>PROC_VRM_VOFFSET</id></attribute> - <attribute><id>FREQ_CORE_MAX</id></attribute> - <attribute><id>PROC_DPLL_DIVIDER</id></attribute> - <!-- End pm_attributes_all_plat.xml --> + <!-- End pm_plat_attributes.xml --> <!-- sbe_config_update attributes --> <attribute><id>NEST_FREQ_MHZ</id></attribute> <attribute><id>BOOT_FREQ_MHZ</id></attribute> @@ -261,102 +270,90 @@ <attribute><id>MSS_INTERLEAVE_ENABLE</id></attribute> <attribute><id>MSS_MCS_GROUP_32</id></attribute> <attribute><id>MSS_MEM_IPL_COMPLETE</id></attribute> - <!-- Start pm_attributes_all_plat.xml --> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id></attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id></attribute> - <attribute><id>PM_SAFE_VOLTAGE</id></attribute> - <attribute><id>PM_PSTATE_UNDERVOLTING_MINIMUM</id></attribute> - <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id></attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id></attribute> - <attribute><id>PM_SPIVID_PORT_ENABLE</id></attribute> - <attribute><id>PM_SLEEP_ENTRY</id></attribute> - <attribute><id>PM_SLEEP_EXIT</id></attribute> - <attribute><id>PM_SLEEP_TYPE</id></attribute> - <attribute><id>PM_WINKLE_ENTRY</id></attribute> - <attribute><id>PM_WINKLE_EXIT</id></attribute> - <attribute><id>PM_WINKLE_TYPE</id></attribute> - <attribute><id>PM_SAFE_FREQUENCY</id></attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id></attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id></attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id></attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id></attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id></attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id></attribute> + <!-- Start pm_plat_attributes.xml --> <attribute><id>PM_APSS_CHIP_SELECT</id></attribute> - <attribute><id>PM_PBAX_NODEID</id></attribute> - <attribute><id>PM_PBAX_CHIPID</id></attribute> <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id></attribute> - <!-- End pm_attributes_all_plat.xml --> - <!-- Start pm_attributes_all_hwp.xml --> - <attribute><id>PM_POWER_PROXY_TRACE_TIMER</id></attribute> - <attribute><id>PM_PPT_TIMER_MATCH_VALUE</id></attribute> - <attribute><id>PM_PPT_TIMER_TICK</id></attribute> - <attribute><id>PM_AISS_TIMEOUT</id></attribute> - <attribute><id>PM_PSTATE_STEPSIZE</id></attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY_RANGE</id></attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY_VALUE</id></attribute> - <attribute><id>PM_PMC_HANGPULSE_DIVIDER</id></attribute> - <attribute><id>PM_PVSAFE_PSTATE</id></attribute> - <attribute><id>PM_SPIVID_FRAME_SIZE</id></attribute> - <attribute><id>PM_SPIVID_IN_DELAY_FRAME1</id></attribute> - <attribute><id>PM_SPIVID_IN_DELAY_FRAME2</id></attribute> - <attribute><id>PM_SPIVID_CLOCK_POLARITY</id></attribute> - <attribute><id>PM_SPIVID_CLOCK_PHASE</id></attribute> - <attribute><id>PM_SPIVID_CLOCK_DIVIDER</id></attribute> - <attribute><id>PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS</id></attribute> - <attribute><id>PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS_VALUE</id></attribute> - <attribute><id>PM_SPIVID_INTER_RETRY_DELAY_VALUE</id></attribute> - <attribute><id>PM_SPIVID_INTER_RETRY_DELAY</id></attribute> - <attribute><id>PM_SPIVID_CRC_GEN_ENABLE</id></attribute> - <attribute><id>PM_SPIVID_CRC_CHECK_ENABLE</id></attribute> - <attribute><id>PM_SPIVID_MAJORITY_VOTE_ENABLE</id></attribute> - <attribute><id>PM_SPIVID_MAX_RETRIES</id></attribute> - <attribute><id>PM_SPIVID_CRC_POLYNOMIAL_ENABLES</id></attribute> - <attribute><id>PM_OCC_HEARTBEAT_TIME</id></attribute> - <attribute><id>PM_SLEEP_WINKLE_REQUEST_TIMEOUT</id></attribute> - <attribute><id>PM_PFET_POWERUP_CORE_DELAY0</id></attribute> - <attribute><id>PM_PFET_POWERUP_CORE_DELAY1</id></attribute> - <attribute><id>PM_PFET_POWERUP_CORE_DELAY0_VALUE</id></attribute> - <attribute><id>PM_PFET_POWERUP_CORE_DELAY1_VALUE</id></attribute> - <attribute><id>PM_PFET_POWERUP_CORE_SEQUENCE_DELAY_SELECT</id></attribute> - <attribute><id>PM_PFET_POWERDOWN_CORE_DELAY0</id></attribute> - <attribute><id>PM_PFET_POWERDOWN_CORE_DELAY1</id></attribute> - <attribute><id>PM_PFET_POWERDOWN_CORE_DELAY0_VALUE</id></attribute> - <attribute><id>PM_PFET_POWERDOWN_CORE_DELAY1_VALUE</id></attribute> - <attribute><id>PM_PFET_POWERDOWN_CORE_SEQUENCE_DELAY_SELECT</id></attribute> - <attribute><id>PM_PFET_POWERUP_ECO_DELAY0</id></attribute> - <attribute><id>PM_PFET_POWERUP_ECO_DELAY1</id></attribute> - <attribute><id>PM_PFET_POWERUP_ECO_DELAY0_VALUE</id></attribute> - <attribute><id>PM_PFET_POWERUP_ECO_DELAY1_VALUE</id></attribute> - <attribute><id>PM_PFET_POWERUP_ECO_SEQUENCE_DELAY_SELECT</id></attribute> - <attribute><id>PM_PFET_POWERDOWN_ECO_DELAY0</id></attribute> - <attribute><id>PM_PFET_POWERDOWN_ECO_DELAY1</id></attribute> - <attribute><id>PM_PFET_POWERDOWN_ECO_DELAY0_VALUE</id></attribute> - <attribute><id>PM_PFET_POWERDOWN_ECO_DELAY1_VALUE</id></attribute> - <attribute><id>PM_PFET_POWERDOWN_ECO_SEQUENCE_DELAY_SELECT</id></attribute> - <attribute><id>PM_PSTATE0_FREQUENCY</id></attribute> - <attribute><id>PM_IVRMS_ENABLED</id></attribute> - <attribute><id>PM_SAFE_PSTATE</id></attribute> - <attribute><id>PM_RESONANT_CLOCK_ENABLE</id></attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CSB_PSTATE</id></attribute> - <attribute><id>PM_RESONANT_CLOCK_LFRLOW_PSTATE</id></attribute> - <attribute><id>PM_RESONANT_CLOCK_LFRUPPER_PSTATE</id></attribute> - <attribute><id>PM_RESONANT_CLOCK_HFRLOW_PSTATE</id></attribute> - <attribute><id>PM_RESONANT_CLOCK_HFRHIGH_PSTATE</id></attribute> - <attribute><id>PM_SPIPSS_FRAME_SIZE</id></attribute> - <attribute><id>PM_SPIPSS_OUT_COUNT</id></attribute> - <attribute><id>PM_SPIPSS_IN_DELAY</id></attribute> - <attribute><id>PM_SPIPSS_IN_COUNT</id></attribute> - <attribute><id>PM_SPIPSS_CLOCK_POLARITY</id></attribute> - <attribute><id>PM_SPIPSS_CLOCK_PHASE</id></attribute> - <attribute><id>PM_SPIPSS_CLOCK_DIVIDER</id></attribute> - <attribute><id>PM_SPIPSS_INTER_FRAME_DELAY_SETTING</id></attribute> - <attribute><id>PM_SPIPSS_INTER_FRAME_DELAY</id></attribute> - <attribute><id>PM_PBAX_RCV_RESERV_TIMEOUT</id></attribute> - <attribute><id>PM_PBAX_SND_RETRY_COUNT_OVERCOMMIT_ENABLE</id></attribute> - <attribute><id>PM_PBAX_SND_RETRY_THRESHOLD</id></attribute> - <attribute><id>PM_PBAX_SND_RESERV_TIMEOUT</id></attribute> - <!-- End pm_attributes_all_hwp.xml --> + <attribute><id>PM_PBAX_CHIPID</id></attribute> + <attribute><id>PM_PBAX_NODEID</id></attribute> + <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id></attribute> + <attribute><id>PM_PSTATE_UNDERVOLTING_MINIMUM</id></attribute> + <attribute><id>PM_SPIVID_PORT_ENABLE</id></attribute> + <!-- End pm_plat_attributes.xml --> + <!-- Start pm_hwp_attributes.xml --> + <attribute><id>PM_AISS_TIMEOUT</id></attribute> + <attribute><id>PM_EXTERNAL_VRM_STEPDELAY_RANGE</id></attribute> + <attribute><id>PM_EXTERNAL_VRM_STEPDELAY_VALUE</id></attribute> + <attribute><id>PM_IVRMS_ENABLED</id></attribute> + <attribute><id>PM_OCC_HEARTBEAT_TIME</id></attribute> + <attribute><id>PM_PBAX_RCV_RESERV_TIMEOUT</id></attribute> + <attribute><id>PM_PBAX_SND_RESERV_TIMEOUT</id></attribute> + <attribute><id>PM_PBAX_SND_RETRY_COUNT_OVERCOMMIT_ENABLE</id></attribute> + <attribute><id>PM_PBAX_SND_RETRY_THRESHOLD</id></attribute> + <attribute><id>PM_PFET_POWERDOWN_CORE_DELAY0</id></attribute> + <attribute><id>PM_PFET_POWERDOWN_CORE_DELAY0_VALUE</id></attribute> + <attribute><id>PM_PFET_POWERDOWN_CORE_DELAY1</id></attribute> + <attribute><id>PM_PFET_POWERDOWN_CORE_DELAY1_VALUE</id></attribute> + <attribute><id>PM_PFET_POWERDOWN_CORE_SEQUENCE_DELAY_SELECT</id></attribute> + <attribute><id>PM_PFET_POWERDOWN_ECO_DELAY0</id></attribute> + <attribute><id>PM_PFET_POWERDOWN_ECO_DELAY0_VALUE</id></attribute> + <attribute><id>PM_PFET_POWERDOWN_ECO_DELAY1</id></attribute> + <attribute><id>PM_PFET_POWERDOWN_ECO_DELAY1_VALUE</id></attribute> + <attribute><id>PM_PFET_POWERDOWN_ECO_SEQUENCE_DELAY_SELECT</id></attribute> + <attribute><id>PM_PFET_POWERUP_CORE_DELAY0</id></attribute> + <attribute><id>PM_PFET_POWERUP_CORE_DELAY0_VALUE</id></attribute> + <attribute><id>PM_PFET_POWERUP_CORE_DELAY1</id></attribute> + <attribute><id>PM_PFET_POWERUP_CORE_DELAY1_VALUE</id></attribute> + <attribute><id>PM_PFET_POWERUP_CORE_SEQUENCE_DELAY_SELECT</id></attribute> + <attribute><id>PM_PFET_POWERUP_ECO_DELAY0</id></attribute> + <attribute><id>PM_PFET_POWERUP_ECO_DELAY0_VALUE</id></attribute> + <attribute><id>PM_PFET_POWERUP_ECO_DELAY1</id></attribute> + <attribute><id>PM_PFET_POWERUP_ECO_DELAY1_VALUE</id></attribute> + <attribute><id>PM_PFET_POWERUP_ECO_SEQUENCE_DELAY_SELECT</id></attribute> + <attribute><id>PM_PMC_HANGPULSE_DIVIDER</id></attribute> + <attribute><id>PM_POWER_PROXY_TRACE_TIMER</id></attribute> + <attribute><id>PM_PPT_TIMER_MATCH_VALUE</id></attribute> + <attribute><id>PM_PPT_TIMER_TICK</id></attribute> + <attribute><id>PM_PSTATE0_FREQUENCY</id></attribute> + <attribute><id>PM_PSTATE_STEPSIZE</id></attribute> + <attribute><id>PM_PVSAFE_PSTATE</id></attribute> + <attribute><id>PM_RESONANT_CLOCK_ENABLE</id></attribute> + <attribute><id>PM_RESONANT_CLOCK_FULL_CSB_PSTATE</id></attribute> + <attribute><id>PM_RESONANT_CLOCK_HFRHIGH_PSTATE</id></attribute> + <attribute><id>PM_RESONANT_CLOCK_HFRLOW_PSTATE</id></attribute> + <attribute><id>PM_RESONANT_CLOCK_LFRLOW_PSTATE</id></attribute> + <attribute><id>PM_RESONANT_CLOCK_LFRUPPER_PSTATE</id></attribute> + <attribute><id>PM_SAFE_PSTATE</id></attribute> + <attribute><id>PM_SLEEP_ENTRY</id></attribute> + <attribute><id>PM_SLEEP_EXIT</id></attribute> + <attribute><id>PM_SLEEP_TYPE</id></attribute> + <attribute><id>PM_SLEEP_WINKLE_REQUEST_TIMEOUT</id></attribute> + <attribute><id>PM_SPIPSS_CLOCK_DIVIDER</id></attribute> + <attribute><id>PM_SPIPSS_CLOCK_PHASE</id></attribute> + <attribute><id>PM_SPIPSS_CLOCK_POLARITY</id></attribute> + <attribute><id>PM_SPIPSS_FRAME_SIZE</id></attribute> + <attribute><id>PM_SPIPSS_INTER_FRAME_DELAY</id></attribute> + <attribute><id>PM_SPIPSS_INTER_FRAME_DELAY_SETTING</id></attribute> + <attribute><id>PM_SPIPSS_IN_COUNT</id></attribute> + <attribute><id>PM_SPIPSS_IN_DELAY</id></attribute> + <attribute><id>PM_SPIPSS_OUT_COUNT</id></attribute> + <attribute><id>PM_SPIVID_CLOCK_DIVIDER</id></attribute> + <attribute><id>PM_SPIVID_CLOCK_PHASE</id></attribute> + <attribute><id>PM_SPIVID_CLOCK_POLARITY</id></attribute> + <attribute><id>PM_SPIVID_CRC_CHECK_ENABLE</id></attribute> + <attribute><id>PM_SPIVID_CRC_GEN_ENABLE</id></attribute> + <attribute><id>PM_SPIVID_CRC_POLYNOMIAL_ENABLES</id></attribute> + <attribute><id>PM_SPIVID_FRAME_SIZE</id></attribute> + <attribute><id>PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS</id></attribute> + <attribute><id>PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS_VALUE</id></attribute> + <attribute><id>PM_SPIVID_INTER_RETRY_DELAY</id></attribute> + <attribute><id>PM_SPIVID_INTER_RETRY_DELAY_VALUE</id></attribute> + <attribute><id>PM_SPIVID_IN_DELAY_FRAME1</id></attribute> + <attribute><id>PM_SPIVID_IN_DELAY_FRAME2</id></attribute> + <attribute><id>PM_SPIVID_MAJORITY_VOTE_ENABLE</id></attribute> + <attribute><id>PM_SPIVID_MAX_RETRIES</id></attribute> + <attribute><id>PM_WINKLE_TYPE</id></attribute> + <attribute><id>PROC_DPLL_DIVIDER</id></attribute> + <!-- End pm_hwp_attributes.xml --> <!-- Begin poreve_memory_attributes.xml --> <attribute><id>SBE_SEEPROM_I2C_ADDRESS_BYTES</id></attribute> <attribute><id>SBE_SEEPROM_I2C_DEVICE_ADDRESS</id></attribute> @@ -498,10 +495,11 @@ <id>TYPE</id> <default>EX</default> </attribute> - <!-- Start pm_attributes_all_hwp.xml --> + <!-- Start pm_hwp_attributes.xml --> <attribute><id>PM_SPWUP_FSP</id></attribute> <attribute><id>PM_SPWUP_OCC</id></attribute> <attribute><id>PM_SPWUP_PHYP</id></attribute> + <!-- End pm_hwp_attributes.xml --> <attribute><id>OVERRIDE_MVPD_NOM_FREQ_MHZ</id></attribute> <attribute><id>OVERRIDE_MVPD_V_NEST_NOM_VOLTAGE</id></attribute> <attribute><id>OVERRIDE_MVPD_I_NEST_NOM_CURRENT</id></attribute> @@ -527,7 +525,6 @@ <attribute><id>OVERRIDE_MVPD_I_NEST_LAB_CURRENT</id></attribute> <attribute><id>OVERRIDE_MVPD_V_CS_LAB_VOLTAGE</id></attribute> <attribute><id>OVERRIDE_MVPD_I_CS_LAB_CURRENT</id></attribute> - <!-- End pm_attributes_all_hwp.xml --> </targetType> <targetType> diff --git a/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml b/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml index f8224bd5e..6b1f8675e 100644 --- a/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml +++ b/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml @@ -153,7 +153,7 @@ <id>MSS_CLEANER_ENABLE</id> <default>1</default> </attribute> - <!-- Start pm_attributes_all_plat.xml --> + <!-- Start pm_plat_attributes.xml --> <attribute><id>PROC_R_LOADLINE</id> <default>890</default> </attribute> @@ -166,10 +166,37 @@ <attribute><id>FREQ_CORE_MAX</id> <default>4000</default> </attribute> - <attribute><id>PROC_DPLL_DIVIDER</id> + <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> + <default>2500</default> + </attribute> + <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> + <default>10</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> + <default>2000</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> + <default>2300</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> + <default>3000</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> + <default>3050</default> + </attribute> + <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> + <default>4800</default> + </attribute> + <attribute><id>PM_SAFE_FREQUENCY</id> + <default>3200</default> + </attribute> + <attribute><id>PM_SPIPSS_FREQUENCY</id> + <default>10</default> + </attribute> + <attribute><id>PM_SPIVID_FREQUENCY</id> <default>10</default> </attribute> - <!-- End pm_attributes_all_plat.xml --> + <!-- End pm_plat_attributes.xml --> <attribute> <id>IS_SIMULATION</id> <default>1</default> @@ -248,28 +275,17 @@ <attribute><id>RNG_BASE_ADDR</id> <default>0x0003FFFF40000000</default> </attribute> - <!-- Start pm_attributes_all_plat.xml --> <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>2500</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SAFE_VOLTAGE</id> - <default>1100</default> - </attribute> + + <!-- Start pm_plat_attributes.xml --> <attribute><id>PM_PSTATE_UNDERVOLTING_MINIMUM</id> <default>900</default> </attribute> <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id> <default>1250</default> </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> @@ -282,36 +298,6 @@ <attribute><id>PM_SLEEP_TYPE</id> <default>1</default><!-- DEEP --> </attribute> - <attribute><id>PM_WINKLE_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -324,7 +310,7 @@ <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> <default>0</default> </attribute> - <!-- End pm_attributes_all_plat.xml --> + <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -1387,28 +1373,17 @@ <attribute><id>RNG_BASE_ADDR</id> <default>0x0003FFFF40001000</default> </attribute> - <!-- Start pm_attributes_all_plat.xml --> <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>2500</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SAFE_VOLTAGE</id> - <default>1100</default> - </attribute> + + <!-- Start pm_plat_attributes.xml --> <attribute><id>PM_PSTATE_UNDERVOLTING_MINIMUM</id> <default>900</default> </attribute> <attribute><id>PM_PSTATE_UNDERVOLTING_MAXIMUM</id> <default>1250</default> </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_SPIVID_PORT_ENABLE</id> <default>0b111</default><!-- REDUNDANT --> </attribute> @@ -1421,36 +1396,6 @@ <attribute><id>PM_SLEEP_TYPE</id> <default>1</default><!-- DEEP --> </attribute> - <attribute><id>PM_WINKLE_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_WINKLE_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>PM_APSS_CHIP_SELECT</id> <default>0x00</default><!-- CS0 --> </attribute> @@ -1463,7 +1408,7 @@ <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> <default>0</default> </attribute> - <!-- End pm_attributes_all_plat.xml --> + <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> |
