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| author | Thi Tran <thi@us.ibm.com> | 2014-12-15 07:55:00 -0600 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2015-02-24 15:45:29 -0600 |
| commit | c47cf903aeb515c7497ab3bdac756210af982e87 (patch) | |
| tree | 7707ca5e807f0265eb7d9079377bd7b83005ace0 /src/usr/targeting/common/xmltohb/target_types.xml | |
| parent | 26dbc6dcf3be4416bc4606147a0226e68df997e1 (diff) | |
| download | talos-hostboot-c47cf903aeb515c7497ab3bdac756210af982e87.tar.gz talos-hostboot-c47cf903aeb515c7497ab3bdac756210af982e87.zip | |
SW289468: INITPROC: FSP&Hostboot - Changes for Naples
CMVC-Coreq: 947204
CQ:SW289468
Change-Id: I5d139ba3a6b003d05e8841e27f2414859010ea4a
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14867
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14910
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/targeting/common/xmltohb/target_types.xml')
| -rw-r--r-- | src/usr/targeting/common/xmltohb/target_types.xml | 58 |
1 files changed, 47 insertions, 11 deletions
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 8d006cc9a..836648a1f 100644 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -564,8 +564,6 @@ <attribute><id>PROC_PCIE_IOP_CONFIG</id></attribute> <attribute><id>PROC_PCIE_IOP_SWAP</id></attribute> <attribute><id>PROC_PCIE_PHB_ACTIVE</id></attribute> - - <attribute><id>IOP_LANES_PER_PROC</id></attribute> <attribute><id>PROC_PCIE_LANE_MASK</id></attribute> <attribute><id>PROC_PCIE_LANE_MASK_NON_BIFURCATED</id></attribute> <attribute><id>PROC_PCIE_LANE_MASK_BIFURCATED</id></attribute> @@ -620,10 +618,12 @@ <attribute><id>PROC_BOOT_VOLTAGE_VID</id></attribute> <attribute><id>PROC_PBA_UNTRUSTED_BAR_BASE_ADDR</id></attribute> <attribute><id>PROC_PBA_UNTRUSTED_BAR_SIZE</id></attribute> - <attribute><id>PROC_PCIE_IOP_TX_FFE_GEN1</id></attribute> <attribute><id>PROC_PCIE_IOP_TX_FFE_GEN2</id></attribute> <attribute><id>I2C_SLAVE_ADDRESS</id></attribute> + <attribute><id>PROC_PCIE_NUM_PHB</id></attribute> + <attribute><id>PROC_PCIE_NUM_IOP</id></attribute> + <attribute><id>PROC_PCIE_NUM_LANES</id></attribute> </targetType> <targetType> @@ -636,9 +636,21 @@ <attribute><id>DUMMY_RW</id></attribute> <attribute><id>DUMMY_HEAP_ZERO_DEFAULT</id></attribute> <attribute> - <id>IOP_LANES_PER_PROC</id> + <id>PROC_PCIE_NUM_PHB</id> + <default>3</default> + </attribute> + <attribute> + <id>PROC_PCIE_NUM_IOP</id> + <default>2</default> + </attribute> + <attribute> + <id>PROC_PCIE_NUM_LANES</id> <default>32</default> </attribute> + <attribute> + <id>PROC_PCIE_REFCLOCK_ENABLE</id> + <default>0xE0</default> + </attribute> </targetType> <targetType> @@ -648,10 +660,22 @@ <id>MODEL</id> <default>MURANO</default> </attribute> - <attribute> - <id>IOP_LANES_PER_PROC</id> + <attribute> + <id>PROC_PCIE_NUM_PHB</id> + <default>3</default> + </attribute> + <attribute> + <id>PROC_PCIE_NUM_IOP</id> + <default>2</default> + </attribute> + <attribute> + <id>PROC_PCIE_NUM_LANES</id> <default>24</default> - </attribute> + </attribute> + <attribute> + <id>PROC_PCIE_REFCLOCK_ENABLE</id> + <default>0xE0</default> + </attribute> </targetType> <targetType> @@ -661,10 +685,22 @@ <id>MODEL</id> <default>NAPLES</default> </attribute> - <attribute> - <id>IOP_LANES_PER_PROC</id> - <default>32</default> - </attribute> + <attribute> + <id>PROC_PCIE_NUM_PHB</id> + <default>4</default> + </attribute> + <attribute> + <id>PROC_PCIE_NUM_IOP</id> + <default>3</default> + </attribute> + <attribute> + <id>PROC_PCIE_NUM_LANES</id> + <default>40</default> + </attribute> + <attribute> + <id>PROC_PCIE_REFCLOCK_ENABLE</id> + <default>0xF0</default> + </attribute> </targetType> <targetType> |
