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author | Matt Derksen <mderkse1@us.ibm.com> | 2019-09-13 15:05:45 -0500 |
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committer | William G Hoffa <wghoffa@us.ibm.com> | 2019-09-30 15:35:10 -0500 |
commit | 09016a8a7f562b83bd3003d84fa8177eaf200378 (patch) | |
tree | 5bb1f4b31e273f17669c9692b124573aeb8d7dba /src/usr/targeting/common/xmltohb/target_types.xml | |
parent | 56b1dbc3ce1a7c6d45dc94515d17304d622827af (diff) | |
download | talos-hostboot-09016a8a7f562b83bd3003d84fa8177eaf200378.tar.gz talos-hostboot-09016a8a7f562b83bd3003d84fa8177eaf200378.zip |
Hostboot platform support for Explorer inband commands via i2c
Inband SRAM can be accessed via scom i2c commands. To Explorer,
a register address and an internal memory address are the same thing.
That allows us to execute the inband command set even if the
OMI link is not active. A new attribute determinds when this
inband i2c is required so it can be an easy override for lab use.
By default, this i2c path will not execute when OMI links are working.
Change-Id: I3f18cf78d2e88e33935f1bd241ef4e2796d36d93
RTC: 208447
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/83787
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Reviewed-by: William G Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/usr/targeting/common/xmltohb/target_types.xml')
-rw-r--r-- | src/usr/targeting/common/xmltohb/target_types.xml | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index c5b466ebf..bc0858b5d 100644 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -1860,6 +1860,9 @@ <id>FORCE_NVDIMM_RESET</id> </attribute> <attribute> + <id>FORCE_SRAM_MMIO_OVER_I2C</id> + </attribute> + <attribute> <id>FREQ_CORE_CEILING_MHZ</id> </attribute> <attribute> |