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author | Matt Derksen <mderkse1@us.ibm.com> | 2019-01-15 10:48:31 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-01-24 13:12:08 -0600 |
commit | cb35695328fbc1cb6764f048a8dbb3e81faba1e9 (patch) | |
tree | ea9cce42514a9f000c687545ab5f417842df04af /src/usr/targeting/common/xmltohb/attribute_types.xml | |
parent | 9de9d8f7c5b5c73247dc69925a594fcd07ce060c (diff) | |
download | talos-hostboot-cb35695328fbc1cb6764f048a8dbb3e81faba1e9.tar.gz talos-hostboot-cb35695328fbc1cb6764f048a8dbb3e81faba1e9.zip |
Inform PHYP of NVDIMM protection by OCC
The OCC is responsible for detecting the EPOW signal
and triggering the save operation on the NVDIMM.
Therefore, if the OCC is not running we are unprotected
from a poweroff event. PHYP needs to inform the LPARs
using the NV (non-volatile) memory of this state so they
can behave accordingly.
HBRT is responsible for telling PHYP when we get into this state.
There are two ways we can detect this state:
a) HBRT explicitly puts the PM complex into reset
b) PRD detects a specific FIR bit
The message should include this data:
- what state we are in (protected or unprotected)
- which processor is affected
Work for this story will include:
- Definition of the new message
- Creating a utility function to send the message
- Calling utility function to send 'unprotected' message
inside of all pm reset paths at runtime
Change-Id: Ib015d001d47883a247faedabedb0705ba0f1b215
RTC:201181
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68870
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: TSUNG K. YEUNG <tyeung@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/targeting/common/xmltohb/attribute_types.xml')
-rw-r--r-- | src/usr/targeting/common/xmltohb/attribute_types.xml | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index eb281a157..c31202b92 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -4925,6 +4925,41 @@ </attribute> <attribute> + <description> + NVDIMM(s) are armed for backup incase of power loss (DDR Reset_n goes low) + This keeps track of the armed state + </description> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <complexType> + <description>Armed State</description> + <field> + <bits>1</bits> + <default>0</default> + <description>Is NVDIMM armed</description> + <name>armed</name> + <type>uint8_t</type> + </field> + <field> + <bits>1</bits> + <default>0</default> + <description>NVDIMM controller error detected</description> + <name>error_detected</name> + <type>uint8_t</type> + </field> + <field> + <bits>6</bits> + <default>0</default> + <description>Reserved for future use</description> + <name>reserved</name> + <type>uint8_t</type> + </field> + </complexType> + <id>NVDIMM_ARMED</id> + </attribute> + + <attribute> <id>NV_OPS_TIMEOUT_MSEC</id> <description> NVDIMM timeout value for 6 main operations |