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| author | Mike Baiocchi <mbaiocch@us.ibm.com> | 2017-02-10 09:06:46 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-03-15 17:27:23 -0400 |
| commit | e8b8f27d39f6633ff89f2dc541db77c802988685 (patch) | |
| tree | 5c7c43d099f605881a11ffa7a3cf394220bb76f5 /src/usr/secureboot/common | |
| parent | d5358edf5e5ff7835099e4503e4bcf1518e24024 (diff) | |
| download | talos-hostboot-e8b8f27d39f6633ff89f2dc541db77c802988685.tar.gz talos-hostboot-e8b8f27d39f6633ff89f2dc541db77c802988685.zip | |
Trace Processor Security Registers; add them to Secure Error Logs
This commit adds a trace of the Security Switch and CBS Control/Status
registers for all processors in the system. These registers are also
captured for Security-specific error logs.
Change-Id: I245815c720725a9aaf15a3cbad9a50b3288fc1f9
RTC:165205
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37290
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/secureboot/common')
| -rw-r--r-- | src/usr/secureboot/common/securetrace.H | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/usr/secureboot/common/securetrace.H b/src/usr/secureboot/common/securetrace.H index 06d3bc6b5..7c7accb54 100644 --- a/src/usr/secureboot/common/securetrace.H +++ b/src/usr/secureboot/common/securetrace.H @@ -38,6 +38,11 @@ namespace SECUREBOOT extern trace_desc_t* g_trac_secure; +// symbolic constant for the trace size +enum { + ERROR_TRACE_SIZE = 256, +}; + } #define SB_ENTER(args...) \ |
