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| author | Bill Hoffa <wghoffa@us.ibm.com> | 2019-06-25 10:32:16 -0500 |
|---|---|---|
| committer | Nicholas E Bofferding <bofferdn@us.ibm.com> | 2019-08-30 13:15:28 -0500 |
| commit | e22e362f3cd9b96b845f8c51acd6da97c78554a4 (patch) | |
| tree | 4b37414e32dbbdb9cc7cdbdd8aabb27fba49e918 /src/usr/scom | |
| parent | 38845b6460903998891709c6a4bfcaec2a9ed837 (diff) | |
| download | talos-hostboot-e22e362f3cd9b96b845f8c51acd6da97c78554a4.tar.gz talos-hostboot-e22e362f3cd9b96b845f8c51acd6da97c78554a4.zip | |
Axone 2-Proc Standalone Sim Enablement
- XML Additions for all targets on 2nd proc
Change-Id: Ib8a860e4679e08253076abbbade98f4ba172e81d
RTC: 208448
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82685
Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com>
Diffstat (limited to 'src/usr/scom')
| -rw-r--r-- | src/usr/scom/runtime/test/testscom_rt.H | 25 |
1 files changed, 1 insertions, 24 deletions
diff --git a/src/usr/scom/runtime/test/testscom_rt.H b/src/usr/scom/runtime/test/testscom_rt.H index f0a14fe1b..e39d06d96 100644 --- a/src/usr/scom/runtime/test/testscom_rt.H +++ b/src/usr/scom/runtime/test/testscom_rt.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2013,2018 */ +/* Contributors Listed Below - COPYRIGHT 2013,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -1242,29 +1242,6 @@ public: TS_FAIL( "ScomTest::test__MultiChipScomWrite_proc> ERROR : Data mismatch between read and expected data" ); fails++; } - - // Read the data back using FSIscom to make sure the data is the same. - l_err = deviceOp( DeviceFW::READ, - test_data[x].target, - &(read_data[x]), - op_size, - DEVICE_FSISCOM_ADDRESS(test_data[x].addr) ); - - - if( l_err ) - { - TRACFCOMP(g_trac_scom, "ScomTest::test__MultiChipScomWrite_proc> [%d] FSISCOM Read: Error from device : addr=0x%X, RC=%X", x, test_data[x].addr, l_err->reasonCode() ); - TS_FAIL( "ScomTest::test__MultiChipScomWrite_proc> ERROR : Unexpected error log from write1" ); - fails++; - errlCommit(l_err,SCOM_COMP_ID); - } - else if(read_data[x] != test_data[x].data) - { - TRACFCOMP(g_trac_scom, "ScomTest::test__MultiChipScomWrite_proc> [%d] FSISCOM Read: Data mismatch : addr=0x%X, read_data=0x%llx, write_data=0x%llx", x, test_data[x].addr, read_data[x], test_data[x].data); - TS_FAIL( "ScomTest::test__MultiChipScomWrite_proc> ERROR : Data mismatch between read and expected data" ); - fails++; - } - } TRACFCOMP( g_trac_scom, "ScomTest::test__MultiChipScomWrite_proc> %d/%d fails", fails, total ); |
