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authorDan Crowell <dcrowell@us.ibm.com>2011-11-30 17:12:05 -0600
committerA. Patrick Williams III <iawillia@us.ibm.com>2011-12-01 13:43:45 -0600
commit4a353d7840f632640e78cafc7052e2e5a99ad564 (patch)
treecb80b7cb21fc2d8b6779427eaba119b14246dede /src/usr/scom/test
parent1de45373ef02d33ae6a97c583db3b6d1db9bce1c (diff)
downloadtalos-hostboot-4a353d7840f632640e78cafc7052e2e5a99ad564.tar.gz
talos-hostboot-4a353d7840f632640e78cafc7052e2e5a99ad564.zip
Removed workarounds to update Simics level and moved default
build to b1129a_1149.760. I also fixed up a bug in the scom testcase that was seen in some configs. Verified against SALERNO, VENICE and VENICE 2-chip models. Change-Id: I5c6c71a1c8f782b4d1a9c0f13faa9dc2ded4d911 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/521 Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/scom/test')
-rw-r--r--src/usr/scom/test/scomtest.H18
1 files changed, 14 insertions, 4 deletions
diff --git a/src/usr/scom/test/scomtest.H b/src/usr/scom/test/scomtest.H
index 2dc45251e..5c8fab902 100644
--- a/src/usr/scom/test/scomtest.H
+++ b/src/usr/scom/test/scomtest.H
@@ -93,13 +93,18 @@ public:
else if((TARGETING::MASTER_PROCESSOR_CHIP_TARGET_SENTINEL == scom_targets[x]) ||
(scom_targets[x]->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useXscom))
{
- TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_proc> Target is the MASTER Sentinal or is set to use Xscom, exiting test" );
+ TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_proc> Target %d is the MASTER Sentinal or is set to use Xscom, exiting test", x );
scom_targets[x] = NULL; //remove from our list
}
// skip if fsi scom is not enabled
else if(0 == scom_targets[x]->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useFsiScom)
{
- TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_proc> useFsiScom set to zero, exiting test" );
+ TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_proc> useFsiScom set to zero on target %d", x );
+ scom_targets[x] = NULL; //remove from our list
+ }
+ else if( !FSI::isSlavePresent(scom_targets[x]) )
+ {
+ TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_proc> Target %d is not present", x );
scom_targets[x] = NULL; //remove from our list
}
}
@@ -233,12 +238,17 @@ public:
(scom_targets[x]->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useXscom) ||
(scom_targets[x]->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useInbandScom))
{
- TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_centaur> Target is the MASTER Sentinal or is set to use Xscom or Inband Scom, exiting test" );
+ TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_centaur> Target %d is the MASTER Sentinal or is set to use Xscom or Inband Scom, exiting test", x );
scom_targets[x] = NULL; //remove from our list
}
else if(0 == scom_targets[x]->getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useFsiScom)
{
- TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_centaur> useFsiScom set to zero, exiting test" );
+ TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_centaur> useFsiScom set to zero on target %d", x );
+ scom_targets[x] = NULL; //remove from our list
+ }
+ else if( !FSI::isSlavePresent(scom_targets[x]) )
+ {
+ TRACFCOMP( g_trac_scom, "ScomTest::test_FSISCOMreadWrite_centaur> Target %d is not present", x );
scom_targets[x] = NULL; //remove from our list
}
}
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