diff options
| author | Dean Sanner <dsanner@us.ibm.com> | 2018-08-16 17:40:52 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-08-21 14:29:46 -0500 |
| commit | 437807d50d4a3681af9d751a567d689f831b0903 (patch) | |
| tree | 2f9cf5171f490aa1a1ef5714f8eab12c9b01dc7a /src/usr/sbe | |
| parent | 15641e1a1fae0e60f9d74a5ef9ddf6f1fb6d5efc (diff) | |
| download | talos-hostboot-437807d50d4a3681af9d751a567d689f831b0903.tar.gz talos-hostboot-437807d50d4a3681af9d751a567d689f831b0903.zip | |
Account for mixed procs in compatibility mode
Current code enforces the same EC level for all processors in
the system. However, this breaks compatibility mode for P9C
1.2/1.3 and P9N 2.2/2.3. Added code to allow these to pass
the EC check when mixing parts
Change-Id: Ie013d94dfdee3627911f4afbec5f65d5ce984227
CQ:SW442691
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64823
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/sbe')
| -rw-r--r-- | src/usr/sbe/sbe_update.C | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/src/usr/sbe/sbe_update.C b/src/usr/sbe/sbe_update.C index 8f7ab3edb..cfa3372ec 100644 --- a/src/usr/sbe/sbe_update.C +++ b/src/usr/sbe/sbe_update.C @@ -4919,6 +4919,7 @@ errlHndl_t getSeepromSideVersionViaChipOp(TARGETING::Target* i_target, uint8_t mP = UINT8_MAX; sbe_image_version_t mP_version; sbe_image_version_t * ver_ptr; + TARGETING::ATTR_MODEL_type l_model; do{ @@ -4936,6 +4937,8 @@ errlHndl_t getSeepromSideVersionViaChipOp(TARGETING::Target* i_target, if ( io_sbeStates_v[i].target_is_master == true ) { mP = i; + l_model = io_sbeStates_v[i].target + ->getAttr<TARGETING::ATTR_MODEL>(); // Compare against 'current' Master side in case there is // an issue with the other side @@ -5149,9 +5152,15 @@ errlHndl_t getSeepromSideVersionViaChipOp(TARGETING::Target* i_target, // Compare 'current' version of target to 'current' version // of Master target in case Master version is down-level - else if ( 0 != memcmp( &(mP_version), + // This check will fail compat mode mixing of parts. + // Allow it to pass if that is the case + // TODO RTC:197737 improve mixed mode, instead of skipping + else if ( (0 != memcmp( &(mP_version), ver_ptr, - SBE_IMAGE_VERSION_SIZE) ) + SBE_IMAGE_VERSION_SIZE)) && + ! HWAS::mixedECsAllowed(l_model, io_sbeStates_v[mP].ec, + io_sbeStates_v[i].ec) + ) { TRACFCOMP( g_trac_sbe,ERR_MRK"masterVersionCompare() - " "SBE Version Miscompare Between Master Target " |

