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authorDan Crowell <dcrowell@us.ibm.com>2016-10-06 11:27:40 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2016-10-07 13:48:45 -0400
commit90b0798b2ba62bd1fc00bbe183b71df5e2d796fb (patch)
tree26d6a9fec21fdc9b54a802ece7f575db6dff1c0d /src/usr/sbe/sbe_update.C
parentbab702287b0b940351e66a4773b4424719843984 (diff)
downloadtalos-hostboot-90b0798b2ba62bd1fc00bbe183b71df5e2d796fb.tar.gz
talos-hostboot-90b0798b2ba62bd1fc00bbe183b71df5e2d796fb.zip
Read MC Sync Mode from SBE
The SBE boots the system into a specific mode for MC/Nest running synchronously. Hostboot needs to detect the mode that we booted in and set our live copy based on that since it may be out of sync from what our attribute might say. Change-Id: I4d7839eb4dd7e40fa045006abfdedc35b16f956c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30811 Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/sbe/sbe_update.C')
-rw-r--r--src/usr/sbe/sbe_update.C44
1 files changed, 44 insertions, 0 deletions
diff --git a/src/usr/sbe/sbe_update.C b/src/usr/sbe/sbe_update.C
index ad1895d95..74f36f5a9 100644
--- a/src/usr/sbe/sbe_update.C
+++ b/src/usr/sbe/sbe_update.C
@@ -4871,5 +4871,49 @@ namespace SBE
return l_status;
}
+/////////////////////////////////////////////////////////////////////
+ errlHndl_t getBootMcSyncMode( uint8_t& o_mcSyncMode )
+ {
+ errlHndl_t l_err = nullptr;
+ uint64_t l_mboxScratchReg5 = 0;
+
+ INITSERVICE::SPLESS::MboxScratch5_t l_scratch5;
+ size_t l_indexSize = sizeof(l_mboxScratchReg5);
+
+ TARGETING::Target * l_masterProcTarget = NULL;
+ TARGETING::targetService()
+ .masterProcChipTargetHandle( l_masterProcTarget );
+
+ TRACFCOMP( g_trac_sbe, ENTER_MRK"Enter getBootMcSyncMode()");
+ do
+ {
+ l_err = deviceRead( l_masterProcTarget,
+ &l_mboxScratchReg5,
+ l_indexSize,
+ DEVICE_SCOM_ADDRESS(
+ INITSERVICE::SPLESS::MBOX_SCRATCH_REG5) );
+
+ if( l_err )
+ {
+ TRACFCOMP(g_trac_sbe,
+ "getBootMcSyncMode::"
+ "Failed to get the bucket index from scom address");
+ errlCommit(l_err, SBE_COMP_ID);
+ break;
+ }
+
+ l_scratch5.data32 = static_cast<uint32_t>(l_mboxScratchReg5 >> 32);
+
+ TRACFCOMP(g_trac_sbe,
+ "The MC Sync Bit is %d",
+ l_scratch5.mcSyncMode );
+
+ o_mcSyncMode = l_scratch5.mcSyncMode;
+
+ } while( 0 );
+ TRACUCOMP(g_trac_sbe,EXIT_MRK "Exit getBootMcSyncMode()");
+
+ return l_err;
+ }
} //end SBE Namespace
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