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authorAndrew Jeffery <andrewrj@au1.ibm.com>2018-09-17 17:23:17 +0930
committerDaniel M. Crowell <dcrowell@us.ibm.com>2018-10-10 13:46:03 -0500
commitd768905cfe02c7e7ff046c865c8f107df29d32ab (patch)
tree11ffdcc1ed967efd275abb2abce0e0c597febc69 /src/usr/pnor
parent92d167f704d5a77b353614926747c8352fd13fb2 (diff)
downloadtalos-hostboot-d768905cfe02c7e7ff046c865c8f107df29d32ab.tar.gz
talos-hostboot-d768905cfe02c7e7ff046c865c8f107df29d32ab.zip
pnor: ipmidd: Rename class to PnorIpmiDD
The rename is done in preparation for the fallback code, which needs to know of both the IPMI and AST mailbox implementations of the PNOR driver. Change-Id: Iabadb5a355f63ac72330094c842fb9c8f7afe77b Signed-off-by: Andrew Jeffery <andrewrj@au1.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66120 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/pnor')
-rw-r--r--src/usr/pnor/pnor_ipmidd.C86
-rw-r--r--src/usr/pnor/pnor_ipmidd.H11
-rw-r--r--src/usr/pnor/pnorvalid.C1
-rw-r--r--src/usr/pnor/test/pnorddtest.H1
4 files changed, 50 insertions, 49 deletions
diff --git a/src/usr/pnor/pnor_ipmidd.C b/src/usr/pnor/pnor_ipmidd.C
index 68613eafd..6d68e593b 100644
--- a/src/usr/pnor/pnor_ipmidd.C
+++ b/src/usr/pnor/pnor_ipmidd.C
@@ -136,11 +136,11 @@ errlHndl_t ddRead(DeviceFW::OperationType i_opType,
// The PNOR device driver interface is initialized with the
// MASTER_PROCESSOR_CHIP_TARGET_SENTINEL. Other target
- // access requires a separate PnorDD class created
+ // access requires a separate PnorIpmiDD class created
assert( i_target == TARGETING::MASTER_PROCESSOR_CHIP_TARGET_SENTINEL );
// Read the flash
- l_err = Singleton<PnorDD>::instance().readFlash(io_buffer,
+ l_err = Singleton<PnorIpmiDD>::instance().readFlash(io_buffer,
io_buflen,
l_addr);
@@ -195,11 +195,11 @@ errlHndl_t ddWrite(DeviceFW::OperationType i_opType,
// The PNOR device driver interface is initialized with the
// MASTER_PROCESSOR_CHIP_TARGET_SENTINEL. Other target
- // access requires a separate PnorDD class created
+ // access requires a separate PnorIpmiDD class created
assert( i_target == TARGETING::MASTER_PROCESSOR_CHIP_TARGET_SENTINEL );
// Write the flash
- l_err = Singleton<PnorDD>::instance().writeFlash(io_buffer,
+ l_err = Singleton<PnorIpmiDD>::instance().writeFlash(io_buffer,
io_buflen,
l_addr);
@@ -234,14 +234,12 @@ void getPnorInfo( PnorInfo_t& o_pnorInfo )
{
o_pnorInfo.mmioOffset = LPC_SFC_MMIO_OFFSET | LPC_FW_SPACE;
o_pnorInfo.norWorkarounds =
- Singleton<PnorDD>::instance().getNorWorkarounds();
+ Singleton<PnorIpmiDD>::instance().getNorWorkarounds();
o_pnorInfo.flashSize =
- Singleton<PnorDD>::instance().getNorSize();
+ Singleton<PnorIpmiDD>::instance().getNorSize();
}
-
-
-// Register MBOXDD access functions to DD framework
+// Register access functions to DD framework
DEVICE_REGISTER_ROUTE(DeviceFW::READ,
DeviceFW::PNOR,
TARGETING::TYPE_PROC,
@@ -262,9 +260,9 @@ DEVICE_REGISTER_ROUTE(DeviceFW::WRITE,
/**
* @brief Performs a PNOR Read Operation
*/
-errlHndl_t PnorDD::readFlash(void* o_buffer,
- size_t& io_buflen,
- uint64_t i_address)
+errlHndl_t PnorIpmiDD::readFlash(void* o_buffer,
+ size_t& io_buflen,
+ uint64_t i_address)
{
/* We support 256M max */
uint32_t l_address = i_address & 0x0fffffff;
@@ -279,11 +277,11 @@ errlHndl_t PnorDD::readFlash(void* o_buffer,
/**
* @brief Performs a PNOR Write Operation
*/
-errlHndl_t PnorDD::writeFlash(const void* i_buffer,
- size_t& io_buflen,
- uint64_t i_address)
+errlHndl_t PnorIpmiDD::writeFlash(const void* i_buffer,
+ size_t& io_buflen,
+ uint64_t i_address)
{
- TRACDCOMP(g_trac_pnor, ENTER_MRK"PnorDD::writeFlash(i_address=0x%llx)> ", i_address);
+ TRACDCOMP(g_trac_pnor, ENTER_MRK"PnorIpmiDD::writeFlash(i_address=0x%llx)> ", i_address);
errlHndl_t l_err = NULL;
uint32_t l_address = i_address & 0x0fffffff;
@@ -297,7 +295,7 @@ errlHndl_t PnorDD::writeFlash(const void* i_buffer,
io_buflen = 0;
}
- TRACDCOMP(g_trac_pnor, EXIT_MRK"PnorDD::writeFlash(i_address=0x%llx)> io_buflen=%.8X", i_address, io_buflen);
+ TRACDCOMP(g_trac_pnor, EXIT_MRK"PnorIpmiDD::writeFlash(i_address=0x%llx)> io_buflen=%.8X", i_address, io_buflen);
return l_err;
}
@@ -306,29 +304,29 @@ errlHndl_t PnorDD::writeFlash(const void* i_buffer,
/********************
Private/Protected Methods
********************/
-mutex_t PnorDD::cv_mutex = MUTEX_INITIALIZER;
+mutex_t PnorIpmiDD::cv_mutex = MUTEX_INITIALIZER;
/**
* LPC FW space accessors
*/
-errlHndl_t PnorDD::readLpcFw(uint32_t i_offset, size_t i_size, void* o_buf)
+errlHndl_t PnorIpmiDD::readLpcFw(uint32_t i_offset, size_t i_size, void* o_buf)
{
// Exploit new LPC large read facility
return deviceOp(DeviceFW::READ, iv_target, o_buf, i_size,
DEVICE_LPC_ADDRESS(LPC::TRANS_FW, i_offset));
}
-errlHndl_t PnorDD::writeLpcFw(uint32_t i_offset, size_t i_size,
- const void* i_buf)
+errlHndl_t PnorIpmiDD::writeLpcFw(uint32_t i_offset, size_t i_size,
+ const void* i_buf)
{
// Exploit new LPC large write facility
return deviceOp(DeviceFW::WRITE, iv_target, (void*)i_buf, i_size,
DEVICE_LPC_ADDRESS(LPC::TRANS_FW, i_offset));
}
-errlHndl_t PnorDD::adjustWindow(bool i_isWrite, uint32_t i_reqAddr,
- size_t i_reqSize, uint32_t& o_lpcAddr,
- size_t& o_chunkLen)
+errlHndl_t PnorIpmiDD::adjustWindow(bool i_isWrite, uint32_t i_reqAddr,
+ size_t i_reqSize, uint32_t& o_lpcAddr,
+ size_t& o_chunkLen)
{
errlHndl_t l_err = NULL;
uint32_t l_pos, l_reqSize;
@@ -415,7 +413,7 @@ errlHndl_t PnorDD::adjustWindow(bool i_isWrite, uint32_t i_reqAddr,
return l_err;
}
-errlHndl_t PnorDD::writeDirty(uint32_t i_addr, size_t i_size)
+errlHndl_t PnorIpmiDD::writeDirty(uint32_t i_addr, size_t i_size)
{
errlHndl_t l_err = NULL;
@@ -439,7 +437,7 @@ errlHndl_t PnorDD::writeDirty(uint32_t i_addr, size_t i_size)
return l_err;
}
-errlHndl_t PnorDD::writeFlush(void)
+errlHndl_t PnorIpmiDD::writeFlush(void)
{
errlHndl_t l_err = NULL;
HiomapMessage* flushMsg = new HiomapMessage(HIOMAP_C_FLUSH);
@@ -455,11 +453,11 @@ errlHndl_t PnorDD::writeFlush(void)
/**
* @brief Write data to PNOR using Mbox LPC windows
*/
-errlHndl_t PnorDD::_writeFlash( uint32_t i_addr,
- size_t i_size,
- const void* i_data )
+errlHndl_t PnorIpmiDD::_writeFlash( uint32_t i_addr,
+ size_t i_size,
+ const void* i_data )
{
- TRACFCOMP(g_trac_pnor, ENTER_MRK"PnorDD::_writeFlash(i_addr=0x%.8X)> ", i_addr);
+ TRACFCOMP(g_trac_pnor, ENTER_MRK"PnorIpmiDD::_writeFlash(i_addr=0x%.8X)> ", i_addr);
errlHndl_t l_err = NULL, l_flushErr = NULL;
while (i_size)
@@ -525,11 +523,11 @@ errlHndl_t PnorDD::_writeFlash( uint32_t i_addr,
/**
* @brief Read data from PNOR using Mbox LPC windows
*/
-errlHndl_t PnorDD::_readFlash( uint32_t i_addr,
- size_t i_size,
- void* o_data )
+errlHndl_t PnorIpmiDD::_readFlash( uint32_t i_addr,
+ size_t i_size,
+ void* o_data )
{
- TRACDCOMP(g_trac_pnor, "PnorDD::_readFlash(i_addr=0x%.8X)> ", i_addr);
+ TRACDCOMP(g_trac_pnor, "PnorIpmiDD::_readFlash(i_addr=0x%.8X)> ", i_addr);
errlHndl_t l_err = NULL;
while (i_size)
@@ -566,7 +564,7 @@ errlHndl_t PnorDD::_readFlash( uint32_t i_addr,
/**
* @brief Retrieve size of NOR flash
*/
-uint32_t PnorDD::getNorSize( void )
+uint32_t PnorIpmiDD::getNorSize( void )
{
return iv_flashSize;
}
@@ -574,12 +572,12 @@ uint32_t PnorDD::getNorSize( void )
/**
* @brief Retrieve bitstring of NOR workarounds
*/
-uint32_t PnorDD::getNorWorkarounds( void )
+uint32_t PnorIpmiDD::getNorWorkarounds( void )
{
return 0;
}
-errlHndl_t PnorDD::sendCommand(HiomapMessage*& io_msg, size_t& io_len)
+errlHndl_t PnorIpmiDD::sendCommand(HiomapMessage*& io_msg, size_t& io_len)
{
IPMI::completion_code l_cc = IPMI::CC_UNKBAD;
errlHndl_t l_err = NULL;
@@ -703,7 +701,7 @@ errlHndl_t PnorDD::sendCommand(HiomapMessage*& io_msg, size_t& io_len)
return l_err;
}
-errlHndl_t PnorDD::getInfo( void )
+errlHndl_t PnorIpmiDD::getInfo( void )
{
errlHndl_t l_err = NULL;
@@ -733,7 +731,7 @@ errlHndl_t PnorDD::getInfo( void )
return l_err;
}
-errlHndl_t PnorDD::getFlashInfo( void )
+errlHndl_t PnorIpmiDD::getFlashInfo( void )
{
errlHndl_t l_err = NULL;
@@ -757,7 +755,7 @@ errlHndl_t PnorDD::getFlashInfo( void )
return l_err;
}
-errlHndl_t PnorDD::initialiseHiomap( void )
+errlHndl_t PnorIpmiDD::initialiseHiomap( void )
{
errlHndl_t l_err = NULL;
@@ -806,7 +804,7 @@ void *hiomap_event_task(void *context)
/**
* @brief Constructor
*/
-PnorDD::PnorDD( TARGETING::Target* i_target )
+PnorIpmiDD::PnorIpmiDD( TARGETING::Target* i_target )
{
TRACFCOMP(g_trac_pnor, ENTER_MRK "%s: PnorDD::PnorDD()", __FILE__ );
printk("Using HIOMAP PNOR with IPMI transport\n");
@@ -832,14 +830,14 @@ PnorDD::PnorDD( TARGETING::Target* i_target )
TARGETING::ATTR_PROC_MASTER_TYPE_type type_enum =
iv_target->getAttr<TARGETING::ATTR_PROC_MASTER_TYPE>();
- // Master target could collide and cause deadlocks with PnorDD singleton
+ // Master target could collide and cause deadlocks with PnorIpmiDD singleton
// used for ddRead/ddWrite with MASTER_PROCESSOR_CHIP_TARGET_SENTINEL
assert( type_enum != TARGETING::PROC_MASTER_TYPE_ACTING_MASTER );
// Initialize and use class-specific mutex
iv_mutex_ptr = &iv_mutex;
mutex_init(iv_mutex_ptr);
- TRACFCOMP(g_trac_pnor, "PnorDD::PnorDD()> Using i_target=0x%X (non-master) and iv_mutex_ptr",
+ TRACFCOMP(g_trac_pnor, "PnorIpmiDD::PnorIpmiDD()> Using i_target=0x%X (non-master) and iv_mutex_ptr",
TARGETING::get_huid(i_target));
}
else
@@ -865,6 +863,6 @@ PnorDD::PnorDD( TARGETING::Target* i_target )
/**
* @brief Destructor
*/
-PnorDD::~PnorDD()
+PnorIpmiDD::~PnorIpmiDD()
{
}
diff --git a/src/usr/pnor/pnor_ipmidd.H b/src/usr/pnor/pnor_ipmidd.H
index 4e267a7c2..74ffed7f2 100644
--- a/src/usr/pnor/pnor_ipmidd.H
+++ b/src/usr/pnor/pnor_ipmidd.H
@@ -27,11 +27,12 @@
/** @file pnor_ipmidd.H
* @brief Provides the interfaces to the PNOR via the
- * HIOMAP protocol
+ * HIOMAP protocol over IPMI
*/
#include <limits.h>
#include <config.h>
+
namespace PNOR
{
class UdPnorDDParms;
@@ -111,7 +112,7 @@ class HiomapMessage
* @brief PNOR Device Driver Class
* Provides access to the PNOR flash via the LPC MBOX hardware
*/
-class PnorDD
+class PnorIpmiDD
{
public:
@@ -171,12 +172,12 @@ class PnorDD
* @parm i_target Processor Target connected to PNOR
* NOTE: i_target can only be used after targeting is loaded
*/
- PnorDD( TARGETING::Target* i_target = NULL );
+ PnorIpmiDD( TARGETING::Target* i_target = NULL );
/**
* @brief Destructor
*/
- ~PnorDD();
+ ~PnorIpmiDD();
protected:
@@ -314,7 +315,7 @@ class PnorDD
/**
* @brief Global Mutex to prevent concurrent PNOR accesses to Master
* Proc. This needs to be static so we can mutex across multiple
- * instances of PnorDD
+ * instances of PnorIpmiDD
*/
static mutex_t cv_mutex;
diff --git a/src/usr/pnor/pnorvalid.C b/src/usr/pnor/pnorvalid.C
index c4dadf3c7..4c660826c 100644
--- a/src/usr/pnor/pnorvalid.C
+++ b/src/usr/pnor/pnorvalid.C
@@ -54,6 +54,7 @@ using PnorDD = PnorSfcDD;
#include "pnor_mboxdd.H"
#elif CONFIG_PNORDD_IS_IPMI
#include "pnor_ipmidd.H"
+using PnorDD = PnorIpmiDD;
#else
#error "No PNOR DD implementation configured"
#endif
diff --git a/src/usr/pnor/test/pnorddtest.H b/src/usr/pnor/test/pnorddtest.H
index 21d815b5c..a42e77ae3 100644
--- a/src/usr/pnor/test/pnorddtest.H
+++ b/src/usr/pnor/test/pnorddtest.H
@@ -47,6 +47,7 @@ using PnorDD = PnorSfcDD;
#include "pnor_mboxdd.H"
#elif CONFIG_PNORDD_IS_IPMI
#include "pnor_ipmidd.H"
+using PnorDD = PnorIpmiDD;
#else
#error "No PNOR DD implementation configured"
#endif
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