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author | Bill Hoffa <wghoffa@us.ibm.com> | 2019-08-14 10:49:46 -0500 |
---|---|---|
committer | Daniel M Crowell <dcrowell@us.ibm.com> | 2019-08-16 12:42:39 -0500 |
commit | 5825828fa7984e6d46dd47ef1835646303d2a593 (patch) | |
tree | 015b2d3a4f68223c3ab44ecb0306ccd90f437438 /src/usr/mmio/mmio.C | |
parent | 51b7478d2e5dd9bfad8d5039ce1ce26e8dce24db (diff) | |
download | talos-hostboot-5825828fa7984e6d46dd47ef1835646303d2a593.tar.gz talos-hostboot-5825828fa7984e6d46dd47ef1835646303d2a593.zip |
Fix MMIO Addressing and Attributes on Non-Master Proc
- MMIOs to the MC/OMI space to a non-master proc
were incorrectly using a base address pointing
to proc0
- The OMI_INBAND_BAR_BASE_ADDR_OFFSET attribute
MRW processing was incorrect for MC and OMI
targets behind the 2nd proc
Change-Id: Ife440541642463e11d4146157d568f8cd4440877
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82234
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/mmio/mmio.C')
-rw-r--r-- | src/usr/mmio/mmio.C | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/src/usr/mmio/mmio.C b/src/usr/mmio/mmio.C index 4a5d714ab..7d85dee8f 100644 --- a/src/usr/mmio/mmio.C +++ b/src/usr/mmio/mmio.C @@ -108,8 +108,19 @@ errlHndl_t mmioSetup() auto l_omiBaseAddr = l_mcTarget->getAttr<ATTR_OMI_INBAND_BAR_BASE_ADDR_OFFSET>(); - // Apply the MMIO base offset so we get the real address - uint64_t l_realAddr = ( l_omiBaseAddr | MMIO_BASE ); + // Build up the full address with group/chip address considerations + auto l_procType = TARGETING::TYPE_PROC; + TARGETING::Target* l_parentChip = getParent(l_mcTarget, l_procType); + uint8_t l_groupId = + l_parentChip->getAttr<ATTR_PROC_EFF_FABRIC_GROUP_ID>(); + uint8_t l_chipId = + l_parentChip->getAttr<ATTR_PROC_EFF_FABRIC_CHIP_ID>(); + uint64_t l_realAddr = computeMemoryMapOffset( MMIO_BASE, + l_groupId, + l_chipId ); + + // Apply the MMIO base offset so we get the final address + l_realAddr += l_omiBaseAddr; // Map the device with a kernal call, each device, the MC, is 32 GB uint64_t l_virtAddr = reinterpret_cast<uint64_t> |