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author | Dan Crowell <dcrowell@us.ibm.com> | 2017-02-13 22:46:45 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-02-16 14:31:39 -0500 |
commit | 6f93bd233e0f1ffddc7b97cb4be83a944d4483d1 (patch) | |
tree | c68765612bca6478b0e18b4b3d172d3d44232bc6 /src/usr/lpc/lpcdd.H | |
parent | 1987418a47791b77d59c5f231078bfb39ca2b045 (diff) | |
download | talos-hostboot-6f93bd233e0f1ffddc7b97cb4be83a944d4483d1.tar.gz talos-hostboot-6f93bd233e0f1ffddc7b97cb4be83a944d4483d1.zip |
XSCOM/LPC Workaround for Nimbus DD1
There is a shared resource between the XSCOM and LPC logic that
leads to errors at the XSCOM level causing errors to be detected
during LPC operations. This commit adds an external interface
to access block LPC operations while an XSCOM operation is in
flight.
Change-Id: I571094dfb666aa9198fabec5280a0f45c62c90ba
RTC: 167291
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36399
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/lpc/lpcdd.H')
-rw-r--r-- | src/usr/lpc/lpcdd.H | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/src/usr/lpc/lpcdd.H b/src/usr/lpc/lpcdd.H index 1b4e3c5bd..f4bd04176 100644 --- a/src/usr/lpc/lpcdd.H +++ b/src/usr/lpc/lpcdd.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2014,2016 */ +/* Contributors Listed Below - COPYRIGHT 2014,2017 */ /* [+] Google Inc. */ /* [+] International Business Machines Corp. */ /* */ @@ -132,6 +132,19 @@ class LpcDD }; /** + * @brief Block/unblock all LPC operations + * @param[in] i_block true: block ops, false: allow ops + */ + void lock( bool i_block ) + { + if( i_block ) { + mutex_lock(ivp_mutex); + } else { + mutex_unlock(ivp_mutex); + } + }; + + /** * @brief Constructor * @param[in] Processor target associated with the ECCB logic */ |