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author | Christian Geddes <crgeddes@us.ibm.com> | 2018-06-12 17:22:27 -0500 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-06-14 15:55:32 -0400 |
commit | e15b65ed41d8fa55512f79f600b7d9c1a1394174 (patch) | |
tree | 590e3bae14bedfcd1633e4258021469dc20f0dd2 /src/usr/isteps | |
parent | d50263f51eb430a0737367d8bcdacab1476015d6 (diff) | |
download | talos-hostboot-e15b65ed41d8fa55512f79f600b7d9c1a1394174.tar.gz talos-hostboot-e15b65ed41d8fa55512f79f600b7d9c1a1394174.zip |
Fix bugs in core checkstop escalation manipulation during HB
There was a bug where in fused mode we are not also setting the 2nd
half of the fused core to have the appropriate scom values in the fir
action registers. Also we were not re-applying the desired values back
to the core fir action registers at the end of hostboot because of a
simple bug.
Change-Id: I32ae9c7839e27392cfdf0401d008a12941804beb
CQ: SW432725
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60439
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Elizabeth K. Liner <eliner@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/isteps')
-rw-r--r-- | src/usr/isteps/istep16/call_host_activate_master.C | 17 | ||||
-rw-r--r-- | src/usr/isteps/istep21/call_host_start_payload.C | 2 |
2 files changed, 17 insertions, 2 deletions
diff --git a/src/usr/isteps/istep16/call_host_activate_master.C b/src/usr/isteps/istep16/call_host_activate_master.C index bfdbaef42..bb70255d0 100644 --- a/src/usr/isteps/istep16/call_host_activate_master.C +++ b/src/usr/isteps/istep16/call_host_activate_master.C @@ -371,10 +371,25 @@ void* call_host_activate_master (void *io_pArgs) if( l_errl ) { TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "core_checkstop_helper_hwp ERROR: returning."); + "core_checkstop_helper_hwp on master ERROR: returning."); break; } + // We want to make sure the fused pair is also setting the + // core firs to handle checkstops at system level and not + // at the local level + if(l_fusedCore != NULL) + { + l_errl = HBPM::core_checkstop_helper_hwp(l_fusedCore, true); + + if ( l_errl ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "core_checkstop_helper_hwp on fused pair ERROR: returning."); + break; + } + } + // Take new checkstop values and insert them into the homer image l_errl = HBPM::core_checkstop_helper_homer(); diff --git a/src/usr/isteps/istep21/call_host_start_payload.C b/src/usr/isteps/istep21/call_host_start_payload.C index 8d7e8c3eb..c5a650a10 100644 --- a/src/usr/isteps/istep21/call_host_start_payload.C +++ b/src/usr/isteps/istep21/call_host_start_payload.C @@ -405,7 +405,7 @@ void* call_host_start_payload (void *io_pArgs) if(! is_sapphire_load() ) { TARGETING::TargetHandleList l_coreTargetList; - getAllChips(l_coreTargetList, TYPE_CORE); + getAllChiplets(l_coreTargetList, TYPE_CORE); for( auto l_core_target : l_coreTargetList) { |